e1000: use DMA API instead of PCI DMA functions
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
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29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
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31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
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42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
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52
53#include "e1000.h"
54
3be8c940 55#define DRV_VERSION "1.0.2-k2"
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56char e1000e_driver_name[] = "e1000e";
57const char e1000e_driver_version[] = DRV_VERSION;
58
59static const struct e1000_info *e1000_info_tbl[] = {
60 [board_82571] = &e1000_82571_info,
61 [board_82572] = &e1000_82572_info,
62 [board_82573] = &e1000_82573_info,
4662e82b 63 [board_82574] = &e1000_82574_info,
8c81c9c3 64 [board_82583] = &e1000_82583_info,
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65 [board_80003es2lan] = &e1000_es2_info,
66 [board_ich8lan] = &e1000_ich8_info,
67 [board_ich9lan] = &e1000_ich9_info,
f4187b56 68 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 69 [board_pchlan] = &e1000_pch_info,
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70};
71
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72/**
73 * e1000_desc_unused - calculate if we have unused descriptors
74 **/
75static int e1000_desc_unused(struct e1000_ring *ring)
76{
77 if (ring->next_to_clean > ring->next_to_use)
78 return ring->next_to_clean - ring->next_to_use - 1;
79
80 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
81}
82
83/**
ad68076e 84 * e1000_receive_skb - helper function to handle Rx indications
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85 * @adapter: board private structure
86 * @status: descriptor status field as written by hardware
87 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
88 * @skb: pointer to sk_buff to be indicated to stack
89 **/
90static void e1000_receive_skb(struct e1000_adapter *adapter,
91 struct net_device *netdev,
92 struct sk_buff *skb,
a39fe742 93 u8 status, __le16 vlan)
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94{
95 skb->protocol = eth_type_trans(skb, netdev);
96
97 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
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98 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
99 le16_to_cpu(vlan), skb);
bc7f75fa 100 else
89c88b16 101 napi_gro_receive(&adapter->napi, skb);
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102}
103
104/**
105 * e1000_rx_checksum - Receive Checksum Offload for 82543
106 * @adapter: board private structure
107 * @status_err: receive descriptor status and error fields
108 * @csum: receive descriptor csum field
109 * @sk_buff: socket buffer with received data
110 **/
111static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
112 u32 csum, struct sk_buff *skb)
113{
114 u16 status = (u16)status_err;
115 u8 errors = (u8)(status_err >> 24);
116 skb->ip_summed = CHECKSUM_NONE;
117
118 /* Ignore Checksum bit is set */
119 if (status & E1000_RXD_STAT_IXSM)
120 return;
121 /* TCP/UDP checksum error bit is set */
122 if (errors & E1000_RXD_ERR_TCPE) {
123 /* let the stack verify checksum errors */
124 adapter->hw_csum_err++;
125 return;
126 }
127
128 /* TCP/UDP Checksum has not been calculated */
129 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
130 return;
131
132 /* It must be a TCP or UDP packet with a valid checksum */
133 if (status & E1000_RXD_STAT_TCPCS) {
134 /* TCP checksum is good */
135 skb->ip_summed = CHECKSUM_UNNECESSARY;
136 } else {
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137 /*
138 * IP fragment with UDP payload
139 * Hardware complements the payload checksum, so we undo it
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140 * and then put the value in host order for further stack use.
141 */
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142 __sum16 sum = (__force __sum16)htons(csum);
143 skb->csum = csum_unfold(~sum);
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144 skb->ip_summed = CHECKSUM_COMPLETE;
145 }
146 adapter->hw_csum_good++;
147}
148
149/**
150 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
151 * @adapter: address of board private structure
152 **/
153static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
154 int cleaned_count)
155{
156 struct net_device *netdev = adapter->netdev;
157 struct pci_dev *pdev = adapter->pdev;
158 struct e1000_ring *rx_ring = adapter->rx_ring;
159 struct e1000_rx_desc *rx_desc;
160 struct e1000_buffer *buffer_info;
161 struct sk_buff *skb;
162 unsigned int i;
89d71a66 163 unsigned int bufsz = adapter->rx_buffer_len;
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164
165 i = rx_ring->next_to_use;
166 buffer_info = &rx_ring->buffer_info[i];
167
168 while (cleaned_count--) {
169 skb = buffer_info->skb;
170 if (skb) {
171 skb_trim(skb, 0);
172 goto map_skb;
173 }
174
89d71a66 175 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
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176 if (!skb) {
177 /* Better luck next round */
178 adapter->alloc_rx_buff_failed++;
179 break;
180 }
181
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182 buffer_info->skb = skb;
183map_skb:
184 buffer_info->dma = pci_map_single(pdev, skb->data,
185 adapter->rx_buffer_len,
186 PCI_DMA_FROMDEVICE);
8d8bb39b 187 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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188 dev_err(&pdev->dev, "RX DMA map failed\n");
189 adapter->rx_dma_failed++;
190 break;
191 }
192
193 rx_desc = E1000_RX_DESC(*rx_ring, i);
194 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
195
196 i++;
197 if (i == rx_ring->count)
198 i = 0;
199 buffer_info = &rx_ring->buffer_info[i];
200 }
201
202 if (rx_ring->next_to_use != i) {
203 rx_ring->next_to_use = i;
204 if (i-- == 0)
205 i = (rx_ring->count - 1);
206
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207 /*
208 * Force memory writes to complete before letting h/w
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209 * know there are new descriptors to fetch. (Only
210 * applicable for weak-ordered memory model archs,
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211 * such as IA-64).
212 */
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213 wmb();
214 writel(i, adapter->hw.hw_addr + rx_ring->tail);
215 }
216}
217
218/**
219 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
220 * @adapter: address of board private structure
221 **/
222static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
223 int cleaned_count)
224{
225 struct net_device *netdev = adapter->netdev;
226 struct pci_dev *pdev = adapter->pdev;
227 union e1000_rx_desc_packet_split *rx_desc;
228 struct e1000_ring *rx_ring = adapter->rx_ring;
229 struct e1000_buffer *buffer_info;
230 struct e1000_ps_page *ps_page;
231 struct sk_buff *skb;
232 unsigned int i, j;
233
234 i = rx_ring->next_to_use;
235 buffer_info = &rx_ring->buffer_info[i];
236
237 while (cleaned_count--) {
238 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
239
240 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
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241 ps_page = &buffer_info->ps_pages[j];
242 if (j >= adapter->rx_ps_pages) {
243 /* all unused desc entries get hw null ptr */
a39fe742 244 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
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245 continue;
246 }
247 if (!ps_page->page) {
248 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 249 if (!ps_page->page) {
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250 adapter->alloc_rx_buff_failed++;
251 goto no_buffers;
252 }
253 ps_page->dma = pci_map_page(pdev,
254 ps_page->page,
255 0, PAGE_SIZE,
256 PCI_DMA_FROMDEVICE);
8d8bb39b 257 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
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258 dev_err(&adapter->pdev->dev,
259 "RX DMA page map failed\n");
260 adapter->rx_dma_failed++;
261 goto no_buffers;
bc7f75fa 262 }
bc7f75fa 263 }
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264 /*
265 * Refresh the desc even if buffer_addrs
266 * didn't change because each write-back
267 * erases this info.
268 */
269 rx_desc->read.buffer_addr[j+1] =
270 cpu_to_le64(ps_page->dma);
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271 }
272
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273 skb = netdev_alloc_skb_ip_align(netdev,
274 adapter->rx_ps_bsize0);
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275
276 if (!skb) {
277 adapter->alloc_rx_buff_failed++;
278 break;
279 }
280
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281 buffer_info->skb = skb;
282 buffer_info->dma = pci_map_single(pdev, skb->data,
283 adapter->rx_ps_bsize0,
284 PCI_DMA_FROMDEVICE);
8d8bb39b 285 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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286 dev_err(&pdev->dev, "RX DMA map failed\n");
287 adapter->rx_dma_failed++;
288 /* cleanup skb */
289 dev_kfree_skb_any(skb);
290 buffer_info->skb = NULL;
291 break;
292 }
293
294 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
295
296 i++;
297 if (i == rx_ring->count)
298 i = 0;
299 buffer_info = &rx_ring->buffer_info[i];
300 }
301
302no_buffers:
303 if (rx_ring->next_to_use != i) {
304 rx_ring->next_to_use = i;
305
306 if (!(i--))
307 i = (rx_ring->count - 1);
308
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309 /*
310 * Force memory writes to complete before letting h/w
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311 * know there are new descriptors to fetch. (Only
312 * applicable for weak-ordered memory model archs,
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313 * such as IA-64).
314 */
bc7f75fa 315 wmb();
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316 /*
317 * Hardware increments by 16 bytes, but packet split
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318 * descriptors are 32 bytes...so we increment tail
319 * twice as much.
320 */
321 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
322 }
323}
324
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325/**
326 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
327 * @adapter: address of board private structure
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328 * @cleaned_count: number of buffers to allocate this pass
329 **/
330
331static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
332 int cleaned_count)
333{
334 struct net_device *netdev = adapter->netdev;
335 struct pci_dev *pdev = adapter->pdev;
336 struct e1000_rx_desc *rx_desc;
337 struct e1000_ring *rx_ring = adapter->rx_ring;
338 struct e1000_buffer *buffer_info;
339 struct sk_buff *skb;
340 unsigned int i;
89d71a66 341 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
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342
343 i = rx_ring->next_to_use;
344 buffer_info = &rx_ring->buffer_info[i];
345
346 while (cleaned_count--) {
347 skb = buffer_info->skb;
348 if (skb) {
349 skb_trim(skb, 0);
350 goto check_page;
351 }
352
89d71a66 353 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
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354 if (unlikely(!skb)) {
355 /* Better luck next round */
356 adapter->alloc_rx_buff_failed++;
357 break;
358 }
359
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360 buffer_info->skb = skb;
361check_page:
362 /* allocate a new page if necessary */
363 if (!buffer_info->page) {
364 buffer_info->page = alloc_page(GFP_ATOMIC);
365 if (unlikely(!buffer_info->page)) {
366 adapter->alloc_rx_buff_failed++;
367 break;
368 }
369 }
370
371 if (!buffer_info->dma)
372 buffer_info->dma = pci_map_page(pdev,
373 buffer_info->page, 0,
374 PAGE_SIZE,
375 PCI_DMA_FROMDEVICE);
376
377 rx_desc = E1000_RX_DESC(*rx_ring, i);
378 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
379
380 if (unlikely(++i == rx_ring->count))
381 i = 0;
382 buffer_info = &rx_ring->buffer_info[i];
383 }
384
385 if (likely(rx_ring->next_to_use != i)) {
386 rx_ring->next_to_use = i;
387 if (unlikely(i-- == 0))
388 i = (rx_ring->count - 1);
389
390 /* Force memory writes to complete before letting h/w
391 * know there are new descriptors to fetch. (Only
392 * applicable for weak-ordered memory model archs,
393 * such as IA-64). */
394 wmb();
395 writel(i, adapter->hw.hw_addr + rx_ring->tail);
396 }
397}
398
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399/**
400 * e1000_clean_rx_irq - Send received data up the network stack; legacy
401 * @adapter: board private structure
402 *
403 * the return value indicates whether actual cleaning was done, there
404 * is no guarantee that everything was cleaned
405 **/
406static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
407 int *work_done, int work_to_do)
408{
409 struct net_device *netdev = adapter->netdev;
410 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 411 struct e1000_hw *hw = &adapter->hw;
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412 struct e1000_ring *rx_ring = adapter->rx_ring;
413 struct e1000_rx_desc *rx_desc, *next_rxd;
414 struct e1000_buffer *buffer_info, *next_buffer;
415 u32 length;
416 unsigned int i;
417 int cleaned_count = 0;
418 bool cleaned = 0;
419 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
420
421 i = rx_ring->next_to_clean;
422 rx_desc = E1000_RX_DESC(*rx_ring, i);
423 buffer_info = &rx_ring->buffer_info[i];
424
425 while (rx_desc->status & E1000_RXD_STAT_DD) {
426 struct sk_buff *skb;
427 u8 status;
428
429 if (*work_done >= work_to_do)
430 break;
431 (*work_done)++;
432
433 status = rx_desc->status;
434 skb = buffer_info->skb;
435 buffer_info->skb = NULL;
436
437 prefetch(skb->data - NET_IP_ALIGN);
438
439 i++;
440 if (i == rx_ring->count)
441 i = 0;
442 next_rxd = E1000_RX_DESC(*rx_ring, i);
443 prefetch(next_rxd);
444
445 next_buffer = &rx_ring->buffer_info[i];
446
447 cleaned = 1;
448 cleaned_count++;
449 pci_unmap_single(pdev,
450 buffer_info->dma,
451 adapter->rx_buffer_len,
452 PCI_DMA_FROMDEVICE);
453 buffer_info->dma = 0;
454
455 length = le16_to_cpu(rx_desc->length);
456
b94b5028
JB
457 /*
458 * !EOP means multiple descriptors were used to store a single
459 * packet, if that's the case we need to toss it. In fact, we
460 * need to toss every packet with the EOP bit clear and the
461 * next frame that _does_ have the EOP bit set, as it is by
462 * definition only a frame fragment
463 */
464 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
465 adapter->flags2 |= FLAG2_IS_DISCARDING;
466
467 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 468 /* All receives must fit into a single buffer */
3bb99fe2 469 e_dbg("Receive packet consumed multiple buffers\n");
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470 /* recycle */
471 buffer_info->skb = skb;
b94b5028
JB
472 if (status & E1000_RXD_STAT_EOP)
473 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
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474 goto next_desc;
475 }
476
477 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
478 /* recycle */
479 buffer_info->skb = skb;
480 goto next_desc;
481 }
482
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483 /* adjust length to remove Ethernet CRC */
484 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
485 length -= 4;
486
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487 total_rx_bytes += length;
488 total_rx_packets++;
489
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490 /*
491 * code added for copybreak, this should improve
bc7f75fa 492 * performance for small packets with large amounts
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493 * of reassembly being done in the stack
494 */
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495 if (length < copybreak) {
496 struct sk_buff *new_skb =
89d71a66 497 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 498 if (new_skb) {
808ff676
BA
499 skb_copy_to_linear_data_offset(new_skb,
500 -NET_IP_ALIGN,
501 (skb->data -
502 NET_IP_ALIGN),
503 (length +
504 NET_IP_ALIGN));
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505 /* save the skb in buffer_info as good */
506 buffer_info->skb = skb;
507 skb = new_skb;
508 }
509 /* else just continue with the old one */
510 }
511 /* end copybreak code */
512 skb_put(skb, length);
513
514 /* Receive Checksum Offload */
515 e1000_rx_checksum(adapter,
516 (u32)(status) |
517 ((u32)(rx_desc->errors) << 24),
518 le16_to_cpu(rx_desc->csum), skb);
519
520 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
521
522next_desc:
523 rx_desc->status = 0;
524
525 /* return some buffers to hardware, one at a time is too slow */
526 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
527 adapter->alloc_rx_buf(adapter, cleaned_count);
528 cleaned_count = 0;
529 }
530
531 /* use prefetched values */
532 rx_desc = next_rxd;
533 buffer_info = next_buffer;
534 }
535 rx_ring->next_to_clean = i;
536
537 cleaned_count = e1000_desc_unused(rx_ring);
538 if (cleaned_count)
539 adapter->alloc_rx_buf(adapter, cleaned_count);
540
bc7f75fa 541 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 542 adapter->total_rx_packets += total_rx_packets;
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543 netdev->stats.rx_bytes += total_rx_bytes;
544 netdev->stats.rx_packets += total_rx_packets;
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545 return cleaned;
546}
547
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548static void e1000_put_txbuf(struct e1000_adapter *adapter,
549 struct e1000_buffer *buffer_info)
550{
03b1320d
AD
551 if (buffer_info->dma) {
552 if (buffer_info->mapped_as_page)
553 pci_unmap_page(adapter->pdev, buffer_info->dma,
554 buffer_info->length, PCI_DMA_TODEVICE);
555 else
556 pci_unmap_single(adapter->pdev, buffer_info->dma,
557 buffer_info->length,
558 PCI_DMA_TODEVICE);
559 buffer_info->dma = 0;
560 }
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561 if (buffer_info->skb) {
562 dev_kfree_skb_any(buffer_info->skb);
563 buffer_info->skb = NULL;
564 }
1b7719c4 565 buffer_info->time_stamp = 0;
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AK
566}
567
41cec6f1 568static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 569{
41cec6f1
BA
570 struct e1000_adapter *adapter = container_of(work,
571 struct e1000_adapter,
572 print_hang_task);
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AK
573 struct e1000_ring *tx_ring = adapter->tx_ring;
574 unsigned int i = tx_ring->next_to_clean;
575 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
576 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA
577 struct e1000_hw *hw = &adapter->hw;
578 u16 phy_status, phy_1000t_status, phy_ext_status;
579 u16 pci_status;
580
581 e1e_rphy(hw, PHY_STATUS, &phy_status);
582 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
583 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 584
41cec6f1
BA
585 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
586
587 /* detected Hardware unit hang */
588 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK
589 " TDH <%x>\n"
590 " TDT <%x>\n"
591 " next_to_use <%x>\n"
592 " next_to_clean <%x>\n"
593 "buffer_info[next_to_clean]:\n"
594 " time_stamp <%lx>\n"
595 " next_to_watch <%x>\n"
596 " jiffies <%lx>\n"
41cec6f1
BA
597 " next_to_watch.status <%x>\n"
598 "MAC Status <%x>\n"
599 "PHY Status <%x>\n"
600 "PHY 1000BASE-T Status <%x>\n"
601 "PHY Extended Status <%x>\n"
602 "PCI Status <%x>\n",
44defeb3
JK
603 readl(adapter->hw.hw_addr + tx_ring->head),
604 readl(adapter->hw.hw_addr + tx_ring->tail),
605 tx_ring->next_to_use,
606 tx_ring->next_to_clean,
607 tx_ring->buffer_info[eop].time_stamp,
608 eop,
609 jiffies,
41cec6f1
BA
610 eop_desc->upper.fields.status,
611 er32(STATUS),
612 phy_status,
613 phy_1000t_status,
614 phy_ext_status,
615 pci_status);
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616}
617
618/**
619 * e1000_clean_tx_irq - Reclaim resources after transmit completes
620 * @adapter: board private structure
621 *
622 * the return value indicates whether actual cleaning was done, there
623 * is no guarantee that everything was cleaned
624 **/
625static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
626{
627 struct net_device *netdev = adapter->netdev;
628 struct e1000_hw *hw = &adapter->hw;
629 struct e1000_ring *tx_ring = adapter->tx_ring;
630 struct e1000_tx_desc *tx_desc, *eop_desc;
631 struct e1000_buffer *buffer_info;
632 unsigned int i, eop;
633 unsigned int count = 0;
bc7f75fa
AK
634 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
635
636 i = tx_ring->next_to_clean;
637 eop = tx_ring->buffer_info[i].next_to_watch;
638 eop_desc = E1000_TX_DESC(*tx_ring, eop);
639
12d04a3c
AD
640 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
641 (count < tx_ring->count)) {
a86043c2
JB
642 bool cleaned = false;
643 for (; !cleaned; count++) {
bc7f75fa
AK
644 tx_desc = E1000_TX_DESC(*tx_ring, i);
645 buffer_info = &tx_ring->buffer_info[i];
646 cleaned = (i == eop);
647
648 if (cleaned) {
649 struct sk_buff *skb = buffer_info->skb;
650 unsigned int segs, bytecount;
651 segs = skb_shinfo(skb)->gso_segs ?: 1;
652 /* multiply data chunks by size of headers */
653 bytecount = ((segs - 1) * skb_headlen(skb)) +
654 skb->len;
655 total_tx_packets += segs;
656 total_tx_bytes += bytecount;
657 }
658
659 e1000_put_txbuf(adapter, buffer_info);
660 tx_desc->upper.data = 0;
661
662 i++;
663 if (i == tx_ring->count)
664 i = 0;
665 }
666
dac87619
TL
667 if (i == tx_ring->next_to_use)
668 break;
bc7f75fa
AK
669 eop = tx_ring->buffer_info[i].next_to_watch;
670 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK
671 }
672
673 tx_ring->next_to_clean = i;
674
675#define TX_WAKE_THRESHOLD 32
a86043c2
JB
676 if (count && netif_carrier_ok(netdev) &&
677 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK
678 /* Make sure that anybody stopping the queue after this
679 * sees the new next_to_clean.
680 */
681 smp_mb();
682
683 if (netif_queue_stopped(netdev) &&
684 !(test_bit(__E1000_DOWN, &adapter->state))) {
685 netif_wake_queue(netdev);
686 ++adapter->restart_queue;
687 }
688 }
689
690 if (adapter->detect_tx_hung) {
41cec6f1
BA
691 /*
692 * Detect a transmit hang in hardware, this serializes the
693 * check with the clearing of time_stamp and movement of i
694 */
bc7f75fa 695 adapter->detect_tx_hung = 0;
12d04a3c
AD
696 if (tx_ring->buffer_info[i].time_stamp &&
697 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP
698 + (adapter->tx_timeout_factor * HZ)) &&
699 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 700 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK
701 netif_stop_queue(netdev);
702 }
703 }
704 adapter->total_tx_bytes += total_tx_bytes;
705 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK
706 netdev->stats.tx_bytes += total_tx_bytes;
707 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 708 return (count < tx_ring->count);
bc7f75fa
AK
709}
710
bc7f75fa
AK
711/**
712 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
713 * @adapter: board private structure
714 *
715 * the return value indicates whether actual cleaning was done, there
716 * is no guarantee that everything was cleaned
717 **/
718static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
719 int *work_done, int work_to_do)
720{
3bb99fe2 721 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
722 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
723 struct net_device *netdev = adapter->netdev;
724 struct pci_dev *pdev = adapter->pdev;
725 struct e1000_ring *rx_ring = adapter->rx_ring;
726 struct e1000_buffer *buffer_info, *next_buffer;
727 struct e1000_ps_page *ps_page;
728 struct sk_buff *skb;
729 unsigned int i, j;
730 u32 length, staterr;
731 int cleaned_count = 0;
732 bool cleaned = 0;
733 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
734
735 i = rx_ring->next_to_clean;
736 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
737 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
738 buffer_info = &rx_ring->buffer_info[i];
739
740 while (staterr & E1000_RXD_STAT_DD) {
741 if (*work_done >= work_to_do)
742 break;
743 (*work_done)++;
744 skb = buffer_info->skb;
745
746 /* in the packet split case this is header only */
747 prefetch(skb->data - NET_IP_ALIGN);
748
749 i++;
750 if (i == rx_ring->count)
751 i = 0;
752 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
753 prefetch(next_rxd);
754
755 next_buffer = &rx_ring->buffer_info[i];
756
757 cleaned = 1;
758 cleaned_count++;
759 pci_unmap_single(pdev, buffer_info->dma,
760 adapter->rx_ps_bsize0,
761 PCI_DMA_FROMDEVICE);
762 buffer_info->dma = 0;
763
b94b5028
JB
764 /* see !EOP comment in other rx routine */
765 if (!(staterr & E1000_RXD_STAT_EOP))
766 adapter->flags2 |= FLAG2_IS_DISCARDING;
767
768 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA
769 e_dbg("Packet Split buffers didn't pick up the full "
770 "packet\n");
bc7f75fa 771 dev_kfree_skb_irq(skb);
b94b5028
JB
772 if (staterr & E1000_RXD_STAT_EOP)
773 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
774 goto next_desc;
775 }
776
777 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
778 dev_kfree_skb_irq(skb);
779 goto next_desc;
780 }
781
782 length = le16_to_cpu(rx_desc->wb.middle.length0);
783
784 if (!length) {
3bb99fe2
BA
785 e_dbg("Last part of the packet spanning multiple "
786 "descriptors\n");
bc7f75fa
AK
787 dev_kfree_skb_irq(skb);
788 goto next_desc;
789 }
790
791 /* Good Receive */
792 skb_put(skb, length);
793
794 {
ad68076e
BA
795 /*
796 * this looks ugly, but it seems compiler issues make it
797 * more efficient than reusing j
798 */
bc7f75fa
AK
799 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
800
ad68076e
BA
801 /*
802 * page alloc/put takes too long and effects small packet
803 * throughput, so unsplit small packets and save the alloc/put
804 * only valid in softirq (napi) context to call kmap_*
805 */
bc7f75fa
AK
806 if (l1 && (l1 <= copybreak) &&
807 ((length + l1) <= adapter->rx_ps_bsize0)) {
808 u8 *vaddr;
809
47f44e40 810 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 811
ad68076e
BA
812 /*
813 * there is no documentation about how to call
bc7f75fa 814 * kmap_atomic, so we can't hold the mapping
ad68076e
BA
815 * very long
816 */
bc7f75fa
AK
817 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
818 PAGE_SIZE, PCI_DMA_FROMDEVICE);
819 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
820 memcpy(skb_tail_pointer(skb), vaddr, l1);
821 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
822 pci_dma_sync_single_for_device(pdev, ps_page->dma,
823 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 824
eb7c3adb
JK
825 /* remove the CRC */
826 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
827 l1 -= 4;
828
bc7f75fa
AK
829 skb_put(skb, l1);
830 goto copydone;
831 } /* if */
832 }
833
834 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
835 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
836 if (!length)
837 break;
838
47f44e40 839 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
840 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
841 PCI_DMA_FROMDEVICE);
842 ps_page->dma = 0;
843 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
844 ps_page->page = NULL;
845 skb->len += length;
846 skb->data_len += length;
847 skb->truesize += length;
848 }
849
eb7c3adb
JK
850 /* strip the ethernet crc, problem is we're using pages now so
851 * this whole operation can get a little cpu intensive
852 */
853 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
854 pskb_trim(skb, skb->len - 4);
855
bc7f75fa
AK
856copydone:
857 total_rx_bytes += skb->len;
858 total_rx_packets++;
859
860 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
861 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
862
863 if (rx_desc->wb.upper.header_status &
864 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
865 adapter->rx_hdr_split++;
866
867 e1000_receive_skb(adapter, netdev, skb,
868 staterr, rx_desc->wb.middle.vlan);
869
870next_desc:
871 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
872 buffer_info->skb = NULL;
873
874 /* return some buffers to hardware, one at a time is too slow */
875 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
876 adapter->alloc_rx_buf(adapter, cleaned_count);
877 cleaned_count = 0;
878 }
879
880 /* use prefetched values */
881 rx_desc = next_rxd;
882 buffer_info = next_buffer;
883
884 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
885 }
886 rx_ring->next_to_clean = i;
887
888 cleaned_count = e1000_desc_unused(rx_ring);
889 if (cleaned_count)
890 adapter->alloc_rx_buf(adapter, cleaned_count);
891
bc7f75fa 892 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 893 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
894 netdev->stats.rx_bytes += total_rx_bytes;
895 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
896 return cleaned;
897}
898
97ac8cae
BA
899/**
900 * e1000_consume_page - helper function
901 **/
902static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
903 u16 length)
904{
905 bi->page = NULL;
906 skb->len += length;
907 skb->data_len += length;
908 skb->truesize += length;
909}
910
911/**
912 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
913 * @adapter: board private structure
914 *
915 * the return value indicates whether actual cleaning was done, there
916 * is no guarantee that everything was cleaned
917 **/
918
919static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
920 int *work_done, int work_to_do)
921{
922 struct net_device *netdev = adapter->netdev;
923 struct pci_dev *pdev = adapter->pdev;
924 struct e1000_ring *rx_ring = adapter->rx_ring;
925 struct e1000_rx_desc *rx_desc, *next_rxd;
926 struct e1000_buffer *buffer_info, *next_buffer;
927 u32 length;
928 unsigned int i;
929 int cleaned_count = 0;
930 bool cleaned = false;
931 unsigned int total_rx_bytes=0, total_rx_packets=0;
932
933 i = rx_ring->next_to_clean;
934 rx_desc = E1000_RX_DESC(*rx_ring, i);
935 buffer_info = &rx_ring->buffer_info[i];
936
937 while (rx_desc->status & E1000_RXD_STAT_DD) {
938 struct sk_buff *skb;
939 u8 status;
940
941 if (*work_done >= work_to_do)
942 break;
943 (*work_done)++;
944
945 status = rx_desc->status;
946 skb = buffer_info->skb;
947 buffer_info->skb = NULL;
948
949 ++i;
950 if (i == rx_ring->count)
951 i = 0;
952 next_rxd = E1000_RX_DESC(*rx_ring, i);
953 prefetch(next_rxd);
954
955 next_buffer = &rx_ring->buffer_info[i];
956
957 cleaned = true;
958 cleaned_count++;
959 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
960 PCI_DMA_FROMDEVICE);
961 buffer_info->dma = 0;
962
963 length = le16_to_cpu(rx_desc->length);
964
965 /* errors is only valid for DD + EOP descriptors */
966 if (unlikely((status & E1000_RXD_STAT_EOP) &&
967 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
968 /* recycle both page and skb */
969 buffer_info->skb = skb;
970 /* an error means any chain goes out the window
971 * too */
972 if (rx_ring->rx_skb_top)
973 dev_kfree_skb(rx_ring->rx_skb_top);
974 rx_ring->rx_skb_top = NULL;
975 goto next_desc;
976 }
977
978#define rxtop rx_ring->rx_skb_top
979 if (!(status & E1000_RXD_STAT_EOP)) {
980 /* this descriptor is only the beginning (or middle) */
981 if (!rxtop) {
982 /* this is the beginning of a chain */
983 rxtop = skb;
984 skb_fill_page_desc(rxtop, 0, buffer_info->page,
985 0, length);
986 } else {
987 /* this is the middle of a chain */
988 skb_fill_page_desc(rxtop,
989 skb_shinfo(rxtop)->nr_frags,
990 buffer_info->page, 0, length);
991 /* re-use the skb, only consumed the page */
992 buffer_info->skb = skb;
993 }
994 e1000_consume_page(buffer_info, rxtop, length);
995 goto next_desc;
996 } else {
997 if (rxtop) {
998 /* end of the chain */
999 skb_fill_page_desc(rxtop,
1000 skb_shinfo(rxtop)->nr_frags,
1001 buffer_info->page, 0, length);
1002 /* re-use the current skb, we only consumed the
1003 * page */
1004 buffer_info->skb = skb;
1005 skb = rxtop;
1006 rxtop = NULL;
1007 e1000_consume_page(buffer_info, skb, length);
1008 } else {
1009 /* no chain, got EOP, this buf is the packet
1010 * copybreak to save the put_page/alloc_page */
1011 if (length <= copybreak &&
1012 skb_tailroom(skb) >= length) {
1013 u8 *vaddr;
1014 vaddr = kmap_atomic(buffer_info->page,
1015 KM_SKB_DATA_SOFTIRQ);
1016 memcpy(skb_tail_pointer(skb), vaddr,
1017 length);
1018 kunmap_atomic(vaddr,
1019 KM_SKB_DATA_SOFTIRQ);
1020 /* re-use the page, so don't erase
1021 * buffer_info->page */
1022 skb_put(skb, length);
1023 } else {
1024 skb_fill_page_desc(skb, 0,
1025 buffer_info->page, 0,
1026 length);
1027 e1000_consume_page(buffer_info, skb,
1028 length);
1029 }
1030 }
1031 }
1032
1033 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1034 e1000_rx_checksum(adapter,
1035 (u32)(status) |
1036 ((u32)(rx_desc->errors) << 24),
1037 le16_to_cpu(rx_desc->csum), skb);
1038
1039 /* probably a little skewed due to removing CRC */
1040 total_rx_bytes += skb->len;
1041 total_rx_packets++;
1042
1043 /* eth type trans needs skb->data to point to something */
1044 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1045 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1046 dev_kfree_skb(skb);
1047 goto next_desc;
1048 }
1049
1050 e1000_receive_skb(adapter, netdev, skb, status,
1051 rx_desc->special);
1052
1053next_desc:
1054 rx_desc->status = 0;
1055
1056 /* return some buffers to hardware, one at a time is too slow */
1057 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1058 adapter->alloc_rx_buf(adapter, cleaned_count);
1059 cleaned_count = 0;
1060 }
1061
1062 /* use prefetched values */
1063 rx_desc = next_rxd;
1064 buffer_info = next_buffer;
1065 }
1066 rx_ring->next_to_clean = i;
1067
1068 cleaned_count = e1000_desc_unused(rx_ring);
1069 if (cleaned_count)
1070 adapter->alloc_rx_buf(adapter, cleaned_count);
1071
1072 adapter->total_rx_bytes += total_rx_bytes;
1073 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1074 netdev->stats.rx_bytes += total_rx_bytes;
1075 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA
1076 return cleaned;
1077}
1078
bc7f75fa
AK
1079/**
1080 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1081 * @adapter: board private structure
1082 **/
1083static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1084{
1085 struct e1000_ring *rx_ring = adapter->rx_ring;
1086 struct e1000_buffer *buffer_info;
1087 struct e1000_ps_page *ps_page;
1088 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
1089 unsigned int i, j;
1090
1091 /* Free all the Rx ring sk_buffs */
1092 for (i = 0; i < rx_ring->count; i++) {
1093 buffer_info = &rx_ring->buffer_info[i];
1094 if (buffer_info->dma) {
1095 if (adapter->clean_rx == e1000_clean_rx_irq)
1096 pci_unmap_single(pdev, buffer_info->dma,
1097 adapter->rx_buffer_len,
1098 PCI_DMA_FROMDEVICE);
97ac8cae
BA
1099 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1100 pci_unmap_page(pdev, buffer_info->dma,
1101 PAGE_SIZE,
1102 PCI_DMA_FROMDEVICE);
bc7f75fa
AK
1103 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1104 pci_unmap_single(pdev, buffer_info->dma,
1105 adapter->rx_ps_bsize0,
1106 PCI_DMA_FROMDEVICE);
1107 buffer_info->dma = 0;
1108 }
1109
97ac8cae
BA
1110 if (buffer_info->page) {
1111 put_page(buffer_info->page);
1112 buffer_info->page = NULL;
1113 }
1114
bc7f75fa
AK
1115 if (buffer_info->skb) {
1116 dev_kfree_skb(buffer_info->skb);
1117 buffer_info->skb = NULL;
1118 }
1119
1120 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1121 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
1122 if (!ps_page->page)
1123 break;
1124 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1125 PCI_DMA_FROMDEVICE);
1126 ps_page->dma = 0;
1127 put_page(ps_page->page);
1128 ps_page->page = NULL;
1129 }
1130 }
1131
1132 /* there also may be some cached data from a chained receive */
1133 if (rx_ring->rx_skb_top) {
1134 dev_kfree_skb(rx_ring->rx_skb_top);
1135 rx_ring->rx_skb_top = NULL;
1136 }
1137
bc7f75fa
AK
1138 /* Zero out the descriptor ring */
1139 memset(rx_ring->desc, 0, rx_ring->size);
1140
1141 rx_ring->next_to_clean = 0;
1142 rx_ring->next_to_use = 0;
b94b5028 1143 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1144
1145 writel(0, adapter->hw.hw_addr + rx_ring->head);
1146 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1147}
1148
a8f88ff5
JB
1149static void e1000e_downshift_workaround(struct work_struct *work)
1150{
1151 struct e1000_adapter *adapter = container_of(work,
1152 struct e1000_adapter, downshift_task);
1153
1154 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1155}
1156
bc7f75fa
AK
1157/**
1158 * e1000_intr_msi - Interrupt Handler
1159 * @irq: interrupt number
1160 * @data: pointer to a network interface device structure
1161 **/
1162static irqreturn_t e1000_intr_msi(int irq, void *data)
1163{
1164 struct net_device *netdev = data;
1165 struct e1000_adapter *adapter = netdev_priv(netdev);
1166 struct e1000_hw *hw = &adapter->hw;
1167 u32 icr = er32(ICR);
1168
ad68076e
BA
1169 /*
1170 * read ICR disables interrupts using IAM
1171 */
bc7f75fa 1172
573cca8c 1173 if (icr & E1000_ICR_LSC) {
bc7f75fa 1174 hw->mac.get_link_status = 1;
ad68076e
BA
1175 /*
1176 * ICH8 workaround-- Call gig speed drop workaround on cable
1177 * disconnect (LSC) before accessing any PHY registers
1178 */
bc7f75fa
AK
1179 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1180 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1181 schedule_work(&adapter->downshift_task);
bc7f75fa 1182
ad68076e
BA
1183 /*
1184 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1185 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1186 * adapter in watchdog
1187 */
bc7f75fa
AK
1188 if (netif_carrier_ok(netdev) &&
1189 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1190 /* disable receives */
1191 u32 rctl = er32(RCTL);
1192 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1193 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1194 }
1195 /* guard against interrupt when we're going down */
1196 if (!test_bit(__E1000_DOWN, &adapter->state))
1197 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1198 }
1199
288379f0 1200 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1201 adapter->total_tx_bytes = 0;
1202 adapter->total_tx_packets = 0;
1203 adapter->total_rx_bytes = 0;
1204 adapter->total_rx_packets = 0;
288379f0 1205 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1206 }
1207
1208 return IRQ_HANDLED;
1209}
1210
1211/**
1212 * e1000_intr - Interrupt Handler
1213 * @irq: interrupt number
1214 * @data: pointer to a network interface device structure
1215 **/
1216static irqreturn_t e1000_intr(int irq, void *data)
1217{
1218 struct net_device *netdev = data;
1219 struct e1000_adapter *adapter = netdev_priv(netdev);
1220 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1221 u32 rctl, icr = er32(ICR);
4662e82b 1222
a68ea775 1223 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK
1224 return IRQ_NONE; /* Not our interrupt */
1225
ad68076e
BA
1226 /*
1227 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1228 * not set, then the adapter didn't send an interrupt
1229 */
bc7f75fa
AK
1230 if (!(icr & E1000_ICR_INT_ASSERTED))
1231 return IRQ_NONE;
1232
ad68076e
BA
1233 /*
1234 * Interrupt Auto-Mask...upon reading ICR,
1235 * interrupts are masked. No need for the
1236 * IMC write
1237 */
bc7f75fa 1238
573cca8c 1239 if (icr & E1000_ICR_LSC) {
bc7f75fa 1240 hw->mac.get_link_status = 1;
ad68076e
BA
1241 /*
1242 * ICH8 workaround-- Call gig speed drop workaround on cable
1243 * disconnect (LSC) before accessing any PHY registers
1244 */
bc7f75fa
AK
1245 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1246 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1247 schedule_work(&adapter->downshift_task);
bc7f75fa 1248
ad68076e
BA
1249 /*
1250 * 80003ES2LAN workaround--
bc7f75fa
AK
1251 * For packet buffer work-around on link down event;
1252 * disable receives here in the ISR and
1253 * reset adapter in watchdog
1254 */
1255 if (netif_carrier_ok(netdev) &&
1256 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1257 /* disable receives */
1258 rctl = er32(RCTL);
1259 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1260 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1261 }
1262 /* guard against interrupt when we're going down */
1263 if (!test_bit(__E1000_DOWN, &adapter->state))
1264 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1265 }
1266
288379f0 1267 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1268 adapter->total_tx_bytes = 0;
1269 adapter->total_tx_packets = 0;
1270 adapter->total_rx_bytes = 0;
1271 adapter->total_rx_packets = 0;
288379f0 1272 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1273 }
1274
1275 return IRQ_HANDLED;
1276}
1277
4662e82b
BA
1278static irqreturn_t e1000_msix_other(int irq, void *data)
1279{
1280 struct net_device *netdev = data;
1281 struct e1000_adapter *adapter = netdev_priv(netdev);
1282 struct e1000_hw *hw = &adapter->hw;
1283 u32 icr = er32(ICR);
1284
1285 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB
1286 if (!test_bit(__E1000_DOWN, &adapter->state))
1287 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA
1288 return IRQ_NONE;
1289 }
1290
1291 if (icr & adapter->eiac_mask)
1292 ew32(ICS, (icr & adapter->eiac_mask));
1293
1294 if (icr & E1000_ICR_OTHER) {
1295 if (!(icr & E1000_ICR_LSC))
1296 goto no_link_interrupt;
1297 hw->mac.get_link_status = 1;
1298 /* guard against interrupt when we're going down */
1299 if (!test_bit(__E1000_DOWN, &adapter->state))
1300 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1301 }
1302
1303no_link_interrupt:
a3c69fef
JB
1304 if (!test_bit(__E1000_DOWN, &adapter->state))
1305 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA
1306
1307 return IRQ_HANDLED;
1308}
1309
1310
1311static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1312{
1313 struct net_device *netdev = data;
1314 struct e1000_adapter *adapter = netdev_priv(netdev);
1315 struct e1000_hw *hw = &adapter->hw;
1316 struct e1000_ring *tx_ring = adapter->tx_ring;
1317
1318
1319 adapter->total_tx_bytes = 0;
1320 adapter->total_tx_packets = 0;
1321
1322 if (!e1000_clean_tx_irq(adapter))
1323 /* Ring was not completely cleaned, so fire another interrupt */
1324 ew32(ICS, tx_ring->ims_val);
1325
1326 return IRQ_HANDLED;
1327}
1328
1329static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1330{
1331 struct net_device *netdev = data;
1332 struct e1000_adapter *adapter = netdev_priv(netdev);
1333
1334 /* Write the ITR value calculated at the end of the
1335 * previous interrupt.
1336 */
1337 if (adapter->rx_ring->set_itr) {
1338 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1339 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1340 adapter->rx_ring->set_itr = 0;
1341 }
1342
288379f0 1343 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA
1344 adapter->total_rx_bytes = 0;
1345 adapter->total_rx_packets = 0;
288379f0 1346 __napi_schedule(&adapter->napi);
4662e82b
BA
1347 }
1348 return IRQ_HANDLED;
1349}
1350
1351/**
1352 * e1000_configure_msix - Configure MSI-X hardware
1353 *
1354 * e1000_configure_msix sets up the hardware to properly
1355 * generate MSI-X interrupts.
1356 **/
1357static void e1000_configure_msix(struct e1000_adapter *adapter)
1358{
1359 struct e1000_hw *hw = &adapter->hw;
1360 struct e1000_ring *rx_ring = adapter->rx_ring;
1361 struct e1000_ring *tx_ring = adapter->tx_ring;
1362 int vector = 0;
1363 u32 ctrl_ext, ivar = 0;
1364
1365 adapter->eiac_mask = 0;
1366
1367 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1368 if (hw->mac.type == e1000_82574) {
1369 u32 rfctl = er32(RFCTL);
1370 rfctl |= E1000_RFCTL_ACK_DIS;
1371 ew32(RFCTL, rfctl);
1372 }
1373
1374#define E1000_IVAR_INT_ALLOC_VALID 0x8
1375 /* Configure Rx vector */
1376 rx_ring->ims_val = E1000_IMS_RXQ0;
1377 adapter->eiac_mask |= rx_ring->ims_val;
1378 if (rx_ring->itr_val)
1379 writel(1000000000 / (rx_ring->itr_val * 256),
1380 hw->hw_addr + rx_ring->itr_register);
1381 else
1382 writel(1, hw->hw_addr + rx_ring->itr_register);
1383 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1384
1385 /* Configure Tx vector */
1386 tx_ring->ims_val = E1000_IMS_TXQ0;
1387 vector++;
1388 if (tx_ring->itr_val)
1389 writel(1000000000 / (tx_ring->itr_val * 256),
1390 hw->hw_addr + tx_ring->itr_register);
1391 else
1392 writel(1, hw->hw_addr + tx_ring->itr_register);
1393 adapter->eiac_mask |= tx_ring->ims_val;
1394 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1395
1396 /* set vector for Other Causes, e.g. link changes */
1397 vector++;
1398 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1399 if (rx_ring->itr_val)
1400 writel(1000000000 / (rx_ring->itr_val * 256),
1401 hw->hw_addr + E1000_EITR_82574(vector));
1402 else
1403 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1404
1405 /* Cause Tx interrupts on every write back */
1406 ivar |= (1 << 31);
1407
1408 ew32(IVAR, ivar);
1409
1410 /* enable MSI-X PBA support */
1411 ctrl_ext = er32(CTRL_EXT);
1412 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1413
1414 /* Auto-Mask Other interrupts upon ICR read */
1415#define E1000_EIAC_MASK_82574 0x01F00000
1416 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1417 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1418 ew32(CTRL_EXT, ctrl_ext);
1419 e1e_flush();
1420}
1421
1422void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1423{
1424 if (adapter->msix_entries) {
1425 pci_disable_msix(adapter->pdev);
1426 kfree(adapter->msix_entries);
1427 adapter->msix_entries = NULL;
1428 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1429 pci_disable_msi(adapter->pdev);
1430 adapter->flags &= ~FLAG_MSI_ENABLED;
1431 }
1432
1433 return;
1434}
1435
1436/**
1437 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1438 *
1439 * Attempt to configure interrupts using the best available
1440 * capabilities of the hardware and kernel.
1441 **/
1442void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1443{
1444 int err;
1445 int numvecs, i;
1446
1447
1448 switch (adapter->int_mode) {
1449 case E1000E_INT_MODE_MSIX:
1450 if (adapter->flags & FLAG_HAS_MSIX) {
1451 numvecs = 3; /* RxQ0, TxQ0 and other */
1452 adapter->msix_entries = kcalloc(numvecs,
1453 sizeof(struct msix_entry),
1454 GFP_KERNEL);
1455 if (adapter->msix_entries) {
1456 for (i = 0; i < numvecs; i++)
1457 adapter->msix_entries[i].entry = i;
1458
1459 err = pci_enable_msix(adapter->pdev,
1460 adapter->msix_entries,
1461 numvecs);
1462 if (err == 0)
1463 return;
1464 }
1465 /* MSI-X failed, so fall through and try MSI */
1466 e_err("Failed to initialize MSI-X interrupts. "
1467 "Falling back to MSI interrupts.\n");
1468 e1000e_reset_interrupt_capability(adapter);
1469 }
1470 adapter->int_mode = E1000E_INT_MODE_MSI;
1471 /* Fall through */
1472 case E1000E_INT_MODE_MSI:
1473 if (!pci_enable_msi(adapter->pdev)) {
1474 adapter->flags |= FLAG_MSI_ENABLED;
1475 } else {
1476 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1477 e_err("Failed to initialize MSI interrupts. Falling "
1478 "back to legacy interrupts.\n");
1479 }
1480 /* Fall through */
1481 case E1000E_INT_MODE_LEGACY:
1482 /* Don't do anything; this is the system default */
1483 break;
1484 }
1485
1486 return;
1487}
1488
1489/**
1490 * e1000_request_msix - Initialize MSI-X interrupts
1491 *
1492 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1493 * kernel.
1494 **/
1495static int e1000_request_msix(struct e1000_adapter *adapter)
1496{
1497 struct net_device *netdev = adapter->netdev;
1498 int err = 0, vector = 0;
1499
1500 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1501 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA
1502 else
1503 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1504 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1505 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA
1506 netdev);
1507 if (err)
1508 goto out;
1509 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1510 adapter->rx_ring->itr_val = adapter->itr;
1511 vector++;
1512
1513 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1514 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA
1515 else
1516 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1517 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1518 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA
1519 netdev);
1520 if (err)
1521 goto out;
1522 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1523 adapter->tx_ring->itr_val = adapter->itr;
1524 vector++;
1525
1526 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1527 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA
1528 if (err)
1529 goto out;
1530
1531 e1000_configure_msix(adapter);
1532 return 0;
1533out:
1534 return err;
1535}
1536
f8d59f78
BA
1537/**
1538 * e1000_request_irq - initialize interrupts
1539 *
1540 * Attempts to configure interrupts using the best available
1541 * capabilities of the hardware and kernel.
1542 **/
bc7f75fa
AK
1543static int e1000_request_irq(struct e1000_adapter *adapter)
1544{
1545 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
1546 int err;
1547
4662e82b
BA
1548 if (adapter->msix_entries) {
1549 err = e1000_request_msix(adapter);
1550 if (!err)
1551 return err;
1552 /* fall back to MSI */
1553 e1000e_reset_interrupt_capability(adapter);
1554 adapter->int_mode = E1000E_INT_MODE_MSI;
1555 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1556 }
4662e82b 1557 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1558 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA
1559 netdev->name, netdev);
1560 if (!err)
1561 return err;
bc7f75fa 1562
4662e82b
BA
1563 /* fall back to legacy interrupt */
1564 e1000e_reset_interrupt_capability(adapter);
1565 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
1566 }
1567
a0607fd3 1568 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA
1569 netdev->name, netdev);
1570 if (err)
1571 e_err("Unable to allocate interrupt, Error: %d\n", err);
1572
bc7f75fa
AK
1573 return err;
1574}
1575
1576static void e1000_free_irq(struct e1000_adapter *adapter)
1577{
1578 struct net_device *netdev = adapter->netdev;
1579
4662e82b
BA
1580 if (adapter->msix_entries) {
1581 int vector = 0;
1582
1583 free_irq(adapter->msix_entries[vector].vector, netdev);
1584 vector++;
1585
1586 free_irq(adapter->msix_entries[vector].vector, netdev);
1587 vector++;
1588
1589 /* Other Causes interrupt vector */
1590 free_irq(adapter->msix_entries[vector].vector, netdev);
1591 return;
bc7f75fa 1592 }
4662e82b
BA
1593
1594 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK
1595}
1596
1597/**
1598 * e1000_irq_disable - Mask off interrupt generation on the NIC
1599 **/
1600static void e1000_irq_disable(struct e1000_adapter *adapter)
1601{
1602 struct e1000_hw *hw = &adapter->hw;
1603
bc7f75fa 1604 ew32(IMC, ~0);
4662e82b
BA
1605 if (adapter->msix_entries)
1606 ew32(EIAC_82574, 0);
bc7f75fa
AK
1607 e1e_flush();
1608 synchronize_irq(adapter->pdev->irq);
1609}
1610
1611/**
1612 * e1000_irq_enable - Enable default interrupt generation settings
1613 **/
1614static void e1000_irq_enable(struct e1000_adapter *adapter)
1615{
1616 struct e1000_hw *hw = &adapter->hw;
1617
4662e82b
BA
1618 if (adapter->msix_entries) {
1619 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1620 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1621 } else {
1622 ew32(IMS, IMS_ENABLE_MASK);
1623 }
74ef9c39 1624 e1e_flush();
bc7f75fa
AK
1625}
1626
1627/**
1628 * e1000_get_hw_control - get control of the h/w from f/w
1629 * @adapter: address of board private structure
1630 *
489815ce 1631 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1632 * For ASF and Pass Through versions of f/w this means that
1633 * the driver is loaded. For AMT version (only with 82573)
1634 * of the f/w this means that the network i/f is open.
1635 **/
1636static void e1000_get_hw_control(struct e1000_adapter *adapter)
1637{
1638 struct e1000_hw *hw = &adapter->hw;
1639 u32 ctrl_ext;
1640 u32 swsm;
1641
1642 /* Let firmware know the driver has taken over */
1643 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1644 swsm = er32(SWSM);
1645 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1646 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1647 ctrl_ext = er32(CTRL_EXT);
ad68076e 1648 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1649 }
1650}
1651
1652/**
1653 * e1000_release_hw_control - release control of the h/w to f/w
1654 * @adapter: address of board private structure
1655 *
489815ce 1656 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1657 * For ASF and Pass Through versions of f/w this means that the
1658 * driver is no longer loaded. For AMT version (only with 82573) i
1659 * of the f/w this means that the network i/f is closed.
1660 *
1661 **/
1662static void e1000_release_hw_control(struct e1000_adapter *adapter)
1663{
1664 struct e1000_hw *hw = &adapter->hw;
1665 u32 ctrl_ext;
1666 u32 swsm;
1667
1668 /* Let firmware taken over control of h/w */
1669 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1670 swsm = er32(SWSM);
1671 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1672 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1673 ctrl_ext = er32(CTRL_EXT);
ad68076e 1674 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1675 }
1676}
1677
bc7f75fa
AK
1678/**
1679 * @e1000_alloc_ring - allocate memory for a ring structure
1680 **/
1681static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1682 struct e1000_ring *ring)
1683{
1684 struct pci_dev *pdev = adapter->pdev;
1685
1686 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1687 GFP_KERNEL);
1688 if (!ring->desc)
1689 return -ENOMEM;
1690
1691 return 0;
1692}
1693
1694/**
1695 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1696 * @adapter: board private structure
1697 *
1698 * Return 0 on success, negative on failure
1699 **/
1700int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1701{
1702 struct e1000_ring *tx_ring = adapter->tx_ring;
1703 int err = -ENOMEM, size;
1704
1705 size = sizeof(struct e1000_buffer) * tx_ring->count;
1706 tx_ring->buffer_info = vmalloc(size);
1707 if (!tx_ring->buffer_info)
1708 goto err;
1709 memset(tx_ring->buffer_info, 0, size);
1710
1711 /* round up to nearest 4K */
1712 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1713 tx_ring->size = ALIGN(tx_ring->size, 4096);
1714
1715 err = e1000_alloc_ring_dma(adapter, tx_ring);
1716 if (err)
1717 goto err;
1718
1719 tx_ring->next_to_use = 0;
1720 tx_ring->next_to_clean = 0;
bc7f75fa
AK
1721
1722 return 0;
1723err:
1724 vfree(tx_ring->buffer_info);
44defeb3 1725 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1726 return err;
1727}
1728
1729/**
1730 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1731 * @adapter: board private structure
1732 *
1733 * Returns 0 on success, negative on failure
1734 **/
1735int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1736{
1737 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK
1738 struct e1000_buffer *buffer_info;
1739 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK
1740
1741 size = sizeof(struct e1000_buffer) * rx_ring->count;
1742 rx_ring->buffer_info = vmalloc(size);
1743 if (!rx_ring->buffer_info)
1744 goto err;
1745 memset(rx_ring->buffer_info, 0, size);
1746
47f44e40
AK
1747 for (i = 0; i < rx_ring->count; i++) {
1748 buffer_info = &rx_ring->buffer_info[i];
1749 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1750 sizeof(struct e1000_ps_page),
1751 GFP_KERNEL);
1752 if (!buffer_info->ps_pages)
1753 goto err_pages;
1754 }
bc7f75fa
AK
1755
1756 desc_len = sizeof(union e1000_rx_desc_packet_split);
1757
1758 /* Round up to nearest 4K */
1759 rx_ring->size = rx_ring->count * desc_len;
1760 rx_ring->size = ALIGN(rx_ring->size, 4096);
1761
1762 err = e1000_alloc_ring_dma(adapter, rx_ring);
1763 if (err)
47f44e40 1764 goto err_pages;
bc7f75fa
AK
1765
1766 rx_ring->next_to_clean = 0;
1767 rx_ring->next_to_use = 0;
1768 rx_ring->rx_skb_top = NULL;
1769
1770 return 0;
47f44e40
AK
1771
1772err_pages:
1773 for (i = 0; i < rx_ring->count; i++) {
1774 buffer_info = &rx_ring->buffer_info[i];
1775 kfree(buffer_info->ps_pages);
1776 }
bc7f75fa
AK
1777err:
1778 vfree(rx_ring->buffer_info);
44defeb3 1779 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
1780 return err;
1781}
1782
1783/**
1784 * e1000_clean_tx_ring - Free Tx Buffers
1785 * @adapter: board private structure
1786 **/
1787static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1788{
1789 struct e1000_ring *tx_ring = adapter->tx_ring;
1790 struct e1000_buffer *buffer_info;
1791 unsigned long size;
1792 unsigned int i;
1793
1794 for (i = 0; i < tx_ring->count; i++) {
1795 buffer_info = &tx_ring->buffer_info[i];
1796 e1000_put_txbuf(adapter, buffer_info);
1797 }
1798
1799 size = sizeof(struct e1000_buffer) * tx_ring->count;
1800 memset(tx_ring->buffer_info, 0, size);
1801
1802 memset(tx_ring->desc, 0, tx_ring->size);
1803
1804 tx_ring->next_to_use = 0;
1805 tx_ring->next_to_clean = 0;
1806
1807 writel(0, adapter->hw.hw_addr + tx_ring->head);
1808 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1809}
1810
1811/**
1812 * e1000e_free_tx_resources - Free Tx Resources per Queue
1813 * @adapter: board private structure
1814 *
1815 * Free all transmit software resources
1816 **/
1817void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1818{
1819 struct pci_dev *pdev = adapter->pdev;
1820 struct e1000_ring *tx_ring = adapter->tx_ring;
1821
1822 e1000_clean_tx_ring(adapter);
1823
1824 vfree(tx_ring->buffer_info);
1825 tx_ring->buffer_info = NULL;
1826
1827 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1828 tx_ring->dma);
1829 tx_ring->desc = NULL;
1830}
1831
1832/**
1833 * e1000e_free_rx_resources - Free Rx Resources
1834 * @adapter: board private structure
1835 *
1836 * Free all receive software resources
1837 **/
1838
1839void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1840{
1841 struct pci_dev *pdev = adapter->pdev;
1842 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1843 int i;
bc7f75fa
AK
1844
1845 e1000_clean_rx_ring(adapter);
1846
47f44e40
AK
1847 for (i = 0; i < rx_ring->count; i++) {
1848 kfree(rx_ring->buffer_info[i].ps_pages);
1849 }
1850
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1851 vfree(rx_ring->buffer_info);
1852 rx_ring->buffer_info = NULL;
1853
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AK
1854 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1855 rx_ring->dma);
1856 rx_ring->desc = NULL;
1857}
1858
1859/**
1860 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK
1861 * @adapter: pointer to adapter
1862 * @itr_setting: current adapter->itr
1863 * @packets: the number of packets during this measurement interval
1864 * @bytes: the number of bytes during this measurement interval
1865 *
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1866 * Stores a new ITR value based on packets and byte
1867 * counts during the last interrupt. The advantage of per interrupt
1868 * computation is faster updates and more accurate ITR for the current
1869 * traffic pattern. Constants in this function were computed
1870 * based on theoretical maximum wire speed and thresholds were set based
1871 * on testing data as well as attempting to minimize response time
4662e82b
BA
1872 * while increasing bulk throughput. This functionality is controlled
1873 * by the InterruptThrottleRate module parameter.
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1874 **/
1875static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1876 u16 itr_setting, int packets,
1877 int bytes)
1878{
1879 unsigned int retval = itr_setting;
1880
1881 if (packets == 0)
1882 goto update_itr_done;
1883
1884 switch (itr_setting) {
1885 case lowest_latency:
1886 /* handle TSO and jumbo frames */
1887 if (bytes/packets > 8000)
1888 retval = bulk_latency;
1889 else if ((packets < 5) && (bytes > 512)) {
1890 retval = low_latency;
1891 }
1892 break;
1893 case low_latency: /* 50 usec aka 20000 ints/s */
1894 if (bytes > 10000) {
1895 /* this if handles the TSO accounting */
1896 if (bytes/packets > 8000) {
1897 retval = bulk_latency;
1898 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1899 retval = bulk_latency;
1900 } else if ((packets > 35)) {
1901 retval = lowest_latency;
1902 }
1903 } else if (bytes/packets > 2000) {
1904 retval = bulk_latency;
1905 } else if (packets <= 2 && bytes < 512) {
1906 retval = lowest_latency;
1907 }
1908 break;
1909 case bulk_latency: /* 250 usec aka 4000 ints/s */
1910 if (bytes > 25000) {
1911 if (packets > 35) {
1912 retval = low_latency;
1913 }
1914 } else if (bytes < 6000) {
1915 retval = low_latency;
1916 }
1917 break;
1918 }
1919
1920update_itr_done:
1921 return retval;
1922}
1923
1924static void e1000_set_itr(struct e1000_adapter *adapter)
1925{
1926 struct e1000_hw *hw = &adapter->hw;
1927 u16 current_itr;
1928 u32 new_itr = adapter->itr;
1929
1930 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1931 if (adapter->link_speed != SPEED_1000) {
1932 current_itr = 0;
1933 new_itr = 4000;
1934 goto set_itr_now;
1935 }
1936
1937 adapter->tx_itr = e1000_update_itr(adapter,
1938 adapter->tx_itr,
1939 adapter->total_tx_packets,
1940 adapter->total_tx_bytes);
1941 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1942 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1943 adapter->tx_itr = low_latency;
1944
1945 adapter->rx_itr = e1000_update_itr(adapter,
1946 adapter->rx_itr,
1947 adapter->total_rx_packets,
1948 adapter->total_rx_bytes);
1949 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1950 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1951 adapter->rx_itr = low_latency;
1952
1953 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1954
1955 switch (current_itr) {
1956 /* counts and packets in update_itr are dependent on these numbers */
1957 case lowest_latency:
1958 new_itr = 70000;
1959 break;
1960 case low_latency:
1961 new_itr = 20000; /* aka hwitr = ~200 */
1962 break;
1963 case bulk_latency:
1964 new_itr = 4000;
1965 break;
1966 default:
1967 break;
1968 }
1969
1970set_itr_now:
1971 if (new_itr != adapter->itr) {
ad68076e
BA
1972 /*
1973 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1974 * by adding intermediate steps when interrupt rate is
ad68076e
BA
1975 * increasing
1976 */
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1977 new_itr = new_itr > adapter->itr ?
1978 min(adapter->itr + (new_itr >> 2), new_itr) :
1979 new_itr;
1980 adapter->itr = new_itr;
4662e82b
BA
1981 adapter->rx_ring->itr_val = new_itr;
1982 if (adapter->msix_entries)
1983 adapter->rx_ring->set_itr = 1;
1984 else
1985 ew32(ITR, 1000000000 / (new_itr * 256));
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AK
1986 }
1987}
1988
4662e82b
BA
1989/**
1990 * e1000_alloc_queues - Allocate memory for all rings
1991 * @adapter: board private structure to initialize
1992 **/
1993static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1994{
1995 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1996 if (!adapter->tx_ring)
1997 goto err;
1998
1999 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2000 if (!adapter->rx_ring)
2001 goto err;
2002
2003 return 0;
2004err:
2005 e_err("Unable to allocate memory for queues\n");
2006 kfree(adapter->rx_ring);
2007 kfree(adapter->tx_ring);
2008 return -ENOMEM;
2009}
2010
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2011/**
2012 * e1000_clean - NAPI Rx polling callback
ad68076e 2013 * @napi: struct associated with this polling callback
489815ce 2014 * @budget: amount of packets driver is allowed to process this poll
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2015 **/
2016static int e1000_clean(struct napi_struct *napi, int budget)
2017{
2018 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2019 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2020 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2021 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2022
4cf1653a 2023 adapter = netdev_priv(poll_dev);
bc7f75fa 2024
4662e82b
BA
2025 if (adapter->msix_entries &&
2026 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2027 goto clean_rx;
2028
92af3e95 2029 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2030
4662e82b 2031clean_rx:
bc7f75fa 2032 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2033
12d04a3c 2034 if (!tx_cleaned)
d2c7ddd6 2035 work_done = budget;
bc7f75fa 2036
53e52c72
DM
2037 /* If budget not fully consumed, exit the polling mode */
2038 if (work_done < budget) {
bc7f75fa
AK
2039 if (adapter->itr_setting & 3)
2040 e1000_set_itr(adapter);
288379f0 2041 napi_complete(napi);
a3c69fef
JB
2042 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2043 if (adapter->msix_entries)
2044 ew32(IMS, adapter->rx_ring->ims_val);
2045 else
2046 e1000_irq_enable(adapter);
2047 }
bc7f75fa
AK
2048 }
2049
2050 return work_done;
2051}
2052
2053static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2054{
2055 struct e1000_adapter *adapter = netdev_priv(netdev);
2056 struct e1000_hw *hw = &adapter->hw;
2057 u32 vfta, index;
2058
2059 /* don't update vlan cookie if already programmed */
2060 if ((adapter->hw.mng_cookie.status &
2061 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2062 (vid == adapter->mng_vlan_id))
2063 return;
caaddaf8 2064
bc7f75fa 2065 /* add VID to filter table */
caaddaf8
BA
2066 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2067 index = (vid >> 5) & 0x7F;
2068 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2069 vfta |= (1 << (vid & 0x1F));
2070 hw->mac.ops.write_vfta(hw, index, vfta);
2071 }
bc7f75fa
AK
2072}
2073
2074static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2075{
2076 struct e1000_adapter *adapter = netdev_priv(netdev);
2077 struct e1000_hw *hw = &adapter->hw;
2078 u32 vfta, index;
2079
74ef9c39
JB
2080 if (!test_bit(__E1000_DOWN, &adapter->state))
2081 e1000_irq_disable(adapter);
bc7f75fa 2082 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
2083
2084 if (!test_bit(__E1000_DOWN, &adapter->state))
2085 e1000_irq_enable(adapter);
bc7f75fa
AK
2086
2087 if ((adapter->hw.mng_cookie.status &
2088 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2089 (vid == adapter->mng_vlan_id)) {
2090 /* release control to f/w */
2091 e1000_release_hw_control(adapter);
2092 return;
2093 }
2094
2095 /* remove VID from filter table */
caaddaf8
BA
2096 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2097 index = (vid >> 5) & 0x7F;
2098 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2099 vfta &= ~(1 << (vid & 0x1F));
2100 hw->mac.ops.write_vfta(hw, index, vfta);
2101 }
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AK
2102}
2103
2104static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2105{
2106 struct net_device *netdev = adapter->netdev;
2107 u16 vid = adapter->hw.mng_cookie.vlan_id;
2108 u16 old_vid = adapter->mng_vlan_id;
2109
2110 if (!adapter->vlgrp)
2111 return;
2112
2113 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2114 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2115 if (adapter->hw.mng_cookie.status &
2116 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2117 e1000_vlan_rx_add_vid(netdev, vid);
2118 adapter->mng_vlan_id = vid;
2119 }
2120
2121 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2122 (vid != old_vid) &&
2123 !vlan_group_get_device(adapter->vlgrp, old_vid))
2124 e1000_vlan_rx_kill_vid(netdev, old_vid);
2125 } else {
2126 adapter->mng_vlan_id = vid;
2127 }
2128}
2129
2130
2131static void e1000_vlan_rx_register(struct net_device *netdev,
2132 struct vlan_group *grp)
2133{
2134 struct e1000_adapter *adapter = netdev_priv(netdev);
2135 struct e1000_hw *hw = &adapter->hw;
2136 u32 ctrl, rctl;
2137
74ef9c39
JB
2138 if (!test_bit(__E1000_DOWN, &adapter->state))
2139 e1000_irq_disable(adapter);
bc7f75fa
AK
2140 adapter->vlgrp = grp;
2141
2142 if (grp) {
2143 /* enable VLAN tag insert/strip */
2144 ctrl = er32(CTRL);
2145 ctrl |= E1000_CTRL_VME;
2146 ew32(CTRL, ctrl);
2147
2148 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2149 /* enable VLAN receive filtering */
2150 rctl = er32(RCTL);
bc7f75fa
AK
2151 rctl &= ~E1000_RCTL_CFIEN;
2152 ew32(RCTL, rctl);
2153 e1000_update_mng_vlan(adapter);
2154 }
2155 } else {
2156 /* disable VLAN tag insert/strip */
2157 ctrl = er32(CTRL);
2158 ctrl &= ~E1000_CTRL_VME;
2159 ew32(CTRL, ctrl);
2160
2161 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
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AK
2162 if (adapter->mng_vlan_id !=
2163 (u16)E1000_MNG_VLAN_NONE) {
2164 e1000_vlan_rx_kill_vid(netdev,
2165 adapter->mng_vlan_id);
2166 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2167 }
2168 }
2169 }
2170
74ef9c39
JB
2171 if (!test_bit(__E1000_DOWN, &adapter->state))
2172 e1000_irq_enable(adapter);
bc7f75fa
AK
2173}
2174
2175static void e1000_restore_vlan(struct e1000_adapter *adapter)
2176{
2177 u16 vid;
2178
2179 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2180
2181 if (!adapter->vlgrp)
2182 return;
2183
2184 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2185 if (!vlan_group_get_device(adapter->vlgrp, vid))
2186 continue;
2187 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2188 }
2189}
2190
2191static void e1000_init_manageability(struct e1000_adapter *adapter)
2192{
2193 struct e1000_hw *hw = &adapter->hw;
2194 u32 manc, manc2h;
2195
2196 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2197 return;
2198
2199 manc = er32(MANC);
2200
ad68076e
BA
2201 /*
2202 * enable receiving management packets to the host. this will probably
bc7f75fa 2203 * generate destination unreachable messages from the host OS, but
ad68076e
BA
2204 * the packets will be handled on SMBUS
2205 */
bc7f75fa
AK
2206 manc |= E1000_MANC_EN_MNG2HOST;
2207 manc2h = er32(MANC2H);
2208#define E1000_MNG2HOST_PORT_623 (1 << 5)
2209#define E1000_MNG2HOST_PORT_664 (1 << 6)
2210 manc2h |= E1000_MNG2HOST_PORT_623;
2211 manc2h |= E1000_MNG2HOST_PORT_664;
2212 ew32(MANC2H, manc2h);
2213 ew32(MANC, manc);
2214}
2215
2216/**
2217 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2218 * @adapter: board private structure
2219 *
2220 * Configure the Tx unit of the MAC after a reset.
2221 **/
2222static void e1000_configure_tx(struct e1000_adapter *adapter)
2223{
2224 struct e1000_hw *hw = &adapter->hw;
2225 struct e1000_ring *tx_ring = adapter->tx_ring;
2226 u64 tdba;
2227 u32 tdlen, tctl, tipg, tarc;
2228 u32 ipgr1, ipgr2;
2229
2230 /* Setup the HW Tx Head and Tail descriptor pointers */
2231 tdba = tx_ring->dma;
2232 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2233 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2234 ew32(TDBAH, (tdba >> 32));
2235 ew32(TDLEN, tdlen);
2236 ew32(TDH, 0);
2237 ew32(TDT, 0);
2238 tx_ring->head = E1000_TDH;
2239 tx_ring->tail = E1000_TDT;
2240
2241 /* Set the default values for the Tx Inter Packet Gap timer */
2242 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2243 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2244 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2245
2246 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2247 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2248
2249 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2250 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2251 ew32(TIPG, tipg);
2252
2253 /* Set the Tx Interrupt Delay register */
2254 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2255 /* Tx irq moderation */
bc7f75fa
AK
2256 ew32(TADV, adapter->tx_abs_int_delay);
2257
2258 /* Program the Transmit Control Register */
2259 tctl = er32(TCTL);
2260 tctl &= ~E1000_TCTL_CT;
2261 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2262 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2263
2264 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2265 tarc = er32(TARC(0));
ad68076e
BA
2266 /*
2267 * set the speed mode bit, we'll clear it if we're not at
2268 * gigabit link later
2269 */
bc7f75fa
AK
2270#define SPEED_MODE_BIT (1 << 21)
2271 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2272 ew32(TARC(0), tarc);
bc7f75fa
AK
2273 }
2274
2275 /* errata: program both queues to unweighted RR */
2276 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2277 tarc = er32(TARC(0));
bc7f75fa 2278 tarc |= 1;
e9ec2c0f
JK
2279 ew32(TARC(0), tarc);
2280 tarc = er32(TARC(1));
bc7f75fa 2281 tarc |= 1;
e9ec2c0f 2282 ew32(TARC(1), tarc);
bc7f75fa
AK
2283 }
2284
bc7f75fa
AK
2285 /* Setup Transmit Descriptor Settings for eop descriptor */
2286 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2287
2288 /* only set IDE if we are delaying interrupts using the timers */
2289 if (adapter->tx_int_delay)
2290 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2291
2292 /* enable Report Status bit */
2293 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2294
2295 ew32(TCTL, tctl);
2296
edfea6e6 2297 e1000e_config_collision_dist(hw);
bc7f75fa
AK
2298}
2299
2300/**
2301 * e1000_setup_rctl - configure the receive control registers
2302 * @adapter: Board private structure
2303 **/
2304#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2305 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2306static void e1000_setup_rctl(struct e1000_adapter *adapter)
2307{
2308 struct e1000_hw *hw = &adapter->hw;
2309 u32 rctl, rfctl;
2310 u32 psrctl = 0;
2311 u32 pages = 0;
2312
2313 /* Program MC offset vector base */
2314 rctl = er32(RCTL);
2315 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2316 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2317 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2318 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2319
2320 /* Do not Store bad packets */
2321 rctl &= ~E1000_RCTL_SBP;
2322
2323 /* Enable Long Packet receive */
2324 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2325 rctl &= ~E1000_RCTL_LPE;
2326 else
2327 rctl |= E1000_RCTL_LPE;
2328
eb7c3adb
JK
2329 /* Some systems expect that the CRC is included in SMBUS traffic. The
2330 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2331 * host memory when this is enabled
2332 */
2333 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2334 rctl |= E1000_RCTL_SECRC;
5918bd88 2335
a4f58f54
BA
2336 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2337 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2338 u16 phy_data;
2339
2340 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2341 phy_data &= 0xfff8;
2342 phy_data |= (1 << 2);
2343 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2344
2345 e1e_rphy(hw, 22, &phy_data);
2346 phy_data &= 0x0fff;
2347 phy_data |= (1 << 14);
2348 e1e_wphy(hw, 0x10, 0x2823);
2349 e1e_wphy(hw, 0x11, 0x0003);
2350 e1e_wphy(hw, 22, phy_data);
2351 }
2352
bc7f75fa
AK
2353 /* Setup buffer sizes */
2354 rctl &= ~E1000_RCTL_SZ_4096;
2355 rctl |= E1000_RCTL_BSEX;
2356 switch (adapter->rx_buffer_len) {
bc7f75fa
AK
2357 case 2048:
2358 default:
2359 rctl |= E1000_RCTL_SZ_2048;
2360 rctl &= ~E1000_RCTL_BSEX;
2361 break;
2362 case 4096:
2363 rctl |= E1000_RCTL_SZ_4096;
2364 break;
2365 case 8192:
2366 rctl |= E1000_RCTL_SZ_8192;
2367 break;
2368 case 16384:
2369 rctl |= E1000_RCTL_SZ_16384;
2370 break;
2371 }
2372
2373 /*
2374 * 82571 and greater support packet-split where the protocol
2375 * header is placed in skb->data and the packet data is
2376 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2377 * In the case of a non-split, skb->data is linearly filled,
2378 * followed by the page buffers. Therefore, skb->data is
2379 * sized to hold the largest protocol header.
2380 *
2381 * allocations using alloc_page take too long for regular MTU
2382 * so only enable packet split for jumbo frames
2383 *
2384 * Using pages when the page size is greater than 16k wastes
2385 * a lot of memory, since we allocate 3 pages at all times
2386 * per packet.
2387 */
bc7f75fa 2388 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA
2389 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2390 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2391 adapter->rx_ps_pages = pages;
97ac8cae
BA
2392 else
2393 adapter->rx_ps_pages = 0;
bc7f75fa
AK
2394
2395 if (adapter->rx_ps_pages) {
2396 /* Configure extra packet-split registers */
2397 rfctl = er32(RFCTL);
2398 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA
2399 /*
2400 * disable packet split support for IPv6 extension headers,
2401 * because some malformed IPv6 headers can hang the Rx
2402 */
bc7f75fa
AK
2403 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2404 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2405
2406 ew32(RFCTL, rfctl);
2407
140a7480
AK
2408 /* Enable Packet split descriptors */
2409 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK
2410
2411 psrctl |= adapter->rx_ps_bsize0 >>
2412 E1000_PSRCTL_BSIZE0_SHIFT;
2413
2414 switch (adapter->rx_ps_pages) {
2415 case 3:
2416 psrctl |= PAGE_SIZE <<
2417 E1000_PSRCTL_BSIZE3_SHIFT;
2418 case 2:
2419 psrctl |= PAGE_SIZE <<
2420 E1000_PSRCTL_BSIZE2_SHIFT;
2421 case 1:
2422 psrctl |= PAGE_SIZE >>
2423 E1000_PSRCTL_BSIZE1_SHIFT;
2424 break;
2425 }
2426
2427 ew32(PSRCTL, psrctl);
2428 }
2429
2430 ew32(RCTL, rctl);
318a94d6
JK
2431 /* just started the receive unit, no need to restart */
2432 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK
2433}
2434
2435/**
2436 * e1000_configure_rx - Configure Receive Unit after Reset
2437 * @adapter: board private structure
2438 *
2439 * Configure the Rx unit of the MAC after a reset.
2440 **/
2441static void e1000_configure_rx(struct e1000_adapter *adapter)
2442{
2443 struct e1000_hw *hw = &adapter->hw;
2444 struct e1000_ring *rx_ring = adapter->rx_ring;
2445 u64 rdba;
2446 u32 rdlen, rctl, rxcsum, ctrl_ext;
2447
2448 if (adapter->rx_ps_pages) {
2449 /* this is a 32 byte descriptor */
2450 rdlen = rx_ring->count *
2451 sizeof(union e1000_rx_desc_packet_split);
2452 adapter->clean_rx = e1000_clean_rx_irq_ps;
2453 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2454 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2455 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2456 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2457 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2458 } else {
97ac8cae 2459 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK
2460 adapter->clean_rx = e1000_clean_rx_irq;
2461 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2462 }
2463
2464 /* disable receives while setting up the descriptors */
2465 rctl = er32(RCTL);
2466 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2467 e1e_flush();
2468 msleep(10);
2469
2470 /* set the Receive Delay Timer Register */
2471 ew32(RDTR, adapter->rx_int_delay);
2472
2473 /* irq moderation */
2474 ew32(RADV, adapter->rx_abs_int_delay);
2475 if (adapter->itr_setting != 0)
ad68076e 2476 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK
2477
2478 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK
2479 /* Auto-Mask interrupts upon ICR access */
2480 ctrl_ext |= E1000_CTRL_EXT_IAME;
2481 ew32(IAM, 0xffffffff);
2482 ew32(CTRL_EXT, ctrl_ext);
2483 e1e_flush();
2484
ad68076e
BA
2485 /*
2486 * Setup the HW Rx Head and Tail Descriptor Pointers and
2487 * the Base and Length of the Rx Descriptor Ring
2488 */
bc7f75fa 2489 rdba = rx_ring->dma;
284901a9 2490 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2491 ew32(RDBAH, (rdba >> 32));
2492 ew32(RDLEN, rdlen);
2493 ew32(RDH, 0);
2494 ew32(RDT, 0);
2495 rx_ring->head = E1000_RDH;
2496 rx_ring->tail = E1000_RDT;
2497
2498 /* Enable Receive Checksum Offload for TCP and UDP */
2499 rxcsum = er32(RXCSUM);
2500 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2501 rxcsum |= E1000_RXCSUM_TUOFL;
2502
ad68076e
BA
2503 /*
2504 * IPv4 payload checksum for UDP fragments must be
2505 * used in conjunction with packet-split.
2506 */
bc7f75fa
AK
2507 if (adapter->rx_ps_pages)
2508 rxcsum |= E1000_RXCSUM_IPPCSE;
2509 } else {
2510 rxcsum &= ~E1000_RXCSUM_TUOFL;
2511 /* no need to clear IPPCSE as it defaults to 0 */
2512 }
2513 ew32(RXCSUM, rxcsum);
2514
ad68076e
BA
2515 /*
2516 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2517 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2518 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2519 */
53ec5498
BA
2520 if (adapter->flags & FLAG_HAS_ERT) {
2521 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2522 u32 rxdctl = er32(RXDCTL(0));
2523 ew32(RXDCTL(0), rxdctl | 0x3);
2524 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2525 /*
2526 * With jumbo frames and early-receive enabled,
2527 * excessive C-state transition latencies result in
2528 * dropped transactions.
2529 */
2530 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2531 adapter->netdev->name, 55);
2532 } else {
2533 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2534 adapter->netdev->name,
2535 PM_QOS_DEFAULT_VALUE);
2536 }
97ac8cae 2537 }
bc7f75fa
AK
2538
2539 /* Enable Receives */
2540 ew32(RCTL, rctl);
2541}
2542
2543/**
e2de3eb6 2544 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK
2545 * @hw: pointer to the HW structure
2546 * @mc_addr_list: array of multicast addresses to program
2547 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2548 *
ab8932f3 2549 * Updates the Multicast Table Array.
bc7f75fa 2550 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2551 **/
e2de3eb6 2552static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2553 u32 mc_addr_count)
bc7f75fa 2554{
ab8932f3 2555 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK
2556}
2557
2558/**
2559 * e1000_set_multi - Multicast and Promiscuous mode set
2560 * @netdev: network interface device structure
2561 *
2562 * The set_multi entry point is called whenever the multicast address
2563 * list or the network interface flags are updated. This routine is
2564 * responsible for configuring the hardware for proper multicast,
2565 * promiscuous mode, and all-multi behavior.
2566 **/
2567static void e1000_set_multi(struct net_device *netdev)
2568{
2569 struct e1000_adapter *adapter = netdev_priv(netdev);
2570 struct e1000_hw *hw = &adapter->hw;
22bedad3 2571 struct netdev_hw_addr *ha;
bc7f75fa
AK
2572 u8 *mta_list;
2573 u32 rctl;
2574 int i;
2575
2576 /* Check for Promiscuous and All Multicast modes */
2577
2578 rctl = er32(RCTL);
2579
2580 if (netdev->flags & IFF_PROMISC) {
2581 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2582 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2583 } else {
746b9f02
PM
2584 if (netdev->flags & IFF_ALLMULTI) {
2585 rctl |= E1000_RCTL_MPE;
2586 rctl &= ~E1000_RCTL_UPE;
2587 } else {
2588 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2589 }
78ed11a5 2590 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2591 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK
2592 }
2593
2594 ew32(RCTL, rctl);
2595
7aeef972
JP
2596 if (!netdev_mc_empty(netdev)) {
2597 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK
2598 if (!mta_list)
2599 return;
2600
2601 /* prepare a packed array of only addresses. */
7aeef972 2602 i = 0;
22bedad3
JP
2603 netdev_for_each_mc_addr(ha, netdev)
2604 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2605
ab8932f3 2606 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK
2607 kfree(mta_list);
2608 } else {
2609 /*
2610 * if we're called from probe, we might not have
2611 * anything to do here, so clear out the list
2612 */
ab8932f3 2613 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK
2614 }
2615}
2616
2617/**
ad68076e 2618 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK
2619 * @adapter: private board structure
2620 **/
2621static void e1000_configure(struct e1000_adapter *adapter)
2622{
2623 e1000_set_multi(adapter->netdev);
2624
2625 e1000_restore_vlan(adapter);
2626 e1000_init_manageability(adapter);
2627
2628 e1000_configure_tx(adapter);
2629 e1000_setup_rctl(adapter);
2630 e1000_configure_rx(adapter);
ad68076e 2631 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK
2632}
2633
2634/**
2635 * e1000e_power_up_phy - restore link in case the phy was powered down
2636 * @adapter: address of board private structure
2637 *
2638 * The phy may be powered down to save power and turn off link when the
2639 * driver is unloaded and wake on lan is not enabled (among others)
2640 * *** this routine MUST be followed by a call to e1000e_reset ***
2641 **/
2642void e1000e_power_up_phy(struct e1000_adapter *adapter)
2643{
17f208de
BA
2644 if (adapter->hw.phy.ops.power_up)
2645 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK
2646
2647 adapter->hw.mac.ops.setup_link(&adapter->hw);
2648}
2649
2650/**
2651 * e1000_power_down_phy - Power down the PHY
2652 *
17f208de
BA
2653 * Power down the PHY so no link is implied when interface is down.
2654 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK
2655 */
2656static void e1000_power_down_phy(struct e1000_adapter *adapter)
2657{
bc7f75fa 2658 /* WoL is enabled */
23b66e2b 2659 if (adapter->wol)
bc7f75fa
AK
2660 return;
2661
17f208de
BA
2662 if (adapter->hw.phy.ops.power_down)
2663 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK
2664}
2665
2666/**
2667 * e1000e_reset - bring the hardware into a known good state
2668 *
2669 * This function boots the hardware and enables some settings that
2670 * require a configuration cycle of the hardware - those cannot be
2671 * set/changed during runtime. After reset the device needs to be
ad68076e 2672 * properly configured for Rx, Tx etc.
bc7f75fa
AK
2673 */
2674void e1000e_reset(struct e1000_adapter *adapter)
2675{
2676 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2677 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK
2678 struct e1000_hw *hw = &adapter->hw;
2679 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2680 u32 pba = adapter->pba;
bc7f75fa
AK
2681 u16 hwm;
2682
ad68076e 2683 /* reset Packet Buffer Allocation to default */
318a94d6 2684 ew32(PBA, pba);
df762464 2685
318a94d6 2686 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
2687 /*
2688 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK
2689 * large enough to accommodate two full transmit packets,
2690 * rounded up to the next 1KB and expressed in KB. Likewise,
2691 * the Rx FIFO should be large enough to accommodate at least
2692 * one full receive packet and is similarly rounded up and
ad68076e
BA
2693 * expressed in KB.
2694 */
df762464 2695 pba = er32(PBA);
bc7f75fa 2696 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2697 tx_space = pba >> 16;
bc7f75fa 2698 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2699 pba &= 0xffff;
ad68076e
BA
2700 /*
2701 * the Tx fifo also stores 16 bytes of information about the tx
2702 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
2703 */
2704 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK
2705 sizeof(struct e1000_tx_desc) -
2706 ETH_FCS_LEN) * 2;
2707 min_tx_space = ALIGN(min_tx_space, 1024);
2708 min_tx_space >>= 10;
2709 /* software strips receive CRC, so leave room for it */
318a94d6 2710 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK
2711 min_rx_space = ALIGN(min_rx_space, 1024);
2712 min_rx_space >>= 10;
2713
ad68076e
BA
2714 /*
2715 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2716 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
2717 * allocation, take space away from current Rx allocation
2718 */
df762464
AK
2719 if ((tx_space < min_tx_space) &&
2720 ((min_tx_space - tx_space) < pba)) {
2721 pba -= min_tx_space - tx_space;
bc7f75fa 2722
ad68076e
BA
2723 /*
2724 * if short on Rx space, Rx wins and must trump tx
2725 * adjustment or use Early Receive if available
2726 */
df762464 2727 if ((pba < min_rx_space) &&
bc7f75fa
AK
2728 (!(adapter->flags & FLAG_HAS_ERT)))
2729 /* ERT enabled in e1000_configure_rx */
df762464 2730 pba = min_rx_space;
bc7f75fa 2731 }
df762464
AK
2732
2733 ew32(PBA, pba);
bc7f75fa
AK
2734 }
2735
bc7f75fa 2736
ad68076e
BA
2737 /*
2738 * flow control settings
2739 *
38eb394e 2740 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK
2741 * (or the size used for early receive) above it in the Rx FIFO.
2742 * Set it to the lower of:
2743 * - 90% of the Rx FIFO size, and
2744 * - the full Rx FIFO size minus the early receive size (for parts
2745 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2746 * - the full Rx FIFO size minus one full frame
ad68076e 2747 */
38eb394e
BA
2748 if (hw->mac.type == e1000_pchlan) {
2749 /*
2750 * Workaround PCH LOM adapter hangs with certain network
2751 * loads. If hangs persist, try disabling Tx flow control.
2752 */
2753 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2754 fc->high_water = 0x3500;
2755 fc->low_water = 0x1500;
2756 } else {
2757 fc->high_water = 0x5000;
2758 fc->low_water = 0x3000;
2759 }
2760 } else {
2761 if ((adapter->flags & FLAG_HAS_ERT) &&
2762 (adapter->netdev->mtu > ETH_DATA_LEN))
2763 hwm = min(((pba << 10) * 9 / 10),
2764 ((pba << 10) - (E1000_ERT_2048 << 3)));
2765 else
2766 hwm = min(((pba << 10) * 9 / 10),
2767 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2768
38eb394e
BA
2769 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2770 fc->low_water = fc->high_water - 8;
2771 }
bc7f75fa
AK
2772
2773 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2774 fc->pause_time = 0xFFFF;
bc7f75fa 2775 else
318a94d6
JK
2776 fc->pause_time = E1000_FC_PAUSE_TIME;
2777 fc->send_xon = 1;
5c48ef3e 2778 fc->current_mode = fc->requested_mode;
bc7f75fa
AK
2779
2780 /* Allow time for pending master requests to run */
2781 mac->ops.reset_hw(hw);
97ac8cae
BA
2782
2783 /*
2784 * For parts with AMT enabled, let the firmware know
2785 * that the network interface is in control
2786 */
c43bc57e 2787 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
2788 e1000_get_hw_control(adapter);
2789
bc7f75fa 2790 ew32(WUC, 0);
a4f58f54
BA
2791 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2792 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK
2793
2794 if (mac->ops.init_hw(hw))
44defeb3 2795 e_err("Hardware Error\n");
bc7f75fa 2796
38eb394e
BA
2797 /* additional part of the flow-control workaround above */
2798 if (hw->mac.type == e1000_pchlan)
2799 ew32(FCRTV_PCH, 0x1000);
2800
bc7f75fa
AK
2801 e1000_update_mng_vlan(adapter);
2802
2803 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2804 ew32(VET, ETH_P_8021Q);
2805
2806 e1000e_reset_adaptive(hw);
2807 e1000_get_phy_info(hw);
2808
918d7197
BA
2809 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2810 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2811 u16 phy_data = 0;
ad68076e
BA
2812 /*
2813 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2814 * the return value of this function because there is nothing
ad68076e
BA
2815 * different we would do if it failed
2816 */
bc7f75fa
AK
2817 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2818 phy_data &= ~IGP02E1000_PM_SPD;
2819 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2820 }
bc7f75fa
AK
2821}
2822
2823int e1000e_up(struct e1000_adapter *adapter)
2824{
2825 struct e1000_hw *hw = &adapter->hw;
2826
53ec5498
BA
2827 /* DMA latency requirement to workaround early-receive/jumbo issue */
2828 if (adapter->flags & FLAG_HAS_ERT)
2829 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2830 adapter->netdev->name,
2831 PM_QOS_DEFAULT_VALUE);
2832
bc7f75fa
AK
2833 /* hardware has been reset, we need to reload some things */
2834 e1000_configure(adapter);
2835
2836 clear_bit(__E1000_DOWN, &adapter->state);
2837
2838 napi_enable(&adapter->napi);
4662e82b
BA
2839 if (adapter->msix_entries)
2840 e1000_configure_msix(adapter);
bc7f75fa
AK
2841 e1000_irq_enable(adapter);
2842
4cb9be7a
JB
2843 netif_wake_queue(adapter->netdev);
2844
bc7f75fa
AK
2845 /* fire a link change interrupt to start the watchdog */
2846 ew32(ICS, E1000_ICS_LSC);
2847 return 0;
2848}
2849
2850void e1000e_down(struct e1000_adapter *adapter)
2851{
2852 struct net_device *netdev = adapter->netdev;
2853 struct e1000_hw *hw = &adapter->hw;
2854 u32 tctl, rctl;
2855
ad68076e
BA
2856 /*
2857 * signal that we're down so the interrupt handler does not
2858 * reschedule our watchdog timer
2859 */
bc7f75fa
AK
2860 set_bit(__E1000_DOWN, &adapter->state);
2861
2862 /* disable receives in the hardware */
2863 rctl = er32(RCTL);
2864 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2865 /* flush and sleep below */
2866
4cb9be7a 2867 netif_stop_queue(netdev);
bc7f75fa
AK
2868
2869 /* disable transmits in the hardware */
2870 tctl = er32(TCTL);
2871 tctl &= ~E1000_TCTL_EN;
2872 ew32(TCTL, tctl);
2873 /* flush both disables and wait for them to finish */
2874 e1e_flush();
2875 msleep(10);
2876
2877 napi_disable(&adapter->napi);
2878 e1000_irq_disable(adapter);
2879
2880 del_timer_sync(&adapter->watchdog_timer);
2881 del_timer_sync(&adapter->phy_info_timer);
2882
bc7f75fa
AK
2883 netif_carrier_off(netdev);
2884 adapter->link_speed = 0;
2885 adapter->link_duplex = 0;
2886
52cc3086
JK
2887 if (!pci_channel_offline(adapter->pdev))
2888 e1000e_reset(adapter);
bc7f75fa
AK
2889 e1000_clean_tx_ring(adapter);
2890 e1000_clean_rx_ring(adapter);
2891
53ec5498
BA
2892 if (adapter->flags & FLAG_HAS_ERT)
2893 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2894 adapter->netdev->name);
2895
bc7f75fa
AK
2896 /*
2897 * TODO: for power management, we could drop the link and
2898 * pci_disable_device here.
2899 */
2900}
2901
2902void e1000e_reinit_locked(struct e1000_adapter *adapter)
2903{
2904 might_sleep();
2905 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2906 msleep(1);
2907 e1000e_down(adapter);
2908 e1000e_up(adapter);
2909 clear_bit(__E1000_RESETTING, &adapter->state);
2910}
2911
2912/**
2913 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2914 * @adapter: board private structure to initialize
2915 *
2916 * e1000_sw_init initializes the Adapter private data structure.
2917 * Fields are initialized based on PCI device information and
2918 * OS network device settings (MTU size).
2919 **/
2920static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2921{
bc7f75fa
AK
2922 struct net_device *netdev = adapter->netdev;
2923
2924 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2925 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
2926 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2927 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2928
4662e82b 2929 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2930
4662e82b
BA
2931 if (e1000_alloc_queues(adapter))
2932 return -ENOMEM;
bc7f75fa 2933
bc7f75fa 2934 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK
2935 e1000_irq_disable(adapter);
2936
bc7f75fa
AK
2937 set_bit(__E1000_DOWN, &adapter->state);
2938 return 0;
bc7f75fa
AK
2939}
2940
f8d59f78
BA
2941/**
2942 * e1000_intr_msi_test - Interrupt Handler
2943 * @irq: interrupt number
2944 * @data: pointer to a network interface device structure
2945 **/
2946static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2947{
2948 struct net_device *netdev = data;
2949 struct e1000_adapter *adapter = netdev_priv(netdev);
2950 struct e1000_hw *hw = &adapter->hw;
2951 u32 icr = er32(ICR);
2952
3bb99fe2 2953 e_dbg("icr is %08X\n", icr);
f8d59f78
BA
2954 if (icr & E1000_ICR_RXSEQ) {
2955 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2956 wmb();
2957 }
2958
2959 return IRQ_HANDLED;
2960}
2961
2962/**
2963 * e1000_test_msi_interrupt - Returns 0 for successful test
2964 * @adapter: board private struct
2965 *
2966 * code flow taken from tg3.c
2967 **/
2968static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2969{
2970 struct net_device *netdev = adapter->netdev;
2971 struct e1000_hw *hw = &adapter->hw;
2972 int err;
2973
2974 /* poll_enable hasn't been called yet, so don't need disable */
2975 /* clear any pending events */
2976 er32(ICR);
2977
2978 /* free the real vector and request a test handler */
2979 e1000_free_irq(adapter);
4662e82b 2980 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA
2981
2982 /* Assume that the test fails, if it succeeds then the test
2983 * MSI irq handler will unset this flag */
2984 adapter->flags |= FLAG_MSI_TEST_FAILED;
2985
2986 err = pci_enable_msi(adapter->pdev);
2987 if (err)
2988 goto msi_test_failed;
2989
a0607fd3 2990 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA
2991 netdev->name, netdev);
2992 if (err) {
2993 pci_disable_msi(adapter->pdev);
2994 goto msi_test_failed;
2995 }
2996
2997 wmb();
2998
2999 e1000_irq_enable(adapter);
3000
3001 /* fire an unusual interrupt on the test handler */
3002 ew32(ICS, E1000_ICS_RXSEQ);
3003 e1e_flush();
3004 msleep(50);
3005
3006 e1000_irq_disable(adapter);
3007
3008 rmb();
3009
3010 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3011 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA
3012 err = -EIO;
3013 e_info("MSI interrupt test failed!\n");
3014 }
3015
3016 free_irq(adapter->pdev->irq, netdev);
3017 pci_disable_msi(adapter->pdev);
3018
3019 if (err == -EIO)
3020 goto msi_test_failed;
3021
3022 /* okay so the test worked, restore settings */
3bb99fe2 3023 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3024msi_test_failed:
4662e82b 3025 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA
3026 e1000_request_irq(adapter);
3027 return err;
3028}
3029
3030/**
3031 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3032 * @adapter: board private struct
3033 *
3034 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3035 **/
3036static int e1000_test_msi(struct e1000_adapter *adapter)
3037{
3038 int err;
3039 u16 pci_cmd;
3040
3041 if (!(adapter->flags & FLAG_MSI_ENABLED))
3042 return 0;
3043
3044 /* disable SERR in case the MSI write causes a master abort */
3045 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3046 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3047 pci_cmd & ~PCI_COMMAND_SERR);
3048
3049 err = e1000_test_msi_interrupt(adapter);
3050
3051 /* restore previous setting of command word */
3052 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3053
3054 /* success ! */
3055 if (!err)
3056 return 0;
3057
3058 /* EIO means MSI test failed */
3059 if (err != -EIO)
3060 return err;
3061
3062 /* back to INTx mode */
3063 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3064
3065 e1000_free_irq(adapter);
3066
3067 err = e1000_request_irq(adapter);
3068
3069 return err;
3070}
3071
bc7f75fa
AK
3072/**
3073 * e1000_open - Called when a network interface is made active
3074 * @netdev: network interface device structure
3075 *
3076 * Returns 0 on success, negative value on failure
3077 *
3078 * The open entry point is called when a network interface is made
3079 * active by the system (IFF_UP). At this point all resources needed
3080 * for transmit and receive operations are allocated, the interrupt
3081 * handler is registered with the OS, the watchdog timer is started,
3082 * and the stack is notified that the interface is ready.
3083 **/
3084static int e1000_open(struct net_device *netdev)
3085{
3086 struct e1000_adapter *adapter = netdev_priv(netdev);
3087 struct e1000_hw *hw = &adapter->hw;
23606cf5 3088 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3089 int err;
3090
3091 /* disallow open during test */
3092 if (test_bit(__E1000_TESTING, &adapter->state))
3093 return -EBUSY;
3094
23606cf5
RW
3095 pm_runtime_get_sync(&pdev->dev);
3096
9c563d20
JB
3097 netif_carrier_off(netdev);
3098
bc7f75fa
AK
3099 /* allocate transmit descriptors */
3100 err = e1000e_setup_tx_resources(adapter);
3101 if (err)
3102 goto err_setup_tx;
3103
3104 /* allocate receive descriptors */
3105 err = e1000e_setup_rx_resources(adapter);
3106 if (err)
3107 goto err_setup_rx;
3108
3109 e1000e_power_up_phy(adapter);
3110
3111 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3112 if ((adapter->hw.mng_cookie.status &
3113 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3114 e1000_update_mng_vlan(adapter);
3115
ad68076e
BA
3116 /*
3117 * If AMT is enabled, let the firmware know that the network
3118 * interface is now open
3119 */
c43bc57e 3120 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3121 e1000_get_hw_control(adapter);
3122
ad68076e
BA
3123 /*
3124 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
3125 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3126 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
3127 * clean_rx handler before we do so.
3128 */
bc7f75fa
AK
3129 e1000_configure(adapter);
3130
3131 err = e1000_request_irq(adapter);
3132 if (err)
3133 goto err_req_irq;
3134
f8d59f78
BA
3135 /*
3136 * Work around PCIe errata with MSI interrupts causing some chipsets to
3137 * ignore e1000e MSI messages, which means we need to test our MSI
3138 * interrupt now
3139 */
4662e82b 3140 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA
3141 err = e1000_test_msi(adapter);
3142 if (err) {
3143 e_err("Interrupt allocation failed\n");
3144 goto err_req_irq;
3145 }
3146 }
3147
bc7f75fa
AK
3148 /* From here on the code is the same as e1000e_up() */
3149 clear_bit(__E1000_DOWN, &adapter->state);
3150
3151 napi_enable(&adapter->napi);
3152
3153 e1000_irq_enable(adapter);
3154
4cb9be7a 3155 netif_start_queue(netdev);
d55b53ff 3156
23606cf5
RW
3157 adapter->idle_check = true;
3158 pm_runtime_put(&pdev->dev);
3159
bc7f75fa
AK
3160 /* fire a link status change interrupt to start the watchdog */
3161 ew32(ICS, E1000_ICS_LSC);
3162
3163 return 0;
3164
3165err_req_irq:
3166 e1000_release_hw_control(adapter);
3167 e1000_power_down_phy(adapter);
3168 e1000e_free_rx_resources(adapter);
3169err_setup_rx:
3170 e1000e_free_tx_resources(adapter);
3171err_setup_tx:
3172 e1000e_reset(adapter);
23606cf5 3173 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK
3174
3175 return err;
3176}
3177
3178/**
3179 * e1000_close - Disables a network interface
3180 * @netdev: network interface device structure
3181 *
3182 * Returns 0, this is not allowed to fail
3183 *
3184 * The close entry point is called when an interface is de-activated
3185 * by the OS. The hardware is still under the drivers control, but
3186 * needs to be disabled. A global MAC reset is issued to stop the
3187 * hardware, and all transmit and receive resources are freed.
3188 **/
3189static int e1000_close(struct net_device *netdev)
3190{
3191 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3192 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3193
3194 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW
3195
3196 pm_runtime_get_sync(&pdev->dev);
3197
3198 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3199 e1000e_down(adapter);
3200 e1000_free_irq(adapter);
3201 }
bc7f75fa 3202 e1000_power_down_phy(adapter);
bc7f75fa
AK
3203
3204 e1000e_free_tx_resources(adapter);
3205 e1000e_free_rx_resources(adapter);
3206
ad68076e
BA
3207 /*
3208 * kill manageability vlan ID if supported, but not if a vlan with
3209 * the same ID is registered on the host OS (let 8021q kill it)
3210 */
bc7f75fa
AK
3211 if ((adapter->hw.mng_cookie.status &
3212 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3213 !(adapter->vlgrp &&
3214 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3215 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3216
ad68076e
BA
3217 /*
3218 * If AMT is enabled, let the firmware know that the network
3219 * interface is now closed
3220 */
c43bc57e 3221 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3222 e1000_release_hw_control(adapter);
3223
23606cf5
RW
3224 pm_runtime_put_sync(&pdev->dev);
3225
bc7f75fa
AK
3226 return 0;
3227}
3228/**
3229 * e1000_set_mac - Change the Ethernet Address of the NIC
3230 * @netdev: network interface device structure
3231 * @p: pointer to an address structure
3232 *
3233 * Returns 0 on success, negative on failure
3234 **/
3235static int e1000_set_mac(struct net_device *netdev, void *p)
3236{
3237 struct e1000_adapter *adapter = netdev_priv(netdev);
3238 struct sockaddr *addr = p;
3239
3240 if (!is_valid_ether_addr(addr->sa_data))
3241 return -EADDRNOTAVAIL;
3242
3243 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3244 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3245
3246 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3247
3248 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3249 /* activate the work around */
3250 e1000e_set_laa_state_82571(&adapter->hw, 1);
3251
ad68076e
BA
3252 /*
3253 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
3254 * between the time RAR[0] gets clobbered and the time it
3255 * gets fixed (in e1000_watchdog), the actual LAA is in one
3256 * of the RARs and no incoming packets directed to this port
3257 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
3258 * RAR[14]
3259 */
bc7f75fa
AK
3260 e1000e_rar_set(&adapter->hw,
3261 adapter->hw.mac.addr,
3262 adapter->hw.mac.rar_entry_count - 1);
3263 }
3264
3265 return 0;
3266}
3267
a8f88ff5
JB
3268/**
3269 * e1000e_update_phy_task - work thread to update phy
3270 * @work: pointer to our work struct
3271 *
3272 * this worker thread exists because we must acquire a
3273 * semaphore to read the phy, which we could msleep while
3274 * waiting for it, and we can't msleep in a timer.
3275 **/
3276static void e1000e_update_phy_task(struct work_struct *work)
3277{
3278 struct e1000_adapter *adapter = container_of(work,
3279 struct e1000_adapter, update_phy_task);
3280 e1000_get_phy_info(&adapter->hw);
3281}
3282
ad68076e
BA
3283/*
3284 * Need to wait a few seconds after link up to get diagnostic information from
3285 * the phy
3286 */
bc7f75fa
AK
3287static void e1000_update_phy_info(unsigned long data)
3288{
3289 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3290 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK
3291}
3292
3293/**
3294 * e1000e_update_stats - Update the board statistics counters
3295 * @adapter: board private structure
3296 **/
3297void e1000e_update_stats(struct e1000_adapter *adapter)
3298{
7274c20f 3299 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
3300 struct e1000_hw *hw = &adapter->hw;
3301 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3302 u16 phy_data;
bc7f75fa
AK
3303
3304 /*
3305 * Prevent stats update while adapter is being reset, or if the pci
3306 * connection is down.
3307 */
3308 if (adapter->link_speed == 0)
3309 return;
3310 if (pci_channel_offline(pdev))
3311 return;
3312
bc7f75fa
AK
3313 adapter->stats.crcerrs += er32(CRCERRS);
3314 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
3315 adapter->stats.gorc += er32(GORCL);
3316 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
3317 adapter->stats.bprc += er32(BPRC);
3318 adapter->stats.mprc += er32(MPRC);
3319 adapter->stats.roc += er32(ROC);
3320
bc7f75fa 3321 adapter->stats.mpc += er32(MPC);
a4f58f54
BA
3322 if ((hw->phy.type == e1000_phy_82578) ||
3323 (hw->phy.type == e1000_phy_82577)) {
3324 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA
3325 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3326 adapter->stats.scc += phy_data;
a4f58f54
BA
3327
3328 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA
3329 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3330 adapter->stats.ecol += phy_data;
a4f58f54
BA
3331
3332 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA
3333 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3334 adapter->stats.mcc += phy_data;
a4f58f54
BA
3335
3336 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA
3337 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3338 adapter->stats.latecol += phy_data;
a4f58f54
BA
3339
3340 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA
3341 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3342 adapter->stats.dc += phy_data;
a4f58f54
BA
3343 } else {
3344 adapter->stats.scc += er32(SCC);
3345 adapter->stats.ecol += er32(ECOL);
3346 adapter->stats.mcc += er32(MCC);
3347 adapter->stats.latecol += er32(LATECOL);
3348 adapter->stats.dc += er32(DC);
3349 }
bc7f75fa
AK
3350 adapter->stats.xonrxc += er32(XONRXC);
3351 adapter->stats.xontxc += er32(XONTXC);
3352 adapter->stats.xoffrxc += er32(XOFFRXC);
3353 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3354 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
3355 adapter->stats.gotc += er32(GOTCL);
3356 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
3357 adapter->stats.rnbc += er32(RNBC);
3358 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
3359
3360 adapter->stats.mptc += er32(MPTC);
3361 adapter->stats.bptc += er32(BPTC);
3362
3363 /* used for adaptive IFS */
3364
3365 hw->mac.tx_packet_delta = er32(TPT);
3366 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA
3367 if ((hw->phy.type == e1000_phy_82578) ||
3368 (hw->phy.type == e1000_phy_82577)) {
3369 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA
3370 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3371 hw->mac.collision_delta = phy_data;
a4f58f54
BA
3372 } else {
3373 hw->mac.collision_delta = er32(COLC);
3374 }
bc7f75fa
AK
3375 adapter->stats.colc += hw->mac.collision_delta;
3376
3377 adapter->stats.algnerrc += er32(ALGNERRC);
3378 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA
3379 if ((hw->phy.type == e1000_phy_82578) ||
3380 (hw->phy.type == e1000_phy_82577)) {
3381 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA
3382 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3383 adapter->stats.tncrs += phy_data;
a4f58f54
BA
3384 } else {
3385 if ((hw->mac.type != e1000_82574) &&
3386 (hw->mac.type != e1000_82583))
3387 adapter->stats.tncrs += er32(TNCRS);
3388 }
bc7f75fa
AK
3389 adapter->stats.cexterr += er32(CEXTERR);
3390 adapter->stats.tsctc += er32(TSCTC);
3391 adapter->stats.tsctfc += er32(TSCTFC);
3392
bc7f75fa 3393 /* Fill out the OS statistics structure */
7274c20f
AK
3394 netdev->stats.multicast = adapter->stats.mprc;
3395 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK
3396
3397 /* Rx Errors */
3398
ad68076e
BA
3399 /*
3400 * RLEC on some newer hardware can be incorrect so build
3401 * our own version based on RUC and ROC
3402 */
7274c20f 3403 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK
3404 adapter->stats.crcerrs + adapter->stats.algnerrc +
3405 adapter->stats.ruc + adapter->stats.roc +
3406 adapter->stats.cexterr;
7274c20f 3407 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3408 adapter->stats.roc;
7274c20f
AK
3409 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3410 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3411 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK
3412
3413 /* Tx Errors */
7274c20f 3414 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3415 adapter->stats.latecol;
7274c20f
AK
3416 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3417 netdev->stats.tx_window_errors = adapter->stats.latecol;
3418 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK
3419
3420 /* Tx Dropped needs to be maintained elsewhere */
3421
bc7f75fa
AK
3422 /* Management Stats */
3423 adapter->stats.mgptc += er32(MGTPTC);
3424 adapter->stats.mgprc += er32(MGTPRC);
3425 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK
3426}
3427
7c25769f
BA
3428/**
3429 * e1000_phy_read_status - Update the PHY register status snapshot
3430 * @adapter: board private structure
3431 **/
3432static void e1000_phy_read_status(struct e1000_adapter *adapter)
3433{
3434 struct e1000_hw *hw = &adapter->hw;
3435 struct e1000_phy_regs *phy = &adapter->phy_regs;
3436 int ret_val;
7c25769f
BA
3437
3438 if ((er32(STATUS) & E1000_STATUS_LU) &&
3439 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3440 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3441 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3442 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3443 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3444 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3445 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3446 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3447 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3448 if (ret_val)
44defeb3 3449 e_warn("Error reading PHY register\n");
7c25769f
BA
3450 } else {
3451 /*
3452 * Do not read PHY registers if link is not up
3453 * Set values to typical power-on defaults
3454 */
3455 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3456 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3457 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3458 BMSR_ERCAP);
3459 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3460 ADVERTISE_ALL | ADVERTISE_CSMA);
3461 phy->lpa = 0;
3462 phy->expansion = EXPANSION_ENABLENPAGE;
3463 phy->ctrl1000 = ADVERTISE_1000FULL;
3464 phy->stat1000 = 0;
3465 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3466 }
7c25769f
BA
3467}
3468
bc7f75fa
AK
3469static void e1000_print_link_info(struct e1000_adapter *adapter)
3470{
bc7f75fa
AK
3471 struct e1000_hw *hw = &adapter->hw;
3472 u32 ctrl = er32(CTRL);
3473
8f12fe86
BA
3474 /* Link status message must follow this format for user tools */
3475 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3476 "Flow Control: %s\n",
3477 adapter->netdev->name,
44defeb3
JK
3478 adapter->link_speed,
3479 (adapter->link_duplex == FULL_DUPLEX) ?
3480 "Full Duplex" : "Half Duplex",
3481 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3482 "RX/TX" :
3483 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3484 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
3485}
3486
b405e8df 3487bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK
3488{
3489 struct e1000_hw *hw = &adapter->hw;
3490 bool link_active = 0;
3491 s32 ret_val = 0;
3492
3493 /*
3494 * get_link_status is set on LSC (link status) interrupt or
3495 * Rx sequence error interrupt. get_link_status will stay
3496 * false until the check_for_link establishes link
3497 * for copper adapters ONLY
3498 */
3499 switch (hw->phy.media_type) {
3500 case e1000_media_type_copper:
3501 if (hw->mac.get_link_status) {
3502 ret_val = hw->mac.ops.check_for_link(hw);
3503 link_active = !hw->mac.get_link_status;
3504 } else {
3505 link_active = 1;
3506 }
3507 break;
3508 case e1000_media_type_fiber:
3509 ret_val = hw->mac.ops.check_for_link(hw);
3510 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3511 break;
3512 case e1000_media_type_internal_serdes:
3513 ret_val = hw->mac.ops.check_for_link(hw);
3514 link_active = adapter->hw.mac.serdes_has_link;
3515 break;
3516 default:
3517 case e1000_media_type_unknown:
3518 break;
3519 }
3520
3521 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3522 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3523 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3524 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
3525 }
3526
3527 return link_active;
3528}
3529
3530static void e1000e_enable_receives(struct e1000_adapter *adapter)
3531{
3532 /* make sure the receive unit is started */
3533 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3534 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3535 struct e1000_hw *hw = &adapter->hw;
3536 u32 rctl = er32(RCTL);
3537 ew32(RCTL, rctl | E1000_RCTL_EN);
3538 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3539 }
3540}
3541
bc7f75fa
AK
3542/**
3543 * e1000_watchdog - Timer Call-back
3544 * @data: pointer to adapter cast into an unsigned long
3545 **/
3546static void e1000_watchdog(unsigned long data)
3547{
3548 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3549
3550 /* Do the rest outside of interrupt context */
3551 schedule_work(&adapter->watchdog_task);
3552
3553 /* TODO: make this use queue_delayed_work() */
3554}
3555
3556static void e1000_watchdog_task(struct work_struct *work)
3557{
3558 struct e1000_adapter *adapter = container_of(work,
3559 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3560 struct net_device *netdev = adapter->netdev;
3561 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3562 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK
3563 struct e1000_ring *tx_ring = adapter->tx_ring;
3564 struct e1000_hw *hw = &adapter->hw;
3565 u32 link, tctl;
bc7f75fa
AK
3566 int tx_pending = 0;
3567
b405e8df 3568 link = e1000e_has_link(adapter);
318a94d6 3569 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW
3570 /* Cancel scheduled suspend requests. */
3571 pm_runtime_resume(netdev->dev.parent);
3572
318a94d6 3573 e1000e_enable_receives(adapter);
bc7f75fa 3574 goto link_up;
bc7f75fa
AK
3575 }
3576
3577 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3578 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3579 e1000_update_mng_vlan(adapter);
3580
bc7f75fa
AK
3581 if (link) {
3582 if (!netif_carrier_ok(netdev)) {
3583 bool txb2b = 1;
23606cf5
RW
3584
3585 /* Cancel scheduled suspend requests. */
3586 pm_runtime_resume(netdev->dev.parent);
3587
318a94d6 3588 /* update snapshot of PHY registers on LSC */
7c25769f 3589 e1000_phy_read_status(adapter);
bc7f75fa
AK
3590 mac->ops.get_link_up_info(&adapter->hw,
3591 &adapter->link_speed,
3592 &adapter->link_duplex);
3593 e1000_print_link_info(adapter);
f4187b56
BA
3594 /*
3595 * On supported PHYs, check for duplex mismatch only
3596 * if link has autonegotiated at 10/100 half
3597 */
3598 if ((hw->phy.type == e1000_phy_igp_3 ||
3599 hw->phy.type == e1000_phy_bm) &&
3600 (hw->mac.autoneg == true) &&
3601 (adapter->link_speed == SPEED_10 ||
3602 adapter->link_speed == SPEED_100) &&
3603 (adapter->link_duplex == HALF_DUPLEX)) {
3604 u16 autoneg_exp;
3605
3606 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3607
3608 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3609 e_info("Autonegotiated half duplex but"
3610 " link partner cannot autoneg. "
3611 " Try forcing full duplex if "
3612 "link gets many collisions.\n");
3613 }
3614
f49c57e1 3615 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK
3616 adapter->tx_timeout_factor = 1;
3617 switch (adapter->link_speed) {
3618 case SPEED_10:
3619 txb2b = 0;
10f1b492 3620 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
3621 break;
3622 case SPEED_100:
3623 txb2b = 0;
4c86e0b9 3624 adapter->tx_timeout_factor = 10;
bc7f75fa
AK
3625 break;
3626 }
3627
ad68076e
BA
3628 /*
3629 * workaround: re-program speed mode bit after
3630 * link-up event
3631 */
bc7f75fa
AK
3632 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3633 !txb2b) {
3634 u32 tarc0;
e9ec2c0f 3635 tarc0 = er32(TARC(0));
bc7f75fa 3636 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3637 ew32(TARC(0), tarc0);
bc7f75fa
AK
3638 }
3639
ad68076e
BA
3640 /*
3641 * disable TSO for pcie and 10/100 speeds, to avoid
3642 * some hardware issues
3643 */
bc7f75fa
AK
3644 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3645 switch (adapter->link_speed) {
3646 case SPEED_10:
3647 case SPEED_100:
44defeb3 3648 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
3649 netdev->features &= ~NETIF_F_TSO;
3650 netdev->features &= ~NETIF_F_TSO6;
3651 break;
3652 case SPEED_1000:
3653 netdev->features |= NETIF_F_TSO;
3654 netdev->features |= NETIF_F_TSO6;
3655 break;
3656 default:
3657 /* oops */
3658 break;
3659 }
3660 }
3661
ad68076e
BA
3662 /*
3663 * enable transmits in the hardware, need to do this
3664 * after setting TARC(0)
3665 */
bc7f75fa
AK
3666 tctl = er32(TCTL);
3667 tctl |= E1000_TCTL_EN;
3668 ew32(TCTL, tctl);
3669
75eb0fad
BA
3670 /*
3671 * Perform any post-link-up configuration before
3672 * reporting link up.
3673 */
3674 if (phy->ops.cfg_on_link_up)
3675 phy->ops.cfg_on_link_up(hw);
3676
bc7f75fa 3677 netif_carrier_on(netdev);
bc7f75fa
AK
3678
3679 if (!test_bit(__E1000_DOWN, &adapter->state))
3680 mod_timer(&adapter->phy_info_timer,
3681 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
3682 }
3683 } else {
3684 if (netif_carrier_ok(netdev)) {
3685 adapter->link_speed = 0;
3686 adapter->link_duplex = 0;
8f12fe86
BA
3687 /* Link status message must follow this format */
3688 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3689 adapter->netdev->name);
bc7f75fa 3690 netif_carrier_off(netdev);
bc7f75fa
AK
3691 if (!test_bit(__E1000_DOWN, &adapter->state))
3692 mod_timer(&adapter->phy_info_timer,
3693 round_jiffies(jiffies + 2 * HZ));
3694
3695 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3696 schedule_work(&adapter->reset_task);
23606cf5
RW
3697 else
3698 pm_schedule_suspend(netdev->dev.parent,
3699 LINK_TIMEOUT);
bc7f75fa
AK
3700 }
3701 }
3702
3703link_up:
3704 e1000e_update_stats(adapter);
3705
3706 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3707 adapter->tpt_old = adapter->stats.tpt;
3708 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3709 adapter->colc_old = adapter->stats.colc;
3710
7c25769f
BA
3711 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3712 adapter->gorc_old = adapter->stats.gorc;
3713 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3714 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
3715
3716 e1000e_update_adaptive(&adapter->hw);
3717
3718 if (!netif_carrier_ok(netdev)) {
3719 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3720 tx_ring->count);
3721 if (tx_pending) {
ad68076e
BA
3722 /*
3723 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
3724 * but we've got queued Tx work that's never going
3725 * to get done, so reset controller to flush Tx.
ad68076e
BA
3726 * (Do the reset outside of interrupt context).
3727 */
bc7f75fa
AK
3728 adapter->tx_timeout_count++;
3729 schedule_work(&adapter->reset_task);
c2d5ab49
JB
3730 /* return immediately since reset is imminent */
3731 return;
bc7f75fa
AK
3732 }
3733 }
3734
ad68076e 3735 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA
3736 if (adapter->msix_entries)
3737 ew32(ICS, adapter->rx_ring->ims_val);
3738 else
3739 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK
3740
3741 /* Force detection of hung controller every watchdog period */
3742 adapter->detect_tx_hung = 1;
3743
ad68076e
BA
3744 /*
3745 * With 82571 controllers, LAA may be overwritten due to controller
3746 * reset from the other port. Set the appropriate LAA in RAR[0]
3747 */
bc7f75fa
AK
3748 if (e1000e_get_laa_state_82571(hw))
3749 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3750
3751 /* Reset the timer */
3752 if (!test_bit(__E1000_DOWN, &adapter->state))
3753 mod_timer(&adapter->watchdog_timer,
3754 round_jiffies(jiffies + 2 * HZ));
3755}
3756
3757#define E1000_TX_FLAGS_CSUM 0x00000001
3758#define E1000_TX_FLAGS_VLAN 0x00000002
3759#define E1000_TX_FLAGS_TSO 0x00000004
3760#define E1000_TX_FLAGS_IPV4 0x00000008
3761#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3762#define E1000_TX_FLAGS_VLAN_SHIFT 16
3763
3764static int e1000_tso(struct e1000_adapter *adapter,
3765 struct sk_buff *skb)
3766{
3767 struct e1000_ring *tx_ring = adapter->tx_ring;
3768 struct e1000_context_desc *context_desc;
3769 struct e1000_buffer *buffer_info;
3770 unsigned int i;
3771 u32 cmd_length = 0;
3772 u16 ipcse = 0, tucse, mss;
3773 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3774 int err;
3775
3d5e33c9
BA
3776 if (!skb_is_gso(skb))
3777 return 0;
bc7f75fa 3778
3d5e33c9
BA
3779 if (skb_header_cloned(skb)) {
3780 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3781 if (err)
3782 return err;
bc7f75fa
AK
3783 }
3784
3d5e33c9
BA
3785 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3786 mss = skb_shinfo(skb)->gso_size;
3787 if (skb->protocol == htons(ETH_P_IP)) {
3788 struct iphdr *iph = ip_hdr(skb);
3789 iph->tot_len = 0;
3790 iph->check = 0;
3791 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3792 0, IPPROTO_TCP, 0);
3793 cmd_length = E1000_TXD_CMD_IP;
3794 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 3795 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA
3796 ipv6_hdr(skb)->payload_len = 0;
3797 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3798 &ipv6_hdr(skb)->daddr,
3799 0, IPPROTO_TCP, 0);
3800 ipcse = 0;
3801 }
3802 ipcss = skb_network_offset(skb);
3803 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3804 tucss = skb_transport_offset(skb);
3805 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3806 tucse = 0;
3807
3808 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3809 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3810
3811 i = tx_ring->next_to_use;
3812 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3813 buffer_info = &tx_ring->buffer_info[i];
3814
3815 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3816 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3817 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3818 context_desc->upper_setup.tcp_fields.tucss = tucss;
3819 context_desc->upper_setup.tcp_fields.tucso = tucso;
3820 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3821 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3822 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3823 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3824
3825 buffer_info->time_stamp = jiffies;
3826 buffer_info->next_to_watch = i;
3827
3828 i++;
3829 if (i == tx_ring->count)
3830 i = 0;
3831 tx_ring->next_to_use = i;
3832
3833 return 1;
bc7f75fa
AK
3834}
3835
3836static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3837{
3838 struct e1000_ring *tx_ring = adapter->tx_ring;
3839 struct e1000_context_desc *context_desc;
3840 struct e1000_buffer *buffer_info;
3841 unsigned int i;
3842 u8 css;
af807c82 3843 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3844 __be16 protocol;
bc7f75fa 3845
af807c82
DG
3846 if (skb->ip_summed != CHECKSUM_PARTIAL)
3847 return 0;
bc7f75fa 3848
5f66f208
AJ
3849 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3850 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3851 else
3852 protocol = skb->protocol;
3853
3f518390 3854 switch (protocol) {
09640e63 3855 case cpu_to_be16(ETH_P_IP):
af807c82
DG
3856 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3857 cmd_len |= E1000_TXD_CMD_TCP;
3858 break;
09640e63 3859 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG
3860 /* XXX not handling all IPV6 headers */
3861 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3862 cmd_len |= E1000_TXD_CMD_TCP;
3863 break;
3864 default:
3865 if (unlikely(net_ratelimit()))
5f66f208
AJ
3866 e_warn("checksum_partial proto=%x!\n",
3867 be16_to_cpu(protocol));
af807c82 3868 break;
bc7f75fa
AK
3869 }
3870
af807c82
DG
3871 css = skb_transport_offset(skb);
3872
3873 i = tx_ring->next_to_use;
3874 buffer_info = &tx_ring->buffer_info[i];
3875 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3876
3877 context_desc->lower_setup.ip_config = 0;
3878 context_desc->upper_setup.tcp_fields.tucss = css;
3879 context_desc->upper_setup.tcp_fields.tucso =
3880 css + skb->csum_offset;
3881 context_desc->upper_setup.tcp_fields.tucse = 0;
3882 context_desc->tcp_seg_setup.data = 0;
3883 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3884
3885 buffer_info->time_stamp = jiffies;
3886 buffer_info->next_to_watch = i;
3887
3888 i++;
3889 if (i == tx_ring->count)
3890 i = 0;
3891 tx_ring->next_to_use = i;
3892
3893 return 1;
bc7f75fa
AK
3894}
3895
3896#define E1000_MAX_PER_TXD 8192
3897#define E1000_MAX_TXD_PWR 12
3898
3899static int e1000_tx_map(struct e1000_adapter *adapter,
3900 struct sk_buff *skb, unsigned int first,
3901 unsigned int max_per_txd, unsigned int nr_frags,
3902 unsigned int mss)
3903{
3904 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3905 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3906 struct e1000_buffer *buffer_info;
8ddc951c 3907 unsigned int len = skb_headlen(skb);
03b1320d 3908 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK
3909 unsigned int f;
3910
3911 i = tx_ring->next_to_use;
3912
3913 while (len) {
1b7719c4 3914 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK
3915 size = min(len, max_per_txd);
3916
bc7f75fa 3917 buffer_info->length = size;
bc7f75fa 3918 buffer_info->time_stamp = jiffies;
bc7f75fa 3919 buffer_info->next_to_watch = i;
03b1320d
AD
3920 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3921 size, PCI_DMA_TODEVICE);
3922 buffer_info->mapped_as_page = false;
3923 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3924 goto dma_error;
bc7f75fa
AK
3925
3926 len -= size;
3927 offset += size;
03b1320d 3928 count++;
1b7719c4
AD
3929
3930 if (len) {
3931 i++;
3932 if (i == tx_ring->count)
3933 i = 0;
3934 }
bc7f75fa
AK
3935 }
3936
3937 for (f = 0; f < nr_frags; f++) {
3938 struct skb_frag_struct *frag;
3939
3940 frag = &skb_shinfo(skb)->frags[f];
3941 len = frag->size;
03b1320d 3942 offset = frag->page_offset;
bc7f75fa
AK
3943
3944 while (len) {
1b7719c4
AD
3945 i++;
3946 if (i == tx_ring->count)
3947 i = 0;
3948
bc7f75fa
AK
3949 buffer_info = &tx_ring->buffer_info[i];
3950 size = min(len, max_per_txd);
bc7f75fa
AK
3951
3952 buffer_info->length = size;
3953 buffer_info->time_stamp = jiffies;
bc7f75fa 3954 buffer_info->next_to_watch = i;
03b1320d
AD
3955 buffer_info->dma = pci_map_page(pdev, frag->page,
3956 offset, size,
3957 PCI_DMA_TODEVICE);
3958 buffer_info->mapped_as_page = true;
3959 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3960 goto dma_error;
bc7f75fa
AK
3961
3962 len -= size;
3963 offset += size;
3964 count++;
bc7f75fa
AK
3965 }
3966 }
3967
bc7f75fa
AK
3968 tx_ring->buffer_info[i].skb = skb;
3969 tx_ring->buffer_info[first].next_to_watch = i;
3970
3971 return count;
03b1320d
AD
3972
3973dma_error:
3974 dev_err(&pdev->dev, "TX DMA map failed\n");
3975 buffer_info->dma = 0;
c1fa347f 3976 if (count)
03b1320d 3977 count--;
c1fa347f
RK
3978
3979 while (count--) {
3980 if (i==0)
03b1320d 3981 i += tx_ring->count;
c1fa347f 3982 i--;
03b1320d
AD
3983 buffer_info = &tx_ring->buffer_info[i];
3984 e1000_put_txbuf(adapter, buffer_info);;
3985 }
3986
3987 return 0;
bc7f75fa
AK
3988}
3989
3990static void e1000_tx_queue(struct e1000_adapter *adapter,
3991 int tx_flags, int count)
3992{
3993 struct e1000_ring *tx_ring = adapter->tx_ring;
3994 struct e1000_tx_desc *tx_desc = NULL;
3995 struct e1000_buffer *buffer_info;
3996 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3997 unsigned int i;
3998
3999 if (tx_flags & E1000_TX_FLAGS_TSO) {
4000 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4001 E1000_TXD_CMD_TSE;
4002 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4003
4004 if (tx_flags & E1000_TX_FLAGS_IPV4)
4005 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4006 }
4007
4008 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4009 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4010 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4011 }
4012
4013 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4014 txd_lower |= E1000_TXD_CMD_VLE;
4015 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4016 }
4017
4018 i = tx_ring->next_to_use;
4019
4020 while (count--) {
4021 buffer_info = &tx_ring->buffer_info[i];
4022 tx_desc = E1000_TX_DESC(*tx_ring, i);
4023 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4024 tx_desc->lower.data =
4025 cpu_to_le32(txd_lower | buffer_info->length);
4026 tx_desc->upper.data = cpu_to_le32(txd_upper);
4027
4028 i++;
4029 if (i == tx_ring->count)
4030 i = 0;
4031 }
4032
4033 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4034
ad68076e
BA
4035 /*
4036 * Force memory writes to complete before letting h/w
bc7f75fa
AK
4037 * know there are new descriptors to fetch. (Only
4038 * applicable for weak-ordered memory model archs,
ad68076e
BA
4039 * such as IA-64).
4040 */
bc7f75fa
AK
4041 wmb();
4042
4043 tx_ring->next_to_use = i;
4044 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
4045 /*
4046 * we need this if more than one processor can write to our tail
4047 * at a time, it synchronizes IO on IA64/Altix systems
4048 */
bc7f75fa
AK
4049 mmiowb();
4050}
4051
4052#define MINIMUM_DHCP_PACKET_SIZE 282
4053static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4054 struct sk_buff *skb)
4055{
4056 struct e1000_hw *hw = &adapter->hw;
4057 u16 length, offset;
4058
4059 if (vlan_tx_tag_present(skb)) {
8e95a202
JP
4060 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4061 (adapter->hw.mng_cookie.status &
bc7f75fa
AK
4062 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4063 return 0;
4064 }
4065
4066 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4067 return 0;
4068
4069 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4070 return 0;
4071
4072 {
4073 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4074 struct udphdr *udp;
4075
4076 if (ip->protocol != IPPROTO_UDP)
4077 return 0;
4078
4079 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4080 if (ntohs(udp->dest) != 67)
4081 return 0;
4082
4083 offset = (u8 *)udp + 8 - skb->data;
4084 length = skb->len - offset;
4085 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4086 }
4087
4088 return 0;
4089}
4090
4091static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4092{
4093 struct e1000_adapter *adapter = netdev_priv(netdev);
4094
4095 netif_stop_queue(netdev);
ad68076e
BA
4096 /*
4097 * Herbert's original patch had:
bc7f75fa 4098 * smp_mb__after_netif_stop_queue();
ad68076e
BA
4099 * but since that doesn't exist yet, just open code it.
4100 */
bc7f75fa
AK
4101 smp_mb();
4102
ad68076e
BA
4103 /*
4104 * We need to check again in a case another CPU has just
4105 * made room available.
4106 */
bc7f75fa
AK
4107 if (e1000_desc_unused(adapter->tx_ring) < size)
4108 return -EBUSY;
4109
4110 /* A reprieve! */
4111 netif_start_queue(netdev);
4112 ++adapter->restart_queue;
4113 return 0;
4114}
4115
4116static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4117{
4118 struct e1000_adapter *adapter = netdev_priv(netdev);
4119
4120 if (e1000_desc_unused(adapter->tx_ring) >= size)
4121 return 0;
4122 return __e1000_maybe_stop_tx(netdev, size);
4123}
4124
4125#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
4126static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4127 struct net_device *netdev)
bc7f75fa
AK
4128{
4129 struct e1000_adapter *adapter = netdev_priv(netdev);
4130 struct e1000_ring *tx_ring = adapter->tx_ring;
4131 unsigned int first;
4132 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4133 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4134 unsigned int tx_flags = 0;
e743d313 4135 unsigned int len = skb_headlen(skb);
4e6c709c
AK
4136 unsigned int nr_frags;
4137 unsigned int mss;
bc7f75fa
AK
4138 int count = 0;
4139 int tso;
4140 unsigned int f;
bc7f75fa
AK
4141
4142 if (test_bit(__E1000_DOWN, &adapter->state)) {
4143 dev_kfree_skb_any(skb);
4144 return NETDEV_TX_OK;
4145 }
4146
4147 if (skb->len <= 0) {
4148 dev_kfree_skb_any(skb);
4149 return NETDEV_TX_OK;
4150 }
4151
4152 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
4153 /*
4154 * The controller does a simple calculation to
bc7f75fa
AK
4155 * make sure there is enough room in the FIFO before
4156 * initiating the DMA for each buffer. The calc is:
4157 * 4 = ceil(buffer len/mss). To make sure we don't
4158 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
4159 * drops.
4160 */
bc7f75fa
AK
4161 if (mss) {
4162 u8 hdr_len;
4163 max_per_txd = min(mss << 2, max_per_txd);
4164 max_txd_pwr = fls(max_per_txd) - 1;
4165
ad68076e
BA
4166 /*
4167 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4168 * points to just header, pull a few bytes of payload from
4169 * frags into skb->data
4170 */
bc7f75fa 4171 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
4172 /*
4173 * we do this workaround for ES2LAN, but it is un-necessary,
4174 * avoiding it could save a lot of cycles
4175 */
4e6c709c 4176 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
4177 unsigned int pull_size;
4178
4179 pull_size = min((unsigned int)4, skb->data_len);
4180 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4181 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
4182 dev_kfree_skb_any(skb);
4183 return NETDEV_TX_OK;
4184 }
e743d313 4185 len = skb_headlen(skb);
bc7f75fa
AK
4186 }
4187 }
4188
4189 /* reserve a descriptor for the offload context */
4190 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4191 count++;
4192 count++;
4193
4194 count += TXD_USE_COUNT(len, max_txd_pwr);
4195
4196 nr_frags = skb_shinfo(skb)->nr_frags;
4197 for (f = 0; f < nr_frags; f++)
4198 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4199 max_txd_pwr);
4200
4201 if (adapter->hw.mac.tx_pkt_filtering)
4202 e1000_transfer_dhcp_info(adapter, skb);
4203
ad68076e
BA
4204 /*
4205 * need: count + 2 desc gap to keep tail from touching
4206 * head, otherwise try next time
4207 */
92af3e95 4208 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4209 return NETDEV_TX_BUSY;
bc7f75fa
AK
4210
4211 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4212 tx_flags |= E1000_TX_FLAGS_VLAN;
4213 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4214 }
4215
4216 first = tx_ring->next_to_use;
4217
4218 tso = e1000_tso(adapter, skb);
4219 if (tso < 0) {
4220 dev_kfree_skb_any(skb);
bc7f75fa
AK
4221 return NETDEV_TX_OK;
4222 }
4223
4224 if (tso)
4225 tx_flags |= E1000_TX_FLAGS_TSO;
4226 else if (e1000_tx_csum(adapter, skb))
4227 tx_flags |= E1000_TX_FLAGS_CSUM;
4228
ad68076e
BA
4229 /*
4230 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4231 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
4232 * no longer assume, we must.
4233 */
bc7f75fa
AK
4234 if (skb->protocol == htons(ETH_P_IP))
4235 tx_flags |= E1000_TX_FLAGS_IPV4;
4236
1b7719c4 4237 /* if count is 0 then mapping error has occured */
bc7f75fa 4238 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD
4239 if (count) {
4240 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD
4241 /* Make sure there is space in the ring for the next send. */
4242 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4243
4244 } else {
bc7f75fa 4245 dev_kfree_skb_any(skb);
1b7719c4
AD
4246 tx_ring->buffer_info[first].time_stamp = 0;
4247 tx_ring->next_to_use = first;
bc7f75fa
AK
4248 }
4249
bc7f75fa
AK
4250 return NETDEV_TX_OK;
4251}
4252
4253/**
4254 * e1000_tx_timeout - Respond to a Tx Hang
4255 * @netdev: network interface device structure
4256 **/
4257static void e1000_tx_timeout(struct net_device *netdev)
4258{
4259 struct e1000_adapter *adapter = netdev_priv(netdev);
4260
4261 /* Do the reset outside of interrupt context */
4262 adapter->tx_timeout_count++;
4263 schedule_work(&adapter->reset_task);
4264}
4265
4266static void e1000_reset_task(struct work_struct *work)
4267{
4268 struct e1000_adapter *adapter;
4269 adapter = container_of(work, struct e1000_adapter, reset_task);
4270
4271 e1000e_reinit_locked(adapter);
4272}
4273
4274/**
4275 * e1000_get_stats - Get System Network Statistics
4276 * @netdev: network interface device structure
4277 *
4278 * Returns the address of the device statistics structure.
4279 * The statistics are actually updated from the timer callback.
4280 **/
4281static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4282{
bc7f75fa 4283 /* only return the current stats */
7274c20f 4284 return &netdev->stats;
bc7f75fa
AK
4285}
4286
4287/**
4288 * e1000_change_mtu - Change the Maximum Transfer Unit
4289 * @netdev: network interface device structure
4290 * @new_mtu: new value for maximum frame size
4291 *
4292 * Returns 0 on success, negative on failure
4293 **/
4294static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4295{
4296 struct e1000_adapter *adapter = netdev_priv(netdev);
4297 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4298
2adc55c9
BA
4299 /* Jumbo frame support */
4300 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4301 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4302 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4303 return -EINVAL;
4304 }
4305
2adc55c9
BA
4306 /* Supported frame sizes */
4307 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4308 (max_frame > adapter->max_hw_frame_size)) {
4309 e_err("Unsupported MTU setting\n");
bc7f75fa
AK
4310 return -EINVAL;
4311 }
4312
6f461f6c
BA
4313 /* 82573 Errata 17 */
4314 if (((adapter->hw.mac.type == e1000_82573) ||
4315 (adapter->hw.mac.type == e1000_82574)) &&
4316 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4317 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4318 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4319 }
4320
bc7f75fa
AK
4321 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4322 msleep(1);
610c9928 4323 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4324 adapter->max_frame_size = max_frame;
610c9928
BA
4325 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4326 netdev->mtu = new_mtu;
bc7f75fa
AK
4327 if (netif_running(netdev))
4328 e1000e_down(adapter);
4329
ad68076e
BA
4330 /*
4331 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
4332 * means we reserve 2 more, this pushes us to allocate from the next
4333 * larger slab size.
ad68076e 4334 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
4335 * However with the new *_jumbo_rx* routines, jumbo receives will use
4336 * fragmented skbs
ad68076e 4337 */
bc7f75fa 4338
9926146b 4339 if (max_frame <= 2048)
bc7f75fa
AK
4340 adapter->rx_buffer_len = 2048;
4341 else
4342 adapter->rx_buffer_len = 4096;
4343
4344 /* adjust allocation if LPE protects us, and we aren't using SBP */
4345 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4346 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4347 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4348 + ETH_FCS_LEN;
bc7f75fa 4349
bc7f75fa
AK
4350 if (netif_running(netdev))
4351 e1000e_up(adapter);
4352 else
4353 e1000e_reset(adapter);
4354
4355 clear_bit(__E1000_RESETTING, &adapter->state);
4356
4357 return 0;
4358}
4359
4360static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4361 int cmd)
4362{
4363 struct e1000_adapter *adapter = netdev_priv(netdev);
4364 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4365
318a94d6 4366 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
4367 return -EOPNOTSUPP;
4368
4369 switch (cmd) {
4370 case SIOCGMIIPHY:
4371 data->phy_id = adapter->hw.phy.addr;
4372 break;
4373 case SIOCGMIIREG:
b16a002e
BA
4374 e1000_phy_read_status(adapter);
4375
7c25769f
BA
4376 switch (data->reg_num & 0x1F) {
4377 case MII_BMCR:
4378 data->val_out = adapter->phy_regs.bmcr;
4379 break;
4380 case MII_BMSR:
4381 data->val_out = adapter->phy_regs.bmsr;
4382 break;
4383 case MII_PHYSID1:
4384 data->val_out = (adapter->hw.phy.id >> 16);
4385 break;
4386 case MII_PHYSID2:
4387 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4388 break;
4389 case MII_ADVERTISE:
4390 data->val_out = adapter->phy_regs.advertise;
4391 break;
4392 case MII_LPA:
4393 data->val_out = adapter->phy_regs.lpa;
4394 break;
4395 case MII_EXPANSION:
4396 data->val_out = adapter->phy_regs.expansion;
4397 break;
4398 case MII_CTRL1000:
4399 data->val_out = adapter->phy_regs.ctrl1000;
4400 break;
4401 case MII_STAT1000:
4402 data->val_out = adapter->phy_regs.stat1000;
4403 break;
4404 case MII_ESTATUS:
4405 data->val_out = adapter->phy_regs.estatus;
4406 break;
4407 default:
bc7f75fa
AK
4408 return -EIO;
4409 }
bc7f75fa
AK
4410 break;
4411 case SIOCSMIIREG:
4412 default:
4413 return -EOPNOTSUPP;
4414 }
4415 return 0;
4416}
4417
4418static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4419{
4420 switch (cmd) {
4421 case SIOCGMIIPHY:
4422 case SIOCGMIIREG:
4423 case SIOCSMIIREG:
4424 return e1000_mii_ioctl(netdev, ifr, cmd);
4425 default:
4426 return -EOPNOTSUPP;
4427 }
4428}
4429
a4f58f54
BA
4430static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4431{
4432 struct e1000_hw *hw = &adapter->hw;
4433 u32 i, mac_reg;
4434 u16 phy_reg;
4435 int retval = 0;
4436
4437 /* copy MAC RARs to PHY RARs */
4438 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4439 mac_reg = er32(RAL(i));
4440 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4441 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4442 mac_reg = er32(RAH(i));
4443 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4444 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4445 }
4446
4447 /* copy MAC MTA to PHY MTA */
4448 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4449 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4450 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4451 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4452 }
4453
4454 /* configure PHY Rx Control register */
4455 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4456 mac_reg = er32(RCTL);
4457 if (mac_reg & E1000_RCTL_UPE)
4458 phy_reg |= BM_RCTL_UPE;
4459 if (mac_reg & E1000_RCTL_MPE)
4460 phy_reg |= BM_RCTL_MPE;
4461 phy_reg &= ~(BM_RCTL_MO_MASK);
4462 if (mac_reg & E1000_RCTL_MO_3)
4463 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4464 << BM_RCTL_MO_SHIFT);
4465 if (mac_reg & E1000_RCTL_BAM)
4466 phy_reg |= BM_RCTL_BAM;
4467 if (mac_reg & E1000_RCTL_PMCF)
4468 phy_reg |= BM_RCTL_PMCF;
4469 mac_reg = er32(CTRL);
4470 if (mac_reg & E1000_CTRL_RFCE)
4471 phy_reg |= BM_RCTL_RFCE;
4472 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4473
4474 /* enable PHY wakeup in MAC register */
4475 ew32(WUFC, wufc);
4476 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4477
4478 /* configure and enable PHY wakeup in PHY registers */
4479 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4480 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4481
4482 /* activate PHY wakeup */
94d8186a 4483 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA
4484 if (retval) {
4485 e_err("Could not acquire PHY\n");
4486 return retval;
4487 }
4488 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4489 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4490 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4491 if (retval) {
4492 e_err("Could not read PHY page 769\n");
4493 goto out;
4494 }
4495 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4496 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4497 if (retval)
4498 e_err("Could not set PHY Host Wakeup bit\n");
4499out:
94d8186a 4500 hw->phy.ops.release(hw);
a4f58f54
BA
4501
4502 return retval;
4503}
4504
23606cf5
RW
4505static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4506 bool runtime)
bc7f75fa
AK
4507{
4508 struct net_device *netdev = pci_get_drvdata(pdev);
4509 struct e1000_adapter *adapter = netdev_priv(netdev);
4510 struct e1000_hw *hw = &adapter->hw;
4511 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW
4512 /* Runtime suspend should only enable wakeup for link changes */
4513 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK
4514 int retval = 0;
4515
4516 netif_device_detach(netdev);
4517
4518 if (netif_running(netdev)) {
4519 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4520 e1000e_down(adapter);
4521 e1000_free_irq(adapter);
4522 }
4662e82b 4523 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
4524
4525 retval = pci_save_state(pdev);
4526 if (retval)
4527 return retval;
4528
4529 status = er32(STATUS);
4530 if (status & E1000_STATUS_LU)
4531 wufc &= ~E1000_WUFC_LNKC;
4532
4533 if (wufc) {
4534 e1000_setup_rctl(adapter);
4535 e1000_set_multi(netdev);
4536
4537 /* turn on all-multi mode if wake on multicast is enabled */
4538 if (wufc & E1000_WUFC_MC) {
4539 rctl = er32(RCTL);
4540 rctl |= E1000_RCTL_MPE;
4541 ew32(RCTL, rctl);
4542 }
4543
4544 ctrl = er32(CTRL);
4545 /* advertise wake from D3Cold */
4546 #define E1000_CTRL_ADVD3WUC 0x00100000
4547 /* phy power management enable */
4548 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA
4549 ctrl |= E1000_CTRL_ADVD3WUC;
4550 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4551 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK
4552 ew32(CTRL, ctrl);
4553
318a94d6
JK
4554 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4555 adapter->hw.phy.media_type ==
4556 e1000_media_type_internal_serdes) {
bc7f75fa
AK
4557 /* keep the laser running in D3 */
4558 ctrl_ext = er32(CTRL_EXT);
93a23f48 4559 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK
4560 ew32(CTRL_EXT, ctrl_ext);
4561 }
4562
97ac8cae
BA
4563 if (adapter->flags & FLAG_IS_ICH)
4564 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4565
bc7f75fa
AK
4566 /* Allow time for pending master requests to run */
4567 e1000e_disable_pcie_master(&adapter->hw);
4568
82776a4b 4569 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA
4570 /* enable wakeup by the PHY */
4571 retval = e1000_init_phy_wakeup(adapter, wufc);
4572 if (retval)
4573 return retval;
4574 } else {
4575 /* enable wakeup by the MAC */
4576 ew32(WUFC, wufc);
4577 ew32(WUC, E1000_WUC_PME_EN);
4578 }
bc7f75fa
AK
4579 } else {
4580 ew32(WUC, 0);
4581 ew32(WUFC, 0);
bc7f75fa
AK
4582 }
4583
4f9de721
RW
4584 *enable_wake = !!wufc;
4585
bc7f75fa 4586 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA
4587 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4588 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4589 *enable_wake = true;
bc7f75fa
AK
4590
4591 if (adapter->hw.phy.type == e1000_phy_igp_3)
4592 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4593
ad68076e
BA
4594 /*
4595 * Release control of h/w to f/w. If f/w is AMT enabled, this
4596 * would have already happened in close and is redundant.
4597 */
bc7f75fa
AK
4598 e1000_release_hw_control(adapter);
4599
4600 pci_disable_device(pdev);
4601
4f9de721
RW
4602 return 0;
4603}
4604
4605static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4606{
4607 if (sleep && wake) {
4608 pci_prepare_to_sleep(pdev);
4609 return;
4610 }
4611
4612 pci_wake_from_d3(pdev, wake);
4613 pci_set_power_state(pdev, PCI_D3hot);
4614}
4615
4616static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4617 bool wake)
4618{
4619 struct net_device *netdev = pci_get_drvdata(pdev);
4620 struct e1000_adapter *adapter = netdev_priv(netdev);
4621
005cbdfc
AD
4622 /*
4623 * The pci-e switch on some quad port adapters will report a
4624 * correctable error when the MAC transitions from D0 to D3. To
4625 * prevent this we need to mask off the correctable errors on the
4626 * downstream port of the pci-e switch.
4627 */
4628 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4629 struct pci_dev *us_dev = pdev->bus->self;
4630 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4631 u16 devctl;
4632
4633 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4634 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4635 (devctl & ~PCI_EXP_DEVCTL_CERE));
4636
4f9de721 4637 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD
4638
4639 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4640 } else {
4f9de721 4641 e1000_power_off(pdev, sleep, wake);
005cbdfc 4642 }
bc7f75fa
AK
4643}
4644
6f461f6c
BA
4645#ifdef CONFIG_PCIEASPM
4646static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
4647{
4648 pci_disable_link_state(pdev, state);
4649}
4650#else
4651static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK
4652{
4653 int pos;
6f461f6c 4654 u16 reg16;
1eae4eb2
AK
4655
4656 /*
6f461f6c
BA
4657 * Both device and parent should have the same ASPM setting.
4658 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 4659 */
6f461f6c
BA
4660 pos = pci_pcie_cap(pdev);
4661 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
4662 reg16 &= ~state;
4663 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
4664
4665 pos = pci_pcie_cap(pdev->bus->self);
4666 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
4667 reg16 &= ~state;
4668 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
4669}
4670#endif
4671void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
4672{
4673 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
4674 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
4675 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
4676
4677 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK
4678}
4679
a0340162 4680#ifdef CONFIG_PM_OPS
23606cf5
RW
4681static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4682{
4683 return !!adapter->tx_ring->buffer_info;
4684}
4685
23606cf5
RW
4686static int __e1000_resume(struct pci_dev *pdev)
4687{
4688 struct net_device *netdev = pci_get_drvdata(pdev);
4689 struct e1000_adapter *adapter = netdev_priv(netdev);
4690 struct e1000_hw *hw = &adapter->hw;
4691 u32 err;
4692
bc7f75fa
AK
4693 pci_set_power_state(pdev, PCI_D0);
4694 pci_restore_state(pdev);
28b8f04a 4695 pci_save_state(pdev);
6f461f6c
BA
4696 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
4697 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
bc7f75fa 4698
4662e82b 4699 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK
4700 if (netif_running(netdev)) {
4701 err = e1000_request_irq(adapter);
4702 if (err)
4703 return err;
4704 }
4705
4706 e1000e_power_up_phy(adapter);
a4f58f54
BA
4707
4708 /* report the system wakeup cause from S3/S4 */
4709 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4710 u16 phy_data;
4711
4712 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4713 if (phy_data) {
4714 e_info("PHY Wakeup cause - %s\n",
4715 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4716 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4717 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4718 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4719 phy_data & E1000_WUS_LNKC ? "Link Status "
4720 " Change" : "other");
4721 }
4722 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4723 } else {
4724 u32 wus = er32(WUS);
4725 if (wus) {
4726 e_info("MAC Wakeup cause - %s\n",
4727 wus & E1000_WUS_EX ? "Unicast Packet" :
4728 wus & E1000_WUS_MC ? "Multicast Packet" :
4729 wus & E1000_WUS_BC ? "Broadcast Packet" :
4730 wus & E1000_WUS_MAG ? "Magic Packet" :
4731 wus & E1000_WUS_LNKC ? "Link Status Change" :
4732 "other");
4733 }
4734 ew32(WUS, ~0);
4735 }
4736
bc7f75fa 4737 e1000e_reset(adapter);
bc7f75fa
AK
4738
4739 e1000_init_manageability(adapter);
4740
4741 if (netif_running(netdev))
4742 e1000e_up(adapter);
4743
4744 netif_device_attach(netdev);
4745
ad68076e
BA
4746 /*
4747 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4748 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4749 * under the control of the driver.
4750 */
c43bc57e 4751 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4752 e1000_get_hw_control(adapter);
4753
4754 return 0;
4755}
23606cf5 4756
a0340162
RW
4757#ifdef CONFIG_PM_SLEEP
4758static int e1000_suspend(struct device *dev)
4759{
4760 struct pci_dev *pdev = to_pci_dev(dev);
4761 int retval;
4762 bool wake;
4763
4764 retval = __e1000_shutdown(pdev, &wake, false);
4765 if (!retval)
4766 e1000_complete_shutdown(pdev, true, wake);
4767
4768 return retval;
4769}
4770
23606cf5
RW
4771static int e1000_resume(struct device *dev)
4772{
4773 struct pci_dev *pdev = to_pci_dev(dev);
4774 struct net_device *netdev = pci_get_drvdata(pdev);
4775 struct e1000_adapter *adapter = netdev_priv(netdev);
4776
4777 if (e1000e_pm_ready(adapter))
4778 adapter->idle_check = true;
4779
4780 return __e1000_resume(pdev);
4781}
a0340162
RW
4782#endif /* CONFIG_PM_SLEEP */
4783
4784#ifdef CONFIG_PM_RUNTIME
4785static int e1000_runtime_suspend(struct device *dev)
4786{
4787 struct pci_dev *pdev = to_pci_dev(dev);
4788 struct net_device *netdev = pci_get_drvdata(pdev);
4789 struct e1000_adapter *adapter = netdev_priv(netdev);
4790
4791 if (e1000e_pm_ready(adapter)) {
4792 bool wake;
4793
4794 __e1000_shutdown(pdev, &wake, true);
4795 }
4796
4797 return 0;
4798}
4799
4800static int e1000_idle(struct device *dev)
4801{
4802 struct pci_dev *pdev = to_pci_dev(dev);
4803 struct net_device *netdev = pci_get_drvdata(pdev);
4804 struct e1000_adapter *adapter = netdev_priv(netdev);
4805
4806 if (!e1000e_pm_ready(adapter))
4807 return 0;
4808
4809 if (adapter->idle_check) {
4810 adapter->idle_check = false;
4811 if (!e1000e_has_link(adapter))
4812 pm_schedule_suspend(dev, MSEC_PER_SEC);
4813 }
4814
4815 return -EBUSY;
4816}
23606cf5
RW
4817
4818static int e1000_runtime_resume(struct device *dev)
4819{
4820 struct pci_dev *pdev = to_pci_dev(dev);
4821 struct net_device *netdev = pci_get_drvdata(pdev);
4822 struct e1000_adapter *adapter = netdev_priv(netdev);
4823
4824 if (!e1000e_pm_ready(adapter))
4825 return 0;
4826
4827 adapter->idle_check = !dev->power.runtime_auto;
4828 return __e1000_resume(pdev);
4829}
a0340162
RW
4830#endif /* CONFIG_PM_RUNTIME */
4831#endif /* CONFIG_PM_OPS */
bc7f75fa
AK
4832
4833static void e1000_shutdown(struct pci_dev *pdev)
4834{
4f9de721
RW
4835 bool wake = false;
4836
23606cf5 4837 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW
4838
4839 if (system_state == SYSTEM_POWER_OFF)
4840 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK
4841}
4842
4843#ifdef CONFIG_NET_POLL_CONTROLLER
4844/*
4845 * Polling 'interrupt' - used by things like netconsole to send skbs
4846 * without having to re-enable interrupts. It's not called while
4847 * the interrupt routine is executing.
4848 */
4849static void e1000_netpoll(struct net_device *netdev)
4850{
4851 struct e1000_adapter *adapter = netdev_priv(netdev);
4852
4853 disable_irq(adapter->pdev->irq);
4854 e1000_intr(adapter->pdev->irq, netdev);
4855
bc7f75fa
AK
4856 enable_irq(adapter->pdev->irq);
4857}
4858#endif
4859
4860/**
4861 * e1000_io_error_detected - called when PCI error is detected
4862 * @pdev: Pointer to PCI device
4863 * @state: The current pci connection state
4864 *
4865 * This function is called after a PCI bus error affecting
4866 * this device has been detected.
4867 */
4868static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4869 pci_channel_state_t state)
4870{
4871 struct net_device *netdev = pci_get_drvdata(pdev);
4872 struct e1000_adapter *adapter = netdev_priv(netdev);
4873
4874 netif_device_detach(netdev);
4875
c93b5a76
MM
4876 if (state == pci_channel_io_perm_failure)
4877 return PCI_ERS_RESULT_DISCONNECT;
4878
bc7f75fa
AK
4879 if (netif_running(netdev))
4880 e1000e_down(adapter);
4881 pci_disable_device(pdev);
4882
4883 /* Request a slot slot reset. */
4884 return PCI_ERS_RESULT_NEED_RESET;
4885}
4886
4887/**
4888 * e1000_io_slot_reset - called after the pci bus has been reset.
4889 * @pdev: Pointer to PCI device
4890 *
4891 * Restart the card from scratch, as if from a cold-boot. Implementation
4892 * resembles the first-half of the e1000_resume routine.
4893 */
4894static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4895{
4896 struct net_device *netdev = pci_get_drvdata(pdev);
4897 struct e1000_adapter *adapter = netdev_priv(netdev);
4898 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4899 int err;
111b9dc5 4900 pci_ers_result_t result;
bc7f75fa 4901
6f461f6c
BA
4902 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
4903 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 4904 err = pci_enable_device_mem(pdev);
6e4f6f6b 4905 if (err) {
bc7f75fa
AK
4906 dev_err(&pdev->dev,
4907 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB
4908 result = PCI_ERS_RESULT_DISCONNECT;
4909 } else {
4910 pci_set_master(pdev);
23606cf5 4911 pdev->state_saved = true;
111b9dc5 4912 pci_restore_state(pdev);
bc7f75fa 4913
111b9dc5
JB
4914 pci_enable_wake(pdev, PCI_D3hot, 0);
4915 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4916
111b9dc5
JB
4917 e1000e_reset(adapter);
4918 ew32(WUS, ~0);
4919 result = PCI_ERS_RESULT_RECOVERED;
4920 }
bc7f75fa 4921
111b9dc5
JB
4922 pci_cleanup_aer_uncorrect_error_status(pdev);
4923
4924 return result;
bc7f75fa
AK
4925}
4926
4927/**
4928 * e1000_io_resume - called when traffic can start flowing again.
4929 * @pdev: Pointer to PCI device
4930 *
4931 * This callback is called when the error recovery driver tells us that
4932 * its OK to resume normal operation. Implementation resembles the
4933 * second-half of the e1000_resume routine.
4934 */
4935static void e1000_io_resume(struct pci_dev *pdev)
4936{
4937 struct net_device *netdev = pci_get_drvdata(pdev);
4938 struct e1000_adapter *adapter = netdev_priv(netdev);
4939
4940 e1000_init_manageability(adapter);
4941
4942 if (netif_running(netdev)) {
4943 if (e1000e_up(adapter)) {
4944 dev_err(&pdev->dev,
4945 "can't bring device back up after reset\n");
4946 return;
4947 }
4948 }
4949
4950 netif_device_attach(netdev);
4951
ad68076e
BA
4952 /*
4953 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4954 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4955 * under the control of the driver.
4956 */
c43bc57e 4957 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4958 e1000_get_hw_control(adapter);
4959
4960}
4961
4962static void e1000_print_device_info(struct e1000_adapter *adapter)
4963{
4964 struct e1000_hw *hw = &adapter->hw;
4965 struct net_device *netdev = adapter->netdev;
69e3fd8c 4966 u32 pba_num;
bc7f75fa
AK
4967
4968 /* print bus type/speed/width info */
7c510e4b 4969 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK
4970 /* bus width */
4971 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4972 "Width x1"),
4973 /* MAC address */
7c510e4b 4974 netdev->dev_addr);
44defeb3
JK
4975 e_info("Intel(R) PRO/%s Network Connection\n",
4976 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4977 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
4978 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4979 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
4980}
4981
10aa4c04
AK
4982static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4983{
4984 struct e1000_hw *hw = &adapter->hw;
4985 int ret_val;
4986 u16 buf = 0;
4987
4988 if (hw->mac.type != e1000_82573)
4989 return;
4990
4991 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4992 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4993 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP
4994 dev_warn(&adapter->pdev->dev,
4995 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 4996 }
10aa4c04
AK
4997}
4998
651c2466
SH
4999static const struct net_device_ops e1000e_netdev_ops = {
5000 .ndo_open = e1000_open,
5001 .ndo_stop = e1000_close,
00829823 5002 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH
5003 .ndo_get_stats = e1000_get_stats,
5004 .ndo_set_multicast_list = e1000_set_multi,
5005 .ndo_set_mac_address = e1000_set_mac,
5006 .ndo_change_mtu = e1000_change_mtu,
5007 .ndo_do_ioctl = e1000_ioctl,
5008 .ndo_tx_timeout = e1000_tx_timeout,
5009 .ndo_validate_addr = eth_validate_addr,
5010
5011 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5012 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5013 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5014#ifdef CONFIG_NET_POLL_CONTROLLER
5015 .ndo_poll_controller = e1000_netpoll,
5016#endif
5017};
5018
bc7f75fa
AK
5019/**
5020 * e1000_probe - Device Initialization Routine
5021 * @pdev: PCI device information struct
5022 * @ent: entry in e1000_pci_tbl
5023 *
5024 * Returns 0 on success, negative on failure
5025 *
5026 * e1000_probe initializes an adapter identified by a pci_dev structure.
5027 * The OS initialization, configuring of the adapter private structure,
5028 * and a hardware reset occur.
5029 **/
5030static int __devinit e1000_probe(struct pci_dev *pdev,
5031 const struct pci_device_id *ent)
5032{
5033 struct net_device *netdev;
5034 struct e1000_adapter *adapter;
5035 struct e1000_hw *hw;
5036 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
5037 resource_size_t mmio_start, mmio_len;
5038 resource_size_t flash_start, flash_len;
bc7f75fa
AK
5039
5040 static int cards_found;
5041 int i, err, pci_using_dac;
5042 u16 eeprom_data = 0;
5043 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5044
6f461f6c
BA
5045 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5046 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5047
f0f422e5 5048 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
5049 if (err)
5050 return err;
5051
5052 pci_using_dac = 0;
6a35528a 5053 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 5054 if (!err) {
6a35528a 5055 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK
5056 if (!err)
5057 pci_using_dac = 1;
5058 } else {
284901a9 5059 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK
5060 if (err) {
5061 err = pci_set_consistent_dma_mask(pdev,
284901a9 5062 DMA_BIT_MASK(32));
bc7f75fa
AK
5063 if (err) {
5064 dev_err(&pdev->dev, "No usable DMA "
5065 "configuration, aborting\n");
5066 goto err_dma;
5067 }
5068 }
5069 }
5070
e8de1481 5071 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA
5072 pci_select_bars(pdev, IORESOURCE_MEM),
5073 e1000e_driver_name);
bc7f75fa
AK
5074 if (err)
5075 goto err_pci_reg;
5076
68eac460 5077 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5078 pci_enable_pcie_error_reporting(pdev);
68eac460 5079
bc7f75fa 5080 pci_set_master(pdev);
438b365a
BA
5081 /* PCI config space info */
5082 err = pci_save_state(pdev);
5083 if (err)
5084 goto err_alloc_etherdev;
bc7f75fa
AK
5085
5086 err = -ENOMEM;
5087 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5088 if (!netdev)
5089 goto err_alloc_etherdev;
5090
bc7f75fa
AK
5091 SET_NETDEV_DEV(netdev, &pdev->dev);
5092
5093 pci_set_drvdata(pdev, netdev);
5094 adapter = netdev_priv(netdev);
5095 hw = &adapter->hw;
5096 adapter->netdev = netdev;
5097 adapter->pdev = pdev;
5098 adapter->ei = ei;
5099 adapter->pba = ei->pba;
5100 adapter->flags = ei->flags;
eb7c3adb 5101 adapter->flags2 = ei->flags2;
bc7f75fa
AK
5102 adapter->hw.adapter = adapter;
5103 adapter->hw.mac.type = ei->mac;
2adc55c9 5104 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK
5105 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5106
5107 mmio_start = pci_resource_start(pdev, 0);
5108 mmio_len = pci_resource_len(pdev, 0);
5109
5110 err = -EIO;
5111 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5112 if (!adapter->hw.hw_addr)
5113 goto err_ioremap;
5114
5115 if ((adapter->flags & FLAG_HAS_FLASH) &&
5116 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5117 flash_start = pci_resource_start(pdev, 1);
5118 flash_len = pci_resource_len(pdev, 1);
5119 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5120 if (!adapter->hw.flash_address)
5121 goto err_flashmap;
5122 }
5123
5124 /* construct the net_device struct */
651c2466 5125 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5126 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK
5127 netdev->watchdog_timeo = 5 * HZ;
5128 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK
5129 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5130
5131 netdev->mem_start = mmio_start;
5132 netdev->mem_end = mmio_start + mmio_len;
5133
5134 adapter->bd_number = cards_found++;
5135
4662e82b
BA
5136 e1000e_check_options(adapter);
5137
bc7f75fa
AK
5138 /* setup adapter struct */
5139 err = e1000_sw_init(adapter);
5140 if (err)
5141 goto err_sw_init;
5142
5143 err = -EIO;
5144
5145 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5146 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5147 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5148
69e3fd8c 5149 err = ei->get_variants(adapter);
bc7f75fa
AK
5150 if (err)
5151 goto err_hw_init;
5152
4a770358
BA
5153 if ((adapter->flags & FLAG_IS_ICH) &&
5154 (adapter->flags & FLAG_READ_ONLY_NVM))
5155 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5156
bc7f75fa
AK
5157 hw->mac.ops.get_bus_info(&adapter->hw);
5158
318a94d6 5159 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
5160
5161 /* Copper options */
318a94d6 5162 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
5163 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5164 adapter->hw.phy.disable_polarity_correction = 0;
5165 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5166 }
5167
5168 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5169 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
5170
5171 netdev->features = NETIF_F_SG |
5172 NETIF_F_HW_CSUM |
5173 NETIF_F_HW_VLAN_TX |
5174 NETIF_F_HW_VLAN_RX;
5175
5176 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5177 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5178
5179 netdev->features |= NETIF_F_TSO;
5180 netdev->features |= NETIF_F_TSO6;
5181
a5136e23
JK
5182 netdev->vlan_features |= NETIF_F_TSO;
5183 netdev->vlan_features |= NETIF_F_TSO6;
5184 netdev->vlan_features |= NETIF_F_HW_CSUM;
5185 netdev->vlan_features |= NETIF_F_SG;
5186
bc7f75fa
AK
5187 if (pci_using_dac)
5188 netdev->features |= NETIF_F_HIGHDMA;
5189
bc7f75fa
AK
5190 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5191 adapter->flags |= FLAG_MNG_PT_ENABLED;
5192
ad68076e
BA
5193 /*
5194 * before reading the NVM, reset the controller to
5195 * put the device in a known good starting state
5196 */
bc7f75fa
AK
5197 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5198
5199 /*
5200 * systems with ASPM and others may see the checksum fail on the first
5201 * attempt. Let's give it a few tries
5202 */
5203 for (i = 0;; i++) {
5204 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5205 break;
5206 if (i == 2) {
44defeb3 5207 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
5208 err = -EIO;
5209 goto err_eeprom;
5210 }
5211 }
5212
10aa4c04
AK
5213 e1000_eeprom_checks(adapter);
5214
608f8a0d 5215 /* copy the MAC address */
bc7f75fa 5216 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5217 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
5218
5219 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5220 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5221
5222 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5223 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK
5224 err = -EIO;
5225 goto err_eeprom;
5226 }
5227
5228 init_timer(&adapter->watchdog_timer);
5229 adapter->watchdog_timer.function = &e1000_watchdog;
5230 adapter->watchdog_timer.data = (unsigned long) adapter;
5231
5232 init_timer(&adapter->phy_info_timer);
5233 adapter->phy_info_timer.function = &e1000_update_phy_info;
5234 adapter->phy_info_timer.data = (unsigned long) adapter;
5235
5236 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5237 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB
5238 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5239 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5240 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5241
bc7f75fa
AK
5242 /* Initialize link parameters. User can change them with ethtool */
5243 adapter->hw.mac.autoneg = 1;
309af40b 5244 adapter->fc_autoneg = 1;
5c48ef3e
BA
5245 adapter->hw.fc.requested_mode = e1000_fc_default;
5246 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK
5247 adapter->hw.phy.autoneg_advertised = 0x2f;
5248
5249 /* ring size defaults */
5250 adapter->rx_ring->count = 256;
5251 adapter->tx_ring->count = 256;
5252
5253 /*
5254 * Initial Wake on LAN setting - If APM wake is enabled in
5255 * the EEPROM, enable the ACPI Magic Packet filter
5256 */
5257 if (adapter->flags & FLAG_APME_IN_WUC) {
5258 /* APME bit in EEPROM is mapped to WUC.APME */
5259 eeprom_data = er32(WUC);
5260 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA
5261 if (eeprom_data & E1000_WUC_PHY_WAKE)
5262 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK
5263 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5264 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5265 (adapter->hw.bus.func == 1))
5266 e1000_read_nvm(&adapter->hw,
5267 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5268 else
5269 e1000_read_nvm(&adapter->hw,
5270 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5271 }
5272
5273 /* fetch WoL from EEPROM */
5274 if (eeprom_data & eeprom_apme_mask)
5275 adapter->eeprom_wol |= E1000_WUFC_MAG;
5276
5277 /*
5278 * now that we have the eeprom settings, apply the special cases
5279 * where the eeprom may be wrong or the board simply won't support
5280 * wake on lan on a particular port
5281 */
5282 if (!(adapter->flags & FLAG_HAS_WOL))
5283 adapter->eeprom_wol = 0;
5284
5285 /* initialize the wol settings based on the eeprom settings */
5286 adapter->wol = adapter->eeprom_wol;
6ff68026 5287 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5288
84527590
BA
5289 /* save off EEPROM version number */
5290 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5291
bc7f75fa
AK
5292 /* reset the hardware with the new settings */
5293 e1000e_reset(adapter);
5294
ad68076e
BA
5295 /*
5296 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5297 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5298 * under the control of the driver.
5299 */
c43bc57e 5300 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5301 e1000_get_hw_control(adapter);
5302
bc7f75fa
AK
5303 strcpy(netdev->name, "eth%d");
5304 err = register_netdev(netdev);
5305 if (err)
5306 goto err_register;
5307
9c563d20
JB
5308 /* carrier off reporting is important to ethtool even BEFORE open */
5309 netif_carrier_off(netdev);
5310
bc7f75fa
AK
5311 e1000_print_device_info(adapter);
5312
23606cf5
RW
5313 if (pci_dev_run_wake(pdev)) {
5314 pm_runtime_set_active(&pdev->dev);
5315 pm_runtime_enable(&pdev->dev);
5316 }
5317 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5318
bc7f75fa
AK
5319 return 0;
5320
5321err_register:
c43bc57e
JB
5322 if (!(adapter->flags & FLAG_HAS_AMT))
5323 e1000_release_hw_control(adapter);
bc7f75fa
AK
5324err_eeprom:
5325 if (!e1000_check_reset_block(&adapter->hw))
5326 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5327err_hw_init:
bc7f75fa 5328
bc7f75fa
AK
5329 kfree(adapter->tx_ring);
5330 kfree(adapter->rx_ring);
5331err_sw_init:
c43bc57e
JB
5332 if (adapter->hw.flash_address)
5333 iounmap(adapter->hw.flash_address);
e82f54ba 5334 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5335err_flashmap:
bc7f75fa
AK
5336 iounmap(adapter->hw.hw_addr);
5337err_ioremap:
5338 free_netdev(netdev);
5339err_alloc_etherdev:
f0f422e5
BA
5340 pci_release_selected_regions(pdev,
5341 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5342err_pci_reg:
5343err_dma:
5344 pci_disable_device(pdev);
5345 return err;
5346}
5347
5348/**
5349 * e1000_remove - Device Removal Routine
5350 * @pdev: PCI device information struct
5351 *
5352 * e1000_remove is called by the PCI subsystem to alert the driver
5353 * that it should release a PCI device. The could be caused by a
5354 * Hot-Plug event, or because the driver is going to be removed from
5355 * memory.
5356 **/
5357static void __devexit e1000_remove(struct pci_dev *pdev)
5358{
5359 struct net_device *netdev = pci_get_drvdata(pdev);
5360 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW
5361 bool down = test_bit(__E1000_DOWN, &adapter->state);
5362
5363 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5364
ad68076e
BA
5365 /*
5366 * flush_scheduled work may reschedule our watchdog task, so
5367 * explicitly disable watchdog tasks from being rescheduled
5368 */
23606cf5
RW
5369 if (!down)
5370 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK
5371 del_timer_sync(&adapter->watchdog_timer);
5372 del_timer_sync(&adapter->phy_info_timer);
5373
41cec6f1
BA
5374 cancel_work_sync(&adapter->reset_task);
5375 cancel_work_sync(&adapter->watchdog_task);
5376 cancel_work_sync(&adapter->downshift_task);
5377 cancel_work_sync(&adapter->update_phy_task);
5378 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK
5379 flush_scheduled_work();
5380
17f208de
BA
5381 if (!(netdev->flags & IFF_UP))
5382 e1000_power_down_phy(adapter);
5383
23606cf5
RW
5384 /* Don't lie to e1000_close() down the road. */
5385 if (!down)
5386 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA
5387 unregister_netdev(netdev);
5388
23606cf5
RW
5389 if (pci_dev_run_wake(pdev)) {
5390 pm_runtime_disable(&pdev->dev);
5391 pm_runtime_set_suspended(&pdev->dev);
5392 }
5393 pm_runtime_put_noidle(&pdev->dev);
5394
ad68076e
BA
5395 /*
5396 * Release control of h/w to f/w. If f/w is AMT enabled, this
5397 * would have already happened in close and is redundant.
5398 */
bc7f75fa
AK
5399 e1000_release_hw_control(adapter);
5400
4662e82b 5401 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
5402 kfree(adapter->tx_ring);
5403 kfree(adapter->rx_ring);
5404
5405 iounmap(adapter->hw.hw_addr);
5406 if (adapter->hw.flash_address)
5407 iounmap(adapter->hw.flash_address);
f0f422e5
BA
5408 pci_release_selected_regions(pdev,
5409 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5410
5411 free_netdev(netdev);
5412
111b9dc5 5413 /* AER disable */
19d5afd4 5414 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5415
bc7f75fa
AK
5416 pci_disable_device(pdev);
5417}
5418
5419/* PCI Error Recovery (ERS) */
5420static struct pci_error_handlers e1000_err_handler = {
5421 .error_detected = e1000_io_error_detected,
5422 .slot_reset = e1000_io_slot_reset,
5423 .resume = e1000_io_resume,
5424};
5425
a3aa1884 5426static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK
5427 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5428 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5429 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5430 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5431 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5432 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
5433 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5434 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5435 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5436
bc7f75fa
AK
5437 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5438 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5439 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5440 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5441
bc7f75fa
AK
5442 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5443 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5444 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5445
4662e82b 5446 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5447 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5449
bc7f75fa
AK
5450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5451 board_80003es2lan },
5452 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5453 board_80003es2lan },
5454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5455 board_80003es2lan },
5456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5457 board_80003es2lan },
ad68076e 5458
bc7f75fa
AK
5459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5462 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5467
bc7f75fa
AK
5468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA
5474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5477
5478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5479 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5481
f4187b56
BA
5482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5483 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5484
a4f58f54
BA
5485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5486 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5489
bc7f75fa
AK
5490 { } /* terminate list */
5491};
5492MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5493
a0340162 5494#ifdef CONFIG_PM_OPS
23606cf5 5495static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW
5496 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5497 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5498 e1000_runtime_resume, e1000_idle)
23606cf5 5499};
e50208a0 5500#endif
23606cf5 5501
bc7f75fa
AK
5502/* PCI Device API Driver */
5503static struct pci_driver e1000_driver = {
5504 .name = e1000e_driver_name,
5505 .id_table = e1000_pci_tbl,
5506 .probe = e1000_probe,
5507 .remove = __devexit_p(e1000_remove),
a0340162 5508#ifdef CONFIG_PM_OPS
23606cf5 5509 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK
5510#endif
5511 .shutdown = e1000_shutdown,
5512 .err_handler = &e1000_err_handler
5513};
5514
5515/**
5516 * e1000_init_module - Driver Registration Routine
5517 *
5518 * e1000_init_module is the first routine called when the driver is
5519 * loaded. All it does is register with the PCI subsystem.
5520 **/
5521static int __init e1000_init_module(void)
5522{
5523 int ret;
8544b9f7
BA
5524 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5525 e1000e_driver_version);
5526 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5527 ret = pci_register_driver(&e1000_driver);
53ec5498 5528
bc7f75fa
AK
5529 return ret;
5530}
5531module_init(e1000_init_module);
5532
5533/**
5534 * e1000_exit_module - Driver Exit Cleanup Routine
5535 *
5536 * e1000_exit_module is called just before the driver is removed
5537 * from memory.
5538 **/
5539static void __exit e1000_exit_module(void)
5540{
5541 pci_unregister_driver(&e1000_driver);
5542}
5543module_exit(e1000_exit_module);
5544
5545
5546MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5547MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5548MODULE_LICENSE("GPL");
5549MODULE_VERSION(DRV_VERSION);
5550
5551/* e1000_main.c */
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