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e1000e: enhance frame fragment detection
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
bc7f75fa
AK		 68/**
69 * e1000_desc_unused - calculate if we have unused descriptors
70 **/
71static int e1000_desc_unused(struct e1000_ring *ring)
72{
73 if (ring->next_to_clean > ring->next_to_use)
74 return ring->next_to_clean - ring->next_to_use - 1;
75
76 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
77}
78
79/**
ad68076e 80 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 81 * @adapter: board private structure
82 * @status: descriptor status field as written by hardware
83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
84 * @skb: pointer to sk_buff to be indicated to stack
85 **/
86static void e1000_receive_skb(struct e1000_adapter *adapter,
87 struct net_device *netdev,
88 struct sk_buff *skb,
a39fe742 89 u8 status, __le16 vlan)
bc7f75fa
AK		 90{
91 skb->protocol = eth_type_trans(skb, netdev);
92
93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
95 le16_to_cpu(vlan), skb);
bc7f75fa 96 else
89c88b16 97 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 98}
99
100/**
101 * e1000_rx_checksum - Receive Checksum Offload for 82543
102 * @adapter: board private structure
103 * @status_err: receive descriptor status and error fields
104 * @csum: receive descriptor csum field
105 * @sk_buff: socket buffer with received data
106 **/
107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
108 u32 csum, struct sk_buff *skb)
109{
110 u16 status = (u16)status_err;
111 u8 errors = (u8)(status_err >> 24);
112 skb->ip_summed = CHECKSUM_NONE;
113
114 /* Ignore Checksum bit is set */
115 if (status & E1000_RXD_STAT_IXSM)
116 return;
117 /* TCP/UDP checksum error bit is set */
118 if (errors & E1000_RXD_ERR_TCPE) {
119 /* let the stack verify checksum errors */
120 adapter->hw_csum_err++;
121 return;
122 }
123
124 /* TCP/UDP Checksum has not been calculated */
125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
126 return;
127
128 /* It must be a TCP or UDP packet with a valid checksum */
129 if (status & E1000_RXD_STAT_TCPCS) {
130 /* TCP checksum is good */
131 skb->ip_summed = CHECKSUM_UNNECESSARY;
132 } else {
ad68076e
BA		 133 /*
134 * IP fragment with UDP payload
135 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 136 * and then put the value in host order for further stack use.
137 */
a39fe742
AV		 138 __sum16 sum = (__force __sum16)htons(csum);
139 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 140 skb->ip_summed = CHECKSUM_COMPLETE;
141 }
142 adapter->hw_csum_good++;
143}
144
145/**
146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
147 * @adapter: address of board private structure
148 **/
149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
150 int cleaned_count)
151{
152 struct net_device *netdev = adapter->netdev;
153 struct pci_dev *pdev = adapter->pdev;
154 struct e1000_ring *rx_ring = adapter->rx_ring;
155 struct e1000_rx_desc *rx_desc;
156 struct e1000_buffer *buffer_info;
157 struct sk_buff *skb;
158 unsigned int i;
89d71a66 159 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 160
161 i = rx_ring->next_to_use;
162 buffer_info = &rx_ring->buffer_info[i];
163
164 while (cleaned_count--) {
165 skb = buffer_info->skb;
166 if (skb) {
167 skb_trim(skb, 0);
168 goto map_skb;
169 }
170
89d71a66 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 172 if (!skb) {
173 /* Better luck next round */
174 adapter->alloc_rx_buff_failed++;
175 break;
176 }
177
bc7f75fa
AK		 178 buffer_info->skb = skb;
179map_skb:
180 buffer_info->dma = pci_map_single(pdev, skb->data,
181 adapter->rx_buffer_len,
182 PCI_DMA_FROMDEVICE);
8d8bb39b 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 184 dev_err(&pdev->dev, "RX DMA map failed\n");
185 adapter->rx_dma_failed++;
186 break;
187 }
188
189 rx_desc = E1000_RX_DESC(*rx_ring, i);
190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
191
192 i++;
193 if (i == rx_ring->count)
194 i = 0;
195 buffer_info = &rx_ring->buffer_info[i];
196 }
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200 if (i-- == 0)
201 i = (rx_ring->count - 1);
202
ad68076e
BA		 203 /*
204 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 205 * know there are new descriptors to fetch. (Only
206 * applicable for weak-ordered memory model archs,
ad68076e
BA		 207 * such as IA-64).
208 */
bc7f75fa
AK		 209 wmb();
210 writel(i, adapter->hw.hw_addr + rx_ring->tail);
211 }
212}
213
214/**
215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
216 * @adapter: address of board private structure
217 **/
218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
219 int cleaned_count)
220{
221 struct net_device *netdev = adapter->netdev;
222 struct pci_dev *pdev = adapter->pdev;
223 union e1000_rx_desc_packet_split *rx_desc;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 struct e1000_buffer *buffer_info;
226 struct e1000_ps_page *ps_page;
227 struct sk_buff *skb;
228 unsigned int i, j;
229
230 i = rx_ring->next_to_use;
231 buffer_info = &rx_ring->buffer_info[i];
232
233 while (cleaned_count--) {
234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
235
236 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 237 ps_page = &buffer_info->ps_pages[j];
238 if (j >= adapter->rx_ps_pages) {
239 /* all unused desc entries get hw null ptr */
a39fe742 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 241 continue;
242 }
243 if (!ps_page->page) {
244 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 245 if (!ps_page->page) {
47f44e40
AK		 246 adapter->alloc_rx_buff_failed++;
247 goto no_buffers;
248 }
249 ps_page->dma = pci_map_page(pdev,
250 ps_page->page,
251 0, PAGE_SIZE,
252 PCI_DMA_FROMDEVICE);
8d8bb39b 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 254 dev_err(&adapter->pdev->dev,
255 "RX DMA page map failed\n");
256 adapter->rx_dma_failed++;
257 goto no_buffers;
bc7f75fa 258 }
bc7f75fa 259 }
47f44e40
AK		 260 /*
261 * Refresh the desc even if buffer_addrs
262 * didn't change because each write-back
263 * erases this info.
264 */
265 rx_desc->read.buffer_addr[j+1] =
266 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 267 }
268
89d71a66
ED		 269 skb = netdev_alloc_skb_ip_align(netdev,
270 adapter->rx_ps_bsize0);
bc7f75fa
AK		 271
272 if (!skb) {
273 adapter->alloc_rx_buff_failed++;
274 break;
275 }
276
bc7f75fa
AK		 277 buffer_info->skb = skb;
278 buffer_info->dma = pci_map_single(pdev, skb->data,
279 adapter->rx_ps_bsize0,
280 PCI_DMA_FROMDEVICE);
8d8bb39b 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 282 dev_err(&pdev->dev, "RX DMA map failed\n");
283 adapter->rx_dma_failed++;
284 /* cleanup skb */
285 dev_kfree_skb_any(skb);
286 buffer_info->skb = NULL;
287 break;
288 }
289
290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
291
292 i++;
293 if (i == rx_ring->count)
294 i = 0;
295 buffer_info = &rx_ring->buffer_info[i];
296 }
297
298no_buffers:
299 if (rx_ring->next_to_use != i) {
300 rx_ring->next_to_use = i;
301
302 if (!(i--))
303 i = (rx_ring->count - 1);
304
ad68076e
BA		 305 /*
306 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 307 * know there are new descriptors to fetch. (Only
308 * applicable for weak-ordered memory model archs,
ad68076e
BA		 309 * such as IA-64).
310 */
bc7f75fa 311 wmb();
ad68076e
BA		 312 /*
313 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 314 * descriptors are 32 bytes...so we increment tail
315 * twice as much.
316 */
317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
318 }
319}
320
97ac8cae
BA		 321/**
322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
323 * @adapter: address of board private structure
97ac8cae
BA		 324 * @cleaned_count: number of buffers to allocate this pass
325 **/
326
327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
328 int cleaned_count)
329{
330 struct net_device *netdev = adapter->netdev;
331 struct pci_dev *pdev = adapter->pdev;
332 struct e1000_rx_desc *rx_desc;
333 struct e1000_ring *rx_ring = adapter->rx_ring;
334 struct e1000_buffer *buffer_info;
335 struct sk_buff *skb;
336 unsigned int i;
89d71a66 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 338
339 i = rx_ring->next_to_use;
340 buffer_info = &rx_ring->buffer_info[i];
341
342 while (cleaned_count--) {
343 skb = buffer_info->skb;
344 if (skb) {
345 skb_trim(skb, 0);
346 goto check_page;
347 }
348
89d71a66 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 350 if (unlikely(!skb)) {
351 /* Better luck next round */
352 adapter->alloc_rx_buff_failed++;
353 break;
354 }
355
97ac8cae
BA		 356 buffer_info->skb = skb;
357check_page:
358 /* allocate a new page if necessary */
359 if (!buffer_info->page) {
360 buffer_info->page = alloc_page(GFP_ATOMIC);
361 if (unlikely(!buffer_info->page)) {
362 adapter->alloc_rx_buff_failed++;
363 break;
364 }
365 }
366
367 if (!buffer_info->dma)
368 buffer_info->dma = pci_map_page(pdev,
369 buffer_info->page, 0,
370 PAGE_SIZE,
371 PCI_DMA_FROMDEVICE);
372
373 rx_desc = E1000_RX_DESC(*rx_ring, i);
374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
375
376 if (unlikely(++i == rx_ring->count))
377 i = 0;
378 buffer_info = &rx_ring->buffer_info[i];
379 }
380
381 if (likely(rx_ring->next_to_use != i)) {
382 rx_ring->next_to_use = i;
383 if (unlikely(i-- == 0))
384 i = (rx_ring->count - 1);
385
386 /* Force memory writes to complete before letting h/w
387 * know there are new descriptors to fetch. (Only
388 * applicable for weak-ordered memory model archs,
389 * such as IA-64). */
390 wmb();
391 writel(i, adapter->hw.hw_addr + rx_ring->tail);
392 }
393}
394
bc7f75fa
AK		 395/**
396 * e1000_clean_rx_irq - Send received data up the network stack; legacy
397 * @adapter: board private structure
398 *
399 * the return value indicates whether actual cleaning was done, there
400 * is no guarantee that everything was cleaned
401 **/
402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
403 int *work_done, int work_to_do)
404{
405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 407 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 408 struct e1000_ring *rx_ring = adapter->rx_ring;
409 struct e1000_rx_desc *rx_desc, *next_rxd;
410 struct e1000_buffer *buffer_info, *next_buffer;
411 u32 length;
412 unsigned int i;
413 int cleaned_count = 0;
414 bool cleaned = 0;
415 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
416
417 i = rx_ring->next_to_clean;
418 rx_desc = E1000_RX_DESC(*rx_ring, i);
419 buffer_info = &rx_ring->buffer_info[i];
420
421 while (rx_desc->status & E1000_RXD_STAT_DD) {
422 struct sk_buff *skb;
423 u8 status;
424
425 if (*work_done >= work_to_do)
426 break;
427 (*work_done)++;
428
429 status = rx_desc->status;
430 skb = buffer_info->skb;
431 buffer_info->skb = NULL;
432
433 prefetch(skb->data - NET_IP_ALIGN);
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_rxd = E1000_RX_DESC(*rx_ring, i);
439 prefetch(next_rxd);
440
441 next_buffer = &rx_ring->buffer_info[i];
442
443 cleaned = 1;
444 cleaned_count++;
445 pci_unmap_single(pdev,
446 buffer_info->dma,
447 adapter->rx_buffer_len,
448 PCI_DMA_FROMDEVICE);
449 buffer_info->dma = 0;
450
451 length = le16_to_cpu(rx_desc->length);
452
b94b5028
JB		 453 /*
454 * !EOP means multiple descriptors were used to store a single
455 * packet, if that's the case we need to toss it. In fact, we
456 * need to toss every packet with the EOP bit clear and the
457 * next frame that _does_ have the EOP bit set, as it is by
458 * definition only a frame fragment
459 */
460 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
461 adapter->flags2 |= FLAG2_IS_DISCARDING;
462
463 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 464 /* All receives must fit into a single buffer */
3bb99fe2 465 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 466 /* recycle */
467 buffer_info->skb = skb;
b94b5028
JB		 468 if (status & E1000_RXD_STAT_EOP)
469 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 470 goto next_desc;
471 }
472
473 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
474 /* recycle */
475 buffer_info->skb = skb;
476 goto next_desc;
477 }
478
eb7c3adb
JK		 479 /* adjust length to remove Ethernet CRC */
480 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
481 length -= 4;
482
bc7f75fa
AK		 483 total_rx_bytes += length;
484 total_rx_packets++;
485
ad68076e
BA		 486 /*
487 * code added for copybreak, this should improve
bc7f75fa 488 * performance for small packets with large amounts
ad68076e
BA		 489 * of reassembly being done in the stack
490 */
bc7f75fa
AK		 491 if (length < copybreak) {
492 struct sk_buff *new_skb =
89d71a66 493 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 494 if (new_skb) {
808ff676
BA		 495 skb_copy_to_linear_data_offset(new_skb,
496 -NET_IP_ALIGN,
497 (skb->data -
498 NET_IP_ALIGN),
499 (length +
500 NET_IP_ALIGN));
bc7f75fa
AK		 501 /* save the skb in buffer_info as good */
502 buffer_info->skb = skb;
503 skb = new_skb;
504 }
505 /* else just continue with the old one */
506 }
507 /* end copybreak code */
508 skb_put(skb, length);
509
510 /* Receive Checksum Offload */
511 e1000_rx_checksum(adapter,
512 (u32)(status) |
513 ((u32)(rx_desc->errors) << 24),
514 le16_to_cpu(rx_desc->csum), skb);
515
516 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
517
518next_desc:
519 rx_desc->status = 0;
520
521 /* return some buffers to hardware, one at a time is too slow */
522 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
523 adapter->alloc_rx_buf(adapter, cleaned_count);
524 cleaned_count = 0;
525 }
526
527 /* use prefetched values */
528 rx_desc = next_rxd;
529 buffer_info = next_buffer;
530 }
531 rx_ring->next_to_clean = i;
532
533 cleaned_count = e1000_desc_unused(rx_ring);
534 if (cleaned_count)
535 adapter->alloc_rx_buf(adapter, cleaned_count);
536
bc7f75fa 537 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 538 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 539 netdev->stats.rx_bytes += total_rx_bytes;
540 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 541 return cleaned;
542}
543
bc7f75fa
AK		 544static void e1000_put_txbuf(struct e1000_adapter *adapter,
545 struct e1000_buffer *buffer_info)
546{
03b1320d
AD		 547 if (buffer_info->dma) {
548 if (buffer_info->mapped_as_page)
549 pci_unmap_page(adapter->pdev, buffer_info->dma,
550 buffer_info->length, PCI_DMA_TODEVICE);
551 else
552 pci_unmap_single(adapter->pdev, buffer_info->dma,
553 buffer_info->length,
554 PCI_DMA_TODEVICE);
555 buffer_info->dma = 0;
556 }
bc7f75fa
AK		 557 if (buffer_info->skb) {
558 dev_kfree_skb_any(buffer_info->skb);
559 buffer_info->skb = NULL;
560 }
1b7719c4 561 buffer_info->time_stamp = 0;
bc7f75fa
AK		 562}
563
41cec6f1 564static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 565{
41cec6f1
BA		 566 struct e1000_adapter *adapter = container_of(work,
567 struct e1000_adapter,
568 print_hang_task);
bc7f75fa
AK		 569 struct e1000_ring *tx_ring = adapter->tx_ring;
570 unsigned int i = tx_ring->next_to_clean;
571 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
572 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 573 struct e1000_hw *hw = &adapter->hw;
574 u16 phy_status, phy_1000t_status, phy_ext_status;
575 u16 pci_status;
576
577 e1e_rphy(hw, PHY_STATUS, &phy_status);
578 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
579 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 580
41cec6f1
BA		 581 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
582
583 /* detected Hardware unit hang */
584 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 585 " TDH <%x>\n"
586 " TDT <%x>\n"
587 " next_to_use <%x>\n"
588 " next_to_clean <%x>\n"
589 "buffer_info[next_to_clean]:\n"
590 " time_stamp <%lx>\n"
591 " next_to_watch <%x>\n"
592 " jiffies <%lx>\n"
41cec6f1
BA		 593 " next_to_watch.status <%x>\n"
594 "MAC Status <%x>\n"
595 "PHY Status <%x>\n"
596 "PHY 1000BASE-T Status <%x>\n"
597 "PHY Extended Status <%x>\n"
598 "PCI Status <%x>\n",
44defeb3
JK		 599 readl(adapter->hw.hw_addr + tx_ring->head),
600 readl(adapter->hw.hw_addr + tx_ring->tail),
601 tx_ring->next_to_use,
602 tx_ring->next_to_clean,
603 tx_ring->buffer_info[eop].time_stamp,
604 eop,
605 jiffies,
41cec6f1
BA		 606 eop_desc->upper.fields.status,
607 er32(STATUS),
608 phy_status,
609 phy_1000t_status,
610 phy_ext_status,
611 pci_status);
bc7f75fa
AK		 612}
613
614/**
615 * e1000_clean_tx_irq - Reclaim resources after transmit completes
616 * @adapter: board private structure
617 *
618 * the return value indicates whether actual cleaning was done, there
619 * is no guarantee that everything was cleaned
620 **/
621static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
622{
623 struct net_device *netdev = adapter->netdev;
624 struct e1000_hw *hw = &adapter->hw;
625 struct e1000_ring *tx_ring = adapter->tx_ring;
626 struct e1000_tx_desc *tx_desc, *eop_desc;
627 struct e1000_buffer *buffer_info;
628 unsigned int i, eop;
629 unsigned int count = 0;
bc7f75fa
AK		 630 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
631
632 i = tx_ring->next_to_clean;
633 eop = tx_ring->buffer_info[i].next_to_watch;
634 eop_desc = E1000_TX_DESC(*tx_ring, eop);
635
12d04a3c
AD		 636 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
637 (count < tx_ring->count)) {
a86043c2
JB		 638 bool cleaned = false;
639 for (; !cleaned; count++) {
bc7f75fa
AK		 640 tx_desc = E1000_TX_DESC(*tx_ring, i);
641 buffer_info = &tx_ring->buffer_info[i];
642 cleaned = (i == eop);
643
644 if (cleaned) {
645 struct sk_buff *skb = buffer_info->skb;
646 unsigned int segs, bytecount;
647 segs = skb_shinfo(skb)->gso_segs ?: 1;
648 /* multiply data chunks by size of headers */
649 bytecount = ((segs - 1) * skb_headlen(skb)) +
650 skb->len;
651 total_tx_packets += segs;
652 total_tx_bytes += bytecount;
653 }
654
655 e1000_put_txbuf(adapter, buffer_info);
656 tx_desc->upper.data = 0;
657
658 i++;
659 if (i == tx_ring->count)
660 i = 0;
661 }
662
663 eop = tx_ring->buffer_info[i].next_to_watch;
664 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 665 }
666
667 tx_ring->next_to_clean = i;
668
669#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 670 if (count && netif_carrier_ok(netdev) &&
671 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 672 /* Make sure that anybody stopping the queue after this
673 * sees the new next_to_clean.
674 */
675 smp_mb();
676
677 if (netif_queue_stopped(netdev) &&
678 !(test_bit(__E1000_DOWN, &adapter->state))) {
679 netif_wake_queue(netdev);
680 ++adapter->restart_queue;
681 }
682 }
683
684 if (adapter->detect_tx_hung) {
41cec6f1
BA		 685 /*
686 * Detect a transmit hang in hardware, this serializes the
687 * check with the clearing of time_stamp and movement of i
688 */
bc7f75fa 689 adapter->detect_tx_hung = 0;
12d04a3c
AD		 690 if (tx_ring->buffer_info[i].time_stamp &&
691 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 692 + (adapter->tx_timeout_factor * HZ)) &&
693 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 694 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 695 netif_stop_queue(netdev);
696 }
697 }
698 adapter->total_tx_bytes += total_tx_bytes;
699 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 700 netdev->stats.tx_bytes += total_tx_bytes;
701 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 702 return (count < tx_ring->count);
bc7f75fa
AK		 703}
704
bc7f75fa
AK		 705/**
706 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
707 * @adapter: board private structure
708 *
709 * the return value indicates whether actual cleaning was done, there
710 * is no guarantee that everything was cleaned
711 **/
712static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
713 int *work_done, int work_to_do)
714{
3bb99fe2 715 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 716 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
717 struct net_device *netdev = adapter->netdev;
718 struct pci_dev *pdev = adapter->pdev;
719 struct e1000_ring *rx_ring = adapter->rx_ring;
720 struct e1000_buffer *buffer_info, *next_buffer;
721 struct e1000_ps_page *ps_page;
722 struct sk_buff *skb;
723 unsigned int i, j;
724 u32 length, staterr;
725 int cleaned_count = 0;
726 bool cleaned = 0;
727 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
728
729 i = rx_ring->next_to_clean;
730 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
731 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
732 buffer_info = &rx_ring->buffer_info[i];
733
734 while (staterr & E1000_RXD_STAT_DD) {
735 if (*work_done >= work_to_do)
736 break;
737 (*work_done)++;
738 skb = buffer_info->skb;
739
740 /* in the packet split case this is header only */
741 prefetch(skb->data - NET_IP_ALIGN);
742
743 i++;
744 if (i == rx_ring->count)
745 i = 0;
746 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
747 prefetch(next_rxd);
748
749 next_buffer = &rx_ring->buffer_info[i];
750
751 cleaned = 1;
752 cleaned_count++;
753 pci_unmap_single(pdev, buffer_info->dma,
754 adapter->rx_ps_bsize0,
755 PCI_DMA_FROMDEVICE);
756 buffer_info->dma = 0;
757
b94b5028
JB		 758 /* see !EOP comment in other rx routine */
759 if (!(staterr & E1000_RXD_STAT_EOP))
760 adapter->flags2 |= FLAG2_IS_DISCARDING;
761
762 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 763 e_dbg("Packet Split buffers didn't pick up the full "
764 "packet\n");
bc7f75fa 765 dev_kfree_skb_irq(skb);
b94b5028
JB		 766 if (staterr & E1000_RXD_STAT_EOP)
767 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 768 goto next_desc;
769 }
770
771 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
772 dev_kfree_skb_irq(skb);
773 goto next_desc;
774 }
775
776 length = le16_to_cpu(rx_desc->wb.middle.length0);
777
778 if (!length) {
3bb99fe2
BA		 779 e_dbg("Last part of the packet spanning multiple "
780 "descriptors\n");
bc7f75fa
AK		 781 dev_kfree_skb_irq(skb);
782 goto next_desc;
783 }
784
785 /* Good Receive */
786 skb_put(skb, length);
787
788 {
ad68076e
BA		 789 /*
790 * this looks ugly, but it seems compiler issues make it
791 * more efficient than reusing j
792 */
bc7f75fa
AK		 793 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
794
ad68076e
BA		 795 /*
796 * page alloc/put takes too long and effects small packet
797 * throughput, so unsplit small packets and save the alloc/put
798 * only valid in softirq (napi) context to call kmap_*
799 */
bc7f75fa
AK		 800 if (l1 && (l1 <= copybreak) &&
801 ((length + l1) <= adapter->rx_ps_bsize0)) {
802 u8 *vaddr;
803
47f44e40 804 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 805
ad68076e
BA		 806 /*
807 * there is no documentation about how to call
bc7f75fa 808 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 809 * very long
810 */
bc7f75fa
AK		 811 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
812 PAGE_SIZE, PCI_DMA_FROMDEVICE);
813 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
814 memcpy(skb_tail_pointer(skb), vaddr, l1);
815 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
816 pci_dma_sync_single_for_device(pdev, ps_page->dma,
817 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 818
eb7c3adb
JK		 819 /* remove the CRC */
820 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
821 l1 -= 4;
822
bc7f75fa
AK		 823 skb_put(skb, l1);
824 goto copydone;
825 } /* if */
826 }
827
828 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
829 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
830 if (!length)
831 break;
832
47f44e40 833 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 834 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
835 PCI_DMA_FROMDEVICE);
836 ps_page->dma = 0;
837 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
838 ps_page->page = NULL;
839 skb->len += length;
840 skb->data_len += length;
841 skb->truesize += length;
842 }
843
eb7c3adb
JK		 844 /* strip the ethernet crc, problem is we're using pages now so
845 * this whole operation can get a little cpu intensive
846 */
847 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
848 pskb_trim(skb, skb->len - 4);
849
bc7f75fa
AK		 850copydone:
851 total_rx_bytes += skb->len;
852 total_rx_packets++;
853
854 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
855 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
856
857 if (rx_desc->wb.upper.header_status &
858 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
859 adapter->rx_hdr_split++;
860
861 e1000_receive_skb(adapter, netdev, skb,
862 staterr, rx_desc->wb.middle.vlan);
863
864next_desc:
865 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
866 buffer_info->skb = NULL;
867
868 /* return some buffers to hardware, one at a time is too slow */
869 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
870 adapter->alloc_rx_buf(adapter, cleaned_count);
871 cleaned_count = 0;
872 }
873
874 /* use prefetched values */
875 rx_desc = next_rxd;
876 buffer_info = next_buffer;
877
878 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
879 }
880 rx_ring->next_to_clean = i;
881
882 cleaned_count = e1000_desc_unused(rx_ring);
883 if (cleaned_count)
884 adapter->alloc_rx_buf(adapter, cleaned_count);
885
bc7f75fa 886 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 887 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 888 netdev->stats.rx_bytes += total_rx_bytes;
889 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 890 return cleaned;
891}
892
97ac8cae
BA		 893/**
894 * e1000_consume_page - helper function
895 **/
896static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
897 u16 length)
898{
899 bi->page = NULL;
900 skb->len += length;
901 skb->data_len += length;
902 skb->truesize += length;
903}
904
905/**
906 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
907 * @adapter: board private structure
908 *
909 * the return value indicates whether actual cleaning was done, there
910 * is no guarantee that everything was cleaned
911 **/
912
913static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
914 int *work_done, int work_to_do)
915{
916 struct net_device *netdev = adapter->netdev;
917 struct pci_dev *pdev = adapter->pdev;
918 struct e1000_ring *rx_ring = adapter->rx_ring;
919 struct e1000_rx_desc *rx_desc, *next_rxd;
920 struct e1000_buffer *buffer_info, *next_buffer;
921 u32 length;
922 unsigned int i;
923 int cleaned_count = 0;
924 bool cleaned = false;
925 unsigned int total_rx_bytes=0, total_rx_packets=0;
926
927 i = rx_ring->next_to_clean;
928 rx_desc = E1000_RX_DESC(*rx_ring, i);
929 buffer_info = &rx_ring->buffer_info[i];
930
931 while (rx_desc->status & E1000_RXD_STAT_DD) {
932 struct sk_buff *skb;
933 u8 status;
934
935 if (*work_done >= work_to_do)
936 break;
937 (*work_done)++;
938
939 status = rx_desc->status;
940 skb = buffer_info->skb;
941 buffer_info->skb = NULL;
942
943 ++i;
944 if (i == rx_ring->count)
945 i = 0;
946 next_rxd = E1000_RX_DESC(*rx_ring, i);
947 prefetch(next_rxd);
948
949 next_buffer = &rx_ring->buffer_info[i];
950
951 cleaned = true;
952 cleaned_count++;
953 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
954 PCI_DMA_FROMDEVICE);
955 buffer_info->dma = 0;
956
957 length = le16_to_cpu(rx_desc->length);
958
959 /* errors is only valid for DD + EOP descriptors */
960 if (unlikely((status & E1000_RXD_STAT_EOP) &&
961 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
962 /* recycle both page and skb */
963 buffer_info->skb = skb;
964 /* an error means any chain goes out the window
965 * too */
966 if (rx_ring->rx_skb_top)
967 dev_kfree_skb(rx_ring->rx_skb_top);
968 rx_ring->rx_skb_top = NULL;
969 goto next_desc;
970 }
971
972#define rxtop rx_ring->rx_skb_top
973 if (!(status & E1000_RXD_STAT_EOP)) {
974 /* this descriptor is only the beginning (or middle) */
975 if (!rxtop) {
976 /* this is the beginning of a chain */
977 rxtop = skb;
978 skb_fill_page_desc(rxtop, 0, buffer_info->page,
979 0, length);
980 } else {
981 /* this is the middle of a chain */
982 skb_fill_page_desc(rxtop,
983 skb_shinfo(rxtop)->nr_frags,
984 buffer_info->page, 0, length);
985 /* re-use the skb, only consumed the page */
986 buffer_info->skb = skb;
987 }
988 e1000_consume_page(buffer_info, rxtop, length);
989 goto next_desc;
990 } else {
991 if (rxtop) {
992 /* end of the chain */
993 skb_fill_page_desc(rxtop,
994 skb_shinfo(rxtop)->nr_frags,
995 buffer_info->page, 0, length);
996 /* re-use the current skb, we only consumed the
997 * page */
998 buffer_info->skb = skb;
999 skb = rxtop;
1000 rxtop = NULL;
1001 e1000_consume_page(buffer_info, skb, length);
1002 } else {
1003 /* no chain, got EOP, this buf is the packet
1004 * copybreak to save the put_page/alloc_page */
1005 if (length <= copybreak &&
1006 skb_tailroom(skb) >= length) {
1007 u8 *vaddr;
1008 vaddr = kmap_atomic(buffer_info->page,
1009 KM_SKB_DATA_SOFTIRQ);
1010 memcpy(skb_tail_pointer(skb), vaddr,
1011 length);
1012 kunmap_atomic(vaddr,
1013 KM_SKB_DATA_SOFTIRQ);
1014 /* re-use the page, so don't erase
1015 * buffer_info->page */
1016 skb_put(skb, length);
1017 } else {
1018 skb_fill_page_desc(skb, 0,
1019 buffer_info->page, 0,
1020 length);
1021 e1000_consume_page(buffer_info, skb,
1022 length);
1023 }
1024 }
1025 }
1026
1027 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1028 e1000_rx_checksum(adapter,
1029 (u32)(status) |
1030 ((u32)(rx_desc->errors) << 24),
1031 le16_to_cpu(rx_desc->csum), skb);
1032
1033 /* probably a little skewed due to removing CRC */
1034 total_rx_bytes += skb->len;
1035 total_rx_packets++;
1036
1037 /* eth type trans needs skb->data to point to something */
1038 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1039 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1040 dev_kfree_skb(skb);
1041 goto next_desc;
1042 }
1043
1044 e1000_receive_skb(adapter, netdev, skb, status,
1045 rx_desc->special);
1046
1047next_desc:
1048 rx_desc->status = 0;
1049
1050 /* return some buffers to hardware, one at a time is too slow */
1051 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1052 adapter->alloc_rx_buf(adapter, cleaned_count);
1053 cleaned_count = 0;
1054 }
1055
1056 /* use prefetched values */
1057 rx_desc = next_rxd;
1058 buffer_info = next_buffer;
1059 }
1060 rx_ring->next_to_clean = i;
1061
1062 cleaned_count = e1000_desc_unused(rx_ring);
1063 if (cleaned_count)
1064 adapter->alloc_rx_buf(adapter, cleaned_count);
1065
1066 adapter->total_rx_bytes += total_rx_bytes;
1067 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1068 netdev->stats.rx_bytes += total_rx_bytes;
1069 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1070 return cleaned;
1071}
1072
bc7f75fa
AK		 1073/**
1074 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1075 * @adapter: board private structure
1076 **/
1077static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1078{
1079 struct e1000_ring *rx_ring = adapter->rx_ring;
1080 struct e1000_buffer *buffer_info;
1081 struct e1000_ps_page *ps_page;
1082 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1083 unsigned int i, j;
1084
1085 /* Free all the Rx ring sk_buffs */
1086 for (i = 0; i < rx_ring->count; i++) {
1087 buffer_info = &rx_ring->buffer_info[i];
1088 if (buffer_info->dma) {
1089 if (adapter->clean_rx == e1000_clean_rx_irq)
1090 pci_unmap_single(pdev, buffer_info->dma,
1091 adapter->rx_buffer_len,
1092 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1093 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1094 pci_unmap_page(pdev, buffer_info->dma,
1095 PAGE_SIZE,
1096 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1097 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1098 pci_unmap_single(pdev, buffer_info->dma,
1099 adapter->rx_ps_bsize0,
1100 PCI_DMA_FROMDEVICE);
1101 buffer_info->dma = 0;
1102 }
1103
97ac8cae
BA		 1104 if (buffer_info->page) {
1105 put_page(buffer_info->page);
1106 buffer_info->page = NULL;
1107 }
1108
bc7f75fa
AK		 1109 if (buffer_info->skb) {
1110 dev_kfree_skb(buffer_info->skb);
1111 buffer_info->skb = NULL;
1112 }
1113
1114 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1115 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1116 if (!ps_page->page)
1117 break;
1118 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1119 PCI_DMA_FROMDEVICE);
1120 ps_page->dma = 0;
1121 put_page(ps_page->page);
1122 ps_page->page = NULL;
1123 }
1124 }
1125
1126 /* there also may be some cached data from a chained receive */
1127 if (rx_ring->rx_skb_top) {
1128 dev_kfree_skb(rx_ring->rx_skb_top);
1129 rx_ring->rx_skb_top = NULL;
1130 }
1131
bc7f75fa
AK		 1132 /* Zero out the descriptor ring */
1133 memset(rx_ring->desc, 0, rx_ring->size);
1134
1135 rx_ring->next_to_clean = 0;
1136 rx_ring->next_to_use = 0;
b94b5028 1137 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1138
1139 writel(0, adapter->hw.hw_addr + rx_ring->head);
1140 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1141}
1142
a8f88ff5
JB		 1143static void e1000e_downshift_workaround(struct work_struct *work)
1144{
1145 struct e1000_adapter *adapter = container_of(work,
1146 struct e1000_adapter, downshift_task);
1147
1148 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1149}
1150
bc7f75fa
AK		 1151/**
1152 * e1000_intr_msi - Interrupt Handler
1153 * @irq: interrupt number
1154 * @data: pointer to a network interface device structure
1155 **/
1156static irqreturn_t e1000_intr_msi(int irq, void *data)
1157{
1158 struct net_device *netdev = data;
1159 struct e1000_adapter *adapter = netdev_priv(netdev);
1160 struct e1000_hw *hw = &adapter->hw;
1161 u32 icr = er32(ICR);
1162
ad68076e
BA		 1163 /*
1164 * read ICR disables interrupts using IAM
1165 */
bc7f75fa 1166
573cca8c 1167 if (icr & E1000_ICR_LSC) {
bc7f75fa 1168 hw->mac.get_link_status = 1;
ad68076e
BA		 1169 /*
1170 * ICH8 workaround-- Call gig speed drop workaround on cable
1171 * disconnect (LSC) before accessing any PHY registers
1172 */
bc7f75fa
AK		 1173 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1174 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1175 schedule_work(&adapter->downshift_task);
bc7f75fa 1176
ad68076e
BA		 1177 /*
1178 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1179 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1180 * adapter in watchdog
1181 */
bc7f75fa
AK		 1182 if (netif_carrier_ok(netdev) &&
1183 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1184 /* disable receives */
1185 u32 rctl = er32(RCTL);
1186 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1187 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1188 }
1189 /* guard against interrupt when we're going down */
1190 if (!test_bit(__E1000_DOWN, &adapter->state))
1191 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1192 }
1193
288379f0 1194 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1195 adapter->total_tx_bytes = 0;
1196 adapter->total_tx_packets = 0;
1197 adapter->total_rx_bytes = 0;
1198 adapter->total_rx_packets = 0;
288379f0 1199 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1200 }
1201
1202 return IRQ_HANDLED;
1203}
1204
1205/**
1206 * e1000_intr - Interrupt Handler
1207 * @irq: interrupt number
1208 * @data: pointer to a network interface device structure
1209 **/
1210static irqreturn_t e1000_intr(int irq, void *data)
1211{
1212 struct net_device *netdev = data;
1213 struct e1000_adapter *adapter = netdev_priv(netdev);
1214 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1215 u32 rctl, icr = er32(ICR);
4662e82b 1216
a68ea775 1217 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1218 return IRQ_NONE; /* Not our interrupt */
1219
ad68076e
BA		 1220 /*
1221 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1222 * not set, then the adapter didn't send an interrupt
1223 */
bc7f75fa
AK		 1224 if (!(icr & E1000_ICR_INT_ASSERTED))
1225 return IRQ_NONE;
1226
ad68076e
BA		 1227 /*
1228 * Interrupt Auto-Mask...upon reading ICR,
1229 * interrupts are masked. No need for the
1230 * IMC write
1231 */
bc7f75fa 1232
573cca8c 1233 if (icr & E1000_ICR_LSC) {
bc7f75fa 1234 hw->mac.get_link_status = 1;
ad68076e
BA		 1235 /*
1236 * ICH8 workaround-- Call gig speed drop workaround on cable
1237 * disconnect (LSC) before accessing any PHY registers
1238 */
bc7f75fa
AK		 1239 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1240 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1241 schedule_work(&adapter->downshift_task);
bc7f75fa 1242
ad68076e
BA		 1243 /*
1244 * 80003ES2LAN workaround--
bc7f75fa
AK		 1245 * For packet buffer work-around on link down event;
1246 * disable receives here in the ISR and
1247 * reset adapter in watchdog
1248 */
1249 if (netif_carrier_ok(netdev) &&
1250 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1251 /* disable receives */
1252 rctl = er32(RCTL);
1253 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1254 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1255 }
1256 /* guard against interrupt when we're going down */
1257 if (!test_bit(__E1000_DOWN, &adapter->state))
1258 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1259 }
1260
288379f0 1261 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1262 adapter->total_tx_bytes = 0;
1263 adapter->total_tx_packets = 0;
1264 adapter->total_rx_bytes = 0;
1265 adapter->total_rx_packets = 0;
288379f0 1266 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1267 }
1268
1269 return IRQ_HANDLED;
1270}
1271
4662e82b
BA		 1272static irqreturn_t e1000_msix_other(int irq, void *data)
1273{
1274 struct net_device *netdev = data;
1275 struct e1000_adapter *adapter = netdev_priv(netdev);
1276 struct e1000_hw *hw = &adapter->hw;
1277 u32 icr = er32(ICR);
1278
1279 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1280 if (!test_bit(__E1000_DOWN, &adapter->state))
1281 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1282 return IRQ_NONE;
1283 }
1284
1285 if (icr & adapter->eiac_mask)
1286 ew32(ICS, (icr & adapter->eiac_mask));
1287
1288 if (icr & E1000_ICR_OTHER) {
1289 if (!(icr & E1000_ICR_LSC))
1290 goto no_link_interrupt;
1291 hw->mac.get_link_status = 1;
1292 /* guard against interrupt when we're going down */
1293 if (!test_bit(__E1000_DOWN, &adapter->state))
1294 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1295 }
1296
1297no_link_interrupt:
a3c69fef
JB		 1298 if (!test_bit(__E1000_DOWN, &adapter->state))
1299 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1300
1301 return IRQ_HANDLED;
1302}
1303
1304
1305static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1306{
1307 struct net_device *netdev = data;
1308 struct e1000_adapter *adapter = netdev_priv(netdev);
1309 struct e1000_hw *hw = &adapter->hw;
1310 struct e1000_ring *tx_ring = adapter->tx_ring;
1311
1312
1313 adapter->total_tx_bytes = 0;
1314 adapter->total_tx_packets = 0;
1315
1316 if (!e1000_clean_tx_irq(adapter))
1317 /* Ring was not completely cleaned, so fire another interrupt */
1318 ew32(ICS, tx_ring->ims_val);
1319
1320 return IRQ_HANDLED;
1321}
1322
1323static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1324{
1325 struct net_device *netdev = data;
1326 struct e1000_adapter *adapter = netdev_priv(netdev);
1327
1328 /* Write the ITR value calculated at the end of the
1329 * previous interrupt.
1330 */
1331 if (adapter->rx_ring->set_itr) {
1332 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1333 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1334 adapter->rx_ring->set_itr = 0;
1335 }
1336
288379f0 1337 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1338 adapter->total_rx_bytes = 0;
1339 adapter->total_rx_packets = 0;
288379f0 1340 __napi_schedule(&adapter->napi);
4662e82b
BA		 1341 }
1342 return IRQ_HANDLED;
1343}
1344
1345/**
1346 * e1000_configure_msix - Configure MSI-X hardware
1347 *
1348 * e1000_configure_msix sets up the hardware to properly
1349 * generate MSI-X interrupts.
1350 **/
1351static void e1000_configure_msix(struct e1000_adapter *adapter)
1352{
1353 struct e1000_hw *hw = &adapter->hw;
1354 struct e1000_ring *rx_ring = adapter->rx_ring;
1355 struct e1000_ring *tx_ring = adapter->tx_ring;
1356 int vector = 0;
1357 u32 ctrl_ext, ivar = 0;
1358
1359 adapter->eiac_mask = 0;
1360
1361 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1362 if (hw->mac.type == e1000_82574) {
1363 u32 rfctl = er32(RFCTL);
1364 rfctl |= E1000_RFCTL_ACK_DIS;
1365 ew32(RFCTL, rfctl);
1366 }
1367
1368#define E1000_IVAR_INT_ALLOC_VALID 0x8
1369 /* Configure Rx vector */
1370 rx_ring->ims_val = E1000_IMS_RXQ0;
1371 adapter->eiac_mask |= rx_ring->ims_val;
1372 if (rx_ring->itr_val)
1373 writel(1000000000 / (rx_ring->itr_val * 256),
1374 hw->hw_addr + rx_ring->itr_register);
1375 else
1376 writel(1, hw->hw_addr + rx_ring->itr_register);
1377 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1378
1379 /* Configure Tx vector */
1380 tx_ring->ims_val = E1000_IMS_TXQ0;
1381 vector++;
1382 if (tx_ring->itr_val)
1383 writel(1000000000 / (tx_ring->itr_val * 256),
1384 hw->hw_addr + tx_ring->itr_register);
1385 else
1386 writel(1, hw->hw_addr + tx_ring->itr_register);
1387 adapter->eiac_mask |= tx_ring->ims_val;
1388 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1389
1390 /* set vector for Other Causes, e.g. link changes */
1391 vector++;
1392 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1393 if (rx_ring->itr_val)
1394 writel(1000000000 / (rx_ring->itr_val * 256),
1395 hw->hw_addr + E1000_EITR_82574(vector));
1396 else
1397 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1398
1399 /* Cause Tx interrupts on every write back */
1400 ivar |= (1 << 31);
1401
1402 ew32(IVAR, ivar);
1403
1404 /* enable MSI-X PBA support */
1405 ctrl_ext = er32(CTRL_EXT);
1406 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1407
1408 /* Auto-Mask Other interrupts upon ICR read */
1409#define E1000_EIAC_MASK_82574 0x01F00000
1410 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1411 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1412 ew32(CTRL_EXT, ctrl_ext);
1413 e1e_flush();
1414}
1415
1416void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1417{
1418 if (adapter->msix_entries) {
1419 pci_disable_msix(adapter->pdev);
1420 kfree(adapter->msix_entries);
1421 adapter->msix_entries = NULL;
1422 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1423 pci_disable_msi(adapter->pdev);
1424 adapter->flags &= ~FLAG_MSI_ENABLED;
1425 }
1426
1427 return;
1428}
1429
1430/**
1431 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1432 *
1433 * Attempt to configure interrupts using the best available
1434 * capabilities of the hardware and kernel.
1435 **/
1436void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1437{
1438 int err;
1439 int numvecs, i;
1440
1441
1442 switch (adapter->int_mode) {
1443 case E1000E_INT_MODE_MSIX:
1444 if (adapter->flags & FLAG_HAS_MSIX) {
1445 numvecs = 3; /* RxQ0, TxQ0 and other */
1446 adapter->msix_entries = kcalloc(numvecs,
1447 sizeof(struct msix_entry),
1448 GFP_KERNEL);
1449 if (adapter->msix_entries) {
1450 for (i = 0; i < numvecs; i++)
1451 adapter->msix_entries[i].entry = i;
1452
1453 err = pci_enable_msix(adapter->pdev,
1454 adapter->msix_entries,
1455 numvecs);
1456 if (err == 0)
1457 return;
1458 }
1459 /* MSI-X failed, so fall through and try MSI */
1460 e_err("Failed to initialize MSI-X interrupts. "
1461 "Falling back to MSI interrupts.\n");
1462 e1000e_reset_interrupt_capability(adapter);
1463 }
1464 adapter->int_mode = E1000E_INT_MODE_MSI;
1465 /* Fall through */
1466 case E1000E_INT_MODE_MSI:
1467 if (!pci_enable_msi(adapter->pdev)) {
1468 adapter->flags |= FLAG_MSI_ENABLED;
1469 } else {
1470 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1471 e_err("Failed to initialize MSI interrupts. Falling "
1472 "back to legacy interrupts.\n");
1473 }
1474 /* Fall through */
1475 case E1000E_INT_MODE_LEGACY:
1476 /* Don't do anything; this is the system default */
1477 break;
1478 }
1479
1480 return;
1481}
1482
1483/**
1484 * e1000_request_msix - Initialize MSI-X interrupts
1485 *
1486 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1487 * kernel.
1488 **/
1489static int e1000_request_msix(struct e1000_adapter *adapter)
1490{
1491 struct net_device *netdev = adapter->netdev;
1492 int err = 0, vector = 0;
1493
1494 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1495 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1496 else
1497 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1498 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1499 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1500 netdev);
1501 if (err)
1502 goto out;
1503 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1504 adapter->rx_ring->itr_val = adapter->itr;
1505 vector++;
1506
1507 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1508 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1509 else
1510 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1511 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1512 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1513 netdev);
1514 if (err)
1515 goto out;
1516 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1517 adapter->tx_ring->itr_val = adapter->itr;
1518 vector++;
1519
1520 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1521 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1522 if (err)
1523 goto out;
1524
1525 e1000_configure_msix(adapter);
1526 return 0;
1527out:
1528 return err;
1529}
1530
f8d59f78
BA		 1531/**
1532 * e1000_request_irq - initialize interrupts
1533 *
1534 * Attempts to configure interrupts using the best available
1535 * capabilities of the hardware and kernel.
1536 **/
bc7f75fa
AK		 1537static int e1000_request_irq(struct e1000_adapter *adapter)
1538{
1539 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1540 int err;
1541
4662e82b
BA		 1542 if (adapter->msix_entries) {
1543 err = e1000_request_msix(adapter);
1544 if (!err)
1545 return err;
1546 /* fall back to MSI */
1547 e1000e_reset_interrupt_capability(adapter);
1548 adapter->int_mode = E1000E_INT_MODE_MSI;
1549 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1550 }
4662e82b 1551 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1552 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1553 netdev->name, netdev);
1554 if (!err)
1555 return err;
bc7f75fa 1556
4662e82b
BA		 1557 /* fall back to legacy interrupt */
1558 e1000e_reset_interrupt_capability(adapter);
1559 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1560 }
1561
a0607fd3 1562 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1563 netdev->name, netdev);
1564 if (err)
1565 e_err("Unable to allocate interrupt, Error: %d\n", err);
1566
bc7f75fa
AK		 1567 return err;
1568}
1569
1570static void e1000_free_irq(struct e1000_adapter *adapter)
1571{
1572 struct net_device *netdev = adapter->netdev;
1573
4662e82b
BA		 1574 if (adapter->msix_entries) {
1575 int vector = 0;
1576
1577 free_irq(adapter->msix_entries[vector].vector, netdev);
1578 vector++;
1579
1580 free_irq(adapter->msix_entries[vector].vector, netdev);
1581 vector++;
1582
1583 /* Other Causes interrupt vector */
1584 free_irq(adapter->msix_entries[vector].vector, netdev);
1585 return;
bc7f75fa 1586 }
4662e82b
BA		 1587
1588 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1589}
1590
1591/**
1592 * e1000_irq_disable - Mask off interrupt generation on the NIC
1593 **/
1594static void e1000_irq_disable(struct e1000_adapter *adapter)
1595{
1596 struct e1000_hw *hw = &adapter->hw;
1597
bc7f75fa 1598 ew32(IMC, ~0);
4662e82b
BA		 1599 if (adapter->msix_entries)
1600 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1601 e1e_flush();
1602 synchronize_irq(adapter->pdev->irq);
1603}
1604
1605/**
1606 * e1000_irq_enable - Enable default interrupt generation settings
1607 **/
1608static void e1000_irq_enable(struct e1000_adapter *adapter)
1609{
1610 struct e1000_hw *hw = &adapter->hw;
1611
4662e82b
BA		 1612 if (adapter->msix_entries) {
1613 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1614 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1615 } else {
1616 ew32(IMS, IMS_ENABLE_MASK);
1617 }
74ef9c39 1618 e1e_flush();
bc7f75fa
AK		 1619}
1620
1621/**
1622 * e1000_get_hw_control - get control of the h/w from f/w
1623 * @adapter: address of board private structure
1624 *
489815ce 1625 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1626 * For ASF and Pass Through versions of f/w this means that
1627 * the driver is loaded. For AMT version (only with 82573)
1628 * of the f/w this means that the network i/f is open.
1629 **/
1630static void e1000_get_hw_control(struct e1000_adapter *adapter)
1631{
1632 struct e1000_hw *hw = &adapter->hw;
1633 u32 ctrl_ext;
1634 u32 swsm;
1635
1636 /* Let firmware know the driver has taken over */
1637 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1638 swsm = er32(SWSM);
1639 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1640 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1641 ctrl_ext = er32(CTRL_EXT);
ad68076e 1642 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1643 }
1644}
1645
1646/**
1647 * e1000_release_hw_control - release control of the h/w to f/w
1648 * @adapter: address of board private structure
1649 *
489815ce 1650 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1651 * For ASF and Pass Through versions of f/w this means that the
1652 * driver is no longer loaded. For AMT version (only with 82573) i
1653 * of the f/w this means that the network i/f is closed.
1654 *
1655 **/
1656static void e1000_release_hw_control(struct e1000_adapter *adapter)
1657{
1658 struct e1000_hw *hw = &adapter->hw;
1659 u32 ctrl_ext;
1660 u32 swsm;
1661
1662 /* Let firmware taken over control of h/w */
1663 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1664 swsm = er32(SWSM);
1665 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1666 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1667 ctrl_ext = er32(CTRL_EXT);
ad68076e 1668 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1669 }
1670}
1671
bc7f75fa
AK		 1672/**
1673 * @e1000_alloc_ring - allocate memory for a ring structure
1674 **/
1675static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1676 struct e1000_ring *ring)
1677{
1678 struct pci_dev *pdev = adapter->pdev;
1679
1680 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1681 GFP_KERNEL);
1682 if (!ring->desc)
1683 return -ENOMEM;
1684
1685 return 0;
1686}
1687
1688/**
1689 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1690 * @adapter: board private structure
1691 *
1692 * Return 0 on success, negative on failure
1693 **/
1694int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1695{
1696 struct e1000_ring *tx_ring = adapter->tx_ring;
1697 int err = -ENOMEM, size;
1698
1699 size = sizeof(struct e1000_buffer) * tx_ring->count;
1700 tx_ring->buffer_info = vmalloc(size);
1701 if (!tx_ring->buffer_info)
1702 goto err;
1703 memset(tx_ring->buffer_info, 0, size);
1704
1705 /* round up to nearest 4K */
1706 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1707 tx_ring->size = ALIGN(tx_ring->size, 4096);
1708
1709 err = e1000_alloc_ring_dma(adapter, tx_ring);
1710 if (err)
1711 goto err;
1712
1713 tx_ring->next_to_use = 0;
1714 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1715
1716 return 0;
1717err:
1718 vfree(tx_ring->buffer_info);
44defeb3 1719 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1720 return err;
1721}
1722
1723/**
1724 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1725 * @adapter: board private structure
1726 *
1727 * Returns 0 on success, negative on failure
1728 **/
1729int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1730{
1731 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1732 struct e1000_buffer *buffer_info;
1733 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1734
1735 size = sizeof(struct e1000_buffer) * rx_ring->count;
1736 rx_ring->buffer_info = vmalloc(size);
1737 if (!rx_ring->buffer_info)
1738 goto err;
1739 memset(rx_ring->buffer_info, 0, size);
1740
47f44e40
AK		 1741 for (i = 0; i < rx_ring->count; i++) {
1742 buffer_info = &rx_ring->buffer_info[i];
1743 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1744 sizeof(struct e1000_ps_page),
1745 GFP_KERNEL);
1746 if (!buffer_info->ps_pages)
1747 goto err_pages;
1748 }
bc7f75fa
AK		 1749
1750 desc_len = sizeof(union e1000_rx_desc_packet_split);
1751
1752 /* Round up to nearest 4K */
1753 rx_ring->size = rx_ring->count * desc_len;
1754 rx_ring->size = ALIGN(rx_ring->size, 4096);
1755
1756 err = e1000_alloc_ring_dma(adapter, rx_ring);
1757 if (err)
47f44e40 1758 goto err_pages;
bc7f75fa
AK		 1759
1760 rx_ring->next_to_clean = 0;
1761 rx_ring->next_to_use = 0;
1762 rx_ring->rx_skb_top = NULL;
1763
1764 return 0;
47f44e40
AK		 1765
1766err_pages:
1767 for (i = 0; i < rx_ring->count; i++) {
1768 buffer_info = &rx_ring->buffer_info[i];
1769 kfree(buffer_info->ps_pages);
1770 }
bc7f75fa
AK		 1771err:
1772 vfree(rx_ring->buffer_info);
44defeb3 1773 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1774 return err;
1775}
1776
1777/**
1778 * e1000_clean_tx_ring - Free Tx Buffers
1779 * @adapter: board private structure
1780 **/
1781static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1782{
1783 struct e1000_ring *tx_ring = adapter->tx_ring;
1784 struct e1000_buffer *buffer_info;
1785 unsigned long size;
1786 unsigned int i;
1787
1788 for (i = 0; i < tx_ring->count; i++) {
1789 buffer_info = &tx_ring->buffer_info[i];
1790 e1000_put_txbuf(adapter, buffer_info);
1791 }
1792
1793 size = sizeof(struct e1000_buffer) * tx_ring->count;
1794 memset(tx_ring->buffer_info, 0, size);
1795
1796 memset(tx_ring->desc, 0, tx_ring->size);
1797
1798 tx_ring->next_to_use = 0;
1799 tx_ring->next_to_clean = 0;
1800
1801 writel(0, adapter->hw.hw_addr + tx_ring->head);
1802 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1803}
1804
1805/**
1806 * e1000e_free_tx_resources - Free Tx Resources per Queue
1807 * @adapter: board private structure
1808 *
1809 * Free all transmit software resources
1810 **/
1811void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1812{
1813 struct pci_dev *pdev = adapter->pdev;
1814 struct e1000_ring *tx_ring = adapter->tx_ring;
1815
1816 e1000_clean_tx_ring(adapter);
1817
1818 vfree(tx_ring->buffer_info);
1819 tx_ring->buffer_info = NULL;
1820
1821 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1822 tx_ring->dma);
1823 tx_ring->desc = NULL;
1824}
1825
1826/**
1827 * e1000e_free_rx_resources - Free Rx Resources
1828 * @adapter: board private structure
1829 *
1830 * Free all receive software resources
1831 **/
1832
1833void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1834{
1835 struct pci_dev *pdev = adapter->pdev;
1836 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1837 int i;
bc7f75fa
AK		 1838
1839 e1000_clean_rx_ring(adapter);
1840
47f44e40
AK		 1841 for (i = 0; i < rx_ring->count; i++) {
1842 kfree(rx_ring->buffer_info[i].ps_pages);
1843 }
1844
bc7f75fa
AK		 1845 vfree(rx_ring->buffer_info);
1846 rx_ring->buffer_info = NULL;
1847
bc7f75fa
AK		 1848 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1849 rx_ring->dma);
1850 rx_ring->desc = NULL;
1851}
1852
1853/**
1854 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1855 * @adapter: pointer to adapter
1856 * @itr_setting: current adapter->itr
1857 * @packets: the number of packets during this measurement interval
1858 * @bytes: the number of bytes during this measurement interval
1859 *
bc7f75fa
AK		 1860 * Stores a new ITR value based on packets and byte
1861 * counts during the last interrupt. The advantage of per interrupt
1862 * computation is faster updates and more accurate ITR for the current
1863 * traffic pattern. Constants in this function were computed
1864 * based on theoretical maximum wire speed and thresholds were set based
1865 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1866 * while increasing bulk throughput. This functionality is controlled
1867 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1868 **/
1869static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1870 u16 itr_setting, int packets,
1871 int bytes)
1872{
1873 unsigned int retval = itr_setting;
1874
1875 if (packets == 0)
1876 goto update_itr_done;
1877
1878 switch (itr_setting) {
1879 case lowest_latency:
1880 /* handle TSO and jumbo frames */
1881 if (bytes/packets > 8000)
1882 retval = bulk_latency;
1883 else if ((packets < 5) && (bytes > 512)) {
1884 retval = low_latency;
1885 }
1886 break;
1887 case low_latency: /* 50 usec aka 20000 ints/s */
1888 if (bytes > 10000) {
1889 /* this if handles the TSO accounting */
1890 if (bytes/packets > 8000) {
1891 retval = bulk_latency;
1892 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1893 retval = bulk_latency;
1894 } else if ((packets > 35)) {
1895 retval = lowest_latency;
1896 }
1897 } else if (bytes/packets > 2000) {
1898 retval = bulk_latency;
1899 } else if (packets <= 2 && bytes < 512) {
1900 retval = lowest_latency;
1901 }
1902 break;
1903 case bulk_latency: /* 250 usec aka 4000 ints/s */
1904 if (bytes > 25000) {
1905 if (packets > 35) {
1906 retval = low_latency;
1907 }
1908 } else if (bytes < 6000) {
1909 retval = low_latency;
1910 }
1911 break;
1912 }
1913
1914update_itr_done:
1915 return retval;
1916}
1917
1918static void e1000_set_itr(struct e1000_adapter *adapter)
1919{
1920 struct e1000_hw *hw = &adapter->hw;
1921 u16 current_itr;
1922 u32 new_itr = adapter->itr;
1923
1924 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1925 if (adapter->link_speed != SPEED_1000) {
1926 current_itr = 0;
1927 new_itr = 4000;
1928 goto set_itr_now;
1929 }
1930
1931 adapter->tx_itr = e1000_update_itr(adapter,
1932 adapter->tx_itr,
1933 adapter->total_tx_packets,
1934 adapter->total_tx_bytes);
1935 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1936 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1937 adapter->tx_itr = low_latency;
1938
1939 adapter->rx_itr = e1000_update_itr(adapter,
1940 adapter->rx_itr,
1941 adapter->total_rx_packets,
1942 adapter->total_rx_bytes);
1943 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1944 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1945 adapter->rx_itr = low_latency;
1946
1947 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1948
1949 switch (current_itr) {
1950 /* counts and packets in update_itr are dependent on these numbers */
1951 case lowest_latency:
1952 new_itr = 70000;
1953 break;
1954 case low_latency:
1955 new_itr = 20000; /* aka hwitr = ~200 */
1956 break;
1957 case bulk_latency:
1958 new_itr = 4000;
1959 break;
1960 default:
1961 break;
1962 }
1963
1964set_itr_now:
1965 if (new_itr != adapter->itr) {
ad68076e
BA		 1966 /*
1967 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1968 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1969 * increasing
1970 */
bc7f75fa
AK		 1971 new_itr = new_itr > adapter->itr ?
1972 min(adapter->itr + (new_itr >> 2), new_itr) :
1973 new_itr;
1974 adapter->itr = new_itr;
4662e82b
BA		 1975 adapter->rx_ring->itr_val = new_itr;
1976 if (adapter->msix_entries)
1977 adapter->rx_ring->set_itr = 1;
1978 else
1979 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1980 }
1981}
1982
4662e82b
BA		 1983/**
1984 * e1000_alloc_queues - Allocate memory for all rings
1985 * @adapter: board private structure to initialize
1986 **/
1987static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1988{
1989 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1990 if (!adapter->tx_ring)
1991 goto err;
1992
1993 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1994 if (!adapter->rx_ring)
1995 goto err;
1996
1997 return 0;
1998err:
1999 e_err("Unable to allocate memory for queues\n");
2000 kfree(adapter->rx_ring);
2001 kfree(adapter->tx_ring);
2002 return -ENOMEM;
2003}
2004
bc7f75fa
AK		 2005/**
2006 * e1000_clean - NAPI Rx polling callback
ad68076e 2007 * @napi: struct associated with this polling callback
489815ce 2008 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2009 **/
2010static int e1000_clean(struct napi_struct *napi, int budget)
2011{
2012 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2013 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2014 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2015 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2016
4cf1653a 2017 adapter = netdev_priv(poll_dev);
bc7f75fa 2018
4662e82b
BA		 2019 if (adapter->msix_entries &&
2020 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2021 goto clean_rx;
2022
92af3e95 2023 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2024
4662e82b 2025clean_rx:
bc7f75fa 2026 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2027
12d04a3c 2028 if (!tx_cleaned)
d2c7ddd6 2029 work_done = budget;
bc7f75fa 2030
53e52c72
DM		 2031 /* If budget not fully consumed, exit the polling mode */
2032 if (work_done < budget) {
bc7f75fa
AK		 2033 if (adapter->itr_setting & 3)
2034 e1000_set_itr(adapter);
288379f0 2035 napi_complete(napi);
a3c69fef
JB		 2036 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2037 if (adapter->msix_entries)
2038 ew32(IMS, adapter->rx_ring->ims_val);
2039 else
2040 e1000_irq_enable(adapter);
2041 }
bc7f75fa
AK		 2042 }
2043
2044 return work_done;
2045}
2046
2047static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2048{
2049 struct e1000_adapter *adapter = netdev_priv(netdev);
2050 struct e1000_hw *hw = &adapter->hw;
2051 u32 vfta, index;
2052
2053 /* don't update vlan cookie if already programmed */
2054 if ((adapter->hw.mng_cookie.status &
2055 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2056 (vid == adapter->mng_vlan_id))
2057 return;
caaddaf8 2058
bc7f75fa 2059 /* add VID to filter table */
caaddaf8
BA		 2060 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2061 index = (vid >> 5) & 0x7F;
2062 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2063 vfta |= (1 << (vid & 0x1F));
2064 hw->mac.ops.write_vfta(hw, index, vfta);
2065 }
bc7f75fa
AK		 2066}
2067
2068static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2069{
2070 struct e1000_adapter *adapter = netdev_priv(netdev);
2071 struct e1000_hw *hw = &adapter->hw;
2072 u32 vfta, index;
2073
74ef9c39
JB		 2074 if (!test_bit(__E1000_DOWN, &adapter->state))
2075 e1000_irq_disable(adapter);
bc7f75fa 2076 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2077
2078 if (!test_bit(__E1000_DOWN, &adapter->state))
2079 e1000_irq_enable(adapter);
bc7f75fa
AK		 2080
2081 if ((adapter->hw.mng_cookie.status &
2082 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2083 (vid == adapter->mng_vlan_id)) {
2084 /* release control to f/w */
2085 e1000_release_hw_control(adapter);
2086 return;
2087 }
2088
2089 /* remove VID from filter table */
caaddaf8
BA		 2090 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2091 index = (vid >> 5) & 0x7F;
2092 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2093 vfta &= ~(1 << (vid & 0x1F));
2094 hw->mac.ops.write_vfta(hw, index, vfta);
2095 }
bc7f75fa
AK		 2096}
2097
2098static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2099{
2100 struct net_device *netdev = adapter->netdev;
2101 u16 vid = adapter->hw.mng_cookie.vlan_id;
2102 u16 old_vid = adapter->mng_vlan_id;
2103
2104 if (!adapter->vlgrp)
2105 return;
2106
2107 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2108 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2109 if (adapter->hw.mng_cookie.status &
2110 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2111 e1000_vlan_rx_add_vid(netdev, vid);
2112 adapter->mng_vlan_id = vid;
2113 }
2114
2115 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2116 (vid != old_vid) &&
2117 !vlan_group_get_device(adapter->vlgrp, old_vid))
2118 e1000_vlan_rx_kill_vid(netdev, old_vid);
2119 } else {
2120 adapter->mng_vlan_id = vid;
2121 }
2122}
2123
2124
2125static void e1000_vlan_rx_register(struct net_device *netdev,
2126 struct vlan_group *grp)
2127{
2128 struct e1000_adapter *adapter = netdev_priv(netdev);
2129 struct e1000_hw *hw = &adapter->hw;
2130 u32 ctrl, rctl;
2131
74ef9c39
JB		 2132 if (!test_bit(__E1000_DOWN, &adapter->state))
2133 e1000_irq_disable(adapter);
bc7f75fa
AK		 2134 adapter->vlgrp = grp;
2135
2136 if (grp) {
2137 /* enable VLAN tag insert/strip */
2138 ctrl = er32(CTRL);
2139 ctrl |= E1000_CTRL_VME;
2140 ew32(CTRL, ctrl);
2141
2142 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2143 /* enable VLAN receive filtering */
2144 rctl = er32(RCTL);
bc7f75fa
AK		 2145 rctl &= ~E1000_RCTL_CFIEN;
2146 ew32(RCTL, rctl);
2147 e1000_update_mng_vlan(adapter);
2148 }
2149 } else {
2150 /* disable VLAN tag insert/strip */
2151 ctrl = er32(CTRL);
2152 ctrl &= ~E1000_CTRL_VME;
2153 ew32(CTRL, ctrl);
2154
2155 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2156 if (adapter->mng_vlan_id !=
2157 (u16)E1000_MNG_VLAN_NONE) {
2158 e1000_vlan_rx_kill_vid(netdev,
2159 adapter->mng_vlan_id);
2160 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2161 }
2162 }
2163 }
2164
74ef9c39
JB		 2165 if (!test_bit(__E1000_DOWN, &adapter->state))
2166 e1000_irq_enable(adapter);
bc7f75fa
AK		 2167}
2168
2169static void e1000_restore_vlan(struct e1000_adapter *adapter)
2170{
2171 u16 vid;
2172
2173 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2174
2175 if (!adapter->vlgrp)
2176 return;
2177
2178 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2179 if (!vlan_group_get_device(adapter->vlgrp, vid))
2180 continue;
2181 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2182 }
2183}
2184
2185static void e1000_init_manageability(struct e1000_adapter *adapter)
2186{
2187 struct e1000_hw *hw = &adapter->hw;
2188 u32 manc, manc2h;
2189
2190 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2191 return;
2192
2193 manc = er32(MANC);
2194
ad68076e
BA		 2195 /*
2196 * enable receiving management packets to the host. this will probably
bc7f75fa 2197 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2198 * the packets will be handled on SMBUS
2199 */
bc7f75fa
AK		 2200 manc |= E1000_MANC_EN_MNG2HOST;
2201 manc2h = er32(MANC2H);
2202#define E1000_MNG2HOST_PORT_623 (1 << 5)
2203#define E1000_MNG2HOST_PORT_664 (1 << 6)
2204 manc2h |= E1000_MNG2HOST_PORT_623;
2205 manc2h |= E1000_MNG2HOST_PORT_664;
2206 ew32(MANC2H, manc2h);
2207 ew32(MANC, manc);
2208}
2209
2210/**
2211 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2212 * @adapter: board private structure
2213 *
2214 * Configure the Tx unit of the MAC after a reset.
2215 **/
2216static void e1000_configure_tx(struct e1000_adapter *adapter)
2217{
2218 struct e1000_hw *hw = &adapter->hw;
2219 struct e1000_ring *tx_ring = adapter->tx_ring;
2220 u64 tdba;
2221 u32 tdlen, tctl, tipg, tarc;
2222 u32 ipgr1, ipgr2;
2223
2224 /* Setup the HW Tx Head and Tail descriptor pointers */
2225 tdba = tx_ring->dma;
2226 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2227 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2228 ew32(TDBAH, (tdba >> 32));
2229 ew32(TDLEN, tdlen);
2230 ew32(TDH, 0);
2231 ew32(TDT, 0);
2232 tx_ring->head = E1000_TDH;
2233 tx_ring->tail = E1000_TDT;
2234
2235 /* Set the default values for the Tx Inter Packet Gap timer */
2236 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2237 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2238 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2239
2240 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2241 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2242
2243 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2244 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2245 ew32(TIPG, tipg);
2246
2247 /* Set the Tx Interrupt Delay register */
2248 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2249 /* Tx irq moderation */
bc7f75fa
AK		 2250 ew32(TADV, adapter->tx_abs_int_delay);
2251
2252 /* Program the Transmit Control Register */
2253 tctl = er32(TCTL);
2254 tctl &= ~E1000_TCTL_CT;
2255 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2256 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2257
2258 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2259 tarc = er32(TARC(0));
ad68076e
BA		 2260 /*
2261 * set the speed mode bit, we'll clear it if we're not at
2262 * gigabit link later
2263 */
bc7f75fa
AK		 2264#define SPEED_MODE_BIT (1 << 21)
2265 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2266 ew32(TARC(0), tarc);
bc7f75fa
AK		 2267 }
2268
2269 /* errata: program both queues to unweighted RR */
2270 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2271 tarc = er32(TARC(0));
bc7f75fa 2272 tarc |= 1;
e9ec2c0f
JK		 2273 ew32(TARC(0), tarc);
2274 tarc = er32(TARC(1));
bc7f75fa 2275 tarc |= 1;
e9ec2c0f 2276 ew32(TARC(1), tarc);
bc7f75fa
AK		 2277 }
2278
bc7f75fa
AK		 2279 /* Setup Transmit Descriptor Settings for eop descriptor */
2280 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2281
2282 /* only set IDE if we are delaying interrupts using the timers */
2283 if (adapter->tx_int_delay)
2284 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2285
2286 /* enable Report Status bit */
2287 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2288
2289 ew32(TCTL, tctl);
2290
edfea6e6
SH		 2291 e1000e_config_collision_dist(hw);
2292
bc7f75fa
AK		 2293 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2294}
2295
2296/**
2297 * e1000_setup_rctl - configure the receive control registers
2298 * @adapter: Board private structure
2299 **/
2300#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2301 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2302static void e1000_setup_rctl(struct e1000_adapter *adapter)
2303{
2304 struct e1000_hw *hw = &adapter->hw;
2305 u32 rctl, rfctl;
2306 u32 psrctl = 0;
2307 u32 pages = 0;
2308
2309 /* Program MC offset vector base */
2310 rctl = er32(RCTL);
2311 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2312 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2313 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2314 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2315
2316 /* Do not Store bad packets */
2317 rctl &= ~E1000_RCTL_SBP;
2318
2319 /* Enable Long Packet receive */
2320 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2321 rctl &= ~E1000_RCTL_LPE;
2322 else
2323 rctl |= E1000_RCTL_LPE;
2324
eb7c3adb
JK		 2325 /* Some systems expect that the CRC is included in SMBUS traffic. The
2326 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2327 * host memory when this is enabled
2328 */
2329 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2330 rctl |= E1000_RCTL_SECRC;
5918bd88 2331
a4f58f54
BA		 2332 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2333 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2334 u16 phy_data;
2335
2336 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2337 phy_data &= 0xfff8;
2338 phy_data |= (1 << 2);
2339 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2340
2341 e1e_rphy(hw, 22, &phy_data);
2342 phy_data &= 0x0fff;
2343 phy_data |= (1 << 14);
2344 e1e_wphy(hw, 0x10, 0x2823);
2345 e1e_wphy(hw, 0x11, 0x0003);
2346 e1e_wphy(hw, 22, phy_data);
2347 }
2348
bc7f75fa
AK		 2349 /* Setup buffer sizes */
2350 rctl &= ~E1000_RCTL_SZ_4096;
2351 rctl |= E1000_RCTL_BSEX;
2352 switch (adapter->rx_buffer_len) {
2353 case 256:
2354 rctl |= E1000_RCTL_SZ_256;
2355 rctl &= ~E1000_RCTL_BSEX;
2356 break;
2357 case 512:
2358 rctl |= E1000_RCTL_SZ_512;
2359 rctl &= ~E1000_RCTL_BSEX;
2360 break;
2361 case 1024:
2362 rctl |= E1000_RCTL_SZ_1024;
2363 rctl &= ~E1000_RCTL_BSEX;
2364 break;
2365 case 2048:
2366 default:
2367 rctl |= E1000_RCTL_SZ_2048;
2368 rctl &= ~E1000_RCTL_BSEX;
2369 break;
2370 case 4096:
2371 rctl |= E1000_RCTL_SZ_4096;
2372 break;
2373 case 8192:
2374 rctl |= E1000_RCTL_SZ_8192;
2375 break;
2376 case 16384:
2377 rctl |= E1000_RCTL_SZ_16384;
2378 break;
2379 }
2380
2381 /*
2382 * 82571 and greater support packet-split where the protocol
2383 * header is placed in skb->data and the packet data is
2384 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2385 * In the case of a non-split, skb->data is linearly filled,
2386 * followed by the page buffers. Therefore, skb->data is
2387 * sized to hold the largest protocol header.
2388 *
2389 * allocations using alloc_page take too long for regular MTU
2390 * so only enable packet split for jumbo frames
2391 *
2392 * Using pages when the page size is greater than 16k wastes
2393 * a lot of memory, since we allocate 3 pages at all times
2394 * per packet.
2395 */
bc7f75fa 2396 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2397 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2398 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2399 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2400 else
2401 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2402
2403 if (adapter->rx_ps_pages) {
2404 /* Configure extra packet-split registers */
2405 rfctl = er32(RFCTL);
2406 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2407 /*
2408 * disable packet split support for IPv6 extension headers,
2409 * because some malformed IPv6 headers can hang the Rx
2410 */
bc7f75fa
AK		 2411 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2412 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2413
2414 ew32(RFCTL, rfctl);
2415
140a7480
AK		 2416 /* Enable Packet split descriptors */
2417 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2418
2419 psrctl |= adapter->rx_ps_bsize0 >>
2420 E1000_PSRCTL_BSIZE0_SHIFT;
2421
2422 switch (adapter->rx_ps_pages) {
2423 case 3:
2424 psrctl |= PAGE_SIZE <<
2425 E1000_PSRCTL_BSIZE3_SHIFT;
2426 case 2:
2427 psrctl |= PAGE_SIZE <<
2428 E1000_PSRCTL_BSIZE2_SHIFT;
2429 case 1:
2430 psrctl |= PAGE_SIZE >>
2431 E1000_PSRCTL_BSIZE1_SHIFT;
2432 break;
2433 }
2434
2435 ew32(PSRCTL, psrctl);
2436 }
2437
2438 ew32(RCTL, rctl);
318a94d6
JK		 2439 /* just started the receive unit, no need to restart */
2440 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2441}
2442
2443/**
2444 * e1000_configure_rx - Configure Receive Unit after Reset
2445 * @adapter: board private structure
2446 *
2447 * Configure the Rx unit of the MAC after a reset.
2448 **/
2449static void e1000_configure_rx(struct e1000_adapter *adapter)
2450{
2451 struct e1000_hw *hw = &adapter->hw;
2452 struct e1000_ring *rx_ring = adapter->rx_ring;
2453 u64 rdba;
2454 u32 rdlen, rctl, rxcsum, ctrl_ext;
2455
2456 if (adapter->rx_ps_pages) {
2457 /* this is a 32 byte descriptor */
2458 rdlen = rx_ring->count *
2459 sizeof(union e1000_rx_desc_packet_split);
2460 adapter->clean_rx = e1000_clean_rx_irq_ps;
2461 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2462 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2463 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2464 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2465 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2466 } else {
97ac8cae 2467 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2468 adapter->clean_rx = e1000_clean_rx_irq;
2469 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2470 }
2471
2472 /* disable receives while setting up the descriptors */
2473 rctl = er32(RCTL);
2474 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2475 e1e_flush();
2476 msleep(10);
2477
2478 /* set the Receive Delay Timer Register */
2479 ew32(RDTR, adapter->rx_int_delay);
2480
2481 /* irq moderation */
2482 ew32(RADV, adapter->rx_abs_int_delay);
2483 if (adapter->itr_setting != 0)
ad68076e 2484 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2485
2486 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2487 /* Auto-Mask interrupts upon ICR access */
2488 ctrl_ext |= E1000_CTRL_EXT_IAME;
2489 ew32(IAM, 0xffffffff);
2490 ew32(CTRL_EXT, ctrl_ext);
2491 e1e_flush();
2492
ad68076e
BA		 2493 /*
2494 * Setup the HW Rx Head and Tail Descriptor Pointers and
2495 * the Base and Length of the Rx Descriptor Ring
2496 */
bc7f75fa 2497 rdba = rx_ring->dma;
284901a9 2498 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2499 ew32(RDBAH, (rdba >> 32));
2500 ew32(RDLEN, rdlen);
2501 ew32(RDH, 0);
2502 ew32(RDT, 0);
2503 rx_ring->head = E1000_RDH;
2504 rx_ring->tail = E1000_RDT;
2505
2506 /* Enable Receive Checksum Offload for TCP and UDP */
2507 rxcsum = er32(RXCSUM);
2508 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2509 rxcsum |= E1000_RXCSUM_TUOFL;
2510
ad68076e
BA		 2511 /*
2512 * IPv4 payload checksum for UDP fragments must be
2513 * used in conjunction with packet-split.
2514 */
bc7f75fa
AK		 2515 if (adapter->rx_ps_pages)
2516 rxcsum |= E1000_RXCSUM_IPPCSE;
2517 } else {
2518 rxcsum &= ~E1000_RXCSUM_TUOFL;
2519 /* no need to clear IPPCSE as it defaults to 0 */
2520 }
2521 ew32(RXCSUM, rxcsum);
2522
ad68076e
BA		 2523 /*
2524 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2525 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2526 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2527 */
53ec5498
BA		 2528 if (adapter->flags & FLAG_HAS_ERT) {
2529 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2530 u32 rxdctl = er32(RXDCTL(0));
2531 ew32(RXDCTL(0), rxdctl | 0x3);
2532 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2533 /*
2534 * With jumbo frames and early-receive enabled,
2535 * excessive C-state transition latencies result in
2536 * dropped transactions.
2537 */
2538 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2539 adapter->netdev->name, 55);
2540 } else {
2541 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2542 adapter->netdev->name,
2543 PM_QOS_DEFAULT_VALUE);
2544 }
97ac8cae 2545 }
bc7f75fa
AK		 2546
2547 /* Enable Receives */
2548 ew32(RCTL, rctl);
2549}
2550
2551/**
e2de3eb6 2552 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2553 * @hw: pointer to the HW structure
2554 * @mc_addr_list: array of multicast addresses to program
2555 * @mc_addr_count: number of multicast addresses to program
2556 * @rar_used_count: the first RAR register free to program
2557 * @rar_count: total number of supported Receive Address Registers
2558 *
2559 * Updates the Receive Address Registers and Multicast Table Array.
2560 * The caller must have a packed mc_addr_list of multicast addresses.
2561 * The parameter rar_count will usually be hw->mac.rar_entry_count
2562 * unless there are workarounds that change this. Currently no func pointer
2563 * exists and all implementations are handled in the generic version of this
2564 * function.
2565 **/
e2de3eb6
JK		 2566static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2567 u32 mc_addr_count, u32 rar_used_count,
2568 u32 rar_count)
bc7f75fa 2569{
e2de3eb6 2570 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2571 rar_used_count, rar_count);
2572}
2573
2574/**
2575 * e1000_set_multi - Multicast and Promiscuous mode set
2576 * @netdev: network interface device structure
2577 *
2578 * The set_multi entry point is called whenever the multicast address
2579 * list or the network interface flags are updated. This routine is
2580 * responsible for configuring the hardware for proper multicast,
2581 * promiscuous mode, and all-multi behavior.
2582 **/
2583static void e1000_set_multi(struct net_device *netdev)
2584{
2585 struct e1000_adapter *adapter = netdev_priv(netdev);
2586 struct e1000_hw *hw = &adapter->hw;
2587 struct e1000_mac_info *mac = &hw->mac;
2588 struct dev_mc_list *mc_ptr;
2589 u8 *mta_list;
2590 u32 rctl;
2591 int i;
2592
2593 /* Check for Promiscuous and All Multicast modes */
2594
2595 rctl = er32(RCTL);
2596
2597 if (netdev->flags & IFF_PROMISC) {
2598 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2599 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2600 } else {
746b9f02
PM		 2601 if (netdev->flags & IFF_ALLMULTI) {
2602 rctl |= E1000_RCTL_MPE;
2603 rctl &= ~E1000_RCTL_UPE;
2604 } else {
2605 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2606 }
78ed11a5 2607 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2608 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2609 }
2610
2611 ew32(RCTL, rctl);
2612
2613 if (netdev->mc_count) {
2614 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2615 if (!mta_list)
2616 return;
2617
2618 /* prepare a packed array of only addresses. */
2619 mc_ptr = netdev->mc_list;
2620
2621 for (i = 0; i < netdev->mc_count; i++) {
2622 if (!mc_ptr)
2623 break;
2624 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2625 ETH_ALEN);
2626 mc_ptr = mc_ptr->next;
2627 }
2628
e2de3eb6 2629 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2630 mac->rar_entry_count);
2631 kfree(mta_list);
2632 } else {
2633 /*
2634 * if we're called from probe, we might not have
2635 * anything to do here, so clear out the list
2636 */
e2de3eb6 2637 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2638 }
2639}
2640
2641/**
ad68076e 2642 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2643 * @adapter: private board structure
2644 **/
2645static void e1000_configure(struct e1000_adapter *adapter)
2646{
2647 e1000_set_multi(adapter->netdev);
2648
2649 e1000_restore_vlan(adapter);
2650 e1000_init_manageability(adapter);
2651
2652 e1000_configure_tx(adapter);
2653 e1000_setup_rctl(adapter);
2654 e1000_configure_rx(adapter);
ad68076e 2655 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2656}
2657
2658/**
2659 * e1000e_power_up_phy - restore link in case the phy was powered down
2660 * @adapter: address of board private structure
2661 *
2662 * The phy may be powered down to save power and turn off link when the
2663 * driver is unloaded and wake on lan is not enabled (among others)
2664 * *** this routine MUST be followed by a call to e1000e_reset ***
2665 **/
2666void e1000e_power_up_phy(struct e1000_adapter *adapter)
2667{
17f208de
BA		 2668 if (adapter->hw.phy.ops.power_up)
2669 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2670
2671 adapter->hw.mac.ops.setup_link(&adapter->hw);
2672}
2673
2674/**
2675 * e1000_power_down_phy - Power down the PHY
2676 *
17f208de
BA		 2677 * Power down the PHY so no link is implied when interface is down.
2678 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2679 */
2680static void e1000_power_down_phy(struct e1000_adapter *adapter)
2681{
bc7f75fa 2682 /* WoL is enabled */
23b66e2b 2683 if (adapter->wol)
bc7f75fa
AK		 2684 return;
2685
17f208de
BA		 2686 if (adapter->hw.phy.ops.power_down)
2687 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2688}
2689
2690/**
2691 * e1000e_reset - bring the hardware into a known good state
2692 *
2693 * This function boots the hardware and enables some settings that
2694 * require a configuration cycle of the hardware - those cannot be
2695 * set/changed during runtime. After reset the device needs to be
ad68076e 2696 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2697 */
2698void e1000e_reset(struct e1000_adapter *adapter)
2699{
2700 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2701 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2702 struct e1000_hw *hw = &adapter->hw;
2703 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2704 u32 pba = adapter->pba;
bc7f75fa
AK		 2705 u16 hwm;
2706
ad68076e 2707 /* reset Packet Buffer Allocation to default */
318a94d6 2708 ew32(PBA, pba);
df762464 2709
318a94d6 2710 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2711 /*
2712 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2713 * large enough to accommodate two full transmit packets,
2714 * rounded up to the next 1KB and expressed in KB. Likewise,
2715 * the Rx FIFO should be large enough to accommodate at least
2716 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2717 * expressed in KB.
2718 */
df762464 2719 pba = er32(PBA);
bc7f75fa 2720 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2721 tx_space = pba >> 16;
bc7f75fa 2722 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2723 pba &= 0xffff;
ad68076e
BA		 2724 /*
2725 * the Tx fifo also stores 16 bytes of information about the tx
2726 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2727 */
2728 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2729 sizeof(struct e1000_tx_desc) -
2730 ETH_FCS_LEN) * 2;
2731 min_tx_space = ALIGN(min_tx_space, 1024);
2732 min_tx_space >>= 10;
2733 /* software strips receive CRC, so leave room for it */
318a94d6 2734 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2735 min_rx_space = ALIGN(min_rx_space, 1024);
2736 min_rx_space >>= 10;
2737
ad68076e
BA		 2738 /*
2739 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2740 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2741 * allocation, take space away from current Rx allocation
2742 */
df762464
AK		 2743 if ((tx_space < min_tx_space) &&
2744 ((min_tx_space - tx_space) < pba)) {
2745 pba -= min_tx_space - tx_space;
bc7f75fa 2746
ad68076e
BA		 2747 /*
2748 * if short on Rx space, Rx wins and must trump tx
2749 * adjustment or use Early Receive if available
2750 */
df762464 2751 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2752 (!(adapter->flags & FLAG_HAS_ERT)))
2753 /* ERT enabled in e1000_configure_rx */
df762464 2754 pba = min_rx_space;
bc7f75fa 2755 }
df762464
AK		 2756
2757 ew32(PBA, pba);
bc7f75fa
AK		 2758 }
2759
bc7f75fa 2760
ad68076e
BA		 2761 /*
2762 * flow control settings
2763 *
38eb394e 2764 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2765 * (or the size used for early receive) above it in the Rx FIFO.
2766 * Set it to the lower of:
2767 * - 90% of the Rx FIFO size, and
2768 * - the full Rx FIFO size minus the early receive size (for parts
2769 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2770 * - the full Rx FIFO size minus one full frame
ad68076e 2771 */
38eb394e
BA		 2772 if (hw->mac.type == e1000_pchlan) {
2773 /*
2774 * Workaround PCH LOM adapter hangs with certain network
2775 * loads. If hangs persist, try disabling Tx flow control.
2776 */
2777 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2778 fc->high_water = 0x3500;
2779 fc->low_water = 0x1500;
2780 } else {
2781 fc->high_water = 0x5000;
2782 fc->low_water = 0x3000;
2783 }
2784 } else {
2785 if ((adapter->flags & FLAG_HAS_ERT) &&
2786 (adapter->netdev->mtu > ETH_DATA_LEN))
2787 hwm = min(((pba << 10) * 9 / 10),
2788 ((pba << 10) - (E1000_ERT_2048 << 3)));
2789 else
2790 hwm = min(((pba << 10) * 9 / 10),
2791 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2792
38eb394e
BA		 2793 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2794 fc->low_water = fc->high_water - 8;
2795 }
bc7f75fa
AK		 2796
2797 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2798 fc->pause_time = 0xFFFF;
bc7f75fa 2799 else
318a94d6
JK		 2800 fc->pause_time = E1000_FC_PAUSE_TIME;
2801 fc->send_xon = 1;
5c48ef3e 2802 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2803
2804 /* Allow time for pending master requests to run */
2805 mac->ops.reset_hw(hw);
97ac8cae
BA		 2806
2807 /*
2808 * For parts with AMT enabled, let the firmware know
2809 * that the network interface is in control
2810 */
c43bc57e 2811 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2812 e1000_get_hw_control(adapter);
2813
bc7f75fa 2814 ew32(WUC, 0);
a4f58f54
BA		 2815 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2816 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2817
2818 if (mac->ops.init_hw(hw))
44defeb3 2819 e_err("Hardware Error\n");
bc7f75fa 2820
38eb394e
BA		 2821 /* additional part of the flow-control workaround above */
2822 if (hw->mac.type == e1000_pchlan)
2823 ew32(FCRTV_PCH, 0x1000);
2824
bc7f75fa
AK		 2825 e1000_update_mng_vlan(adapter);
2826
2827 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2828 ew32(VET, ETH_P_8021Q);
2829
2830 e1000e_reset_adaptive(hw);
2831 e1000_get_phy_info(hw);
2832
918d7197
BA		 2833 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2834 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2835 u16 phy_data = 0;
ad68076e
BA		 2836 /*
2837 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2838 * the return value of this function because there is nothing
ad68076e
BA		 2839 * different we would do if it failed
2840 */
bc7f75fa
AK		 2841 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2842 phy_data &= ~IGP02E1000_PM_SPD;
2843 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2844 }
bc7f75fa
AK		 2845}
2846
2847int e1000e_up(struct e1000_adapter *adapter)
2848{
2849 struct e1000_hw *hw = &adapter->hw;
2850
53ec5498
BA		 2851 /* DMA latency requirement to workaround early-receive/jumbo issue */
2852 if (adapter->flags & FLAG_HAS_ERT)
2853 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2854 adapter->netdev->name,
2855 PM_QOS_DEFAULT_VALUE);
2856
bc7f75fa
AK		 2857 /* hardware has been reset, we need to reload some things */
2858 e1000_configure(adapter);
2859
2860 clear_bit(__E1000_DOWN, &adapter->state);
2861
2862 napi_enable(&adapter->napi);
4662e82b
BA		 2863 if (adapter->msix_entries)
2864 e1000_configure_msix(adapter);
bc7f75fa
AK		 2865 e1000_irq_enable(adapter);
2866
4cb9be7a
JB		 2867 netif_wake_queue(adapter->netdev);
2868
bc7f75fa
AK		 2869 /* fire a link change interrupt to start the watchdog */
2870 ew32(ICS, E1000_ICS_LSC);
2871 return 0;
2872}
2873
2874void e1000e_down(struct e1000_adapter *adapter)
2875{
2876 struct net_device *netdev = adapter->netdev;
2877 struct e1000_hw *hw = &adapter->hw;
2878 u32 tctl, rctl;
2879
ad68076e
BA		 2880 /*
2881 * signal that we're down so the interrupt handler does not
2882 * reschedule our watchdog timer
2883 */
bc7f75fa
AK		 2884 set_bit(__E1000_DOWN, &adapter->state);
2885
2886 /* disable receives in the hardware */
2887 rctl = er32(RCTL);
2888 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2889 /* flush and sleep below */
2890
4cb9be7a 2891 netif_stop_queue(netdev);
bc7f75fa
AK		 2892
2893 /* disable transmits in the hardware */
2894 tctl = er32(TCTL);
2895 tctl &= ~E1000_TCTL_EN;
2896 ew32(TCTL, tctl);
2897 /* flush both disables and wait for them to finish */
2898 e1e_flush();
2899 msleep(10);
2900
2901 napi_disable(&adapter->napi);
2902 e1000_irq_disable(adapter);
2903
2904 del_timer_sync(&adapter->watchdog_timer);
2905 del_timer_sync(&adapter->phy_info_timer);
2906
2907 netdev->tx_queue_len = adapter->tx_queue_len;
2908 netif_carrier_off(netdev);
2909 adapter->link_speed = 0;
2910 adapter->link_duplex = 0;
2911
52cc3086
JK		 2912 if (!pci_channel_offline(adapter->pdev))
2913 e1000e_reset(adapter);
bc7f75fa
AK		 2914 e1000_clean_tx_ring(adapter);
2915 e1000_clean_rx_ring(adapter);
2916
53ec5498
BA		 2917 if (adapter->flags & FLAG_HAS_ERT)
2918 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2919 adapter->netdev->name);
2920
bc7f75fa
AK		 2921 /*
2922 * TODO: for power management, we could drop the link and
2923 * pci_disable_device here.
2924 */
2925}
2926
2927void e1000e_reinit_locked(struct e1000_adapter *adapter)
2928{
2929 might_sleep();
2930 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2931 msleep(1);
2932 e1000e_down(adapter);
2933 e1000e_up(adapter);
2934 clear_bit(__E1000_RESETTING, &adapter->state);
2935}
2936
2937/**
2938 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2939 * @adapter: board private structure to initialize
2940 *
2941 * e1000_sw_init initializes the Adapter private data structure.
2942 * Fields are initialized based on PCI device information and
2943 * OS network device settings (MTU size).
2944 **/
2945static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2946{
bc7f75fa
AK		 2947 struct net_device *netdev = adapter->netdev;
2948
2949 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2950 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2951 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2952 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2953
4662e82b 2954 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2955
4662e82b
BA		 2956 if (e1000_alloc_queues(adapter))
2957 return -ENOMEM;
bc7f75fa 2958
bc7f75fa 2959 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2960 e1000_irq_disable(adapter);
2961
bc7f75fa
AK		 2962 set_bit(__E1000_DOWN, &adapter->state);
2963 return 0;
bc7f75fa
AK		 2964}
2965
f8d59f78
BA		 2966/**
2967 * e1000_intr_msi_test - Interrupt Handler
2968 * @irq: interrupt number
2969 * @data: pointer to a network interface device structure
2970 **/
2971static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2972{
2973 struct net_device *netdev = data;
2974 struct e1000_adapter *adapter = netdev_priv(netdev);
2975 struct e1000_hw *hw = &adapter->hw;
2976 u32 icr = er32(ICR);
2977
3bb99fe2 2978 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2979 if (icr & E1000_ICR_RXSEQ) {
2980 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2981 wmb();
2982 }
2983
2984 return IRQ_HANDLED;
2985}
2986
2987/**
2988 * e1000_test_msi_interrupt - Returns 0 for successful test
2989 * @adapter: board private struct
2990 *
2991 * code flow taken from tg3.c
2992 **/
2993static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2994{
2995 struct net_device *netdev = adapter->netdev;
2996 struct e1000_hw *hw = &adapter->hw;
2997 int err;
2998
2999 /* poll_enable hasn't been called yet, so don't need disable */
3000 /* clear any pending events */
3001 er32(ICR);
3002
3003 /* free the real vector and request a test handler */
3004 e1000_free_irq(adapter);
4662e82b 3005 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3006
3007 /* Assume that the test fails, if it succeeds then the test
3008 * MSI irq handler will unset this flag */
3009 adapter->flags |= FLAG_MSI_TEST_FAILED;
3010
3011 err = pci_enable_msi(adapter->pdev);
3012 if (err)
3013 goto msi_test_failed;
3014
a0607fd3 3015 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3016 netdev->name, netdev);
3017 if (err) {
3018 pci_disable_msi(adapter->pdev);
3019 goto msi_test_failed;
3020 }
3021
3022 wmb();
3023
3024 e1000_irq_enable(adapter);
3025
3026 /* fire an unusual interrupt on the test handler */
3027 ew32(ICS, E1000_ICS_RXSEQ);
3028 e1e_flush();
3029 msleep(50);
3030
3031 e1000_irq_disable(adapter);
3032
3033 rmb();
3034
3035 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3036 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3037 err = -EIO;
3038 e_info("MSI interrupt test failed!\n");
3039 }
3040
3041 free_irq(adapter->pdev->irq, netdev);
3042 pci_disable_msi(adapter->pdev);
3043
3044 if (err == -EIO)
3045 goto msi_test_failed;
3046
3047 /* okay so the test worked, restore settings */
3bb99fe2 3048 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3049msi_test_failed:
4662e82b 3050 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3051 e1000_request_irq(adapter);
3052 return err;
3053}
3054
3055/**
3056 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3057 * @adapter: board private struct
3058 *
3059 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3060 **/
3061static int e1000_test_msi(struct e1000_adapter *adapter)
3062{
3063 int err;
3064 u16 pci_cmd;
3065
3066 if (!(adapter->flags & FLAG_MSI_ENABLED))
3067 return 0;
3068
3069 /* disable SERR in case the MSI write causes a master abort */
3070 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3071 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3072 pci_cmd & ~PCI_COMMAND_SERR);
3073
3074 err = e1000_test_msi_interrupt(adapter);
3075
3076 /* restore previous setting of command word */
3077 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3078
3079 /* success ! */
3080 if (!err)
3081 return 0;
3082
3083 /* EIO means MSI test failed */
3084 if (err != -EIO)
3085 return err;
3086
3087 /* back to INTx mode */
3088 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3089
3090 e1000_free_irq(adapter);
3091
3092 err = e1000_request_irq(adapter);
3093
3094 return err;
3095}
3096
bc7f75fa
AK		 3097/**
3098 * e1000_open - Called when a network interface is made active
3099 * @netdev: network interface device structure
3100 *
3101 * Returns 0 on success, negative value on failure
3102 *
3103 * The open entry point is called when a network interface is made
3104 * active by the system (IFF_UP). At this point all resources needed
3105 * for transmit and receive operations are allocated, the interrupt
3106 * handler is registered with the OS, the watchdog timer is started,
3107 * and the stack is notified that the interface is ready.
3108 **/
3109static int e1000_open(struct net_device *netdev)
3110{
3111 struct e1000_adapter *adapter = netdev_priv(netdev);
3112 struct e1000_hw *hw = &adapter->hw;
3113 int err;
3114
3115 /* disallow open during test */
3116 if (test_bit(__E1000_TESTING, &adapter->state))
3117 return -EBUSY;
3118
9c563d20
JB		 3119 netif_carrier_off(netdev);
3120
bc7f75fa
AK		 3121 /* allocate transmit descriptors */
3122 err = e1000e_setup_tx_resources(adapter);
3123 if (err)
3124 goto err_setup_tx;
3125
3126 /* allocate receive descriptors */
3127 err = e1000e_setup_rx_resources(adapter);
3128 if (err)
3129 goto err_setup_rx;
3130
3131 e1000e_power_up_phy(adapter);
3132
3133 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3134 if ((adapter->hw.mng_cookie.status &
3135 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3136 e1000_update_mng_vlan(adapter);
3137
ad68076e
BA		 3138 /*
3139 * If AMT is enabled, let the firmware know that the network
3140 * interface is now open
3141 */
c43bc57e 3142 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3143 e1000_get_hw_control(adapter);
3144
ad68076e
BA		 3145 /*
3146 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3147 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3148 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3149 * clean_rx handler before we do so.
3150 */
bc7f75fa
AK		 3151 e1000_configure(adapter);
3152
3153 err = e1000_request_irq(adapter);
3154 if (err)
3155 goto err_req_irq;
3156
f8d59f78
BA		 3157 /*
3158 * Work around PCIe errata with MSI interrupts causing some chipsets to
3159 * ignore e1000e MSI messages, which means we need to test our MSI
3160 * interrupt now
3161 */
4662e82b 3162 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3163 err = e1000_test_msi(adapter);
3164 if (err) {
3165 e_err("Interrupt allocation failed\n");
3166 goto err_req_irq;
3167 }
3168 }
3169
bc7f75fa
AK		 3170 /* From here on the code is the same as e1000e_up() */
3171 clear_bit(__E1000_DOWN, &adapter->state);
3172
3173 napi_enable(&adapter->napi);
3174
3175 e1000_irq_enable(adapter);
3176
4cb9be7a 3177 netif_start_queue(netdev);
d55b53ff 3178
bc7f75fa
AK		 3179 /* fire a link status change interrupt to start the watchdog */
3180 ew32(ICS, E1000_ICS_LSC);
3181
3182 return 0;
3183
3184err_req_irq:
3185 e1000_release_hw_control(adapter);
3186 e1000_power_down_phy(adapter);
3187 e1000e_free_rx_resources(adapter);
3188err_setup_rx:
3189 e1000e_free_tx_resources(adapter);
3190err_setup_tx:
3191 e1000e_reset(adapter);
3192
3193 return err;
3194}
3195
3196/**
3197 * e1000_close - Disables a network interface
3198 * @netdev: network interface device structure
3199 *
3200 * Returns 0, this is not allowed to fail
3201 *
3202 * The close entry point is called when an interface is de-activated
3203 * by the OS. The hardware is still under the drivers control, but
3204 * needs to be disabled. A global MAC reset is issued to stop the
3205 * hardware, and all transmit and receive resources are freed.
3206 **/
3207static int e1000_close(struct net_device *netdev)
3208{
3209 struct e1000_adapter *adapter = netdev_priv(netdev);
3210
3211 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3212 e1000e_down(adapter);
3213 e1000_power_down_phy(adapter);
3214 e1000_free_irq(adapter);
3215
3216 e1000e_free_tx_resources(adapter);
3217 e1000e_free_rx_resources(adapter);
3218
ad68076e
BA		 3219 /*
3220 * kill manageability vlan ID if supported, but not if a vlan with
3221 * the same ID is registered on the host OS (let 8021q kill it)
3222 */
bc7f75fa
AK		 3223 if ((adapter->hw.mng_cookie.status &
3224 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3225 !(adapter->vlgrp &&
3226 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3227 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3228
ad68076e
BA		 3229 /*
3230 * If AMT is enabled, let the firmware know that the network
3231 * interface is now closed
3232 */
c43bc57e 3233 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3234 e1000_release_hw_control(adapter);
3235
3236 return 0;
3237}
3238/**
3239 * e1000_set_mac - Change the Ethernet Address of the NIC
3240 * @netdev: network interface device structure
3241 * @p: pointer to an address structure
3242 *
3243 * Returns 0 on success, negative on failure
3244 **/
3245static int e1000_set_mac(struct net_device *netdev, void *p)
3246{
3247 struct e1000_adapter *adapter = netdev_priv(netdev);
3248 struct sockaddr *addr = p;
3249
3250 if (!is_valid_ether_addr(addr->sa_data))
3251 return -EADDRNOTAVAIL;
3252
3253 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3254 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3255
3256 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3257
3258 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3259 /* activate the work around */
3260 e1000e_set_laa_state_82571(&adapter->hw, 1);
3261
ad68076e
BA		 3262 /*
3263 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3264 * between the time RAR[0] gets clobbered and the time it
3265 * gets fixed (in e1000_watchdog), the actual LAA is in one
3266 * of the RARs and no incoming packets directed to this port
3267 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3268 * RAR[14]
3269 */
bc7f75fa
AK		 3270 e1000e_rar_set(&adapter->hw,
3271 adapter->hw.mac.addr,
3272 adapter->hw.mac.rar_entry_count - 1);
3273 }
3274
3275 return 0;
3276}
3277
a8f88ff5
JB		 3278/**
3279 * e1000e_update_phy_task - work thread to update phy
3280 * @work: pointer to our work struct
3281 *
3282 * this worker thread exists because we must acquire a
3283 * semaphore to read the phy, which we could msleep while
3284 * waiting for it, and we can't msleep in a timer.
3285 **/
3286static void e1000e_update_phy_task(struct work_struct *work)
3287{
3288 struct e1000_adapter *adapter = container_of(work,
3289 struct e1000_adapter, update_phy_task);
3290 e1000_get_phy_info(&adapter->hw);
3291}
3292
ad68076e
BA		 3293/*
3294 * Need to wait a few seconds after link up to get diagnostic information from
3295 * the phy
3296 */
bc7f75fa
AK		 3297static void e1000_update_phy_info(unsigned long data)
3298{
3299 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3300 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3301}
3302
3303/**
3304 * e1000e_update_stats - Update the board statistics counters
3305 * @adapter: board private structure
3306 **/
3307void e1000e_update_stats(struct e1000_adapter *adapter)
3308{
7274c20f 3309 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3310 struct e1000_hw *hw = &adapter->hw;
3311 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3312 u16 phy_data;
bc7f75fa
AK		 3313
3314 /*
3315 * Prevent stats update while adapter is being reset, or if the pci
3316 * connection is down.
3317 */
3318 if (adapter->link_speed == 0)
3319 return;
3320 if (pci_channel_offline(pdev))
3321 return;
3322
bc7f75fa
AK		 3323 adapter->stats.crcerrs += er32(CRCERRS);
3324 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3325 adapter->stats.gorc += er32(GORCL);
3326 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3327 adapter->stats.bprc += er32(BPRC);
3328 adapter->stats.mprc += er32(MPRC);
3329 adapter->stats.roc += er32(ROC);
3330
bc7f75fa 3331 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3332 if ((hw->phy.type == e1000_phy_82578) ||
3333 (hw->phy.type == e1000_phy_82577)) {
3334 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3335 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3336 adapter->stats.scc += phy_data;
a4f58f54
BA		 3337
3338 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3339 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3340 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3341
3342 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3343 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3344 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3345
3346 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3347 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3348 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3349
3350 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3351 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3352 adapter->stats.dc += phy_data;
a4f58f54
BA		 3353 } else {
3354 adapter->stats.scc += er32(SCC);
3355 adapter->stats.ecol += er32(ECOL);
3356 adapter->stats.mcc += er32(MCC);
3357 adapter->stats.latecol += er32(LATECOL);
3358 adapter->stats.dc += er32(DC);
3359 }
bc7f75fa
AK		 3360 adapter->stats.xonrxc += er32(XONRXC);
3361 adapter->stats.xontxc += er32(XONTXC);
3362 adapter->stats.xoffrxc += er32(XOFFRXC);
3363 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3364 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3365 adapter->stats.gotc += er32(GOTCL);
3366 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3367 adapter->stats.rnbc += er32(RNBC);
3368 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3369
3370 adapter->stats.mptc += er32(MPTC);
3371 adapter->stats.bptc += er32(BPTC);
3372
3373 /* used for adaptive IFS */
3374
3375 hw->mac.tx_packet_delta = er32(TPT);
3376 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3377 if ((hw->phy.type == e1000_phy_82578) ||
3378 (hw->phy.type == e1000_phy_82577)) {
3379 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3380 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3381 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3382 } else {
3383 hw->mac.collision_delta = er32(COLC);
3384 }
bc7f75fa
AK		 3385 adapter->stats.colc += hw->mac.collision_delta;
3386
3387 adapter->stats.algnerrc += er32(ALGNERRC);
3388 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3389 if ((hw->phy.type == e1000_phy_82578) ||
3390 (hw->phy.type == e1000_phy_82577)) {
3391 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3392 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3393 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3394 } else {
3395 if ((hw->mac.type != e1000_82574) &&
3396 (hw->mac.type != e1000_82583))
3397 adapter->stats.tncrs += er32(TNCRS);
3398 }
bc7f75fa
AK		 3399 adapter->stats.cexterr += er32(CEXTERR);
3400 adapter->stats.tsctc += er32(TSCTC);
3401 adapter->stats.tsctfc += er32(TSCTFC);
3402
bc7f75fa 3403 /* Fill out the OS statistics structure */
7274c20f
AK		 3404 netdev->stats.multicast = adapter->stats.mprc;
3405 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3406
3407 /* Rx Errors */
3408
ad68076e
BA		 3409 /*
3410 * RLEC on some newer hardware can be incorrect so build
3411 * our own version based on RUC and ROC
3412 */
7274c20f 3413 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3414 adapter->stats.crcerrs + adapter->stats.algnerrc +
3415 adapter->stats.ruc + adapter->stats.roc +
3416 adapter->stats.cexterr;
7274c20f 3417 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3418 adapter->stats.roc;
7274c20f
AK		 3419 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3420 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3421 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3422
3423 /* Tx Errors */
7274c20f 3424 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3425 adapter->stats.latecol;
7274c20f
AK		 3426 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3427 netdev->stats.tx_window_errors = adapter->stats.latecol;
3428 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3429
3430 /* Tx Dropped needs to be maintained elsewhere */
3431
bc7f75fa
AK		 3432 /* Management Stats */
3433 adapter->stats.mgptc += er32(MGTPTC);
3434 adapter->stats.mgprc += er32(MGTPRC);
3435 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3436}
3437
7c25769f
BA		 3438/**
3439 * e1000_phy_read_status - Update the PHY register status snapshot
3440 * @adapter: board private structure
3441 **/
3442static void e1000_phy_read_status(struct e1000_adapter *adapter)
3443{
3444 struct e1000_hw *hw = &adapter->hw;
3445 struct e1000_phy_regs *phy = &adapter->phy_regs;
3446 int ret_val;
7c25769f
BA		 3447
3448 if ((er32(STATUS) & E1000_STATUS_LU) &&
3449 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3450 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3451 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3452 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3453 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3454 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3455 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3456 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3457 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3458 if (ret_val)
44defeb3 3459 e_warn("Error reading PHY register\n");
7c25769f
BA		 3460 } else {
3461 /*
3462 * Do not read PHY registers if link is not up
3463 * Set values to typical power-on defaults
3464 */
3465 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3466 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3467 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3468 BMSR_ERCAP);
3469 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3470 ADVERTISE_ALL | ADVERTISE_CSMA);
3471 phy->lpa = 0;
3472 phy->expansion = EXPANSION_ENABLENPAGE;
3473 phy->ctrl1000 = ADVERTISE_1000FULL;
3474 phy->stat1000 = 0;
3475 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3476 }
7c25769f
BA		 3477}
3478
bc7f75fa
AK		 3479static void e1000_print_link_info(struct e1000_adapter *adapter)
3480{
bc7f75fa
AK		 3481 struct e1000_hw *hw = &adapter->hw;
3482 u32 ctrl = er32(CTRL);
3483
8f12fe86
BA		 3484 /* Link status message must follow this format for user tools */
3485 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3486 "Flow Control: %s\n",
3487 adapter->netdev->name,
44defeb3
JK		 3488 adapter->link_speed,
3489 (adapter->link_duplex == FULL_DUPLEX) ?
3490 "Full Duplex" : "Half Duplex",
3491 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3492 "RX/TX" :
3493 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3494 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3495}
3496
a20e4cf9 3497bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3498{
3499 struct e1000_hw *hw = &adapter->hw;
3500 bool link_active = 0;
3501 s32 ret_val = 0;
3502
3503 /*
3504 * get_link_status is set on LSC (link status) interrupt or
3505 * Rx sequence error interrupt. get_link_status will stay
3506 * false until the check_for_link establishes link
3507 * for copper adapters ONLY
3508 */
3509 switch (hw->phy.media_type) {
3510 case e1000_media_type_copper:
3511 if (hw->mac.get_link_status) {
3512 ret_val = hw->mac.ops.check_for_link(hw);
3513 link_active = !hw->mac.get_link_status;
3514 } else {
3515 link_active = 1;
3516 }
3517 break;
3518 case e1000_media_type_fiber:
3519 ret_val = hw->mac.ops.check_for_link(hw);
3520 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3521 break;
3522 case e1000_media_type_internal_serdes:
3523 ret_val = hw->mac.ops.check_for_link(hw);
3524 link_active = adapter->hw.mac.serdes_has_link;
3525 break;
3526 default:
3527 case e1000_media_type_unknown:
3528 break;
3529 }
3530
3531 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3532 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3533 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3534 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3535 }
3536
3537 return link_active;
3538}
3539
3540static void e1000e_enable_receives(struct e1000_adapter *adapter)
3541{
3542 /* make sure the receive unit is started */
3543 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3544 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3545 struct e1000_hw *hw = &adapter->hw;
3546 u32 rctl = er32(RCTL);
3547 ew32(RCTL, rctl | E1000_RCTL_EN);
3548 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3549 }
3550}
3551
bc7f75fa
AK		 3552/**
3553 * e1000_watchdog - Timer Call-back
3554 * @data: pointer to adapter cast into an unsigned long
3555 **/
3556static void e1000_watchdog(unsigned long data)
3557{
3558 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3559
3560 /* Do the rest outside of interrupt context */
3561 schedule_work(&adapter->watchdog_task);
3562
3563 /* TODO: make this use queue_delayed_work() */
3564}
3565
3566static void e1000_watchdog_task(struct work_struct *work)
3567{
3568 struct e1000_adapter *adapter = container_of(work,
3569 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3570 struct net_device *netdev = adapter->netdev;
3571 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3572 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3573 struct e1000_ring *tx_ring = adapter->tx_ring;
3574 struct e1000_hw *hw = &adapter->hw;
3575 u32 link, tctl;
bc7f75fa
AK		 3576 int tx_pending = 0;
3577
318a94d6
JK		 3578 link = e1000_has_link(adapter);
3579 if ((netif_carrier_ok(netdev)) && link) {
3580 e1000e_enable_receives(adapter);
bc7f75fa 3581 goto link_up;
bc7f75fa
AK		 3582 }
3583
3584 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3585 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3586 e1000_update_mng_vlan(adapter);
3587
bc7f75fa
AK		 3588 if (link) {
3589 if (!netif_carrier_ok(netdev)) {
3590 bool txb2b = 1;
318a94d6 3591 /* update snapshot of PHY registers on LSC */
7c25769f 3592 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3593 mac->ops.get_link_up_info(&adapter->hw,
3594 &adapter->link_speed,
3595 &adapter->link_duplex);
3596 e1000_print_link_info(adapter);
f4187b56
BA		 3597 /*
3598 * On supported PHYs, check for duplex mismatch only
3599 * if link has autonegotiated at 10/100 half
3600 */
3601 if ((hw->phy.type == e1000_phy_igp_3 ||
3602 hw->phy.type == e1000_phy_bm) &&
3603 (hw->mac.autoneg == true) &&
3604 (adapter->link_speed == SPEED_10 ||
3605 adapter->link_speed == SPEED_100) &&
3606 (adapter->link_duplex == HALF_DUPLEX)) {
3607 u16 autoneg_exp;
3608
3609 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3610
3611 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3612 e_info("Autonegotiated half duplex but"
3613 " link partner cannot autoneg. "
3614 " Try forcing full duplex if "
3615 "link gets many collisions.\n");
3616 }
3617
ad68076e
BA		 3618 /*
3619 * tweak tx_queue_len according to speed/duplex
3620 * and adjust the timeout factor
3621 */
bc7f75fa
AK		 3622 netdev->tx_queue_len = adapter->tx_queue_len;
3623 adapter->tx_timeout_factor = 1;
3624 switch (adapter->link_speed) {
3625 case SPEED_10:
3626 txb2b = 0;
3627 netdev->tx_queue_len = 10;
10f1b492 3628 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3629 break;
3630 case SPEED_100:
3631 txb2b = 0;
3632 netdev->tx_queue_len = 100;
4c86e0b9 3633 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3634 break;
3635 }
3636
ad68076e
BA		 3637 /*
3638 * workaround: re-program speed mode bit after
3639 * link-up event
3640 */
bc7f75fa
AK		 3641 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3642 !txb2b) {
3643 u32 tarc0;
e9ec2c0f 3644 tarc0 = er32(TARC(0));
bc7f75fa 3645 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3646 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3647 }
3648
ad68076e
BA		 3649 /*
3650 * disable TSO for pcie and 10/100 speeds, to avoid
3651 * some hardware issues
3652 */
bc7f75fa
AK		 3653 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3654 switch (adapter->link_speed) {
3655 case SPEED_10:
3656 case SPEED_100:
44defeb3 3657 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3658 netdev->features &= ~NETIF_F_TSO;
3659 netdev->features &= ~NETIF_F_TSO6;
3660 break;
3661 case SPEED_1000:
3662 netdev->features |= NETIF_F_TSO;
3663 netdev->features |= NETIF_F_TSO6;
3664 break;
3665 default:
3666 /* oops */
3667 break;
3668 }
3669 }
3670
ad68076e
BA		 3671 /*
3672 * enable transmits in the hardware, need to do this
3673 * after setting TARC(0)
3674 */
bc7f75fa
AK		 3675 tctl = er32(TCTL);
3676 tctl |= E1000_TCTL_EN;
3677 ew32(TCTL, tctl);
3678
75eb0fad
BA		 3679 /*
3680 * Perform any post-link-up configuration before
3681 * reporting link up.
3682 */
3683 if (phy->ops.cfg_on_link_up)
3684 phy->ops.cfg_on_link_up(hw);
3685
bc7f75fa 3686 netif_carrier_on(netdev);
bc7f75fa
AK		 3687
3688 if (!test_bit(__E1000_DOWN, &adapter->state))
3689 mod_timer(&adapter->phy_info_timer,
3690 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3691 }
3692 } else {
3693 if (netif_carrier_ok(netdev)) {
3694 adapter->link_speed = 0;
3695 adapter->link_duplex = 0;
8f12fe86
BA		 3696 /* Link status message must follow this format */
3697 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3698 adapter->netdev->name);
bc7f75fa 3699 netif_carrier_off(netdev);
bc7f75fa
AK		 3700 if (!test_bit(__E1000_DOWN, &adapter->state))
3701 mod_timer(&adapter->phy_info_timer,
3702 round_jiffies(jiffies + 2 * HZ));
3703
3704 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3705 schedule_work(&adapter->reset_task);
3706 }
3707 }
3708
3709link_up:
3710 e1000e_update_stats(adapter);
3711
3712 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3713 adapter->tpt_old = adapter->stats.tpt;
3714 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3715 adapter->colc_old = adapter->stats.colc;
3716
7c25769f
BA		 3717 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3718 adapter->gorc_old = adapter->stats.gorc;
3719 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3720 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3721
3722 e1000e_update_adaptive(&adapter->hw);
3723
3724 if (!netif_carrier_ok(netdev)) {
3725 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3726 tx_ring->count);
3727 if (tx_pending) {
ad68076e
BA		 3728 /*
3729 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3730 * but we've got queued Tx work that's never going
3731 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3732 * (Do the reset outside of interrupt context).
3733 */
bc7f75fa
AK		 3734 adapter->tx_timeout_count++;
3735 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3736 /* return immediately since reset is imminent */
3737 return;
bc7f75fa
AK		 3738 }
3739 }
3740
ad68076e 3741 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3742 if (adapter->msix_entries)
3743 ew32(ICS, adapter->rx_ring->ims_val);
3744 else
3745 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3746
3747 /* Force detection of hung controller every watchdog period */
3748 adapter->detect_tx_hung = 1;
3749
ad68076e
BA		 3750 /*
3751 * With 82571 controllers, LAA may be overwritten due to controller
3752 * reset from the other port. Set the appropriate LAA in RAR[0]
3753 */
bc7f75fa
AK		 3754 if (e1000e_get_laa_state_82571(hw))
3755 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3756
3757 /* Reset the timer */
3758 if (!test_bit(__E1000_DOWN, &adapter->state))
3759 mod_timer(&adapter->watchdog_timer,
3760 round_jiffies(jiffies + 2 * HZ));
3761}
3762
3763#define E1000_TX_FLAGS_CSUM 0x00000001
3764#define E1000_TX_FLAGS_VLAN 0x00000002
3765#define E1000_TX_FLAGS_TSO 0x00000004
3766#define E1000_TX_FLAGS_IPV4 0x00000008
3767#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3768#define E1000_TX_FLAGS_VLAN_SHIFT 16
3769
3770static int e1000_tso(struct e1000_adapter *adapter,
3771 struct sk_buff *skb)
3772{
3773 struct e1000_ring *tx_ring = adapter->tx_ring;
3774 struct e1000_context_desc *context_desc;
3775 struct e1000_buffer *buffer_info;
3776 unsigned int i;
3777 u32 cmd_length = 0;
3778 u16 ipcse = 0, tucse, mss;
3779 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3780 int err;
3781
3d5e33c9
BA		 3782 if (!skb_is_gso(skb))
3783 return 0;
bc7f75fa 3784
3d5e33c9
BA		 3785 if (skb_header_cloned(skb)) {
3786 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3787 if (err)
3788 return err;
bc7f75fa
AK		 3789 }
3790
3d5e33c9
BA		 3791 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3792 mss = skb_shinfo(skb)->gso_size;
3793 if (skb->protocol == htons(ETH_P_IP)) {
3794 struct iphdr *iph = ip_hdr(skb);
3795 iph->tot_len = 0;
3796 iph->check = 0;
3797 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3798 0, IPPROTO_TCP, 0);
3799 cmd_length = E1000_TXD_CMD_IP;
3800 ipcse = skb_transport_offset(skb) - 1;
3801 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3802 ipv6_hdr(skb)->payload_len = 0;
3803 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3804 &ipv6_hdr(skb)->daddr,
3805 0, IPPROTO_TCP, 0);
3806 ipcse = 0;
3807 }
3808 ipcss = skb_network_offset(skb);
3809 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3810 tucss = skb_transport_offset(skb);
3811 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3812 tucse = 0;
3813
3814 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3815 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3816
3817 i = tx_ring->next_to_use;
3818 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3819 buffer_info = &tx_ring->buffer_info[i];
3820
3821 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3822 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3823 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3824 context_desc->upper_setup.tcp_fields.tucss = tucss;
3825 context_desc->upper_setup.tcp_fields.tucso = tucso;
3826 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3827 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3828 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3829 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3830
3831 buffer_info->time_stamp = jiffies;
3832 buffer_info->next_to_watch = i;
3833
3834 i++;
3835 if (i == tx_ring->count)
3836 i = 0;
3837 tx_ring->next_to_use = i;
3838
3839 return 1;
bc7f75fa
AK		 3840}
3841
3842static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3843{
3844 struct e1000_ring *tx_ring = adapter->tx_ring;
3845 struct e1000_context_desc *context_desc;
3846 struct e1000_buffer *buffer_info;
3847 unsigned int i;
3848 u8 css;
af807c82 3849 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3850 __be16 protocol;
bc7f75fa 3851
af807c82
DG		 3852 if (skb->ip_summed != CHECKSUM_PARTIAL)
3853 return 0;
bc7f75fa 3854
5f66f208
AJ		 3855 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3856 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3857 else
3858 protocol = skb->protocol;
3859
3f518390 3860 switch (protocol) {
09640e63 3861 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3862 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3863 cmd_len |= E1000_TXD_CMD_TCP;
3864 break;
09640e63 3865 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3866 /* XXX not handling all IPV6 headers */
3867 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3868 cmd_len |= E1000_TXD_CMD_TCP;
3869 break;
3870 default:
3871 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3872 e_warn("checksum_partial proto=%x!\n",
3873 be16_to_cpu(protocol));
af807c82 3874 break;
bc7f75fa
AK		 3875 }
3876
af807c82
DG		 3877 css = skb_transport_offset(skb);
3878
3879 i = tx_ring->next_to_use;
3880 buffer_info = &tx_ring->buffer_info[i];
3881 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3882
3883 context_desc->lower_setup.ip_config = 0;
3884 context_desc->upper_setup.tcp_fields.tucss = css;
3885 context_desc->upper_setup.tcp_fields.tucso =
3886 css + skb->csum_offset;
3887 context_desc->upper_setup.tcp_fields.tucse = 0;
3888 context_desc->tcp_seg_setup.data = 0;
3889 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3890
3891 buffer_info->time_stamp = jiffies;
3892 buffer_info->next_to_watch = i;
3893
3894 i++;
3895 if (i == tx_ring->count)
3896 i = 0;
3897 tx_ring->next_to_use = i;
3898
3899 return 1;
bc7f75fa
AK		 3900}
3901
3902#define E1000_MAX_PER_TXD 8192
3903#define E1000_MAX_TXD_PWR 12
3904
3905static int e1000_tx_map(struct e1000_adapter *adapter,
3906 struct sk_buff *skb, unsigned int first,
3907 unsigned int max_per_txd, unsigned int nr_frags,
3908 unsigned int mss)
3909{
3910 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3911 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3912 struct e1000_buffer *buffer_info;
8ddc951c 3913 unsigned int len = skb_headlen(skb);
03b1320d 3914 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK		 3915 unsigned int f;
3916
3917 i = tx_ring->next_to_use;
3918
3919 while (len) {
1b7719c4 3920 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3921 size = min(len, max_per_txd);
3922
bc7f75fa 3923 buffer_info->length = size;
bc7f75fa 3924 buffer_info->time_stamp = jiffies;
bc7f75fa 3925 buffer_info->next_to_watch = i;
03b1320d
AD		 3926 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3927 size, PCI_DMA_TODEVICE);
3928 buffer_info->mapped_as_page = false;
3929 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3930 goto dma_error;
bc7f75fa
AK		 3931
3932 len -= size;
3933 offset += size;
03b1320d 3934 count++;
1b7719c4
AD		 3935
3936 if (len) {
3937 i++;
3938 if (i == tx_ring->count)
3939 i = 0;
3940 }
bc7f75fa
AK		 3941 }
3942
3943 for (f = 0; f < nr_frags; f++) {
3944 struct skb_frag_struct *frag;
3945
3946 frag = &skb_shinfo(skb)->frags[f];
3947 len = frag->size;
03b1320d 3948 offset = frag->page_offset;
bc7f75fa
AK		 3949
3950 while (len) {
1b7719c4
AD		 3951 i++;
3952 if (i == tx_ring->count)
3953 i = 0;
3954
bc7f75fa
AK		 3955 buffer_info = &tx_ring->buffer_info[i];
3956 size = min(len, max_per_txd);
bc7f75fa
AK		 3957
3958 buffer_info->length = size;
3959 buffer_info->time_stamp = jiffies;
bc7f75fa 3960 buffer_info->next_to_watch = i;
03b1320d
AD		 3961 buffer_info->dma = pci_map_page(pdev, frag->page,
3962 offset, size,
3963 PCI_DMA_TODEVICE);
3964 buffer_info->mapped_as_page = true;
3965 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3966 goto dma_error;
bc7f75fa
AK		 3967
3968 len -= size;
3969 offset += size;
3970 count++;
bc7f75fa
AK		 3971 }
3972 }
3973
bc7f75fa
AK		 3974 tx_ring->buffer_info[i].skb = skb;
3975 tx_ring->buffer_info[first].next_to_watch = i;
3976
3977 return count;
03b1320d
AD		 3978
3979dma_error:
3980 dev_err(&pdev->dev, "TX DMA map failed\n");
3981 buffer_info->dma = 0;
c1fa347f 3982 if (count)
03b1320d 3983 count--;
c1fa347f
RK		 3984
3985 while (count--) {
3986 if (i==0)
03b1320d 3987 i += tx_ring->count;
c1fa347f 3988 i--;
03b1320d
AD		 3989 buffer_info = &tx_ring->buffer_info[i];
3990 e1000_put_txbuf(adapter, buffer_info);;
3991 }
3992
3993 return 0;
bc7f75fa
AK		 3994}
3995
3996static void e1000_tx_queue(struct e1000_adapter *adapter,
3997 int tx_flags, int count)
3998{
3999 struct e1000_ring *tx_ring = adapter->tx_ring;
4000 struct e1000_tx_desc *tx_desc = NULL;
4001 struct e1000_buffer *buffer_info;
4002 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4003 unsigned int i;
4004
4005 if (tx_flags & E1000_TX_FLAGS_TSO) {
4006 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4007 E1000_TXD_CMD_TSE;
4008 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4009
4010 if (tx_flags & E1000_TX_FLAGS_IPV4)
4011 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4012 }
4013
4014 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4015 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4016 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4017 }
4018
4019 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4020 txd_lower |= E1000_TXD_CMD_VLE;
4021 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4022 }
4023
4024 i = tx_ring->next_to_use;
4025
4026 while (count--) {
4027 buffer_info = &tx_ring->buffer_info[i];
4028 tx_desc = E1000_TX_DESC(*tx_ring, i);
4029 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4030 tx_desc->lower.data =
4031 cpu_to_le32(txd_lower | buffer_info->length);
4032 tx_desc->upper.data = cpu_to_le32(txd_upper);
4033
4034 i++;
4035 if (i == tx_ring->count)
4036 i = 0;
4037 }
4038
4039 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4040
ad68076e
BA		 4041 /*
4042 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4043 * know there are new descriptors to fetch. (Only
4044 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4045 * such as IA-64).
4046 */
bc7f75fa
AK		 4047 wmb();
4048
4049 tx_ring->next_to_use = i;
4050 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4051 /*
4052 * we need this if more than one processor can write to our tail
4053 * at a time, it synchronizes IO on IA64/Altix systems
4054 */
bc7f75fa
AK		 4055 mmiowb();
4056}
4057
4058#define MINIMUM_DHCP_PACKET_SIZE 282
4059static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4060 struct sk_buff *skb)
4061{
4062 struct e1000_hw *hw = &adapter->hw;
4063 u16 length, offset;
4064
4065 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4066 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4067 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4068 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4069 return 0;
4070 }
4071
4072 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4073 return 0;
4074
4075 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4076 return 0;
4077
4078 {
4079 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4080 struct udphdr *udp;
4081
4082 if (ip->protocol != IPPROTO_UDP)
4083 return 0;
4084
4085 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4086 if (ntohs(udp->dest) != 67)
4087 return 0;
4088
4089 offset = (u8 *)udp + 8 - skb->data;
4090 length = skb->len - offset;
4091 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4092 }
4093
4094 return 0;
4095}
4096
4097static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4098{
4099 struct e1000_adapter *adapter = netdev_priv(netdev);
4100
4101 netif_stop_queue(netdev);
ad68076e
BA		 4102 /*
4103 * Herbert's original patch had:
bc7f75fa 4104 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4105 * but since that doesn't exist yet, just open code it.
4106 */
bc7f75fa
AK		 4107 smp_mb();
4108
ad68076e
BA		 4109 /*
4110 * We need to check again in a case another CPU has just
4111 * made room available.
4112 */
bc7f75fa
AK		 4113 if (e1000_desc_unused(adapter->tx_ring) < size)
4114 return -EBUSY;
4115
4116 /* A reprieve! */
4117 netif_start_queue(netdev);
4118 ++adapter->restart_queue;
4119 return 0;
4120}
4121
4122static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4123{
4124 struct e1000_adapter *adapter = netdev_priv(netdev);
4125
4126 if (e1000_desc_unused(adapter->tx_ring) >= size)
4127 return 0;
4128 return __e1000_maybe_stop_tx(netdev, size);
4129}
4130
4131#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4133 struct net_device *netdev)
bc7f75fa
AK		 4134{
4135 struct e1000_adapter *adapter = netdev_priv(netdev);
4136 struct e1000_ring *tx_ring = adapter->tx_ring;
4137 unsigned int first;
4138 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4139 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4140 unsigned int tx_flags = 0;
4e6c709c 4141 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4142 unsigned int nr_frags;
4143 unsigned int mss;
bc7f75fa
AK		 4144 int count = 0;
4145 int tso;
4146 unsigned int f;
bc7f75fa
AK		 4147
4148 if (test_bit(__E1000_DOWN, &adapter->state)) {
4149 dev_kfree_skb_any(skb);
4150 return NETDEV_TX_OK;
4151 }
4152
4153 if (skb->len <= 0) {
4154 dev_kfree_skb_any(skb);
4155 return NETDEV_TX_OK;
4156 }
4157
4158 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4159 /*
4160 * The controller does a simple calculation to
bc7f75fa
AK		 4161 * make sure there is enough room in the FIFO before
4162 * initiating the DMA for each buffer. The calc is:
4163 * 4 = ceil(buffer len/mss). To make sure we don't
4164 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4165 * drops.
4166 */
bc7f75fa
AK		 4167 if (mss) {
4168 u8 hdr_len;
4169 max_per_txd = min(mss << 2, max_per_txd);
4170 max_txd_pwr = fls(max_per_txd) - 1;
4171
ad68076e
BA		 4172 /*
4173 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4174 * points to just header, pull a few bytes of payload from
4175 * frags into skb->data
4176 */
bc7f75fa 4177 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4178 /*
4179 * we do this workaround for ES2LAN, but it is un-necessary,
4180 * avoiding it could save a lot of cycles
4181 */
4e6c709c 4182 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4183 unsigned int pull_size;
4184
4185 pull_size = min((unsigned int)4, skb->data_len);
4186 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4187 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4188 dev_kfree_skb_any(skb);
4189 return NETDEV_TX_OK;
4190 }
4191 len = skb->len - skb->data_len;
4192 }
4193 }
4194
4195 /* reserve a descriptor for the offload context */
4196 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4197 count++;
4198 count++;
4199
4200 count += TXD_USE_COUNT(len, max_txd_pwr);
4201
4202 nr_frags = skb_shinfo(skb)->nr_frags;
4203 for (f = 0; f < nr_frags; f++)
4204 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4205 max_txd_pwr);
4206
4207 if (adapter->hw.mac.tx_pkt_filtering)
4208 e1000_transfer_dhcp_info(adapter, skb);
4209
ad68076e
BA		 4210 /*
4211 * need: count + 2 desc gap to keep tail from touching
4212 * head, otherwise try next time
4213 */
92af3e95 4214 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4215 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4216
4217 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4218 tx_flags |= E1000_TX_FLAGS_VLAN;
4219 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4220 }
4221
4222 first = tx_ring->next_to_use;
4223
4224 tso = e1000_tso(adapter, skb);
4225 if (tso < 0) {
4226 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4227 return NETDEV_TX_OK;
4228 }
4229
4230 if (tso)
4231 tx_flags |= E1000_TX_FLAGS_TSO;
4232 else if (e1000_tx_csum(adapter, skb))
4233 tx_flags |= E1000_TX_FLAGS_CSUM;
4234
ad68076e
BA		 4235 /*
4236 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4237 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4238 * no longer assume, we must.
4239 */
bc7f75fa
AK		 4240 if (skb->protocol == htons(ETH_P_IP))
4241 tx_flags |= E1000_TX_FLAGS_IPV4;
4242
1b7719c4 4243 /* if count is 0 then mapping error has occured */
bc7f75fa 4244 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4245 if (count) {
4246 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4247 /* Make sure there is space in the ring for the next send. */
4248 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4249
4250 } else {
bc7f75fa 4251 dev_kfree_skb_any(skb);
1b7719c4
AD		 4252 tx_ring->buffer_info[first].time_stamp = 0;
4253 tx_ring->next_to_use = first;
bc7f75fa
AK		 4254 }
4255
bc7f75fa
AK		 4256 return NETDEV_TX_OK;
4257}
4258
4259/**
4260 * e1000_tx_timeout - Respond to a Tx Hang
4261 * @netdev: network interface device structure
4262 **/
4263static void e1000_tx_timeout(struct net_device *netdev)
4264{
4265 struct e1000_adapter *adapter = netdev_priv(netdev);
4266
4267 /* Do the reset outside of interrupt context */
4268 adapter->tx_timeout_count++;
4269 schedule_work(&adapter->reset_task);
4270}
4271
4272static void e1000_reset_task(struct work_struct *work)
4273{
4274 struct e1000_adapter *adapter;
4275 adapter = container_of(work, struct e1000_adapter, reset_task);
4276
4277 e1000e_reinit_locked(adapter);
4278}
4279
4280/**
4281 * e1000_get_stats - Get System Network Statistics
4282 * @netdev: network interface device structure
4283 *
4284 * Returns the address of the device statistics structure.
4285 * The statistics are actually updated from the timer callback.
4286 **/
4287static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4288{
bc7f75fa 4289 /* only return the current stats */
7274c20f 4290 return &netdev->stats;
bc7f75fa
AK		 4291}
4292
4293/**
4294 * e1000_change_mtu - Change the Maximum Transfer Unit
4295 * @netdev: network interface device structure
4296 * @new_mtu: new value for maximum frame size
4297 *
4298 * Returns 0 on success, negative on failure
4299 **/
4300static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4301{
4302 struct e1000_adapter *adapter = netdev_priv(netdev);
4303 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4304
2adc55c9
BA		 4305 /* Jumbo frame support */
4306 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4307 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4308 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4309 return -EINVAL;
4310 }
4311
2adc55c9
BA		 4312 /* Supported frame sizes */
4313 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4314 (max_frame > adapter->max_hw_frame_size)) {
4315 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4316 return -EINVAL;
4317 }
4318
4319 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4320 msleep(1);
610c9928 4321 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4322 adapter->max_frame_size = max_frame;
610c9928
BA		 4323 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4324 netdev->mtu = new_mtu;
bc7f75fa
AK		 4325 if (netif_running(netdev))
4326 e1000e_down(adapter);
4327
ad68076e
BA		 4328 /*
4329 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4330 * means we reserve 2 more, this pushes us to allocate from the next
4331 * larger slab size.
ad68076e 4332 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4333 * However with the new *_jumbo_rx* routines, jumbo receives will use
4334 * fragmented skbs
ad68076e 4335 */
bc7f75fa
AK		 4336
4337 if (max_frame <= 256)
4338 adapter->rx_buffer_len = 256;
4339 else if (max_frame <= 512)
4340 adapter->rx_buffer_len = 512;
4341 else if (max_frame <= 1024)
4342 adapter->rx_buffer_len = 1024;
4343 else if (max_frame <= 2048)
4344 adapter->rx_buffer_len = 2048;
4345 else
4346 adapter->rx_buffer_len = 4096;
4347
4348 /* adjust allocation if LPE protects us, and we aren't using SBP */
4349 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4350 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4351 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4352 + ETH_FCS_LEN;
bc7f75fa 4353
bc7f75fa
AK		 4354 if (netif_running(netdev))
4355 e1000e_up(adapter);
4356 else
4357 e1000e_reset(adapter);
4358
4359 clear_bit(__E1000_RESETTING, &adapter->state);
4360
4361 return 0;
4362}
4363
4364static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4365 int cmd)
4366{
4367 struct e1000_adapter *adapter = netdev_priv(netdev);
4368 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4369
318a94d6 4370 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4371 return -EOPNOTSUPP;
4372
4373 switch (cmd) {
4374 case SIOCGMIIPHY:
4375 data->phy_id = adapter->hw.phy.addr;
4376 break;
4377 case SIOCGMIIREG:
b16a002e
BA		 4378 e1000_phy_read_status(adapter);
4379
7c25769f
BA		 4380 switch (data->reg_num & 0x1F) {
4381 case MII_BMCR:
4382 data->val_out = adapter->phy_regs.bmcr;
4383 break;
4384 case MII_BMSR:
4385 data->val_out = adapter->phy_regs.bmsr;
4386 break;
4387 case MII_PHYSID1:
4388 data->val_out = (adapter->hw.phy.id >> 16);
4389 break;
4390 case MII_PHYSID2:
4391 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4392 break;
4393 case MII_ADVERTISE:
4394 data->val_out = adapter->phy_regs.advertise;
4395 break;
4396 case MII_LPA:
4397 data->val_out = adapter->phy_regs.lpa;
4398 break;
4399 case MII_EXPANSION:
4400 data->val_out = adapter->phy_regs.expansion;
4401 break;
4402 case MII_CTRL1000:
4403 data->val_out = adapter->phy_regs.ctrl1000;
4404 break;
4405 case MII_STAT1000:
4406 data->val_out = adapter->phy_regs.stat1000;
4407 break;
4408 case MII_ESTATUS:
4409 data->val_out = adapter->phy_regs.estatus;
4410 break;
4411 default:
bc7f75fa
AK		 4412 return -EIO;
4413 }
bc7f75fa
AK		 4414 break;
4415 case SIOCSMIIREG:
4416 default:
4417 return -EOPNOTSUPP;
4418 }
4419 return 0;
4420}
4421
4422static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4423{
4424 switch (cmd) {
4425 case SIOCGMIIPHY:
4426 case SIOCGMIIREG:
4427 case SIOCSMIIREG:
4428 return e1000_mii_ioctl(netdev, ifr, cmd);
4429 default:
4430 return -EOPNOTSUPP;
4431 }
4432}
4433
a4f58f54
BA		 4434static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4435{
4436 struct e1000_hw *hw = &adapter->hw;
4437 u32 i, mac_reg;
4438 u16 phy_reg;
4439 int retval = 0;
4440
4441 /* copy MAC RARs to PHY RARs */
4442 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4443 mac_reg = er32(RAL(i));
4444 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4445 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4446 mac_reg = er32(RAH(i));
4447 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4448 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4449 }
4450
4451 /* copy MAC MTA to PHY MTA */
4452 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4453 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4454 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4455 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4456 }
4457
4458 /* configure PHY Rx Control register */
4459 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4460 mac_reg = er32(RCTL);
4461 if (mac_reg & E1000_RCTL_UPE)
4462 phy_reg |= BM_RCTL_UPE;
4463 if (mac_reg & E1000_RCTL_MPE)
4464 phy_reg |= BM_RCTL_MPE;
4465 phy_reg &= ~(BM_RCTL_MO_MASK);
4466 if (mac_reg & E1000_RCTL_MO_3)
4467 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4468 << BM_RCTL_MO_SHIFT);
4469 if (mac_reg & E1000_RCTL_BAM)
4470 phy_reg |= BM_RCTL_BAM;
4471 if (mac_reg & E1000_RCTL_PMCF)
4472 phy_reg |= BM_RCTL_PMCF;
4473 mac_reg = er32(CTRL);
4474 if (mac_reg & E1000_CTRL_RFCE)
4475 phy_reg |= BM_RCTL_RFCE;
4476 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4477
4478 /* enable PHY wakeup in MAC register */
4479 ew32(WUFC, wufc);
4480 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4481
4482 /* configure and enable PHY wakeup in PHY registers */
4483 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4484 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4485
4486 /* activate PHY wakeup */
94d8186a 4487 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4488 if (retval) {
4489 e_err("Could not acquire PHY\n");
4490 return retval;
4491 }
4492 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4493 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4494 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4495 if (retval) {
4496 e_err("Could not read PHY page 769\n");
4497 goto out;
4498 }
4499 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4500 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4501 if (retval)
4502 e_err("Could not set PHY Host Wakeup bit\n");
4503out:
94d8186a 4504 hw->phy.ops.release(hw);
a4f58f54
BA		 4505
4506 return retval;
4507}
4508
4f9de721 4509static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4510{
4511 struct net_device *netdev = pci_get_drvdata(pdev);
4512 struct e1000_adapter *adapter = netdev_priv(netdev);
4513 struct e1000_hw *hw = &adapter->hw;
4514 u32 ctrl, ctrl_ext, rctl, status;
4515 u32 wufc = adapter->wol;
4516 int retval = 0;
4517
4518 netif_device_detach(netdev);
4519
4520 if (netif_running(netdev)) {
4521 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4522 e1000e_down(adapter);
4523 e1000_free_irq(adapter);
4524 }
4662e82b 4525 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4526
4527 retval = pci_save_state(pdev);
4528 if (retval)
4529 return retval;
4530
4531 status = er32(STATUS);
4532 if (status & E1000_STATUS_LU)
4533 wufc &= ~E1000_WUFC_LNKC;
4534
4535 if (wufc) {
4536 e1000_setup_rctl(adapter);
4537 e1000_set_multi(netdev);
4538
4539 /* turn on all-multi mode if wake on multicast is enabled */
4540 if (wufc & E1000_WUFC_MC) {
4541 rctl = er32(RCTL);
4542 rctl |= E1000_RCTL_MPE;
4543 ew32(RCTL, rctl);
4544 }
4545
4546 ctrl = er32(CTRL);
4547 /* advertise wake from D3Cold */
4548 #define E1000_CTRL_ADVD3WUC 0x00100000
4549 /* phy power management enable */
4550 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4551 ctrl |= E1000_CTRL_ADVD3WUC;
4552 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4553 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4554 ew32(CTRL, ctrl);
4555
318a94d6
JK		 4556 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4557 adapter->hw.phy.media_type ==
4558 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4559 /* keep the laser running in D3 */
4560 ctrl_ext = er32(CTRL_EXT);
93a23f48 4561 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4562 ew32(CTRL_EXT, ctrl_ext);
4563 }
4564
97ac8cae
BA		 4565 if (adapter->flags & FLAG_IS_ICH)
4566 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4567
bc7f75fa
AK		 4568 /* Allow time for pending master requests to run */
4569 e1000e_disable_pcie_master(&adapter->hw);
4570
82776a4b 4571 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4572 /* enable wakeup by the PHY */
4573 retval = e1000_init_phy_wakeup(adapter, wufc);
4574 if (retval)
4575 return retval;
4576 } else {
4577 /* enable wakeup by the MAC */
4578 ew32(WUFC, wufc);
4579 ew32(WUC, E1000_WUC_PME_EN);
4580 }
bc7f75fa
AK		 4581 } else {
4582 ew32(WUC, 0);
4583 ew32(WUFC, 0);
bc7f75fa
AK		 4584 }
4585
4f9de721
RW		 4586 *enable_wake = !!wufc;
4587
bc7f75fa 4588 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4589 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4590 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4591 *enable_wake = true;
bc7f75fa
AK		 4592
4593 if (adapter->hw.phy.type == e1000_phy_igp_3)
4594 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4595
ad68076e
BA		 4596 /*
4597 * Release control of h/w to f/w. If f/w is AMT enabled, this
4598 * would have already happened in close and is redundant.
4599 */
bc7f75fa
AK		 4600 e1000_release_hw_control(adapter);
4601
4602 pci_disable_device(pdev);
4603
4f9de721
RW		 4604 return 0;
4605}
4606
4607static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4608{
4609 if (sleep && wake) {
4610 pci_prepare_to_sleep(pdev);
4611 return;
4612 }
4613
4614 pci_wake_from_d3(pdev, wake);
4615 pci_set_power_state(pdev, PCI_D3hot);
4616}
4617
4618static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4619 bool wake)
4620{
4621 struct net_device *netdev = pci_get_drvdata(pdev);
4622 struct e1000_adapter *adapter = netdev_priv(netdev);
4623
005cbdfc
AD		 4624 /*
4625 * The pci-e switch on some quad port adapters will report a
4626 * correctable error when the MAC transitions from D0 to D3. To
4627 * prevent this we need to mask off the correctable errors on the
4628 * downstream port of the pci-e switch.
4629 */
4630 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4631 struct pci_dev *us_dev = pdev->bus->self;
4632 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4633 u16 devctl;
4634
4635 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4636 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4637 (devctl & ~PCI_EXP_DEVCTL_CERE));
4638
4f9de721 4639 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4640
4641 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4642 } else {
4f9de721 4643 e1000_power_off(pdev, sleep, wake);
005cbdfc 4644 }
bc7f75fa
AK		 4645}
4646
1eae4eb2
AK		 4647static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4648{
4649 int pos;
1eae4eb2
AK		 4650 u16 val;
4651
4652 /*
4653 * 82573 workaround - disable L1 ASPM on mobile chipsets
4654 *
4655 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4656 * resulting in lost data or garbage information on the pci-e link
4657 * level. This could result in (false) bad EEPROM checksum errors,
4658 * long ping times (up to 2s) or even a system freeze/hang.
4659 *
4660 * Unfortunately this feature saves about 1W power consumption when
4661 * active.
4662 */
4663 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4664 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4665 if (val & 0x2) {
4666 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4667 val &= ~0x2;
4668 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4669 }
4670}
4671
bc7f75fa 4672#ifdef CONFIG_PM
4f9de721
RW		 4673static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4674{
4675 int retval;
4676 bool wake;
4677
4678 retval = __e1000_shutdown(pdev, &wake);
4679 if (!retval)
4680 e1000_complete_shutdown(pdev, true, wake);
4681
4682 return retval;
4683}
4684
bc7f75fa
AK		 4685static int e1000_resume(struct pci_dev *pdev)
4686{
4687 struct net_device *netdev = pci_get_drvdata(pdev);
4688 struct e1000_adapter *adapter = netdev_priv(netdev);
4689 struct e1000_hw *hw = &adapter->hw;
4690 u32 err;
4691
4692 pci_set_power_state(pdev, PCI_D0);
4693 pci_restore_state(pdev);
28b8f04a 4694 pci_save_state(pdev);
1eae4eb2 4695 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4696
f0f422e5 4697 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4698 if (err) {
4699 dev_err(&pdev->dev,
4700 "Cannot enable PCI device from suspend\n");
4701 return err;
4702 }
4703
4704 pci_set_master(pdev);
4705
4706 pci_enable_wake(pdev, PCI_D3hot, 0);
4707 pci_enable_wake(pdev, PCI_D3cold, 0);
4708
4662e82b 4709 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4710 if (netif_running(netdev)) {
4711 err = e1000_request_irq(adapter);
4712 if (err)
4713 return err;
4714 }
4715
4716 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4717
4718 /* report the system wakeup cause from S3/S4 */
4719 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4720 u16 phy_data;
4721
4722 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4723 if (phy_data) {
4724 e_info("PHY Wakeup cause - %s\n",
4725 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4726 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4727 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4728 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4729 phy_data & E1000_WUS_LNKC ? "Link Status "
4730 " Change" : "other");
4731 }
4732 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4733 } else {
4734 u32 wus = er32(WUS);
4735 if (wus) {
4736 e_info("MAC Wakeup cause - %s\n",
4737 wus & E1000_WUS_EX ? "Unicast Packet" :
4738 wus & E1000_WUS_MC ? "Multicast Packet" :
4739 wus & E1000_WUS_BC ? "Broadcast Packet" :
4740 wus & E1000_WUS_MAG ? "Magic Packet" :
4741 wus & E1000_WUS_LNKC ? "Link Status Change" :
4742 "other");
4743 }
4744 ew32(WUS, ~0);
4745 }
4746
bc7f75fa 4747 e1000e_reset(adapter);
bc7f75fa
AK		 4748
4749 e1000_init_manageability(adapter);
4750
4751 if (netif_running(netdev))
4752 e1000e_up(adapter);
4753
4754 netif_device_attach(netdev);
4755
ad68076e
BA		 4756 /*
4757 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4758 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4759 * under the control of the driver.
4760 */
c43bc57e 4761 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4762 e1000_get_hw_control(adapter);
4763
4764 return 0;
4765}
4766#endif
4767
4768static void e1000_shutdown(struct pci_dev *pdev)
4769{
4f9de721
RW		 4770 bool wake = false;
4771
4772 __e1000_shutdown(pdev, &wake);
4773
4774 if (system_state == SYSTEM_POWER_OFF)
4775 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4776}
4777
4778#ifdef CONFIG_NET_POLL_CONTROLLER
4779/*
4780 * Polling 'interrupt' - used by things like netconsole to send skbs
4781 * without having to re-enable interrupts. It's not called while
4782 * the interrupt routine is executing.
4783 */
4784static void e1000_netpoll(struct net_device *netdev)
4785{
4786 struct e1000_adapter *adapter = netdev_priv(netdev);
4787
4788 disable_irq(adapter->pdev->irq);
4789 e1000_intr(adapter->pdev->irq, netdev);
4790
bc7f75fa
AK		 4791 enable_irq(adapter->pdev->irq);
4792}
4793#endif
4794
4795/**
4796 * e1000_io_error_detected - called when PCI error is detected
4797 * @pdev: Pointer to PCI device
4798 * @state: The current pci connection state
4799 *
4800 * This function is called after a PCI bus error affecting
4801 * this device has been detected.
4802 */
4803static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4804 pci_channel_state_t state)
4805{
4806 struct net_device *netdev = pci_get_drvdata(pdev);
4807 struct e1000_adapter *adapter = netdev_priv(netdev);
4808
4809 netif_device_detach(netdev);
4810
c93b5a76
MM		 4811 if (state == pci_channel_io_perm_failure)
4812 return PCI_ERS_RESULT_DISCONNECT;
4813
bc7f75fa
AK		 4814 if (netif_running(netdev))
4815 e1000e_down(adapter);
4816 pci_disable_device(pdev);
4817
4818 /* Request a slot slot reset. */
4819 return PCI_ERS_RESULT_NEED_RESET;
4820}
4821
4822/**
4823 * e1000_io_slot_reset - called after the pci bus has been reset.
4824 * @pdev: Pointer to PCI device
4825 *
4826 * Restart the card from scratch, as if from a cold-boot. Implementation
4827 * resembles the first-half of the e1000_resume routine.
4828 */
4829static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4830{
4831 struct net_device *netdev = pci_get_drvdata(pdev);
4832 struct e1000_adapter *adapter = netdev_priv(netdev);
4833 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4834 int err;
111b9dc5 4835 pci_ers_result_t result;
bc7f75fa 4836
1eae4eb2 4837 e1000e_disable_l1aspm(pdev);
f0f422e5 4838 err = pci_enable_device_mem(pdev);
6e4f6f6b 4839 if (err) {
bc7f75fa
AK		 4840 dev_err(&pdev->dev,
4841 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4842 result = PCI_ERS_RESULT_DISCONNECT;
4843 } else {
4844 pci_set_master(pdev);
4845 pci_restore_state(pdev);
28b8f04a 4846 pci_save_state(pdev);
bc7f75fa 4847
111b9dc5
JB		 4848 pci_enable_wake(pdev, PCI_D3hot, 0);
4849 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4850
111b9dc5
JB		 4851 e1000e_reset(adapter);
4852 ew32(WUS, ~0);
4853 result = PCI_ERS_RESULT_RECOVERED;
4854 }
bc7f75fa 4855
111b9dc5
JB		 4856 pci_cleanup_aer_uncorrect_error_status(pdev);
4857
4858 return result;
bc7f75fa
AK		 4859}
4860
4861/**
4862 * e1000_io_resume - called when traffic can start flowing again.
4863 * @pdev: Pointer to PCI device
4864 *
4865 * This callback is called when the error recovery driver tells us that
4866 * its OK to resume normal operation. Implementation resembles the
4867 * second-half of the e1000_resume routine.
4868 */
4869static void e1000_io_resume(struct pci_dev *pdev)
4870{
4871 struct net_device *netdev = pci_get_drvdata(pdev);
4872 struct e1000_adapter *adapter = netdev_priv(netdev);
4873
4874 e1000_init_manageability(adapter);
4875
4876 if (netif_running(netdev)) {
4877 if (e1000e_up(adapter)) {
4878 dev_err(&pdev->dev,
4879 "can't bring device back up after reset\n");
4880 return;
4881 }
4882 }
4883
4884 netif_device_attach(netdev);
4885
ad68076e
BA		 4886 /*
4887 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4888 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4889 * under the control of the driver.
4890 */
c43bc57e 4891 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4892 e1000_get_hw_control(adapter);
4893
4894}
4895
4896static void e1000_print_device_info(struct e1000_adapter *adapter)
4897{
4898 struct e1000_hw *hw = &adapter->hw;
4899 struct net_device *netdev = adapter->netdev;
69e3fd8c 4900 u32 pba_num;
bc7f75fa
AK		 4901
4902 /* print bus type/speed/width info */
7c510e4b 4903 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4904 /* bus width */
4905 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4906 "Width x1"),
4907 /* MAC address */
7c510e4b 4908 netdev->dev_addr);
44defeb3
JK		 4909 e_info("Intel(R) PRO/%s Network Connection\n",
4910 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4911 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4912 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4913 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4914}
4915
10aa4c04
AK		 4916static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4917{
4918 struct e1000_hw *hw = &adapter->hw;
4919 int ret_val;
4920 u16 buf = 0;
4921
4922 if (hw->mac.type != e1000_82573)
4923 return;
4924
4925 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4926 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4927 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4928 dev_warn(&adapter->pdev->dev,
4929 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4930 }
4931
4932 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4933 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4934 /* ASPM enable */
6c2a9efa
FP		 4935 dev_warn(&adapter->pdev->dev,
4936 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4937 }
4938}
4939
651c2466
SH		 4940static const struct net_device_ops e1000e_netdev_ops = {
4941 .ndo_open = e1000_open,
4942 .ndo_stop = e1000_close,
00829823 4943 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4944 .ndo_get_stats = e1000_get_stats,
4945 .ndo_set_multicast_list = e1000_set_multi,
4946 .ndo_set_mac_address = e1000_set_mac,
4947 .ndo_change_mtu = e1000_change_mtu,
4948 .ndo_do_ioctl = e1000_ioctl,
4949 .ndo_tx_timeout = e1000_tx_timeout,
4950 .ndo_validate_addr = eth_validate_addr,
4951
4952 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4953 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4954 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4955#ifdef CONFIG_NET_POLL_CONTROLLER
4956 .ndo_poll_controller = e1000_netpoll,
4957#endif
4958};
4959
bc7f75fa
AK		 4960/**
4961 * e1000_probe - Device Initialization Routine
4962 * @pdev: PCI device information struct
4963 * @ent: entry in e1000_pci_tbl
4964 *
4965 * Returns 0 on success, negative on failure
4966 *
4967 * e1000_probe initializes an adapter identified by a pci_dev structure.
4968 * The OS initialization, configuring of the adapter private structure,
4969 * and a hardware reset occur.
4970 **/
4971static int __devinit e1000_probe(struct pci_dev *pdev,
4972 const struct pci_device_id *ent)
4973{
4974 struct net_device *netdev;
4975 struct e1000_adapter *adapter;
4976 struct e1000_hw *hw;
4977 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4978 resource_size_t mmio_start, mmio_len;
4979 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4980
4981 static int cards_found;
4982 int i, err, pci_using_dac;
4983 u16 eeprom_data = 0;
4984 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4985
1eae4eb2 4986 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4987
f0f422e5 4988 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4989 if (err)
4990 return err;
4991
4992 pci_using_dac = 0;
6a35528a 4993 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4994 if (!err) {
6a35528a 4995 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4996 if (!err)
4997 pci_using_dac = 1;
4998 } else {
284901a9 4999 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 5000 if (err) {
5001 err = pci_set_consistent_dma_mask(pdev,
284901a9 5002 DMA_BIT_MASK(32));
bc7f75fa
AK		 5003 if (err) {
5004 dev_err(&pdev->dev, "No usable DMA "
5005 "configuration, aborting\n");
5006 goto err_dma;
5007 }
5008 }
5009 }
5010
e8de1481 5011 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5012 pci_select_bars(pdev, IORESOURCE_MEM),
5013 e1000e_driver_name);
bc7f75fa
AK		 5014 if (err)
5015 goto err_pci_reg;
5016
68eac460 5017 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5018 pci_enable_pcie_error_reporting(pdev);
68eac460 5019
bc7f75fa 5020 pci_set_master(pdev);
438b365a
BA		 5021 /* PCI config space info */
5022 err = pci_save_state(pdev);
5023 if (err)
5024 goto err_alloc_etherdev;
bc7f75fa
AK		 5025
5026 err = -ENOMEM;
5027 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5028 if (!netdev)
5029 goto err_alloc_etherdev;
5030
bc7f75fa
AK		 5031 SET_NETDEV_DEV(netdev, &pdev->dev);
5032
5033 pci_set_drvdata(pdev, netdev);
5034 adapter = netdev_priv(netdev);
5035 hw = &adapter->hw;
5036 adapter->netdev = netdev;
5037 adapter->pdev = pdev;
5038 adapter->ei = ei;
5039 adapter->pba = ei->pba;
5040 adapter->flags = ei->flags;
eb7c3adb 5041 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5042 adapter->hw.adapter = adapter;
5043 adapter->hw.mac.type = ei->mac;
2adc55c9 5044 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5045 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5046
5047 mmio_start = pci_resource_start(pdev, 0);
5048 mmio_len = pci_resource_len(pdev, 0);
5049
5050 err = -EIO;
5051 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5052 if (!adapter->hw.hw_addr)
5053 goto err_ioremap;
5054
5055 if ((adapter->flags & FLAG_HAS_FLASH) &&
5056 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5057 flash_start = pci_resource_start(pdev, 1);
5058 flash_len = pci_resource_len(pdev, 1);
5059 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5060 if (!adapter->hw.flash_address)
5061 goto err_flashmap;
5062 }
5063
5064 /* construct the net_device struct */
651c2466 5065 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5066 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5067 netdev->watchdog_timeo = 5 * HZ;
5068 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5069 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5070
5071 netdev->mem_start = mmio_start;
5072 netdev->mem_end = mmio_start + mmio_len;
5073
5074 adapter->bd_number = cards_found++;
5075
4662e82b
BA		 5076 e1000e_check_options(adapter);
5077
bc7f75fa
AK		 5078 /* setup adapter struct */
5079 err = e1000_sw_init(adapter);
5080 if (err)
5081 goto err_sw_init;
5082
5083 err = -EIO;
5084
5085 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5086 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5087 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5088
69e3fd8c 5089 err = ei->get_variants(adapter);
bc7f75fa
AK		 5090 if (err)
5091 goto err_hw_init;
5092
4a770358
BA		 5093 if ((adapter->flags & FLAG_IS_ICH) &&
5094 (adapter->flags & FLAG_READ_ONLY_NVM))
5095 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5096
bc7f75fa
AK		 5097 hw->mac.ops.get_bus_info(&adapter->hw);
5098
318a94d6 5099 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5100
5101 /* Copper options */
318a94d6 5102 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5103 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5104 adapter->hw.phy.disable_polarity_correction = 0;
5105 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5106 }
5107
5108 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5109 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5110
5111 netdev->features = NETIF_F_SG |
5112 NETIF_F_HW_CSUM |
5113 NETIF_F_HW_VLAN_TX |
5114 NETIF_F_HW_VLAN_RX;
5115
5116 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5117 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5118
5119 netdev->features |= NETIF_F_TSO;
5120 netdev->features |= NETIF_F_TSO6;
5121
a5136e23
JK		 5122 netdev->vlan_features |= NETIF_F_TSO;
5123 netdev->vlan_features |= NETIF_F_TSO6;
5124 netdev->vlan_features |= NETIF_F_HW_CSUM;
5125 netdev->vlan_features |= NETIF_F_SG;
5126
bc7f75fa
AK		 5127 if (pci_using_dac)
5128 netdev->features |= NETIF_F_HIGHDMA;
5129
bc7f75fa
AK		 5130 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5131 adapter->flags |= FLAG_MNG_PT_ENABLED;
5132
ad68076e
BA		 5133 /*
5134 * before reading the NVM, reset the controller to
5135 * put the device in a known good starting state
5136 */
bc7f75fa
AK		 5137 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5138
5139 /*
5140 * systems with ASPM and others may see the checksum fail on the first
5141 * attempt. Let's give it a few tries
5142 */
5143 for (i = 0;; i++) {
5144 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5145 break;
5146 if (i == 2) {
44defeb3 5147 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5148 err = -EIO;
5149 goto err_eeprom;
5150 }
5151 }
5152
10aa4c04
AK		 5153 e1000_eeprom_checks(adapter);
5154
bc7f75fa
AK		 5155 /* copy the MAC address out of the NVM */
5156 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5157 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5158
5159 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5160 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5161
5162 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5163 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5164 err = -EIO;
5165 goto err_eeprom;
5166 }
5167
5168 init_timer(&adapter->watchdog_timer);
5169 adapter->watchdog_timer.function = &e1000_watchdog;
5170 adapter->watchdog_timer.data = (unsigned long) adapter;
5171
5172 init_timer(&adapter->phy_info_timer);
5173 adapter->phy_info_timer.function = &e1000_update_phy_info;
5174 adapter->phy_info_timer.data = (unsigned long) adapter;
5175
5176 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5177 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5178 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5179 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5180 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5181
bc7f75fa
AK		 5182 /* Initialize link parameters. User can change them with ethtool */
5183 adapter->hw.mac.autoneg = 1;
309af40b 5184 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5185 adapter->hw.fc.requested_mode = e1000_fc_default;
5186 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5187 adapter->hw.phy.autoneg_advertised = 0x2f;
5188
5189 /* ring size defaults */
5190 adapter->rx_ring->count = 256;
5191 adapter->tx_ring->count = 256;
5192
5193 /*
5194 * Initial Wake on LAN setting - If APM wake is enabled in
5195 * the EEPROM, enable the ACPI Magic Packet filter
5196 */
5197 if (adapter->flags & FLAG_APME_IN_WUC) {
5198 /* APME bit in EEPROM is mapped to WUC.APME */
5199 eeprom_data = er32(WUC);
5200 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5201 if (eeprom_data & E1000_WUC_PHY_WAKE)
5202 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5203 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5204 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5205 (adapter->hw.bus.func == 1))
5206 e1000_read_nvm(&adapter->hw,
5207 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5208 else
5209 e1000_read_nvm(&adapter->hw,
5210 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5211 }
5212
5213 /* fetch WoL from EEPROM */
5214 if (eeprom_data & eeprom_apme_mask)
5215 adapter->eeprom_wol |= E1000_WUFC_MAG;
5216
5217 /*
5218 * now that we have the eeprom settings, apply the special cases
5219 * where the eeprom may be wrong or the board simply won't support
5220 * wake on lan on a particular port
5221 */
5222 if (!(adapter->flags & FLAG_HAS_WOL))
5223 adapter->eeprom_wol = 0;
5224
5225 /* initialize the wol settings based on the eeprom settings */
5226 adapter->wol = adapter->eeprom_wol;
6ff68026 5227 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5228
84527590
BA		 5229 /* save off EEPROM version number */
5230 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5231
bc7f75fa
AK		 5232 /* reset the hardware with the new settings */
5233 e1000e_reset(adapter);
5234
ad68076e
BA		 5235 /*
5236 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5237 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5238 * under the control of the driver.
5239 */
c43bc57e 5240 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5241 e1000_get_hw_control(adapter);
5242
bc7f75fa
AK		 5243 strcpy(netdev->name, "eth%d");
5244 err = register_netdev(netdev);
5245 if (err)
5246 goto err_register;
5247
9c563d20
JB		 5248 /* carrier off reporting is important to ethtool even BEFORE open */
5249 netif_carrier_off(netdev);
5250
bc7f75fa
AK		 5251 e1000_print_device_info(adapter);
5252
5253 return 0;
5254
5255err_register:
c43bc57e
JB		 5256 if (!(adapter->flags & FLAG_HAS_AMT))
5257 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5258err_eeprom:
5259 if (!e1000_check_reset_block(&adapter->hw))
5260 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5261err_hw_init:
bc7f75fa 5262
bc7f75fa
AK		 5263 kfree(adapter->tx_ring);
5264 kfree(adapter->rx_ring);
5265err_sw_init:
c43bc57e
JB		 5266 if (adapter->hw.flash_address)
5267 iounmap(adapter->hw.flash_address);
e82f54ba 5268 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5269err_flashmap:
bc7f75fa
AK		 5270 iounmap(adapter->hw.hw_addr);
5271err_ioremap:
5272 free_netdev(netdev);
5273err_alloc_etherdev:
f0f422e5
BA		 5274 pci_release_selected_regions(pdev,
5275 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5276err_pci_reg:
5277err_dma:
5278 pci_disable_device(pdev);
5279 return err;
5280}
5281
5282/**
5283 * e1000_remove - Device Removal Routine
5284 * @pdev: PCI device information struct
5285 *
5286 * e1000_remove is called by the PCI subsystem to alert the driver
5287 * that it should release a PCI device. The could be caused by a
5288 * Hot-Plug event, or because the driver is going to be removed from
5289 * memory.
5290 **/
5291static void __devexit e1000_remove(struct pci_dev *pdev)
5292{
5293 struct net_device *netdev = pci_get_drvdata(pdev);
5294 struct e1000_adapter *adapter = netdev_priv(netdev);
5295
ad68076e
BA		 5296 /*
5297 * flush_scheduled work may reschedule our watchdog task, so
5298 * explicitly disable watchdog tasks from being rescheduled
5299 */
bc7f75fa
AK		 5300 set_bit(__E1000_DOWN, &adapter->state);
5301 del_timer_sync(&adapter->watchdog_timer);
5302 del_timer_sync(&adapter->phy_info_timer);
5303
41cec6f1
BA		 5304 cancel_work_sync(&adapter->reset_task);
5305 cancel_work_sync(&adapter->watchdog_task);
5306 cancel_work_sync(&adapter->downshift_task);
5307 cancel_work_sync(&adapter->update_phy_task);
5308 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5309 flush_scheduled_work();
5310
17f208de
BA		 5311 if (!(netdev->flags & IFF_UP))
5312 e1000_power_down_phy(adapter);
5313
5314 unregister_netdev(netdev);
5315
ad68076e
BA		 5316 /*
5317 * Release control of h/w to f/w. If f/w is AMT enabled, this
5318 * would have already happened in close and is redundant.
5319 */
bc7f75fa
AK		 5320 e1000_release_hw_control(adapter);
5321
4662e82b 5322 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5323 kfree(adapter->tx_ring);
5324 kfree(adapter->rx_ring);
5325
5326 iounmap(adapter->hw.hw_addr);
5327 if (adapter->hw.flash_address)
5328 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5329 pci_release_selected_regions(pdev,
5330 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5331
5332 free_netdev(netdev);
5333
111b9dc5 5334 /* AER disable */
19d5afd4 5335 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5336
bc7f75fa
AK		 5337 pci_disable_device(pdev);
5338}
5339
5340/* PCI Error Recovery (ERS) */
5341static struct pci_error_handlers e1000_err_handler = {
5342 .error_detected = e1000_io_error_detected,
5343 .slot_reset = e1000_io_slot_reset,
5344 .resume = e1000_io_resume,
5345};
5346
5347static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5351 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5353 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5355 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5357
bc7f75fa
AK		 5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5359 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5360 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5362
bc7f75fa
AK		 5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5366
4662e82b 5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5368 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5369 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5370
bc7f75fa
AK		 5371 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5372 board_80003es2lan },
5373 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5374 board_80003es2lan },
5375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5376 board_80003es2lan },
5377 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5378 board_80003es2lan },
ad68076e 5379
bc7f75fa
AK		 5380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5382 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5383 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5384 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5385 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5386 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5387 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5388
bc7f75fa
AK		 5389 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5390 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5391 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5392 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5393 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5394 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5395 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5396 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5397 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5398
5399 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5400 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5401 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5402
f4187b56
BA		 5403 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5404 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5405
a4f58f54
BA		 5406 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5407 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5408 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5409 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5410
bc7f75fa
AK		 5411 { } /* terminate list */
5412};
5413MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5414
5415/* PCI Device API Driver */
5416static struct pci_driver e1000_driver = {
5417 .name = e1000e_driver_name,
5418 .id_table = e1000_pci_tbl,
5419 .probe = e1000_probe,
5420 .remove = __devexit_p(e1000_remove),
5421#ifdef CONFIG_PM
ad68076e 5422 /* Power Management Hooks */
bc7f75fa
AK		 5423 .suspend = e1000_suspend,
5424 .resume = e1000_resume,
5425#endif
5426 .shutdown = e1000_shutdown,
5427 .err_handler = &e1000_err_handler
5428};
5429
5430/**
5431 * e1000_init_module - Driver Registration Routine
5432 *
5433 * e1000_init_module is the first routine called when the driver is
5434 * loaded. All it does is register with the PCI subsystem.
5435 **/
5436static int __init e1000_init_module(void)
5437{
5438 int ret;
5439 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5440 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5441 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5442 e1000e_driver_name);
5443 ret = pci_register_driver(&e1000_driver);
53ec5498 5444
bc7f75fa
AK		 5445 return ret;
5446}
5447module_init(e1000_init_module);
5448
5449/**
5450 * e1000_exit_module - Driver Exit Cleanup Routine
5451 *
5452 * e1000_exit_module is called just before the driver is removed
5453 * from memory.
5454 **/
5455static void __exit e1000_exit_module(void)
5456{
5457 pci_unregister_driver(&e1000_driver);
5458}
5459module_exit(e1000_exit_module);
5460
5461
5462MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5463MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5464MODULE_LICENSE("GPL");
5465MODULE_VERSION(DRV_VERSION);
5466
5467/* e1000_main.c */
Linux kernel - Deliverables
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