e1000e: increase minimum frame size allowed
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
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5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
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47
48#include "e1000.h"
49
97ac8cae 50#define DRV_VERSION "0.3.3.3-k2"
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51char e1000e_driver_name[] = "e1000e";
52const char e1000e_driver_version[] = DRV_VERSION;
53
54static const struct e1000_info *e1000_info_tbl[] = {
55 [board_82571] = &e1000_82571_info,
56 [board_82572] = &e1000_82572_info,
57 [board_82573] = &e1000_82573_info,
58 [board_80003es2lan] = &e1000_es2_info,
59 [board_ich8lan] = &e1000_ich8_info,
60 [board_ich9lan] = &e1000_ich9_info,
61};
62
63#ifdef DEBUG
64/**
65 * e1000_get_hw_dev_name - return device name string
66 * used by hardware layer to print debugging information
67 **/
68char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
69{
589c085f 70 return hw->adapter->netdev->name;
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71}
72#endif
73
74/**
75 * e1000_desc_unused - calculate if we have unused descriptors
76 **/
77static int e1000_desc_unused(struct e1000_ring *ring)
78{
79 if (ring->next_to_clean > ring->next_to_use)
80 return ring->next_to_clean - ring->next_to_use - 1;
81
82 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
83}
84
85/**
ad68076e 86 * e1000_receive_skb - helper function to handle Rx indications
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87 * @adapter: board private structure
88 * @status: descriptor status field as written by hardware
89 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
90 * @skb: pointer to sk_buff to be indicated to stack
91 **/
92static void e1000_receive_skb(struct e1000_adapter *adapter,
93 struct net_device *netdev,
94 struct sk_buff *skb,
a39fe742 95 u8 status, __le16 vlan)
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96{
97 skb->protocol = eth_type_trans(skb, netdev);
98
99 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
100 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 101 le16_to_cpu(vlan));
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102 else
103 netif_receive_skb(skb);
104
105 netdev->last_rx = jiffies;
106}
107
108/**
109 * e1000_rx_checksum - Receive Checksum Offload for 82543
110 * @adapter: board private structure
111 * @status_err: receive descriptor status and error fields
112 * @csum: receive descriptor csum field
113 * @sk_buff: socket buffer with received data
114 **/
115static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
116 u32 csum, struct sk_buff *skb)
117{
118 u16 status = (u16)status_err;
119 u8 errors = (u8)(status_err >> 24);
120 skb->ip_summed = CHECKSUM_NONE;
121
122 /* Ignore Checksum bit is set */
123 if (status & E1000_RXD_STAT_IXSM)
124 return;
125 /* TCP/UDP checksum error bit is set */
126 if (errors & E1000_RXD_ERR_TCPE) {
127 /* let the stack verify checksum errors */
128 adapter->hw_csum_err++;
129 return;
130 }
131
132 /* TCP/UDP Checksum has not been calculated */
133 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
134 return;
135
136 /* It must be a TCP or UDP packet with a valid checksum */
137 if (status & E1000_RXD_STAT_TCPCS) {
138 /* TCP checksum is good */
139 skb->ip_summed = CHECKSUM_UNNECESSARY;
140 } else {
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141 /*
142 * IP fragment with UDP payload
143 * Hardware complements the payload checksum, so we undo it
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144 * and then put the value in host order for further stack use.
145 */
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146 __sum16 sum = (__force __sum16)htons(csum);
147 skb->csum = csum_unfold(~sum);
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148 skb->ip_summed = CHECKSUM_COMPLETE;
149 }
150 adapter->hw_csum_good++;
151}
152
153/**
154 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
155 * @adapter: address of board private structure
156 **/
157static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
158 int cleaned_count)
159{
160 struct net_device *netdev = adapter->netdev;
161 struct pci_dev *pdev = adapter->pdev;
162 struct e1000_ring *rx_ring = adapter->rx_ring;
163 struct e1000_rx_desc *rx_desc;
164 struct e1000_buffer *buffer_info;
165 struct sk_buff *skb;
166 unsigned int i;
167 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
168
169 i = rx_ring->next_to_use;
170 buffer_info = &rx_ring->buffer_info[i];
171
172 while (cleaned_count--) {
173 skb = buffer_info->skb;
174 if (skb) {
175 skb_trim(skb, 0);
176 goto map_skb;
177 }
178
179 skb = netdev_alloc_skb(netdev, bufsz);
180 if (!skb) {
181 /* Better luck next round */
182 adapter->alloc_rx_buff_failed++;
183 break;
184 }
185
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186 /*
187 * Make buffer alignment 2 beyond a 16 byte boundary
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188 * this will result in a 16 byte aligned IP header after
189 * the 14 byte MAC header is removed
190 */
191 skb_reserve(skb, NET_IP_ALIGN);
192
193 buffer_info->skb = skb;
194map_skb:
195 buffer_info->dma = pci_map_single(pdev, skb->data,
196 adapter->rx_buffer_len,
197 PCI_DMA_FROMDEVICE);
8d8bb39b 198 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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199 dev_err(&pdev->dev, "RX DMA map failed\n");
200 adapter->rx_dma_failed++;
201 break;
202 }
203
204 rx_desc = E1000_RX_DESC(*rx_ring, i);
205 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
206
207 i++;
208 if (i == rx_ring->count)
209 i = 0;
210 buffer_info = &rx_ring->buffer_info[i];
211 }
212
213 if (rx_ring->next_to_use != i) {
214 rx_ring->next_to_use = i;
215 if (i-- == 0)
216 i = (rx_ring->count - 1);
217
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218 /*
219 * Force memory writes to complete before letting h/w
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220 * know there are new descriptors to fetch. (Only
221 * applicable for weak-ordered memory model archs,
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222 * such as IA-64).
223 */
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224 wmb();
225 writel(i, adapter->hw.hw_addr + rx_ring->tail);
226 }
227}
228
229/**
230 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
231 * @adapter: address of board private structure
232 **/
233static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
234 int cleaned_count)
235{
236 struct net_device *netdev = adapter->netdev;
237 struct pci_dev *pdev = adapter->pdev;
238 union e1000_rx_desc_packet_split *rx_desc;
239 struct e1000_ring *rx_ring = adapter->rx_ring;
240 struct e1000_buffer *buffer_info;
241 struct e1000_ps_page *ps_page;
242 struct sk_buff *skb;
243 unsigned int i, j;
244
245 i = rx_ring->next_to_use;
246 buffer_info = &rx_ring->buffer_info[i];
247
248 while (cleaned_count--) {
249 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
250
251 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
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252 ps_page = &buffer_info->ps_pages[j];
253 if (j >= adapter->rx_ps_pages) {
254 /* all unused desc entries get hw null ptr */
a39fe742 255 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
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256 continue;
257 }
258 if (!ps_page->page) {
259 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 260 if (!ps_page->page) {
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261 adapter->alloc_rx_buff_failed++;
262 goto no_buffers;
263 }
264 ps_page->dma = pci_map_page(pdev,
265 ps_page->page,
266 0, PAGE_SIZE,
267 PCI_DMA_FROMDEVICE);
8d8bb39b 268 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
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269 dev_err(&adapter->pdev->dev,
270 "RX DMA page map failed\n");
271 adapter->rx_dma_failed++;
272 goto no_buffers;
bc7f75fa 273 }
bc7f75fa 274 }
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275 /*
276 * Refresh the desc even if buffer_addrs
277 * didn't change because each write-back
278 * erases this info.
279 */
280 rx_desc->read.buffer_addr[j+1] =
281 cpu_to_le64(ps_page->dma);
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282 }
283
284 skb = netdev_alloc_skb(netdev,
285 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
286
287 if (!skb) {
288 adapter->alloc_rx_buff_failed++;
289 break;
290 }
291
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292 /*
293 * Make buffer alignment 2 beyond a 16 byte boundary
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294 * this will result in a 16 byte aligned IP header after
295 * the 14 byte MAC header is removed
296 */
297 skb_reserve(skb, NET_IP_ALIGN);
298
299 buffer_info->skb = skb;
300 buffer_info->dma = pci_map_single(pdev, skb->data,
301 adapter->rx_ps_bsize0,
302 PCI_DMA_FROMDEVICE);
8d8bb39b 303 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
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304 dev_err(&pdev->dev, "RX DMA map failed\n");
305 adapter->rx_dma_failed++;
306 /* cleanup skb */
307 dev_kfree_skb_any(skb);
308 buffer_info->skb = NULL;
309 break;
310 }
311
312 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
313
314 i++;
315 if (i == rx_ring->count)
316 i = 0;
317 buffer_info = &rx_ring->buffer_info[i];
318 }
319
320no_buffers:
321 if (rx_ring->next_to_use != i) {
322 rx_ring->next_to_use = i;
323
324 if (!(i--))
325 i = (rx_ring->count - 1);
326
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327 /*
328 * Force memory writes to complete before letting h/w
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329 * know there are new descriptors to fetch. (Only
330 * applicable for weak-ordered memory model archs,
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331 * such as IA-64).
332 */
bc7f75fa 333 wmb();
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334 /*
335 * Hardware increments by 16 bytes, but packet split
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336 * descriptors are 32 bytes...so we increment tail
337 * twice as much.
338 */
339 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
340 }
341}
342
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343/**
344 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
345 * @adapter: address of board private structure
346 * @rx_ring: pointer to receive ring structure
347 * @cleaned_count: number of buffers to allocate this pass
348 **/
349
350static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
351 int cleaned_count)
352{
353 struct net_device *netdev = adapter->netdev;
354 struct pci_dev *pdev = adapter->pdev;
355 struct e1000_rx_desc *rx_desc;
356 struct e1000_ring *rx_ring = adapter->rx_ring;
357 struct e1000_buffer *buffer_info;
358 struct sk_buff *skb;
359 unsigned int i;
360 unsigned int bufsz = 256 -
361 16 /* for skb_reserve */ -
362 NET_IP_ALIGN;
363
364 i = rx_ring->next_to_use;
365 buffer_info = &rx_ring->buffer_info[i];
366
367 while (cleaned_count--) {
368 skb = buffer_info->skb;
369 if (skb) {
370 skb_trim(skb, 0);
371 goto check_page;
372 }
373
374 skb = netdev_alloc_skb(netdev, bufsz);
375 if (unlikely(!skb)) {
376 /* Better luck next round */
377 adapter->alloc_rx_buff_failed++;
378 break;
379 }
380
381 /* Make buffer alignment 2 beyond a 16 byte boundary
382 * this will result in a 16 byte aligned IP header after
383 * the 14 byte MAC header is removed
384 */
385 skb_reserve(skb, NET_IP_ALIGN);
386
387 buffer_info->skb = skb;
388check_page:
389 /* allocate a new page if necessary */
390 if (!buffer_info->page) {
391 buffer_info->page = alloc_page(GFP_ATOMIC);
392 if (unlikely(!buffer_info->page)) {
393 adapter->alloc_rx_buff_failed++;
394 break;
395 }
396 }
397
398 if (!buffer_info->dma)
399 buffer_info->dma = pci_map_page(pdev,
400 buffer_info->page, 0,
401 PAGE_SIZE,
402 PCI_DMA_FROMDEVICE);
403
404 rx_desc = E1000_RX_DESC(*rx_ring, i);
405 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
406
407 if (unlikely(++i == rx_ring->count))
408 i = 0;
409 buffer_info = &rx_ring->buffer_info[i];
410 }
411
412 if (likely(rx_ring->next_to_use != i)) {
413 rx_ring->next_to_use = i;
414 if (unlikely(i-- == 0))
415 i = (rx_ring->count - 1);
416
417 /* Force memory writes to complete before letting h/w
418 * know there are new descriptors to fetch. (Only
419 * applicable for weak-ordered memory model archs,
420 * such as IA-64). */
421 wmb();
422 writel(i, adapter->hw.hw_addr + rx_ring->tail);
423 }
424}
425
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426/**
427 * e1000_clean_rx_irq - Send received data up the network stack; legacy
428 * @adapter: board private structure
429 *
430 * the return value indicates whether actual cleaning was done, there
431 * is no guarantee that everything was cleaned
432 **/
433static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
434 int *work_done, int work_to_do)
435{
436 struct net_device *netdev = adapter->netdev;
437 struct pci_dev *pdev = adapter->pdev;
438 struct e1000_ring *rx_ring = adapter->rx_ring;
439 struct e1000_rx_desc *rx_desc, *next_rxd;
440 struct e1000_buffer *buffer_info, *next_buffer;
441 u32 length;
442 unsigned int i;
443 int cleaned_count = 0;
444 bool cleaned = 0;
445 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
446
447 i = rx_ring->next_to_clean;
448 rx_desc = E1000_RX_DESC(*rx_ring, i);
449 buffer_info = &rx_ring->buffer_info[i];
450
451 while (rx_desc->status & E1000_RXD_STAT_DD) {
452 struct sk_buff *skb;
453 u8 status;
454
455 if (*work_done >= work_to_do)
456 break;
457 (*work_done)++;
458
459 status = rx_desc->status;
460 skb = buffer_info->skb;
461 buffer_info->skb = NULL;
462
463 prefetch(skb->data - NET_IP_ALIGN);
464
465 i++;
466 if (i == rx_ring->count)
467 i = 0;
468 next_rxd = E1000_RX_DESC(*rx_ring, i);
469 prefetch(next_rxd);
470
471 next_buffer = &rx_ring->buffer_info[i];
472
473 cleaned = 1;
474 cleaned_count++;
475 pci_unmap_single(pdev,
476 buffer_info->dma,
477 adapter->rx_buffer_len,
478 PCI_DMA_FROMDEVICE);
479 buffer_info->dma = 0;
480
481 length = le16_to_cpu(rx_desc->length);
482
483 /* !EOP means multiple descriptors were used to store a single
484 * packet, also make sure the frame isn't just CRC only */
485 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
486 /* All receives must fit into a single buffer */
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487 e_dbg("%s: Receive packet consumed multiple buffers\n",
488 netdev->name);
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489 /* recycle */
490 buffer_info->skb = skb;
491 goto next_desc;
492 }
493
494 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
495 /* recycle */
496 buffer_info->skb = skb;
497 goto next_desc;
498 }
499
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500 total_rx_bytes += length;
501 total_rx_packets++;
502
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503 /*
504 * code added for copybreak, this should improve
bc7f75fa 505 * performance for small packets with large amounts
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506 * of reassembly being done in the stack
507 */
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508 if (length < copybreak) {
509 struct sk_buff *new_skb =
510 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
511 if (new_skb) {
512 skb_reserve(new_skb, NET_IP_ALIGN);
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513 skb_copy_to_linear_data_offset(new_skb,
514 -NET_IP_ALIGN,
515 (skb->data -
516 NET_IP_ALIGN),
517 (length +
518 NET_IP_ALIGN));
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519 /* save the skb in buffer_info as good */
520 buffer_info->skb = skb;
521 skb = new_skb;
522 }
523 /* else just continue with the old one */
524 }
525 /* end copybreak code */
526 skb_put(skb, length);
527
528 /* Receive Checksum Offload */
529 e1000_rx_checksum(adapter,
530 (u32)(status) |
531 ((u32)(rx_desc->errors) << 24),
532 le16_to_cpu(rx_desc->csum), skb);
533
534 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
535
536next_desc:
537 rx_desc->status = 0;
538
539 /* return some buffers to hardware, one at a time is too slow */
540 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
541 adapter->alloc_rx_buf(adapter, cleaned_count);
542 cleaned_count = 0;
543 }
544
545 /* use prefetched values */
546 rx_desc = next_rxd;
547 buffer_info = next_buffer;
548 }
549 rx_ring->next_to_clean = i;
550
551 cleaned_count = e1000_desc_unused(rx_ring);
552 if (cleaned_count)
553 adapter->alloc_rx_buf(adapter, cleaned_count);
554
bc7f75fa 555 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 556 adapter->total_rx_packets += total_rx_packets;
41988692 557 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 558 adapter->net_stats.rx_packets += total_rx_packets;
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559 return cleaned;
560}
561
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562static void e1000_put_txbuf(struct e1000_adapter *adapter,
563 struct e1000_buffer *buffer_info)
564{
565 if (buffer_info->dma) {
566 pci_unmap_page(adapter->pdev, buffer_info->dma,
567 buffer_info->length, PCI_DMA_TODEVICE);
568 buffer_info->dma = 0;
569 }
570 if (buffer_info->skb) {
571 dev_kfree_skb_any(buffer_info->skb);
572 buffer_info->skb = NULL;
573 }
574}
575
576static void e1000_print_tx_hang(struct e1000_adapter *adapter)
577{
578 struct e1000_ring *tx_ring = adapter->tx_ring;
579 unsigned int i = tx_ring->next_to_clean;
580 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
581 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
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582
583 /* detected Tx unit hang */
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584 e_err("Detected Tx Unit Hang:\n"
585 " TDH <%x>\n"
586 " TDT <%x>\n"
587 " next_to_use <%x>\n"
588 " next_to_clean <%x>\n"
589 "buffer_info[next_to_clean]:\n"
590 " time_stamp <%lx>\n"
591 " next_to_watch <%x>\n"
592 " jiffies <%lx>\n"
593 " next_to_watch.status <%x>\n",
594 readl(adapter->hw.hw_addr + tx_ring->head),
595 readl(adapter->hw.hw_addr + tx_ring->tail),
596 tx_ring->next_to_use,
597 tx_ring->next_to_clean,
598 tx_ring->buffer_info[eop].time_stamp,
599 eop,
600 jiffies,
601 eop_desc->upper.fields.status);
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602}
603
604/**
605 * e1000_clean_tx_irq - Reclaim resources after transmit completes
606 * @adapter: board private structure
607 *
608 * the return value indicates whether actual cleaning was done, there
609 * is no guarantee that everything was cleaned
610 **/
611static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
612{
613 struct net_device *netdev = adapter->netdev;
614 struct e1000_hw *hw = &adapter->hw;
615 struct e1000_ring *tx_ring = adapter->tx_ring;
616 struct e1000_tx_desc *tx_desc, *eop_desc;
617 struct e1000_buffer *buffer_info;
618 unsigned int i, eop;
619 unsigned int count = 0;
620 bool cleaned = 0;
621 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
622
623 i = tx_ring->next_to_clean;
624 eop = tx_ring->buffer_info[i].next_to_watch;
625 eop_desc = E1000_TX_DESC(*tx_ring, eop);
626
627 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
628 for (cleaned = 0; !cleaned; ) {
629 tx_desc = E1000_TX_DESC(*tx_ring, i);
630 buffer_info = &tx_ring->buffer_info[i];
631 cleaned = (i == eop);
632
633 if (cleaned) {
634 struct sk_buff *skb = buffer_info->skb;
635 unsigned int segs, bytecount;
636 segs = skb_shinfo(skb)->gso_segs ?: 1;
637 /* multiply data chunks by size of headers */
638 bytecount = ((segs - 1) * skb_headlen(skb)) +
639 skb->len;
640 total_tx_packets += segs;
641 total_tx_bytes += bytecount;
642 }
643
644 e1000_put_txbuf(adapter, buffer_info);
645 tx_desc->upper.data = 0;
646
647 i++;
648 if (i == tx_ring->count)
649 i = 0;
650 }
651
652 eop = tx_ring->buffer_info[i].next_to_watch;
653 eop_desc = E1000_TX_DESC(*tx_ring, eop);
654#define E1000_TX_WEIGHT 64
655 /* weight of a sort for tx, to avoid endless transmit cleanup */
656 if (count++ == E1000_TX_WEIGHT)
657 break;
658 }
659
660 tx_ring->next_to_clean = i;
661
662#define TX_WAKE_THRESHOLD 32
663 if (cleaned && netif_carrier_ok(netdev) &&
664 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
665 /* Make sure that anybody stopping the queue after this
666 * sees the new next_to_clean.
667 */
668 smp_mb();
669
670 if (netif_queue_stopped(netdev) &&
671 !(test_bit(__E1000_DOWN, &adapter->state))) {
672 netif_wake_queue(netdev);
673 ++adapter->restart_queue;
674 }
675 }
676
677 if (adapter->detect_tx_hung) {
ad68076e
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678 /*
679 * Detect a transmit hang in hardware, this serializes the
680 * check with the clearing of time_stamp and movement of i
681 */
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682 adapter->detect_tx_hung = 0;
683 if (tx_ring->buffer_info[eop].dma &&
684 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp
685 + (adapter->tx_timeout_factor * HZ))
ad68076e 686 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
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687 e1000_print_tx_hang(adapter);
688 netif_stop_queue(netdev);
689 }
690 }
691 adapter->total_tx_bytes += total_tx_bytes;
692 adapter->total_tx_packets += total_tx_packets;
41988692 693 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 694 adapter->net_stats.tx_packets += total_tx_packets;
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695 return cleaned;
696}
697
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698/**
699 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
700 * @adapter: board private structure
701 *
702 * the return value indicates whether actual cleaning was done, there
703 * is no guarantee that everything was cleaned
704 **/
705static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
706 int *work_done, int work_to_do)
707{
708 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
709 struct net_device *netdev = adapter->netdev;
710 struct pci_dev *pdev = adapter->pdev;
711 struct e1000_ring *rx_ring = adapter->rx_ring;
712 struct e1000_buffer *buffer_info, *next_buffer;
713 struct e1000_ps_page *ps_page;
714 struct sk_buff *skb;
715 unsigned int i, j;
716 u32 length, staterr;
717 int cleaned_count = 0;
718 bool cleaned = 0;
719 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
720
721 i = rx_ring->next_to_clean;
722 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
723 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
724 buffer_info = &rx_ring->buffer_info[i];
725
726 while (staterr & E1000_RXD_STAT_DD) {
727 if (*work_done >= work_to_do)
728 break;
729 (*work_done)++;
730 skb = buffer_info->skb;
731
732 /* in the packet split case this is header only */
733 prefetch(skb->data - NET_IP_ALIGN);
734
735 i++;
736 if (i == rx_ring->count)
737 i = 0;
738 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
739 prefetch(next_rxd);
740
741 next_buffer = &rx_ring->buffer_info[i];
742
743 cleaned = 1;
744 cleaned_count++;
745 pci_unmap_single(pdev, buffer_info->dma,
746 adapter->rx_ps_bsize0,
747 PCI_DMA_FROMDEVICE);
748 buffer_info->dma = 0;
749
750 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
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751 e_dbg("%s: Packet Split buffers didn't pick up the "
752 "full packet\n", netdev->name);
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753 dev_kfree_skb_irq(skb);
754 goto next_desc;
755 }
756
757 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
758 dev_kfree_skb_irq(skb);
759 goto next_desc;
760 }
761
762 length = le16_to_cpu(rx_desc->wb.middle.length0);
763
764 if (!length) {
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765 e_dbg("%s: Last part of the packet spanning multiple "
766 "descriptors\n", netdev->name);
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767 dev_kfree_skb_irq(skb);
768 goto next_desc;
769 }
770
771 /* Good Receive */
772 skb_put(skb, length);
773
774 {
ad68076e
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775 /*
776 * this looks ugly, but it seems compiler issues make it
777 * more efficient than reusing j
778 */
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779 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
780
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781 /*
782 * page alloc/put takes too long and effects small packet
783 * throughput, so unsplit small packets and save the alloc/put
784 * only valid in softirq (napi) context to call kmap_*
785 */
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786 if (l1 && (l1 <= copybreak) &&
787 ((length + l1) <= adapter->rx_ps_bsize0)) {
788 u8 *vaddr;
789
47f44e40 790 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 791
ad68076e
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792 /*
793 * there is no documentation about how to call
bc7f75fa 794 * kmap_atomic, so we can't hold the mapping
ad68076e
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795 * very long
796 */
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797 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
798 PAGE_SIZE, PCI_DMA_FROMDEVICE);
799 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
800 memcpy(skb_tail_pointer(skb), vaddr, l1);
801 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
802 pci_dma_sync_single_for_device(pdev, ps_page->dma,
803 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 804
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805 skb_put(skb, l1);
806 goto copydone;
807 } /* if */
808 }
809
810 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
811 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
812 if (!length)
813 break;
814
47f44e40 815 ps_page = &buffer_info->ps_pages[j];
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816 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
817 PCI_DMA_FROMDEVICE);
818 ps_page->dma = 0;
819 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
820 ps_page->page = NULL;
821 skb->len += length;
822 skb->data_len += length;
823 skb->truesize += length;
824 }
825
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826copydone:
827 total_rx_bytes += skb->len;
828 total_rx_packets++;
829
830 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
831 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
832
833 if (rx_desc->wb.upper.header_status &
834 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
835 adapter->rx_hdr_split++;
836
837 e1000_receive_skb(adapter, netdev, skb,
838 staterr, rx_desc->wb.middle.vlan);
839
840next_desc:
841 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
842 buffer_info->skb = NULL;
843
844 /* return some buffers to hardware, one at a time is too slow */
845 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
846 adapter->alloc_rx_buf(adapter, cleaned_count);
847 cleaned_count = 0;
848 }
849
850 /* use prefetched values */
851 rx_desc = next_rxd;
852 buffer_info = next_buffer;
853
854 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
855 }
856 rx_ring->next_to_clean = i;
857
858 cleaned_count = e1000_desc_unused(rx_ring);
859 if (cleaned_count)
860 adapter->alloc_rx_buf(adapter, cleaned_count);
861
bc7f75fa 862 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 863 adapter->total_rx_packets += total_rx_packets;
41988692 864 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 865 adapter->net_stats.rx_packets += total_rx_packets;
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866 return cleaned;
867}
868
97ac8cae
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869/**
870 * e1000_consume_page - helper function
871 **/
872static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
873 u16 length)
874{
875 bi->page = NULL;
876 skb->len += length;
877 skb->data_len += length;
878 skb->truesize += length;
879}
880
881/**
882 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
883 * @adapter: board private structure
884 *
885 * the return value indicates whether actual cleaning was done, there
886 * is no guarantee that everything was cleaned
887 **/
888
889static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
890 int *work_done, int work_to_do)
891{
892 struct net_device *netdev = adapter->netdev;
893 struct pci_dev *pdev = adapter->pdev;
894 struct e1000_ring *rx_ring = adapter->rx_ring;
895 struct e1000_rx_desc *rx_desc, *next_rxd;
896 struct e1000_buffer *buffer_info, *next_buffer;
897 u32 length;
898 unsigned int i;
899 int cleaned_count = 0;
900 bool cleaned = false;
901 unsigned int total_rx_bytes=0, total_rx_packets=0;
902
903 i = rx_ring->next_to_clean;
904 rx_desc = E1000_RX_DESC(*rx_ring, i);
905 buffer_info = &rx_ring->buffer_info[i];
906
907 while (rx_desc->status & E1000_RXD_STAT_DD) {
908 struct sk_buff *skb;
909 u8 status;
910
911 if (*work_done >= work_to_do)
912 break;
913 (*work_done)++;
914
915 status = rx_desc->status;
916 skb = buffer_info->skb;
917 buffer_info->skb = NULL;
918
919 ++i;
920 if (i == rx_ring->count)
921 i = 0;
922 next_rxd = E1000_RX_DESC(*rx_ring, i);
923 prefetch(next_rxd);
924
925 next_buffer = &rx_ring->buffer_info[i];
926
927 cleaned = true;
928 cleaned_count++;
929 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
930 PCI_DMA_FROMDEVICE);
931 buffer_info->dma = 0;
932
933 length = le16_to_cpu(rx_desc->length);
934
935 /* errors is only valid for DD + EOP descriptors */
936 if (unlikely((status & E1000_RXD_STAT_EOP) &&
937 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
938 /* recycle both page and skb */
939 buffer_info->skb = skb;
940 /* an error means any chain goes out the window
941 * too */
942 if (rx_ring->rx_skb_top)
943 dev_kfree_skb(rx_ring->rx_skb_top);
944 rx_ring->rx_skb_top = NULL;
945 goto next_desc;
946 }
947
948#define rxtop rx_ring->rx_skb_top
949 if (!(status & E1000_RXD_STAT_EOP)) {
950 /* this descriptor is only the beginning (or middle) */
951 if (!rxtop) {
952 /* this is the beginning of a chain */
953 rxtop = skb;
954 skb_fill_page_desc(rxtop, 0, buffer_info->page,
955 0, length);
956 } else {
957 /* this is the middle of a chain */
958 skb_fill_page_desc(rxtop,
959 skb_shinfo(rxtop)->nr_frags,
960 buffer_info->page, 0, length);
961 /* re-use the skb, only consumed the page */
962 buffer_info->skb = skb;
963 }
964 e1000_consume_page(buffer_info, rxtop, length);
965 goto next_desc;
966 } else {
967 if (rxtop) {
968 /* end of the chain */
969 skb_fill_page_desc(rxtop,
970 skb_shinfo(rxtop)->nr_frags,
971 buffer_info->page, 0, length);
972 /* re-use the current skb, we only consumed the
973 * page */
974 buffer_info->skb = skb;
975 skb = rxtop;
976 rxtop = NULL;
977 e1000_consume_page(buffer_info, skb, length);
978 } else {
979 /* no chain, got EOP, this buf is the packet
980 * copybreak to save the put_page/alloc_page */
981 if (length <= copybreak &&
982 skb_tailroom(skb) >= length) {
983 u8 *vaddr;
984 vaddr = kmap_atomic(buffer_info->page,
985 KM_SKB_DATA_SOFTIRQ);
986 memcpy(skb_tail_pointer(skb), vaddr,
987 length);
988 kunmap_atomic(vaddr,
989 KM_SKB_DATA_SOFTIRQ);
990 /* re-use the page, so don't erase
991 * buffer_info->page */
992 skb_put(skb, length);
993 } else {
994 skb_fill_page_desc(skb, 0,
995 buffer_info->page, 0,
996 length);
997 e1000_consume_page(buffer_info, skb,
998 length);
999 }
1000 }
1001 }
1002
1003 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1004 e1000_rx_checksum(adapter,
1005 (u32)(status) |
1006 ((u32)(rx_desc->errors) << 24),
1007 le16_to_cpu(rx_desc->csum), skb);
1008
1009 /* probably a little skewed due to removing CRC */
1010 total_rx_bytes += skb->len;
1011 total_rx_packets++;
1012
1013 /* eth type trans needs skb->data to point to something */
1014 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1015 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1016 dev_kfree_skb(skb);
1017 goto next_desc;
1018 }
1019
1020 e1000_receive_skb(adapter, netdev, skb, status,
1021 rx_desc->special);
1022
1023next_desc:
1024 rx_desc->status = 0;
1025
1026 /* return some buffers to hardware, one at a time is too slow */
1027 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1028 adapter->alloc_rx_buf(adapter, cleaned_count);
1029 cleaned_count = 0;
1030 }
1031
1032 /* use prefetched values */
1033 rx_desc = next_rxd;
1034 buffer_info = next_buffer;
1035 }
1036 rx_ring->next_to_clean = i;
1037
1038 cleaned_count = e1000_desc_unused(rx_ring);
1039 if (cleaned_count)
1040 adapter->alloc_rx_buf(adapter, cleaned_count);
1041
1042 adapter->total_rx_bytes += total_rx_bytes;
1043 adapter->total_rx_packets += total_rx_packets;
1044 adapter->net_stats.rx_bytes += total_rx_bytes;
1045 adapter->net_stats.rx_packets += total_rx_packets;
1046 return cleaned;
1047}
1048
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1049/**
1050 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1051 * @adapter: board private structure
1052 **/
1053static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1054{
1055 struct e1000_ring *rx_ring = adapter->rx_ring;
1056 struct e1000_buffer *buffer_info;
1057 struct e1000_ps_page *ps_page;
1058 struct pci_dev *pdev = adapter->pdev;
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1059 unsigned int i, j;
1060
1061 /* Free all the Rx ring sk_buffs */
1062 for (i = 0; i < rx_ring->count; i++) {
1063 buffer_info = &rx_ring->buffer_info[i];
1064 if (buffer_info->dma) {
1065 if (adapter->clean_rx == e1000_clean_rx_irq)
1066 pci_unmap_single(pdev, buffer_info->dma,
1067 adapter->rx_buffer_len,
1068 PCI_DMA_FROMDEVICE);
97ac8cae
BA
1069 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1070 pci_unmap_page(pdev, buffer_info->dma,
1071 PAGE_SIZE,
1072 PCI_DMA_FROMDEVICE);
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1073 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1074 pci_unmap_single(pdev, buffer_info->dma,
1075 adapter->rx_ps_bsize0,
1076 PCI_DMA_FROMDEVICE);
1077 buffer_info->dma = 0;
1078 }
1079
97ac8cae
BA
1080 if (buffer_info->page) {
1081 put_page(buffer_info->page);
1082 buffer_info->page = NULL;
1083 }
1084
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1085 if (buffer_info->skb) {
1086 dev_kfree_skb(buffer_info->skb);
1087 buffer_info->skb = NULL;
1088 }
1089
1090 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1091 ps_page = &buffer_info->ps_pages[j];
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1092 if (!ps_page->page)
1093 break;
1094 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1095 PCI_DMA_FROMDEVICE);
1096 ps_page->dma = 0;
1097 put_page(ps_page->page);
1098 ps_page->page = NULL;
1099 }
1100 }
1101
1102 /* there also may be some cached data from a chained receive */
1103 if (rx_ring->rx_skb_top) {
1104 dev_kfree_skb(rx_ring->rx_skb_top);
1105 rx_ring->rx_skb_top = NULL;
1106 }
1107
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1108 /* Zero out the descriptor ring */
1109 memset(rx_ring->desc, 0, rx_ring->size);
1110
1111 rx_ring->next_to_clean = 0;
1112 rx_ring->next_to_use = 0;
1113
1114 writel(0, adapter->hw.hw_addr + rx_ring->head);
1115 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1116}
1117
1118/**
1119 * e1000_intr_msi - Interrupt Handler
1120 * @irq: interrupt number
1121 * @data: pointer to a network interface device structure
1122 **/
1123static irqreturn_t e1000_intr_msi(int irq, void *data)
1124{
1125 struct net_device *netdev = data;
1126 struct e1000_adapter *adapter = netdev_priv(netdev);
1127 struct e1000_hw *hw = &adapter->hw;
1128 u32 icr = er32(ICR);
1129
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1130 /*
1131 * read ICR disables interrupts using IAM
1132 */
bc7f75fa
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1133
1134 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1135 hw->mac.get_link_status = 1;
ad68076e
BA
1136 /*
1137 * ICH8 workaround-- Call gig speed drop workaround on cable
1138 * disconnect (LSC) before accessing any PHY registers
1139 */
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1140 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1141 (!(er32(STATUS) & E1000_STATUS_LU)))
1142 e1000e_gig_downshift_workaround_ich8lan(hw);
1143
ad68076e
BA
1144 /*
1145 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1146 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1147 * adapter in watchdog
1148 */
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1149 if (netif_carrier_ok(netdev) &&
1150 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1151 /* disable receives */
1152 u32 rctl = er32(RCTL);
1153 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1154 adapter->flags |= FLAG_RX_RESTART_NOW;
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1155 }
1156 /* guard against interrupt when we're going down */
1157 if (!test_bit(__E1000_DOWN, &adapter->state))
1158 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1159 }
1160
1161 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1162 adapter->total_tx_bytes = 0;
1163 adapter->total_tx_packets = 0;
1164 adapter->total_rx_bytes = 0;
1165 adapter->total_rx_packets = 0;
1166 __netif_rx_schedule(netdev, &adapter->napi);
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1167 }
1168
1169 return IRQ_HANDLED;
1170}
1171
1172/**
1173 * e1000_intr - Interrupt Handler
1174 * @irq: interrupt number
1175 * @data: pointer to a network interface device structure
1176 **/
1177static irqreturn_t e1000_intr(int irq, void *data)
1178{
1179 struct net_device *netdev = data;
1180 struct e1000_adapter *adapter = netdev_priv(netdev);
1181 struct e1000_hw *hw = &adapter->hw;
1182
1183 u32 rctl, icr = er32(ICR);
1184 if (!icr)
1185 return IRQ_NONE; /* Not our interrupt */
1186
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1187 /*
1188 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1189 * not set, then the adapter didn't send an interrupt
1190 */
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1191 if (!(icr & E1000_ICR_INT_ASSERTED))
1192 return IRQ_NONE;
1193
ad68076e
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1194 /*
1195 * Interrupt Auto-Mask...upon reading ICR,
1196 * interrupts are masked. No need for the
1197 * IMC write
1198 */
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1199
1200 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1201 hw->mac.get_link_status = 1;
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1202 /*
1203 * ICH8 workaround-- Call gig speed drop workaround on cable
1204 * disconnect (LSC) before accessing any PHY registers
1205 */
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1206 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1207 (!(er32(STATUS) & E1000_STATUS_LU)))
1208 e1000e_gig_downshift_workaround_ich8lan(hw);
1209
ad68076e
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1210 /*
1211 * 80003ES2LAN workaround--
bc7f75fa
AK
1212 * For packet buffer work-around on link down event;
1213 * disable receives here in the ISR and
1214 * reset adapter in watchdog
1215 */
1216 if (netif_carrier_ok(netdev) &&
1217 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1218 /* disable receives */
1219 rctl = er32(RCTL);
1220 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1221 adapter->flags |= FLAG_RX_RESTART_NOW;
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1222 }
1223 /* guard against interrupt when we're going down */
1224 if (!test_bit(__E1000_DOWN, &adapter->state))
1225 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1226 }
1227
1228 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1229 adapter->total_tx_bytes = 0;
1230 adapter->total_tx_packets = 0;
1231 adapter->total_rx_bytes = 0;
1232 adapter->total_rx_packets = 0;
1233 __netif_rx_schedule(netdev, &adapter->napi);
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1234 }
1235
1236 return IRQ_HANDLED;
1237}
1238
1239static int e1000_request_irq(struct e1000_adapter *adapter)
1240{
1241 struct net_device *netdev = adapter->netdev;
a39fe742 1242 irq_handler_t handler = e1000_intr;
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1243 int irq_flags = IRQF_SHARED;
1244 int err;
1245
9b71c5e0 1246 if (!pci_enable_msi(adapter->pdev)) {
bc7f75fa 1247 adapter->flags |= FLAG_MSI_ENABLED;
a39fe742 1248 handler = e1000_intr_msi;
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1249 irq_flags = 0;
1250 }
1251
1252 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
1253 netdev);
1254 if (err) {
44defeb3
JK
1255 e_err("Unable to allocate %s interrupt (return: %d)\n",
1256 adapter->flags & FLAG_MSI_ENABLED ? "MSI":"INTx", err);
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1257 if (adapter->flags & FLAG_MSI_ENABLED)
1258 pci_disable_msi(adapter->pdev);
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1259 }
1260
1261 return err;
1262}
1263
1264static void e1000_free_irq(struct e1000_adapter *adapter)
1265{
1266 struct net_device *netdev = adapter->netdev;
1267
1268 free_irq(adapter->pdev->irq, netdev);
1269 if (adapter->flags & FLAG_MSI_ENABLED) {
1270 pci_disable_msi(adapter->pdev);
1271 adapter->flags &= ~FLAG_MSI_ENABLED;
1272 }
1273}
1274
1275/**
1276 * e1000_irq_disable - Mask off interrupt generation on the NIC
1277 **/
1278static void e1000_irq_disable(struct e1000_adapter *adapter)
1279{
1280 struct e1000_hw *hw = &adapter->hw;
1281
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1282 ew32(IMC, ~0);
1283 e1e_flush();
1284 synchronize_irq(adapter->pdev->irq);
1285}
1286
1287/**
1288 * e1000_irq_enable - Enable default interrupt generation settings
1289 **/
1290static void e1000_irq_enable(struct e1000_adapter *adapter)
1291{
1292 struct e1000_hw *hw = &adapter->hw;
1293
74ef9c39
JB
1294 ew32(IMS, IMS_ENABLE_MASK);
1295 e1e_flush();
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1296}
1297
1298/**
1299 * e1000_get_hw_control - get control of the h/w from f/w
1300 * @adapter: address of board private structure
1301 *
489815ce 1302 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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1303 * For ASF and Pass Through versions of f/w this means that
1304 * the driver is loaded. For AMT version (only with 82573)
1305 * of the f/w this means that the network i/f is open.
1306 **/
1307static void e1000_get_hw_control(struct e1000_adapter *adapter)
1308{
1309 struct e1000_hw *hw = &adapter->hw;
1310 u32 ctrl_ext;
1311 u32 swsm;
1312
1313 /* Let firmware know the driver has taken over */
1314 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1315 swsm = er32(SWSM);
1316 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1317 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1318 ctrl_ext = er32(CTRL_EXT);
ad68076e 1319 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
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1320 }
1321}
1322
1323/**
1324 * e1000_release_hw_control - release control of the h/w to f/w
1325 * @adapter: address of board private structure
1326 *
489815ce 1327 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
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1328 * For ASF and Pass Through versions of f/w this means that the
1329 * driver is no longer loaded. For AMT version (only with 82573) i
1330 * of the f/w this means that the network i/f is closed.
1331 *
1332 **/
1333static void e1000_release_hw_control(struct e1000_adapter *adapter)
1334{
1335 struct e1000_hw *hw = &adapter->hw;
1336 u32 ctrl_ext;
1337 u32 swsm;
1338
1339 /* Let firmware taken over control of h/w */
1340 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1341 swsm = er32(SWSM);
1342 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1343 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1344 ctrl_ext = er32(CTRL_EXT);
ad68076e 1345 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
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1346 }
1347}
1348
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1349/**
1350 * @e1000_alloc_ring - allocate memory for a ring structure
1351 **/
1352static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1353 struct e1000_ring *ring)
1354{
1355 struct pci_dev *pdev = adapter->pdev;
1356
1357 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1358 GFP_KERNEL);
1359 if (!ring->desc)
1360 return -ENOMEM;
1361
1362 return 0;
1363}
1364
1365/**
1366 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1367 * @adapter: board private structure
1368 *
1369 * Return 0 on success, negative on failure
1370 **/
1371int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1372{
1373 struct e1000_ring *tx_ring = adapter->tx_ring;
1374 int err = -ENOMEM, size;
1375
1376 size = sizeof(struct e1000_buffer) * tx_ring->count;
1377 tx_ring->buffer_info = vmalloc(size);
1378 if (!tx_ring->buffer_info)
1379 goto err;
1380 memset(tx_ring->buffer_info, 0, size);
1381
1382 /* round up to nearest 4K */
1383 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1384 tx_ring->size = ALIGN(tx_ring->size, 4096);
1385
1386 err = e1000_alloc_ring_dma(adapter, tx_ring);
1387 if (err)
1388 goto err;
1389
1390 tx_ring->next_to_use = 0;
1391 tx_ring->next_to_clean = 0;
1392 spin_lock_init(&adapter->tx_queue_lock);
1393
1394 return 0;
1395err:
1396 vfree(tx_ring->buffer_info);
44defeb3 1397 e_err("Unable to allocate memory for the transmit descriptor ring\n");
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1398 return err;
1399}
1400
1401/**
1402 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1403 * @adapter: board private structure
1404 *
1405 * Returns 0 on success, negative on failure
1406 **/
1407int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1408{
1409 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
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1410 struct e1000_buffer *buffer_info;
1411 int i, size, desc_len, err = -ENOMEM;
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1412
1413 size = sizeof(struct e1000_buffer) * rx_ring->count;
1414 rx_ring->buffer_info = vmalloc(size);
1415 if (!rx_ring->buffer_info)
1416 goto err;
1417 memset(rx_ring->buffer_info, 0, size);
1418
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AK
1419 for (i = 0; i < rx_ring->count; i++) {
1420 buffer_info = &rx_ring->buffer_info[i];
1421 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1422 sizeof(struct e1000_ps_page),
1423 GFP_KERNEL);
1424 if (!buffer_info->ps_pages)
1425 goto err_pages;
1426 }
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1427
1428 desc_len = sizeof(union e1000_rx_desc_packet_split);
1429
1430 /* Round up to nearest 4K */
1431 rx_ring->size = rx_ring->count * desc_len;
1432 rx_ring->size = ALIGN(rx_ring->size, 4096);
1433
1434 err = e1000_alloc_ring_dma(adapter, rx_ring);
1435 if (err)
47f44e40 1436 goto err_pages;
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1437
1438 rx_ring->next_to_clean = 0;
1439 rx_ring->next_to_use = 0;
1440 rx_ring->rx_skb_top = NULL;
1441
1442 return 0;
47f44e40
AK
1443
1444err_pages:
1445 for (i = 0; i < rx_ring->count; i++) {
1446 buffer_info = &rx_ring->buffer_info[i];
1447 kfree(buffer_info->ps_pages);
1448 }
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AK
1449err:
1450 vfree(rx_ring->buffer_info);
44defeb3 1451 e_err("Unable to allocate memory for the transmit descriptor ring\n");
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1452 return err;
1453}
1454
1455/**
1456 * e1000_clean_tx_ring - Free Tx Buffers
1457 * @adapter: board private structure
1458 **/
1459static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1460{
1461 struct e1000_ring *tx_ring = adapter->tx_ring;
1462 struct e1000_buffer *buffer_info;
1463 unsigned long size;
1464 unsigned int i;
1465
1466 for (i = 0; i < tx_ring->count; i++) {
1467 buffer_info = &tx_ring->buffer_info[i];
1468 e1000_put_txbuf(adapter, buffer_info);
1469 }
1470
1471 size = sizeof(struct e1000_buffer) * tx_ring->count;
1472 memset(tx_ring->buffer_info, 0, size);
1473
1474 memset(tx_ring->desc, 0, tx_ring->size);
1475
1476 tx_ring->next_to_use = 0;
1477 tx_ring->next_to_clean = 0;
1478
1479 writel(0, adapter->hw.hw_addr + tx_ring->head);
1480 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1481}
1482
1483/**
1484 * e1000e_free_tx_resources - Free Tx Resources per Queue
1485 * @adapter: board private structure
1486 *
1487 * Free all transmit software resources
1488 **/
1489void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1490{
1491 struct pci_dev *pdev = adapter->pdev;
1492 struct e1000_ring *tx_ring = adapter->tx_ring;
1493
1494 e1000_clean_tx_ring(adapter);
1495
1496 vfree(tx_ring->buffer_info);
1497 tx_ring->buffer_info = NULL;
1498
1499 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1500 tx_ring->dma);
1501 tx_ring->desc = NULL;
1502}
1503
1504/**
1505 * e1000e_free_rx_resources - Free Rx Resources
1506 * @adapter: board private structure
1507 *
1508 * Free all receive software resources
1509 **/
1510
1511void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1512{
1513 struct pci_dev *pdev = adapter->pdev;
1514 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1515 int i;
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1516
1517 e1000_clean_rx_ring(adapter);
1518
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AK
1519 for (i = 0; i < rx_ring->count; i++) {
1520 kfree(rx_ring->buffer_info[i].ps_pages);
1521 }
1522
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1523 vfree(rx_ring->buffer_info);
1524 rx_ring->buffer_info = NULL;
1525
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1526 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1527 rx_ring->dma);
1528 rx_ring->desc = NULL;
1529}
1530
1531/**
1532 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK
1533 * @adapter: pointer to adapter
1534 * @itr_setting: current adapter->itr
1535 * @packets: the number of packets during this measurement interval
1536 * @bytes: the number of bytes during this measurement interval
1537 *
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1538 * Stores a new ITR value based on packets and byte
1539 * counts during the last interrupt. The advantage of per interrupt
1540 * computation is faster updates and more accurate ITR for the current
1541 * traffic pattern. Constants in this function were computed
1542 * based on theoretical maximum wire speed and thresholds were set based
1543 * on testing data as well as attempting to minimize response time
1544 * while increasing bulk throughput.
1545 * this functionality is controlled by the InterruptThrottleRate module
1546 * parameter (see e1000_param.c)
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AK
1547 **/
1548static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1549 u16 itr_setting, int packets,
1550 int bytes)
1551{
1552 unsigned int retval = itr_setting;
1553
1554 if (packets == 0)
1555 goto update_itr_done;
1556
1557 switch (itr_setting) {
1558 case lowest_latency:
1559 /* handle TSO and jumbo frames */
1560 if (bytes/packets > 8000)
1561 retval = bulk_latency;
1562 else if ((packets < 5) && (bytes > 512)) {
1563 retval = low_latency;
1564 }
1565 break;
1566 case low_latency: /* 50 usec aka 20000 ints/s */
1567 if (bytes > 10000) {
1568 /* this if handles the TSO accounting */
1569 if (bytes/packets > 8000) {
1570 retval = bulk_latency;
1571 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1572 retval = bulk_latency;
1573 } else if ((packets > 35)) {
1574 retval = lowest_latency;
1575 }
1576 } else if (bytes/packets > 2000) {
1577 retval = bulk_latency;
1578 } else if (packets <= 2 && bytes < 512) {
1579 retval = lowest_latency;
1580 }
1581 break;
1582 case bulk_latency: /* 250 usec aka 4000 ints/s */
1583 if (bytes > 25000) {
1584 if (packets > 35) {
1585 retval = low_latency;
1586 }
1587 } else if (bytes < 6000) {
1588 retval = low_latency;
1589 }
1590 break;
1591 }
1592
1593update_itr_done:
1594 return retval;
1595}
1596
1597static void e1000_set_itr(struct e1000_adapter *adapter)
1598{
1599 struct e1000_hw *hw = &adapter->hw;
1600 u16 current_itr;
1601 u32 new_itr = adapter->itr;
1602
1603 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1604 if (adapter->link_speed != SPEED_1000) {
1605 current_itr = 0;
1606 new_itr = 4000;
1607 goto set_itr_now;
1608 }
1609
1610 adapter->tx_itr = e1000_update_itr(adapter,
1611 adapter->tx_itr,
1612 adapter->total_tx_packets,
1613 adapter->total_tx_bytes);
1614 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1615 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1616 adapter->tx_itr = low_latency;
1617
1618 adapter->rx_itr = e1000_update_itr(adapter,
1619 adapter->rx_itr,
1620 adapter->total_rx_packets,
1621 adapter->total_rx_bytes);
1622 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1623 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1624 adapter->rx_itr = low_latency;
1625
1626 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1627
1628 switch (current_itr) {
1629 /* counts and packets in update_itr are dependent on these numbers */
1630 case lowest_latency:
1631 new_itr = 70000;
1632 break;
1633 case low_latency:
1634 new_itr = 20000; /* aka hwitr = ~200 */
1635 break;
1636 case bulk_latency:
1637 new_itr = 4000;
1638 break;
1639 default:
1640 break;
1641 }
1642
1643set_itr_now:
1644 if (new_itr != adapter->itr) {
ad68076e
BA
1645 /*
1646 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1647 * by adding intermediate steps when interrupt rate is
ad68076e
BA
1648 * increasing
1649 */
bc7f75fa
AK
1650 new_itr = new_itr > adapter->itr ?
1651 min(adapter->itr + (new_itr >> 2), new_itr) :
1652 new_itr;
1653 adapter->itr = new_itr;
1654 ew32(ITR, 1000000000 / (new_itr * 256));
1655 }
1656}
1657
1658/**
1659 * e1000_clean - NAPI Rx polling callback
ad68076e 1660 * @napi: struct associated with this polling callback
489815ce 1661 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK
1662 **/
1663static int e1000_clean(struct napi_struct *napi, int budget)
1664{
1665 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
1666 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 1667 int tx_cleaned = 0, work_done = 0;
bc7f75fa
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1668
1669 /* Must NOT use netdev_priv macro here. */
1670 adapter = poll_dev->priv;
1671
ad68076e
BA
1672 /*
1673 * e1000_clean is called per-cpu. This lock protects
bc7f75fa
AK
1674 * tx_ring from being cleaned by multiple cpus
1675 * simultaneously. A failure obtaining the lock means
ad68076e
BA
1676 * tx_ring is currently being cleaned anyway.
1677 */
bc7f75fa 1678 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6 1679 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa
AK
1680 spin_unlock(&adapter->tx_queue_lock);
1681 }
1682
1683 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6
DM
1684
1685 if (tx_cleaned)
1686 work_done = budget;
bc7f75fa 1687
53e52c72
DM
1688 /* If budget not fully consumed, exit the polling mode */
1689 if (work_done < budget) {
bc7f75fa
AK
1690 if (adapter->itr_setting & 3)
1691 e1000_set_itr(adapter);
1692 netif_rx_complete(poll_dev, napi);
1693 e1000_irq_enable(adapter);
1694 }
1695
1696 return work_done;
1697}
1698
1699static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1700{
1701 struct e1000_adapter *adapter = netdev_priv(netdev);
1702 struct e1000_hw *hw = &adapter->hw;
1703 u32 vfta, index;
1704
1705 /* don't update vlan cookie if already programmed */
1706 if ((adapter->hw.mng_cookie.status &
1707 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1708 (vid == adapter->mng_vlan_id))
1709 return;
1710 /* add VID to filter table */
1711 index = (vid >> 5) & 0x7F;
1712 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1713 vfta |= (1 << (vid & 0x1F));
1714 e1000e_write_vfta(hw, index, vfta);
1715}
1716
1717static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1718{
1719 struct e1000_adapter *adapter = netdev_priv(netdev);
1720 struct e1000_hw *hw = &adapter->hw;
1721 u32 vfta, index;
1722
74ef9c39
JB
1723 if (!test_bit(__E1000_DOWN, &adapter->state))
1724 e1000_irq_disable(adapter);
bc7f75fa 1725 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
1726
1727 if (!test_bit(__E1000_DOWN, &adapter->state))
1728 e1000_irq_enable(adapter);
bc7f75fa
AK
1729
1730 if ((adapter->hw.mng_cookie.status &
1731 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1732 (vid == adapter->mng_vlan_id)) {
1733 /* release control to f/w */
1734 e1000_release_hw_control(adapter);
1735 return;
1736 }
1737
1738 /* remove VID from filter table */
1739 index = (vid >> 5) & 0x7F;
1740 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1741 vfta &= ~(1 << (vid & 0x1F));
1742 e1000e_write_vfta(hw, index, vfta);
1743}
1744
1745static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
1746{
1747 struct net_device *netdev = adapter->netdev;
1748 u16 vid = adapter->hw.mng_cookie.vlan_id;
1749 u16 old_vid = adapter->mng_vlan_id;
1750
1751 if (!adapter->vlgrp)
1752 return;
1753
1754 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1755 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1756 if (adapter->hw.mng_cookie.status &
1757 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1758 e1000_vlan_rx_add_vid(netdev, vid);
1759 adapter->mng_vlan_id = vid;
1760 }
1761
1762 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
1763 (vid != old_vid) &&
1764 !vlan_group_get_device(adapter->vlgrp, old_vid))
1765 e1000_vlan_rx_kill_vid(netdev, old_vid);
1766 } else {
1767 adapter->mng_vlan_id = vid;
1768 }
1769}
1770
1771
1772static void e1000_vlan_rx_register(struct net_device *netdev,
1773 struct vlan_group *grp)
1774{
1775 struct e1000_adapter *adapter = netdev_priv(netdev);
1776 struct e1000_hw *hw = &adapter->hw;
1777 u32 ctrl, rctl;
1778
74ef9c39
JB
1779 if (!test_bit(__E1000_DOWN, &adapter->state))
1780 e1000_irq_disable(adapter);
bc7f75fa
AK
1781 adapter->vlgrp = grp;
1782
1783 if (grp) {
1784 /* enable VLAN tag insert/strip */
1785 ctrl = er32(CTRL);
1786 ctrl |= E1000_CTRL_VME;
1787 ew32(CTRL, ctrl);
1788
1789 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
1790 /* enable VLAN receive filtering */
1791 rctl = er32(RCTL);
bc7f75fa
AK
1792 rctl &= ~E1000_RCTL_CFIEN;
1793 ew32(RCTL, rctl);
1794 e1000_update_mng_vlan(adapter);
1795 }
1796 } else {
1797 /* disable VLAN tag insert/strip */
1798 ctrl = er32(CTRL);
1799 ctrl &= ~E1000_CTRL_VME;
1800 ew32(CTRL, ctrl);
1801
1802 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK
1803 if (adapter->mng_vlan_id !=
1804 (u16)E1000_MNG_VLAN_NONE) {
1805 e1000_vlan_rx_kill_vid(netdev,
1806 adapter->mng_vlan_id);
1807 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1808 }
1809 }
1810 }
1811
74ef9c39
JB
1812 if (!test_bit(__E1000_DOWN, &adapter->state))
1813 e1000_irq_enable(adapter);
bc7f75fa
AK
1814}
1815
1816static void e1000_restore_vlan(struct e1000_adapter *adapter)
1817{
1818 u16 vid;
1819
1820 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1821
1822 if (!adapter->vlgrp)
1823 return;
1824
1825 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1826 if (!vlan_group_get_device(adapter->vlgrp, vid))
1827 continue;
1828 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1829 }
1830}
1831
1832static void e1000_init_manageability(struct e1000_adapter *adapter)
1833{
1834 struct e1000_hw *hw = &adapter->hw;
1835 u32 manc, manc2h;
1836
1837 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
1838 return;
1839
1840 manc = er32(MANC);
1841
ad68076e
BA
1842 /*
1843 * enable receiving management packets to the host. this will probably
bc7f75fa 1844 * generate destination unreachable messages from the host OS, but
ad68076e
BA
1845 * the packets will be handled on SMBUS
1846 */
bc7f75fa
AK
1847 manc |= E1000_MANC_EN_MNG2HOST;
1848 manc2h = er32(MANC2H);
1849#define E1000_MNG2HOST_PORT_623 (1 << 5)
1850#define E1000_MNG2HOST_PORT_664 (1 << 6)
1851 manc2h |= E1000_MNG2HOST_PORT_623;
1852 manc2h |= E1000_MNG2HOST_PORT_664;
1853 ew32(MANC2H, manc2h);
1854 ew32(MANC, manc);
1855}
1856
1857/**
1858 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1859 * @adapter: board private structure
1860 *
1861 * Configure the Tx unit of the MAC after a reset.
1862 **/
1863static void e1000_configure_tx(struct e1000_adapter *adapter)
1864{
1865 struct e1000_hw *hw = &adapter->hw;
1866 struct e1000_ring *tx_ring = adapter->tx_ring;
1867 u64 tdba;
1868 u32 tdlen, tctl, tipg, tarc;
1869 u32 ipgr1, ipgr2;
1870
1871 /* Setup the HW Tx Head and Tail descriptor pointers */
1872 tdba = tx_ring->dma;
1873 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
1874 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
1875 ew32(TDBAH, (tdba >> 32));
1876 ew32(TDLEN, tdlen);
1877 ew32(TDH, 0);
1878 ew32(TDT, 0);
1879 tx_ring->head = E1000_TDH;
1880 tx_ring->tail = E1000_TDT;
1881
1882 /* Set the default values for the Tx Inter Packet Gap timer */
1883 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
1884 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
1885 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
1886
1887 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
1888 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
1889
1890 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1891 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1892 ew32(TIPG, tipg);
1893
1894 /* Set the Tx Interrupt Delay register */
1895 ew32(TIDV, adapter->tx_int_delay);
ad68076e 1896 /* Tx irq moderation */
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1897 ew32(TADV, adapter->tx_abs_int_delay);
1898
1899 /* Program the Transmit Control Register */
1900 tctl = er32(TCTL);
1901 tctl &= ~E1000_TCTL_CT;
1902 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1903 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1904
1905 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 1906 tarc = er32(TARC(0));
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1907 /*
1908 * set the speed mode bit, we'll clear it if we're not at
1909 * gigabit link later
1910 */
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1911#define SPEED_MODE_BIT (1 << 21)
1912 tarc |= SPEED_MODE_BIT;
e9ec2c0f 1913 ew32(TARC(0), tarc);
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1914 }
1915
1916 /* errata: program both queues to unweighted RR */
1917 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 1918 tarc = er32(TARC(0));
bc7f75fa 1919 tarc |= 1;
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1920 ew32(TARC(0), tarc);
1921 tarc = er32(TARC(1));
bc7f75fa 1922 tarc |= 1;
e9ec2c0f 1923 ew32(TARC(1), tarc);
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1924 }
1925
1926 e1000e_config_collision_dist(hw);
1927
1928 /* Setup Transmit Descriptor Settings for eop descriptor */
1929 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1930
1931 /* only set IDE if we are delaying interrupts using the timers */
1932 if (adapter->tx_int_delay)
1933 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1934
1935 /* enable Report Status bit */
1936 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1937
1938 ew32(TCTL, tctl);
1939
1940 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
1941}
1942
1943/**
1944 * e1000_setup_rctl - configure the receive control registers
1945 * @adapter: Board private structure
1946 **/
1947#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1948 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1949static void e1000_setup_rctl(struct e1000_adapter *adapter)
1950{
1951 struct e1000_hw *hw = &adapter->hw;
1952 u32 rctl, rfctl;
1953 u32 psrctl = 0;
1954 u32 pages = 0;
1955
1956 /* Program MC offset vector base */
1957 rctl = er32(RCTL);
1958 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1959 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1960 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1961 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1962
1963 /* Do not Store bad packets */
1964 rctl &= ~E1000_RCTL_SBP;
1965
1966 /* Enable Long Packet receive */
1967 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1968 rctl &= ~E1000_RCTL_LPE;
1969 else
1970 rctl |= E1000_RCTL_LPE;
1971
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1972 /* Enable hardware CRC frame stripping */
1973 rctl |= E1000_RCTL_SECRC;
1974
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1975 /* Setup buffer sizes */
1976 rctl &= ~E1000_RCTL_SZ_4096;
1977 rctl |= E1000_RCTL_BSEX;
1978 switch (adapter->rx_buffer_len) {
1979 case 256:
1980 rctl |= E1000_RCTL_SZ_256;
1981 rctl &= ~E1000_RCTL_BSEX;
1982 break;
1983 case 512:
1984 rctl |= E1000_RCTL_SZ_512;
1985 rctl &= ~E1000_RCTL_BSEX;
1986 break;
1987 case 1024:
1988 rctl |= E1000_RCTL_SZ_1024;
1989 rctl &= ~E1000_RCTL_BSEX;
1990 break;
1991 case 2048:
1992 default:
1993 rctl |= E1000_RCTL_SZ_2048;
1994 rctl &= ~E1000_RCTL_BSEX;
1995 break;
1996 case 4096:
1997 rctl |= E1000_RCTL_SZ_4096;
1998 break;
1999 case 8192:
2000 rctl |= E1000_RCTL_SZ_8192;
2001 break;
2002 case 16384:
2003 rctl |= E1000_RCTL_SZ_16384;
2004 break;
2005 }
2006
2007 /*
2008 * 82571 and greater support packet-split where the protocol
2009 * header is placed in skb->data and the packet data is
2010 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2011 * In the case of a non-split, skb->data is linearly filled,
2012 * followed by the page buffers. Therefore, skb->data is
2013 * sized to hold the largest protocol header.
2014 *
2015 * allocations using alloc_page take too long for regular MTU
2016 * so only enable packet split for jumbo frames
2017 *
2018 * Using pages when the page size is greater than 16k wastes
2019 * a lot of memory, since we allocate 3 pages at all times
2020 * per packet.
2021 */
bc7f75fa 2022 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
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2023 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2024 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2025 adapter->rx_ps_pages = pages;
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2026 else
2027 adapter->rx_ps_pages = 0;
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2028
2029 if (adapter->rx_ps_pages) {
2030 /* Configure extra packet-split registers */
2031 rfctl = er32(RFCTL);
2032 rfctl |= E1000_RFCTL_EXTEN;
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2033 /*
2034 * disable packet split support for IPv6 extension headers,
2035 * because some malformed IPv6 headers can hang the Rx
2036 */
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2037 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2038 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2039
2040 ew32(RFCTL, rfctl);
2041
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2042 /* Enable Packet split descriptors */
2043 rctl |= E1000_RCTL_DTYP_PS;
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2044
2045 psrctl |= adapter->rx_ps_bsize0 >>
2046 E1000_PSRCTL_BSIZE0_SHIFT;
2047
2048 switch (adapter->rx_ps_pages) {
2049 case 3:
2050 psrctl |= PAGE_SIZE <<
2051 E1000_PSRCTL_BSIZE3_SHIFT;
2052 case 2:
2053 psrctl |= PAGE_SIZE <<
2054 E1000_PSRCTL_BSIZE2_SHIFT;
2055 case 1:
2056 psrctl |= PAGE_SIZE >>
2057 E1000_PSRCTL_BSIZE1_SHIFT;
2058 break;
2059 }
2060
2061 ew32(PSRCTL, psrctl);
2062 }
2063
2064 ew32(RCTL, rctl);
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2065 /* just started the receive unit, no need to restart */
2066 adapter->flags &= ~FLAG_RX_RESTART_NOW;
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2067}
2068
2069/**
2070 * e1000_configure_rx - Configure Receive Unit after Reset
2071 * @adapter: board private structure
2072 *
2073 * Configure the Rx unit of the MAC after a reset.
2074 **/
2075static void e1000_configure_rx(struct e1000_adapter *adapter)
2076{
2077 struct e1000_hw *hw = &adapter->hw;
2078 struct e1000_ring *rx_ring = adapter->rx_ring;
2079 u64 rdba;
2080 u32 rdlen, rctl, rxcsum, ctrl_ext;
2081
2082 if (adapter->rx_ps_pages) {
2083 /* this is a 32 byte descriptor */
2084 rdlen = rx_ring->count *
2085 sizeof(union e1000_rx_desc_packet_split);
2086 adapter->clean_rx = e1000_clean_rx_irq_ps;
2087 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2088 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2089 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2090 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2091 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2092 } else {
97ac8cae 2093 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
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2094 adapter->clean_rx = e1000_clean_rx_irq;
2095 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2096 }
2097
2098 /* disable receives while setting up the descriptors */
2099 rctl = er32(RCTL);
2100 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2101 e1e_flush();
2102 msleep(10);
2103
2104 /* set the Receive Delay Timer Register */
2105 ew32(RDTR, adapter->rx_int_delay);
2106
2107 /* irq moderation */
2108 ew32(RADV, adapter->rx_abs_int_delay);
2109 if (adapter->itr_setting != 0)
ad68076e 2110 ew32(ITR, 1000000000 / (adapter->itr * 256));
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2111
2112 ctrl_ext = er32(CTRL_EXT);
2113 /* Reset delay timers after every interrupt */
2114 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2115 /* Auto-Mask interrupts upon ICR access */
2116 ctrl_ext |= E1000_CTRL_EXT_IAME;
2117 ew32(IAM, 0xffffffff);
2118 ew32(CTRL_EXT, ctrl_ext);
2119 e1e_flush();
2120
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2121 /*
2122 * Setup the HW Rx Head and Tail Descriptor Pointers and
2123 * the Base and Length of the Rx Descriptor Ring
2124 */
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2125 rdba = rx_ring->dma;
2126 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2127 ew32(RDBAH, (rdba >> 32));
2128 ew32(RDLEN, rdlen);
2129 ew32(RDH, 0);
2130 ew32(RDT, 0);
2131 rx_ring->head = E1000_RDH;
2132 rx_ring->tail = E1000_RDT;
2133
2134 /* Enable Receive Checksum Offload for TCP and UDP */
2135 rxcsum = er32(RXCSUM);
2136 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2137 rxcsum |= E1000_RXCSUM_TUOFL;
2138
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2139 /*
2140 * IPv4 payload checksum for UDP fragments must be
2141 * used in conjunction with packet-split.
2142 */
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2143 if (adapter->rx_ps_pages)
2144 rxcsum |= E1000_RXCSUM_IPPCSE;
2145 } else {
2146 rxcsum &= ~E1000_RXCSUM_TUOFL;
2147 /* no need to clear IPPCSE as it defaults to 0 */
2148 }
2149 ew32(RXCSUM, rxcsum);
2150
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BA
2151 /*
2152 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2153 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2154 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2155 */
bc7f75fa 2156 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA
2157 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2158 u32 rxdctl = er32(RXDCTL(0));
2159 ew32(RXDCTL(0), rxdctl | 0x3);
2160 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2161 /*
2162 * With jumbo frames and early-receive enabled, excessive
2163 * C4->C2 latencies result in dropped transactions.
2164 */
2165 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2166 e1000e_driver_name, 55);
2167 } else {
2168 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2169 e1000e_driver_name,
2170 PM_QOS_DEFAULT_VALUE);
2171 }
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2172
2173 /* Enable Receives */
2174 ew32(RCTL, rctl);
2175}
2176
2177/**
e2de3eb6 2178 * e1000_update_mc_addr_list - Update Multicast addresses
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2179 * @hw: pointer to the HW structure
2180 * @mc_addr_list: array of multicast addresses to program
2181 * @mc_addr_count: number of multicast addresses to program
2182 * @rar_used_count: the first RAR register free to program
2183 * @rar_count: total number of supported Receive Address Registers
2184 *
2185 * Updates the Receive Address Registers and Multicast Table Array.
2186 * The caller must have a packed mc_addr_list of multicast addresses.
2187 * The parameter rar_count will usually be hw->mac.rar_entry_count
2188 * unless there are workarounds that change this. Currently no func pointer
2189 * exists and all implementations are handled in the generic version of this
2190 * function.
2191 **/
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2192static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2193 u32 mc_addr_count, u32 rar_used_count,
2194 u32 rar_count)
bc7f75fa 2195{
e2de3eb6 2196 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
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2197 rar_used_count, rar_count);
2198}
2199
2200/**
2201 * e1000_set_multi - Multicast and Promiscuous mode set
2202 * @netdev: network interface device structure
2203 *
2204 * The set_multi entry point is called whenever the multicast address
2205 * list or the network interface flags are updated. This routine is
2206 * responsible for configuring the hardware for proper multicast,
2207 * promiscuous mode, and all-multi behavior.
2208 **/
2209static void e1000_set_multi(struct net_device *netdev)
2210{
2211 struct e1000_adapter *adapter = netdev_priv(netdev);
2212 struct e1000_hw *hw = &adapter->hw;
2213 struct e1000_mac_info *mac = &hw->mac;
2214 struct dev_mc_list *mc_ptr;
2215 u8 *mta_list;
2216 u32 rctl;
2217 int i;
2218
2219 /* Check for Promiscuous and All Multicast modes */
2220
2221 rctl = er32(RCTL);
2222
2223 if (netdev->flags & IFF_PROMISC) {
2224 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2225 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2226 } else {
746b9f02
PM
2227 if (netdev->flags & IFF_ALLMULTI) {
2228 rctl |= E1000_RCTL_MPE;
2229 rctl &= ~E1000_RCTL_UPE;
2230 } else {
2231 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2232 }
78ed11a5 2233 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2234 rctl |= E1000_RCTL_VFE;
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2235 }
2236
2237 ew32(RCTL, rctl);
2238
2239 if (netdev->mc_count) {
2240 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2241 if (!mta_list)
2242 return;
2243
2244 /* prepare a packed array of only addresses. */
2245 mc_ptr = netdev->mc_list;
2246
2247 for (i = 0; i < netdev->mc_count; i++) {
2248 if (!mc_ptr)
2249 break;
2250 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2251 ETH_ALEN);
2252 mc_ptr = mc_ptr->next;
2253 }
2254
e2de3eb6 2255 e1000_update_mc_addr_list(hw, mta_list, i, 1,
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2256 mac->rar_entry_count);
2257 kfree(mta_list);
2258 } else {
2259 /*
2260 * if we're called from probe, we might not have
2261 * anything to do here, so clear out the list
2262 */
e2de3eb6 2263 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
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2264 }
2265}
2266
2267/**
ad68076e 2268 * e1000_configure - configure the hardware for Rx and Tx
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2269 * @adapter: private board structure
2270 **/
2271static void e1000_configure(struct e1000_adapter *adapter)
2272{
2273 e1000_set_multi(adapter->netdev);
2274
2275 e1000_restore_vlan(adapter);
2276 e1000_init_manageability(adapter);
2277
2278 e1000_configure_tx(adapter);
2279 e1000_setup_rctl(adapter);
2280 e1000_configure_rx(adapter);
ad68076e 2281 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
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2282}
2283
2284/**
2285 * e1000e_power_up_phy - restore link in case the phy was powered down
2286 * @adapter: address of board private structure
2287 *
2288 * The phy may be powered down to save power and turn off link when the
2289 * driver is unloaded and wake on lan is not enabled (among others)
2290 * *** this routine MUST be followed by a call to e1000e_reset ***
2291 **/
2292void e1000e_power_up_phy(struct e1000_adapter *adapter)
2293{
2294 u16 mii_reg = 0;
2295
2296 /* Just clear the power down bit to wake the phy back up */
318a94d6 2297 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
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2298 /*
2299 * According to the manual, the phy will retain its
2300 * settings across a power-down/up cycle
2301 */
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2302 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2303 mii_reg &= ~MII_CR_POWER_DOWN;
2304 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2305 }
2306
2307 adapter->hw.mac.ops.setup_link(&adapter->hw);
2308}
2309
2310/**
2311 * e1000_power_down_phy - Power down the PHY
2312 *
2313 * Power down the PHY so no link is implied when interface is down
2314 * The PHY cannot be powered down is management or WoL is active
2315 */
2316static void e1000_power_down_phy(struct e1000_adapter *adapter)
2317{
2318 struct e1000_hw *hw = &adapter->hw;
2319 u16 mii_reg;
2320
2321 /* WoL is enabled */
23b66e2b 2322 if (adapter->wol)
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2323 return;
2324
2325 /* non-copper PHY? */
318a94d6 2326 if (adapter->hw.phy.media_type != e1000_media_type_copper)
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2327 return;
2328
2329 /* reset is blocked because of a SoL/IDER session */
ad68076e 2330 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
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2331 return;
2332
489815ce 2333 /* manageability (AMT) is enabled */
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2334 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2335 return;
2336
2337 /* power down the PHY */
2338 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2339 mii_reg |= MII_CR_POWER_DOWN;
2340 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2341 mdelay(1);
2342}
2343
2344/**
2345 * e1000e_reset - bring the hardware into a known good state
2346 *
2347 * This function boots the hardware and enables some settings that
2348 * require a configuration cycle of the hardware - those cannot be
2349 * set/changed during runtime. After reset the device needs to be
ad68076e 2350 * properly configured for Rx, Tx etc.
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2351 */
2352void e1000e_reset(struct e1000_adapter *adapter)
2353{
2354 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2355 struct e1000_fc_info *fc = &adapter->hw.fc;
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2356 struct e1000_hw *hw = &adapter->hw;
2357 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2358 u32 pba = adapter->pba;
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2359 u16 hwm;
2360
ad68076e 2361 /* reset Packet Buffer Allocation to default */
318a94d6 2362 ew32(PBA, pba);
df762464 2363
318a94d6 2364 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
2365 /*
2366 * To maintain wire speed transmits, the Tx FIFO should be
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2367 * large enough to accommodate two full transmit packets,
2368 * rounded up to the next 1KB and expressed in KB. Likewise,
2369 * the Rx FIFO should be large enough to accommodate at least
2370 * one full receive packet and is similarly rounded up and
ad68076e
BA
2371 * expressed in KB.
2372 */
df762464 2373 pba = er32(PBA);
bc7f75fa 2374 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2375 tx_space = pba >> 16;
bc7f75fa 2376 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2377 pba &= 0xffff;
ad68076e
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2378 /*
2379 * the Tx fifo also stores 16 bytes of information about the tx
2380 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
2381 */
2382 min_tx_space = (adapter->max_frame_size +
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2383 sizeof(struct e1000_tx_desc) -
2384 ETH_FCS_LEN) * 2;
2385 min_tx_space = ALIGN(min_tx_space, 1024);
2386 min_tx_space >>= 10;
2387 /* software strips receive CRC, so leave room for it */
318a94d6 2388 min_rx_space = adapter->max_frame_size;
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2389 min_rx_space = ALIGN(min_rx_space, 1024);
2390 min_rx_space >>= 10;
2391
ad68076e
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2392 /*
2393 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2394 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
2395 * allocation, take space away from current Rx allocation
2396 */
df762464
AK
2397 if ((tx_space < min_tx_space) &&
2398 ((min_tx_space - tx_space) < pba)) {
2399 pba -= min_tx_space - tx_space;
bc7f75fa 2400
ad68076e
BA
2401 /*
2402 * if short on Rx space, Rx wins and must trump tx
2403 * adjustment or use Early Receive if available
2404 */
df762464 2405 if ((pba < min_rx_space) &&
bc7f75fa
AK
2406 (!(adapter->flags & FLAG_HAS_ERT)))
2407 /* ERT enabled in e1000_configure_rx */
df762464 2408 pba = min_rx_space;
bc7f75fa 2409 }
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AK
2410
2411 ew32(PBA, pba);
bc7f75fa
AK
2412 }
2413
bc7f75fa 2414
ad68076e
BA
2415 /*
2416 * flow control settings
2417 *
2418 * The high water mark must be low enough to fit one full frame
bc7f75fa
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2419 * (or the size used for early receive) above it in the Rx FIFO.
2420 * Set it to the lower of:
2421 * - 90% of the Rx FIFO size, and
2422 * - the full Rx FIFO size minus the early receive size (for parts
2423 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA
2424 * - the full Rx FIFO size minus one full frame
2425 */
bc7f75fa 2426 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK
2427 hwm = min(((pba << 10) * 9 / 10),
2428 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2429 else
318a94d6
JK
2430 hwm = min(((pba << 10) * 9 / 10),
2431 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2432
318a94d6
JK
2433 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2434 fc->low_water = fc->high_water - 8;
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2435
2436 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2437 fc->pause_time = 0xFFFF;
bc7f75fa 2438 else
318a94d6
JK
2439 fc->pause_time = E1000_FC_PAUSE_TIME;
2440 fc->send_xon = 1;
2441 fc->type = fc->original_type;
bc7f75fa
AK
2442
2443 /* Allow time for pending master requests to run */
2444 mac->ops.reset_hw(hw);
97ac8cae
BA
2445
2446 /*
2447 * For parts with AMT enabled, let the firmware know
2448 * that the network interface is in control
2449 */
c43bc57e 2450 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
2451 e1000_get_hw_control(adapter);
2452
bc7f75fa
AK
2453 ew32(WUC, 0);
2454
2455 if (mac->ops.init_hw(hw))
44defeb3 2456 e_err("Hardware Error\n");
bc7f75fa
AK
2457
2458 e1000_update_mng_vlan(adapter);
2459
2460 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2461 ew32(VET, ETH_P_8021Q);
2462
2463 e1000e_reset_adaptive(hw);
2464 e1000_get_phy_info(hw);
2465
2466 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2467 u16 phy_data = 0;
ad68076e
BA
2468 /*
2469 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2470 * the return value of this function because there is nothing
ad68076e
BA
2471 * different we would do if it failed
2472 */
bc7f75fa
AK
2473 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2474 phy_data &= ~IGP02E1000_PM_SPD;
2475 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2476 }
bc7f75fa
AK
2477}
2478
2479int e1000e_up(struct e1000_adapter *adapter)
2480{
2481 struct e1000_hw *hw = &adapter->hw;
2482
2483 /* hardware has been reset, we need to reload some things */
2484 e1000_configure(adapter);
2485
2486 clear_bit(__E1000_DOWN, &adapter->state);
2487
2488 napi_enable(&adapter->napi);
2489 e1000_irq_enable(adapter);
2490
2491 /* fire a link change interrupt to start the watchdog */
2492 ew32(ICS, E1000_ICS_LSC);
2493 return 0;
2494}
2495
2496void e1000e_down(struct e1000_adapter *adapter)
2497{
2498 struct net_device *netdev = adapter->netdev;
2499 struct e1000_hw *hw = &adapter->hw;
2500 u32 tctl, rctl;
2501
ad68076e
BA
2502 /*
2503 * signal that we're down so the interrupt handler does not
2504 * reschedule our watchdog timer
2505 */
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AK
2506 set_bit(__E1000_DOWN, &adapter->state);
2507
2508 /* disable receives in the hardware */
2509 rctl = er32(RCTL);
2510 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2511 /* flush and sleep below */
2512
d55b53ff 2513 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
2514
2515 /* disable transmits in the hardware */
2516 tctl = er32(TCTL);
2517 tctl &= ~E1000_TCTL_EN;
2518 ew32(TCTL, tctl);
2519 /* flush both disables and wait for them to finish */
2520 e1e_flush();
2521 msleep(10);
2522
2523 napi_disable(&adapter->napi);
2524 e1000_irq_disable(adapter);
2525
2526 del_timer_sync(&adapter->watchdog_timer);
2527 del_timer_sync(&adapter->phy_info_timer);
2528
2529 netdev->tx_queue_len = adapter->tx_queue_len;
2530 netif_carrier_off(netdev);
2531 adapter->link_speed = 0;
2532 adapter->link_duplex = 0;
2533
52cc3086
JK
2534 if (!pci_channel_offline(adapter->pdev))
2535 e1000e_reset(adapter);
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AK
2536 e1000_clean_tx_ring(adapter);
2537 e1000_clean_rx_ring(adapter);
2538
2539 /*
2540 * TODO: for power management, we could drop the link and
2541 * pci_disable_device here.
2542 */
2543}
2544
2545void e1000e_reinit_locked(struct e1000_adapter *adapter)
2546{
2547 might_sleep();
2548 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2549 msleep(1);
2550 e1000e_down(adapter);
2551 e1000e_up(adapter);
2552 clear_bit(__E1000_RESETTING, &adapter->state);
2553}
2554
2555/**
2556 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2557 * @adapter: board private structure to initialize
2558 *
2559 * e1000_sw_init initializes the Adapter private data structure.
2560 * Fields are initialized based on PCI device information and
2561 * OS network device settings (MTU size).
2562 **/
2563static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2564{
bc7f75fa
AK
2565 struct net_device *netdev = adapter->netdev;
2566
2567 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2568 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
2569 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2570 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
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AK
2571
2572 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2573 if (!adapter->tx_ring)
2574 goto err;
2575
2576 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2577 if (!adapter->rx_ring)
2578 goto err;
2579
2580 spin_lock_init(&adapter->tx_queue_lock);
2581
2582 /* Explicitly disable IRQ since the NIC can be in any state. */
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AK
2583 e1000_irq_disable(adapter);
2584
2585 spin_lock_init(&adapter->stats_lock);
2586
2587 set_bit(__E1000_DOWN, &adapter->state);
2588 return 0;
2589
2590err:
44defeb3 2591 e_err("Unable to allocate memory for queues\n");
bc7f75fa
AK
2592 kfree(adapter->rx_ring);
2593 kfree(adapter->tx_ring);
2594 return -ENOMEM;
2595}
2596
2597/**
2598 * e1000_open - Called when a network interface is made active
2599 * @netdev: network interface device structure
2600 *
2601 * Returns 0 on success, negative value on failure
2602 *
2603 * The open entry point is called when a network interface is made
2604 * active by the system (IFF_UP). At this point all resources needed
2605 * for transmit and receive operations are allocated, the interrupt
2606 * handler is registered with the OS, the watchdog timer is started,
2607 * and the stack is notified that the interface is ready.
2608 **/
2609static int e1000_open(struct net_device *netdev)
2610{
2611 struct e1000_adapter *adapter = netdev_priv(netdev);
2612 struct e1000_hw *hw = &adapter->hw;
2613 int err;
2614
2615 /* disallow open during test */
2616 if (test_bit(__E1000_TESTING, &adapter->state))
2617 return -EBUSY;
2618
2619 /* allocate transmit descriptors */
2620 err = e1000e_setup_tx_resources(adapter);
2621 if (err)
2622 goto err_setup_tx;
2623
2624 /* allocate receive descriptors */
2625 err = e1000e_setup_rx_resources(adapter);
2626 if (err)
2627 goto err_setup_rx;
2628
2629 e1000e_power_up_phy(adapter);
2630
2631 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2632 if ((adapter->hw.mng_cookie.status &
2633 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
2634 e1000_update_mng_vlan(adapter);
2635
ad68076e
BA
2636 /*
2637 * If AMT is enabled, let the firmware know that the network
2638 * interface is now open
2639 */
c43bc57e 2640 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
2641 e1000_get_hw_control(adapter);
2642
ad68076e
BA
2643 /*
2644 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
2645 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2646 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
2647 * clean_rx handler before we do so.
2648 */
bc7f75fa
AK
2649 e1000_configure(adapter);
2650
2651 err = e1000_request_irq(adapter);
2652 if (err)
2653 goto err_req_irq;
2654
2655 /* From here on the code is the same as e1000e_up() */
2656 clear_bit(__E1000_DOWN, &adapter->state);
2657
2658 napi_enable(&adapter->napi);
2659
2660 e1000_irq_enable(adapter);
2661
d55b53ff
JK
2662 netif_tx_start_all_queues(netdev);
2663
bc7f75fa
AK
2664 /* fire a link status change interrupt to start the watchdog */
2665 ew32(ICS, E1000_ICS_LSC);
2666
2667 return 0;
2668
2669err_req_irq:
2670 e1000_release_hw_control(adapter);
2671 e1000_power_down_phy(adapter);
2672 e1000e_free_rx_resources(adapter);
2673err_setup_rx:
2674 e1000e_free_tx_resources(adapter);
2675err_setup_tx:
2676 e1000e_reset(adapter);
2677
2678 return err;
2679}
2680
2681/**
2682 * e1000_close - Disables a network interface
2683 * @netdev: network interface device structure
2684 *
2685 * Returns 0, this is not allowed to fail
2686 *
2687 * The close entry point is called when an interface is de-activated
2688 * by the OS. The hardware is still under the drivers control, but
2689 * needs to be disabled. A global MAC reset is issued to stop the
2690 * hardware, and all transmit and receive resources are freed.
2691 **/
2692static int e1000_close(struct net_device *netdev)
2693{
2694 struct e1000_adapter *adapter = netdev_priv(netdev);
2695
2696 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
2697 e1000e_down(adapter);
2698 e1000_power_down_phy(adapter);
2699 e1000_free_irq(adapter);
2700
2701 e1000e_free_tx_resources(adapter);
2702 e1000e_free_rx_resources(adapter);
2703
ad68076e
BA
2704 /*
2705 * kill manageability vlan ID if supported, but not if a vlan with
2706 * the same ID is registered on the host OS (let 8021q kill it)
2707 */
bc7f75fa
AK
2708 if ((adapter->hw.mng_cookie.status &
2709 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2710 !(adapter->vlgrp &&
2711 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
2712 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2713
ad68076e
BA
2714 /*
2715 * If AMT is enabled, let the firmware know that the network
2716 * interface is now closed
2717 */
c43bc57e 2718 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
2719 e1000_release_hw_control(adapter);
2720
2721 return 0;
2722}
2723/**
2724 * e1000_set_mac - Change the Ethernet Address of the NIC
2725 * @netdev: network interface device structure
2726 * @p: pointer to an address structure
2727 *
2728 * Returns 0 on success, negative on failure
2729 **/
2730static int e1000_set_mac(struct net_device *netdev, void *p)
2731{
2732 struct e1000_adapter *adapter = netdev_priv(netdev);
2733 struct sockaddr *addr = p;
2734
2735 if (!is_valid_ether_addr(addr->sa_data))
2736 return -EADDRNOTAVAIL;
2737
2738 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2739 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2740
2741 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2742
2743 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
2744 /* activate the work around */
2745 e1000e_set_laa_state_82571(&adapter->hw, 1);
2746
ad68076e
BA
2747 /*
2748 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
2749 * between the time RAR[0] gets clobbered and the time it
2750 * gets fixed (in e1000_watchdog), the actual LAA is in one
2751 * of the RARs and no incoming packets directed to this port
2752 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
2753 * RAR[14]
2754 */
bc7f75fa
AK
2755 e1000e_rar_set(&adapter->hw,
2756 adapter->hw.mac.addr,
2757 adapter->hw.mac.rar_entry_count - 1);
2758 }
2759
2760 return 0;
2761}
2762
ad68076e
BA
2763/*
2764 * Need to wait a few seconds after link up to get diagnostic information from
2765 * the phy
2766 */
bc7f75fa
AK
2767static void e1000_update_phy_info(unsigned long data)
2768{
2769 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2770 e1000_get_phy_info(&adapter->hw);
2771}
2772
2773/**
2774 * e1000e_update_stats - Update the board statistics counters
2775 * @adapter: board private structure
2776 **/
2777void e1000e_update_stats(struct e1000_adapter *adapter)
2778{
2779 struct e1000_hw *hw = &adapter->hw;
2780 struct pci_dev *pdev = adapter->pdev;
2781 unsigned long irq_flags;
2782 u16 phy_tmp;
2783
2784#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2785
2786 /*
2787 * Prevent stats update while adapter is being reset, or if the pci
2788 * connection is down.
2789 */
2790 if (adapter->link_speed == 0)
2791 return;
2792 if (pci_channel_offline(pdev))
2793 return;
2794
2795 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2796
ad68076e
BA
2797 /*
2798 * these counters are modified from e1000_adjust_tbi_stats,
bc7f75fa
AK
2799 * called from the interrupt context, so they must only
2800 * be written while holding adapter->stats_lock
2801 */
2802
2803 adapter->stats.crcerrs += er32(CRCERRS);
2804 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
2805 adapter->stats.gorc += er32(GORCL);
2806 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
2807 adapter->stats.bprc += er32(BPRC);
2808 adapter->stats.mprc += er32(MPRC);
2809 adapter->stats.roc += er32(ROC);
2810
bc7f75fa
AK
2811 adapter->stats.mpc += er32(MPC);
2812 adapter->stats.scc += er32(SCC);
2813 adapter->stats.ecol += er32(ECOL);
2814 adapter->stats.mcc += er32(MCC);
2815 adapter->stats.latecol += er32(LATECOL);
2816 adapter->stats.dc += er32(DC);
bc7f75fa
AK
2817 adapter->stats.xonrxc += er32(XONRXC);
2818 adapter->stats.xontxc += er32(XONTXC);
2819 adapter->stats.xoffrxc += er32(XOFFRXC);
2820 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 2821 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
2822 adapter->stats.gotc += er32(GOTCL);
2823 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
2824 adapter->stats.rnbc += er32(RNBC);
2825 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
2826
2827 adapter->stats.mptc += er32(MPTC);
2828 adapter->stats.bptc += er32(BPTC);
2829
2830 /* used for adaptive IFS */
2831
2832 hw->mac.tx_packet_delta = er32(TPT);
2833 adapter->stats.tpt += hw->mac.tx_packet_delta;
2834 hw->mac.collision_delta = er32(COLC);
2835 adapter->stats.colc += hw->mac.collision_delta;
2836
2837 adapter->stats.algnerrc += er32(ALGNERRC);
2838 adapter->stats.rxerrc += er32(RXERRC);
2839 adapter->stats.tncrs += er32(TNCRS);
2840 adapter->stats.cexterr += er32(CEXTERR);
2841 adapter->stats.tsctc += er32(TSCTC);
2842 adapter->stats.tsctfc += er32(TSCTFC);
2843
bc7f75fa 2844 /* Fill out the OS statistics structure */
bc7f75fa
AK
2845 adapter->net_stats.multicast = adapter->stats.mprc;
2846 adapter->net_stats.collisions = adapter->stats.colc;
2847
2848 /* Rx Errors */
2849
ad68076e
BA
2850 /*
2851 * RLEC on some newer hardware can be incorrect so build
2852 * our own version based on RUC and ROC
2853 */
bc7f75fa
AK
2854 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
2855 adapter->stats.crcerrs + adapter->stats.algnerrc +
2856 adapter->stats.ruc + adapter->stats.roc +
2857 adapter->stats.cexterr;
2858 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
2859 adapter->stats.roc;
2860 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2861 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
2862 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
2863
2864 /* Tx Errors */
2865 adapter->net_stats.tx_errors = adapter->stats.ecol +
2866 adapter->stats.latecol;
2867 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
2868 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
2869 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
2870
2871 /* Tx Dropped needs to be maintained elsewhere */
2872
2873 /* Phy Stats */
318a94d6 2874 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
2875 if ((adapter->link_speed == SPEED_1000) &&
2876 (!e1e_rphy(hw, PHY_1000T_STATUS, &phy_tmp))) {
2877 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
2878 adapter->phy_stats.idle_errors += phy_tmp;
2879 }
2880 }
2881
2882 /* Management Stats */
2883 adapter->stats.mgptc += er32(MGTPTC);
2884 adapter->stats.mgprc += er32(MGTPRC);
2885 adapter->stats.mgpdc += er32(MGTPDC);
2886
2887 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2888}
2889
7c25769f
BA
2890/**
2891 * e1000_phy_read_status - Update the PHY register status snapshot
2892 * @adapter: board private structure
2893 **/
2894static void e1000_phy_read_status(struct e1000_adapter *adapter)
2895{
2896 struct e1000_hw *hw = &adapter->hw;
2897 struct e1000_phy_regs *phy = &adapter->phy_regs;
2898 int ret_val;
2899 unsigned long irq_flags;
2900
2901
2902 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2903
2904 if ((er32(STATUS) & E1000_STATUS_LU) &&
2905 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
2906 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
2907 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
2908 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
2909 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
2910 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
2911 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
2912 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
2913 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
2914 if (ret_val)
44defeb3 2915 e_warn("Error reading PHY register\n");
7c25769f
BA
2916 } else {
2917 /*
2918 * Do not read PHY registers if link is not up
2919 * Set values to typical power-on defaults
2920 */
2921 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
2922 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
2923 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
2924 BMSR_ERCAP);
2925 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
2926 ADVERTISE_ALL | ADVERTISE_CSMA);
2927 phy->lpa = 0;
2928 phy->expansion = EXPANSION_ENABLENPAGE;
2929 phy->ctrl1000 = ADVERTISE_1000FULL;
2930 phy->stat1000 = 0;
2931 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
2932 }
2933
2934 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
2935}
2936
bc7f75fa
AK
2937static void e1000_print_link_info(struct e1000_adapter *adapter)
2938{
bc7f75fa
AK
2939 struct e1000_hw *hw = &adapter->hw;
2940 u32 ctrl = er32(CTRL);
2941
44defeb3
JK
2942 e_info("Link is Up %d Mbps %s, Flow Control: %s\n",
2943 adapter->link_speed,
2944 (adapter->link_duplex == FULL_DUPLEX) ?
2945 "Full Duplex" : "Half Duplex",
2946 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
2947 "RX/TX" :
2948 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
2949 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
2950}
2951
318a94d6
JK
2952static bool e1000_has_link(struct e1000_adapter *adapter)
2953{
2954 struct e1000_hw *hw = &adapter->hw;
2955 bool link_active = 0;
2956 s32 ret_val = 0;
2957
2958 /*
2959 * get_link_status is set on LSC (link status) interrupt or
2960 * Rx sequence error interrupt. get_link_status will stay
2961 * false until the check_for_link establishes link
2962 * for copper adapters ONLY
2963 */
2964 switch (hw->phy.media_type) {
2965 case e1000_media_type_copper:
2966 if (hw->mac.get_link_status) {
2967 ret_val = hw->mac.ops.check_for_link(hw);
2968 link_active = !hw->mac.get_link_status;
2969 } else {
2970 link_active = 1;
2971 }
2972 break;
2973 case e1000_media_type_fiber:
2974 ret_val = hw->mac.ops.check_for_link(hw);
2975 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2976 break;
2977 case e1000_media_type_internal_serdes:
2978 ret_val = hw->mac.ops.check_for_link(hw);
2979 link_active = adapter->hw.mac.serdes_has_link;
2980 break;
2981 default:
2982 case e1000_media_type_unknown:
2983 break;
2984 }
2985
2986 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
2987 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2988 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 2989 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
2990 }
2991
2992 return link_active;
2993}
2994
2995static void e1000e_enable_receives(struct e1000_adapter *adapter)
2996{
2997 /* make sure the receive unit is started */
2998 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
2999 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3000 struct e1000_hw *hw = &adapter->hw;
3001 u32 rctl = er32(RCTL);
3002 ew32(RCTL, rctl | E1000_RCTL_EN);
3003 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3004 }
3005}
3006
bc7f75fa
AK
3007/**
3008 * e1000_watchdog - Timer Call-back
3009 * @data: pointer to adapter cast into an unsigned long
3010 **/
3011static void e1000_watchdog(unsigned long data)
3012{
3013 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3014
3015 /* Do the rest outside of interrupt context */
3016 schedule_work(&adapter->watchdog_task);
3017
3018 /* TODO: make this use queue_delayed_work() */
3019}
3020
3021static void e1000_watchdog_task(struct work_struct *work)
3022{
3023 struct e1000_adapter *adapter = container_of(work,
3024 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3025 struct net_device *netdev = adapter->netdev;
3026 struct e1000_mac_info *mac = &adapter->hw.mac;
3027 struct e1000_ring *tx_ring = adapter->tx_ring;
3028 struct e1000_hw *hw = &adapter->hw;
3029 u32 link, tctl;
bc7f75fa
AK
3030 int tx_pending = 0;
3031
318a94d6
JK
3032 link = e1000_has_link(adapter);
3033 if ((netif_carrier_ok(netdev)) && link) {
3034 e1000e_enable_receives(adapter);
bc7f75fa 3035 goto link_up;
bc7f75fa
AK
3036 }
3037
3038 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3039 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3040 e1000_update_mng_vlan(adapter);
3041
bc7f75fa
AK
3042 if (link) {
3043 if (!netif_carrier_ok(netdev)) {
3044 bool txb2b = 1;
318a94d6 3045 /* update snapshot of PHY registers on LSC */
7c25769f 3046 e1000_phy_read_status(adapter);
bc7f75fa
AK
3047 mac->ops.get_link_up_info(&adapter->hw,
3048 &adapter->link_speed,
3049 &adapter->link_duplex);
3050 e1000_print_link_info(adapter);
ad68076e
BA
3051 /*
3052 * tweak tx_queue_len according to speed/duplex
3053 * and adjust the timeout factor
3054 */
bc7f75fa
AK
3055 netdev->tx_queue_len = adapter->tx_queue_len;
3056 adapter->tx_timeout_factor = 1;
3057 switch (adapter->link_speed) {
3058 case SPEED_10:
3059 txb2b = 0;
3060 netdev->tx_queue_len = 10;
10f1b492 3061 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
3062 break;
3063 case SPEED_100:
3064 txb2b = 0;
3065 netdev->tx_queue_len = 100;
3066 /* maybe add some timeout factor ? */
3067 break;
3068 }
3069
ad68076e
BA
3070 /*
3071 * workaround: re-program speed mode bit after
3072 * link-up event
3073 */
bc7f75fa
AK
3074 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3075 !txb2b) {
3076 u32 tarc0;
e9ec2c0f 3077 tarc0 = er32(TARC(0));
bc7f75fa 3078 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3079 ew32(TARC(0), tarc0);
bc7f75fa
AK
3080 }
3081
ad68076e
BA
3082 /*
3083 * disable TSO for pcie and 10/100 speeds, to avoid
3084 * some hardware issues
3085 */
bc7f75fa
AK
3086 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3087 switch (adapter->link_speed) {
3088 case SPEED_10:
3089 case SPEED_100:
44defeb3 3090 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
3091 netdev->features &= ~NETIF_F_TSO;
3092 netdev->features &= ~NETIF_F_TSO6;
3093 break;
3094 case SPEED_1000:
3095 netdev->features |= NETIF_F_TSO;
3096 netdev->features |= NETIF_F_TSO6;
3097 break;
3098 default:
3099 /* oops */
3100 break;
3101 }
3102 }
3103
ad68076e
BA
3104 /*
3105 * enable transmits in the hardware, need to do this
3106 * after setting TARC(0)
3107 */
bc7f75fa
AK
3108 tctl = er32(TCTL);
3109 tctl |= E1000_TCTL_EN;
3110 ew32(TCTL, tctl);
3111
3112 netif_carrier_on(netdev);
d55b53ff 3113 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK
3114
3115 if (!test_bit(__E1000_DOWN, &adapter->state))
3116 mod_timer(&adapter->phy_info_timer,
3117 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
3118 }
3119 } else {
3120 if (netif_carrier_ok(netdev)) {
3121 adapter->link_speed = 0;
3122 adapter->link_duplex = 0;
44defeb3 3123 e_info("Link is Down\n");
bc7f75fa 3124 netif_carrier_off(netdev);
d55b53ff 3125 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
3126 if (!test_bit(__E1000_DOWN, &adapter->state))
3127 mod_timer(&adapter->phy_info_timer,
3128 round_jiffies(jiffies + 2 * HZ));
3129
3130 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3131 schedule_work(&adapter->reset_task);
3132 }
3133 }
3134
3135link_up:
3136 e1000e_update_stats(adapter);
3137
3138 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3139 adapter->tpt_old = adapter->stats.tpt;
3140 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3141 adapter->colc_old = adapter->stats.colc;
3142
7c25769f
BA
3143 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3144 adapter->gorc_old = adapter->stats.gorc;
3145 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3146 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
3147
3148 e1000e_update_adaptive(&adapter->hw);
3149
3150 if (!netif_carrier_ok(netdev)) {
3151 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3152 tx_ring->count);
3153 if (tx_pending) {
ad68076e
BA
3154 /*
3155 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
3156 * but we've got queued Tx work that's never going
3157 * to get done, so reset controller to flush Tx.
ad68076e
BA
3158 * (Do the reset outside of interrupt context).
3159 */
bc7f75fa
AK
3160 adapter->tx_timeout_count++;
3161 schedule_work(&adapter->reset_task);
3162 }
3163 }
3164
ad68076e 3165 /* Cause software interrupt to ensure Rx ring is cleaned */
bc7f75fa
AK
3166 ew32(ICS, E1000_ICS_RXDMT0);
3167
3168 /* Force detection of hung controller every watchdog period */
3169 adapter->detect_tx_hung = 1;
3170
ad68076e
BA
3171 /*
3172 * With 82571 controllers, LAA may be overwritten due to controller
3173 * reset from the other port. Set the appropriate LAA in RAR[0]
3174 */
bc7f75fa
AK
3175 if (e1000e_get_laa_state_82571(hw))
3176 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3177
3178 /* Reset the timer */
3179 if (!test_bit(__E1000_DOWN, &adapter->state))
3180 mod_timer(&adapter->watchdog_timer,
3181 round_jiffies(jiffies + 2 * HZ));
3182}
3183
3184#define E1000_TX_FLAGS_CSUM 0x00000001
3185#define E1000_TX_FLAGS_VLAN 0x00000002
3186#define E1000_TX_FLAGS_TSO 0x00000004
3187#define E1000_TX_FLAGS_IPV4 0x00000008
3188#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3189#define E1000_TX_FLAGS_VLAN_SHIFT 16
3190
3191static int e1000_tso(struct e1000_adapter *adapter,
3192 struct sk_buff *skb)
3193{
3194 struct e1000_ring *tx_ring = adapter->tx_ring;
3195 struct e1000_context_desc *context_desc;
3196 struct e1000_buffer *buffer_info;
3197 unsigned int i;
3198 u32 cmd_length = 0;
3199 u16 ipcse = 0, tucse, mss;
3200 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3201 int err;
3202
3203 if (skb_is_gso(skb)) {
3204 if (skb_header_cloned(skb)) {
3205 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3206 if (err)
3207 return err;
3208 }
3209
3210 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3211 mss = skb_shinfo(skb)->gso_size;
3212 if (skb->protocol == htons(ETH_P_IP)) {
3213 struct iphdr *iph = ip_hdr(skb);
3214 iph->tot_len = 0;
3215 iph->check = 0;
3216 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3217 iph->daddr, 0,
3218 IPPROTO_TCP,
3219 0);
3220 cmd_length = E1000_TXD_CMD_IP;
3221 ipcse = skb_transport_offset(skb) - 1;
3222 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3223 ipv6_hdr(skb)->payload_len = 0;
3224 tcp_hdr(skb)->check =
3225 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3226 &ipv6_hdr(skb)->daddr,
3227 0, IPPROTO_TCP, 0);
3228 ipcse = 0;
3229 }
3230 ipcss = skb_network_offset(skb);
3231 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3232 tucss = skb_transport_offset(skb);
3233 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3234 tucse = 0;
3235
3236 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3237 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3238
3239 i = tx_ring->next_to_use;
3240 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3241 buffer_info = &tx_ring->buffer_info[i];
3242
3243 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3244 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3245 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3246 context_desc->upper_setup.tcp_fields.tucss = tucss;
3247 context_desc->upper_setup.tcp_fields.tucso = tucso;
3248 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3249 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3250 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3251 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3252
3253 buffer_info->time_stamp = jiffies;
3254 buffer_info->next_to_watch = i;
3255
3256 i++;
3257 if (i == tx_ring->count)
3258 i = 0;
3259 tx_ring->next_to_use = i;
3260
3261 return 1;
3262 }
3263
3264 return 0;
3265}
3266
3267static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3268{
3269 struct e1000_ring *tx_ring = adapter->tx_ring;
3270 struct e1000_context_desc *context_desc;
3271 struct e1000_buffer *buffer_info;
3272 unsigned int i;
3273 u8 css;
3274
3275 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3276 css = skb_transport_offset(skb);
3277
3278 i = tx_ring->next_to_use;
3279 buffer_info = &tx_ring->buffer_info[i];
3280 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3281
3282 context_desc->lower_setup.ip_config = 0;
3283 context_desc->upper_setup.tcp_fields.tucss = css;
3284 context_desc->upper_setup.tcp_fields.tucso =
3285 css + skb->csum_offset;
3286 context_desc->upper_setup.tcp_fields.tucse = 0;
3287 context_desc->tcp_seg_setup.data = 0;
3288 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3289
3290 buffer_info->time_stamp = jiffies;
3291 buffer_info->next_to_watch = i;
3292
3293 i++;
3294 if (i == tx_ring->count)
3295 i = 0;
3296 tx_ring->next_to_use = i;
3297
3298 return 1;
3299 }
3300
3301 return 0;
3302}
3303
3304#define E1000_MAX_PER_TXD 8192
3305#define E1000_MAX_TXD_PWR 12
3306
3307static int e1000_tx_map(struct e1000_adapter *adapter,
3308 struct sk_buff *skb, unsigned int first,
3309 unsigned int max_per_txd, unsigned int nr_frags,
3310 unsigned int mss)
3311{
3312 struct e1000_ring *tx_ring = adapter->tx_ring;
3313 struct e1000_buffer *buffer_info;
3314 unsigned int len = skb->len - skb->data_len;
3315 unsigned int offset = 0, size, count = 0, i;
3316 unsigned int f;
3317
3318 i = tx_ring->next_to_use;
3319
3320 while (len) {
3321 buffer_info = &tx_ring->buffer_info[i];
3322 size = min(len, max_per_txd);
3323
3324 /* Workaround for premature desc write-backs
3325 * in TSO mode. Append 4-byte sentinel desc */
3326 if (mss && !nr_frags && size == len && size > 8)
3327 size -= 4;
3328
3329 buffer_info->length = size;
3330 /* set time_stamp *before* dma to help avoid a possible race */
3331 buffer_info->time_stamp = jiffies;
3332 buffer_info->dma =
3333 pci_map_single(adapter->pdev,
3334 skb->data + offset,
3335 size,
3336 PCI_DMA_TODEVICE);
8d8bb39b 3337 if (pci_dma_mapping_error(adapter->pdev, buffer_info->dma)) {
bc7f75fa
AK
3338 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3339 adapter->tx_dma_failed++;
3340 return -1;
3341 }
3342 buffer_info->next_to_watch = i;
3343
3344 len -= size;
3345 offset += size;
3346 count++;
3347 i++;
3348 if (i == tx_ring->count)
3349 i = 0;
3350 }
3351
3352 for (f = 0; f < nr_frags; f++) {
3353 struct skb_frag_struct *frag;
3354
3355 frag = &skb_shinfo(skb)->frags[f];
3356 len = frag->size;
3357 offset = frag->page_offset;
3358
3359 while (len) {
3360 buffer_info = &tx_ring->buffer_info[i];
3361 size = min(len, max_per_txd);
3362 /* Workaround for premature desc write-backs
3363 * in TSO mode. Append 4-byte sentinel desc */
3364 if (mss && f == (nr_frags-1) && size == len && size > 8)
3365 size -= 4;
3366
3367 buffer_info->length = size;
3368 buffer_info->time_stamp = jiffies;
3369 buffer_info->dma =
3370 pci_map_page(adapter->pdev,
3371 frag->page,
3372 offset,
3373 size,
3374 PCI_DMA_TODEVICE);
8d8bb39b
FT
3375 if (pci_dma_mapping_error(adapter->pdev,
3376 buffer_info->dma)) {
bc7f75fa
AK
3377 dev_err(&adapter->pdev->dev,
3378 "TX DMA page map failed\n");
3379 adapter->tx_dma_failed++;
3380 return -1;
3381 }
3382
3383 buffer_info->next_to_watch = i;
3384
3385 len -= size;
3386 offset += size;
3387 count++;
3388
3389 i++;
3390 if (i == tx_ring->count)
3391 i = 0;
3392 }
3393 }
3394
3395 if (i == 0)
3396 i = tx_ring->count - 1;
3397 else
3398 i--;
3399
3400 tx_ring->buffer_info[i].skb = skb;
3401 tx_ring->buffer_info[first].next_to_watch = i;
3402
3403 return count;
3404}
3405
3406static void e1000_tx_queue(struct e1000_adapter *adapter,
3407 int tx_flags, int count)
3408{
3409 struct e1000_ring *tx_ring = adapter->tx_ring;
3410 struct e1000_tx_desc *tx_desc = NULL;
3411 struct e1000_buffer *buffer_info;
3412 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3413 unsigned int i;
3414
3415 if (tx_flags & E1000_TX_FLAGS_TSO) {
3416 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3417 E1000_TXD_CMD_TSE;
3418 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3419
3420 if (tx_flags & E1000_TX_FLAGS_IPV4)
3421 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3422 }
3423
3424 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3425 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3426 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3427 }
3428
3429 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3430 txd_lower |= E1000_TXD_CMD_VLE;
3431 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3432 }
3433
3434 i = tx_ring->next_to_use;
3435
3436 while (count--) {
3437 buffer_info = &tx_ring->buffer_info[i];
3438 tx_desc = E1000_TX_DESC(*tx_ring, i);
3439 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3440 tx_desc->lower.data =
3441 cpu_to_le32(txd_lower | buffer_info->length);
3442 tx_desc->upper.data = cpu_to_le32(txd_upper);
3443
3444 i++;
3445 if (i == tx_ring->count)
3446 i = 0;
3447 }
3448
3449 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3450
ad68076e
BA
3451 /*
3452 * Force memory writes to complete before letting h/w
bc7f75fa
AK
3453 * know there are new descriptors to fetch. (Only
3454 * applicable for weak-ordered memory model archs,
ad68076e
BA
3455 * such as IA-64).
3456 */
bc7f75fa
AK
3457 wmb();
3458
3459 tx_ring->next_to_use = i;
3460 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
3461 /*
3462 * we need this if more than one processor can write to our tail
3463 * at a time, it synchronizes IO on IA64/Altix systems
3464 */
bc7f75fa
AK
3465 mmiowb();
3466}
3467
3468#define MINIMUM_DHCP_PACKET_SIZE 282
3469static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3470 struct sk_buff *skb)
3471{
3472 struct e1000_hw *hw = &adapter->hw;
3473 u16 length, offset;
3474
3475 if (vlan_tx_tag_present(skb)) {
3476 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3477 && (adapter->hw.mng_cookie.status &
3478 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3479 return 0;
3480 }
3481
3482 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3483 return 0;
3484
3485 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3486 return 0;
3487
3488 {
3489 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
3490 struct udphdr *udp;
3491
3492 if (ip->protocol != IPPROTO_UDP)
3493 return 0;
3494
3495 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
3496 if (ntohs(udp->dest) != 67)
3497 return 0;
3498
3499 offset = (u8 *)udp + 8 - skb->data;
3500 length = skb->len - offset;
3501 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
3502 }
3503
3504 return 0;
3505}
3506
3507static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3508{
3509 struct e1000_adapter *adapter = netdev_priv(netdev);
3510
3511 netif_stop_queue(netdev);
ad68076e
BA
3512 /*
3513 * Herbert's original patch had:
bc7f75fa 3514 * smp_mb__after_netif_stop_queue();
ad68076e
BA
3515 * but since that doesn't exist yet, just open code it.
3516 */
bc7f75fa
AK
3517 smp_mb();
3518
ad68076e
BA
3519 /*
3520 * We need to check again in a case another CPU has just
3521 * made room available.
3522 */
bc7f75fa
AK
3523 if (e1000_desc_unused(adapter->tx_ring) < size)
3524 return -EBUSY;
3525
3526 /* A reprieve! */
3527 netif_start_queue(netdev);
3528 ++adapter->restart_queue;
3529 return 0;
3530}
3531
3532static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
3533{
3534 struct e1000_adapter *adapter = netdev_priv(netdev);
3535
3536 if (e1000_desc_unused(adapter->tx_ring) >= size)
3537 return 0;
3538 return __e1000_maybe_stop_tx(netdev, size);
3539}
3540
3541#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3542static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3543{
3544 struct e1000_adapter *adapter = netdev_priv(netdev);
3545 struct e1000_ring *tx_ring = adapter->tx_ring;
3546 unsigned int first;
3547 unsigned int max_per_txd = E1000_MAX_PER_TXD;
3548 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3549 unsigned int tx_flags = 0;
4e6c709c 3550 unsigned int len = skb->len - skb->data_len;
bc7f75fa 3551 unsigned long irq_flags;
4e6c709c
AK
3552 unsigned int nr_frags;
3553 unsigned int mss;
bc7f75fa
AK
3554 int count = 0;
3555 int tso;
3556 unsigned int f;
bc7f75fa
AK
3557
3558 if (test_bit(__E1000_DOWN, &adapter->state)) {
3559 dev_kfree_skb_any(skb);
3560 return NETDEV_TX_OK;
3561 }
3562
3563 if (skb->len <= 0) {
3564 dev_kfree_skb_any(skb);
3565 return NETDEV_TX_OK;
3566 }
3567
3568 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
3569 /*
3570 * The controller does a simple calculation to
bc7f75fa
AK
3571 * make sure there is enough room in the FIFO before
3572 * initiating the DMA for each buffer. The calc is:
3573 * 4 = ceil(buffer len/mss). To make sure we don't
3574 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
3575 * drops.
3576 */
bc7f75fa
AK
3577 if (mss) {
3578 u8 hdr_len;
3579 max_per_txd = min(mss << 2, max_per_txd);
3580 max_txd_pwr = fls(max_per_txd) - 1;
3581
ad68076e
BA
3582 /*
3583 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
3584 * points to just header, pull a few bytes of payload from
3585 * frags into skb->data
3586 */
bc7f75fa 3587 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
3588 /*
3589 * we do this workaround for ES2LAN, but it is un-necessary,
3590 * avoiding it could save a lot of cycles
3591 */
4e6c709c 3592 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
3593 unsigned int pull_size;
3594
3595 pull_size = min((unsigned int)4, skb->data_len);
3596 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 3597 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
3598 dev_kfree_skb_any(skb);
3599 return NETDEV_TX_OK;
3600 }
3601 len = skb->len - skb->data_len;
3602 }
3603 }
3604
3605 /* reserve a descriptor for the offload context */
3606 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3607 count++;
3608 count++;
3609
3610 count += TXD_USE_COUNT(len, max_txd_pwr);
3611
3612 nr_frags = skb_shinfo(skb)->nr_frags;
3613 for (f = 0; f < nr_frags; f++)
3614 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3615 max_txd_pwr);
3616
3617 if (adapter->hw.mac.tx_pkt_filtering)
3618 e1000_transfer_dhcp_info(adapter, skb);
3619
3620 if (!spin_trylock_irqsave(&adapter->tx_queue_lock, irq_flags))
3621 /* Collision - tell upper layer to requeue */
3622 return NETDEV_TX_LOCKED;
3623
ad68076e
BA
3624 /*
3625 * need: count + 2 desc gap to keep tail from touching
3626 * head, otherwise try next time
3627 */
bc7f75fa
AK
3628 if (e1000_maybe_stop_tx(netdev, count + 2)) {
3629 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3630 return NETDEV_TX_BUSY;
3631 }
3632
3633 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3634 tx_flags |= E1000_TX_FLAGS_VLAN;
3635 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3636 }
3637
3638 first = tx_ring->next_to_use;
3639
3640 tso = e1000_tso(adapter, skb);
3641 if (tso < 0) {
3642 dev_kfree_skb_any(skb);
3643 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3644 return NETDEV_TX_OK;
3645 }
3646
3647 if (tso)
3648 tx_flags |= E1000_TX_FLAGS_TSO;
3649 else if (e1000_tx_csum(adapter, skb))
3650 tx_flags |= E1000_TX_FLAGS_CSUM;
3651
ad68076e
BA
3652 /*
3653 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 3654 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
3655 * no longer assume, we must.
3656 */
bc7f75fa
AK
3657 if (skb->protocol == htons(ETH_P_IP))
3658 tx_flags |= E1000_TX_FLAGS_IPV4;
3659
3660 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
3661 if (count < 0) {
3662 /* handle pci_map_single() error in e1000_tx_map */
3663 dev_kfree_skb_any(skb);
3664 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
7b5dfe1a 3665 return NETDEV_TX_OK;
bc7f75fa
AK
3666 }
3667
3668 e1000_tx_queue(adapter, tx_flags, count);
3669
3670 netdev->trans_start = jiffies;
3671
3672 /* Make sure there is space in the ring for the next send. */
3673 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
3674
3675 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3676 return NETDEV_TX_OK;
3677}
3678
3679/**
3680 * e1000_tx_timeout - Respond to a Tx Hang
3681 * @netdev: network interface device structure
3682 **/
3683static void e1000_tx_timeout(struct net_device *netdev)
3684{
3685 struct e1000_adapter *adapter = netdev_priv(netdev);
3686
3687 /* Do the reset outside of interrupt context */
3688 adapter->tx_timeout_count++;
3689 schedule_work(&adapter->reset_task);
3690}
3691
3692static void e1000_reset_task(struct work_struct *work)
3693{
3694 struct e1000_adapter *adapter;
3695 adapter = container_of(work, struct e1000_adapter, reset_task);
3696
3697 e1000e_reinit_locked(adapter);
3698}
3699
3700/**
3701 * e1000_get_stats - Get System Network Statistics
3702 * @netdev: network interface device structure
3703 *
3704 * Returns the address of the device statistics structure.
3705 * The statistics are actually updated from the timer callback.
3706 **/
3707static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3708{
3709 struct e1000_adapter *adapter = netdev_priv(netdev);
3710
3711 /* only return the current stats */
3712 return &adapter->net_stats;
3713}
3714
3715/**
3716 * e1000_change_mtu - Change the Maximum Transfer Unit
3717 * @netdev: network interface device structure
3718 * @new_mtu: new value for maximum frame size
3719 *
3720 * Returns 0 on success, negative on failure
3721 **/
3722static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3723{
3724 struct e1000_adapter *adapter = netdev_priv(netdev);
3725 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3726
d53f706d 3727 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
bc7f75fa 3728 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 3729 e_err("Invalid MTU setting\n");
bc7f75fa
AK
3730 return -EINVAL;
3731 }
3732
3733 /* Jumbo frame size limits */
3734 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
3735 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 3736 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
3737 return -EINVAL;
3738 }
3739 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 3740 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
3741 return -EINVAL;
3742 }
3743 }
3744
3745#define MAX_STD_JUMBO_FRAME_SIZE 9234
3746 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 3747 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK
3748 return -EINVAL;
3749 }
3750
3751 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3752 msleep(1);
3753 /* e1000e_down has a dependency on max_frame_size */
318a94d6 3754 adapter->max_frame_size = max_frame;
bc7f75fa
AK
3755 if (netif_running(netdev))
3756 e1000e_down(adapter);
3757
ad68076e
BA
3758 /*
3759 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
3760 * means we reserve 2 more, this pushes us to allocate from the next
3761 * larger slab size.
ad68076e 3762 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
3763 * However with the new *_jumbo_rx* routines, jumbo receives will use
3764 * fragmented skbs
ad68076e 3765 */
bc7f75fa
AK
3766
3767 if (max_frame <= 256)
3768 adapter->rx_buffer_len = 256;
3769 else if (max_frame <= 512)
3770 adapter->rx_buffer_len = 512;
3771 else if (max_frame <= 1024)
3772 adapter->rx_buffer_len = 1024;
3773 else if (max_frame <= 2048)
3774 adapter->rx_buffer_len = 2048;
3775 else
3776 adapter->rx_buffer_len = 4096;
3777
3778 /* adjust allocation if LPE protects us, and we aren't using SBP */
3779 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3780 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
3781 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 3782 + ETH_FCS_LEN;
bc7f75fa 3783
44defeb3 3784 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK
3785 netdev->mtu = new_mtu;
3786
3787 if (netif_running(netdev))
3788 e1000e_up(adapter);
3789 else
3790 e1000e_reset(adapter);
3791
3792 clear_bit(__E1000_RESETTING, &adapter->state);
3793
3794 return 0;
3795}
3796
3797static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
3798 int cmd)
3799{
3800 struct e1000_adapter *adapter = netdev_priv(netdev);
3801 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 3802
318a94d6 3803 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
3804 return -EOPNOTSUPP;
3805
3806 switch (cmd) {
3807 case SIOCGMIIPHY:
3808 data->phy_id = adapter->hw.phy.addr;
3809 break;
3810 case SIOCGMIIREG:
3811 if (!capable(CAP_NET_ADMIN))
3812 return -EPERM;
7c25769f
BA
3813 switch (data->reg_num & 0x1F) {
3814 case MII_BMCR:
3815 data->val_out = adapter->phy_regs.bmcr;
3816 break;
3817 case MII_BMSR:
3818 data->val_out = adapter->phy_regs.bmsr;
3819 break;
3820 case MII_PHYSID1:
3821 data->val_out = (adapter->hw.phy.id >> 16);
3822 break;
3823 case MII_PHYSID2:
3824 data->val_out = (adapter->hw.phy.id & 0xFFFF);
3825 break;
3826 case MII_ADVERTISE:
3827 data->val_out = adapter->phy_regs.advertise;
3828 break;
3829 case MII_LPA:
3830 data->val_out = adapter->phy_regs.lpa;
3831 break;
3832 case MII_EXPANSION:
3833 data->val_out = adapter->phy_regs.expansion;
3834 break;
3835 case MII_CTRL1000:
3836 data->val_out = adapter->phy_regs.ctrl1000;
3837 break;
3838 case MII_STAT1000:
3839 data->val_out = adapter->phy_regs.stat1000;
3840 break;
3841 case MII_ESTATUS:
3842 data->val_out = adapter->phy_regs.estatus;
3843 break;
3844 default:
bc7f75fa
AK
3845 return -EIO;
3846 }
bc7f75fa
AK
3847 break;
3848 case SIOCSMIIREG:
3849 default:
3850 return -EOPNOTSUPP;
3851 }
3852 return 0;
3853}
3854
3855static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
3856{
3857 switch (cmd) {
3858 case SIOCGMIIPHY:
3859 case SIOCGMIIREG:
3860 case SIOCSMIIREG:
3861 return e1000_mii_ioctl(netdev, ifr, cmd);
3862 default:
3863 return -EOPNOTSUPP;
3864 }
3865}
3866
3867static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
3868{
3869 struct net_device *netdev = pci_get_drvdata(pdev);
3870 struct e1000_adapter *adapter = netdev_priv(netdev);
3871 struct e1000_hw *hw = &adapter->hw;
3872 u32 ctrl, ctrl_ext, rctl, status;
3873 u32 wufc = adapter->wol;
3874 int retval = 0;
3875
3876 netif_device_detach(netdev);
3877
3878 if (netif_running(netdev)) {
3879 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3880 e1000e_down(adapter);
3881 e1000_free_irq(adapter);
3882 }
3883
3884 retval = pci_save_state(pdev);
3885 if (retval)
3886 return retval;
3887
3888 status = er32(STATUS);
3889 if (status & E1000_STATUS_LU)
3890 wufc &= ~E1000_WUFC_LNKC;
3891
3892 if (wufc) {
3893 e1000_setup_rctl(adapter);
3894 e1000_set_multi(netdev);
3895
3896 /* turn on all-multi mode if wake on multicast is enabled */
3897 if (wufc & E1000_WUFC_MC) {
3898 rctl = er32(RCTL);
3899 rctl |= E1000_RCTL_MPE;
3900 ew32(RCTL, rctl);
3901 }
3902
3903 ctrl = er32(CTRL);
3904 /* advertise wake from D3Cold */
3905 #define E1000_CTRL_ADVD3WUC 0x00100000
3906 /* phy power management enable */
3907 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
3908 ctrl |= E1000_CTRL_ADVD3WUC |
3909 E1000_CTRL_EN_PHY_PWR_MGMT;
3910 ew32(CTRL, ctrl);
3911
318a94d6
JK
3912 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
3913 adapter->hw.phy.media_type ==
3914 e1000_media_type_internal_serdes) {
bc7f75fa
AK
3915 /* keep the laser running in D3 */
3916 ctrl_ext = er32(CTRL_EXT);
3917 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
3918 ew32(CTRL_EXT, ctrl_ext);
3919 }
3920
97ac8cae
BA
3921 if (adapter->flags & FLAG_IS_ICH)
3922 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
3923
bc7f75fa
AK
3924 /* Allow time for pending master requests to run */
3925 e1000e_disable_pcie_master(&adapter->hw);
3926
3927 ew32(WUC, E1000_WUC_PME_EN);
3928 ew32(WUFC, wufc);
3929 pci_enable_wake(pdev, PCI_D3hot, 1);
3930 pci_enable_wake(pdev, PCI_D3cold, 1);
3931 } else {
3932 ew32(WUC, 0);
3933 ew32(WUFC, 0);
3934 pci_enable_wake(pdev, PCI_D3hot, 0);
3935 pci_enable_wake(pdev, PCI_D3cold, 0);
3936 }
3937
bc7f75fa
AK
3938 /* make sure adapter isn't asleep if manageability is enabled */
3939 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
3940 pci_enable_wake(pdev, PCI_D3hot, 1);
3941 pci_enable_wake(pdev, PCI_D3cold, 1);
3942 }
3943
3944 if (adapter->hw.phy.type == e1000_phy_igp_3)
3945 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
3946
ad68076e
BA
3947 /*
3948 * Release control of h/w to f/w. If f/w is AMT enabled, this
3949 * would have already happened in close and is redundant.
3950 */
bc7f75fa
AK
3951 e1000_release_hw_control(adapter);
3952
3953 pci_disable_device(pdev);
3954
3955 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3956
3957 return 0;
3958}
3959
1eae4eb2
AK
3960static void e1000e_disable_l1aspm(struct pci_dev *pdev)
3961{
3962 int pos;
1eae4eb2
AK
3963 u16 val;
3964
3965 /*
3966 * 82573 workaround - disable L1 ASPM on mobile chipsets
3967 *
3968 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
3969 * resulting in lost data or garbage information on the pci-e link
3970 * level. This could result in (false) bad EEPROM checksum errors,
3971 * long ping times (up to 2s) or even a system freeze/hang.
3972 *
3973 * Unfortunately this feature saves about 1W power consumption when
3974 * active.
3975 */
3976 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK
3977 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
3978 if (val & 0x2) {
3979 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
3980 val &= ~0x2;
3981 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
3982 }
3983}
3984
bc7f75fa
AK
3985#ifdef CONFIG_PM
3986static int e1000_resume(struct pci_dev *pdev)
3987{
3988 struct net_device *netdev = pci_get_drvdata(pdev);
3989 struct e1000_adapter *adapter = netdev_priv(netdev);
3990 struct e1000_hw *hw = &adapter->hw;
3991 u32 err;
3992
3993 pci_set_power_state(pdev, PCI_D0);
3994 pci_restore_state(pdev);
1eae4eb2 3995 e1000e_disable_l1aspm(pdev);
6e4f6f6b 3996
f0f422e5 3997 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
3998 if (err) {
3999 dev_err(&pdev->dev,
4000 "Cannot enable PCI device from suspend\n");
4001 return err;
4002 }
4003
4004 pci_set_master(pdev);
4005
4006 pci_enable_wake(pdev, PCI_D3hot, 0);
4007 pci_enable_wake(pdev, PCI_D3cold, 0);
4008
4009 if (netif_running(netdev)) {
4010 err = e1000_request_irq(adapter);
4011 if (err)
4012 return err;
4013 }
4014
4015 e1000e_power_up_phy(adapter);
4016 e1000e_reset(adapter);
4017 ew32(WUS, ~0);
4018
4019 e1000_init_manageability(adapter);
4020
4021 if (netif_running(netdev))
4022 e1000e_up(adapter);
4023
4024 netif_device_attach(netdev);
4025
ad68076e
BA
4026 /*
4027 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4028 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4029 * under the control of the driver.
4030 */
c43bc57e 4031 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4032 e1000_get_hw_control(adapter);
4033
4034 return 0;
4035}
4036#endif
4037
4038static void e1000_shutdown(struct pci_dev *pdev)
4039{
4040 e1000_suspend(pdev, PMSG_SUSPEND);
4041}
4042
4043#ifdef CONFIG_NET_POLL_CONTROLLER
4044/*
4045 * Polling 'interrupt' - used by things like netconsole to send skbs
4046 * without having to re-enable interrupts. It's not called while
4047 * the interrupt routine is executing.
4048 */
4049static void e1000_netpoll(struct net_device *netdev)
4050{
4051 struct e1000_adapter *adapter = netdev_priv(netdev);
4052
4053 disable_irq(adapter->pdev->irq);
4054 e1000_intr(adapter->pdev->irq, netdev);
4055
bc7f75fa
AK
4056 enable_irq(adapter->pdev->irq);
4057}
4058#endif
4059
4060/**
4061 * e1000_io_error_detected - called when PCI error is detected
4062 * @pdev: Pointer to PCI device
4063 * @state: The current pci connection state
4064 *
4065 * This function is called after a PCI bus error affecting
4066 * this device has been detected.
4067 */
4068static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4069 pci_channel_state_t state)
4070{
4071 struct net_device *netdev = pci_get_drvdata(pdev);
4072 struct e1000_adapter *adapter = netdev_priv(netdev);
4073
4074 netif_device_detach(netdev);
4075
4076 if (netif_running(netdev))
4077 e1000e_down(adapter);
4078 pci_disable_device(pdev);
4079
4080 /* Request a slot slot reset. */
4081 return PCI_ERS_RESULT_NEED_RESET;
4082}
4083
4084/**
4085 * e1000_io_slot_reset - called after the pci bus has been reset.
4086 * @pdev: Pointer to PCI device
4087 *
4088 * Restart the card from scratch, as if from a cold-boot. Implementation
4089 * resembles the first-half of the e1000_resume routine.
4090 */
4091static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4092{
4093 struct net_device *netdev = pci_get_drvdata(pdev);
4094 struct e1000_adapter *adapter = netdev_priv(netdev);
4095 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4096 int err;
bc7f75fa 4097
1eae4eb2 4098 e1000e_disable_l1aspm(pdev);
f0f422e5 4099 err = pci_enable_device_mem(pdev);
6e4f6f6b 4100 if (err) {
bc7f75fa
AK
4101 dev_err(&pdev->dev,
4102 "Cannot re-enable PCI device after reset.\n");
4103 return PCI_ERS_RESULT_DISCONNECT;
4104 }
4105 pci_set_master(pdev);
aad32739 4106 pci_restore_state(pdev);
bc7f75fa
AK
4107
4108 pci_enable_wake(pdev, PCI_D3hot, 0);
4109 pci_enable_wake(pdev, PCI_D3cold, 0);
4110
4111 e1000e_reset(adapter);
4112 ew32(WUS, ~0);
4113
4114 return PCI_ERS_RESULT_RECOVERED;
4115}
4116
4117/**
4118 * e1000_io_resume - called when traffic can start flowing again.
4119 * @pdev: Pointer to PCI device
4120 *
4121 * This callback is called when the error recovery driver tells us that
4122 * its OK to resume normal operation. Implementation resembles the
4123 * second-half of the e1000_resume routine.
4124 */
4125static void e1000_io_resume(struct pci_dev *pdev)
4126{
4127 struct net_device *netdev = pci_get_drvdata(pdev);
4128 struct e1000_adapter *adapter = netdev_priv(netdev);
4129
4130 e1000_init_manageability(adapter);
4131
4132 if (netif_running(netdev)) {
4133 if (e1000e_up(adapter)) {
4134 dev_err(&pdev->dev,
4135 "can't bring device back up after reset\n");
4136 return;
4137 }
4138 }
4139
4140 netif_device_attach(netdev);
4141
ad68076e
BA
4142 /*
4143 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4144 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4145 * under the control of the driver.
4146 */
c43bc57e 4147 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4148 e1000_get_hw_control(adapter);
4149
4150}
4151
4152static void e1000_print_device_info(struct e1000_adapter *adapter)
4153{
4154 struct e1000_hw *hw = &adapter->hw;
4155 struct net_device *netdev = adapter->netdev;
69e3fd8c 4156 u32 pba_num;
bc7f75fa
AK
4157
4158 /* print bus type/speed/width info */
44defeb3
JK
4159 e_info("(PCI Express:2.5GB/s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
4160 /* bus width */
4161 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4162 "Width x1"),
4163 /* MAC address */
4164 netdev->dev_addr[0], netdev->dev_addr[1],
4165 netdev->dev_addr[2], netdev->dev_addr[3],
4166 netdev->dev_addr[4], netdev->dev_addr[5]);
4167 e_info("Intel(R) PRO/%s Network Connection\n",
4168 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4169 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
4170 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4171 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
4172}
4173
10aa4c04
AK
4174static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4175{
4176 struct e1000_hw *hw = &adapter->hw;
4177 int ret_val;
4178 u16 buf = 0;
4179
4180 if (hw->mac.type != e1000_82573)
4181 return;
4182
4183 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
4184 if (!(le16_to_cpu(buf) & (1 << 0))) {
4185 /* Deep Smart Power Down (DSPD) */
4186 e_warn("Warning: detected DSPD enabled in EEPROM\n");
4187 }
4188
4189 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
4190 if (le16_to_cpu(buf) & (3 << 2)) {
4191 /* ASPM enable */
4192 e_warn("Warning: detected ASPM enabled in EEPROM\n");
4193 }
4194}
4195
bc7f75fa
AK
4196/**
4197 * e1000_probe - Device Initialization Routine
4198 * @pdev: PCI device information struct
4199 * @ent: entry in e1000_pci_tbl
4200 *
4201 * Returns 0 on success, negative on failure
4202 *
4203 * e1000_probe initializes an adapter identified by a pci_dev structure.
4204 * The OS initialization, configuring of the adapter private structure,
4205 * and a hardware reset occur.
4206 **/
4207static int __devinit e1000_probe(struct pci_dev *pdev,
4208 const struct pci_device_id *ent)
4209{
4210 struct net_device *netdev;
4211 struct e1000_adapter *adapter;
4212 struct e1000_hw *hw;
4213 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
4214 resource_size_t mmio_start, mmio_len;
4215 resource_size_t flash_start, flash_len;
bc7f75fa
AK
4216
4217 static int cards_found;
4218 int i, err, pci_using_dac;
4219 u16 eeprom_data = 0;
4220 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4221
1eae4eb2 4222 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4223
f0f422e5 4224 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
4225 if (err)
4226 return err;
4227
4228 pci_using_dac = 0;
4229 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
4230 if (!err) {
4231 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4232 if (!err)
4233 pci_using_dac = 1;
4234 } else {
4235 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4236 if (err) {
4237 err = pci_set_consistent_dma_mask(pdev,
4238 DMA_32BIT_MASK);
4239 if (err) {
4240 dev_err(&pdev->dev, "No usable DMA "
4241 "configuration, aborting\n");
4242 goto err_dma;
4243 }
4244 }
4245 }
4246
f0f422e5
BA
4247 err = pci_request_selected_regions(pdev,
4248 pci_select_bars(pdev, IORESOURCE_MEM),
4249 e1000e_driver_name);
bc7f75fa
AK
4250 if (err)
4251 goto err_pci_reg;
4252
4253 pci_set_master(pdev);
aad32739 4254 pci_save_state(pdev);
bc7f75fa
AK
4255
4256 err = -ENOMEM;
4257 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4258 if (!netdev)
4259 goto err_alloc_etherdev;
4260
bc7f75fa
AK
4261 SET_NETDEV_DEV(netdev, &pdev->dev);
4262
4263 pci_set_drvdata(pdev, netdev);
4264 adapter = netdev_priv(netdev);
4265 hw = &adapter->hw;
4266 adapter->netdev = netdev;
4267 adapter->pdev = pdev;
4268 adapter->ei = ei;
4269 adapter->pba = ei->pba;
4270 adapter->flags = ei->flags;
4271 adapter->hw.adapter = adapter;
4272 adapter->hw.mac.type = ei->mac;
4273 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4274
4275 mmio_start = pci_resource_start(pdev, 0);
4276 mmio_len = pci_resource_len(pdev, 0);
4277
4278 err = -EIO;
4279 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4280 if (!adapter->hw.hw_addr)
4281 goto err_ioremap;
4282
4283 if ((adapter->flags & FLAG_HAS_FLASH) &&
4284 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4285 flash_start = pci_resource_start(pdev, 1);
4286 flash_len = pci_resource_len(pdev, 1);
4287 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4288 if (!adapter->hw.flash_address)
4289 goto err_flashmap;
4290 }
4291
4292 /* construct the net_device struct */
4293 netdev->open = &e1000_open;
4294 netdev->stop = &e1000_close;
4295 netdev->hard_start_xmit = &e1000_xmit_frame;
4296 netdev->get_stats = &e1000_get_stats;
4297 netdev->set_multicast_list = &e1000_set_multi;
4298 netdev->set_mac_address = &e1000_set_mac;
4299 netdev->change_mtu = &e1000_change_mtu;
4300 netdev->do_ioctl = &e1000_ioctl;
4301 e1000e_set_ethtool_ops(netdev);
4302 netdev->tx_timeout = &e1000_tx_timeout;
4303 netdev->watchdog_timeo = 5 * HZ;
4304 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
4305 netdev->vlan_rx_register = e1000_vlan_rx_register;
4306 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
4307 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
4308#ifdef CONFIG_NET_POLL_CONTROLLER
4309 netdev->poll_controller = e1000_netpoll;
4310#endif
4311 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4312
4313 netdev->mem_start = mmio_start;
4314 netdev->mem_end = mmio_start + mmio_len;
4315
4316 adapter->bd_number = cards_found++;
4317
4318 /* setup adapter struct */
4319 err = e1000_sw_init(adapter);
4320 if (err)
4321 goto err_sw_init;
4322
4323 err = -EIO;
4324
4325 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4326 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4327 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4328
69e3fd8c 4329 err = ei->get_variants(adapter);
bc7f75fa
AK
4330 if (err)
4331 goto err_hw_init;
4332
4333 hw->mac.ops.get_bus_info(&adapter->hw);
4334
318a94d6 4335 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
4336
4337 /* Copper options */
318a94d6 4338 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
4339 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4340 adapter->hw.phy.disable_polarity_correction = 0;
4341 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4342 }
4343
4344 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4345 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
4346
4347 netdev->features = NETIF_F_SG |
4348 NETIF_F_HW_CSUM |
4349 NETIF_F_HW_VLAN_TX |
4350 NETIF_F_HW_VLAN_RX;
4351
4352 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4353 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4354
4355 netdev->features |= NETIF_F_TSO;
4356 netdev->features |= NETIF_F_TSO6;
4357
a5136e23
JK
4358 netdev->vlan_features |= NETIF_F_TSO;
4359 netdev->vlan_features |= NETIF_F_TSO6;
4360 netdev->vlan_features |= NETIF_F_HW_CSUM;
4361 netdev->vlan_features |= NETIF_F_SG;
4362
bc7f75fa
AK
4363 if (pci_using_dac)
4364 netdev->features |= NETIF_F_HIGHDMA;
4365
ad68076e
BA
4366 /*
4367 * We should not be using LLTX anymore, but we are still Tx faster with
4368 * it.
4369 */
bc7f75fa
AK
4370 netdev->features |= NETIF_F_LLTX;
4371
4372 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4373 adapter->flags |= FLAG_MNG_PT_ENABLED;
4374
ad68076e
BA
4375 /*
4376 * before reading the NVM, reset the controller to
4377 * put the device in a known good starting state
4378 */
bc7f75fa
AK
4379 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4380
4381 /*
4382 * systems with ASPM and others may see the checksum fail on the first
4383 * attempt. Let's give it a few tries
4384 */
4385 for (i = 0;; i++) {
4386 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4387 break;
4388 if (i == 2) {
44defeb3 4389 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
4390 err = -EIO;
4391 goto err_eeprom;
4392 }
4393 }
4394
10aa4c04
AK
4395 e1000_eeprom_checks(adapter);
4396
bc7f75fa
AK
4397 /* copy the MAC address out of the NVM */
4398 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4399 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
4400
4401 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4402 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4403
4404 if (!is_valid_ether_addr(netdev->perm_addr)) {
44defeb3
JK
4405 e_err("Invalid MAC Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
4406 netdev->perm_addr[0], netdev->perm_addr[1],
4407 netdev->perm_addr[2], netdev->perm_addr[3],
4408 netdev->perm_addr[4], netdev->perm_addr[5]);
bc7f75fa
AK
4409 err = -EIO;
4410 goto err_eeprom;
4411 }
4412
4413 init_timer(&adapter->watchdog_timer);
4414 adapter->watchdog_timer.function = &e1000_watchdog;
4415 adapter->watchdog_timer.data = (unsigned long) adapter;
4416
4417 init_timer(&adapter->phy_info_timer);
4418 adapter->phy_info_timer.function = &e1000_update_phy_info;
4419 adapter->phy_info_timer.data = (unsigned long) adapter;
4420
4421 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4422 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
4423
4424 e1000e_check_options(adapter);
4425
4426 /* Initialize link parameters. User can change them with ethtool */
4427 adapter->hw.mac.autoneg = 1;
309af40b 4428 adapter->fc_autoneg = 1;
318a94d6
JK
4429 adapter->hw.fc.original_type = e1000_fc_default;
4430 adapter->hw.fc.type = e1000_fc_default;
bc7f75fa
AK
4431 adapter->hw.phy.autoneg_advertised = 0x2f;
4432
4433 /* ring size defaults */
4434 adapter->rx_ring->count = 256;
4435 adapter->tx_ring->count = 256;
4436
4437 /*
4438 * Initial Wake on LAN setting - If APM wake is enabled in
4439 * the EEPROM, enable the ACPI Magic Packet filter
4440 */
4441 if (adapter->flags & FLAG_APME_IN_WUC) {
4442 /* APME bit in EEPROM is mapped to WUC.APME */
4443 eeprom_data = er32(WUC);
4444 eeprom_apme_mask = E1000_WUC_APME;
4445 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4446 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4447 (adapter->hw.bus.func == 1))
4448 e1000_read_nvm(&adapter->hw,
4449 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4450 else
4451 e1000_read_nvm(&adapter->hw,
4452 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4453 }
4454
4455 /* fetch WoL from EEPROM */
4456 if (eeprom_data & eeprom_apme_mask)
4457 adapter->eeprom_wol |= E1000_WUFC_MAG;
4458
4459 /*
4460 * now that we have the eeprom settings, apply the special cases
4461 * where the eeprom may be wrong or the board simply won't support
4462 * wake on lan on a particular port
4463 */
4464 if (!(adapter->flags & FLAG_HAS_WOL))
4465 adapter->eeprom_wol = 0;
4466
4467 /* initialize the wol settings based on the eeprom settings */
4468 adapter->wol = adapter->eeprom_wol;
4469
4470 /* reset the hardware with the new settings */
4471 e1000e_reset(adapter);
4472
ad68076e
BA
4473 /*
4474 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4475 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
4476 * under the control of the driver.
4477 */
c43bc57e 4478 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
4479 e1000_get_hw_control(adapter);
4480
4481 /* tell the stack to leave us alone until e1000_open() is called */
4482 netif_carrier_off(netdev);
d55b53ff 4483 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK
4484
4485 strcpy(netdev->name, "eth%d");
4486 err = register_netdev(netdev);
4487 if (err)
4488 goto err_register;
4489
4490 e1000_print_device_info(adapter);
4491
4492 return 0;
4493
4494err_register:
c43bc57e
JB
4495 if (!(adapter->flags & FLAG_HAS_AMT))
4496 e1000_release_hw_control(adapter);
bc7f75fa
AK
4497err_eeprom:
4498 if (!e1000_check_reset_block(&adapter->hw))
4499 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 4500err_hw_init:
bc7f75fa 4501
bc7f75fa
AK
4502 kfree(adapter->tx_ring);
4503 kfree(adapter->rx_ring);
4504err_sw_init:
c43bc57e
JB
4505 if (adapter->hw.flash_address)
4506 iounmap(adapter->hw.flash_address);
4507err_flashmap:
bc7f75fa
AK
4508 iounmap(adapter->hw.hw_addr);
4509err_ioremap:
4510 free_netdev(netdev);
4511err_alloc_etherdev:
f0f422e5
BA
4512 pci_release_selected_regions(pdev,
4513 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
4514err_pci_reg:
4515err_dma:
4516 pci_disable_device(pdev);
4517 return err;
4518}
4519
4520/**
4521 * e1000_remove - Device Removal Routine
4522 * @pdev: PCI device information struct
4523 *
4524 * e1000_remove is called by the PCI subsystem to alert the driver
4525 * that it should release a PCI device. The could be caused by a
4526 * Hot-Plug event, or because the driver is going to be removed from
4527 * memory.
4528 **/
4529static void __devexit e1000_remove(struct pci_dev *pdev)
4530{
4531 struct net_device *netdev = pci_get_drvdata(pdev);
4532 struct e1000_adapter *adapter = netdev_priv(netdev);
4533
ad68076e
BA
4534 /*
4535 * flush_scheduled work may reschedule our watchdog task, so
4536 * explicitly disable watchdog tasks from being rescheduled
4537 */
bc7f75fa
AK
4538 set_bit(__E1000_DOWN, &adapter->state);
4539 del_timer_sync(&adapter->watchdog_timer);
4540 del_timer_sync(&adapter->phy_info_timer);
4541
4542 flush_scheduled_work();
4543
ad68076e
BA
4544 /*
4545 * Release control of h/w to f/w. If f/w is AMT enabled, this
4546 * would have already happened in close and is redundant.
4547 */
bc7f75fa
AK
4548 e1000_release_hw_control(adapter);
4549
4550 unregister_netdev(netdev);
4551
4552 if (!e1000_check_reset_block(&adapter->hw))
4553 e1000_phy_hw_reset(&adapter->hw);
4554
4555 kfree(adapter->tx_ring);
4556 kfree(adapter->rx_ring);
4557
4558 iounmap(adapter->hw.hw_addr);
4559 if (adapter->hw.flash_address)
4560 iounmap(adapter->hw.flash_address);
f0f422e5
BA
4561 pci_release_selected_regions(pdev,
4562 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
4563
4564 free_netdev(netdev);
4565
4566 pci_disable_device(pdev);
4567}
4568
4569/* PCI Error Recovery (ERS) */
4570static struct pci_error_handlers e1000_err_handler = {
4571 .error_detected = e1000_io_error_detected,
4572 .slot_reset = e1000_io_slot_reset,
4573 .resume = e1000_io_resume,
4574};
4575
4576static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK
4577 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
4578 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
4579 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
4580 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
4581 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
4582 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
4583 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
4584 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
4585 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 4586
bc7f75fa
AK
4587 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
4588 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
4589 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
4590 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 4591
bc7f75fa
AK
4592 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
4593 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
4594 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 4595
bc7f75fa
AK
4596 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
4597 board_80003es2lan },
4598 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
4599 board_80003es2lan },
4600 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
4601 board_80003es2lan },
4602 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
4603 board_80003es2lan },
ad68076e 4604
bc7f75fa
AK
4605 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
4606 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
4607 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
4608 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
4609 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
4610 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
4611 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 4612
bc7f75fa
AK
4613 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
4614 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
4615 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4616 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4617 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
97ac8cae
BA
4618 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4619 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4620 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
4621
4622 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
4623 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4624 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa
AK
4625
4626 { } /* terminate list */
4627};
4628MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
4629
4630/* PCI Device API Driver */
4631static struct pci_driver e1000_driver = {
4632 .name = e1000e_driver_name,
4633 .id_table = e1000_pci_tbl,
4634 .probe = e1000_probe,
4635 .remove = __devexit_p(e1000_remove),
4636#ifdef CONFIG_PM
ad68076e 4637 /* Power Management Hooks */
bc7f75fa
AK
4638 .suspend = e1000_suspend,
4639 .resume = e1000_resume,
4640#endif
4641 .shutdown = e1000_shutdown,
4642 .err_handler = &e1000_err_handler
4643};
4644
4645/**
4646 * e1000_init_module - Driver Registration Routine
4647 *
4648 * e1000_init_module is the first routine called when the driver is
4649 * loaded. All it does is register with the PCI subsystem.
4650 **/
4651static int __init e1000_init_module(void)
4652{
4653 int ret;
4654 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
4655 e1000e_driver_name, e1000e_driver_version);
ad68076e 4656 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK
4657 e1000e_driver_name);
4658 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA
4659 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
4660 PM_QOS_DEFAULT_VALUE);
4661
bc7f75fa
AK
4662 return ret;
4663}
4664module_init(e1000_init_module);
4665
4666/**
4667 * e1000_exit_module - Driver Exit Cleanup Routine
4668 *
4669 * e1000_exit_module is called just before the driver is removed
4670 * from memory.
4671 **/
4672static void __exit e1000_exit_module(void)
4673{
4674 pci_unregister_driver(&e1000_driver);
97ac8cae 4675 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK
4676}
4677module_exit(e1000_exit_module);
4678
4679
4680MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
4681MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
4682MODULE_LICENSE("GPL");
4683MODULE_VERSION(DRV_VERSION);
4684
4685/* e1000_main.c */
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