projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
e1000e: add support for 82567LM-3 and 82567LF-3 (ICH10D) parts
[deliverable/linux.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
bc7f75fa
AK		 47
48#include "e1000.h"
49
97ac8cae 50#define DRV_VERSION "0.3.3.3-k2"
bc7f75fa
AK		 51char e1000e_driver_name[] = "e1000e";
52const char e1000e_driver_version[] = DRV_VERSION;
53
54static const struct e1000_info *e1000_info_tbl[] = {
55 [board_82571] = &e1000_82571_info,
56 [board_82572] = &e1000_82572_info,
57 [board_82573] = &e1000_82573_info,
58 [board_80003es2lan] = &e1000_es2_info,
59 [board_ich8lan] = &e1000_ich8_info,
60 [board_ich9lan] = &e1000_ich9_info,
f4187b56 61 [board_ich10lan] = &e1000_ich10_info,
bc7f75fa
AK		 62};
63
64#ifdef DEBUG
65/**
66 * e1000_get_hw_dev_name - return device name string
67 * used by hardware layer to print debugging information
68 **/
69char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
70{
589c085f 71 return hw->adapter->netdev->name;
bc7f75fa
AK		 72}
73#endif
74
75/**
76 * e1000_desc_unused - calculate if we have unused descriptors
77 **/
78static int e1000_desc_unused(struct e1000_ring *ring)
79{
80 if (ring->next_to_clean > ring->next_to_use)
81 return ring->next_to_clean - ring->next_to_use - 1;
82
83 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
84}
85
86/**
ad68076e 87 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 88 * @adapter: board private structure
89 * @status: descriptor status field as written by hardware
90 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
91 * @skb: pointer to sk_buff to be indicated to stack
92 **/
93static void e1000_receive_skb(struct e1000_adapter *adapter,
94 struct net_device *netdev,
95 struct sk_buff *skb,
a39fe742 96 u8 status, __le16 vlan)
bc7f75fa
AK		 97{
98 skb->protocol = eth_type_trans(skb, netdev);
99
100 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
101 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 102 le16_to_cpu(vlan));
bc7f75fa
AK		 103 else
104 netif_receive_skb(skb);
105
106 netdev->last_rx = jiffies;
107}
108
109/**
110 * e1000_rx_checksum - Receive Checksum Offload for 82543
111 * @adapter: board private structure
112 * @status_err: receive descriptor status and error fields
113 * @csum: receive descriptor csum field
114 * @sk_buff: socket buffer with received data
115 **/
116static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
117 u32 csum, struct sk_buff *skb)
118{
119 u16 status = (u16)status_err;
120 u8 errors = (u8)(status_err >> 24);
121 skb->ip_summed = CHECKSUM_NONE;
122
123 /* Ignore Checksum bit is set */
124 if (status & E1000_RXD_STAT_IXSM)
125 return;
126 /* TCP/UDP checksum error bit is set */
127 if (errors & E1000_RXD_ERR_TCPE) {
128 /* let the stack verify checksum errors */
129 adapter->hw_csum_err++;
130 return;
131 }
132
133 /* TCP/UDP Checksum has not been calculated */
134 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
135 return;
136
137 /* It must be a TCP or UDP packet with a valid checksum */
138 if (status & E1000_RXD_STAT_TCPCS) {
139 /* TCP checksum is good */
140 skb->ip_summed = CHECKSUM_UNNECESSARY;
141 } else {
ad68076e
BA		 142 /*
143 * IP fragment with UDP payload
144 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 145 * and then put the value in host order for further stack use.
146 */
a39fe742
AV		 147 __sum16 sum = (__force __sum16)htons(csum);
148 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 149 skb->ip_summed = CHECKSUM_COMPLETE;
150 }
151 adapter->hw_csum_good++;
152}
153
154/**
155 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
156 * @adapter: address of board private structure
157 **/
158static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
159 int cleaned_count)
160{
161 struct net_device *netdev = adapter->netdev;
162 struct pci_dev *pdev = adapter->pdev;
163 struct e1000_ring *rx_ring = adapter->rx_ring;
164 struct e1000_rx_desc *rx_desc;
165 struct e1000_buffer *buffer_info;
166 struct sk_buff *skb;
167 unsigned int i;
168 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
169
170 i = rx_ring->next_to_use;
171 buffer_info = &rx_ring->buffer_info[i];
172
173 while (cleaned_count--) {
174 skb = buffer_info->skb;
175 if (skb) {
176 skb_trim(skb, 0);
177 goto map_skb;
178 }
179
180 skb = netdev_alloc_skb(netdev, bufsz);
181 if (!skb) {
182 /* Better luck next round */
183 adapter->alloc_rx_buff_failed++;
184 break;
185 }
186
ad68076e
BA		 187 /*
188 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 189 * this will result in a 16 byte aligned IP header after
190 * the 14 byte MAC header is removed
191 */
192 skb_reserve(skb, NET_IP_ALIGN);
193
194 buffer_info->skb = skb;
195map_skb:
196 buffer_info->dma = pci_map_single(pdev, skb->data,
197 adapter->rx_buffer_len,
198 PCI_DMA_FROMDEVICE);
8d8bb39b 199 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 200 dev_err(&pdev->dev, "RX DMA map failed\n");
201 adapter->rx_dma_failed++;
202 break;
203 }
204
205 rx_desc = E1000_RX_DESC(*rx_ring, i);
206 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
207
208 i++;
209 if (i == rx_ring->count)
210 i = 0;
211 buffer_info = &rx_ring->buffer_info[i];
212 }
213
214 if (rx_ring->next_to_use != i) {
215 rx_ring->next_to_use = i;
216 if (i-- == 0)
217 i = (rx_ring->count - 1);
218
ad68076e
BA		 219 /*
220 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 221 * know there are new descriptors to fetch. (Only
222 * applicable for weak-ordered memory model archs,
ad68076e
BA		 223 * such as IA-64).
224 */
bc7f75fa
AK		 225 wmb();
226 writel(i, adapter->hw.hw_addr + rx_ring->tail);
227 }
228}
229
230/**
231 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
232 * @adapter: address of board private structure
233 **/
234static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
235 int cleaned_count)
236{
237 struct net_device *netdev = adapter->netdev;
238 struct pci_dev *pdev = adapter->pdev;
239 union e1000_rx_desc_packet_split *rx_desc;
240 struct e1000_ring *rx_ring = adapter->rx_ring;
241 struct e1000_buffer *buffer_info;
242 struct e1000_ps_page *ps_page;
243 struct sk_buff *skb;
244 unsigned int i, j;
245
246 i = rx_ring->next_to_use;
247 buffer_info = &rx_ring->buffer_info[i];
248
249 while (cleaned_count--) {
250 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
251
252 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 253 ps_page = &buffer_info->ps_pages[j];
254 if (j >= adapter->rx_ps_pages) {
255 /* all unused desc entries get hw null ptr */
a39fe742 256 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 257 continue;
258 }
259 if (!ps_page->page) {
260 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 261 if (!ps_page->page) {
47f44e40
AK		 262 adapter->alloc_rx_buff_failed++;
263 goto no_buffers;
264 }
265 ps_page->dma = pci_map_page(pdev,
266 ps_page->page,
267 0, PAGE_SIZE,
268 PCI_DMA_FROMDEVICE);
8d8bb39b 269 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 270 dev_err(&adapter->pdev->dev,
271 "RX DMA page map failed\n");
272 adapter->rx_dma_failed++;
273 goto no_buffers;
bc7f75fa 274 }
bc7f75fa 275 }
47f44e40
AK		 276 /*
277 * Refresh the desc even if buffer_addrs
278 * didn't change because each write-back
279 * erases this info.
280 */
281 rx_desc->read.buffer_addr[j+1] =
282 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 283 }
284
285 skb = netdev_alloc_skb(netdev,
286 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
287
288 if (!skb) {
289 adapter->alloc_rx_buff_failed++;
290 break;
291 }
292
ad68076e
BA		 293 /*
294 * Make buffer alignment 2 beyond a 16 byte boundary
bc7f75fa
AK		 295 * this will result in a 16 byte aligned IP header after
296 * the 14 byte MAC header is removed
297 */
298 skb_reserve(skb, NET_IP_ALIGN);
299
300 buffer_info->skb = skb;
301 buffer_info->dma = pci_map_single(pdev, skb->data,
302 adapter->rx_ps_bsize0,
303 PCI_DMA_FROMDEVICE);
8d8bb39b 304 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 305 dev_err(&pdev->dev, "RX DMA map failed\n");
306 adapter->rx_dma_failed++;
307 /* cleanup skb */
308 dev_kfree_skb_any(skb);
309 buffer_info->skb = NULL;
310 break;
311 }
312
313 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
314
315 i++;
316 if (i == rx_ring->count)
317 i = 0;
318 buffer_info = &rx_ring->buffer_info[i];
319 }
320
321no_buffers:
322 if (rx_ring->next_to_use != i) {
323 rx_ring->next_to_use = i;
324
325 if (!(i--))
326 i = (rx_ring->count - 1);
327
ad68076e
BA		 328 /*
329 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 330 * know there are new descriptors to fetch. (Only
331 * applicable for weak-ordered memory model archs,
ad68076e
BA		 332 * such as IA-64).
333 */
bc7f75fa 334 wmb();
ad68076e
BA		 335 /*
336 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 337 * descriptors are 32 bytes...so we increment tail
338 * twice as much.
339 */
340 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
341 }
342}
343
97ac8cae
BA		 344/**
345 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
346 * @adapter: address of board private structure
347 * @rx_ring: pointer to receive ring structure
348 * @cleaned_count: number of buffers to allocate this pass
349 **/
350
351static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
352 int cleaned_count)
353{
354 struct net_device *netdev = adapter->netdev;
355 struct pci_dev *pdev = adapter->pdev;
356 struct e1000_rx_desc *rx_desc;
357 struct e1000_ring *rx_ring = adapter->rx_ring;
358 struct e1000_buffer *buffer_info;
359 struct sk_buff *skb;
360 unsigned int i;
361 unsigned int bufsz = 256 -
362 16 /* for skb_reserve */ -
363 NET_IP_ALIGN;
364
365 i = rx_ring->next_to_use;
366 buffer_info = &rx_ring->buffer_info[i];
367
368 while (cleaned_count--) {
369 skb = buffer_info->skb;
370 if (skb) {
371 skb_trim(skb, 0);
372 goto check_page;
373 }
374
375 skb = netdev_alloc_skb(netdev, bufsz);
376 if (unlikely(!skb)) {
377 /* Better luck next round */
378 adapter->alloc_rx_buff_failed++;
379 break;
380 }
381
382 /* Make buffer alignment 2 beyond a 16 byte boundary
383 * this will result in a 16 byte aligned IP header after
384 * the 14 byte MAC header is removed
385 */
386 skb_reserve(skb, NET_IP_ALIGN);
387
388 buffer_info->skb = skb;
389check_page:
390 /* allocate a new page if necessary */
391 if (!buffer_info->page) {
392 buffer_info->page = alloc_page(GFP_ATOMIC);
393 if (unlikely(!buffer_info->page)) {
394 adapter->alloc_rx_buff_failed++;
395 break;
396 }
397 }
398
399 if (!buffer_info->dma)
400 buffer_info->dma = pci_map_page(pdev,
401 buffer_info->page, 0,
402 PAGE_SIZE,
403 PCI_DMA_FROMDEVICE);
404
405 rx_desc = E1000_RX_DESC(*rx_ring, i);
406 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
407
408 if (unlikely(++i == rx_ring->count))
409 i = 0;
410 buffer_info = &rx_ring->buffer_info[i];
411 }
412
413 if (likely(rx_ring->next_to_use != i)) {
414 rx_ring->next_to_use = i;
415 if (unlikely(i-- == 0))
416 i = (rx_ring->count - 1);
417
418 /* Force memory writes to complete before letting h/w
419 * know there are new descriptors to fetch. (Only
420 * applicable for weak-ordered memory model archs,
421 * such as IA-64). */
422 wmb();
423 writel(i, adapter->hw.hw_addr + rx_ring->tail);
424 }
425}
426
bc7f75fa
AK		 427/**
428 * e1000_clean_rx_irq - Send received data up the network stack; legacy
429 * @adapter: board private structure
430 *
431 * the return value indicates whether actual cleaning was done, there
432 * is no guarantee that everything was cleaned
433 **/
434static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
435 int *work_done, int work_to_do)
436{
437 struct net_device *netdev = adapter->netdev;
438 struct pci_dev *pdev = adapter->pdev;
439 struct e1000_ring *rx_ring = adapter->rx_ring;
440 struct e1000_rx_desc *rx_desc, *next_rxd;
441 struct e1000_buffer *buffer_info, *next_buffer;
442 u32 length;
443 unsigned int i;
444 int cleaned_count = 0;
445 bool cleaned = 0;
446 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
447
448 i = rx_ring->next_to_clean;
449 rx_desc = E1000_RX_DESC(*rx_ring, i);
450 buffer_info = &rx_ring->buffer_info[i];
451
452 while (rx_desc->status & E1000_RXD_STAT_DD) {
453 struct sk_buff *skb;
454 u8 status;
455
456 if (*work_done >= work_to_do)
457 break;
458 (*work_done)++;
459
460 status = rx_desc->status;
461 skb = buffer_info->skb;
462 buffer_info->skb = NULL;
463
464 prefetch(skb->data - NET_IP_ALIGN);
465
466 i++;
467 if (i == rx_ring->count)
468 i = 0;
469 next_rxd = E1000_RX_DESC(*rx_ring, i);
470 prefetch(next_rxd);
471
472 next_buffer = &rx_ring->buffer_info[i];
473
474 cleaned = 1;
475 cleaned_count++;
476 pci_unmap_single(pdev,
477 buffer_info->dma,
478 adapter->rx_buffer_len,
479 PCI_DMA_FROMDEVICE);
480 buffer_info->dma = 0;
481
482 length = le16_to_cpu(rx_desc->length);
483
484 /* !EOP means multiple descriptors were used to store a single
485 * packet, also make sure the frame isn't just CRC only */
486 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
487 /* All receives must fit into a single buffer */
44defeb3
JK		 488 e_dbg("%s: Receive packet consumed multiple buffers\n",
489 netdev->name);
bc7f75fa
AK		 490 /* recycle */
491 buffer_info->skb = skb;
492 goto next_desc;
493 }
494
495 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
496 /* recycle */
497 buffer_info->skb = skb;
498 goto next_desc;
499 }
500
bc7f75fa
AK		 501 total_rx_bytes += length;
502 total_rx_packets++;
503
ad68076e
BA		 504 /*
505 * code added for copybreak, this should improve
bc7f75fa 506 * performance for small packets with large amounts
ad68076e
BA		 507 * of reassembly being done in the stack
508 */
bc7f75fa
AK		 509 if (length < copybreak) {
510 struct sk_buff *new_skb =
511 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
512 if (new_skb) {
513 skb_reserve(new_skb, NET_IP_ALIGN);
808ff676
BA		 514 skb_copy_to_linear_data_offset(new_skb,
515 -NET_IP_ALIGN,
516 (skb->data -
517 NET_IP_ALIGN),
518 (length +
519 NET_IP_ALIGN));
bc7f75fa
AK		 520 /* save the skb in buffer_info as good */
521 buffer_info->skb = skb;
522 skb = new_skb;
523 }
524 /* else just continue with the old one */
525 }
526 /* end copybreak code */
527 skb_put(skb, length);
528
529 /* Receive Checksum Offload */
530 e1000_rx_checksum(adapter,
531 (u32)(status) |
532 ((u32)(rx_desc->errors) << 24),
533 le16_to_cpu(rx_desc->csum), skb);
534
535 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
536
537next_desc:
538 rx_desc->status = 0;
539
540 /* return some buffers to hardware, one at a time is too slow */
541 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
542 adapter->alloc_rx_buf(adapter, cleaned_count);
543 cleaned_count = 0;
544 }
545
546 /* use prefetched values */
547 rx_desc = next_rxd;
548 buffer_info = next_buffer;
549 }
550 rx_ring->next_to_clean = i;
551
552 cleaned_count = e1000_desc_unused(rx_ring);
553 if (cleaned_count)
554 adapter->alloc_rx_buf(adapter, cleaned_count);
555
bc7f75fa 556 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 557 adapter->total_rx_packets += total_rx_packets;
41988692 558 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 559 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 560 return cleaned;
561}
562
bc7f75fa
AK		 563static void e1000_put_txbuf(struct e1000_adapter *adapter,
564 struct e1000_buffer *buffer_info)
565{
566 if (buffer_info->dma) {
567 pci_unmap_page(adapter->pdev, buffer_info->dma,
568 buffer_info->length, PCI_DMA_TODEVICE);
569 buffer_info->dma = 0;
570 }
571 if (buffer_info->skb) {
572 dev_kfree_skb_any(buffer_info->skb);
573 buffer_info->skb = NULL;
574 }
575}
576
577static void e1000_print_tx_hang(struct e1000_adapter *adapter)
578{
579 struct e1000_ring *tx_ring = adapter->tx_ring;
580 unsigned int i = tx_ring->next_to_clean;
581 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
582 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 583
584 /* detected Tx unit hang */
44defeb3
JK		 585 e_err("Detected Tx Unit Hang:\n"
586 " TDH <%x>\n"
587 " TDT <%x>\n"
588 " next_to_use <%x>\n"
589 " next_to_clean <%x>\n"
590 "buffer_info[next_to_clean]:\n"
591 " time_stamp <%lx>\n"
592 " next_to_watch <%x>\n"
593 " jiffies <%lx>\n"
594 " next_to_watch.status <%x>\n",
595 readl(adapter->hw.hw_addr + tx_ring->head),
596 readl(adapter->hw.hw_addr + tx_ring->tail),
597 tx_ring->next_to_use,
598 tx_ring->next_to_clean,
599 tx_ring->buffer_info[eop].time_stamp,
600 eop,
601 jiffies,
602 eop_desc->upper.fields.status);
bc7f75fa
AK		 603}
604
605/**
606 * e1000_clean_tx_irq - Reclaim resources after transmit completes
607 * @adapter: board private structure
608 *
609 * the return value indicates whether actual cleaning was done, there
610 * is no guarantee that everything was cleaned
611 **/
612static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
613{
614 struct net_device *netdev = adapter->netdev;
615 struct e1000_hw *hw = &adapter->hw;
616 struct e1000_ring *tx_ring = adapter->tx_ring;
617 struct e1000_tx_desc *tx_desc, *eop_desc;
618 struct e1000_buffer *buffer_info;
619 unsigned int i, eop;
620 unsigned int count = 0;
621 bool cleaned = 0;
622 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
623
624 i = tx_ring->next_to_clean;
625 eop = tx_ring->buffer_info[i].next_to_watch;
626 eop_desc = E1000_TX_DESC(*tx_ring, eop);
627
628 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
629 for (cleaned = 0; !cleaned; ) {
630 tx_desc = E1000_TX_DESC(*tx_ring, i);
631 buffer_info = &tx_ring->buffer_info[i];
632 cleaned = (i == eop);
633
634 if (cleaned) {
635 struct sk_buff *skb = buffer_info->skb;
636 unsigned int segs, bytecount;
637 segs = skb_shinfo(skb)->gso_segs ?: 1;
638 /* multiply data chunks by size of headers */
639 bytecount = ((segs - 1) * skb_headlen(skb)) +
640 skb->len;
641 total_tx_packets += segs;
642 total_tx_bytes += bytecount;
643 }
644
645 e1000_put_txbuf(adapter, buffer_info);
646 tx_desc->upper.data = 0;
647
648 i++;
649 if (i == tx_ring->count)
650 i = 0;
651 }
652
653 eop = tx_ring->buffer_info[i].next_to_watch;
654 eop_desc = E1000_TX_DESC(*tx_ring, eop);
655#define E1000_TX_WEIGHT 64
656 /* weight of a sort for tx, to avoid endless transmit cleanup */
657 if (count++ == E1000_TX_WEIGHT)
658 break;
659 }
660
661 tx_ring->next_to_clean = i;
662
663#define TX_WAKE_THRESHOLD 32
664 if (cleaned && netif_carrier_ok(netdev) &&
665 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
666 /* Make sure that anybody stopping the queue after this
667 * sees the new next_to_clean.
668 */
669 smp_mb();
670
671 if (netif_queue_stopped(netdev) &&
672 !(test_bit(__E1000_DOWN, &adapter->state))) {
673 netif_wake_queue(netdev);
674 ++adapter->restart_queue;
675 }
676 }
677
678 if (adapter->detect_tx_hung) {
ad68076e
BA		 679 /*
680 * Detect a transmit hang in hardware, this serializes the
681 * check with the clearing of time_stamp and movement of i
682 */
bc7f75fa
AK		 683 adapter->detect_tx_hung = 0;
684 if (tx_ring->buffer_info[eop].dma &&
685 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp
686 + (adapter->tx_timeout_factor * HZ))
ad68076e 687 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 688 e1000_print_tx_hang(adapter);
689 netif_stop_queue(netdev);
690 }
691 }
692 adapter->total_tx_bytes += total_tx_bytes;
693 adapter->total_tx_packets += total_tx_packets;
41988692 694 adapter->net_stats.tx_bytes += total_tx_bytes;
7c25769f 695 adapter->net_stats.tx_packets += total_tx_packets;
bc7f75fa
AK		 696 return cleaned;
697}
698
bc7f75fa
AK		 699/**
700 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
701 * @adapter: board private structure
702 *
703 * the return value indicates whether actual cleaning was done, there
704 * is no guarantee that everything was cleaned
705 **/
706static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
707 int *work_done, int work_to_do)
708{
709 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
710 struct net_device *netdev = adapter->netdev;
711 struct pci_dev *pdev = adapter->pdev;
712 struct e1000_ring *rx_ring = adapter->rx_ring;
713 struct e1000_buffer *buffer_info, *next_buffer;
714 struct e1000_ps_page *ps_page;
715 struct sk_buff *skb;
716 unsigned int i, j;
717 u32 length, staterr;
718 int cleaned_count = 0;
719 bool cleaned = 0;
720 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
721
722 i = rx_ring->next_to_clean;
723 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
724 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
725 buffer_info = &rx_ring->buffer_info[i];
726
727 while (staterr & E1000_RXD_STAT_DD) {
728 if (*work_done >= work_to_do)
729 break;
730 (*work_done)++;
731 skb = buffer_info->skb;
732
733 /* in the packet split case this is header only */
734 prefetch(skb->data - NET_IP_ALIGN);
735
736 i++;
737 if (i == rx_ring->count)
738 i = 0;
739 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
740 prefetch(next_rxd);
741
742 next_buffer = &rx_ring->buffer_info[i];
743
744 cleaned = 1;
745 cleaned_count++;
746 pci_unmap_single(pdev, buffer_info->dma,
747 adapter->rx_ps_bsize0,
748 PCI_DMA_FROMDEVICE);
749 buffer_info->dma = 0;
750
751 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 752 e_dbg("%s: Packet Split buffers didn't pick up the "
753 "full packet\n", netdev->name);
bc7f75fa
AK		 754 dev_kfree_skb_irq(skb);
755 goto next_desc;
756 }
757
758 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
759 dev_kfree_skb_irq(skb);
760 goto next_desc;
761 }
762
763 length = le16_to_cpu(rx_desc->wb.middle.length0);
764
765 if (!length) {
44defeb3
JK		 766 e_dbg("%s: Last part of the packet spanning multiple "
767 "descriptors\n", netdev->name);
bc7f75fa
AK		 768 dev_kfree_skb_irq(skb);
769 goto next_desc;
770 }
771
772 /* Good Receive */
773 skb_put(skb, length);
774
775 {
ad68076e
BA		 776 /*
777 * this looks ugly, but it seems compiler issues make it
778 * more efficient than reusing j
779 */
bc7f75fa
AK		 780 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
781
ad68076e
BA		 782 /*
783 * page alloc/put takes too long and effects small packet
784 * throughput, so unsplit small packets and save the alloc/put
785 * only valid in softirq (napi) context to call kmap_*
786 */
bc7f75fa
AK		 787 if (l1 && (l1 <= copybreak) &&
788 ((length + l1) <= adapter->rx_ps_bsize0)) {
789 u8 *vaddr;
790
47f44e40 791 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 792
ad68076e
BA		 793 /*
794 * there is no documentation about how to call
bc7f75fa 795 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 796 * very long
797 */
bc7f75fa
AK		 798 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
799 PAGE_SIZE, PCI_DMA_FROMDEVICE);
800 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
801 memcpy(skb_tail_pointer(skb), vaddr, l1);
802 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
803 pci_dma_sync_single_for_device(pdev, ps_page->dma,
804 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 805
bc7f75fa
AK		 806 skb_put(skb, l1);
807 goto copydone;
808 } /* if */
809 }
810
811 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
812 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
813 if (!length)
814 break;
815
47f44e40 816 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 817 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
818 PCI_DMA_FROMDEVICE);
819 ps_page->dma = 0;
820 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
821 ps_page->page = NULL;
822 skb->len += length;
823 skb->data_len += length;
824 skb->truesize += length;
825 }
826
bc7f75fa
AK		 827copydone:
828 total_rx_bytes += skb->len;
829 total_rx_packets++;
830
831 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
832 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
833
834 if (rx_desc->wb.upper.header_status &
835 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
836 adapter->rx_hdr_split++;
837
838 e1000_receive_skb(adapter, netdev, skb,
839 staterr, rx_desc->wb.middle.vlan);
840
841next_desc:
842 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
843 buffer_info->skb = NULL;
844
845 /* return some buffers to hardware, one at a time is too slow */
846 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
847 adapter->alloc_rx_buf(adapter, cleaned_count);
848 cleaned_count = 0;
849 }
850
851 /* use prefetched values */
852 rx_desc = next_rxd;
853 buffer_info = next_buffer;
854
855 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
856 }
857 rx_ring->next_to_clean = i;
858
859 cleaned_count = e1000_desc_unused(rx_ring);
860 if (cleaned_count)
861 adapter->alloc_rx_buf(adapter, cleaned_count);
862
bc7f75fa 863 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 864 adapter->total_rx_packets += total_rx_packets;
41988692 865 adapter->net_stats.rx_bytes += total_rx_bytes;
7c25769f 866 adapter->net_stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 867 return cleaned;
868}
869
97ac8cae
BA		 870/**
871 * e1000_consume_page - helper function
872 **/
873static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
874 u16 length)
875{
876 bi->page = NULL;
877 skb->len += length;
878 skb->data_len += length;
879 skb->truesize += length;
880}
881
882/**
883 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
884 * @adapter: board private structure
885 *
886 * the return value indicates whether actual cleaning was done, there
887 * is no guarantee that everything was cleaned
888 **/
889
890static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
891 int *work_done, int work_to_do)
892{
893 struct net_device *netdev = adapter->netdev;
894 struct pci_dev *pdev = adapter->pdev;
895 struct e1000_ring *rx_ring = adapter->rx_ring;
896 struct e1000_rx_desc *rx_desc, *next_rxd;
897 struct e1000_buffer *buffer_info, *next_buffer;
898 u32 length;
899 unsigned int i;
900 int cleaned_count = 0;
901 bool cleaned = false;
902 unsigned int total_rx_bytes=0, total_rx_packets=0;
903
904 i = rx_ring->next_to_clean;
905 rx_desc = E1000_RX_DESC(*rx_ring, i);
906 buffer_info = &rx_ring->buffer_info[i];
907
908 while (rx_desc->status & E1000_RXD_STAT_DD) {
909 struct sk_buff *skb;
910 u8 status;
911
912 if (*work_done >= work_to_do)
913 break;
914 (*work_done)++;
915
916 status = rx_desc->status;
917 skb = buffer_info->skb;
918 buffer_info->skb = NULL;
919
920 ++i;
921 if (i == rx_ring->count)
922 i = 0;
923 next_rxd = E1000_RX_DESC(*rx_ring, i);
924 prefetch(next_rxd);
925
926 next_buffer = &rx_ring->buffer_info[i];
927
928 cleaned = true;
929 cleaned_count++;
930 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
931 PCI_DMA_FROMDEVICE);
932 buffer_info->dma = 0;
933
934 length = le16_to_cpu(rx_desc->length);
935
936 /* errors is only valid for DD + EOP descriptors */
937 if (unlikely((status & E1000_RXD_STAT_EOP) &&
938 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
939 /* recycle both page and skb */
940 buffer_info->skb = skb;
941 /* an error means any chain goes out the window
942 * too */
943 if (rx_ring->rx_skb_top)
944 dev_kfree_skb(rx_ring->rx_skb_top);
945 rx_ring->rx_skb_top = NULL;
946 goto next_desc;
947 }
948
949#define rxtop rx_ring->rx_skb_top
950 if (!(status & E1000_RXD_STAT_EOP)) {
951 /* this descriptor is only the beginning (or middle) */
952 if (!rxtop) {
953 /* this is the beginning of a chain */
954 rxtop = skb;
955 skb_fill_page_desc(rxtop, 0, buffer_info->page,
956 0, length);
957 } else {
958 /* this is the middle of a chain */
959 skb_fill_page_desc(rxtop,
960 skb_shinfo(rxtop)->nr_frags,
961 buffer_info->page, 0, length);
962 /* re-use the skb, only consumed the page */
963 buffer_info->skb = skb;
964 }
965 e1000_consume_page(buffer_info, rxtop, length);
966 goto next_desc;
967 } else {
968 if (rxtop) {
969 /* end of the chain */
970 skb_fill_page_desc(rxtop,
971 skb_shinfo(rxtop)->nr_frags,
972 buffer_info->page, 0, length);
973 /* re-use the current skb, we only consumed the
974 * page */
975 buffer_info->skb = skb;
976 skb = rxtop;
977 rxtop = NULL;
978 e1000_consume_page(buffer_info, skb, length);
979 } else {
980 /* no chain, got EOP, this buf is the packet
981 * copybreak to save the put_page/alloc_page */
982 if (length <= copybreak &&
983 skb_tailroom(skb) >= length) {
984 u8 *vaddr;
985 vaddr = kmap_atomic(buffer_info->page,
986 KM_SKB_DATA_SOFTIRQ);
987 memcpy(skb_tail_pointer(skb), vaddr,
988 length);
989 kunmap_atomic(vaddr,
990 KM_SKB_DATA_SOFTIRQ);
991 /* re-use the page, so don't erase
992 * buffer_info->page */
993 skb_put(skb, length);
994 } else {
995 skb_fill_page_desc(skb, 0,
996 buffer_info->page, 0,
997 length);
998 e1000_consume_page(buffer_info, skb,
999 length);
1000 }
1001 }
1002 }
1003
1004 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1005 e1000_rx_checksum(adapter,
1006 (u32)(status) |
1007 ((u32)(rx_desc->errors) << 24),
1008 le16_to_cpu(rx_desc->csum), skb);
1009
1010 /* probably a little skewed due to removing CRC */
1011 total_rx_bytes += skb->len;
1012 total_rx_packets++;
1013
1014 /* eth type trans needs skb->data to point to something */
1015 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1016 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1017 dev_kfree_skb(skb);
1018 goto next_desc;
1019 }
1020
1021 e1000_receive_skb(adapter, netdev, skb, status,
1022 rx_desc->special);
1023
1024next_desc:
1025 rx_desc->status = 0;
1026
1027 /* return some buffers to hardware, one at a time is too slow */
1028 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1029 adapter->alloc_rx_buf(adapter, cleaned_count);
1030 cleaned_count = 0;
1031 }
1032
1033 /* use prefetched values */
1034 rx_desc = next_rxd;
1035 buffer_info = next_buffer;
1036 }
1037 rx_ring->next_to_clean = i;
1038
1039 cleaned_count = e1000_desc_unused(rx_ring);
1040 if (cleaned_count)
1041 adapter->alloc_rx_buf(adapter, cleaned_count);
1042
1043 adapter->total_rx_bytes += total_rx_bytes;
1044 adapter->total_rx_packets += total_rx_packets;
1045 adapter->net_stats.rx_bytes += total_rx_bytes;
1046 adapter->net_stats.rx_packets += total_rx_packets;
1047 return cleaned;
1048}
1049
bc7f75fa
AK		 1050/**
1051 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1052 * @adapter: board private structure
1053 **/
1054static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1055{
1056 struct e1000_ring *rx_ring = adapter->rx_ring;
1057 struct e1000_buffer *buffer_info;
1058 struct e1000_ps_page *ps_page;
1059 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1060 unsigned int i, j;
1061
1062 /* Free all the Rx ring sk_buffs */
1063 for (i = 0; i < rx_ring->count; i++) {
1064 buffer_info = &rx_ring->buffer_info[i];
1065 if (buffer_info->dma) {
1066 if (adapter->clean_rx == e1000_clean_rx_irq)
1067 pci_unmap_single(pdev, buffer_info->dma,
1068 adapter->rx_buffer_len,
1069 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1070 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1071 pci_unmap_page(pdev, buffer_info->dma,
1072 PAGE_SIZE,
1073 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1074 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1075 pci_unmap_single(pdev, buffer_info->dma,
1076 adapter->rx_ps_bsize0,
1077 PCI_DMA_FROMDEVICE);
1078 buffer_info->dma = 0;
1079 }
1080
97ac8cae
BA		 1081 if (buffer_info->page) {
1082 put_page(buffer_info->page);
1083 buffer_info->page = NULL;
1084 }
1085
bc7f75fa
AK		 1086 if (buffer_info->skb) {
1087 dev_kfree_skb(buffer_info->skb);
1088 buffer_info->skb = NULL;
1089 }
1090
1091 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1092 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1093 if (!ps_page->page)
1094 break;
1095 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1096 PCI_DMA_FROMDEVICE);
1097 ps_page->dma = 0;
1098 put_page(ps_page->page);
1099 ps_page->page = NULL;
1100 }
1101 }
1102
1103 /* there also may be some cached data from a chained receive */
1104 if (rx_ring->rx_skb_top) {
1105 dev_kfree_skb(rx_ring->rx_skb_top);
1106 rx_ring->rx_skb_top = NULL;
1107 }
1108
bc7f75fa
AK		 1109 /* Zero out the descriptor ring */
1110 memset(rx_ring->desc, 0, rx_ring->size);
1111
1112 rx_ring->next_to_clean = 0;
1113 rx_ring->next_to_use = 0;
1114
1115 writel(0, adapter->hw.hw_addr + rx_ring->head);
1116 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1117}
1118
1119/**
1120 * e1000_intr_msi - Interrupt Handler
1121 * @irq: interrupt number
1122 * @data: pointer to a network interface device structure
1123 **/
1124static irqreturn_t e1000_intr_msi(int irq, void *data)
1125{
1126 struct net_device *netdev = data;
1127 struct e1000_adapter *adapter = netdev_priv(netdev);
1128 struct e1000_hw *hw = &adapter->hw;
1129 u32 icr = er32(ICR);
1130
ad68076e
BA		 1131 /*
1132 * read ICR disables interrupts using IAM
1133 */
bc7f75fa
AK		 1134
1135 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1136 hw->mac.get_link_status = 1;
ad68076e
BA		 1137 /*
1138 * ICH8 workaround-- Call gig speed drop workaround on cable
1139 * disconnect (LSC) before accessing any PHY registers
1140 */
bc7f75fa
AK		 1141 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1142 (!(er32(STATUS) & E1000_STATUS_LU)))
1143 e1000e_gig_downshift_workaround_ich8lan(hw);
1144
ad68076e
BA		 1145 /*
1146 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1147 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1148 * adapter in watchdog
1149 */
bc7f75fa
AK		 1150 if (netif_carrier_ok(netdev) &&
1151 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1152 /* disable receives */
1153 u32 rctl = er32(RCTL);
1154 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1155 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1156 }
1157 /* guard against interrupt when we're going down */
1158 if (!test_bit(__E1000_DOWN, &adapter->state))
1159 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1160 }
1161
1162 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1163 adapter->total_tx_bytes = 0;
1164 adapter->total_tx_packets = 0;
1165 adapter->total_rx_bytes = 0;
1166 adapter->total_rx_packets = 0;
1167 __netif_rx_schedule(netdev, &adapter->napi);
bc7f75fa
AK		 1168 }
1169
1170 return IRQ_HANDLED;
1171}
1172
1173/**
1174 * e1000_intr - Interrupt Handler
1175 * @irq: interrupt number
1176 * @data: pointer to a network interface device structure
1177 **/
1178static irqreturn_t e1000_intr(int irq, void *data)
1179{
1180 struct net_device *netdev = data;
1181 struct e1000_adapter *adapter = netdev_priv(netdev);
1182 struct e1000_hw *hw = &adapter->hw;
1183
1184 u32 rctl, icr = er32(ICR);
1185 if (!icr)
1186 return IRQ_NONE; /* Not our interrupt */
1187
ad68076e
BA		 1188 /*
1189 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1190 * not set, then the adapter didn't send an interrupt
1191 */
bc7f75fa
AK		 1192 if (!(icr & E1000_ICR_INT_ASSERTED))
1193 return IRQ_NONE;
1194
ad68076e
BA		 1195 /*
1196 * Interrupt Auto-Mask...upon reading ICR,
1197 * interrupts are masked. No need for the
1198 * IMC write
1199 */
bc7f75fa
AK		 1200
1201 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
1202 hw->mac.get_link_status = 1;
ad68076e
BA		 1203 /*
1204 * ICH8 workaround-- Call gig speed drop workaround on cable
1205 * disconnect (LSC) before accessing any PHY registers
1206 */
bc7f75fa
AK		 1207 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1208 (!(er32(STATUS) & E1000_STATUS_LU)))
1209 e1000e_gig_downshift_workaround_ich8lan(hw);
1210
ad68076e
BA		 1211 /*
1212 * 80003ES2LAN workaround--
bc7f75fa
AK		 1213 * For packet buffer work-around on link down event;
1214 * disable receives here in the ISR and
1215 * reset adapter in watchdog
1216 */
1217 if (netif_carrier_ok(netdev) &&
1218 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1219 /* disable receives */
1220 rctl = er32(RCTL);
1221 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1222 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1223 }
1224 /* guard against interrupt when we're going down */
1225 if (!test_bit(__E1000_DOWN, &adapter->state))
1226 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1227 }
1228
1229 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
1230 adapter->total_tx_bytes = 0;
1231 adapter->total_tx_packets = 0;
1232 adapter->total_rx_bytes = 0;
1233 adapter->total_rx_packets = 0;
1234 __netif_rx_schedule(netdev, &adapter->napi);
bc7f75fa
AK		 1235 }
1236
1237 return IRQ_HANDLED;
1238}
1239
f8d59f78
BA		 1240/**
1241 * e1000_request_irq - initialize interrupts
1242 *
1243 * Attempts to configure interrupts using the best available
1244 * capabilities of the hardware and kernel.
1245 **/
bc7f75fa
AK		 1246static int e1000_request_irq(struct e1000_adapter *adapter)
1247{
1248 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1249 int irq_flags = IRQF_SHARED;
1250 int err;
1251
f8d59f78
BA		 1252 if (!(adapter->flags & FLAG_MSI_TEST_FAILED)) {
1253 err = pci_enable_msi(adapter->pdev);
1254 if (!err) {
1255 adapter->flags |= FLAG_MSI_ENABLED;
1256 irq_flags = 0;
1257 }
bc7f75fa
AK		 1258 }
1259
f8d59f78
BA		 1260 err = request_irq(adapter->pdev->irq,
1261 ((adapter->flags & FLAG_MSI_ENABLED) ?
1262 &e1000_intr_msi : &e1000_intr),
1263 irq_flags, netdev->name, netdev);
bc7f75fa 1264 if (err) {
f8d59f78 1265 if (adapter->flags & FLAG_MSI_ENABLED) {
bc7f75fa 1266 pci_disable_msi(adapter->pdev);
f8d59f78
BA		 1267 adapter->flags &= ~FLAG_MSI_ENABLED;
1268 }
1269 e_err("Unable to allocate interrupt, Error: %d\n", err);
bc7f75fa
AK		 1270 }
1271
1272 return err;
1273}
1274
1275static void e1000_free_irq(struct e1000_adapter *adapter)
1276{
1277 struct net_device *netdev = adapter->netdev;
1278
1279 free_irq(adapter->pdev->irq, netdev);
1280 if (adapter->flags & FLAG_MSI_ENABLED) {
1281 pci_disable_msi(adapter->pdev);
1282 adapter->flags &= ~FLAG_MSI_ENABLED;
1283 }
1284}
1285
1286/**
1287 * e1000_irq_disable - Mask off interrupt generation on the NIC
1288 **/
1289static void e1000_irq_disable(struct e1000_adapter *adapter)
1290{
1291 struct e1000_hw *hw = &adapter->hw;
1292
bc7f75fa
AK		 1293 ew32(IMC, ~0);
1294 e1e_flush();
1295 synchronize_irq(adapter->pdev->irq);
1296}
1297
1298/**
1299 * e1000_irq_enable - Enable default interrupt generation settings
1300 **/
1301static void e1000_irq_enable(struct e1000_adapter *adapter)
1302{
1303 struct e1000_hw *hw = &adapter->hw;
1304
74ef9c39
JB		 1305 ew32(IMS, IMS_ENABLE_MASK);
1306 e1e_flush();
bc7f75fa
AK		 1307}
1308
1309/**
1310 * e1000_get_hw_control - get control of the h/w from f/w
1311 * @adapter: address of board private structure
1312 *
489815ce 1313 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1314 * For ASF and Pass Through versions of f/w this means that
1315 * the driver is loaded. For AMT version (only with 82573)
1316 * of the f/w this means that the network i/f is open.
1317 **/
1318static void e1000_get_hw_control(struct e1000_adapter *adapter)
1319{
1320 struct e1000_hw *hw = &adapter->hw;
1321 u32 ctrl_ext;
1322 u32 swsm;
1323
1324 /* Let firmware know the driver has taken over */
1325 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1326 swsm = er32(SWSM);
1327 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1328 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1329 ctrl_ext = er32(CTRL_EXT);
ad68076e 1330 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1331 }
1332}
1333
1334/**
1335 * e1000_release_hw_control - release control of the h/w to f/w
1336 * @adapter: address of board private structure
1337 *
489815ce 1338 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1339 * For ASF and Pass Through versions of f/w this means that the
1340 * driver is no longer loaded. For AMT version (only with 82573) i
1341 * of the f/w this means that the network i/f is closed.
1342 *
1343 **/
1344static void e1000_release_hw_control(struct e1000_adapter *adapter)
1345{
1346 struct e1000_hw *hw = &adapter->hw;
1347 u32 ctrl_ext;
1348 u32 swsm;
1349
1350 /* Let firmware taken over control of h/w */
1351 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1352 swsm = er32(SWSM);
1353 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1354 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1355 ctrl_ext = er32(CTRL_EXT);
ad68076e 1356 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1357 }
1358}
1359
bc7f75fa
AK		 1360/**
1361 * @e1000_alloc_ring - allocate memory for a ring structure
1362 **/
1363static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1364 struct e1000_ring *ring)
1365{
1366 struct pci_dev *pdev = adapter->pdev;
1367
1368 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1369 GFP_KERNEL);
1370 if (!ring->desc)
1371 return -ENOMEM;
1372
1373 return 0;
1374}
1375
1376/**
1377 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1378 * @adapter: board private structure
1379 *
1380 * Return 0 on success, negative on failure
1381 **/
1382int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1383{
1384 struct e1000_ring *tx_ring = adapter->tx_ring;
1385 int err = -ENOMEM, size;
1386
1387 size = sizeof(struct e1000_buffer) * tx_ring->count;
1388 tx_ring->buffer_info = vmalloc(size);
1389 if (!tx_ring->buffer_info)
1390 goto err;
1391 memset(tx_ring->buffer_info, 0, size);
1392
1393 /* round up to nearest 4K */
1394 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1395 tx_ring->size = ALIGN(tx_ring->size, 4096);
1396
1397 err = e1000_alloc_ring_dma(adapter, tx_ring);
1398 if (err)
1399 goto err;
1400
1401 tx_ring->next_to_use = 0;
1402 tx_ring->next_to_clean = 0;
1403 spin_lock_init(&adapter->tx_queue_lock);
1404
1405 return 0;
1406err:
1407 vfree(tx_ring->buffer_info);
44defeb3 1408 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1409 return err;
1410}
1411
1412/**
1413 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1414 * @adapter: board private structure
1415 *
1416 * Returns 0 on success, negative on failure
1417 **/
1418int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1419{
1420 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1421 struct e1000_buffer *buffer_info;
1422 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1423
1424 size = sizeof(struct e1000_buffer) * rx_ring->count;
1425 rx_ring->buffer_info = vmalloc(size);
1426 if (!rx_ring->buffer_info)
1427 goto err;
1428 memset(rx_ring->buffer_info, 0, size);
1429
47f44e40
AK		 1430 for (i = 0; i < rx_ring->count; i++) {
1431 buffer_info = &rx_ring->buffer_info[i];
1432 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1433 sizeof(struct e1000_ps_page),
1434 GFP_KERNEL);
1435 if (!buffer_info->ps_pages)
1436 goto err_pages;
1437 }
bc7f75fa
AK		 1438
1439 desc_len = sizeof(union e1000_rx_desc_packet_split);
1440
1441 /* Round up to nearest 4K */
1442 rx_ring->size = rx_ring->count * desc_len;
1443 rx_ring->size = ALIGN(rx_ring->size, 4096);
1444
1445 err = e1000_alloc_ring_dma(adapter, rx_ring);
1446 if (err)
47f44e40 1447 goto err_pages;
bc7f75fa
AK		 1448
1449 rx_ring->next_to_clean = 0;
1450 rx_ring->next_to_use = 0;
1451 rx_ring->rx_skb_top = NULL;
1452
1453 return 0;
47f44e40
AK		 1454
1455err_pages:
1456 for (i = 0; i < rx_ring->count; i++) {
1457 buffer_info = &rx_ring->buffer_info[i];
1458 kfree(buffer_info->ps_pages);
1459 }
bc7f75fa
AK		 1460err:
1461 vfree(rx_ring->buffer_info);
44defeb3 1462 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1463 return err;
1464}
1465
1466/**
1467 * e1000_clean_tx_ring - Free Tx Buffers
1468 * @adapter: board private structure
1469 **/
1470static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1471{
1472 struct e1000_ring *tx_ring = adapter->tx_ring;
1473 struct e1000_buffer *buffer_info;
1474 unsigned long size;
1475 unsigned int i;
1476
1477 for (i = 0; i < tx_ring->count; i++) {
1478 buffer_info = &tx_ring->buffer_info[i];
1479 e1000_put_txbuf(adapter, buffer_info);
1480 }
1481
1482 size = sizeof(struct e1000_buffer) * tx_ring->count;
1483 memset(tx_ring->buffer_info, 0, size);
1484
1485 memset(tx_ring->desc, 0, tx_ring->size);
1486
1487 tx_ring->next_to_use = 0;
1488 tx_ring->next_to_clean = 0;
1489
1490 writel(0, adapter->hw.hw_addr + tx_ring->head);
1491 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1492}
1493
1494/**
1495 * e1000e_free_tx_resources - Free Tx Resources per Queue
1496 * @adapter: board private structure
1497 *
1498 * Free all transmit software resources
1499 **/
1500void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1501{
1502 struct pci_dev *pdev = adapter->pdev;
1503 struct e1000_ring *tx_ring = adapter->tx_ring;
1504
1505 e1000_clean_tx_ring(adapter);
1506
1507 vfree(tx_ring->buffer_info);
1508 tx_ring->buffer_info = NULL;
1509
1510 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1511 tx_ring->dma);
1512 tx_ring->desc = NULL;
1513}
1514
1515/**
1516 * e1000e_free_rx_resources - Free Rx Resources
1517 * @adapter: board private structure
1518 *
1519 * Free all receive software resources
1520 **/
1521
1522void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1523{
1524 struct pci_dev *pdev = adapter->pdev;
1525 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1526 int i;
bc7f75fa
AK		 1527
1528 e1000_clean_rx_ring(adapter);
1529
47f44e40
AK		 1530 for (i = 0; i < rx_ring->count; i++) {
1531 kfree(rx_ring->buffer_info[i].ps_pages);
1532 }
1533
bc7f75fa
AK		 1534 vfree(rx_ring->buffer_info);
1535 rx_ring->buffer_info = NULL;
1536
bc7f75fa
AK		 1537 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1538 rx_ring->dma);
1539 rx_ring->desc = NULL;
1540}
1541
1542/**
1543 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1544 * @adapter: pointer to adapter
1545 * @itr_setting: current adapter->itr
1546 * @packets: the number of packets during this measurement interval
1547 * @bytes: the number of bytes during this measurement interval
1548 *
bc7f75fa
AK		 1549 * Stores a new ITR value based on packets and byte
1550 * counts during the last interrupt. The advantage of per interrupt
1551 * computation is faster updates and more accurate ITR for the current
1552 * traffic pattern. Constants in this function were computed
1553 * based on theoretical maximum wire speed and thresholds were set based
1554 * on testing data as well as attempting to minimize response time
1555 * while increasing bulk throughput.
1556 * this functionality is controlled by the InterruptThrottleRate module
1557 * parameter (see e1000_param.c)
bc7f75fa
AK		 1558 **/
1559static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1560 u16 itr_setting, int packets,
1561 int bytes)
1562{
1563 unsigned int retval = itr_setting;
1564
1565 if (packets == 0)
1566 goto update_itr_done;
1567
1568 switch (itr_setting) {
1569 case lowest_latency:
1570 /* handle TSO and jumbo frames */
1571 if (bytes/packets > 8000)
1572 retval = bulk_latency;
1573 else if ((packets < 5) && (bytes > 512)) {
1574 retval = low_latency;
1575 }
1576 break;
1577 case low_latency: /* 50 usec aka 20000 ints/s */
1578 if (bytes > 10000) {
1579 /* this if handles the TSO accounting */
1580 if (bytes/packets > 8000) {
1581 retval = bulk_latency;
1582 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1583 retval = bulk_latency;
1584 } else if ((packets > 35)) {
1585 retval = lowest_latency;
1586 }
1587 } else if (bytes/packets > 2000) {
1588 retval = bulk_latency;
1589 } else if (packets <= 2 && bytes < 512) {
1590 retval = lowest_latency;
1591 }
1592 break;
1593 case bulk_latency: /* 250 usec aka 4000 ints/s */
1594 if (bytes > 25000) {
1595 if (packets > 35) {
1596 retval = low_latency;
1597 }
1598 } else if (bytes < 6000) {
1599 retval = low_latency;
1600 }
1601 break;
1602 }
1603
1604update_itr_done:
1605 return retval;
1606}
1607
1608static void e1000_set_itr(struct e1000_adapter *adapter)
1609{
1610 struct e1000_hw *hw = &adapter->hw;
1611 u16 current_itr;
1612 u32 new_itr = adapter->itr;
1613
1614 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1615 if (adapter->link_speed != SPEED_1000) {
1616 current_itr = 0;
1617 new_itr = 4000;
1618 goto set_itr_now;
1619 }
1620
1621 adapter->tx_itr = e1000_update_itr(adapter,
1622 adapter->tx_itr,
1623 adapter->total_tx_packets,
1624 adapter->total_tx_bytes);
1625 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1626 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1627 adapter->tx_itr = low_latency;
1628
1629 adapter->rx_itr = e1000_update_itr(adapter,
1630 adapter->rx_itr,
1631 adapter->total_rx_packets,
1632 adapter->total_rx_bytes);
1633 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1634 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1635 adapter->rx_itr = low_latency;
1636
1637 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1638
1639 switch (current_itr) {
1640 /* counts and packets in update_itr are dependent on these numbers */
1641 case lowest_latency:
1642 new_itr = 70000;
1643 break;
1644 case low_latency:
1645 new_itr = 20000; /* aka hwitr = ~200 */
1646 break;
1647 case bulk_latency:
1648 new_itr = 4000;
1649 break;
1650 default:
1651 break;
1652 }
1653
1654set_itr_now:
1655 if (new_itr != adapter->itr) {
ad68076e
BA		 1656 /*
1657 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1658 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1659 * increasing
1660 */
bc7f75fa
AK		 1661 new_itr = new_itr > adapter->itr ?
1662 min(adapter->itr + (new_itr >> 2), new_itr) :
1663 new_itr;
1664 adapter->itr = new_itr;
1665 ew32(ITR, 1000000000 / (new_itr * 256));
1666 }
1667}
1668
1669/**
1670 * e1000_clean - NAPI Rx polling callback
ad68076e 1671 * @napi: struct associated with this polling callback
489815ce 1672 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1673 **/
1674static int e1000_clean(struct napi_struct *napi, int budget)
1675{
1676 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
1677 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 1678 int tx_cleaned = 0, work_done = 0;
bc7f75fa
AK		 1679
1680 /* Must NOT use netdev_priv macro here. */
1681 adapter = poll_dev->priv;
1682
ad68076e
BA		 1683 /*
1684 * e1000_clean is called per-cpu. This lock protects
bc7f75fa
AK		 1685 * tx_ring from being cleaned by multiple cpus
1686 * simultaneously. A failure obtaining the lock means
ad68076e
BA		 1687 * tx_ring is currently being cleaned anyway.
1688 */
bc7f75fa 1689 if (spin_trylock(&adapter->tx_queue_lock)) {
d2c7ddd6 1690 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa
AK		 1691 spin_unlock(&adapter->tx_queue_lock);
1692 }
1693
1694 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6
DM		 1695
1696 if (tx_cleaned)
1697 work_done = budget;
bc7f75fa 1698
53e52c72
DM		 1699 /* If budget not fully consumed, exit the polling mode */
1700 if (work_done < budget) {
bc7f75fa
AK		 1701 if (adapter->itr_setting & 3)
1702 e1000_set_itr(adapter);
1703 netif_rx_complete(poll_dev, napi);
1704 e1000_irq_enable(adapter);
1705 }
1706
1707 return work_done;
1708}
1709
1710static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1711{
1712 struct e1000_adapter *adapter = netdev_priv(netdev);
1713 struct e1000_hw *hw = &adapter->hw;
1714 u32 vfta, index;
1715
1716 /* don't update vlan cookie if already programmed */
1717 if ((adapter->hw.mng_cookie.status &
1718 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1719 (vid == adapter->mng_vlan_id))
1720 return;
1721 /* add VID to filter table */
1722 index = (vid >> 5) & 0x7F;
1723 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1724 vfta |= (1 << (vid & 0x1F));
1725 e1000e_write_vfta(hw, index, vfta);
1726}
1727
1728static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1729{
1730 struct e1000_adapter *adapter = netdev_priv(netdev);
1731 struct e1000_hw *hw = &adapter->hw;
1732 u32 vfta, index;
1733
74ef9c39
JB		 1734 if (!test_bit(__E1000_DOWN, &adapter->state))
1735 e1000_irq_disable(adapter);
bc7f75fa 1736 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 1737
1738 if (!test_bit(__E1000_DOWN, &adapter->state))
1739 e1000_irq_enable(adapter);
bc7f75fa
AK		 1740
1741 if ((adapter->hw.mng_cookie.status &
1742 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
1743 (vid == adapter->mng_vlan_id)) {
1744 /* release control to f/w */
1745 e1000_release_hw_control(adapter);
1746 return;
1747 }
1748
1749 /* remove VID from filter table */
1750 index = (vid >> 5) & 0x7F;
1751 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
1752 vfta &= ~(1 << (vid & 0x1F));
1753 e1000e_write_vfta(hw, index, vfta);
1754}
1755
1756static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
1757{
1758 struct net_device *netdev = adapter->netdev;
1759 u16 vid = adapter->hw.mng_cookie.vlan_id;
1760 u16 old_vid = adapter->mng_vlan_id;
1761
1762 if (!adapter->vlgrp)
1763 return;
1764
1765 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1766 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1767 if (adapter->hw.mng_cookie.status &
1768 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1769 e1000_vlan_rx_add_vid(netdev, vid);
1770 adapter->mng_vlan_id = vid;
1771 }
1772
1773 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
1774 (vid != old_vid) &&
1775 !vlan_group_get_device(adapter->vlgrp, old_vid))
1776 e1000_vlan_rx_kill_vid(netdev, old_vid);
1777 } else {
1778 adapter->mng_vlan_id = vid;
1779 }
1780}
1781
1782
1783static void e1000_vlan_rx_register(struct net_device *netdev,
1784 struct vlan_group *grp)
1785{
1786 struct e1000_adapter *adapter = netdev_priv(netdev);
1787 struct e1000_hw *hw = &adapter->hw;
1788 u32 ctrl, rctl;
1789
74ef9c39
JB		 1790 if (!test_bit(__E1000_DOWN, &adapter->state))
1791 e1000_irq_disable(adapter);
bc7f75fa
AK		 1792 adapter->vlgrp = grp;
1793
1794 if (grp) {
1795 /* enable VLAN tag insert/strip */
1796 ctrl = er32(CTRL);
1797 ctrl |= E1000_CTRL_VME;
1798 ew32(CTRL, ctrl);
1799
1800 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
1801 /* enable VLAN receive filtering */
1802 rctl = er32(RCTL);
bc7f75fa
AK		 1803 rctl &= ~E1000_RCTL_CFIEN;
1804 ew32(RCTL, rctl);
1805 e1000_update_mng_vlan(adapter);
1806 }
1807 } else {
1808 /* disable VLAN tag insert/strip */
1809 ctrl = er32(CTRL);
1810 ctrl &= ~E1000_CTRL_VME;
1811 ew32(CTRL, ctrl);
1812
1813 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 1814 if (adapter->mng_vlan_id !=
1815 (u16)E1000_MNG_VLAN_NONE) {
1816 e1000_vlan_rx_kill_vid(netdev,
1817 adapter->mng_vlan_id);
1818 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1819 }
1820 }
1821 }
1822
74ef9c39
JB		 1823 if (!test_bit(__E1000_DOWN, &adapter->state))
1824 e1000_irq_enable(adapter);
bc7f75fa
AK		 1825}
1826
1827static void e1000_restore_vlan(struct e1000_adapter *adapter)
1828{
1829 u16 vid;
1830
1831 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1832
1833 if (!adapter->vlgrp)
1834 return;
1835
1836 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1837 if (!vlan_group_get_device(adapter->vlgrp, vid))
1838 continue;
1839 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1840 }
1841}
1842
1843static void e1000_init_manageability(struct e1000_adapter *adapter)
1844{
1845 struct e1000_hw *hw = &adapter->hw;
1846 u32 manc, manc2h;
1847
1848 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
1849 return;
1850
1851 manc = er32(MANC);
1852
ad68076e
BA		 1853 /*
1854 * enable receiving management packets to the host. this will probably
bc7f75fa 1855 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 1856 * the packets will be handled on SMBUS
1857 */
bc7f75fa
AK		 1858 manc |= E1000_MANC_EN_MNG2HOST;
1859 manc2h = er32(MANC2H);
1860#define E1000_MNG2HOST_PORT_623 (1 << 5)
1861#define E1000_MNG2HOST_PORT_664 (1 << 6)
1862 manc2h |= E1000_MNG2HOST_PORT_623;
1863 manc2h |= E1000_MNG2HOST_PORT_664;
1864 ew32(MANC2H, manc2h);
1865 ew32(MANC, manc);
1866}
1867
1868/**
1869 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1870 * @adapter: board private structure
1871 *
1872 * Configure the Tx unit of the MAC after a reset.
1873 **/
1874static void e1000_configure_tx(struct e1000_adapter *adapter)
1875{
1876 struct e1000_hw *hw = &adapter->hw;
1877 struct e1000_ring *tx_ring = adapter->tx_ring;
1878 u64 tdba;
1879 u32 tdlen, tctl, tipg, tarc;
1880 u32 ipgr1, ipgr2;
1881
1882 /* Setup the HW Tx Head and Tail descriptor pointers */
1883 tdba = tx_ring->dma;
1884 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
1885 ew32(TDBAL, (tdba & DMA_32BIT_MASK));
1886 ew32(TDBAH, (tdba >> 32));
1887 ew32(TDLEN, tdlen);
1888 ew32(TDH, 0);
1889 ew32(TDT, 0);
1890 tx_ring->head = E1000_TDH;
1891 tx_ring->tail = E1000_TDT;
1892
1893 /* Set the default values for the Tx Inter Packet Gap timer */
1894 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
1895 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
1896 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
1897
1898 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
1899 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
1900
1901 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1902 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1903 ew32(TIPG, tipg);
1904
1905 /* Set the Tx Interrupt Delay register */
1906 ew32(TIDV, adapter->tx_int_delay);
ad68076e 1907 /* Tx irq moderation */
bc7f75fa
AK		 1908 ew32(TADV, adapter->tx_abs_int_delay);
1909
1910 /* Program the Transmit Control Register */
1911 tctl = er32(TCTL);
1912 tctl &= ~E1000_TCTL_CT;
1913 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1914 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1915
1916 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 1917 tarc = er32(TARC(0));
ad68076e
BA		 1918 /*
1919 * set the speed mode bit, we'll clear it if we're not at
1920 * gigabit link later
1921 */
bc7f75fa
AK		 1922#define SPEED_MODE_BIT (1 << 21)
1923 tarc |= SPEED_MODE_BIT;
e9ec2c0f 1924 ew32(TARC(0), tarc);
bc7f75fa
AK		 1925 }
1926
1927 /* errata: program both queues to unweighted RR */
1928 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 1929 tarc = er32(TARC(0));
bc7f75fa 1930 tarc |= 1;
e9ec2c0f
JK		 1931 ew32(TARC(0), tarc);
1932 tarc = er32(TARC(1));
bc7f75fa 1933 tarc |= 1;
e9ec2c0f 1934 ew32(TARC(1), tarc);
bc7f75fa
AK		 1935 }
1936
1937 e1000e_config_collision_dist(hw);
1938
1939 /* Setup Transmit Descriptor Settings for eop descriptor */
1940 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1941
1942 /* only set IDE if we are delaying interrupts using the timers */
1943 if (adapter->tx_int_delay)
1944 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1945
1946 /* enable Report Status bit */
1947 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1948
1949 ew32(TCTL, tctl);
1950
1951 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
1952}
1953
1954/**
1955 * e1000_setup_rctl - configure the receive control registers
1956 * @adapter: Board private structure
1957 **/
1958#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1959 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1960static void e1000_setup_rctl(struct e1000_adapter *adapter)
1961{
1962 struct e1000_hw *hw = &adapter->hw;
1963 u32 rctl, rfctl;
1964 u32 psrctl = 0;
1965 u32 pages = 0;
1966
1967 /* Program MC offset vector base */
1968 rctl = er32(RCTL);
1969 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1970 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1971 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1972 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
1973
1974 /* Do not Store bad packets */
1975 rctl &= ~E1000_RCTL_SBP;
1976
1977 /* Enable Long Packet receive */
1978 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1979 rctl &= ~E1000_RCTL_LPE;
1980 else
1981 rctl |= E1000_RCTL_LPE;
1982
5918bd88
AK		 1983 /* Enable hardware CRC frame stripping */
1984 rctl |= E1000_RCTL_SECRC;
1985
bc7f75fa
AK		 1986 /* Setup buffer sizes */
1987 rctl &= ~E1000_RCTL_SZ_4096;
1988 rctl |= E1000_RCTL_BSEX;
1989 switch (adapter->rx_buffer_len) {
1990 case 256:
1991 rctl |= E1000_RCTL_SZ_256;
1992 rctl &= ~E1000_RCTL_BSEX;
1993 break;
1994 case 512:
1995 rctl |= E1000_RCTL_SZ_512;
1996 rctl &= ~E1000_RCTL_BSEX;
1997 break;
1998 case 1024:
1999 rctl |= E1000_RCTL_SZ_1024;
2000 rctl &= ~E1000_RCTL_BSEX;
2001 break;
2002 case 2048:
2003 default:
2004 rctl |= E1000_RCTL_SZ_2048;
2005 rctl &= ~E1000_RCTL_BSEX;
2006 break;
2007 case 4096:
2008 rctl |= E1000_RCTL_SZ_4096;
2009 break;
2010 case 8192:
2011 rctl |= E1000_RCTL_SZ_8192;
2012 break;
2013 case 16384:
2014 rctl |= E1000_RCTL_SZ_16384;
2015 break;
2016 }
2017
2018 /*
2019 * 82571 and greater support packet-split where the protocol
2020 * header is placed in skb->data and the packet data is
2021 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2022 * In the case of a non-split, skb->data is linearly filled,
2023 * followed by the page buffers. Therefore, skb->data is
2024 * sized to hold the largest protocol header.
2025 *
2026 * allocations using alloc_page take too long for regular MTU
2027 * so only enable packet split for jumbo frames
2028 *
2029 * Using pages when the page size is greater than 16k wastes
2030 * a lot of memory, since we allocate 3 pages at all times
2031 * per packet.
2032 */
bc7f75fa 2033 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2034 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2035 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2036 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2037 else
2038 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2039
2040 if (adapter->rx_ps_pages) {
2041 /* Configure extra packet-split registers */
2042 rfctl = er32(RFCTL);
2043 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2044 /*
2045 * disable packet split support for IPv6 extension headers,
2046 * because some malformed IPv6 headers can hang the Rx
2047 */
bc7f75fa
AK		 2048 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2049 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2050
2051 ew32(RFCTL, rfctl);
2052
140a7480
AK		 2053 /* Enable Packet split descriptors */
2054 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2055
2056 psrctl |= adapter->rx_ps_bsize0 >>
2057 E1000_PSRCTL_BSIZE0_SHIFT;
2058
2059 switch (adapter->rx_ps_pages) {
2060 case 3:
2061 psrctl |= PAGE_SIZE <<
2062 E1000_PSRCTL_BSIZE3_SHIFT;
2063 case 2:
2064 psrctl |= PAGE_SIZE <<
2065 E1000_PSRCTL_BSIZE2_SHIFT;
2066 case 1:
2067 psrctl |= PAGE_SIZE >>
2068 E1000_PSRCTL_BSIZE1_SHIFT;
2069 break;
2070 }
2071
2072 ew32(PSRCTL, psrctl);
2073 }
2074
2075 ew32(RCTL, rctl);
318a94d6
JK		 2076 /* just started the receive unit, no need to restart */
2077 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2078}
2079
2080/**
2081 * e1000_configure_rx - Configure Receive Unit after Reset
2082 * @adapter: board private structure
2083 *
2084 * Configure the Rx unit of the MAC after a reset.
2085 **/
2086static void e1000_configure_rx(struct e1000_adapter *adapter)
2087{
2088 struct e1000_hw *hw = &adapter->hw;
2089 struct e1000_ring *rx_ring = adapter->rx_ring;
2090 u64 rdba;
2091 u32 rdlen, rctl, rxcsum, ctrl_ext;
2092
2093 if (adapter->rx_ps_pages) {
2094 /* this is a 32 byte descriptor */
2095 rdlen = rx_ring->count *
2096 sizeof(union e1000_rx_desc_packet_split);
2097 adapter->clean_rx = e1000_clean_rx_irq_ps;
2098 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2099 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2100 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2101 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2102 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2103 } else {
97ac8cae 2104 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2105 adapter->clean_rx = e1000_clean_rx_irq;
2106 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2107 }
2108
2109 /* disable receives while setting up the descriptors */
2110 rctl = er32(RCTL);
2111 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2112 e1e_flush();
2113 msleep(10);
2114
2115 /* set the Receive Delay Timer Register */
2116 ew32(RDTR, adapter->rx_int_delay);
2117
2118 /* irq moderation */
2119 ew32(RADV, adapter->rx_abs_int_delay);
2120 if (adapter->itr_setting != 0)
ad68076e 2121 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2122
2123 ctrl_ext = er32(CTRL_EXT);
2124 /* Reset delay timers after every interrupt */
2125 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2126 /* Auto-Mask interrupts upon ICR access */
2127 ctrl_ext |= E1000_CTRL_EXT_IAME;
2128 ew32(IAM, 0xffffffff);
2129 ew32(CTRL_EXT, ctrl_ext);
2130 e1e_flush();
2131
ad68076e
BA		 2132 /*
2133 * Setup the HW Rx Head and Tail Descriptor Pointers and
2134 * the Base and Length of the Rx Descriptor Ring
2135 */
bc7f75fa
AK		 2136 rdba = rx_ring->dma;
2137 ew32(RDBAL, (rdba & DMA_32BIT_MASK));
2138 ew32(RDBAH, (rdba >> 32));
2139 ew32(RDLEN, rdlen);
2140 ew32(RDH, 0);
2141 ew32(RDT, 0);
2142 rx_ring->head = E1000_RDH;
2143 rx_ring->tail = E1000_RDT;
2144
2145 /* Enable Receive Checksum Offload for TCP and UDP */
2146 rxcsum = er32(RXCSUM);
2147 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2148 rxcsum |= E1000_RXCSUM_TUOFL;
2149
ad68076e
BA		 2150 /*
2151 * IPv4 payload checksum for UDP fragments must be
2152 * used in conjunction with packet-split.
2153 */
bc7f75fa
AK		 2154 if (adapter->rx_ps_pages)
2155 rxcsum |= E1000_RXCSUM_IPPCSE;
2156 } else {
2157 rxcsum &= ~E1000_RXCSUM_TUOFL;
2158 /* no need to clear IPPCSE as it defaults to 0 */
2159 }
2160 ew32(RXCSUM, rxcsum);
2161
ad68076e
BA		 2162 /*
2163 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2164 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2165 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2166 */
bc7f75fa 2167 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2168 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2169 u32 rxdctl = er32(RXDCTL(0));
2170 ew32(RXDCTL(0), rxdctl | 0x3);
2171 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2172 /*
2173 * With jumbo frames and early-receive enabled, excessive
2174 * C4->C2 latencies result in dropped transactions.
2175 */
2176 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2177 e1000e_driver_name, 55);
2178 } else {
2179 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2180 e1000e_driver_name,
2181 PM_QOS_DEFAULT_VALUE);
2182 }
bc7f75fa
AK		 2183
2184 /* Enable Receives */
2185 ew32(RCTL, rctl);
2186}
2187
2188/**
e2de3eb6 2189 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2190 * @hw: pointer to the HW structure
2191 * @mc_addr_list: array of multicast addresses to program
2192 * @mc_addr_count: number of multicast addresses to program
2193 * @rar_used_count: the first RAR register free to program
2194 * @rar_count: total number of supported Receive Address Registers
2195 *
2196 * Updates the Receive Address Registers and Multicast Table Array.
2197 * The caller must have a packed mc_addr_list of multicast addresses.
2198 * The parameter rar_count will usually be hw->mac.rar_entry_count
2199 * unless there are workarounds that change this. Currently no func pointer
2200 * exists and all implementations are handled in the generic version of this
2201 * function.
2202 **/
e2de3eb6
JK		 2203static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2204 u32 mc_addr_count, u32 rar_used_count,
2205 u32 rar_count)
bc7f75fa 2206{
e2de3eb6 2207 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2208 rar_used_count, rar_count);
2209}
2210
2211/**
2212 * e1000_set_multi - Multicast and Promiscuous mode set
2213 * @netdev: network interface device structure
2214 *
2215 * The set_multi entry point is called whenever the multicast address
2216 * list or the network interface flags are updated. This routine is
2217 * responsible for configuring the hardware for proper multicast,
2218 * promiscuous mode, and all-multi behavior.
2219 **/
2220static void e1000_set_multi(struct net_device *netdev)
2221{
2222 struct e1000_adapter *adapter = netdev_priv(netdev);
2223 struct e1000_hw *hw = &adapter->hw;
2224 struct e1000_mac_info *mac = &hw->mac;
2225 struct dev_mc_list *mc_ptr;
2226 u8 *mta_list;
2227 u32 rctl;
2228 int i;
2229
2230 /* Check for Promiscuous and All Multicast modes */
2231
2232 rctl = er32(RCTL);
2233
2234 if (netdev->flags & IFF_PROMISC) {
2235 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2236 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2237 } else {
746b9f02
PM		 2238 if (netdev->flags & IFF_ALLMULTI) {
2239 rctl |= E1000_RCTL_MPE;
2240 rctl &= ~E1000_RCTL_UPE;
2241 } else {
2242 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2243 }
78ed11a5 2244 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2245 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2246 }
2247
2248 ew32(RCTL, rctl);
2249
2250 if (netdev->mc_count) {
2251 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2252 if (!mta_list)
2253 return;
2254
2255 /* prepare a packed array of only addresses. */
2256 mc_ptr = netdev->mc_list;
2257
2258 for (i = 0; i < netdev->mc_count; i++) {
2259 if (!mc_ptr)
2260 break;
2261 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2262 ETH_ALEN);
2263 mc_ptr = mc_ptr->next;
2264 }
2265
e2de3eb6 2266 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2267 mac->rar_entry_count);
2268 kfree(mta_list);
2269 } else {
2270 /*
2271 * if we're called from probe, we might not have
2272 * anything to do here, so clear out the list
2273 */
e2de3eb6 2274 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2275 }
2276}
2277
2278/**
ad68076e 2279 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2280 * @adapter: private board structure
2281 **/
2282static void e1000_configure(struct e1000_adapter *adapter)
2283{
2284 e1000_set_multi(adapter->netdev);
2285
2286 e1000_restore_vlan(adapter);
2287 e1000_init_manageability(adapter);
2288
2289 e1000_configure_tx(adapter);
2290 e1000_setup_rctl(adapter);
2291 e1000_configure_rx(adapter);
ad68076e 2292 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2293}
2294
2295/**
2296 * e1000e_power_up_phy - restore link in case the phy was powered down
2297 * @adapter: address of board private structure
2298 *
2299 * The phy may be powered down to save power and turn off link when the
2300 * driver is unloaded and wake on lan is not enabled (among others)
2301 * *** this routine MUST be followed by a call to e1000e_reset ***
2302 **/
2303void e1000e_power_up_phy(struct e1000_adapter *adapter)
2304{
2305 u16 mii_reg = 0;
2306
2307 /* Just clear the power down bit to wake the phy back up */
318a94d6 2308 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2309 /*
2310 * According to the manual, the phy will retain its
2311 * settings across a power-down/up cycle
2312 */
bc7f75fa
AK		 2313 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2314 mii_reg &= ~MII_CR_POWER_DOWN;
2315 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2316 }
2317
2318 adapter->hw.mac.ops.setup_link(&adapter->hw);
2319}
2320
2321/**
2322 * e1000_power_down_phy - Power down the PHY
2323 *
2324 * Power down the PHY so no link is implied when interface is down
2325 * The PHY cannot be powered down is management or WoL is active
2326 */
2327static void e1000_power_down_phy(struct e1000_adapter *adapter)
2328{
2329 struct e1000_hw *hw = &adapter->hw;
2330 u16 mii_reg;
2331
2332 /* WoL is enabled */
23b66e2b 2333 if (adapter->wol)
bc7f75fa
AK		 2334 return;
2335
2336 /* non-copper PHY? */
318a94d6 2337 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2338 return;
2339
2340 /* reset is blocked because of a SoL/IDER session */
ad68076e 2341 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2342 return;
2343
489815ce 2344 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2345 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2346 return;
2347
2348 /* power down the PHY */
2349 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2350 mii_reg |= MII_CR_POWER_DOWN;
2351 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2352 mdelay(1);
2353}
2354
2355/**
2356 * e1000e_reset - bring the hardware into a known good state
2357 *
2358 * This function boots the hardware and enables some settings that
2359 * require a configuration cycle of the hardware - those cannot be
2360 * set/changed during runtime. After reset the device needs to be
ad68076e 2361 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2362 */
2363void e1000e_reset(struct e1000_adapter *adapter)
2364{
2365 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2366 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2367 struct e1000_hw *hw = &adapter->hw;
2368 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2369 u32 pba = adapter->pba;
bc7f75fa
AK		 2370 u16 hwm;
2371
ad68076e 2372 /* reset Packet Buffer Allocation to default */
318a94d6 2373 ew32(PBA, pba);
df762464 2374
318a94d6 2375 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2376 /*
2377 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2378 * large enough to accommodate two full transmit packets,
2379 * rounded up to the next 1KB and expressed in KB. Likewise,
2380 * the Rx FIFO should be large enough to accommodate at least
2381 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2382 * expressed in KB.
2383 */
df762464 2384 pba = er32(PBA);
bc7f75fa 2385 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2386 tx_space = pba >> 16;
bc7f75fa 2387 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2388 pba &= 0xffff;
ad68076e
BA		 2389 /*
2390 * the Tx fifo also stores 16 bytes of information about the tx
2391 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2392 */
2393 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2394 sizeof(struct e1000_tx_desc) -
2395 ETH_FCS_LEN) * 2;
2396 min_tx_space = ALIGN(min_tx_space, 1024);
2397 min_tx_space >>= 10;
2398 /* software strips receive CRC, so leave room for it */
318a94d6 2399 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2400 min_rx_space = ALIGN(min_rx_space, 1024);
2401 min_rx_space >>= 10;
2402
ad68076e
BA		 2403 /*
2404 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2405 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2406 * allocation, take space away from current Rx allocation
2407 */
df762464
AK		 2408 if ((tx_space < min_tx_space) &&
2409 ((min_tx_space - tx_space) < pba)) {
2410 pba -= min_tx_space - tx_space;
bc7f75fa 2411
ad68076e
BA		 2412 /*
2413 * if short on Rx space, Rx wins and must trump tx
2414 * adjustment or use Early Receive if available
2415 */
df762464 2416 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2417 (!(adapter->flags & FLAG_HAS_ERT)))
2418 /* ERT enabled in e1000_configure_rx */
df762464 2419 pba = min_rx_space;
bc7f75fa 2420 }
df762464
AK		 2421
2422 ew32(PBA, pba);
bc7f75fa
AK		 2423 }
2424
bc7f75fa 2425
ad68076e
BA		 2426 /*
2427 * flow control settings
2428 *
2429 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2430 * (or the size used for early receive) above it in the Rx FIFO.
2431 * Set it to the lower of:
2432 * - 90% of the Rx FIFO size, and
2433 * - the full Rx FIFO size minus the early receive size (for parts
2434 * with ERT support assuming ERT set to E1000_ERT_2048), or
ad68076e
BA		 2435 * - the full Rx FIFO size minus one full frame
2436 */
bc7f75fa 2437 if (adapter->flags & FLAG_HAS_ERT)
318a94d6
JK		 2438 hwm = min(((pba << 10) * 9 / 10),
2439 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2440 else
318a94d6
JK		 2441 hwm = min(((pba << 10) * 9 / 10),
2442 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2443
318a94d6
JK		 2444 fc->high_water = hwm & 0xFFF8; /* 8-byte granularity */
2445 fc->low_water = fc->high_water - 8;
bc7f75fa
AK		 2446
2447 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2448 fc->pause_time = 0xFFFF;
bc7f75fa 2449 else
318a94d6
JK		 2450 fc->pause_time = E1000_FC_PAUSE_TIME;
2451 fc->send_xon = 1;
2452 fc->type = fc->original_type;
bc7f75fa
AK		 2453
2454 /* Allow time for pending master requests to run */
2455 mac->ops.reset_hw(hw);
97ac8cae
BA		 2456
2457 /*
2458 * For parts with AMT enabled, let the firmware know
2459 * that the network interface is in control
2460 */
c43bc57e 2461 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2462 e1000_get_hw_control(adapter);
2463
bc7f75fa
AK		 2464 ew32(WUC, 0);
2465
2466 if (mac->ops.init_hw(hw))
44defeb3 2467 e_err("Hardware Error\n");
bc7f75fa
AK		 2468
2469 e1000_update_mng_vlan(adapter);
2470
2471 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2472 ew32(VET, ETH_P_8021Q);
2473
2474 e1000e_reset_adaptive(hw);
2475 e1000_get_phy_info(hw);
2476
2477 if (!(adapter->flags & FLAG_SMART_POWER_DOWN)) {
2478 u16 phy_data = 0;
ad68076e
BA		 2479 /*
2480 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2481 * the return value of this function because there is nothing
ad68076e
BA		 2482 * different we would do if it failed
2483 */
bc7f75fa
AK		 2484 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2485 phy_data &= ~IGP02E1000_PM_SPD;
2486 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2487 }
bc7f75fa
AK		 2488}
2489
2490int e1000e_up(struct e1000_adapter *adapter)
2491{
2492 struct e1000_hw *hw = &adapter->hw;
2493
2494 /* hardware has been reset, we need to reload some things */
2495 e1000_configure(adapter);
2496
2497 clear_bit(__E1000_DOWN, &adapter->state);
2498
2499 napi_enable(&adapter->napi);
2500 e1000_irq_enable(adapter);
2501
2502 /* fire a link change interrupt to start the watchdog */
2503 ew32(ICS, E1000_ICS_LSC);
2504 return 0;
2505}
2506
2507void e1000e_down(struct e1000_adapter *adapter)
2508{
2509 struct net_device *netdev = adapter->netdev;
2510 struct e1000_hw *hw = &adapter->hw;
2511 u32 tctl, rctl;
2512
ad68076e
BA		 2513 /*
2514 * signal that we're down so the interrupt handler does not
2515 * reschedule our watchdog timer
2516 */
bc7f75fa
AK		 2517 set_bit(__E1000_DOWN, &adapter->state);
2518
2519 /* disable receives in the hardware */
2520 rctl = er32(RCTL);
2521 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2522 /* flush and sleep below */
2523
d55b53ff 2524 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 2525
2526 /* disable transmits in the hardware */
2527 tctl = er32(TCTL);
2528 tctl &= ~E1000_TCTL_EN;
2529 ew32(TCTL, tctl);
2530 /* flush both disables and wait for them to finish */
2531 e1e_flush();
2532 msleep(10);
2533
2534 napi_disable(&adapter->napi);
2535 e1000_irq_disable(adapter);
2536
2537 del_timer_sync(&adapter->watchdog_timer);
2538 del_timer_sync(&adapter->phy_info_timer);
2539
2540 netdev->tx_queue_len = adapter->tx_queue_len;
2541 netif_carrier_off(netdev);
2542 adapter->link_speed = 0;
2543 adapter->link_duplex = 0;
2544
52cc3086
JK		 2545 if (!pci_channel_offline(adapter->pdev))
2546 e1000e_reset(adapter);
bc7f75fa
AK		 2547 e1000_clean_tx_ring(adapter);
2548 e1000_clean_rx_ring(adapter);
2549
2550 /*
2551 * TODO: for power management, we could drop the link and
2552 * pci_disable_device here.
2553 */
2554}
2555
2556void e1000e_reinit_locked(struct e1000_adapter *adapter)
2557{
2558 might_sleep();
2559 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2560 msleep(1);
2561 e1000e_down(adapter);
2562 e1000e_up(adapter);
2563 clear_bit(__E1000_RESETTING, &adapter->state);
2564}
2565
2566/**
2567 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2568 * @adapter: board private structure to initialize
2569 *
2570 * e1000_sw_init initializes the Adapter private data structure.
2571 * Fields are initialized based on PCI device information and
2572 * OS network device settings (MTU size).
2573 **/
2574static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2575{
bc7f75fa
AK		 2576 struct net_device *netdev = adapter->netdev;
2577
2578 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2579 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2580 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2581 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa
AK		 2582
2583 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2584 if (!adapter->tx_ring)
2585 goto err;
2586
2587 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2588 if (!adapter->rx_ring)
2589 goto err;
2590
2591 spin_lock_init(&adapter->tx_queue_lock);
2592
2593 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2594 e1000_irq_disable(adapter);
2595
2596 spin_lock_init(&adapter->stats_lock);
2597
2598 set_bit(__E1000_DOWN, &adapter->state);
2599 return 0;
2600
2601err:
44defeb3 2602 e_err("Unable to allocate memory for queues\n");
bc7f75fa
AK		 2603 kfree(adapter->rx_ring);
2604 kfree(adapter->tx_ring);
2605 return -ENOMEM;
2606}
2607
f8d59f78
BA		 2608/**
2609 * e1000_intr_msi_test - Interrupt Handler
2610 * @irq: interrupt number
2611 * @data: pointer to a network interface device structure
2612 **/
2613static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2614{
2615 struct net_device *netdev = data;
2616 struct e1000_adapter *adapter = netdev_priv(netdev);
2617 struct e1000_hw *hw = &adapter->hw;
2618 u32 icr = er32(ICR);
2619
2620 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2621 if (icr & E1000_ICR_RXSEQ) {
2622 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2623 wmb();
2624 }
2625
2626 return IRQ_HANDLED;
2627}
2628
2629/**
2630 * e1000_test_msi_interrupt - Returns 0 for successful test
2631 * @adapter: board private struct
2632 *
2633 * code flow taken from tg3.c
2634 **/
2635static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2636{
2637 struct net_device *netdev = adapter->netdev;
2638 struct e1000_hw *hw = &adapter->hw;
2639 int err;
2640
2641 /* poll_enable hasn't been called yet, so don't need disable */
2642 /* clear any pending events */
2643 er32(ICR);
2644
2645 /* free the real vector and request a test handler */
2646 e1000_free_irq(adapter);
2647
2648 /* Assume that the test fails, if it succeeds then the test
2649 * MSI irq handler will unset this flag */
2650 adapter->flags |= FLAG_MSI_TEST_FAILED;
2651
2652 err = pci_enable_msi(adapter->pdev);
2653 if (err)
2654 goto msi_test_failed;
2655
2656 err = request_irq(adapter->pdev->irq, &e1000_intr_msi_test, 0,
2657 netdev->name, netdev);
2658 if (err) {
2659 pci_disable_msi(adapter->pdev);
2660 goto msi_test_failed;
2661 }
2662
2663 wmb();
2664
2665 e1000_irq_enable(adapter);
2666
2667 /* fire an unusual interrupt on the test handler */
2668 ew32(ICS, E1000_ICS_RXSEQ);
2669 e1e_flush();
2670 msleep(50);
2671
2672 e1000_irq_disable(adapter);
2673
2674 rmb();
2675
2676 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
2677 err = -EIO;
2678 e_info("MSI interrupt test failed!\n");
2679 }
2680
2681 free_irq(adapter->pdev->irq, netdev);
2682 pci_disable_msi(adapter->pdev);
2683
2684 if (err == -EIO)
2685 goto msi_test_failed;
2686
2687 /* okay so the test worked, restore settings */
2688 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
2689msi_test_failed:
2690 /* restore the original vector, even if it failed */
2691 e1000_request_irq(adapter);
2692 return err;
2693}
2694
2695/**
2696 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
2697 * @adapter: board private struct
2698 *
2699 * code flow taken from tg3.c, called with e1000 interrupts disabled.
2700 **/
2701static int e1000_test_msi(struct e1000_adapter *adapter)
2702{
2703 int err;
2704 u16 pci_cmd;
2705
2706 if (!(adapter->flags & FLAG_MSI_ENABLED))
2707 return 0;
2708
2709 /* disable SERR in case the MSI write causes a master abort */
2710 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
2711 pci_write_config_word(adapter->pdev, PCI_COMMAND,
2712 pci_cmd & ~PCI_COMMAND_SERR);
2713
2714 err = e1000_test_msi_interrupt(adapter);
2715
2716 /* restore previous setting of command word */
2717 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
2718
2719 /* success ! */
2720 if (!err)
2721 return 0;
2722
2723 /* EIO means MSI test failed */
2724 if (err != -EIO)
2725 return err;
2726
2727 /* back to INTx mode */
2728 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
2729
2730 e1000_free_irq(adapter);
2731
2732 err = e1000_request_irq(adapter);
2733
2734 return err;
2735}
2736
bc7f75fa
AK		 2737/**
2738 * e1000_open - Called when a network interface is made active
2739 * @netdev: network interface device structure
2740 *
2741 * Returns 0 on success, negative value on failure
2742 *
2743 * The open entry point is called when a network interface is made
2744 * active by the system (IFF_UP). At this point all resources needed
2745 * for transmit and receive operations are allocated, the interrupt
2746 * handler is registered with the OS, the watchdog timer is started,
2747 * and the stack is notified that the interface is ready.
2748 **/
2749static int e1000_open(struct net_device *netdev)
2750{
2751 struct e1000_adapter *adapter = netdev_priv(netdev);
2752 struct e1000_hw *hw = &adapter->hw;
2753 int err;
2754
2755 /* disallow open during test */
2756 if (test_bit(__E1000_TESTING, &adapter->state))
2757 return -EBUSY;
2758
2759 /* allocate transmit descriptors */
2760 err = e1000e_setup_tx_resources(adapter);
2761 if (err)
2762 goto err_setup_tx;
2763
2764 /* allocate receive descriptors */
2765 err = e1000e_setup_rx_resources(adapter);
2766 if (err)
2767 goto err_setup_rx;
2768
2769 e1000e_power_up_phy(adapter);
2770
2771 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2772 if ((adapter->hw.mng_cookie.status &
2773 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
2774 e1000_update_mng_vlan(adapter);
2775
ad68076e
BA		 2776 /*
2777 * If AMT is enabled, let the firmware know that the network
2778 * interface is now open
2779 */
c43bc57e 2780 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 2781 e1000_get_hw_control(adapter);
2782
ad68076e
BA		 2783 /*
2784 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 2785 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
2786 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 2787 * clean_rx handler before we do so.
2788 */
bc7f75fa
AK		 2789 e1000_configure(adapter);
2790
2791 err = e1000_request_irq(adapter);
2792 if (err)
2793 goto err_req_irq;
2794
f8d59f78
BA		 2795 /*
2796 * Work around PCIe errata with MSI interrupts causing some chipsets to
2797 * ignore e1000e MSI messages, which means we need to test our MSI
2798 * interrupt now
2799 */
2800 {
2801 err = e1000_test_msi(adapter);
2802 if (err) {
2803 e_err("Interrupt allocation failed\n");
2804 goto err_req_irq;
2805 }
2806 }
2807
bc7f75fa
AK		 2808 /* From here on the code is the same as e1000e_up() */
2809 clear_bit(__E1000_DOWN, &adapter->state);
2810
2811 napi_enable(&adapter->napi);
2812
2813 e1000_irq_enable(adapter);
2814
d55b53ff
JK		 2815 netif_tx_start_all_queues(netdev);
2816
bc7f75fa
AK		 2817 /* fire a link status change interrupt to start the watchdog */
2818 ew32(ICS, E1000_ICS_LSC);
2819
2820 return 0;
2821
2822err_req_irq:
2823 e1000_release_hw_control(adapter);
2824 e1000_power_down_phy(adapter);
2825 e1000e_free_rx_resources(adapter);
2826err_setup_rx:
2827 e1000e_free_tx_resources(adapter);
2828err_setup_tx:
2829 e1000e_reset(adapter);
2830
2831 return err;
2832}
2833
2834/**
2835 * e1000_close - Disables a network interface
2836 * @netdev: network interface device structure
2837 *
2838 * Returns 0, this is not allowed to fail
2839 *
2840 * The close entry point is called when an interface is de-activated
2841 * by the OS. The hardware is still under the drivers control, but
2842 * needs to be disabled. A global MAC reset is issued to stop the
2843 * hardware, and all transmit and receive resources are freed.
2844 **/
2845static int e1000_close(struct net_device *netdev)
2846{
2847 struct e1000_adapter *adapter = netdev_priv(netdev);
2848
2849 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
2850 e1000e_down(adapter);
2851 e1000_power_down_phy(adapter);
2852 e1000_free_irq(adapter);
2853
2854 e1000e_free_tx_resources(adapter);
2855 e1000e_free_rx_resources(adapter);
2856
ad68076e
BA		 2857 /*
2858 * kill manageability vlan ID if supported, but not if a vlan with
2859 * the same ID is registered on the host OS (let 8021q kill it)
2860 */
bc7f75fa
AK		 2861 if ((adapter->hw.mng_cookie.status &
2862 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2863 !(adapter->vlgrp &&
2864 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
2865 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2866
ad68076e
BA		 2867 /*
2868 * If AMT is enabled, let the firmware know that the network
2869 * interface is now closed
2870 */
c43bc57e 2871 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 2872 e1000_release_hw_control(adapter);
2873
2874 return 0;
2875}
2876/**
2877 * e1000_set_mac - Change the Ethernet Address of the NIC
2878 * @netdev: network interface device structure
2879 * @p: pointer to an address structure
2880 *
2881 * Returns 0 on success, negative on failure
2882 **/
2883static int e1000_set_mac(struct net_device *netdev, void *p)
2884{
2885 struct e1000_adapter *adapter = netdev_priv(netdev);
2886 struct sockaddr *addr = p;
2887
2888 if (!is_valid_ether_addr(addr->sa_data))
2889 return -EADDRNOTAVAIL;
2890
2891 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2892 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2893
2894 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
2895
2896 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
2897 /* activate the work around */
2898 e1000e_set_laa_state_82571(&adapter->hw, 1);
2899
ad68076e
BA		 2900 /*
2901 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 2902 * between the time RAR[0] gets clobbered and the time it
2903 * gets fixed (in e1000_watchdog), the actual LAA is in one
2904 * of the RARs and no incoming packets directed to this port
2905 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 2906 * RAR[14]
2907 */
bc7f75fa
AK		 2908 e1000e_rar_set(&adapter->hw,
2909 adapter->hw.mac.addr,
2910 adapter->hw.mac.rar_entry_count - 1);
2911 }
2912
2913 return 0;
2914}
2915
ad68076e
BA		 2916/*
2917 * Need to wait a few seconds after link up to get diagnostic information from
2918 * the phy
2919 */
bc7f75fa
AK		 2920static void e1000_update_phy_info(unsigned long data)
2921{
2922 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2923 e1000_get_phy_info(&adapter->hw);
2924}
2925
2926/**
2927 * e1000e_update_stats - Update the board statistics counters
2928 * @adapter: board private structure
2929 **/
2930void e1000e_update_stats(struct e1000_adapter *adapter)
2931{
2932 struct e1000_hw *hw = &adapter->hw;
2933 struct pci_dev *pdev = adapter->pdev;
2934 unsigned long irq_flags;
2935 u16 phy_tmp;
2936
2937#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
2938
2939 /*
2940 * Prevent stats update while adapter is being reset, or if the pci
2941 * connection is down.
2942 */
2943 if (adapter->link_speed == 0)
2944 return;
2945 if (pci_channel_offline(pdev))
2946 return;
2947
2948 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
2949
ad68076e
BA		 2950 /*
2951 * these counters are modified from e1000_adjust_tbi_stats,
bc7f75fa
AK		 2952 * called from the interrupt context, so they must only
2953 * be written while holding adapter->stats_lock
2954 */
2955
2956 adapter->stats.crcerrs += er32(CRCERRS);
2957 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 2958 adapter->stats.gorc += er32(GORCL);
2959 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 2960 adapter->stats.bprc += er32(BPRC);
2961 adapter->stats.mprc += er32(MPRC);
2962 adapter->stats.roc += er32(ROC);
2963
bc7f75fa
AK		 2964 adapter->stats.mpc += er32(MPC);
2965 adapter->stats.scc += er32(SCC);
2966 adapter->stats.ecol += er32(ECOL);
2967 adapter->stats.mcc += er32(MCC);
2968 adapter->stats.latecol += er32(LATECOL);
2969 adapter->stats.dc += er32(DC);
bc7f75fa
AK		 2970 adapter->stats.xonrxc += er32(XONRXC);
2971 adapter->stats.xontxc += er32(XONTXC);
2972 adapter->stats.xoffrxc += er32(XOFFRXC);
2973 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 2974 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 2975 adapter->stats.gotc += er32(GOTCL);
2976 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 2977 adapter->stats.rnbc += er32(RNBC);
2978 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 2979
2980 adapter->stats.mptc += er32(MPTC);
2981 adapter->stats.bptc += er32(BPTC);
2982
2983 /* used for adaptive IFS */
2984
2985 hw->mac.tx_packet_delta = er32(TPT);
2986 adapter->stats.tpt += hw->mac.tx_packet_delta;
2987 hw->mac.collision_delta = er32(COLC);
2988 adapter->stats.colc += hw->mac.collision_delta;
2989
2990 adapter->stats.algnerrc += er32(ALGNERRC);
2991 adapter->stats.rxerrc += er32(RXERRC);
2992 adapter->stats.tncrs += er32(TNCRS);
2993 adapter->stats.cexterr += er32(CEXTERR);
2994 adapter->stats.tsctc += er32(TSCTC);
2995 adapter->stats.tsctfc += er32(TSCTFC);
2996
bc7f75fa 2997 /* Fill out the OS statistics structure */
bc7f75fa
AK		 2998 adapter->net_stats.multicast = adapter->stats.mprc;
2999 adapter->net_stats.collisions = adapter->stats.colc;
3000
3001 /* Rx Errors */
3002
ad68076e
BA		 3003 /*
3004 * RLEC on some newer hardware can be incorrect so build
3005 * our own version based on RUC and ROC
3006 */
bc7f75fa
AK		 3007 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3008 adapter->stats.crcerrs + adapter->stats.algnerrc +
3009 adapter->stats.ruc + adapter->stats.roc +
3010 adapter->stats.cexterr;
3011 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3012 adapter->stats.roc;
3013 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3014 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3015 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3016
3017 /* Tx Errors */
3018 adapter->net_stats.tx_errors = adapter->stats.ecol +
3019 adapter->stats.latecol;
3020 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3021 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3022 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3023
3024 /* Tx Dropped needs to be maintained elsewhere */
3025
3026 /* Phy Stats */
318a94d6 3027 if (hw->phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 3028 if ((adapter->link_speed == SPEED_1000) &&
3029 (!e1e_rphy(hw, PHY_1000T_STATUS, &phy_tmp))) {
3030 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3031 adapter->phy_stats.idle_errors += phy_tmp;
3032 }
3033 }
3034
3035 /* Management Stats */
3036 adapter->stats.mgptc += er32(MGTPTC);
3037 adapter->stats.mgprc += er32(MGTPRC);
3038 adapter->stats.mgpdc += er32(MGTPDC);
3039
3040 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
3041}
3042
7c25769f
BA		 3043/**
3044 * e1000_phy_read_status - Update the PHY register status snapshot
3045 * @adapter: board private structure
3046 **/
3047static void e1000_phy_read_status(struct e1000_adapter *adapter)
3048{
3049 struct e1000_hw *hw = &adapter->hw;
3050 struct e1000_phy_regs *phy = &adapter->phy_regs;
3051 int ret_val;
3052 unsigned long irq_flags;
3053
3054
3055 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
3056
3057 if ((er32(STATUS) & E1000_STATUS_LU) &&
3058 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3059 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3060 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3061 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3062 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3063 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3064 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3065 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3066 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3067 if (ret_val)
44defeb3 3068 e_warn("Error reading PHY register\n");
7c25769f
BA		 3069 } else {
3070 /*
3071 * Do not read PHY registers if link is not up
3072 * Set values to typical power-on defaults
3073 */
3074 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3075 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3076 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3077 BMSR_ERCAP);
3078 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3079 ADVERTISE_ALL | ADVERTISE_CSMA);
3080 phy->lpa = 0;
3081 phy->expansion = EXPANSION_ENABLENPAGE;
3082 phy->ctrl1000 = ADVERTISE_1000FULL;
3083 phy->stat1000 = 0;
3084 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3085 }
3086
3087 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
3088}
3089
bc7f75fa
AK		 3090static void e1000_print_link_info(struct e1000_adapter *adapter)
3091{
bc7f75fa
AK		 3092 struct e1000_hw *hw = &adapter->hw;
3093 u32 ctrl = er32(CTRL);
3094
44defeb3
JK		 3095 e_info("Link is Up %d Mbps %s, Flow Control: %s\n",
3096 adapter->link_speed,
3097 (adapter->link_duplex == FULL_DUPLEX) ?
3098 "Full Duplex" : "Half Duplex",
3099 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3100 "RX/TX" :
3101 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3102 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3103}
3104
318a94d6
JK		 3105static bool e1000_has_link(struct e1000_adapter *adapter)
3106{
3107 struct e1000_hw *hw = &adapter->hw;
3108 bool link_active = 0;
3109 s32 ret_val = 0;
3110
3111 /*
3112 * get_link_status is set on LSC (link status) interrupt or
3113 * Rx sequence error interrupt. get_link_status will stay
3114 * false until the check_for_link establishes link
3115 * for copper adapters ONLY
3116 */
3117 switch (hw->phy.media_type) {
3118 case e1000_media_type_copper:
3119 if (hw->mac.get_link_status) {
3120 ret_val = hw->mac.ops.check_for_link(hw);
3121 link_active = !hw->mac.get_link_status;
3122 } else {
3123 link_active = 1;
3124 }
3125 break;
3126 case e1000_media_type_fiber:
3127 ret_val = hw->mac.ops.check_for_link(hw);
3128 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3129 break;
3130 case e1000_media_type_internal_serdes:
3131 ret_val = hw->mac.ops.check_for_link(hw);
3132 link_active = adapter->hw.mac.serdes_has_link;
3133 break;
3134 default:
3135 case e1000_media_type_unknown:
3136 break;
3137 }
3138
3139 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3140 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3141 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3142 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3143 }
3144
3145 return link_active;
3146}
3147
3148static void e1000e_enable_receives(struct e1000_adapter *adapter)
3149{
3150 /* make sure the receive unit is started */
3151 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3152 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3153 struct e1000_hw *hw = &adapter->hw;
3154 u32 rctl = er32(RCTL);
3155 ew32(RCTL, rctl | E1000_RCTL_EN);
3156 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3157 }
3158}
3159
bc7f75fa
AK		 3160/**
3161 * e1000_watchdog - Timer Call-back
3162 * @data: pointer to adapter cast into an unsigned long
3163 **/
3164static void e1000_watchdog(unsigned long data)
3165{
3166 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3167
3168 /* Do the rest outside of interrupt context */
3169 schedule_work(&adapter->watchdog_task);
3170
3171 /* TODO: make this use queue_delayed_work() */
3172}
3173
3174static void e1000_watchdog_task(struct work_struct *work)
3175{
3176 struct e1000_adapter *adapter = container_of(work,
3177 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3178 struct net_device *netdev = adapter->netdev;
3179 struct e1000_mac_info *mac = &adapter->hw.mac;
3180 struct e1000_ring *tx_ring = adapter->tx_ring;
3181 struct e1000_hw *hw = &adapter->hw;
3182 u32 link, tctl;
bc7f75fa
AK		 3183 int tx_pending = 0;
3184
318a94d6
JK		 3185 link = e1000_has_link(adapter);
3186 if ((netif_carrier_ok(netdev)) && link) {
3187 e1000e_enable_receives(adapter);
bc7f75fa 3188 goto link_up;
bc7f75fa
AK		 3189 }
3190
3191 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3192 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3193 e1000_update_mng_vlan(adapter);
3194
bc7f75fa
AK		 3195 if (link) {
3196 if (!netif_carrier_ok(netdev)) {
3197 bool txb2b = 1;
318a94d6 3198 /* update snapshot of PHY registers on LSC */
7c25769f 3199 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3200 mac->ops.get_link_up_info(&adapter->hw,
3201 &adapter->link_speed,
3202 &adapter->link_duplex);
3203 e1000_print_link_info(adapter);
f4187b56
BA		 3204 /*
3205 * On supported PHYs, check for duplex mismatch only
3206 * if link has autonegotiated at 10/100 half
3207 */
3208 if ((hw->phy.type == e1000_phy_igp_3 ||
3209 hw->phy.type == e1000_phy_bm) &&
3210 (hw->mac.autoneg == true) &&
3211 (adapter->link_speed == SPEED_10 ||
3212 adapter->link_speed == SPEED_100) &&
3213 (adapter->link_duplex == HALF_DUPLEX)) {
3214 u16 autoneg_exp;
3215
3216 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3217
3218 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3219 e_info("Autonegotiated half duplex but"
3220 " link partner cannot autoneg. "
3221 " Try forcing full duplex if "
3222 "link gets many collisions.\n");
3223 }
3224
ad68076e
BA		 3225 /*
3226 * tweak tx_queue_len according to speed/duplex
3227 * and adjust the timeout factor
3228 */
bc7f75fa
AK		 3229 netdev->tx_queue_len = adapter->tx_queue_len;
3230 adapter->tx_timeout_factor = 1;
3231 switch (adapter->link_speed) {
3232 case SPEED_10:
3233 txb2b = 0;
3234 netdev->tx_queue_len = 10;
10f1b492 3235 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3236 break;
3237 case SPEED_100:
3238 txb2b = 0;
3239 netdev->tx_queue_len = 100;
3240 /* maybe add some timeout factor ? */
3241 break;
3242 }
3243
ad68076e
BA		 3244 /*
3245 * workaround: re-program speed mode bit after
3246 * link-up event
3247 */
bc7f75fa
AK		 3248 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3249 !txb2b) {
3250 u32 tarc0;
e9ec2c0f 3251 tarc0 = er32(TARC(0));
bc7f75fa 3252 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3253 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3254 }
3255
ad68076e
BA		 3256 /*
3257 * disable TSO for pcie and 10/100 speeds, to avoid
3258 * some hardware issues
3259 */
bc7f75fa
AK		 3260 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3261 switch (adapter->link_speed) {
3262 case SPEED_10:
3263 case SPEED_100:
44defeb3 3264 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3265 netdev->features &= ~NETIF_F_TSO;
3266 netdev->features &= ~NETIF_F_TSO6;
3267 break;
3268 case SPEED_1000:
3269 netdev->features |= NETIF_F_TSO;
3270 netdev->features |= NETIF_F_TSO6;
3271 break;
3272 default:
3273 /* oops */
3274 break;
3275 }
3276 }
3277
ad68076e
BA		 3278 /*
3279 * enable transmits in the hardware, need to do this
3280 * after setting TARC(0)
3281 */
bc7f75fa
AK		 3282 tctl = er32(TCTL);
3283 tctl |= E1000_TCTL_EN;
3284 ew32(TCTL, tctl);
3285
3286 netif_carrier_on(netdev);
d55b53ff 3287 netif_tx_wake_all_queues(netdev);
bc7f75fa
AK		 3288
3289 if (!test_bit(__E1000_DOWN, &adapter->state))
3290 mod_timer(&adapter->phy_info_timer,
3291 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3292 }
3293 } else {
3294 if (netif_carrier_ok(netdev)) {
3295 adapter->link_speed = 0;
3296 adapter->link_duplex = 0;
44defeb3 3297 e_info("Link is Down\n");
bc7f75fa 3298 netif_carrier_off(netdev);
d55b53ff 3299 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 3300 if (!test_bit(__E1000_DOWN, &adapter->state))
3301 mod_timer(&adapter->phy_info_timer,
3302 round_jiffies(jiffies + 2 * HZ));
3303
3304 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3305 schedule_work(&adapter->reset_task);
3306 }
3307 }
3308
3309link_up:
3310 e1000e_update_stats(adapter);
3311
3312 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3313 adapter->tpt_old = adapter->stats.tpt;
3314 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3315 adapter->colc_old = adapter->stats.colc;
3316
7c25769f
BA		 3317 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3318 adapter->gorc_old = adapter->stats.gorc;
3319 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3320 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3321
3322 e1000e_update_adaptive(&adapter->hw);
3323
3324 if (!netif_carrier_ok(netdev)) {
3325 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3326 tx_ring->count);
3327 if (tx_pending) {
ad68076e
BA		 3328 /*
3329 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3330 * but we've got queued Tx work that's never going
3331 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3332 * (Do the reset outside of interrupt context).
3333 */
bc7f75fa
AK		 3334 adapter->tx_timeout_count++;
3335 schedule_work(&adapter->reset_task);
3336 }
3337 }
3338
ad68076e 3339 /* Cause software interrupt to ensure Rx ring is cleaned */
bc7f75fa
AK		 3340 ew32(ICS, E1000_ICS_RXDMT0);
3341
3342 /* Force detection of hung controller every watchdog period */
3343 adapter->detect_tx_hung = 1;
3344
ad68076e
BA		 3345 /*
3346 * With 82571 controllers, LAA may be overwritten due to controller
3347 * reset from the other port. Set the appropriate LAA in RAR[0]
3348 */
bc7f75fa
AK		 3349 if (e1000e_get_laa_state_82571(hw))
3350 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3351
3352 /* Reset the timer */
3353 if (!test_bit(__E1000_DOWN, &adapter->state))
3354 mod_timer(&adapter->watchdog_timer,
3355 round_jiffies(jiffies + 2 * HZ));
3356}
3357
3358#define E1000_TX_FLAGS_CSUM 0x00000001
3359#define E1000_TX_FLAGS_VLAN 0x00000002
3360#define E1000_TX_FLAGS_TSO 0x00000004
3361#define E1000_TX_FLAGS_IPV4 0x00000008
3362#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3363#define E1000_TX_FLAGS_VLAN_SHIFT 16
3364
3365static int e1000_tso(struct e1000_adapter *adapter,
3366 struct sk_buff *skb)
3367{
3368 struct e1000_ring *tx_ring = adapter->tx_ring;
3369 struct e1000_context_desc *context_desc;
3370 struct e1000_buffer *buffer_info;
3371 unsigned int i;
3372 u32 cmd_length = 0;
3373 u16 ipcse = 0, tucse, mss;
3374 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3375 int err;
3376
3377 if (skb_is_gso(skb)) {
3378 if (skb_header_cloned(skb)) {
3379 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3380 if (err)
3381 return err;
3382 }
3383
3384 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3385 mss = skb_shinfo(skb)->gso_size;
3386 if (skb->protocol == htons(ETH_P_IP)) {
3387 struct iphdr *iph = ip_hdr(skb);
3388 iph->tot_len = 0;
3389 iph->check = 0;
3390 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3391 iph->daddr, 0,
3392 IPPROTO_TCP,
3393 0);
3394 cmd_length = E1000_TXD_CMD_IP;
3395 ipcse = skb_transport_offset(skb) - 1;
3396 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3397 ipv6_hdr(skb)->payload_len = 0;
3398 tcp_hdr(skb)->check =
3399 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3400 &ipv6_hdr(skb)->daddr,
3401 0, IPPROTO_TCP, 0);
3402 ipcse = 0;
3403 }
3404 ipcss = skb_network_offset(skb);
3405 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3406 tucss = skb_transport_offset(skb);
3407 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3408 tucse = 0;
3409
3410 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3411 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3412
3413 i = tx_ring->next_to_use;
3414 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3415 buffer_info = &tx_ring->buffer_info[i];
3416
3417 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3418 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3419 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3420 context_desc->upper_setup.tcp_fields.tucss = tucss;
3421 context_desc->upper_setup.tcp_fields.tucso = tucso;
3422 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3423 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3424 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3425 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3426
3427 buffer_info->time_stamp = jiffies;
3428 buffer_info->next_to_watch = i;
3429
3430 i++;
3431 if (i == tx_ring->count)
3432 i = 0;
3433 tx_ring->next_to_use = i;
3434
3435 return 1;
3436 }
3437
3438 return 0;
3439}
3440
3441static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3442{
3443 struct e1000_ring *tx_ring = adapter->tx_ring;
3444 struct e1000_context_desc *context_desc;
3445 struct e1000_buffer *buffer_info;
3446 unsigned int i;
3447 u8 css;
3448
3449 if (skb->ip_summed == CHECKSUM_PARTIAL) {
3450 css = skb_transport_offset(skb);
3451
3452 i = tx_ring->next_to_use;
3453 buffer_info = &tx_ring->buffer_info[i];
3454 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3455
3456 context_desc->lower_setup.ip_config = 0;
3457 context_desc->upper_setup.tcp_fields.tucss = css;
3458 context_desc->upper_setup.tcp_fields.tucso =
3459 css + skb->csum_offset;
3460 context_desc->upper_setup.tcp_fields.tucse = 0;
3461 context_desc->tcp_seg_setup.data = 0;
3462 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3463
3464 buffer_info->time_stamp = jiffies;
3465 buffer_info->next_to_watch = i;
3466
3467 i++;
3468 if (i == tx_ring->count)
3469 i = 0;
3470 tx_ring->next_to_use = i;
3471
3472 return 1;
3473 }
3474
3475 return 0;
3476}
3477
3478#define E1000_MAX_PER_TXD 8192
3479#define E1000_MAX_TXD_PWR 12
3480
3481static int e1000_tx_map(struct e1000_adapter *adapter,
3482 struct sk_buff *skb, unsigned int first,
3483 unsigned int max_per_txd, unsigned int nr_frags,
3484 unsigned int mss)
3485{
3486 struct e1000_ring *tx_ring = adapter->tx_ring;
3487 struct e1000_buffer *buffer_info;
3488 unsigned int len = skb->len - skb->data_len;
3489 unsigned int offset = 0, size, count = 0, i;
3490 unsigned int f;
3491
3492 i = tx_ring->next_to_use;
3493
3494 while (len) {
3495 buffer_info = &tx_ring->buffer_info[i];
3496 size = min(len, max_per_txd);
3497
3498 /* Workaround for premature desc write-backs
3499 * in TSO mode. Append 4-byte sentinel desc */
3500 if (mss && !nr_frags && size == len && size > 8)
3501 size -= 4;
3502
3503 buffer_info->length = size;
3504 /* set time_stamp *before* dma to help avoid a possible race */
3505 buffer_info->time_stamp = jiffies;
3506 buffer_info->dma =
3507 pci_map_single(adapter->pdev,
3508 skb->data + offset,
3509 size,
3510 PCI_DMA_TODEVICE);
8d8bb39b 3511 if (pci_dma_mapping_error(adapter->pdev, buffer_info->dma)) {
bc7f75fa
AK		 3512 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3513 adapter->tx_dma_failed++;
3514 return -1;
3515 }
3516 buffer_info->next_to_watch = i;
3517
3518 len -= size;
3519 offset += size;
3520 count++;
3521 i++;
3522 if (i == tx_ring->count)
3523 i = 0;
3524 }
3525
3526 for (f = 0; f < nr_frags; f++) {
3527 struct skb_frag_struct *frag;
3528
3529 frag = &skb_shinfo(skb)->frags[f];
3530 len = frag->size;
3531 offset = frag->page_offset;
3532
3533 while (len) {
3534 buffer_info = &tx_ring->buffer_info[i];
3535 size = min(len, max_per_txd);
3536 /* Workaround for premature desc write-backs
3537 * in TSO mode. Append 4-byte sentinel desc */
3538 if (mss && f == (nr_frags-1) && size == len && size > 8)
3539 size -= 4;
3540
3541 buffer_info->length = size;
3542 buffer_info->time_stamp = jiffies;
3543 buffer_info->dma =
3544 pci_map_page(adapter->pdev,
3545 frag->page,
3546 offset,
3547 size,
3548 PCI_DMA_TODEVICE);
8d8bb39b
FT		 3549 if (pci_dma_mapping_error(adapter->pdev,
3550 buffer_info->dma)) {
bc7f75fa
AK		 3551 dev_err(&adapter->pdev->dev,
3552 "TX DMA page map failed\n");
3553 adapter->tx_dma_failed++;
3554 return -1;
3555 }
3556
3557 buffer_info->next_to_watch = i;
3558
3559 len -= size;
3560 offset += size;
3561 count++;
3562
3563 i++;
3564 if (i == tx_ring->count)
3565 i = 0;
3566 }
3567 }
3568
3569 if (i == 0)
3570 i = tx_ring->count - 1;
3571 else
3572 i--;
3573
3574 tx_ring->buffer_info[i].skb = skb;
3575 tx_ring->buffer_info[first].next_to_watch = i;
3576
3577 return count;
3578}
3579
3580static void e1000_tx_queue(struct e1000_adapter *adapter,
3581 int tx_flags, int count)
3582{
3583 struct e1000_ring *tx_ring = adapter->tx_ring;
3584 struct e1000_tx_desc *tx_desc = NULL;
3585 struct e1000_buffer *buffer_info;
3586 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3587 unsigned int i;
3588
3589 if (tx_flags & E1000_TX_FLAGS_TSO) {
3590 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3591 E1000_TXD_CMD_TSE;
3592 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3593
3594 if (tx_flags & E1000_TX_FLAGS_IPV4)
3595 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3596 }
3597
3598 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3599 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3600 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3601 }
3602
3603 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3604 txd_lower |= E1000_TXD_CMD_VLE;
3605 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3606 }
3607
3608 i = tx_ring->next_to_use;
3609
3610 while (count--) {
3611 buffer_info = &tx_ring->buffer_info[i];
3612 tx_desc = E1000_TX_DESC(*tx_ring, i);
3613 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3614 tx_desc->lower.data =
3615 cpu_to_le32(txd_lower | buffer_info->length);
3616 tx_desc->upper.data = cpu_to_le32(txd_upper);
3617
3618 i++;
3619 if (i == tx_ring->count)
3620 i = 0;
3621 }
3622
3623 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3624
ad68076e
BA		 3625 /*
3626 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 3627 * know there are new descriptors to fetch. (Only
3628 * applicable for weak-ordered memory model archs,
ad68076e
BA		 3629 * such as IA-64).
3630 */
bc7f75fa
AK		 3631 wmb();
3632
3633 tx_ring->next_to_use = i;
3634 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 3635 /*
3636 * we need this if more than one processor can write to our tail
3637 * at a time, it synchronizes IO on IA64/Altix systems
3638 */
bc7f75fa
AK		 3639 mmiowb();
3640}
3641
3642#define MINIMUM_DHCP_PACKET_SIZE 282
3643static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3644 struct sk_buff *skb)
3645{
3646 struct e1000_hw *hw = &adapter->hw;
3647 u16 length, offset;
3648
3649 if (vlan_tx_tag_present(skb)) {
3650 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
3651 && (adapter->hw.mng_cookie.status &
3652 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
3653 return 0;
3654 }
3655
3656 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
3657 return 0;
3658
3659 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
3660 return 0;
3661
3662 {
3663 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
3664 struct udphdr *udp;
3665
3666 if (ip->protocol != IPPROTO_UDP)
3667 return 0;
3668
3669 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
3670 if (ntohs(udp->dest) != 67)
3671 return 0;
3672
3673 offset = (u8 *)udp + 8 - skb->data;
3674 length = skb->len - offset;
3675 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
3676 }
3677
3678 return 0;
3679}
3680
3681static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3682{
3683 struct e1000_adapter *adapter = netdev_priv(netdev);
3684
3685 netif_stop_queue(netdev);
ad68076e
BA		 3686 /*
3687 * Herbert's original patch had:
bc7f75fa 3688 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 3689 * but since that doesn't exist yet, just open code it.
3690 */
bc7f75fa
AK		 3691 smp_mb();
3692
ad68076e
BA		 3693 /*
3694 * We need to check again in a case another CPU has just
3695 * made room available.
3696 */
bc7f75fa
AK		 3697 if (e1000_desc_unused(adapter->tx_ring) < size)
3698 return -EBUSY;
3699
3700 /* A reprieve! */
3701 netif_start_queue(netdev);
3702 ++adapter->restart_queue;
3703 return 0;
3704}
3705
3706static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
3707{
3708 struct e1000_adapter *adapter = netdev_priv(netdev);
3709
3710 if (e1000_desc_unused(adapter->tx_ring) >= size)
3711 return 0;
3712 return __e1000_maybe_stop_tx(netdev, size);
3713}
3714
3715#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3716static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3717{
3718 struct e1000_adapter *adapter = netdev_priv(netdev);
3719 struct e1000_ring *tx_ring = adapter->tx_ring;
3720 unsigned int first;
3721 unsigned int max_per_txd = E1000_MAX_PER_TXD;
3722 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3723 unsigned int tx_flags = 0;
4e6c709c 3724 unsigned int len = skb->len - skb->data_len;
bc7f75fa 3725 unsigned long irq_flags;
4e6c709c
AK		 3726 unsigned int nr_frags;
3727 unsigned int mss;
bc7f75fa
AK		 3728 int count = 0;
3729 int tso;
3730 unsigned int f;
bc7f75fa
AK		 3731
3732 if (test_bit(__E1000_DOWN, &adapter->state)) {
3733 dev_kfree_skb_any(skb);
3734 return NETDEV_TX_OK;
3735 }
3736
3737 if (skb->len <= 0) {
3738 dev_kfree_skb_any(skb);
3739 return NETDEV_TX_OK;
3740 }
3741
3742 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 3743 /*
3744 * The controller does a simple calculation to
bc7f75fa
AK		 3745 * make sure there is enough room in the FIFO before
3746 * initiating the DMA for each buffer. The calc is:
3747 * 4 = ceil(buffer len/mss). To make sure we don't
3748 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 3749 * drops.
3750 */
bc7f75fa
AK		 3751 if (mss) {
3752 u8 hdr_len;
3753 max_per_txd = min(mss << 2, max_per_txd);
3754 max_txd_pwr = fls(max_per_txd) - 1;
3755
ad68076e
BA		 3756 /*
3757 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
3758 * points to just header, pull a few bytes of payload from
3759 * frags into skb->data
3760 */
bc7f75fa 3761 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 3762 /*
3763 * we do this workaround for ES2LAN, but it is un-necessary,
3764 * avoiding it could save a lot of cycles
3765 */
4e6c709c 3766 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 3767 unsigned int pull_size;
3768
3769 pull_size = min((unsigned int)4, skb->data_len);
3770 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 3771 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 3772 dev_kfree_skb_any(skb);
3773 return NETDEV_TX_OK;
3774 }
3775 len = skb->len - skb->data_len;
3776 }
3777 }
3778
3779 /* reserve a descriptor for the offload context */
3780 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3781 count++;
3782 count++;
3783
3784 count += TXD_USE_COUNT(len, max_txd_pwr);
3785
3786 nr_frags = skb_shinfo(skb)->nr_frags;
3787 for (f = 0; f < nr_frags; f++)
3788 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3789 max_txd_pwr);
3790
3791 if (adapter->hw.mac.tx_pkt_filtering)
3792 e1000_transfer_dhcp_info(adapter, skb);
3793
3794 if (!spin_trylock_irqsave(&adapter->tx_queue_lock, irq_flags))
3795 /* Collision - tell upper layer to requeue */
3796 return NETDEV_TX_LOCKED;
3797
ad68076e
BA		 3798 /*
3799 * need: count + 2 desc gap to keep tail from touching
3800 * head, otherwise try next time
3801 */
bc7f75fa
AK		 3802 if (e1000_maybe_stop_tx(netdev, count + 2)) {
3803 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3804 return NETDEV_TX_BUSY;
3805 }
3806
3807 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3808 tx_flags |= E1000_TX_FLAGS_VLAN;
3809 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3810 }
3811
3812 first = tx_ring->next_to_use;
3813
3814 tso = e1000_tso(adapter, skb);
3815 if (tso < 0) {
3816 dev_kfree_skb_any(skb);
3817 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3818 return NETDEV_TX_OK;
3819 }
3820
3821 if (tso)
3822 tx_flags |= E1000_TX_FLAGS_TSO;
3823 else if (e1000_tx_csum(adapter, skb))
3824 tx_flags |= E1000_TX_FLAGS_CSUM;
3825
ad68076e
BA		 3826 /*
3827 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 3828 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 3829 * no longer assume, we must.
3830 */
bc7f75fa
AK		 3831 if (skb->protocol == htons(ETH_P_IP))
3832 tx_flags |= E1000_TX_FLAGS_IPV4;
3833
3834 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
3835 if (count < 0) {
3836 /* handle pci_map_single() error in e1000_tx_map */
3837 dev_kfree_skb_any(skb);
3838 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
7b5dfe1a 3839 return NETDEV_TX_OK;
bc7f75fa
AK		 3840 }
3841
3842 e1000_tx_queue(adapter, tx_flags, count);
3843
3844 netdev->trans_start = jiffies;
3845
3846 /* Make sure there is space in the ring for the next send. */
3847 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
3848
3849 spin_unlock_irqrestore(&adapter->tx_queue_lock, irq_flags);
3850 return NETDEV_TX_OK;
3851}
3852
3853/**
3854 * e1000_tx_timeout - Respond to a Tx Hang
3855 * @netdev: network interface device structure
3856 **/
3857static void e1000_tx_timeout(struct net_device *netdev)
3858{
3859 struct e1000_adapter *adapter = netdev_priv(netdev);
3860
3861 /* Do the reset outside of interrupt context */
3862 adapter->tx_timeout_count++;
3863 schedule_work(&adapter->reset_task);
3864}
3865
3866static void e1000_reset_task(struct work_struct *work)
3867{
3868 struct e1000_adapter *adapter;
3869 adapter = container_of(work, struct e1000_adapter, reset_task);
3870
3871 e1000e_reinit_locked(adapter);
3872}
3873
3874/**
3875 * e1000_get_stats - Get System Network Statistics
3876 * @netdev: network interface device structure
3877 *
3878 * Returns the address of the device statistics structure.
3879 * The statistics are actually updated from the timer callback.
3880 **/
3881static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
3882{
3883 struct e1000_adapter *adapter = netdev_priv(netdev);
3884
3885 /* only return the current stats */
3886 return &adapter->net_stats;
3887}
3888
3889/**
3890 * e1000_change_mtu - Change the Maximum Transfer Unit
3891 * @netdev: network interface device structure
3892 * @new_mtu: new value for maximum frame size
3893 *
3894 * Returns 0 on success, negative on failure
3895 **/
3896static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
3897{
3898 struct e1000_adapter *adapter = netdev_priv(netdev);
3899 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3900
d53f706d 3901 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
bc7f75fa 3902 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
44defeb3 3903 e_err("Invalid MTU setting\n");
bc7f75fa
AK		 3904 return -EINVAL;
3905 }
3906
3907 /* Jumbo frame size limits */
3908 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
3909 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
44defeb3 3910 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 3911 return -EINVAL;
3912 }
3913 if (adapter->hw.phy.type == e1000_phy_ife) {
44defeb3 3914 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 3915 return -EINVAL;
3916 }
3917 }
3918
3919#define MAX_STD_JUMBO_FRAME_SIZE 9234
3920 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
44defeb3 3921 e_err("MTU > 9216 not supported.\n");
bc7f75fa
AK		 3922 return -EINVAL;
3923 }
3924
3925 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3926 msleep(1);
3927 /* e1000e_down has a dependency on max_frame_size */
318a94d6 3928 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 3929 if (netif_running(netdev))
3930 e1000e_down(adapter);
3931
ad68076e
BA		 3932 /*
3933 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 3934 * means we reserve 2 more, this pushes us to allocate from the next
3935 * larger slab size.
ad68076e 3936 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 3937 * However with the new *_jumbo_rx* routines, jumbo receives will use
3938 * fragmented skbs
ad68076e 3939 */
bc7f75fa
AK		 3940
3941 if (max_frame <= 256)
3942 adapter->rx_buffer_len = 256;
3943 else if (max_frame <= 512)
3944 adapter->rx_buffer_len = 512;
3945 else if (max_frame <= 1024)
3946 adapter->rx_buffer_len = 1024;
3947 else if (max_frame <= 2048)
3948 adapter->rx_buffer_len = 2048;
3949 else
3950 adapter->rx_buffer_len = 4096;
3951
3952 /* adjust allocation if LPE protects us, and we aren't using SBP */
3953 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
3954 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
3955 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 3956 + ETH_FCS_LEN;
bc7f75fa 3957
44defeb3 3958 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 3959 netdev->mtu = new_mtu;
3960
3961 if (netif_running(netdev))
3962 e1000e_up(adapter);
3963 else
3964 e1000e_reset(adapter);
3965
3966 clear_bit(__E1000_RESETTING, &adapter->state);
3967
3968 return 0;
3969}
3970
3971static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
3972 int cmd)
3973{
3974 struct e1000_adapter *adapter = netdev_priv(netdev);
3975 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 3976
318a94d6 3977 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 3978 return -EOPNOTSUPP;
3979
3980 switch (cmd) {
3981 case SIOCGMIIPHY:
3982 data->phy_id = adapter->hw.phy.addr;
3983 break;
3984 case SIOCGMIIREG:
3985 if (!capable(CAP_NET_ADMIN))
3986 return -EPERM;
7c25769f
BA		 3987 switch (data->reg_num & 0x1F) {
3988 case MII_BMCR:
3989 data->val_out = adapter->phy_regs.bmcr;
3990 break;
3991 case MII_BMSR:
3992 data->val_out = adapter->phy_regs.bmsr;
3993 break;
3994 case MII_PHYSID1:
3995 data->val_out = (adapter->hw.phy.id >> 16);
3996 break;
3997 case MII_PHYSID2:
3998 data->val_out = (adapter->hw.phy.id & 0xFFFF);
3999 break;
4000 case MII_ADVERTISE:
4001 data->val_out = adapter->phy_regs.advertise;
4002 break;
4003 case MII_LPA:
4004 data->val_out = adapter->phy_regs.lpa;
4005 break;
4006 case MII_EXPANSION:
4007 data->val_out = adapter->phy_regs.expansion;
4008 break;
4009 case MII_CTRL1000:
4010 data->val_out = adapter->phy_regs.ctrl1000;
4011 break;
4012 case MII_STAT1000:
4013 data->val_out = adapter->phy_regs.stat1000;
4014 break;
4015 case MII_ESTATUS:
4016 data->val_out = adapter->phy_regs.estatus;
4017 break;
4018 default:
bc7f75fa
AK		 4019 return -EIO;
4020 }
bc7f75fa
AK		 4021 break;
4022 case SIOCSMIIREG:
4023 default:
4024 return -EOPNOTSUPP;
4025 }
4026 return 0;
4027}
4028
4029static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4030{
4031 switch (cmd) {
4032 case SIOCGMIIPHY:
4033 case SIOCGMIIREG:
4034 case SIOCSMIIREG:
4035 return e1000_mii_ioctl(netdev, ifr, cmd);
4036 default:
4037 return -EOPNOTSUPP;
4038 }
4039}
4040
4041static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4042{
4043 struct net_device *netdev = pci_get_drvdata(pdev);
4044 struct e1000_adapter *adapter = netdev_priv(netdev);
4045 struct e1000_hw *hw = &adapter->hw;
4046 u32 ctrl, ctrl_ext, rctl, status;
4047 u32 wufc = adapter->wol;
4048 int retval = 0;
4049
4050 netif_device_detach(netdev);
4051
4052 if (netif_running(netdev)) {
4053 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4054 e1000e_down(adapter);
4055 e1000_free_irq(adapter);
4056 }
4057
4058 retval = pci_save_state(pdev);
4059 if (retval)
4060 return retval;
4061
4062 status = er32(STATUS);
4063 if (status & E1000_STATUS_LU)
4064 wufc &= ~E1000_WUFC_LNKC;
4065
4066 if (wufc) {
4067 e1000_setup_rctl(adapter);
4068 e1000_set_multi(netdev);
4069
4070 /* turn on all-multi mode if wake on multicast is enabled */
4071 if (wufc & E1000_WUFC_MC) {
4072 rctl = er32(RCTL);
4073 rctl |= E1000_RCTL_MPE;
4074 ew32(RCTL, rctl);
4075 }
4076
4077 ctrl = er32(CTRL);
4078 /* advertise wake from D3Cold */
4079 #define E1000_CTRL_ADVD3WUC 0x00100000
4080 /* phy power management enable */
4081 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4082 ctrl |= E1000_CTRL_ADVD3WUC |
4083 E1000_CTRL_EN_PHY_PWR_MGMT;
4084 ew32(CTRL, ctrl);
4085
318a94d6
JK		 4086 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4087 adapter->hw.phy.media_type ==
4088 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4089 /* keep the laser running in D3 */
4090 ctrl_ext = er32(CTRL_EXT);
4091 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4092 ew32(CTRL_EXT, ctrl_ext);
4093 }
4094
97ac8cae
BA		 4095 if (adapter->flags & FLAG_IS_ICH)
4096 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4097
bc7f75fa
AK		 4098 /* Allow time for pending master requests to run */
4099 e1000e_disable_pcie_master(&adapter->hw);
4100
4101 ew32(WUC, E1000_WUC_PME_EN);
4102 ew32(WUFC, wufc);
4103 pci_enable_wake(pdev, PCI_D3hot, 1);
4104 pci_enable_wake(pdev, PCI_D3cold, 1);
4105 } else {
4106 ew32(WUC, 0);
4107 ew32(WUFC, 0);
4108 pci_enable_wake(pdev, PCI_D3hot, 0);
4109 pci_enable_wake(pdev, PCI_D3cold, 0);
4110 }
4111
bc7f75fa
AK		 4112 /* make sure adapter isn't asleep if manageability is enabled */
4113 if (adapter->flags & FLAG_MNG_PT_ENABLED) {
4114 pci_enable_wake(pdev, PCI_D3hot, 1);
4115 pci_enable_wake(pdev, PCI_D3cold, 1);
4116 }
4117
4118 if (adapter->hw.phy.type == e1000_phy_igp_3)
4119 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4120
ad68076e
BA		 4121 /*
4122 * Release control of h/w to f/w. If f/w is AMT enabled, this
4123 * would have already happened in close and is redundant.
4124 */
bc7f75fa
AK		 4125 e1000_release_hw_control(adapter);
4126
4127 pci_disable_device(pdev);
4128
4129 pci_set_power_state(pdev, pci_choose_state(pdev, state));
4130
4131 return 0;
4132}
4133
1eae4eb2
AK		 4134static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4135{
4136 int pos;
1eae4eb2
AK		 4137 u16 val;
4138
4139 /*
4140 * 82573 workaround - disable L1 ASPM on mobile chipsets
4141 *
4142 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4143 * resulting in lost data or garbage information on the pci-e link
4144 * level. This could result in (false) bad EEPROM checksum errors,
4145 * long ping times (up to 2s) or even a system freeze/hang.
4146 *
4147 * Unfortunately this feature saves about 1W power consumption when
4148 * active.
4149 */
4150 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4151 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4152 if (val & 0x2) {
4153 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4154 val &= ~0x2;
4155 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4156 }
4157}
4158
bc7f75fa
AK		 4159#ifdef CONFIG_PM
4160static int e1000_resume(struct pci_dev *pdev)
4161{
4162 struct net_device *netdev = pci_get_drvdata(pdev);
4163 struct e1000_adapter *adapter = netdev_priv(netdev);
4164 struct e1000_hw *hw = &adapter->hw;
4165 u32 err;
4166
4167 pci_set_power_state(pdev, PCI_D0);
4168 pci_restore_state(pdev);
1eae4eb2 4169 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4170
f0f422e5 4171 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4172 if (err) {
4173 dev_err(&pdev->dev,
4174 "Cannot enable PCI device from suspend\n");
4175 return err;
4176 }
4177
4178 pci_set_master(pdev);
4179
4180 pci_enable_wake(pdev, PCI_D3hot, 0);
4181 pci_enable_wake(pdev, PCI_D3cold, 0);
4182
4183 if (netif_running(netdev)) {
4184 err = e1000_request_irq(adapter);
4185 if (err)
4186 return err;
4187 }
4188
4189 e1000e_power_up_phy(adapter);
4190 e1000e_reset(adapter);
4191 ew32(WUS, ~0);
4192
4193 e1000_init_manageability(adapter);
4194
4195 if (netif_running(netdev))
4196 e1000e_up(adapter);
4197
4198 netif_device_attach(netdev);
4199
ad68076e
BA		 4200 /*
4201 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4202 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4203 * under the control of the driver.
4204 */
c43bc57e 4205 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4206 e1000_get_hw_control(adapter);
4207
4208 return 0;
4209}
4210#endif
4211
4212static void e1000_shutdown(struct pci_dev *pdev)
4213{
4214 e1000_suspend(pdev, PMSG_SUSPEND);
4215}
4216
4217#ifdef CONFIG_NET_POLL_CONTROLLER
4218/*
4219 * Polling 'interrupt' - used by things like netconsole to send skbs
4220 * without having to re-enable interrupts. It's not called while
4221 * the interrupt routine is executing.
4222 */
4223static void e1000_netpoll(struct net_device *netdev)
4224{
4225 struct e1000_adapter *adapter = netdev_priv(netdev);
4226
4227 disable_irq(adapter->pdev->irq);
4228 e1000_intr(adapter->pdev->irq, netdev);
4229
bc7f75fa
AK		 4230 enable_irq(adapter->pdev->irq);
4231}
4232#endif
4233
4234/**
4235 * e1000_io_error_detected - called when PCI error is detected
4236 * @pdev: Pointer to PCI device
4237 * @state: The current pci connection state
4238 *
4239 * This function is called after a PCI bus error affecting
4240 * this device has been detected.
4241 */
4242static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4243 pci_channel_state_t state)
4244{
4245 struct net_device *netdev = pci_get_drvdata(pdev);
4246 struct e1000_adapter *adapter = netdev_priv(netdev);
4247
4248 netif_device_detach(netdev);
4249
4250 if (netif_running(netdev))
4251 e1000e_down(adapter);
4252 pci_disable_device(pdev);
4253
4254 /* Request a slot slot reset. */
4255 return PCI_ERS_RESULT_NEED_RESET;
4256}
4257
4258/**
4259 * e1000_io_slot_reset - called after the pci bus has been reset.
4260 * @pdev: Pointer to PCI device
4261 *
4262 * Restart the card from scratch, as if from a cold-boot. Implementation
4263 * resembles the first-half of the e1000_resume routine.
4264 */
4265static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4266{
4267 struct net_device *netdev = pci_get_drvdata(pdev);
4268 struct e1000_adapter *adapter = netdev_priv(netdev);
4269 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4270 int err;
bc7f75fa 4271
1eae4eb2 4272 e1000e_disable_l1aspm(pdev);
f0f422e5 4273 err = pci_enable_device_mem(pdev);
6e4f6f6b 4274 if (err) {
bc7f75fa
AK		 4275 dev_err(&pdev->dev,
4276 "Cannot re-enable PCI device after reset.\n");
4277 return PCI_ERS_RESULT_DISCONNECT;
4278 }
4279 pci_set_master(pdev);
aad32739 4280 pci_restore_state(pdev);
bc7f75fa
AK		 4281
4282 pci_enable_wake(pdev, PCI_D3hot, 0);
4283 pci_enable_wake(pdev, PCI_D3cold, 0);
4284
4285 e1000e_reset(adapter);
4286 ew32(WUS, ~0);
4287
4288 return PCI_ERS_RESULT_RECOVERED;
4289}
4290
4291/**
4292 * e1000_io_resume - called when traffic can start flowing again.
4293 * @pdev: Pointer to PCI device
4294 *
4295 * This callback is called when the error recovery driver tells us that
4296 * its OK to resume normal operation. Implementation resembles the
4297 * second-half of the e1000_resume routine.
4298 */
4299static void e1000_io_resume(struct pci_dev *pdev)
4300{
4301 struct net_device *netdev = pci_get_drvdata(pdev);
4302 struct e1000_adapter *adapter = netdev_priv(netdev);
4303
4304 e1000_init_manageability(adapter);
4305
4306 if (netif_running(netdev)) {
4307 if (e1000e_up(adapter)) {
4308 dev_err(&pdev->dev,
4309 "can't bring device back up after reset\n");
4310 return;
4311 }
4312 }
4313
4314 netif_device_attach(netdev);
4315
ad68076e
BA		 4316 /*
4317 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4318 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4319 * under the control of the driver.
4320 */
c43bc57e 4321 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4322 e1000_get_hw_control(adapter);
4323
4324}
4325
4326static void e1000_print_device_info(struct e1000_adapter *adapter)
4327{
4328 struct e1000_hw *hw = &adapter->hw;
4329 struct net_device *netdev = adapter->netdev;
69e3fd8c 4330 u32 pba_num;
bc7f75fa
AK		 4331
4332 /* print bus type/speed/width info */
44defeb3
JK		 4333 e_info("(PCI Express:2.5GB/s:%s) %02x:%02x:%02x:%02x:%02x:%02x\n",
4334 /* bus width */
4335 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4336 "Width x1"),
4337 /* MAC address */
4338 netdev->dev_addr[0], netdev->dev_addr[1],
4339 netdev->dev_addr[2], netdev->dev_addr[3],
4340 netdev->dev_addr[4], netdev->dev_addr[5]);
4341 e_info("Intel(R) PRO/%s Network Connection\n",
4342 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4343 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4344 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4345 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4346}
4347
10aa4c04
AK		 4348static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4349{
4350 struct e1000_hw *hw = &adapter->hw;
4351 int ret_val;
4352 u16 buf = 0;
4353
4354 if (hw->mac.type != e1000_82573)
4355 return;
4356
4357 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
4358 if (!(le16_to_cpu(buf) & (1 << 0))) {
4359 /* Deep Smart Power Down (DSPD) */
4360 e_warn("Warning: detected DSPD enabled in EEPROM\n");
4361 }
4362
4363 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
4364 if (le16_to_cpu(buf) & (3 << 2)) {
4365 /* ASPM enable */
4366 e_warn("Warning: detected ASPM enabled in EEPROM\n");
4367 }
4368}
4369
bc7f75fa
AK		 4370/**
4371 * e1000_probe - Device Initialization Routine
4372 * @pdev: PCI device information struct
4373 * @ent: entry in e1000_pci_tbl
4374 *
4375 * Returns 0 on success, negative on failure
4376 *
4377 * e1000_probe initializes an adapter identified by a pci_dev structure.
4378 * The OS initialization, configuring of the adapter private structure,
4379 * and a hardware reset occur.
4380 **/
4381static int __devinit e1000_probe(struct pci_dev *pdev,
4382 const struct pci_device_id *ent)
4383{
4384 struct net_device *netdev;
4385 struct e1000_adapter *adapter;
4386 struct e1000_hw *hw;
4387 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4388 resource_size_t mmio_start, mmio_len;
4389 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4390
4391 static int cards_found;
4392 int i, err, pci_using_dac;
4393 u16 eeprom_data = 0;
4394 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4395
1eae4eb2 4396 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4397
f0f422e5 4398 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4399 if (err)
4400 return err;
4401
4402 pci_using_dac = 0;
4403 err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
4404 if (!err) {
4405 err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK);
4406 if (!err)
4407 pci_using_dac = 1;
4408 } else {
4409 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
4410 if (err) {
4411 err = pci_set_consistent_dma_mask(pdev,
4412 DMA_32BIT_MASK);
4413 if (err) {
4414 dev_err(&pdev->dev, "No usable DMA "
4415 "configuration, aborting\n");
4416 goto err_dma;
4417 }
4418 }
4419 }
4420
f0f422e5
BA		 4421 err = pci_request_selected_regions(pdev,
4422 pci_select_bars(pdev, IORESOURCE_MEM),
4423 e1000e_driver_name);
bc7f75fa
AK		 4424 if (err)
4425 goto err_pci_reg;
4426
4427 pci_set_master(pdev);
aad32739 4428 pci_save_state(pdev);
bc7f75fa
AK		 4429
4430 err = -ENOMEM;
4431 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4432 if (!netdev)
4433 goto err_alloc_etherdev;
4434
bc7f75fa
AK		 4435 SET_NETDEV_DEV(netdev, &pdev->dev);
4436
4437 pci_set_drvdata(pdev, netdev);
4438 adapter = netdev_priv(netdev);
4439 hw = &adapter->hw;
4440 adapter->netdev = netdev;
4441 adapter->pdev = pdev;
4442 adapter->ei = ei;
4443 adapter->pba = ei->pba;
4444 adapter->flags = ei->flags;
4445 adapter->hw.adapter = adapter;
4446 adapter->hw.mac.type = ei->mac;
4447 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4448
4449 mmio_start = pci_resource_start(pdev, 0);
4450 mmio_len = pci_resource_len(pdev, 0);
4451
4452 err = -EIO;
4453 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4454 if (!adapter->hw.hw_addr)
4455 goto err_ioremap;
4456
4457 if ((adapter->flags & FLAG_HAS_FLASH) &&
4458 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
4459 flash_start = pci_resource_start(pdev, 1);
4460 flash_len = pci_resource_len(pdev, 1);
4461 adapter->hw.flash_address = ioremap(flash_start, flash_len);
4462 if (!adapter->hw.flash_address)
4463 goto err_flashmap;
4464 }
4465
4466 /* construct the net_device struct */
4467 netdev->open = &e1000_open;
4468 netdev->stop = &e1000_close;
4469 netdev->hard_start_xmit = &e1000_xmit_frame;
4470 netdev->get_stats = &e1000_get_stats;
4471 netdev->set_multicast_list = &e1000_set_multi;
4472 netdev->set_mac_address = &e1000_set_mac;
4473 netdev->change_mtu = &e1000_change_mtu;
4474 netdev->do_ioctl = &e1000_ioctl;
4475 e1000e_set_ethtool_ops(netdev);
4476 netdev->tx_timeout = &e1000_tx_timeout;
4477 netdev->watchdog_timeo = 5 * HZ;
4478 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
4479 netdev->vlan_rx_register = e1000_vlan_rx_register;
4480 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
4481 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
4482#ifdef CONFIG_NET_POLL_CONTROLLER
4483 netdev->poll_controller = e1000_netpoll;
4484#endif
4485 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
4486
4487 netdev->mem_start = mmio_start;
4488 netdev->mem_end = mmio_start + mmio_len;
4489
4490 adapter->bd_number = cards_found++;
4491
4492 /* setup adapter struct */
4493 err = e1000_sw_init(adapter);
4494 if (err)
4495 goto err_sw_init;
4496
4497 err = -EIO;
4498
4499 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
4500 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
4501 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
4502
69e3fd8c 4503 err = ei->get_variants(adapter);
bc7f75fa
AK		 4504 if (err)
4505 goto err_hw_init;
4506
4507 hw->mac.ops.get_bus_info(&adapter->hw);
4508
318a94d6 4509 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 4510
4511 /* Copper options */
318a94d6 4512 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 4513 adapter->hw.phy.mdix = AUTO_ALL_MODES;
4514 adapter->hw.phy.disable_polarity_correction = 0;
4515 adapter->hw.phy.ms_type = e1000_ms_hw_default;
4516 }
4517
4518 if (e1000_check_reset_block(&adapter->hw))
44defeb3 4519 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 4520
4521 netdev->features = NETIF_F_SG |
4522 NETIF_F_HW_CSUM |
4523 NETIF_F_HW_VLAN_TX |
4524 NETIF_F_HW_VLAN_RX;
4525
4526 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
4527 netdev->features |= NETIF_F_HW_VLAN_FILTER;
4528
4529 netdev->features |= NETIF_F_TSO;
4530 netdev->features |= NETIF_F_TSO6;
4531
a5136e23
JK		 4532 netdev->vlan_features |= NETIF_F_TSO;
4533 netdev->vlan_features |= NETIF_F_TSO6;
4534 netdev->vlan_features |= NETIF_F_HW_CSUM;
4535 netdev->vlan_features |= NETIF_F_SG;
4536
bc7f75fa
AK		 4537 if (pci_using_dac)
4538 netdev->features |= NETIF_F_HIGHDMA;
4539
ad68076e
BA		 4540 /*
4541 * We should not be using LLTX anymore, but we are still Tx faster with
4542 * it.
4543 */
bc7f75fa
AK		 4544 netdev->features |= NETIF_F_LLTX;
4545
4546 if (e1000e_enable_mng_pass_thru(&adapter->hw))
4547 adapter->flags |= FLAG_MNG_PT_ENABLED;
4548
ad68076e
BA		 4549 /*
4550 * before reading the NVM, reset the controller to
4551 * put the device in a known good starting state
4552 */
bc7f75fa
AK		 4553 adapter->hw.mac.ops.reset_hw(&adapter->hw);
4554
4555 /*
4556 * systems with ASPM and others may see the checksum fail on the first
4557 * attempt. Let's give it a few tries
4558 */
4559 for (i = 0;; i++) {
4560 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
4561 break;
4562 if (i == 2) {
44defeb3 4563 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 4564 err = -EIO;
4565 goto err_eeprom;
4566 }
4567 }
4568
10aa4c04
AK		 4569 e1000_eeprom_checks(adapter);
4570
bc7f75fa
AK		 4571 /* copy the MAC address out of the NVM */
4572 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 4573 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 4574
4575 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
4576 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
4577
4578 if (!is_valid_ether_addr(netdev->perm_addr)) {
44defeb3
JK		 4579 e_err("Invalid MAC Address: %02x:%02x:%02x:%02x:%02x:%02x\n",
4580 netdev->perm_addr[0], netdev->perm_addr[1],
4581 netdev->perm_addr[2], netdev->perm_addr[3],
4582 netdev->perm_addr[4], netdev->perm_addr[5]);
bc7f75fa
AK		 4583 err = -EIO;
4584 goto err_eeprom;
4585 }
4586
4587 init_timer(&adapter->watchdog_timer);
4588 adapter->watchdog_timer.function = &e1000_watchdog;
4589 adapter->watchdog_timer.data = (unsigned long) adapter;
4590
4591 init_timer(&adapter->phy_info_timer);
4592 adapter->phy_info_timer.function = &e1000_update_phy_info;
4593 adapter->phy_info_timer.data = (unsigned long) adapter;
4594
4595 INIT_WORK(&adapter->reset_task, e1000_reset_task);
4596 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
4597
4598 e1000e_check_options(adapter);
4599
4600 /* Initialize link parameters. User can change them with ethtool */
4601 adapter->hw.mac.autoneg = 1;
309af40b 4602 adapter->fc_autoneg = 1;
318a94d6
JK		 4603 adapter->hw.fc.original_type = e1000_fc_default;
4604 adapter->hw.fc.type = e1000_fc_default;
bc7f75fa
AK		 4605 adapter->hw.phy.autoneg_advertised = 0x2f;
4606
4607 /* ring size defaults */
4608 adapter->rx_ring->count = 256;
4609 adapter->tx_ring->count = 256;
4610
4611 /*
4612 * Initial Wake on LAN setting - If APM wake is enabled in
4613 * the EEPROM, enable the ACPI Magic Packet filter
4614 */
4615 if (adapter->flags & FLAG_APME_IN_WUC) {
4616 /* APME bit in EEPROM is mapped to WUC.APME */
4617 eeprom_data = er32(WUC);
4618 eeprom_apme_mask = E1000_WUC_APME;
4619 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
4620 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
4621 (adapter->hw.bus.func == 1))
4622 e1000_read_nvm(&adapter->hw,
4623 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
4624 else
4625 e1000_read_nvm(&adapter->hw,
4626 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
4627 }
4628
4629 /* fetch WoL from EEPROM */
4630 if (eeprom_data & eeprom_apme_mask)
4631 adapter->eeprom_wol |= E1000_WUFC_MAG;
4632
4633 /*
4634 * now that we have the eeprom settings, apply the special cases
4635 * where the eeprom may be wrong or the board simply won't support
4636 * wake on lan on a particular port
4637 */
4638 if (!(adapter->flags & FLAG_HAS_WOL))
4639 adapter->eeprom_wol = 0;
4640
4641 /* initialize the wol settings based on the eeprom settings */
4642 adapter->wol = adapter->eeprom_wol;
4643
4644 /* reset the hardware with the new settings */
4645 e1000e_reset(adapter);
4646
ad68076e
BA		 4647 /*
4648 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4649 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4650 * under the control of the driver.
4651 */
c43bc57e 4652 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4653 e1000_get_hw_control(adapter);
4654
4655 /* tell the stack to leave us alone until e1000_open() is called */
4656 netif_carrier_off(netdev);
d55b53ff 4657 netif_tx_stop_all_queues(netdev);
bc7f75fa
AK		 4658
4659 strcpy(netdev->name, "eth%d");
4660 err = register_netdev(netdev);
4661 if (err)
4662 goto err_register;
4663
4664 e1000_print_device_info(adapter);
4665
4666 return 0;
4667
4668err_register:
c43bc57e
JB		 4669 if (!(adapter->flags & FLAG_HAS_AMT))
4670 e1000_release_hw_control(adapter);
bc7f75fa
AK		 4671err_eeprom:
4672 if (!e1000_check_reset_block(&adapter->hw))
4673 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 4674err_hw_init:
bc7f75fa 4675
bc7f75fa
AK		 4676 kfree(adapter->tx_ring);
4677 kfree(adapter->rx_ring);
4678err_sw_init:
c43bc57e
JB		 4679 if (adapter->hw.flash_address)
4680 iounmap(adapter->hw.flash_address);
4681err_flashmap:
bc7f75fa
AK		 4682 iounmap(adapter->hw.hw_addr);
4683err_ioremap:
4684 free_netdev(netdev);
4685err_alloc_etherdev:
f0f422e5
BA		 4686 pci_release_selected_regions(pdev,
4687 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 4688err_pci_reg:
4689err_dma:
4690 pci_disable_device(pdev);
4691 return err;
4692}
4693
4694/**
4695 * e1000_remove - Device Removal Routine
4696 * @pdev: PCI device information struct
4697 *
4698 * e1000_remove is called by the PCI subsystem to alert the driver
4699 * that it should release a PCI device. The could be caused by a
4700 * Hot-Plug event, or because the driver is going to be removed from
4701 * memory.
4702 **/
4703static void __devexit e1000_remove(struct pci_dev *pdev)
4704{
4705 struct net_device *netdev = pci_get_drvdata(pdev);
4706 struct e1000_adapter *adapter = netdev_priv(netdev);
4707
ad68076e
BA		 4708 /*
4709 * flush_scheduled work may reschedule our watchdog task, so
4710 * explicitly disable watchdog tasks from being rescheduled
4711 */
bc7f75fa
AK		 4712 set_bit(__E1000_DOWN, &adapter->state);
4713 del_timer_sync(&adapter->watchdog_timer);
4714 del_timer_sync(&adapter->phy_info_timer);
4715
4716 flush_scheduled_work();
4717
ad68076e
BA		 4718 /*
4719 * Release control of h/w to f/w. If f/w is AMT enabled, this
4720 * would have already happened in close and is redundant.
4721 */
bc7f75fa
AK		 4722 e1000_release_hw_control(adapter);
4723
4724 unregister_netdev(netdev);
4725
4726 if (!e1000_check_reset_block(&adapter->hw))
4727 e1000_phy_hw_reset(&adapter->hw);
4728
4729 kfree(adapter->tx_ring);
4730 kfree(adapter->rx_ring);
4731
4732 iounmap(adapter->hw.hw_addr);
4733 if (adapter->hw.flash_address)
4734 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 4735 pci_release_selected_regions(pdev,
4736 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 4737
4738 free_netdev(netdev);
4739
4740 pci_disable_device(pdev);
4741}
4742
4743/* PCI Error Recovery (ERS) */
4744static struct pci_error_handlers e1000_err_handler = {
4745 .error_detected = e1000_io_error_detected,
4746 .slot_reset = e1000_io_slot_reset,
4747 .resume = e1000_io_resume,
4748};
4749
4750static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 4751 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
4752 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
4753 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
4754 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
4755 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
4756 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 4757 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
4758 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
4759 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 4760
bc7f75fa
AK		 4761 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
4762 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
4763 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
4764 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 4765
bc7f75fa
AK		 4766 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
4767 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
4768 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 4769
bc7f75fa
AK		 4770 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
4771 board_80003es2lan },
4772 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
4773 board_80003es2lan },
4774 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
4775 board_80003es2lan },
4776 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
4777 board_80003es2lan },
ad68076e 4778
bc7f75fa
AK		 4779 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
4780 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
4781 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
4782 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
4783 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
4784 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
4785 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 4786
bc7f75fa
AK		 4787 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
4788 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
4789 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
4790 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
4791 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 4792 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 4793 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
4794 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
4795 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
4796
4797 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
4798 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
4799 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 4800
f4187b56
BA		 4801 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
4802 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
4803
bc7f75fa
AK		 4804 { } /* terminate list */
4805};
4806MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
4807
4808/* PCI Device API Driver */
4809static struct pci_driver e1000_driver = {
4810 .name = e1000e_driver_name,
4811 .id_table = e1000_pci_tbl,
4812 .probe = e1000_probe,
4813 .remove = __devexit_p(e1000_remove),
4814#ifdef CONFIG_PM
ad68076e 4815 /* Power Management Hooks */
bc7f75fa
AK		 4816 .suspend = e1000_suspend,
4817 .resume = e1000_resume,
4818#endif
4819 .shutdown = e1000_shutdown,
4820 .err_handler = &e1000_err_handler
4821};
4822
4823/**
4824 * e1000_init_module - Driver Registration Routine
4825 *
4826 * e1000_init_module is the first routine called when the driver is
4827 * loaded. All it does is register with the PCI subsystem.
4828 **/
4829static int __init e1000_init_module(void)
4830{
4831 int ret;
4832 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
4833 e1000e_driver_name, e1000e_driver_version);
ad68076e 4834 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 4835 e1000e_driver_name);
4836 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 4837 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
4838 PM_QOS_DEFAULT_VALUE);
4839
bc7f75fa
AK		 4840 return ret;
4841}
4842module_init(e1000_init_module);
4843
4844/**
4845 * e1000_exit_module - Driver Exit Cleanup Routine
4846 *
4847 * e1000_exit_module is called just before the driver is removed
4848 * from memory.
4849 **/
4850static void __exit e1000_exit_module(void)
4851{
4852 pci_unregister_driver(&e1000_driver);
97ac8cae 4853 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 4854}
4855module_exit(e1000_exit_module);
4856
4857
4858MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
4859MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
4860MODULE_LICENSE("GPL");
4861MODULE_VERSION(DRV_VERSION);
4862
4863/* e1000_main.c */
Linux kernel - Deliverables
This page took 0.396549 seconds and 5 git commands to generate.