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ethtool: Use full 32 bit speed range in ethtool's set_settings
[deliverable/linux.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
01f2e4ea
SF		 39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
01f2e4ea
SF		 45#include "enic_res.h"
46#include "enic.h"
51987461 47#include "enic_dev.h"
b3abfbd2 48#include "enic_pp.h"
01f2e4ea
SF		 49
50#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 51#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
52#define MAX_TSO (1 << 16)
53#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
54
55#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 56#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 57
58/* Supported devices */
a3aa1884 59static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 60 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 61 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 62 { 0, } /* end of table */
63};
64
65MODULE_DESCRIPTION(DRV_DESCRIPTION);
66MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
67MODULE_LICENSE("GPL");
68MODULE_VERSION(DRV_VERSION);
69MODULE_DEVICE_TABLE(pci, enic_id_table);
70
71struct enic_stat {
72 char name[ETH_GSTRING_LEN];
73 unsigned int offset;
74};
75
76#define ENIC_TX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
78#define ENIC_RX_STAT(stat) \
79 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
80
81static const struct enic_stat enic_tx_stats[] = {
82 ENIC_TX_STAT(tx_frames_ok),
83 ENIC_TX_STAT(tx_unicast_frames_ok),
84 ENIC_TX_STAT(tx_multicast_frames_ok),
85 ENIC_TX_STAT(tx_broadcast_frames_ok),
86 ENIC_TX_STAT(tx_bytes_ok),
87 ENIC_TX_STAT(tx_unicast_bytes_ok),
88 ENIC_TX_STAT(tx_multicast_bytes_ok),
89 ENIC_TX_STAT(tx_broadcast_bytes_ok),
90 ENIC_TX_STAT(tx_drops),
91 ENIC_TX_STAT(tx_errors),
92 ENIC_TX_STAT(tx_tso),
93};
94
95static const struct enic_stat enic_rx_stats[] = {
96 ENIC_RX_STAT(rx_frames_ok),
97 ENIC_RX_STAT(rx_frames_total),
98 ENIC_RX_STAT(rx_unicast_frames_ok),
99 ENIC_RX_STAT(rx_multicast_frames_ok),
100 ENIC_RX_STAT(rx_broadcast_frames_ok),
101 ENIC_RX_STAT(rx_bytes_ok),
102 ENIC_RX_STAT(rx_unicast_bytes_ok),
103 ENIC_RX_STAT(rx_multicast_bytes_ok),
104 ENIC_RX_STAT(rx_broadcast_bytes_ok),
105 ENIC_RX_STAT(rx_drop),
106 ENIC_RX_STAT(rx_no_bufs),
107 ENIC_RX_STAT(rx_errors),
108 ENIC_RX_STAT(rx_rss),
109 ENIC_RX_STAT(rx_crc_errors),
110 ENIC_RX_STAT(rx_frames_64),
111 ENIC_RX_STAT(rx_frames_127),
112 ENIC_RX_STAT(rx_frames_255),
113 ENIC_RX_STAT(rx_frames_511),
114 ENIC_RX_STAT(rx_frames_1023),
115 ENIC_RX_STAT(rx_frames_1518),
116 ENIC_RX_STAT(rx_frames_to_max),
117};
118
119static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
120static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
121
f8bd9091
SF		 122static int enic_is_dynamic(struct enic *enic)
123{
124 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
125}
126
717258ba
VK		 127static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
128{
129 return rq;
130}
131
132static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
133{
134 return enic->rq_count + wq;
135}
136
137static inline unsigned int enic_legacy_io_intr(void)
138{
139 return 0;
140}
141
142static inline unsigned int enic_legacy_err_intr(void)
143{
144 return 1;
145}
146
147static inline unsigned int enic_legacy_notify_intr(void)
148{
149 return 2;
150}
151
152static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
153{
154 return rq;
155}
156
157static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
158{
159 return enic->rq_count + wq;
160}
161
162static inline unsigned int enic_msix_err_intr(struct enic *enic)
163{
164 return enic->rq_count + enic->wq_count;
165}
166
167static inline unsigned int enic_msix_notify_intr(struct enic *enic)
168{
169 return enic->rq_count + enic->wq_count + 1;
170}
171
01f2e4ea
SF		 172static int enic_get_settings(struct net_device *netdev,
173 struct ethtool_cmd *ecmd)
174{
175 struct enic *enic = netdev_priv(netdev);
176
177 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
178 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
179 ecmd->port = PORT_FIBRE;
180 ecmd->transceiver = XCVR_EXTERNAL;
181
182 if (netif_carrier_ok(netdev)) {
183 ecmd->speed = vnic_dev_port_speed(enic->vdev);
184 ecmd->duplex = DUPLEX_FULL;
185 } else {
186 ecmd->speed = -1;
187 ecmd->duplex = -1;
188 }
189
190 ecmd->autoneg = AUTONEG_DISABLE;
191
192 return 0;
193}
194
195static void enic_get_drvinfo(struct net_device *netdev,
196 struct ethtool_drvinfo *drvinfo)
197{
198 struct enic *enic = netdev_priv(netdev);
199 struct vnic_devcmd_fw_info *fw_info;
200
383ab92f 201 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 202
203 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
204 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
205 strncpy(drvinfo->fw_version, fw_info->fw_version,
206 sizeof(drvinfo->fw_version));
207 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
208 sizeof(drvinfo->bus_info));
209}
210
211static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
212{
213 unsigned int i;
214
215 switch (stringset) {
216 case ETH_SS_STATS:
217 for (i = 0; i < enic_n_tx_stats; i++) {
218 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
219 data += ETH_GSTRING_LEN;
220 }
221 for (i = 0; i < enic_n_rx_stats; i++) {
222 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
223 data += ETH_GSTRING_LEN;
224 }
225 break;
226 }
227}
228
25f0a061 229static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 230{
25f0a061
SF		 231 switch (sset) {
232 case ETH_SS_STATS:
233 return enic_n_tx_stats + enic_n_rx_stats;
234 default:
235 return -EOPNOTSUPP;
236 }
01f2e4ea
SF		 237}
238
239static void enic_get_ethtool_stats(struct net_device *netdev,
240 struct ethtool_stats *stats, u64 *data)
241{
242 struct enic *enic = netdev_priv(netdev);
243 struct vnic_stats *vstats;
244 unsigned int i;
245
383ab92f 246 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 247
248 for (i = 0; i < enic_n_tx_stats; i++)
249 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
250 for (i = 0; i < enic_n_rx_stats; i++)
251 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
252}
253
01f2e4ea
SF		 254static u32 enic_get_msglevel(struct net_device *netdev)
255{
256 struct enic *enic = netdev_priv(netdev);
257 return enic->msg_enable;
258}
259
260static void enic_set_msglevel(struct net_device *netdev, u32 value)
261{
262 struct enic *enic = netdev_priv(netdev);
263 enic->msg_enable = value;
264}
265
7c844599
SF		 266static int enic_get_coalesce(struct net_device *netdev,
267 struct ethtool_coalesce *ecmd)
268{
269 struct enic *enic = netdev_priv(netdev);
270
271 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
272 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
273
274 return 0;
275}
276
277static int enic_set_coalesce(struct net_device *netdev,
278 struct ethtool_coalesce *ecmd)
279{
280 struct enic *enic = netdev_priv(netdev);
281 u32 tx_coalesce_usecs;
282 u32 rx_coalesce_usecs;
717258ba 283 unsigned int i, intr;
7c844599
SF		 284
285 tx_coalesce_usecs = min_t(u32,
286 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
287 ecmd->tx_coalesce_usecs);
288 rx_coalesce_usecs = min_t(u32,
289 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
290 ecmd->rx_coalesce_usecs);
291
292 switch (vnic_dev_get_intr_mode(enic->vdev)) {
293 case VNIC_DEV_INTR_MODE_INTX:
294 if (tx_coalesce_usecs != rx_coalesce_usecs)
295 return -EINVAL;
296
717258ba
VK		 297 intr = enic_legacy_io_intr();
298 vnic_intr_coalescing_timer_set(&enic->intr[intr],
7c844599
SF		 299 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
300 break;
301 case VNIC_DEV_INTR_MODE_MSI:
302 if (tx_coalesce_usecs != rx_coalesce_usecs)
303 return -EINVAL;
304
305 vnic_intr_coalescing_timer_set(&enic->intr[0],
306 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
307 break;
308 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 309 for (i = 0; i < enic->wq_count; i++) {
310 intr = enic_msix_wq_intr(enic, i);
311 vnic_intr_coalescing_timer_set(&enic->intr[intr],
312 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
313 }
314
315 for (i = 0; i < enic->rq_count; i++) {
316 intr = enic_msix_rq_intr(enic, i);
317 vnic_intr_coalescing_timer_set(&enic->intr[intr],
318 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
319 }
320
7c844599
SF		 321 break;
322 default:
323 break;
324 }
325
326 enic->tx_coalesce_usecs = tx_coalesce_usecs;
327 enic->rx_coalesce_usecs = rx_coalesce_usecs;
328
329 return 0;
330}
331
0fc0b732 332static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 333 .get_settings = enic_get_settings,
334 .get_drvinfo = enic_get_drvinfo,
335 .get_msglevel = enic_get_msglevel,
336 .set_msglevel = enic_set_msglevel,
337 .get_link = ethtool_op_get_link,
338 .get_strings = enic_get_strings,
25f0a061 339 .get_sset_count = enic_get_sset_count,
01f2e4ea 340 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 341 .get_coalesce = enic_get_coalesce,
342 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 343};
344
345static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
346{
347 struct enic *enic = vnic_dev_priv(wq->vdev);
348
349 if (buf->sop)
350 pci_unmap_single(enic->pdev, buf->dma_addr,
351 buf->len, PCI_DMA_TODEVICE);
352 else
353 pci_unmap_page(enic->pdev, buf->dma_addr,
354 buf->len, PCI_DMA_TODEVICE);
355
356 if (buf->os_buf)
357 dev_kfree_skb_any(buf->os_buf);
358}
359
360static void enic_wq_free_buf(struct vnic_wq *wq,
361 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
362{
363 enic_free_wq_buf(wq, buf);
364}
365
366static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
367 u8 type, u16 q_number, u16 completed_index, void *opaque)
368{
369 struct enic *enic = vnic_dev_priv(vdev);
370
371 spin_lock(&enic->wq_lock[q_number]);
372
373 vnic_wq_service(&enic->wq[q_number], cq_desc,
374 completed_index, enic_wq_free_buf,
375 opaque);
376
377 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 378 vnic_wq_desc_avail(&enic->wq[q_number]) >=
379 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 380 netif_wake_queue(enic->netdev);
381
382 spin_unlock(&enic->wq_lock[q_number]);
383
384 return 0;
385}
386
387static void enic_log_q_error(struct enic *enic)
388{
389 unsigned int i;
390 u32 error_status;
391
392 for (i = 0; i < enic->wq_count; i++) {
393 error_status = vnic_wq_error_status(&enic->wq[i]);
394 if (error_status)
a7a79deb
VK		 395 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
396 i, error_status);
01f2e4ea
SF		 397 }
398
399 for (i = 0; i < enic->rq_count; i++) {
400 error_status = vnic_rq_error_status(&enic->rq[i]);
401 if (error_status)
a7a79deb
VK		 402 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
403 i, error_status);
01f2e4ea
SF		 404 }
405}
406
383ab92f 407static void enic_msglvl_check(struct enic *enic)
01f2e4ea 408{
383ab92f 409 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 410
383ab92f 411 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 412 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
413 enic->msg_enable, msg_enable);
383ab92f 414 enic->msg_enable = msg_enable;
01f2e4ea
SF		 415 }
416}
417
418static void enic_mtu_check(struct enic *enic)
419{
420 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 421 struct net_device *netdev = enic->netdev;
01f2e4ea 422
491598a4 423 if (mtu && mtu != enic->port_mtu) {
7c844599 424 enic->port_mtu = mtu;
a7a79deb
VK		 425 if (mtu < netdev->mtu)
426 netdev_warn(netdev,
427 "interface MTU (%d) set higher "
01f2e4ea 428 "than switch port MTU (%d)\n",
a7a79deb 429 netdev->mtu, mtu);
01f2e4ea
SF		 430 }
431}
432
383ab92f 433static void enic_link_check(struct enic *enic)
01f2e4ea 434{
383ab92f
VK		 435 int link_status = vnic_dev_link_status(enic->vdev);
436 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 437
383ab92f 438 if (link_status && !carrier_ok) {
a7a79deb 439 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 440 netif_carrier_on(enic->netdev);
441 } else if (!link_status && carrier_ok) {
a7a79deb 442 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 443 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 444 }
445}
446
447static void enic_notify_check(struct enic *enic)
448{
449 enic_msglvl_check(enic);
450 enic_mtu_check(enic);
451 enic_link_check(enic);
452}
453
454#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
455
456static irqreturn_t enic_isr_legacy(int irq, void *data)
457{
458 struct net_device *netdev = data;
459 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 460 unsigned int io_intr = enic_legacy_io_intr();
461 unsigned int err_intr = enic_legacy_err_intr();
462 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 463 u32 pba;
464
717258ba 465 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 466
467 pba = vnic_intr_legacy_pba(enic->legacy_pba);
468 if (!pba) {
717258ba 469 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 470 return IRQ_NONE; /* not our interrupt */
471 }
472
717258ba
VK		 473 if (ENIC_TEST_INTR(pba, notify_intr)) {
474 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 475 enic_notify_check(enic);
ed8af6b2 476 }
01f2e4ea 477
717258ba
VK		 478 if (ENIC_TEST_INTR(pba, err_intr)) {
479 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 480 enic_log_q_error(enic);
481 /* schedule recovery from WQ/RQ error */
482 schedule_work(&enic->reset);
483 return IRQ_HANDLED;
484 }
485
717258ba
VK		 486 if (ENIC_TEST_INTR(pba, io_intr)) {
487 if (napi_schedule_prep(&enic->napi[0]))
488 __napi_schedule(&enic->napi[0]);
01f2e4ea 489 } else {
717258ba 490 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 491 }
492
493 return IRQ_HANDLED;
494}
495
496static irqreturn_t enic_isr_msi(int irq, void *data)
497{
498 struct enic *enic = data;
499
500 /* With MSI, there is no sharing of interrupts, so this is
501 * our interrupt and there is no need to ack it. The device
502 * is not providing per-vector masking, so the OS will not
503 * write to PCI config space to mask/unmask the interrupt.
504 * We're using mask_on_assertion for MSI, so the device
505 * automatically masks the interrupt when the interrupt is
506 * generated. Later, when exiting polling, the interrupt
507 * will be unmasked (see enic_poll).
508 *
509 * Also, the device uses the same PCIe Traffic Class (TC)
510 * for Memory Write data and MSI, so there are no ordering
511 * issues; the MSI will always arrive at the Root Complex
512 * _after_ corresponding Memory Writes (i.e. descriptor
513 * writes).
514 */
515
717258ba 516 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 517
518 return IRQ_HANDLED;
519}
520
521static irqreturn_t enic_isr_msix_rq(int irq, void *data)
522{
717258ba 523 struct napi_struct *napi = data;
01f2e4ea
SF		 524
525 /* schedule NAPI polling for RQ cleanup */
717258ba 526 napi_schedule(napi);
01f2e4ea
SF		 527
528 return IRQ_HANDLED;
529}
530
531static irqreturn_t enic_isr_msix_wq(int irq, void *data)
532{
533 struct enic *enic = data;
717258ba
VK		 534 unsigned int cq = enic_cq_wq(enic, 0);
535 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 536 unsigned int wq_work_to_do = -1; /* no limit */
537 unsigned int wq_work_done;
538
717258ba 539 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 540 wq_work_to_do, enic_wq_service, NULL);
541
717258ba 542 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 543 wq_work_done,
544 1 /* unmask intr */,
545 1 /* reset intr timer */);
546
547 return IRQ_HANDLED;
548}
549
550static irqreturn_t enic_isr_msix_err(int irq, void *data)
551{
552 struct enic *enic = data;
717258ba 553 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 554
717258ba 555 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 556
01f2e4ea
SF		 557 enic_log_q_error(enic);
558
559 /* schedule recovery from WQ/RQ error */
560 schedule_work(&enic->reset);
561
562 return IRQ_HANDLED;
563}
564
565static irqreturn_t enic_isr_msix_notify(int irq, void *data)
566{
567 struct enic *enic = data;
717258ba 568 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 569
717258ba 570 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 571 enic_notify_check(enic);
01f2e4ea
SF		 572
573 return IRQ_HANDLED;
574}
575
576static inline void enic_queue_wq_skb_cont(struct enic *enic,
577 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 578 unsigned int len_left, int loopback)
01f2e4ea
SF		 579{
580 skb_frag_t *frag;
581
582 /* Queue additional data fragments */
583 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
584 len_left -= frag->size;
585 enic_queue_wq_desc_cont(wq, skb,
586 pci_map_page(enic->pdev, frag->page,
587 frag->page_offset, frag->size,
588 PCI_DMA_TODEVICE),
589 frag->size,
1825aca6
VK		 590 (len_left == 0), /* EOP? */
591 loopback);
01f2e4ea
SF		 592 }
593}
594
595static inline void enic_queue_wq_skb_vlan(struct enic *enic,
596 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 597 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 598{
599 unsigned int head_len = skb_headlen(skb);
600 unsigned int len_left = skb->len - head_len;
601 int eop = (len_left == 0);
602
ea0d7d91
SF		 603 /* Queue the main skb fragment. The fragments are no larger
604 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
605 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
606 * per fragment is queued.
607 */
01f2e4ea
SF		 608 enic_queue_wq_desc(wq, skb,
609 pci_map_single(enic->pdev, skb->data,
610 head_len, PCI_DMA_TODEVICE),
611 head_len,
612 vlan_tag_insert, vlan_tag,
1825aca6 613 eop, loopback);
01f2e4ea
SF		 614
615 if (!eop)
1825aca6 616 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 617}
618
619static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
620 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 621 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 622{
623 unsigned int head_len = skb_headlen(skb);
624 unsigned int len_left = skb->len - head_len;
0d0b1672 625 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 626 unsigned int csum_offset = hdr_len + skb->csum_offset;
627 int eop = (len_left == 0);
628
ea0d7d91
SF		 629 /* Queue the main skb fragment. The fragments are no larger
630 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
631 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
632 * per fragment is queued.
633 */
01f2e4ea
SF		 634 enic_queue_wq_desc_csum_l4(wq, skb,
635 pci_map_single(enic->pdev, skb->data,
636 head_len, PCI_DMA_TODEVICE),
637 head_len,
638 csum_offset,
639 hdr_len,
640 vlan_tag_insert, vlan_tag,
1825aca6 641 eop, loopback);
01f2e4ea
SF		 642
643 if (!eop)
1825aca6 644 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 645}
646
647static inline void enic_queue_wq_skb_tso(struct enic *enic,
648 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 649 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 650{
ea0d7d91
SF		 651 unsigned int frag_len_left = skb_headlen(skb);
652 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 653 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
654 int eop = (len_left == 0);
ea0d7d91
SF		 655 unsigned int len;
656 dma_addr_t dma_addr;
657 unsigned int offset = 0;
658 skb_frag_t *frag;
01f2e4ea
SF		 659
660 /* Preload TCP csum field with IP pseudo hdr calculated
661 * with IP length set to zero. HW will later add in length
662 * to each TCP segment resulting from the TSO.
663 */
664
09640e63 665 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 666 ip_hdr(skb)->check = 0;
667 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
668 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 669 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 670 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
671 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
672 }
673
ea0d7d91
SF		 674 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
675 * for the main skb fragment
676 */
677 while (frag_len_left) {
678 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
679 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
680 len, PCI_DMA_TODEVICE);
681 enic_queue_wq_desc_tso(wq, skb,
682 dma_addr,
683 len,
684 mss, hdr_len,
685 vlan_tag_insert, vlan_tag,
1825aca6 686 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 687 frag_len_left -= len;
688 offset += len;
689 }
01f2e4ea 690
ea0d7d91
SF		 691 if (eop)
692 return;
693
694 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
695 * for additional data fragments
696 */
697 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
698 len_left -= frag->size;
699 frag_len_left = frag->size;
700 offset = frag->page_offset;
701
702 while (frag_len_left) {
703 len = min(frag_len_left,
704 (unsigned int)WQ_ENET_MAX_DESC_LEN);
705 dma_addr = pci_map_page(enic->pdev, frag->page,
706 offset, len,
707 PCI_DMA_TODEVICE);
708 enic_queue_wq_desc_cont(wq, skb,
709 dma_addr,
710 len,
711 (len_left == 0) &&
1825aca6
VK		 712 (len == frag_len_left), /* EOP? */
713 loopback);
ea0d7d91
SF		 714 frag_len_left -= len;
715 offset += len;
716 }
717 }
01f2e4ea
SF		 718}
719
720static inline void enic_queue_wq_skb(struct enic *enic,
721 struct vnic_wq *wq, struct sk_buff *skb)
722{
723 unsigned int mss = skb_shinfo(skb)->gso_size;
724 unsigned int vlan_tag = 0;
725 int vlan_tag_insert = 0;
1825aca6 726 int loopback = 0;
01f2e4ea 727
eab6d18d 728 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 729 /* VLAN tag from trunking driver */
730 vlan_tag_insert = 1;
731 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 732 } else if (enic->loop_enable) {
733 vlan_tag = enic->loop_tag;
734 loopback = 1;
01f2e4ea
SF		 735 }
736
737 if (mss)
738 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 739 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 740 else if (skb->ip_summed == CHECKSUM_PARTIAL)
741 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 742 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 743 else
744 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 745 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 746}
747
ed8af6b2 748/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 749static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 750 struct net_device *netdev)
01f2e4ea
SF		 751{
752 struct enic *enic = netdev_priv(netdev);
753 struct vnic_wq *wq = &enic->wq[0];
754 unsigned long flags;
755
756 if (skb->len <= 0) {
757 dev_kfree_skb(skb);
758 return NETDEV_TX_OK;
759 }
760
761 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
762 * which is very likely. In the off chance it's going to take
763 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
764 */
765
766 if (skb_shinfo(skb)->gso_size == 0 &&
767 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
768 skb_linearize(skb)) {
769 dev_kfree_skb(skb);
770 return NETDEV_TX_OK;
771 }
772
773 spin_lock_irqsave(&enic->wq_lock[0], flags);
774
ea0d7d91
SF		 775 if (vnic_wq_desc_avail(wq) <
776 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 777 netif_stop_queue(netdev);
778 /* This is a hard error, log it */
a7a79deb 779 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 780 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
781 return NETDEV_TX_BUSY;
782 }
783
784 enic_queue_wq_skb(enic, wq, skb);
785
ea0d7d91 786 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 787 netif_stop_queue(netdev);
788
01f2e4ea
SF		 789 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
790
791 return NETDEV_TX_OK;
792}
793
794/* dev_base_lock rwlock held, nominally process context */
795static struct net_device_stats *enic_get_stats(struct net_device *netdev)
796{
797 struct enic *enic = netdev_priv(netdev);
25f0a061 798 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF		 799 struct vnic_stats *stats;
800
383ab92f 801 enic_dev_stats_dump(enic, &stats);
01f2e4ea 802
25f0a061
SF		 803 net_stats->tx_packets = stats->tx.tx_frames_ok;
804 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
805 net_stats->tx_errors = stats->tx.tx_errors;
806 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 807
25f0a061
SF		 808 net_stats->rx_packets = stats->rx.rx_frames_ok;
809 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
810 net_stats->rx_errors = stats->rx.rx_errors;
811 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 812 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 813 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 814 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 815
25f0a061 816 return net_stats;
01f2e4ea
SF		 817}
818
b3abfbd2 819void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 820{
821 enic->mc_count = 0;
e0afe53f 822 enic->uc_count = 0;
99ef5639 823 enic->flags = 0;
01f2e4ea
SF		 824}
825
826static int enic_set_mac_addr(struct net_device *netdev, char *addr)
827{
f8bd9091
SF		 828 struct enic *enic = netdev_priv(netdev);
829
830 if (enic_is_dynamic(enic)) {
831 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
832 return -EADDRNOTAVAIL;
833 } else {
834 if (!is_valid_ether_addr(addr))
835 return -EADDRNOTAVAIL;
836 }
01f2e4ea
SF		 837
838 memcpy(netdev->dev_addr, addr, netdev->addr_len);
839
840 return 0;
841}
842
f8bd9091
SF		 843static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
844{
845 struct enic *enic = netdev_priv(netdev);
846 struct sockaddr *saddr = p;
847 char *addr = saddr->sa_data;
848 int err;
849
850 if (netif_running(enic->netdev)) {
851 err = enic_dev_del_station_addr(enic);
852 if (err)
853 return err;
854 }
855
856 err = enic_set_mac_addr(netdev, addr);
857 if (err)
858 return err;
859
860 if (netif_running(enic->netdev)) {
861 err = enic_dev_add_station_addr(enic);
862 if (err)
863 return err;
864 }
865
866 return err;
867}
868
869static int enic_set_mac_address(struct net_device *netdev, void *p)
870{
294dab25 871 struct sockaddr *saddr = p;
c76fd32d
VK		 872 char *addr = saddr->sa_data;
873 struct enic *enic = netdev_priv(netdev);
874 int err;
875
876 err = enic_dev_del_station_addr(enic);
877 if (err)
878 return err;
879
880 err = enic_set_mac_addr(netdev, addr);
881 if (err)
882 return err;
294dab25 883
c76fd32d 884 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 885}
886
e0afe53f 887static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 888{
319d7e84 889 struct net_device *netdev = enic->netdev;
22bedad3 890 struct netdev_hw_addr *ha;
4cd24eaf 891 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 892 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 893 unsigned int i, j;
894
319d7e84
RP		 895 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
896 netdev_warn(netdev, "Registering only %d out of %d "
897 "multicast addresses\n",
898 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 899 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 900 }
01f2e4ea
SF		 901
902 /* Is there an easier way? Trying to minimize to
903 * calls to add/del multicast addrs. We keep the
904 * addrs from the last call in enic->mc_addr and
905 * look for changes to add/del.
906 */
907
48e2f183 908 i = 0;
22bedad3 909 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 910 if (i == mc_count)
911 break;
22bedad3 912 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 913 }
914
915 for (i = 0; i < enic->mc_count; i++) {
916 for (j = 0; j < mc_count; j++)
917 if (compare_ether_addr(enic->mc_addr[i],
918 mc_addr[j]) == 0)
919 break;
920 if (j == mc_count)
319d7e84 921 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 922 }
923
924 for (i = 0; i < mc_count; i++) {
925 for (j = 0; j < enic->mc_count; j++)
926 if (compare_ether_addr(mc_addr[i],
927 enic->mc_addr[j]) == 0)
928 break;
929 if (j == enic->mc_count)
319d7e84 930 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 931 }
932
933 /* Save the list to compare against next time
934 */
935
936 for (i = 0; i < mc_count; i++)
937 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
938
939 enic->mc_count = mc_count;
01f2e4ea
SF		 940}
941
e0afe53f 942static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 943{
944 struct net_device *netdev = enic->netdev;
945 struct netdev_hw_addr *ha;
946 unsigned int uc_count = netdev_uc_count(netdev);
947 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
948 unsigned int i, j;
949
950 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
951 netdev_warn(netdev, "Registering only %d out of %d "
952 "unicast addresses\n",
953 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
954 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
955 }
956
957 /* Is there an easier way? Trying to minimize to
958 * calls to add/del unicast addrs. We keep the
959 * addrs from the last call in enic->uc_addr and
960 * look for changes to add/del.
961 */
962
963 i = 0;
964 netdev_for_each_uc_addr(ha, netdev) {
965 if (i == uc_count)
966 break;
967 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
968 }
969
970 for (i = 0; i < enic->uc_count; i++) {
971 for (j = 0; j < uc_count; j++)
972 if (compare_ether_addr(enic->uc_addr[i],
973 uc_addr[j]) == 0)
974 break;
975 if (j == uc_count)
976 enic_dev_del_addr(enic, enic->uc_addr[i]);
977 }
978
979 for (i = 0; i < uc_count; i++) {
980 for (j = 0; j < enic->uc_count; j++)
981 if (compare_ether_addr(uc_addr[i],
982 enic->uc_addr[j]) == 0)
983 break;
984 if (j == enic->uc_count)
985 enic_dev_add_addr(enic, uc_addr[i]);
986 }
987
988 /* Save the list to compare against next time
989 */
990
991 for (i = 0; i < uc_count; i++)
992 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
993
994 enic->uc_count = uc_count;
995}
996
997/* netif_tx_lock held, BHs disabled */
998static void enic_set_rx_mode(struct net_device *netdev)
999{
1000 struct enic *enic = netdev_priv(netdev);
1001 int directed = 1;
1002 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1003 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1004 int promisc = (netdev->flags & IFF_PROMISC) ||
1005 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1006 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1007 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1008 unsigned int flags = netdev->flags |
1009 (allmulti ? IFF_ALLMULTI : 0) |
1010 (promisc ? IFF_PROMISC : 0);
1011
1012 if (enic->flags != flags) {
1013 enic->flags = flags;
1014 enic_dev_packet_filter(enic, directed,
1015 multicast, broadcast, promisc, allmulti);
1016 }
1017
1018 if (!promisc) {
e0afe53f 1019 enic_update_unicast_addr_list(enic);
319d7e84 1020 if (!allmulti)
e0afe53f 1021 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1022 }
1023}
1024
01f2e4ea
SF		 1025/* rtnl lock is held */
1026static void enic_vlan_rx_register(struct net_device *netdev,
1027 struct vlan_group *vlan_group)
1028{
1029 struct enic *enic = netdev_priv(netdev);
1030 enic->vlan_group = vlan_group;
1031}
1032
01f2e4ea
SF		 1033/* netif_tx_lock held, BHs disabled */
1034static void enic_tx_timeout(struct net_device *netdev)
1035{
1036 struct enic *enic = netdev_priv(netdev);
1037 schedule_work(&enic->reset);
1038}
1039
0b1c00fc
RP		 1040static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1041{
1042 struct enic *enic = netdev_priv(netdev);
1043
1044 if (vf != PORT_SELF_VF)
1045 return -EOPNOTSUPP;
1046
1047 /* Ignore the vf argument for now. We can assume the request
1048 * is coming on a vf.
1049 */
1050 if (is_valid_ether_addr(mac)) {
1051 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1052 return 0;
1053 } else
1054 return -EINVAL;
1055}
1056
f8bd9091
SF		 1057static int enic_set_vf_port(struct net_device *netdev, int vf,
1058 struct nlattr *port[])
1059{
1060 struct enic *enic = netdev_priv(netdev);
b3abfbd2
RP		 1061 struct enic_port_profile prev_pp;
1062 int err = 0, restore_pp = 1;
08f382eb 1063
b3abfbd2
RP		 1064 /* don't support VFs, yet */
1065 if (vf != PORT_SELF_VF)
1066 return -EOPNOTSUPP;
08f382eb 1067
b3abfbd2
RP		 1068 if (!port[IFLA_PORT_REQUEST])
1069 return -EOPNOTSUPP;
1070
1071 memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
1072 memset(&enic->pp, 0, sizeof(enic->pp));
1073
1074 enic->pp.set |= ENIC_SET_REQUEST;
1075 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1076
1077 if (port[IFLA_PORT_PROFILE]) {
b3abfbd2
RP		 1078 enic->pp.set |= ENIC_SET_NAME;
1079 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1080 PORT_PROFILE_MAX);
1081 }
1082
1083 if (port[IFLA_PORT_INSTANCE_UUID]) {
b3abfbd2
RP		 1084 enic->pp.set |= ENIC_SET_INSTANCE;
1085 memcpy(enic->pp.instance_uuid,
08f382eb
SF		 1086 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1087 }
1088
1089 if (port[IFLA_PORT_HOST_UUID]) {
b3abfbd2
RP		 1090 enic->pp.set |= ENIC_SET_HOST;
1091 memcpy(enic->pp.host_uuid,
08f382eb
SF		 1092 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1093 }
f8bd9091 1094
b3abfbd2
RP		 1095 /* Special case handling: mac came from IFLA_VF_MAC */
1096 if (!is_zero_ether_addr(prev_pp.vf_mac))
1097 memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d
SF		 1098
1099 if (is_zero_ether_addr(netdev->dev_addr))
1100 random_ether_addr(netdev->dev_addr);
f8bd9091 1101
b3abfbd2
RP		 1102 err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
1103 if (err) {
1104 if (restore_pp) {
1105 /* Things are still the way they were: Implicit
1106 * DISASSOCIATE failed
1107 */
1108 memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
1109 } else {
1110 memset(&enic->pp, 0, sizeof(enic->pp));
1111 memset(netdev->dev_addr, 0, ETH_ALEN);
1112 }
1113 } else {
1114 /* Set flag to indicate that the port assoc/disassoc
1115 * request has been sent out to fw
1116 */
1117 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1118
1119 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1120 if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1121 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1122 memset(netdev->dev_addr, 0, ETH_ALEN);
1123 }
1124 }
29639059 1125
29639059
RP		 1126 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1127
29639059 1128 return err;
f8bd9091
SF		 1129}
1130
1131static int enic_get_vf_port(struct net_device *netdev, int vf,
1132 struct sk_buff *skb)
1133{
1134 struct enic *enic = netdev_priv(netdev);
f8bd9091 1135 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
b3abfbd2 1136 int err;
f8bd9091 1137
4dce2396 1138 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1139 return -ENODATA;
f8bd9091 1140
b3abfbd2 1141 err = enic_process_get_pp_request(enic, enic->pp.request, &response);
f8bd9091 1142 if (err)
b3abfbd2 1143 return err;
f8bd9091
SF		 1144
1145 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1146 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1147 if (enic->pp.set & ENIC_SET_NAME)
1148 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1149 enic->pp.name);
1150 if (enic->pp.set & ENIC_SET_INSTANCE)
1151 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1152 enic->pp.instance_uuid);
1153 if (enic->pp.set & ENIC_SET_HOST)
1154 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1155 enic->pp.host_uuid);
f8bd9091
SF		 1156
1157 return 0;
1158
1159nla_put_failure:
1160 return -EMSGSIZE;
1161}
1162
01f2e4ea
SF		 1163static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1164{
1165 struct enic *enic = vnic_dev_priv(rq->vdev);
1166
1167 if (!buf->os_buf)
1168 return;
1169
1170 pci_unmap_single(enic->pdev, buf->dma_addr,
1171 buf->len, PCI_DMA_FROMDEVICE);
1172 dev_kfree_skb_any(buf->os_buf);
1173}
1174
01f2e4ea
SF		 1175static int enic_rq_alloc_buf(struct vnic_rq *rq)
1176{
1177 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1178 struct net_device *netdev = enic->netdev;
01f2e4ea 1179 struct sk_buff *skb;
1825aca6 1180 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1181 unsigned int os_buf_index = 0;
1182 dma_addr_t dma_addr;
1183
89d71a66 1184 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1185 if (!skb)
1186 return -ENOMEM;
1187
1188 dma_addr = pci_map_single(enic->pdev, skb->data,
1189 len, PCI_DMA_FROMDEVICE);
1190
1191 enic_queue_rq_desc(rq, skb, os_buf_index,
1192 dma_addr, len);
1193
1194 return 0;
1195}
1196
01f2e4ea
SF		 1197static void enic_rq_indicate_buf(struct vnic_rq *rq,
1198 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1199 int skipped, void *opaque)
1200{
1201 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1202 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1203 struct sk_buff *skb;
1204
1205 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1206 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1207 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1208 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1209 u8 packet_error;
f8cac14a 1210 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1211 u32 rss_hash;
1212
1213 if (skipped)
1214 return;
1215
1216 skb = buf->os_buf;
1217 prefetch(skb->data - NET_IP_ALIGN);
1218 pci_unmap_single(enic->pdev, buf->dma_addr,
1219 buf->len, PCI_DMA_FROMDEVICE);
1220
1221 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1222 &type, &color, &q_number, &completed_index,
1223 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1224 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1225 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1226 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1227 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1228 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1229 &fcs_ok);
1230
1231 if (packet_error) {
1232
350991e1
SF		 1233 if (!fcs_ok) {
1234 if (bytes_written > 0)
1235 enic->rq_bad_fcs++;
1236 else if (bytes_written == 0)
1237 enic->rq_truncated_pkts++;
1238 }
01f2e4ea
SF		 1239
1240 dev_kfree_skb_any(skb);
1241
1242 return;
1243 }
1244
1245 if (eop && bytes_written > 0) {
1246
1247 /* Good receive
1248 */
1249
1250 skb_put(skb, bytes_written);
86ca9db7 1251 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1252
5ec8f9b8 1253 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1254 skb->csum = htons(checksum);
1255 skb->ip_summed = CHECKSUM_COMPLETE;
1256 }
1257
86ca9db7 1258 skb->dev = netdev;
01f2e4ea 1259
f8cac14a
VK		 1260 if (enic->vlan_group && vlan_stripped &&
1261 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1262
88132f55 1263 if (netdev->features & NETIF_F_GRO)
717258ba
VK		 1264 vlan_gro_receive(&enic->napi[q_number],
1265 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF		 1266 else
1267 vlan_hwaccel_receive_skb(skb,
f8cac14a 1268 enic->vlan_group, vlan_tci);
01f2e4ea
SF		 1269
1270 } else {
1271
88132f55 1272 if (netdev->features & NETIF_F_GRO)
717258ba 1273 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF		 1274 else
1275 netif_receive_skb(skb);
1276
1277 }
01f2e4ea
SF		 1278 } else {
1279
1280 /* Buffer overflow
1281 */
1282
1283 dev_kfree_skb_any(skb);
1284 }
1285}
1286
1287static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1288 u8 type, u16 q_number, u16 completed_index, void *opaque)
1289{
1290 struct enic *enic = vnic_dev_priv(vdev);
1291
1292 vnic_rq_service(&enic->rq[q_number], cq_desc,
1293 completed_index, VNIC_RQ_RETURN_DESC,
1294 enic_rq_indicate_buf, opaque);
1295
1296 return 0;
1297}
1298
01f2e4ea
SF		 1299static int enic_poll(struct napi_struct *napi, int budget)
1300{
717258ba
VK		 1301 struct net_device *netdev = napi->dev;
1302 struct enic *enic = netdev_priv(netdev);
1303 unsigned int cq_rq = enic_cq_rq(enic, 0);
1304 unsigned int cq_wq = enic_cq_wq(enic, 0);
1305 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1306 unsigned int rq_work_to_do = budget;
1307 unsigned int wq_work_to_do = -1; /* no limit */
1308 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1309 int err;
01f2e4ea
SF		 1310
1311 /* Service RQ (first) and WQ
1312 */
1313
717258ba 1314 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1315 rq_work_to_do, enic_rq_service, NULL);
1316
717258ba 1317 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1318 wq_work_to_do, enic_wq_service, NULL);
1319
1320 /* Accumulate intr event credits for this polling
1321 * cycle. An intr event is the completion of a
1322 * a WQ or RQ packet.
1323 */
1324
1325 work_done = rq_work_done + wq_work_done;
1326
1327 if (work_done > 0)
717258ba 1328 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1329 work_done,
1330 0 /* don't unmask intr */,
1331 0 /* don't reset intr timer */);
1332
0eb26022 1333 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1334
2d6ddced
SF		 1335 /* Buffer allocation failed. Stay in polling
1336 * mode so we can try to fill the ring again.
1337 */
01f2e4ea 1338
2d6ddced
SF		 1339 if (err)
1340 rq_work_done = rq_work_to_do;
01f2e4ea 1341
2d6ddced 1342 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1343
2d6ddced 1344 /* Some work done, but not enough to stay in polling,
88132f55 1345 * exit polling
01f2e4ea
SF		 1346 */
1347
288379f0 1348 napi_complete(napi);
717258ba 1349 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1350 }
1351
1352 return rq_work_done;
1353}
1354
1355static int enic_poll_msix(struct napi_struct *napi, int budget)
1356{
717258ba
VK		 1357 struct net_device *netdev = napi->dev;
1358 struct enic *enic = netdev_priv(netdev);
1359 unsigned int rq = (napi - &enic->napi[0]);
1360 unsigned int cq = enic_cq_rq(enic, rq);
1361 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1362 unsigned int work_to_do = budget;
1363 unsigned int work_done;
2d6ddced 1364 int err;
01f2e4ea
SF		 1365
1366 /* Service RQ
1367 */
1368
717258ba 1369 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1370 work_to_do, enic_rq_service, NULL);
1371
2d6ddced
SF		 1372 /* Return intr event credits for this polling
1373 * cycle. An intr event is the completion of a
1374 * RQ packet.
1375 */
01f2e4ea 1376
2d6ddced 1377 if (work_done > 0)
717258ba 1378 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1379 work_done,
1380 0 /* don't unmask intr */,
1381 0 /* don't reset intr timer */);
01f2e4ea 1382
0eb26022 1383 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1384
1385 /* Buffer allocation failed. Stay in polling mode
1386 * so we can try to fill the ring again.
1387 */
1388
1389 if (err)
1390 work_done = work_to_do;
1391
1392 if (work_done < work_to_do) {
1393
1394 /* Some work done, but not enough to stay in polling,
88132f55 1395 * exit polling
01f2e4ea
SF		 1396 */
1397
288379f0 1398 napi_complete(napi);
717258ba 1399 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1400 }
1401
1402 return work_done;
1403}
1404
1405static void enic_notify_timer(unsigned long data)
1406{
1407 struct enic *enic = (struct enic *)data;
1408
1409 enic_notify_check(enic);
1410
25f0a061
SF		 1411 mod_timer(&enic->notify_timer,
1412 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1413}
1414
1415static void enic_free_intr(struct enic *enic)
1416{
1417 struct net_device *netdev = enic->netdev;
1418 unsigned int i;
1419
1420 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1421 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1422 free_irq(enic->pdev->irq, netdev);
1423 break;
8f4d248c
SF		 1424 case VNIC_DEV_INTR_MODE_MSI:
1425 free_irq(enic->pdev->irq, enic);
1426 break;
01f2e4ea
SF		 1427 case VNIC_DEV_INTR_MODE_MSIX:
1428 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1429 if (enic->msix[i].requested)
1430 free_irq(enic->msix_entry[i].vector,
1431 enic->msix[i].devid);
1432 break;
1433 default:
1434 break;
1435 }
1436}
1437
1438static int enic_request_intr(struct enic *enic)
1439{
1440 struct net_device *netdev = enic->netdev;
717258ba 1441 unsigned int i, intr;
01f2e4ea
SF		 1442 int err = 0;
1443
1444 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1445
1446 case VNIC_DEV_INTR_MODE_INTX:
1447
1448 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1449 IRQF_SHARED, netdev->name, netdev);
1450 break;
1451
1452 case VNIC_DEV_INTR_MODE_MSI:
1453
1454 err = request_irq(enic->pdev->irq, enic_isr_msi,
1455 0, netdev->name, enic);
1456 break;
1457
1458 case VNIC_DEV_INTR_MODE_MSIX:
1459
717258ba
VK		 1460 for (i = 0; i < enic->rq_count; i++) {
1461 intr = enic_msix_rq_intr(enic, i);
1462 sprintf(enic->msix[intr].devname,
1463 "%.11s-rx-%d", netdev->name, i);
1464 enic->msix[intr].isr = enic_isr_msix_rq;
1465 enic->msix[intr].devid = &enic->napi[i];
1466 }
01f2e4ea 1467
717258ba
VK		 1468 for (i = 0; i < enic->wq_count; i++) {
1469 intr = enic_msix_wq_intr(enic, i);
1470 sprintf(enic->msix[intr].devname,
1471 "%.11s-tx-%d", netdev->name, i);
1472 enic->msix[intr].isr = enic_isr_msix_wq;
1473 enic->msix[intr].devid = enic;
1474 }
01f2e4ea 1475
717258ba
VK		 1476 intr = enic_msix_err_intr(enic);
1477 sprintf(enic->msix[intr].devname,
01f2e4ea 1478 "%.11s-err", netdev->name);
717258ba
VK		 1479 enic->msix[intr].isr = enic_isr_msix_err;
1480 enic->msix[intr].devid = enic;
01f2e4ea 1481
717258ba
VK		 1482 intr = enic_msix_notify_intr(enic);
1483 sprintf(enic->msix[intr].devname,
01f2e4ea 1484 "%.11s-notify", netdev->name);
717258ba
VK		 1485 enic->msix[intr].isr = enic_isr_msix_notify;
1486 enic->msix[intr].devid = enic;
1487
1488 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1489 enic->msix[i].requested = 0;
01f2e4ea 1490
717258ba 1491 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1492 err = request_irq(enic->msix_entry[i].vector,
1493 enic->msix[i].isr, 0,
1494 enic->msix[i].devname,
1495 enic->msix[i].devid);
1496 if (err) {
1497 enic_free_intr(enic);
1498 break;
1499 }
1500 enic->msix[i].requested = 1;
1501 }
1502
1503 break;
1504
1505 default:
1506 break;
1507 }
1508
1509 return err;
1510}
1511
b3d18d19
SF		 1512static void enic_synchronize_irqs(struct enic *enic)
1513{
1514 unsigned int i;
1515
1516 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1517 case VNIC_DEV_INTR_MODE_INTX:
1518 case VNIC_DEV_INTR_MODE_MSI:
1519 synchronize_irq(enic->pdev->irq);
1520 break;
1521 case VNIC_DEV_INTR_MODE_MSIX:
1522 for (i = 0; i < enic->intr_count; i++)
1523 synchronize_irq(enic->msix_entry[i].vector);
1524 break;
1525 default:
1526 break;
1527 }
1528}
1529
383ab92f 1530static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1531{
1532 int err;
1533
56ac88b3 1534 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1535 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1536 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1537 err = vnic_dev_notify_set(enic->vdev,
1538 enic_legacy_notify_intr());
01f2e4ea
SF		 1539 break;
1540 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1541 err = vnic_dev_notify_set(enic->vdev,
1542 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1543 break;
1544 default:
1545 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1546 break;
1547 }
56ac88b3 1548 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1549
1550 return err;
1551}
1552
1553static void enic_notify_timer_start(struct enic *enic)
1554{
1555 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1556 case VNIC_DEV_INTR_MODE_MSI:
1557 mod_timer(&enic->notify_timer, jiffies);
1558 break;
1559 default:
1560 /* Using intr for notification for INTx/MSI-X */
1561 break;
1562 };
1563}
1564
1565/* rtnl lock is held, process context */
1566static int enic_open(struct net_device *netdev)
1567{
1568 struct enic *enic = netdev_priv(netdev);
1569 unsigned int i;
1570 int err;
1571
4b75a442
SF		 1572 err = enic_request_intr(enic);
1573 if (err) {
a7a79deb 1574 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1575 return err;
1576 }
1577
383ab92f 1578 err = enic_dev_notify_set(enic);
4b75a442 1579 if (err) {
a7a79deb
VK		 1580 netdev_err(netdev,
1581 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1582 goto err_out_free_intr;
1583 }
1584
01f2e4ea 1585 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1586 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1587 /* Need at least one buffer on ring to get going */
1588 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1589 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1590 err = -ENOMEM;
4b75a442 1591 goto err_out_notify_unset;
01f2e4ea
SF		 1592 }
1593 }
1594
1595 for (i = 0; i < enic->wq_count; i++)
1596 vnic_wq_enable(&enic->wq[i]);
1597 for (i = 0; i < enic->rq_count; i++)
1598 vnic_rq_enable(&enic->rq[i]);
1599
29639059
RP		 1600 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1601 enic_dev_add_addr(enic, enic->pp.mac_addr);
1602 else
1603 enic_dev_add_station_addr(enic);
319d7e84 1604 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1605
1606 netif_wake_queue(netdev);
717258ba
VK		 1607
1608 for (i = 0; i < enic->rq_count; i++)
1609 napi_enable(&enic->napi[i]);
1610
383ab92f 1611 enic_dev_enable(enic);
01f2e4ea
SF		 1612
1613 for (i = 0; i < enic->intr_count; i++)
1614 vnic_intr_unmask(&enic->intr[i]);
1615
1616 enic_notify_timer_start(enic);
1617
1618 return 0;
4b75a442
SF		 1619
1620err_out_notify_unset:
383ab92f 1621 enic_dev_notify_unset(enic);
4b75a442
SF		 1622err_out_free_intr:
1623 enic_free_intr(enic);
1624
1625 return err;
01f2e4ea
SF		 1626}
1627
1628/* rtnl lock is held, process context */
1629static int enic_stop(struct net_device *netdev)
1630{
1631 struct enic *enic = netdev_priv(netdev);
1632 unsigned int i;
1633 int err;
1634
29046f9b 1635 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1636 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1637 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1638 }
b3d18d19
SF		 1639
1640 enic_synchronize_irqs(enic);
1641
01f2e4ea
SF		 1642 del_timer_sync(&enic->notify_timer);
1643
383ab92f 1644 enic_dev_disable(enic);
717258ba
VK		 1645
1646 for (i = 0; i < enic->rq_count; i++)
1647 napi_disable(&enic->napi[i]);
1648
b3d18d19
SF		 1649 netif_carrier_off(netdev);
1650 netif_tx_disable(netdev);
29639059
RP		 1651 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1652 enic_dev_del_addr(enic, enic->pp.mac_addr);
1653 else
1654 enic_dev_del_station_addr(enic);
f8bd9091 1655
01f2e4ea
SF		 1656 for (i = 0; i < enic->wq_count; i++) {
1657 err = vnic_wq_disable(&enic->wq[i]);
1658 if (err)
1659 return err;
1660 }
1661 for (i = 0; i < enic->rq_count; i++) {
1662 err = vnic_rq_disable(&enic->rq[i]);
1663 if (err)
1664 return err;
1665 }
1666
383ab92f 1667 enic_dev_notify_unset(enic);
4b75a442
SF		 1668 enic_free_intr(enic);
1669
01f2e4ea
SF		 1670 for (i = 0; i < enic->wq_count; i++)
1671 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1672 for (i = 0; i < enic->rq_count; i++)
1673 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1674 for (i = 0; i < enic->cq_count; i++)
1675 vnic_cq_clean(&enic->cq[i]);
1676 for (i = 0; i < enic->intr_count; i++)
1677 vnic_intr_clean(&enic->intr[i]);
1678
1679 return 0;
1680}
1681
1682static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1683{
1684 struct enic *enic = netdev_priv(netdev);
1685 int running = netif_running(netdev);
1686
25f0a061
SF		 1687 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1688 return -EINVAL;
1689
01f2e4ea
SF		 1690 if (running)
1691 enic_stop(netdev);
1692
01f2e4ea
SF		 1693 netdev->mtu = new_mtu;
1694
1695 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1696 netdev_warn(netdev,
1697 "interface MTU (%d) set higher than port MTU (%d)\n",
1698 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1699
1700 if (running)
1701 enic_open(netdev);
1702
1703 return 0;
1704}
1705
1706#ifdef CONFIG_NET_POLL_CONTROLLER
1707static void enic_poll_controller(struct net_device *netdev)
1708{
1709 struct enic *enic = netdev_priv(netdev);
1710 struct vnic_dev *vdev = enic->vdev;
717258ba 1711 unsigned int i, intr;
01f2e4ea
SF		 1712
1713 switch (vnic_dev_get_intr_mode(vdev)) {
1714 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1715 for (i = 0; i < enic->rq_count; i++) {
1716 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1717 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1718 &enic->napi[i]);
717258ba
VK		 1719 }
1720 intr = enic_msix_wq_intr(enic, i);
1721 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF		 1722 break;
1723 case VNIC_DEV_INTR_MODE_MSI:
1724 enic_isr_msi(enic->pdev->irq, enic);
1725 break;
1726 case VNIC_DEV_INTR_MODE_INTX:
1727 enic_isr_legacy(enic->pdev->irq, netdev);
1728 break;
1729 default:
1730 break;
1731 }
1732}
1733#endif
1734
1735static int enic_dev_wait(struct vnic_dev *vdev,
1736 int (*start)(struct vnic_dev *, int),
1737 int (*finished)(struct vnic_dev *, int *),
1738 int arg)
1739{
1740 unsigned long time;
1741 int done;
1742 int err;
1743
1744 BUG_ON(in_interrupt());
1745
1746 err = start(vdev, arg);
1747 if (err)
1748 return err;
1749
1750 /* Wait for func to complete...2 seconds max
1751 */
1752
1753 time = jiffies + (HZ * 2);
1754 do {
1755
1756 err = finished(vdev, &done);
1757 if (err)
1758 return err;
1759
1760 if (done)
1761 return 0;
1762
1763 schedule_timeout_uninterruptible(HZ / 10);
1764
1765 } while (time_after(time, jiffies));
1766
1767 return -ETIMEDOUT;
1768}
1769
1770static int enic_dev_open(struct enic *enic)
1771{
1772 int err;
1773
1774 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1775 vnic_dev_open_done, 0);
1776 if (err)
a7a79deb
VK		 1777 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1778 err);
01f2e4ea
SF		 1779
1780 return err;
1781}
1782
99ef5639 1783static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1784{
1785 int err;
1786
99ef5639
VK		 1787 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1788 vnic_dev_hang_reset_done, 0);
01f2e4ea 1789 if (err)
a7a79deb
VK		 1790 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1791 err);
01f2e4ea
SF		 1792
1793 return err;
1794}
1795
717258ba
VK		 1796static int enic_set_rsskey(struct enic *enic)
1797{
1f4f067f 1798 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1799 union vnic_rss_key *rss_key_buf_va = NULL;
1800 union vnic_rss_key rss_key = {
1801 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1802 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1803 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1804 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1805 };
1806 int err;
1807
1808 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1809 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1810 if (!rss_key_buf_va)
1811 return -ENOMEM;
1812
1813 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1814
1815 spin_lock(&enic->devcmd_lock);
1816 err = enic_set_rss_key(enic,
1817 rss_key_buf_pa,
1818 sizeof(union vnic_rss_key));
1819 spin_unlock(&enic->devcmd_lock);
1820
1821 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1822 rss_key_buf_va, rss_key_buf_pa);
1823
1824 return err;
1825}
1826
1827static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1828{
1f4f067f 1829 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1830 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1831 unsigned int i;
1832 int err;
1833
1834 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1835 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1836 if (!rss_cpu_buf_va)
1837 return -ENOMEM;
1838
1839 for (i = 0; i < (1 << rss_hash_bits); i++)
1840 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1841
1842 spin_lock(&enic->devcmd_lock);
1843 err = enic_set_rss_cpu(enic,
1844 rss_cpu_buf_pa,
1845 sizeof(union vnic_rss_cpu));
1846 spin_unlock(&enic->devcmd_lock);
1847
1848 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1849 rss_cpu_buf_va, rss_cpu_buf_pa);
1850
1851 return err;
1852}
1853
1854static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1855 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1856{
68f71708
SF		 1857 const u8 tso_ipid_split_en = 0;
1858 const u8 ig_vlan_strip_en = 1;
383ab92f 1859 int err;
68f71708 1860
717258ba
VK		 1861 /* Enable VLAN tag stripping.
1862 */
68f71708 1863
383ab92f
VK		 1864 spin_lock(&enic->devcmd_lock);
1865 err = enic_set_nic_cfg(enic,
68f71708
SF		 1866 rss_default_cpu, rss_hash_type,
1867 rss_hash_bits, rss_base_cpu,
1868 rss_enable, tso_ipid_split_en,
1869 ig_vlan_strip_en);
383ab92f
VK		 1870 spin_unlock(&enic->devcmd_lock);
1871
1872 return err;
1873}
1874
717258ba
VK		 1875static int enic_set_rss_nic_cfg(struct enic *enic)
1876{
1877 struct device *dev = enic_get_dev(enic);
1878 const u8 rss_default_cpu = 0;
1879 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1880 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1881 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1882 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1883 const u8 rss_hash_bits = 7;
1884 const u8 rss_base_cpu = 0;
1885 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1886
1887 if (rss_enable) {
1888 if (!enic_set_rsskey(enic)) {
1889 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1890 rss_enable = 0;
1891 dev_warn(dev, "RSS disabled, "
1892 "Failed to set RSS cpu indirection table.");
1893 }
1894 } else {
1895 rss_enable = 0;
1896 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1897 }
1898 }
1899
1900 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1901 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1902}
1903
01f2e4ea
SF		 1904static void enic_reset(struct work_struct *work)
1905{
1906 struct enic *enic = container_of(work, struct enic, reset);
1907
1908 if (!netif_running(enic->netdev))
1909 return;
1910
1911 rtnl_lock();
1912
383ab92f 1913 enic_dev_hang_notify(enic);
01f2e4ea 1914 enic_stop(enic->netdev);
99ef5639 1915 enic_dev_hang_reset(enic);
e0afe53f 1916 enic_reset_addr_lists(enic);
01f2e4ea 1917 enic_init_vnic_resources(enic);
717258ba 1918 enic_set_rss_nic_cfg(enic);
f8cac14a 1919 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1920 enic_open(enic->netdev);
1921
1922 rtnl_unlock();
1923}
1924
1925static int enic_set_intr_mode(struct enic *enic)
1926{
717258ba 1927 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1928 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1929 unsigned int i;
1930
1931 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1932 * on system capabilities.
01f2e4ea
SF		 1933 *
1934 * Try MSI-X first
1935 *
1936 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1937 * (the second to last INTR is used for WQ/RQ errors)
1938 * (the last INTR is used for notifications)
1939 */
1940
1941 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
1942 for (i = 0; i < n + m + 2; i++)
1943 enic->msix_entry[i].entry = i;
1944
717258ba
VK		 1945 /* Use multiple RQs if RSS is enabled
1946 */
1947
1948 if (ENIC_SETTING(enic, RSS) &&
1949 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 1950 enic->rq_count >= n &&
1951 enic->wq_count >= m &&
1952 enic->cq_count >= n + m &&
717258ba 1953 enic->intr_count >= n + m + 2) {
01f2e4ea 1954
717258ba 1955 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 1956
717258ba
VK		 1957 enic->rq_count = n;
1958 enic->wq_count = m;
1959 enic->cq_count = n + m;
1960 enic->intr_count = n + m + 2;
01f2e4ea 1961
717258ba
VK		 1962 vnic_dev_set_intr_mode(enic->vdev,
1963 VNIC_DEV_INTR_MODE_MSIX);
1964
1965 return 0;
1966 }
1967 }
1968
1969 if (enic->config.intr_mode < 1 &&
1970 enic->rq_count >= 1 &&
1971 enic->wq_count >= m &&
1972 enic->cq_count >= 1 + m &&
1973 enic->intr_count >= 1 + m + 2) {
1974 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
1975
1976 enic->rq_count = 1;
1977 enic->wq_count = m;
1978 enic->cq_count = 1 + m;
1979 enic->intr_count = 1 + m + 2;
1980
1981 vnic_dev_set_intr_mode(enic->vdev,
1982 VNIC_DEV_INTR_MODE_MSIX);
1983
1984 return 0;
1985 }
01f2e4ea
SF		 1986 }
1987
1988 /* Next try MSI
1989 *
1990 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
1991 */
1992
1993 if (enic->config.intr_mode < 2 &&
1994 enic->rq_count >= 1 &&
1995 enic->wq_count >= 1 &&
1996 enic->cq_count >= 2 &&
1997 enic->intr_count >= 1 &&
1998 !pci_enable_msi(enic->pdev)) {
1999
2000 enic->rq_count = 1;
2001 enic->wq_count = 1;
2002 enic->cq_count = 2;
2003 enic->intr_count = 1;
2004
2005 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2006
2007 return 0;
2008 }
2009
2010 /* Next try INTx
2011 *
2012 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2013 * (the first INTR is used for WQ/RQ)
2014 * (the second INTR is used for WQ/RQ errors)
2015 * (the last INTR is used for notifications)
2016 */
2017
2018 if (enic->config.intr_mode < 3 &&
2019 enic->rq_count >= 1 &&
2020 enic->wq_count >= 1 &&
2021 enic->cq_count >= 2 &&
2022 enic->intr_count >= 3) {
2023
2024 enic->rq_count = 1;
2025 enic->wq_count = 1;
2026 enic->cq_count = 2;
2027 enic->intr_count = 3;
2028
2029 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2030
2031 return 0;
2032 }
2033
2034 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2035
2036 return -EINVAL;
2037}
2038
2039static void enic_clear_intr_mode(struct enic *enic)
2040{
2041 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2042 case VNIC_DEV_INTR_MODE_MSIX:
2043 pci_disable_msix(enic->pdev);
2044 break;
2045 case VNIC_DEV_INTR_MODE_MSI:
2046 pci_disable_msi(enic->pdev);
2047 break;
2048 default:
2049 break;
2050 }
2051
2052 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2053}
2054
f8bd9091
SF		 2055static const struct net_device_ops enic_netdev_dynamic_ops = {
2056 .ndo_open = enic_open,
2057 .ndo_stop = enic_stop,
2058 .ndo_start_xmit = enic_hard_start_xmit,
2059 .ndo_get_stats = enic_get_stats,
2060 .ndo_validate_addr = eth_validate_addr,
319d7e84
RP		 2061 .ndo_set_rx_mode = enic_set_rx_mode,
2062 .ndo_set_multicast_list = enic_set_rx_mode,
f8bd9091
SF		 2063 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2064 .ndo_change_mtu = enic_change_mtu,
2065 .ndo_vlan_rx_register = enic_vlan_rx_register,
2066 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2067 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2068 .ndo_tx_timeout = enic_tx_timeout,
2069 .ndo_set_vf_port = enic_set_vf_port,
2070 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2071 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2072#ifdef CONFIG_NET_POLL_CONTROLLER
2073 .ndo_poll_controller = enic_poll_controller,
2074#endif
2075};
2076
afe29f7a
SH		 2077static const struct net_device_ops enic_netdev_ops = {
2078 .ndo_open = enic_open,
2079 .ndo_stop = enic_stop,
00829823 2080 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH		 2081 .ndo_get_stats = enic_get_stats,
2082 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2083 .ndo_set_mac_address = enic_set_mac_address,
319d7e84
RP		 2084 .ndo_set_rx_mode = enic_set_rx_mode,
2085 .ndo_set_multicast_list = enic_set_rx_mode,
afe29f7a
SH		 2086 .ndo_change_mtu = enic_change_mtu,
2087 .ndo_vlan_rx_register = enic_vlan_rx_register,
2088 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2089 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2090 .ndo_tx_timeout = enic_tx_timeout,
2091#ifdef CONFIG_NET_POLL_CONTROLLER
2092 .ndo_poll_controller = enic_poll_controller,
2093#endif
2094};
2095
2fdba388 2096static void enic_dev_deinit(struct enic *enic)
6fdfa970 2097{
717258ba
VK		 2098 unsigned int i;
2099
2100 for (i = 0; i < enic->rq_count; i++)
2101 netif_napi_del(&enic->napi[i]);
2102
6fdfa970
SF		 2103 enic_free_vnic_resources(enic);
2104 enic_clear_intr_mode(enic);
2105}
2106
2fdba388 2107static int enic_dev_init(struct enic *enic)
6fdfa970 2108{
a7a79deb 2109 struct device *dev = enic_get_dev(enic);
6fdfa970 2110 struct net_device *netdev = enic->netdev;
717258ba 2111 unsigned int i;
6fdfa970
SF		 2112 int err;
2113
2114 /* Get vNIC configuration
2115 */
2116
2117 err = enic_get_vnic_config(enic);
2118 if (err) {
a7a79deb 2119 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2120 return err;
2121 }
2122
2123 /* Get available resource counts
2124 */
2125
2126 enic_get_res_counts(enic);
2127
2128 /* Set interrupt mode based on resource counts and system
2129 * capabilities
2130 */
2131
2132 err = enic_set_intr_mode(enic);
2133 if (err) {
a7a79deb
VK		 2134 dev_err(dev, "Failed to set intr mode based on resource "
2135 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2136 return err;
2137 }
2138
2139 /* Allocate and configure vNIC resources
2140 */
2141
2142 err = enic_alloc_vnic_resources(enic);
2143 if (err) {
a7a79deb 2144 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2145 goto err_out_free_vnic_resources;
2146 }
2147
2148 enic_init_vnic_resources(enic);
2149
717258ba 2150 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2151 if (err) {
a7a79deb 2152 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2153 goto err_out_free_vnic_resources;
2154 }
2155
2156 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2157 default:
717258ba 2158 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2159 break;
2160 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2161 for (i = 0; i < enic->rq_count; i++)
2162 netif_napi_add(netdev, &enic->napi[i],
2163 enic_poll_msix, 64);
6fdfa970
SF		 2164 break;
2165 }
2166
2167 return 0;
2168
2169err_out_free_vnic_resources:
2170 enic_clear_intr_mode(enic);
2171 enic_free_vnic_resources(enic);
2172
2173 return err;
2174}
2175
27e6c7d3
SF		 2176static void enic_iounmap(struct enic *enic)
2177{
2178 unsigned int i;
2179
2180 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2181 if (enic->bar[i].vaddr)
2182 iounmap(enic->bar[i].vaddr);
2183}
2184
01f2e4ea
SF		 2185static int __devinit enic_probe(struct pci_dev *pdev,
2186 const struct pci_device_id *ent)
2187{
a7a79deb 2188 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2189 struct net_device *netdev;
2190 struct enic *enic;
2191 int using_dac = 0;
2192 unsigned int i;
2193 int err;
2194
01f2e4ea
SF		 2195 /* Allocate net device structure and initialize. Private
2196 * instance data is initialized to zero.
2197 */
2198
2199 netdev = alloc_etherdev(sizeof(struct enic));
2200 if (!netdev) {
a7a79deb 2201 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2202 return -ENOMEM;
2203 }
2204
01f2e4ea
SF		 2205 pci_set_drvdata(pdev, netdev);
2206
2207 SET_NETDEV_DEV(netdev, &pdev->dev);
2208
2209 enic = netdev_priv(netdev);
2210 enic->netdev = netdev;
2211 enic->pdev = pdev;
2212
2213 /* Setup PCI resources
2214 */
2215
29046f9b 2216 err = pci_enable_device_mem(pdev);
01f2e4ea 2217 if (err) {
a7a79deb 2218 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2219 goto err_out_free_netdev;
2220 }
2221
2222 err = pci_request_regions(pdev, DRV_NAME);
2223 if (err) {
a7a79deb 2224 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2225 goto err_out_disable_device;
2226 }
2227
2228 pci_set_master(pdev);
2229
2230 /* Query PCI controller on system for DMA addressing
2231 * limitation for the device. Try 40-bit first, and
2232 * fail to 32-bit.
2233 */
2234
50cf156a 2235 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2236 if (err) {
284901a9 2237 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2238 if (err) {
a7a79deb 2239 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2240 goto err_out_release_regions;
2241 }
284901a9 2242 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2243 if (err) {
a7a79deb
VK		 2244 dev_err(dev, "Unable to obtain %u-bit DMA "
2245 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2246 goto err_out_release_regions;
2247 }
2248 } else {
50cf156a 2249 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2250 if (err) {
a7a79deb
VK		 2251 dev_err(dev, "Unable to obtain %u-bit DMA "
2252 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2253 goto err_out_release_regions;
2254 }
2255 using_dac = 1;
2256 }
2257
27e6c7d3 2258 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2259 */
2260
27e6c7d3
SF		 2261 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2262 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2263 continue;
2264 enic->bar[i].len = pci_resource_len(pdev, i);
2265 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2266 if (!enic->bar[i].vaddr) {
a7a79deb 2267 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2268 err = -ENODEV;
2269 goto err_out_iounmap;
2270 }
2271 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2272 }
2273
2274 /* Register vNIC device
2275 */
2276
27e6c7d3
SF		 2277 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2278 ARRAY_SIZE(enic->bar));
01f2e4ea 2279 if (!enic->vdev) {
a7a79deb 2280 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2281 err = -ENODEV;
2282 goto err_out_iounmap;
2283 }
2284
2285 /* Issue device open to get device in known state
2286 */
2287
2288 err = enic_dev_open(enic);
2289 if (err) {
a7a79deb 2290 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2291 goto err_out_vnic_unregister;
2292 }
2293
69161425
VK		 2294 /* Setup devcmd lock
2295 */
2296
2297 spin_lock_init(&enic->devcmd_lock);
2298
2299 /*
2300 * Set ingress vlan rewrite mode before vnic initialization
2301 */
2302
2303 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2304 if (err) {
2305 dev_err(dev,
2306 "Failed to set ingress vlan rewrite mode, aborting.\n");
2307 goto err_out_dev_close;
2308 }
2309
01f2e4ea
SF		 2310 /* Issue device init to initialize the vnic-to-switch link.
2311 * We'll start with carrier off and wait for link UP
2312 * notification later to turn on carrier. We don't need
2313 * to wait here for the vnic-to-switch link initialization
2314 * to complete; link UP notification is the indication that
2315 * the process is complete.
2316 */
2317
2318 netif_carrier_off(netdev);
2319
a7a79deb
VK		 2320 /* Do not call dev_init for a dynamic vnic.
2321 * For a dynamic vnic, init_prov_info will be
2322 * called later by an upper layer.
2323 */
2324
f8bd9091
SF		 2325 if (!enic_is_dynamic(enic)) {
2326 err = vnic_dev_init(enic->vdev, 0);
2327 if (err) {
a7a79deb 2328 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2329 goto err_out_dev_close;
2330 }
01f2e4ea
SF		 2331 }
2332
6fdfa970 2333 err = enic_dev_init(enic);
01f2e4ea 2334 if (err) {
a7a79deb 2335 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2336 goto err_out_dev_close;
2337 }
2338
383ab92f 2339 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2340 */
2341
2342 init_timer(&enic->notify_timer);
2343 enic->notify_timer.function = enic_notify_timer;
2344 enic->notify_timer.data = (unsigned long)enic;
2345
2346 INIT_WORK(&enic->reset, enic_reset);
2347
2348 for (i = 0; i < enic->wq_count; i++)
2349 spin_lock_init(&enic->wq_lock[i]);
2350
01f2e4ea
SF		 2351 /* Register net device
2352 */
2353
2354 enic->port_mtu = enic->config.mtu;
2355 (void)enic_change_mtu(netdev, enic->port_mtu);
2356
2357 err = enic_set_mac_addr(netdev, enic->mac_addr);
2358 if (err) {
a7a79deb 2359 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2360 goto err_out_dev_deinit;
01f2e4ea
SF		 2361 }
2362
7c844599
SF		 2363 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2364 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2365
f8bd9091
SF		 2366 if (enic_is_dynamic(enic))
2367 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2368 else
2369 netdev->netdev_ops = &enic_netdev_ops;
2370
01f2e4ea
SF		 2371 netdev->watchdog_timeo = 2 * HZ;
2372 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2373
73c1ea9b 2374 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2375 if (ENIC_SETTING(enic, LOOP)) {
2376 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2377 enic->loop_enable = 1;
2378 enic->loop_tag = enic->config.loop_tag;
2379 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2380 }
01f2e4ea 2381 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2382 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2383 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2384 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2385 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2386 if (ENIC_SETTING(enic, RXCSUM))
2387 netdev->hw_features |= NETIF_F_RXCSUM;
2388
2389 netdev->features |= netdev->hw_features;
2390
01f2e4ea
SF		 2391 if (using_dac)
2392 netdev->features |= NETIF_F_HIGHDMA;
2393
01f2e4ea
SF		 2394 err = register_netdev(netdev);
2395 if (err) {
a7a79deb 2396 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2397 goto err_out_dev_deinit;
01f2e4ea
SF		 2398 }
2399
2400 return 0;
2401
6fdfa970
SF		 2402err_out_dev_deinit:
2403 enic_dev_deinit(enic);
01f2e4ea
SF		 2404err_out_dev_close:
2405 vnic_dev_close(enic->vdev);
2406err_out_vnic_unregister:
01f2e4ea
SF		 2407 vnic_dev_unregister(enic->vdev);
2408err_out_iounmap:
2409 enic_iounmap(enic);
2410err_out_release_regions:
2411 pci_release_regions(pdev);
2412err_out_disable_device:
2413 pci_disable_device(pdev);
2414err_out_free_netdev:
2415 pci_set_drvdata(pdev, NULL);
2416 free_netdev(netdev);
2417
2418 return err;
2419}
2420
2421static void __devexit enic_remove(struct pci_dev *pdev)
2422{
2423 struct net_device *netdev = pci_get_drvdata(pdev);
2424
2425 if (netdev) {
2426 struct enic *enic = netdev_priv(netdev);
2427
23f333a2 2428 cancel_work_sync(&enic->reset);
01f2e4ea 2429 unregister_netdev(netdev);
6fdfa970 2430 enic_dev_deinit(enic);
01f2e4ea 2431 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2432 vnic_dev_unregister(enic->vdev);
2433 enic_iounmap(enic);
2434 pci_release_regions(pdev);
2435 pci_disable_device(pdev);
2436 pci_set_drvdata(pdev, NULL);
2437 free_netdev(netdev);
2438 }
2439}
2440
2441static struct pci_driver enic_driver = {
2442 .name = DRV_NAME,
2443 .id_table = enic_id_table,
2444 .probe = enic_probe,
2445 .remove = __devexit_p(enic_remove),
2446};
2447
2448static int __init enic_init_module(void)
2449{
a7a79deb 2450 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2451
2452 return pci_register_driver(&enic_driver);
2453}
2454
2455static void __exit enic_cleanup_module(void)
2456{
2457 pci_unregister_driver(&enic_driver);
2458}
2459
2460module_init(enic_init_module);
2461module_exit(enic_cleanup_module);
Linux kernel - Deliverables
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