davinci_emac: Fix use after free in davinci_emac_remove
[deliverable/linux.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
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39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
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45#include "enic_res.h"
46#include "enic.h"
47
48#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
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49#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
50#define MAX_TSO (1 << 16)
51#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
52
53#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 54#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
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55
56/* Supported devices */
a3aa1884 57static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 58 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
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60 { 0, } /* end of table */
61};
62
63MODULE_DESCRIPTION(DRV_DESCRIPTION);
64MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
65MODULE_LICENSE("GPL");
66MODULE_VERSION(DRV_VERSION);
67MODULE_DEVICE_TABLE(pci, enic_id_table);
68
69struct enic_stat {
70 char name[ETH_GSTRING_LEN];
71 unsigned int offset;
72};
73
74#define ENIC_TX_STAT(stat) \
75 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
76#define ENIC_RX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
78
79static const struct enic_stat enic_tx_stats[] = {
80 ENIC_TX_STAT(tx_frames_ok),
81 ENIC_TX_STAT(tx_unicast_frames_ok),
82 ENIC_TX_STAT(tx_multicast_frames_ok),
83 ENIC_TX_STAT(tx_broadcast_frames_ok),
84 ENIC_TX_STAT(tx_bytes_ok),
85 ENIC_TX_STAT(tx_unicast_bytes_ok),
86 ENIC_TX_STAT(tx_multicast_bytes_ok),
87 ENIC_TX_STAT(tx_broadcast_bytes_ok),
88 ENIC_TX_STAT(tx_drops),
89 ENIC_TX_STAT(tx_errors),
90 ENIC_TX_STAT(tx_tso),
91};
92
93static const struct enic_stat enic_rx_stats[] = {
94 ENIC_RX_STAT(rx_frames_ok),
95 ENIC_RX_STAT(rx_frames_total),
96 ENIC_RX_STAT(rx_unicast_frames_ok),
97 ENIC_RX_STAT(rx_multicast_frames_ok),
98 ENIC_RX_STAT(rx_broadcast_frames_ok),
99 ENIC_RX_STAT(rx_bytes_ok),
100 ENIC_RX_STAT(rx_unicast_bytes_ok),
101 ENIC_RX_STAT(rx_multicast_bytes_ok),
102 ENIC_RX_STAT(rx_broadcast_bytes_ok),
103 ENIC_RX_STAT(rx_drop),
104 ENIC_RX_STAT(rx_no_bufs),
105 ENIC_RX_STAT(rx_errors),
106 ENIC_RX_STAT(rx_rss),
107 ENIC_RX_STAT(rx_crc_errors),
108 ENIC_RX_STAT(rx_frames_64),
109 ENIC_RX_STAT(rx_frames_127),
110 ENIC_RX_STAT(rx_frames_255),
111 ENIC_RX_STAT(rx_frames_511),
112 ENIC_RX_STAT(rx_frames_1023),
113 ENIC_RX_STAT(rx_frames_1518),
114 ENIC_RX_STAT(rx_frames_to_max),
115};
116
117static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
118static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
119
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120static int enic_is_dynamic(struct enic *enic)
121{
122 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
123}
124
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125static int enic_get_settings(struct net_device *netdev,
126 struct ethtool_cmd *ecmd)
127{
128 struct enic *enic = netdev_priv(netdev);
129
130 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
131 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
132 ecmd->port = PORT_FIBRE;
133 ecmd->transceiver = XCVR_EXTERNAL;
134
135 if (netif_carrier_ok(netdev)) {
136 ecmd->speed = vnic_dev_port_speed(enic->vdev);
137 ecmd->duplex = DUPLEX_FULL;
138 } else {
139 ecmd->speed = -1;
140 ecmd->duplex = -1;
141 }
142
143 ecmd->autoneg = AUTONEG_DISABLE;
144
145 return 0;
146}
147
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148static int enic_dev_fw_info(struct enic *enic,
149 struct vnic_devcmd_fw_info **fw_info)
150{
151 int err;
152
153 spin_lock(&enic->devcmd_lock);
154 err = vnic_dev_fw_info(enic->vdev, fw_info);
155 spin_unlock(&enic->devcmd_lock);
156
157 return err;
158}
159
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160static void enic_get_drvinfo(struct net_device *netdev,
161 struct ethtool_drvinfo *drvinfo)
162{
163 struct enic *enic = netdev_priv(netdev);
164 struct vnic_devcmd_fw_info *fw_info;
165
383ab92f 166 enic_dev_fw_info(enic, &fw_info);
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167
168 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
169 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
170 strncpy(drvinfo->fw_version, fw_info->fw_version,
171 sizeof(drvinfo->fw_version));
172 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
173 sizeof(drvinfo->bus_info));
174}
175
176static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
177{
178 unsigned int i;
179
180 switch (stringset) {
181 case ETH_SS_STATS:
182 for (i = 0; i < enic_n_tx_stats; i++) {
183 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
184 data += ETH_GSTRING_LEN;
185 }
186 for (i = 0; i < enic_n_rx_stats; i++) {
187 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
188 data += ETH_GSTRING_LEN;
189 }
190 break;
191 }
192}
193
25f0a061 194static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 195{
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196 switch (sset) {
197 case ETH_SS_STATS:
198 return enic_n_tx_stats + enic_n_rx_stats;
199 default:
200 return -EOPNOTSUPP;
201 }
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202}
203
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204static int enic_dev_stats_dump(struct enic *enic, struct vnic_stats **vstats)
205{
206 int err;
207
208 spin_lock(&enic->devcmd_lock);
209 err = vnic_dev_stats_dump(enic->vdev, vstats);
210 spin_unlock(&enic->devcmd_lock);
211
212 return err;
213}
214
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215static void enic_get_ethtool_stats(struct net_device *netdev,
216 struct ethtool_stats *stats, u64 *data)
217{
218 struct enic *enic = netdev_priv(netdev);
219 struct vnic_stats *vstats;
220 unsigned int i;
221
383ab92f 222 enic_dev_stats_dump(enic, &vstats);
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223
224 for (i = 0; i < enic_n_tx_stats; i++)
225 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
226 for (i = 0; i < enic_n_rx_stats; i++)
227 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
228}
229
230static u32 enic_get_rx_csum(struct net_device *netdev)
231{
232 struct enic *enic = netdev_priv(netdev);
233 return enic->csum_rx_enabled;
234}
235
236static int enic_set_rx_csum(struct net_device *netdev, u32 data)
237{
238 struct enic *enic = netdev_priv(netdev);
239
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240 if (data && !ENIC_SETTING(enic, RXCSUM))
241 return -EINVAL;
242
243 enic->csum_rx_enabled = !!data;
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244
245 return 0;
246}
247
248static int enic_set_tx_csum(struct net_device *netdev, u32 data)
249{
250 struct enic *enic = netdev_priv(netdev);
251
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252 if (data && !ENIC_SETTING(enic, TXCSUM))
253 return -EINVAL;
254
255 if (data)
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256 netdev->features |= NETIF_F_HW_CSUM;
257 else
258 netdev->features &= ~NETIF_F_HW_CSUM;
259
260 return 0;
261}
262
263static int enic_set_tso(struct net_device *netdev, u32 data)
264{
265 struct enic *enic = netdev_priv(netdev);
266
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267 if (data && !ENIC_SETTING(enic, TSO))
268 return -EINVAL;
269
270 if (data)
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271 netdev->features |=
272 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
273 else
274 netdev->features &=
275 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
276
277 return 0;
278}
279
280static u32 enic_get_msglevel(struct net_device *netdev)
281{
282 struct enic *enic = netdev_priv(netdev);
283 return enic->msg_enable;
284}
285
286static void enic_set_msglevel(struct net_device *netdev, u32 value)
287{
288 struct enic *enic = netdev_priv(netdev);
289 enic->msg_enable = value;
290}
291
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292static int enic_get_coalesce(struct net_device *netdev,
293 struct ethtool_coalesce *ecmd)
294{
295 struct enic *enic = netdev_priv(netdev);
296
297 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
298 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
299
300 return 0;
301}
302
303static int enic_set_coalesce(struct net_device *netdev,
304 struct ethtool_coalesce *ecmd)
305{
306 struct enic *enic = netdev_priv(netdev);
307 u32 tx_coalesce_usecs;
308 u32 rx_coalesce_usecs;
309
310 tx_coalesce_usecs = min_t(u32,
311 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
312 ecmd->tx_coalesce_usecs);
313 rx_coalesce_usecs = min_t(u32,
314 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
315 ecmd->rx_coalesce_usecs);
316
317 switch (vnic_dev_get_intr_mode(enic->vdev)) {
318 case VNIC_DEV_INTR_MODE_INTX:
319 if (tx_coalesce_usecs != rx_coalesce_usecs)
320 return -EINVAL;
321
322 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_INTX_WQ_RQ],
323 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
324 break;
325 case VNIC_DEV_INTR_MODE_MSI:
326 if (tx_coalesce_usecs != rx_coalesce_usecs)
327 return -EINVAL;
328
329 vnic_intr_coalescing_timer_set(&enic->intr[0],
330 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
331 break;
332 case VNIC_DEV_INTR_MODE_MSIX:
333 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_WQ],
334 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
335 vnic_intr_coalescing_timer_set(&enic->intr[ENIC_MSIX_RQ],
336 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
337 break;
338 default:
339 break;
340 }
341
342 enic->tx_coalesce_usecs = tx_coalesce_usecs;
343 enic->rx_coalesce_usecs = rx_coalesce_usecs;
344
345 return 0;
346}
347
0fc0b732 348static const struct ethtool_ops enic_ethtool_ops = {
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349 .get_settings = enic_get_settings,
350 .get_drvinfo = enic_get_drvinfo,
351 .get_msglevel = enic_get_msglevel,
352 .set_msglevel = enic_set_msglevel,
353 .get_link = ethtool_op_get_link,
354 .get_strings = enic_get_strings,
25f0a061 355 .get_sset_count = enic_get_sset_count,
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356 .get_ethtool_stats = enic_get_ethtool_stats,
357 .get_rx_csum = enic_get_rx_csum,
358 .set_rx_csum = enic_set_rx_csum,
359 .get_tx_csum = ethtool_op_get_tx_csum,
360 .set_tx_csum = enic_set_tx_csum,
361 .get_sg = ethtool_op_get_sg,
362 .set_sg = ethtool_op_set_sg,
363 .get_tso = ethtool_op_get_tso,
364 .set_tso = enic_set_tso,
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365 .get_coalesce = enic_get_coalesce,
366 .set_coalesce = enic_set_coalesce,
86ca9db7 367 .get_flags = ethtool_op_get_flags,
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368};
369
370static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
371{
372 struct enic *enic = vnic_dev_priv(wq->vdev);
373
374 if (buf->sop)
375 pci_unmap_single(enic->pdev, buf->dma_addr,
376 buf->len, PCI_DMA_TODEVICE);
377 else
378 pci_unmap_page(enic->pdev, buf->dma_addr,
379 buf->len, PCI_DMA_TODEVICE);
380
381 if (buf->os_buf)
382 dev_kfree_skb_any(buf->os_buf);
383}
384
385static void enic_wq_free_buf(struct vnic_wq *wq,
386 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
387{
388 enic_free_wq_buf(wq, buf);
389}
390
391static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
392 u8 type, u16 q_number, u16 completed_index, void *opaque)
393{
394 struct enic *enic = vnic_dev_priv(vdev);
395
396 spin_lock(&enic->wq_lock[q_number]);
397
398 vnic_wq_service(&enic->wq[q_number], cq_desc,
399 completed_index, enic_wq_free_buf,
400 opaque);
401
402 if (netif_queue_stopped(enic->netdev) &&
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403 vnic_wq_desc_avail(&enic->wq[q_number]) >=
404 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
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405 netif_wake_queue(enic->netdev);
406
407 spin_unlock(&enic->wq_lock[q_number]);
408
409 return 0;
410}
411
412static void enic_log_q_error(struct enic *enic)
413{
414 unsigned int i;
415 u32 error_status;
416
417 for (i = 0; i < enic->wq_count; i++) {
418 error_status = vnic_wq_error_status(&enic->wq[i]);
419 if (error_status)
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420 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
421 i, error_status);
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422 }
423
424 for (i = 0; i < enic->rq_count; i++) {
425 error_status = vnic_rq_error_status(&enic->rq[i]);
426 if (error_status)
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427 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
428 i, error_status);
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429 }
430}
431
383ab92f 432static void enic_msglvl_check(struct enic *enic)
01f2e4ea 433{
383ab92f 434 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 435
383ab92f 436 if (msg_enable != enic->msg_enable) {
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437 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
438 enic->msg_enable, msg_enable);
383ab92f 439 enic->msg_enable = msg_enable;
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440 }
441}
442
443static void enic_mtu_check(struct enic *enic)
444{
445 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 446 struct net_device *netdev = enic->netdev;
01f2e4ea 447
491598a4 448 if (mtu && mtu != enic->port_mtu) {
7c844599 449 enic->port_mtu = mtu;
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VK
450 if (mtu < netdev->mtu)
451 netdev_warn(netdev,
452 "interface MTU (%d) set higher "
01f2e4ea 453 "than switch port MTU (%d)\n",
a7a79deb 454 netdev->mtu, mtu);
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455 }
456}
457
383ab92f 458static void enic_link_check(struct enic *enic)
01f2e4ea 459{
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460 int link_status = vnic_dev_link_status(enic->vdev);
461 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 462
383ab92f 463 if (link_status && !carrier_ok) {
a7a79deb 464 netdev_info(enic->netdev, "Link UP\n");
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465 netif_carrier_on(enic->netdev);
466 } else if (!link_status && carrier_ok) {
a7a79deb 467 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 468 netif_carrier_off(enic->netdev);
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469 }
470}
471
472static void enic_notify_check(struct enic *enic)
473{
474 enic_msglvl_check(enic);
475 enic_mtu_check(enic);
476 enic_link_check(enic);
477}
478
479#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
480
481static irqreturn_t enic_isr_legacy(int irq, void *data)
482{
483 struct net_device *netdev = data;
484 struct enic *enic = netdev_priv(netdev);
485 u32 pba;
486
487 vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
488
489 pba = vnic_intr_legacy_pba(enic->legacy_pba);
490 if (!pba) {
491 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
492 return IRQ_NONE; /* not our interrupt */
493 }
494
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495 if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
496 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
01f2e4ea 497 enic_notify_check(enic);
ed8af6b2 498 }
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499
500 if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
ed8af6b2 501 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
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502 enic_log_q_error(enic);
503 /* schedule recovery from WQ/RQ error */
504 schedule_work(&enic->reset);
505 return IRQ_HANDLED;
506 }
507
508 if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
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BH
509 if (napi_schedule_prep(&enic->napi))
510 __napi_schedule(&enic->napi);
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511 } else {
512 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
513 }
514
515 return IRQ_HANDLED;
516}
517
518static irqreturn_t enic_isr_msi(int irq, void *data)
519{
520 struct enic *enic = data;
521
522 /* With MSI, there is no sharing of interrupts, so this is
523 * our interrupt and there is no need to ack it. The device
524 * is not providing per-vector masking, so the OS will not
525 * write to PCI config space to mask/unmask the interrupt.
526 * We're using mask_on_assertion for MSI, so the device
527 * automatically masks the interrupt when the interrupt is
528 * generated. Later, when exiting polling, the interrupt
529 * will be unmasked (see enic_poll).
530 *
531 * Also, the device uses the same PCIe Traffic Class (TC)
532 * for Memory Write data and MSI, so there are no ordering
533 * issues; the MSI will always arrive at the Root Complex
534 * _after_ corresponding Memory Writes (i.e. descriptor
535 * writes).
536 */
537
288379f0 538 napi_schedule(&enic->napi);
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539
540 return IRQ_HANDLED;
541}
542
543static irqreturn_t enic_isr_msix_rq(int irq, void *data)
544{
545 struct enic *enic = data;
546
547 /* schedule NAPI polling for RQ cleanup */
288379f0 548 napi_schedule(&enic->napi);
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549
550 return IRQ_HANDLED;
551}
552
553static irqreturn_t enic_isr_msix_wq(int irq, void *data)
554{
555 struct enic *enic = data;
556 unsigned int wq_work_to_do = -1; /* no limit */
557 unsigned int wq_work_done;
558
559 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
560 wq_work_to_do, enic_wq_service, NULL);
561
562 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
563 wq_work_done,
564 1 /* unmask intr */,
565 1 /* reset intr timer */);
566
567 return IRQ_HANDLED;
568}
569
570static irqreturn_t enic_isr_msix_err(int irq, void *data)
571{
572 struct enic *enic = data;
573
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574 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
575
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576 enic_log_q_error(enic);
577
578 /* schedule recovery from WQ/RQ error */
579 schedule_work(&enic->reset);
580
581 return IRQ_HANDLED;
582}
583
584static irqreturn_t enic_isr_msix_notify(int irq, void *data)
585{
586 struct enic *enic = data;
587
ed8af6b2 588 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
01f2e4ea 589 enic_notify_check(enic);
01f2e4ea
SF
590
591 return IRQ_HANDLED;
592}
593
594static inline void enic_queue_wq_skb_cont(struct enic *enic,
595 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 596 unsigned int len_left, int loopback)
01f2e4ea
SF
597{
598 skb_frag_t *frag;
599
600 /* Queue additional data fragments */
601 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
602 len_left -= frag->size;
603 enic_queue_wq_desc_cont(wq, skb,
604 pci_map_page(enic->pdev, frag->page,
605 frag->page_offset, frag->size,
606 PCI_DMA_TODEVICE),
607 frag->size,
1825aca6
VK
608 (len_left == 0), /* EOP? */
609 loopback);
01f2e4ea
SF
610 }
611}
612
613static inline void enic_queue_wq_skb_vlan(struct enic *enic,
614 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 615 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
616{
617 unsigned int head_len = skb_headlen(skb);
618 unsigned int len_left = skb->len - head_len;
619 int eop = (len_left == 0);
620
ea0d7d91
SF
621 /* Queue the main skb fragment. The fragments are no larger
622 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
623 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
624 * per fragment is queued.
625 */
01f2e4ea
SF
626 enic_queue_wq_desc(wq, skb,
627 pci_map_single(enic->pdev, skb->data,
628 head_len, PCI_DMA_TODEVICE),
629 head_len,
630 vlan_tag_insert, vlan_tag,
1825aca6 631 eop, loopback);
01f2e4ea
SF
632
633 if (!eop)
1825aca6 634 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
635}
636
637static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
638 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 639 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
640{
641 unsigned int head_len = skb_headlen(skb);
642 unsigned int len_left = skb->len - head_len;
643 unsigned int hdr_len = skb_transport_offset(skb);
644 unsigned int csum_offset = hdr_len + skb->csum_offset;
645 int eop = (len_left == 0);
646
ea0d7d91
SF
647 /* Queue the main skb fragment. The fragments are no larger
648 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
649 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
650 * per fragment is queued.
651 */
01f2e4ea
SF
652 enic_queue_wq_desc_csum_l4(wq, skb,
653 pci_map_single(enic->pdev, skb->data,
654 head_len, PCI_DMA_TODEVICE),
655 head_len,
656 csum_offset,
657 hdr_len,
658 vlan_tag_insert, vlan_tag,
1825aca6 659 eop, loopback);
01f2e4ea
SF
660
661 if (!eop)
1825aca6 662 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
663}
664
665static inline void enic_queue_wq_skb_tso(struct enic *enic,
666 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 667 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 668{
ea0d7d91
SF
669 unsigned int frag_len_left = skb_headlen(skb);
670 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF
671 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
672 int eop = (len_left == 0);
ea0d7d91
SF
673 unsigned int len;
674 dma_addr_t dma_addr;
675 unsigned int offset = 0;
676 skb_frag_t *frag;
01f2e4ea
SF
677
678 /* Preload TCP csum field with IP pseudo hdr calculated
679 * with IP length set to zero. HW will later add in length
680 * to each TCP segment resulting from the TSO.
681 */
682
09640e63 683 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF
684 ip_hdr(skb)->check = 0;
685 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
686 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 687 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF
688 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
689 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
690 }
691
ea0d7d91
SF
692 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
693 * for the main skb fragment
694 */
695 while (frag_len_left) {
696 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
697 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
698 len, PCI_DMA_TODEVICE);
699 enic_queue_wq_desc_tso(wq, skb,
700 dma_addr,
701 len,
702 mss, hdr_len,
703 vlan_tag_insert, vlan_tag,
1825aca6 704 eop && (len == frag_len_left), loopback);
ea0d7d91
SF
705 frag_len_left -= len;
706 offset += len;
707 }
01f2e4ea 708
ea0d7d91
SF
709 if (eop)
710 return;
711
712 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
713 * for additional data fragments
714 */
715 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
716 len_left -= frag->size;
717 frag_len_left = frag->size;
718 offset = frag->page_offset;
719
720 while (frag_len_left) {
721 len = min(frag_len_left,
722 (unsigned int)WQ_ENET_MAX_DESC_LEN);
723 dma_addr = pci_map_page(enic->pdev, frag->page,
724 offset, len,
725 PCI_DMA_TODEVICE);
726 enic_queue_wq_desc_cont(wq, skb,
727 dma_addr,
728 len,
729 (len_left == 0) &&
1825aca6
VK
730 (len == frag_len_left), /* EOP? */
731 loopback);
ea0d7d91
SF
732 frag_len_left -= len;
733 offset += len;
734 }
735 }
01f2e4ea
SF
736}
737
738static inline void enic_queue_wq_skb(struct enic *enic,
739 struct vnic_wq *wq, struct sk_buff *skb)
740{
741 unsigned int mss = skb_shinfo(skb)->gso_size;
742 unsigned int vlan_tag = 0;
743 int vlan_tag_insert = 0;
1825aca6 744 int loopback = 0;
01f2e4ea
SF
745
746 if (enic->vlan_group && vlan_tx_tag_present(skb)) {
747 /* VLAN tag from trunking driver */
748 vlan_tag_insert = 1;
749 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK
750 } else if (enic->loop_enable) {
751 vlan_tag = enic->loop_tag;
752 loopback = 1;
01f2e4ea
SF
753 }
754
755 if (mss)
756 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 757 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
758 else if (skb->ip_summed == CHECKSUM_PARTIAL)
759 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 760 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
761 else
762 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 763 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
764}
765
ed8af6b2 766/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 767static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 768 struct net_device *netdev)
01f2e4ea
SF
769{
770 struct enic *enic = netdev_priv(netdev);
771 struct vnic_wq *wq = &enic->wq[0];
772 unsigned long flags;
773
774 if (skb->len <= 0) {
775 dev_kfree_skb(skb);
776 return NETDEV_TX_OK;
777 }
778
779 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
780 * which is very likely. In the off chance it's going to take
781 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
782 */
783
784 if (skb_shinfo(skb)->gso_size == 0 &&
785 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
786 skb_linearize(skb)) {
787 dev_kfree_skb(skb);
788 return NETDEV_TX_OK;
789 }
790
791 spin_lock_irqsave(&enic->wq_lock[0], flags);
792
ea0d7d91
SF
793 if (vnic_wq_desc_avail(wq) <
794 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF
795 netif_stop_queue(netdev);
796 /* This is a hard error, log it */
a7a79deb 797 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF
798 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
799 return NETDEV_TX_BUSY;
800 }
801
802 enic_queue_wq_skb(enic, wq, skb);
803
ea0d7d91 804 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF
805 netif_stop_queue(netdev);
806
01f2e4ea
SF
807 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
808
809 return NETDEV_TX_OK;
810}
811
812/* dev_base_lock rwlock held, nominally process context */
813static struct net_device_stats *enic_get_stats(struct net_device *netdev)
814{
815 struct enic *enic = netdev_priv(netdev);
25f0a061 816 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF
817 struct vnic_stats *stats;
818
383ab92f 819 enic_dev_stats_dump(enic, &stats);
01f2e4ea 820
25f0a061
SF
821 net_stats->tx_packets = stats->tx.tx_frames_ok;
822 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
823 net_stats->tx_errors = stats->tx.tx_errors;
824 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 825
25f0a061
SF
826 net_stats->rx_packets = stats->rx.rx_frames_ok;
827 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
828 net_stats->rx_errors = stats->rx.rx_errors;
829 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 830 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 831 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 832 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 833
25f0a061 834 return net_stats;
01f2e4ea
SF
835}
836
99ef5639 837static void enic_reset_multicast_list(struct enic *enic)
01f2e4ea
SF
838{
839 enic->mc_count = 0;
99ef5639 840 enic->flags = 0;
01f2e4ea
SF
841}
842
843static int enic_set_mac_addr(struct net_device *netdev, char *addr)
844{
f8bd9091
SF
845 struct enic *enic = netdev_priv(netdev);
846
847 if (enic_is_dynamic(enic)) {
848 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
849 return -EADDRNOTAVAIL;
850 } else {
851 if (!is_valid_ether_addr(addr))
852 return -EADDRNOTAVAIL;
853 }
01f2e4ea
SF
854
855 memcpy(netdev->dev_addr, addr, netdev->addr_len);
856
857 return 0;
858}
859
f8bd9091
SF
860static int enic_dev_add_station_addr(struct enic *enic)
861{
862 int err = 0;
863
864 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
865 spin_lock(&enic->devcmd_lock);
866 err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
867 spin_unlock(&enic->devcmd_lock);
868 }
869
870 return err;
871}
872
873static int enic_dev_del_station_addr(struct enic *enic)
874{
875 int err = 0;
876
877 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
878 spin_lock(&enic->devcmd_lock);
879 err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
880 spin_unlock(&enic->devcmd_lock);
881 }
882
883 return err;
884}
885
886static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
887{
888 struct enic *enic = netdev_priv(netdev);
889 struct sockaddr *saddr = p;
890 char *addr = saddr->sa_data;
891 int err;
892
893 if (netif_running(enic->netdev)) {
894 err = enic_dev_del_station_addr(enic);
895 if (err)
896 return err;
897 }
898
899 err = enic_set_mac_addr(netdev, addr);
900 if (err)
901 return err;
902
903 if (netif_running(enic->netdev)) {
904 err = enic_dev_add_station_addr(enic);
905 if (err)
906 return err;
907 }
908
909 return err;
910}
911
912static int enic_set_mac_address(struct net_device *netdev, void *p)
913{
914 return -EOPNOTSUPP;
915}
916
383ab92f
VK
917static int enic_dev_packet_filter(struct enic *enic, int directed,
918 int multicast, int broadcast, int promisc, int allmulti)
919{
920 int err;
921
922 spin_lock(&enic->devcmd_lock);
923 err = vnic_dev_packet_filter(enic->vdev, directed,
924 multicast, broadcast, promisc, allmulti);
925 spin_unlock(&enic->devcmd_lock);
926
927 return err;
928}
929
930static int enic_dev_add_multicast_addr(struct enic *enic, u8 *addr)
931{
932 int err;
933
934 spin_lock(&enic->devcmd_lock);
935 err = vnic_dev_add_addr(enic->vdev, addr);
936 spin_unlock(&enic->devcmd_lock);
937
938 return err;
939}
940
941static int enic_dev_del_multicast_addr(struct enic *enic, u8 *addr)
942{
943 int err;
944
945 spin_lock(&enic->devcmd_lock);
946 err = vnic_dev_del_addr(enic->vdev, addr);
947 spin_unlock(&enic->devcmd_lock);
948
949 return err;
950}
951
01f2e4ea
SF
952/* netif_tx_lock held, BHs disabled */
953static void enic_set_multicast_list(struct net_device *netdev)
954{
955 struct enic *enic = netdev_priv(netdev);
22bedad3 956 struct netdev_hw_addr *ha;
01f2e4ea
SF
957 int directed = 1;
958 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
959 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
960 int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
4cd24eaf 961 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 962 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
641cb85e 963 mc_count > ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 964 unsigned int flags = netdev->flags | (allmulti ? IFF_ALLMULTI : 0);
01f2e4ea 965 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF
966 unsigned int i, j;
967
968 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
969 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
970
9959a185
SF
971 if (enic->flags != flags) {
972 enic->flags = flags;
383ab92f 973 enic_dev_packet_filter(enic, directed,
9959a185
SF
974 multicast, broadcast, promisc, allmulti);
975 }
01f2e4ea
SF
976
977 /* Is there an easier way? Trying to minimize to
978 * calls to add/del multicast addrs. We keep the
979 * addrs from the last call in enic->mc_addr and
980 * look for changes to add/del.
981 */
982
48e2f183 983 i = 0;
22bedad3 984 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP
985 if (i == mc_count)
986 break;
22bedad3 987 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF
988 }
989
990 for (i = 0; i < enic->mc_count; i++) {
991 for (j = 0; j < mc_count; j++)
992 if (compare_ether_addr(enic->mc_addr[i],
993 mc_addr[j]) == 0)
994 break;
995 if (j == mc_count)
383ab92f 996 enic_dev_del_multicast_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF
997 }
998
999 for (i = 0; i < mc_count; i++) {
1000 for (j = 0; j < enic->mc_count; j++)
1001 if (compare_ether_addr(mc_addr[i],
1002 enic->mc_addr[j]) == 0)
1003 break;
1004 if (j == enic->mc_count)
383ab92f 1005 enic_dev_add_multicast_addr(enic, mc_addr[i]);
01f2e4ea
SF
1006 }
1007
1008 /* Save the list to compare against next time
1009 */
1010
1011 for (i = 0; i < mc_count; i++)
1012 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
1013
1014 enic->mc_count = mc_count;
01f2e4ea
SF
1015}
1016
1017/* rtnl lock is held */
1018static void enic_vlan_rx_register(struct net_device *netdev,
1019 struct vlan_group *vlan_group)
1020{
1021 struct enic *enic = netdev_priv(netdev);
1022 enic->vlan_group = vlan_group;
1023}
1024
1025/* rtnl lock is held */
1026static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1027{
1028 struct enic *enic = netdev_priv(netdev);
1029
1030 spin_lock(&enic->devcmd_lock);
1031 enic_add_vlan(enic, vid);
1032 spin_unlock(&enic->devcmd_lock);
1033}
1034
1035/* rtnl lock is held */
1036static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1037{
1038 struct enic *enic = netdev_priv(netdev);
1039
1040 spin_lock(&enic->devcmd_lock);
1041 enic_del_vlan(enic, vid);
1042 spin_unlock(&enic->devcmd_lock);
1043}
1044
1045/* netif_tx_lock held, BHs disabled */
1046static void enic_tx_timeout(struct net_device *netdev)
1047{
1048 struct enic *enic = netdev_priv(netdev);
1049 schedule_work(&enic->reset);
1050}
1051
f8bd9091
SF
1052static int enic_vnic_dev_deinit(struct enic *enic)
1053{
1054 int err;
1055
1056 spin_lock(&enic->devcmd_lock);
1057 err = vnic_dev_deinit(enic->vdev);
1058 spin_unlock(&enic->devcmd_lock);
1059
1060 return err;
1061}
1062
1063static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
1064{
1065 int err;
1066
1067 spin_lock(&enic->devcmd_lock);
1068 err = vnic_dev_init_prov(enic->vdev,
1069 (u8 *)vp, vic_provinfo_size(vp));
1070 spin_unlock(&enic->devcmd_lock);
1071
1072 return err;
1073}
1074
1075static int enic_dev_init_done(struct enic *enic, int *done, int *error)
1076{
1077 int err;
1078
1079 spin_lock(&enic->devcmd_lock);
1080 err = vnic_dev_init_done(enic->vdev, done, error);
1081 spin_unlock(&enic->devcmd_lock);
1082
1083 return err;
1084}
1085
08f382eb 1086static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF
1087{
1088 struct vic_provinfo *vp;
1089 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
6fc7f573 1090 u8 *uuid;
f8bd9091 1091 char uuid_str[38];
6fc7f573
SF
1092 static char *uuid_fmt = "%02X%02X%02X%02X-%02X%02X-%02X%02X-"
1093 "%02X%02X-%02X%02X%02X%02X%0X%02X";
f8bd9091
SF
1094 int err;
1095
08f382eb
SF
1096 err = enic_vnic_dev_deinit(enic);
1097 if (err)
1098 return err;
f8bd9091 1099
08f382eb 1100 switch (enic->pp.request) {
f8bd9091 1101
08f382eb 1102 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1103
08f382eb
SF
1104 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1105 return -EINVAL;
f8bd9091 1106
08f382eb
SF
1107 if (!is_valid_ether_addr(mac))
1108 return -EADDRNOTAVAIL;
f8bd9091 1109
08f382eb
SF
1110 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
1111 VIC_PROVINFO_LINUX_TYPE);
1112 if (!vp)
1113 return -ENOMEM;
f8bd9091 1114
f8bd9091 1115 vic_provinfo_add_tlv(vp,
08f382eb
SF
1116 VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
1117 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1118
08f382eb
SF
1119 vic_provinfo_add_tlv(vp,
1120 VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
1121 ETH_ALEN, mac);
1122
1123 if (enic->pp.set & ENIC_SET_INSTANCE) {
1124 uuid = enic->pp.instance_uuid;
1125 sprintf(uuid_str, uuid_fmt,
1126 uuid[0], uuid[1], uuid[2], uuid[3],
1127 uuid[4], uuid[5], uuid[6], uuid[7],
1128 uuid[8], uuid[9], uuid[10], uuid[11],
1129 uuid[12], uuid[13], uuid[14], uuid[15]);
1130 vic_provinfo_add_tlv(vp,
1131 VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
1132 sizeof(uuid_str), uuid_str);
1133 }
f8bd9091 1134
08f382eb
SF
1135 if (enic->pp.set & ENIC_SET_HOST) {
1136 uuid = enic->pp.host_uuid;
1137 sprintf(uuid_str, uuid_fmt,
1138 uuid[0], uuid[1], uuid[2], uuid[3],
1139 uuid[4], uuid[5], uuid[6], uuid[7],
1140 uuid[8], uuid[9], uuid[10], uuid[11],
1141 uuid[12], uuid[13], uuid[14], uuid[15]);
1142 vic_provinfo_add_tlv(vp,
1143 VIC_LINUX_PROV_TLV_HOST_UUID_STR,
1144 sizeof(uuid_str), uuid_str);
1145 }
f8bd9091 1146
08f382eb
SF
1147 err = enic_dev_init_prov(enic, vp);
1148 vic_provinfo_free(vp);
1149 if (err)
1150 return err;
1151 break;
f8bd9091 1152
08f382eb
SF
1153 case PORT_REQUEST_DISASSOCIATE:
1154 break;
f8bd9091 1155
08f382eb
SF
1156 default:
1157 return -EINVAL;
1158 }
f8bd9091 1159
08f382eb
SF
1160 enic->pp.set |= ENIC_SET_APPLIED;
1161 return 0;
f8bd9091
SF
1162}
1163
1164static int enic_set_vf_port(struct net_device *netdev, int vf,
1165 struct nlattr *port[])
1166{
1167 struct enic *enic = netdev_priv(netdev);
08f382eb
SF
1168
1169 memset(&enic->pp, 0, sizeof(enic->pp));
1170
1171 if (port[IFLA_PORT_REQUEST]) {
1172 enic->pp.set |= ENIC_SET_REQUEST;
1173 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1174 }
1175
1176 if (port[IFLA_PORT_PROFILE]) {
1177 enic->pp.set |= ENIC_SET_NAME;
1178 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
1179 PORT_PROFILE_MAX);
1180 }
1181
1182 if (port[IFLA_PORT_INSTANCE_UUID]) {
1183 enic->pp.set |= ENIC_SET_INSTANCE;
1184 memcpy(enic->pp.instance_uuid,
1185 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1186 }
1187
1188 if (port[IFLA_PORT_HOST_UUID]) {
1189 enic->pp.set |= ENIC_SET_HOST;
1190 memcpy(enic->pp.host_uuid,
1191 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1192 }
f8bd9091
SF
1193
1194 /* don't support VFs, yet */
1195 if (vf != PORT_SELF_VF)
1196 return -EOPNOTSUPP;
1197
08f382eb
SF
1198 if (!(enic->pp.set & ENIC_SET_REQUEST))
1199 return -EOPNOTSUPP;
f8bd9091 1200
08f382eb 1201 if (enic->pp.request == PORT_REQUEST_ASSOCIATE) {
f8bd9091 1202
418c437d
SF
1203 /* If the interface mac addr hasn't been assigned,
1204 * assign a random mac addr before setting port-
1205 * profile.
1206 */
1207
1208 if (is_zero_ether_addr(netdev->dev_addr))
1209 random_ether_addr(netdev->dev_addr);
f8bd9091
SF
1210 }
1211
08f382eb 1212 return enic_set_port_profile(enic, netdev->dev_addr);
f8bd9091
SF
1213}
1214
1215static int enic_get_vf_port(struct net_device *netdev, int vf,
1216 struct sk_buff *skb)
1217{
1218 struct enic *enic = netdev_priv(netdev);
1219 int err, error, done;
1220 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1221
08f382eb
SF
1222 if (!(enic->pp.set & ENIC_SET_APPLIED))
1223 return -ENODATA;
f8bd9091
SF
1224
1225 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1226 if (err)
08f382eb 1227 error = err;
f8bd9091
SF
1228
1229 switch (error) {
1230 case ERR_SUCCESS:
1231 if (!done)
1232 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1233 break;
1234 case ERR_EINVAL:
1235 response = PORT_PROFILE_RESPONSE_INVALID;
1236 break;
1237 case ERR_EBADSTATE:
1238 response = PORT_PROFILE_RESPONSE_BADSTATE;
1239 break;
1240 case ERR_ENOMEM:
1241 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1242 break;
1243 default:
1244 response = PORT_PROFILE_RESPONSE_ERROR;
1245 break;
1246 }
1247
1248 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1249 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF
1250 if (enic->pp.set & ENIC_SET_NAME)
1251 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1252 enic->pp.name);
1253 if (enic->pp.set & ENIC_SET_INSTANCE)
1254 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1255 enic->pp.instance_uuid);
1256 if (enic->pp.set & ENIC_SET_HOST)
1257 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1258 enic->pp.host_uuid);
f8bd9091
SF
1259
1260 return 0;
1261
1262nla_put_failure:
1263 return -EMSGSIZE;
1264}
1265
01f2e4ea
SF
1266static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1267{
1268 struct enic *enic = vnic_dev_priv(rq->vdev);
1269
1270 if (!buf->os_buf)
1271 return;
1272
1273 pci_unmap_single(enic->pdev, buf->dma_addr,
1274 buf->len, PCI_DMA_FROMDEVICE);
1275 dev_kfree_skb_any(buf->os_buf);
1276}
1277
01f2e4ea
SF
1278static int enic_rq_alloc_buf(struct vnic_rq *rq)
1279{
1280 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1281 struct net_device *netdev = enic->netdev;
01f2e4ea 1282 struct sk_buff *skb;
1825aca6 1283 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF
1284 unsigned int os_buf_index = 0;
1285 dma_addr_t dma_addr;
1286
89d71a66 1287 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF
1288 if (!skb)
1289 return -ENOMEM;
1290
1291 dma_addr = pci_map_single(enic->pdev, skb->data,
1292 len, PCI_DMA_FROMDEVICE);
1293
1294 enic_queue_rq_desc(rq, skb, os_buf_index,
1295 dma_addr, len);
1296
1297 return 0;
1298}
1299
4badc385
SF
1300static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
1301{
1302 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
1303
1304 if (vnic_rq_posting_soon(rq)) {
1305
1306 /* SW workaround for A0 HW erratum: if we're just about
1307 * to write posted_index, insert a dummy desc
1308 * of type resvd
1309 */
1310
1311 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
1312 vnic_rq_post(rq, 0, 0, 0, 0);
1313 } else {
1314 return enic_rq_alloc_buf(rq);
1315 }
1316
1317 return 0;
1318}
1319
383ab92f
VK
1320static int enic_dev_hw_version(struct enic *enic,
1321 enum vnic_dev_hw_version *hw_ver)
1322{
1323 int err;
1324
1325 spin_lock(&enic->devcmd_lock);
1326 err = vnic_dev_hw_version(enic->vdev, hw_ver);
1327 spin_unlock(&enic->devcmd_lock);
1328
1329 return err;
1330}
1331
4badc385
SF
1332static int enic_set_rq_alloc_buf(struct enic *enic)
1333{
1334 enum vnic_dev_hw_version hw_ver;
1335 int err;
1336
383ab92f 1337 err = enic_dev_hw_version(enic, &hw_ver);
4badc385
SF
1338 if (err)
1339 return err;
1340
1341 switch (hw_ver) {
1342 case VNIC_DEV_HW_VER_A1:
1343 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
1344 break;
1345 case VNIC_DEV_HW_VER_A2:
1346 case VNIC_DEV_HW_VER_UNKNOWN:
1347 enic->rq_alloc_buf = enic_rq_alloc_buf;
1348 break;
1349 default:
1350 return -ENODEV;
1351 }
1352
1353 return 0;
1354}
1355
01f2e4ea
SF
1356static void enic_rq_indicate_buf(struct vnic_rq *rq,
1357 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1358 int skipped, void *opaque)
1359{
1360 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1361 struct net_device *netdev = enic->netdev;
01f2e4ea
SF
1362 struct sk_buff *skb;
1363
1364 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1365 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1366 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1367 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1368 u8 packet_error;
f8cac14a 1369 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF
1370 u32 rss_hash;
1371
1372 if (skipped)
1373 return;
1374
1375 skb = buf->os_buf;
1376 prefetch(skb->data - NET_IP_ALIGN);
1377 pci_unmap_single(enic->pdev, buf->dma_addr,
1378 buf->len, PCI_DMA_FROMDEVICE);
1379
1380 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1381 &type, &color, &q_number, &completed_index,
1382 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1383 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1384 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF
1385 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1386 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1387 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1388 &fcs_ok);
1389
1390 if (packet_error) {
1391
350991e1
SF
1392 if (!fcs_ok) {
1393 if (bytes_written > 0)
1394 enic->rq_bad_fcs++;
1395 else if (bytes_written == 0)
1396 enic->rq_truncated_pkts++;
1397 }
01f2e4ea
SF
1398
1399 dev_kfree_skb_any(skb);
1400
1401 return;
1402 }
1403
1404 if (eop && bytes_written > 0) {
1405
1406 /* Good receive
1407 */
1408
1409 skb_put(skb, bytes_written);
86ca9db7 1410 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF
1411
1412 if (enic->csum_rx_enabled && !csum_not_calc) {
1413 skb->csum = htons(checksum);
1414 skb->ip_summed = CHECKSUM_COMPLETE;
1415 }
1416
86ca9db7 1417 skb->dev = netdev;
01f2e4ea 1418
f8cac14a
VK
1419 if (enic->vlan_group && vlan_stripped &&
1420 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1421
88132f55
VK
1422 if (netdev->features & NETIF_F_GRO)
1423 vlan_gro_receive(&enic->napi, enic->vlan_group,
f8cac14a 1424 vlan_tci, skb);
01f2e4ea
SF
1425 else
1426 vlan_hwaccel_receive_skb(skb,
f8cac14a 1427 enic->vlan_group, vlan_tci);
01f2e4ea
SF
1428
1429 } else {
1430
88132f55
VK
1431 if (netdev->features & NETIF_F_GRO)
1432 napi_gro_receive(&enic->napi, skb);
01f2e4ea
SF
1433 else
1434 netif_receive_skb(skb);
1435
1436 }
1437
1438 } else {
1439
1440 /* Buffer overflow
1441 */
1442
1443 dev_kfree_skb_any(skb);
1444 }
1445}
1446
1447static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1448 u8 type, u16 q_number, u16 completed_index, void *opaque)
1449{
1450 struct enic *enic = vnic_dev_priv(vdev);
1451
1452 vnic_rq_service(&enic->rq[q_number], cq_desc,
1453 completed_index, VNIC_RQ_RETURN_DESC,
1454 enic_rq_indicate_buf, opaque);
1455
1456 return 0;
1457}
1458
01f2e4ea
SF
1459static int enic_poll(struct napi_struct *napi, int budget)
1460{
1461 struct enic *enic = container_of(napi, struct enic, napi);
01f2e4ea
SF
1462 unsigned int rq_work_to_do = budget;
1463 unsigned int wq_work_to_do = -1; /* no limit */
1464 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1465 int err;
01f2e4ea
SF
1466
1467 /* Service RQ (first) and WQ
1468 */
1469
1470 rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1471 rq_work_to_do, enic_rq_service, NULL);
1472
1473 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
1474 wq_work_to_do, enic_wq_service, NULL);
1475
1476 /* Accumulate intr event credits for this polling
1477 * cycle. An intr event is the completion of a
1478 * a WQ or RQ packet.
1479 */
1480
1481 work_done = rq_work_done + wq_work_done;
1482
1483 if (work_done > 0)
1484 vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
1485 work_done,
1486 0 /* don't unmask intr */,
1487 0 /* don't reset intr timer */);
1488
2d6ddced 1489 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1490
2d6ddced
SF
1491 /* Buffer allocation failed. Stay in polling
1492 * mode so we can try to fill the ring again.
1493 */
01f2e4ea 1494
2d6ddced
SF
1495 if (err)
1496 rq_work_done = rq_work_to_do;
01f2e4ea 1497
2d6ddced 1498 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1499
2d6ddced 1500 /* Some work done, but not enough to stay in polling,
88132f55 1501 * exit polling
01f2e4ea
SF
1502 */
1503
288379f0 1504 napi_complete(napi);
ed8af6b2 1505 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
01f2e4ea
SF
1506 }
1507
1508 return rq_work_done;
1509}
1510
1511static int enic_poll_msix(struct napi_struct *napi, int budget)
1512{
1513 struct enic *enic = container_of(napi, struct enic, napi);
01f2e4ea
SF
1514 unsigned int work_to_do = budget;
1515 unsigned int work_done;
2d6ddced 1516 int err;
01f2e4ea
SF
1517
1518 /* Service RQ
1519 */
1520
1521 work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1522 work_to_do, enic_rq_service, NULL);
1523
2d6ddced
SF
1524 /* Return intr event credits for this polling
1525 * cycle. An intr event is the completion of a
1526 * RQ packet.
1527 */
01f2e4ea 1528
2d6ddced 1529 if (work_done > 0)
01f2e4ea
SF
1530 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
1531 work_done,
1532 0 /* don't unmask intr */,
1533 0 /* don't reset intr timer */);
01f2e4ea 1534
2d6ddced
SF
1535 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
1536
1537 /* Buffer allocation failed. Stay in polling mode
1538 * so we can try to fill the ring again.
1539 */
1540
1541 if (err)
1542 work_done = work_to_do;
1543
1544 if (work_done < work_to_do) {
1545
1546 /* Some work done, but not enough to stay in polling,
88132f55 1547 * exit polling
01f2e4ea
SF
1548 */
1549
288379f0 1550 napi_complete(napi);
01f2e4ea
SF
1551 vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
1552 }
1553
1554 return work_done;
1555}
1556
1557static void enic_notify_timer(unsigned long data)
1558{
1559 struct enic *enic = (struct enic *)data;
1560
1561 enic_notify_check(enic);
1562
25f0a061
SF
1563 mod_timer(&enic->notify_timer,
1564 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF
1565}
1566
1567static void enic_free_intr(struct enic *enic)
1568{
1569 struct net_device *netdev = enic->netdev;
1570 unsigned int i;
1571
1572 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1573 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF
1574 free_irq(enic->pdev->irq, netdev);
1575 break;
8f4d248c
SF
1576 case VNIC_DEV_INTR_MODE_MSI:
1577 free_irq(enic->pdev->irq, enic);
1578 break;
01f2e4ea
SF
1579 case VNIC_DEV_INTR_MODE_MSIX:
1580 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1581 if (enic->msix[i].requested)
1582 free_irq(enic->msix_entry[i].vector,
1583 enic->msix[i].devid);
1584 break;
1585 default:
1586 break;
1587 }
1588}
1589
1590static int enic_request_intr(struct enic *enic)
1591{
1592 struct net_device *netdev = enic->netdev;
1593 unsigned int i;
1594 int err = 0;
1595
1596 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1597
1598 case VNIC_DEV_INTR_MODE_INTX:
1599
1600 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1601 IRQF_SHARED, netdev->name, netdev);
1602 break;
1603
1604 case VNIC_DEV_INTR_MODE_MSI:
1605
1606 err = request_irq(enic->pdev->irq, enic_isr_msi,
1607 0, netdev->name, enic);
1608 break;
1609
1610 case VNIC_DEV_INTR_MODE_MSIX:
1611
1612 sprintf(enic->msix[ENIC_MSIX_RQ].devname,
8f4d248c 1613 "%.11s-rx-0", netdev->name);
01f2e4ea
SF
1614 enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
1615 enic->msix[ENIC_MSIX_RQ].devid = enic;
1616
1617 sprintf(enic->msix[ENIC_MSIX_WQ].devname,
8f4d248c 1618 "%.11s-tx-0", netdev->name);
01f2e4ea
SF
1619 enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
1620 enic->msix[ENIC_MSIX_WQ].devid = enic;
1621
1622 sprintf(enic->msix[ENIC_MSIX_ERR].devname,
1623 "%.11s-err", netdev->name);
1624 enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
1625 enic->msix[ENIC_MSIX_ERR].devid = enic;
1626
1627 sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
1628 "%.11s-notify", netdev->name);
1629 enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
1630 enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
1631
1632 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
1633 err = request_irq(enic->msix_entry[i].vector,
1634 enic->msix[i].isr, 0,
1635 enic->msix[i].devname,
1636 enic->msix[i].devid);
1637 if (err) {
1638 enic_free_intr(enic);
1639 break;
1640 }
1641 enic->msix[i].requested = 1;
1642 }
1643
1644 break;
1645
1646 default:
1647 break;
1648 }
1649
1650 return err;
1651}
1652
b3d18d19
SF
1653static void enic_synchronize_irqs(struct enic *enic)
1654{
1655 unsigned int i;
1656
1657 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1658 case VNIC_DEV_INTR_MODE_INTX:
1659 case VNIC_DEV_INTR_MODE_MSI:
1660 synchronize_irq(enic->pdev->irq);
1661 break;
1662 case VNIC_DEV_INTR_MODE_MSIX:
1663 for (i = 0; i < enic->intr_count; i++)
1664 synchronize_irq(enic->msix_entry[i].vector);
1665 break;
1666 default:
1667 break;
1668 }
1669}
1670
383ab92f 1671static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF
1672{
1673 int err;
1674
56ac88b3 1675 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF
1676 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1677 case VNIC_DEV_INTR_MODE_INTX:
1678 err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
1679 break;
1680 case VNIC_DEV_INTR_MODE_MSIX:
1681 err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
1682 break;
1683 default:
1684 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1685 break;
1686 }
56ac88b3 1687 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF
1688
1689 return err;
1690}
1691
383ab92f
VK
1692static int enic_dev_notify_unset(struct enic *enic)
1693{
1694 int err;
1695
1696 spin_lock(&enic->devcmd_lock);
1697 err = vnic_dev_notify_unset(enic->vdev);
1698 spin_unlock(&enic->devcmd_lock);
1699
1700 return err;
1701}
1702
1703static int enic_dev_enable(struct enic *enic)
1704{
1705 int err;
1706
1707 spin_lock(&enic->devcmd_lock);
1708 err = vnic_dev_enable(enic->vdev);
1709 spin_unlock(&enic->devcmd_lock);
1710
1711 return err;
1712}
1713
1714static int enic_dev_disable(struct enic *enic)
1715{
1716 int err;
1717
1718 spin_lock(&enic->devcmd_lock);
1719 err = vnic_dev_disable(enic->vdev);
1720 spin_unlock(&enic->devcmd_lock);
1721
1722 return err;
1723}
1724
01f2e4ea
SF
1725static void enic_notify_timer_start(struct enic *enic)
1726{
1727 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1728 case VNIC_DEV_INTR_MODE_MSI:
1729 mod_timer(&enic->notify_timer, jiffies);
1730 break;
1731 default:
1732 /* Using intr for notification for INTx/MSI-X */
1733 break;
1734 };
1735}
1736
1737/* rtnl lock is held, process context */
1738static int enic_open(struct net_device *netdev)
1739{
1740 struct enic *enic = netdev_priv(netdev);
1741 unsigned int i;
1742 int err;
1743
4b75a442
SF
1744 err = enic_request_intr(enic);
1745 if (err) {
a7a79deb 1746 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF
1747 return err;
1748 }
1749
383ab92f 1750 err = enic_dev_notify_set(enic);
4b75a442 1751 if (err) {
a7a79deb
VK
1752 netdev_err(netdev,
1753 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF
1754 goto err_out_free_intr;
1755 }
1756
01f2e4ea 1757 for (i = 0; i < enic->rq_count; i++) {
2d6ddced
SF
1758 vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
1759 /* Need at least one buffer on ring to get going */
1760 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1761 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1762 err = -ENOMEM;
4b75a442 1763 goto err_out_notify_unset;
01f2e4ea
SF
1764 }
1765 }
1766
1767 for (i = 0; i < enic->wq_count; i++)
1768 vnic_wq_enable(&enic->wq[i]);
1769 for (i = 0; i < enic->rq_count; i++)
1770 vnic_rq_enable(&enic->rq[i]);
1771
f8bd9091 1772 enic_dev_add_station_addr(enic);
01f2e4ea
SF
1773 enic_set_multicast_list(netdev);
1774
1775 netif_wake_queue(netdev);
1776 napi_enable(&enic->napi);
383ab92f 1777 enic_dev_enable(enic);
01f2e4ea
SF
1778
1779 for (i = 0; i < enic->intr_count; i++)
1780 vnic_intr_unmask(&enic->intr[i]);
1781
1782 enic_notify_timer_start(enic);
1783
1784 return 0;
4b75a442
SF
1785
1786err_out_notify_unset:
383ab92f 1787 enic_dev_notify_unset(enic);
4b75a442
SF
1788err_out_free_intr:
1789 enic_free_intr(enic);
1790
1791 return err;
01f2e4ea
SF
1792}
1793
1794/* rtnl lock is held, process context */
1795static int enic_stop(struct net_device *netdev)
1796{
1797 struct enic *enic = netdev_priv(netdev);
1798 unsigned int i;
1799 int err;
1800
29046f9b 1801 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1802 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK
1803 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1804 }
b3d18d19
SF
1805
1806 enic_synchronize_irqs(enic);
1807
01f2e4ea
SF
1808 del_timer_sync(&enic->notify_timer);
1809
383ab92f 1810 enic_dev_disable(enic);
01f2e4ea 1811 napi_disable(&enic->napi);
b3d18d19
SF
1812 netif_carrier_off(netdev);
1813 netif_tx_disable(netdev);
f8bd9091
SF
1814 enic_dev_del_station_addr(enic);
1815
01f2e4ea
SF
1816 for (i = 0; i < enic->wq_count; i++) {
1817 err = vnic_wq_disable(&enic->wq[i]);
1818 if (err)
1819 return err;
1820 }
1821 for (i = 0; i < enic->rq_count; i++) {
1822 err = vnic_rq_disable(&enic->rq[i]);
1823 if (err)
1824 return err;
1825 }
1826
383ab92f 1827 enic_dev_notify_unset(enic);
4b75a442
SF
1828 enic_free_intr(enic);
1829
01f2e4ea
SF
1830 for (i = 0; i < enic->wq_count; i++)
1831 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1832 for (i = 0; i < enic->rq_count; i++)
1833 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1834 for (i = 0; i < enic->cq_count; i++)
1835 vnic_cq_clean(&enic->cq[i]);
1836 for (i = 0; i < enic->intr_count; i++)
1837 vnic_intr_clean(&enic->intr[i]);
1838
1839 return 0;
1840}
1841
1842static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1843{
1844 struct enic *enic = netdev_priv(netdev);
1845 int running = netif_running(netdev);
1846
25f0a061
SF
1847 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1848 return -EINVAL;
1849
01f2e4ea
SF
1850 if (running)
1851 enic_stop(netdev);
1852
01f2e4ea
SF
1853 netdev->mtu = new_mtu;
1854
1855 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK
1856 netdev_warn(netdev,
1857 "interface MTU (%d) set higher than port MTU (%d)\n",
1858 netdev->mtu, enic->port_mtu);
01f2e4ea
SF
1859
1860 if (running)
1861 enic_open(netdev);
1862
1863 return 0;
1864}
1865
1866#ifdef CONFIG_NET_POLL_CONTROLLER
1867static void enic_poll_controller(struct net_device *netdev)
1868{
1869 struct enic *enic = netdev_priv(netdev);
1870 struct vnic_dev *vdev = enic->vdev;
1871
1872 switch (vnic_dev_get_intr_mode(vdev)) {
1873 case VNIC_DEV_INTR_MODE_MSIX:
1874 enic_isr_msix_rq(enic->pdev->irq, enic);
1875 enic_isr_msix_wq(enic->pdev->irq, enic);
1876 break;
1877 case VNIC_DEV_INTR_MODE_MSI:
1878 enic_isr_msi(enic->pdev->irq, enic);
1879 break;
1880 case VNIC_DEV_INTR_MODE_INTX:
1881 enic_isr_legacy(enic->pdev->irq, netdev);
1882 break;
1883 default:
1884 break;
1885 }
1886}
1887#endif
1888
1889static int enic_dev_wait(struct vnic_dev *vdev,
1890 int (*start)(struct vnic_dev *, int),
1891 int (*finished)(struct vnic_dev *, int *),
1892 int arg)
1893{
1894 unsigned long time;
1895 int done;
1896 int err;
1897
1898 BUG_ON(in_interrupt());
1899
1900 err = start(vdev, arg);
1901 if (err)
1902 return err;
1903
1904 /* Wait for func to complete...2 seconds max
1905 */
1906
1907 time = jiffies + (HZ * 2);
1908 do {
1909
1910 err = finished(vdev, &done);
1911 if (err)
1912 return err;
1913
1914 if (done)
1915 return 0;
1916
1917 schedule_timeout_uninterruptible(HZ / 10);
1918
1919 } while (time_after(time, jiffies));
1920
1921 return -ETIMEDOUT;
1922}
1923
1924static int enic_dev_open(struct enic *enic)
1925{
1926 int err;
1927
1928 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1929 vnic_dev_open_done, 0);
1930 if (err)
a7a79deb
VK
1931 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1932 err);
01f2e4ea
SF
1933
1934 return err;
1935}
1936
99ef5639 1937static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF
1938{
1939 int err;
1940
99ef5639
VK
1941 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1942 vnic_dev_hang_reset_done, 0);
01f2e4ea 1943 if (err)
a7a79deb
VK
1944 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1945 err);
01f2e4ea
SF
1946
1947 return err;
1948}
1949
68f71708
SF
1950static int enic_set_niccfg(struct enic *enic)
1951{
1952 const u8 rss_default_cpu = 0;
1953 const u8 rss_hash_type = 0;
1954 const u8 rss_hash_bits = 0;
1955 const u8 rss_base_cpu = 0;
1956 const u8 rss_enable = 0;
1957 const u8 tso_ipid_split_en = 0;
1958 const u8 ig_vlan_strip_en = 1;
383ab92f 1959 int err;
68f71708
SF
1960
1961 /* Enable VLAN tag stripping. RSS not enabled (yet).
6ba9cdc0 1962 */
68f71708 1963
383ab92f
VK
1964 spin_lock(&enic->devcmd_lock);
1965 err = enic_set_nic_cfg(enic,
68f71708
SF
1966 rss_default_cpu, rss_hash_type,
1967 rss_hash_bits, rss_base_cpu,
1968 rss_enable, tso_ipid_split_en,
1969 ig_vlan_strip_en);
383ab92f
VK
1970 spin_unlock(&enic->devcmd_lock);
1971
1972 return err;
1973}
1974
1975static int enic_dev_hang_notify(struct enic *enic)
1976{
1977 int err;
1978
1979 spin_lock(&enic->devcmd_lock);
1980 err = vnic_dev_hang_notify(enic->vdev);
1981 spin_unlock(&enic->devcmd_lock);
1982
1983 return err;
68f71708
SF
1984}
1985
f8cac14a
VK
1986int enic_dev_set_ig_vlan_rewrite_mode(struct enic *enic)
1987{
1988 int err;
1989
1990 spin_lock(&enic->devcmd_lock);
1991 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1992 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);
1993 spin_unlock(&enic->devcmd_lock);
1994
1995 return err;
1996}
1997
01f2e4ea
SF
1998static void enic_reset(struct work_struct *work)
1999{
2000 struct enic *enic = container_of(work, struct enic, reset);
2001
2002 if (!netif_running(enic->netdev))
2003 return;
2004
2005 rtnl_lock();
2006
383ab92f 2007 enic_dev_hang_notify(enic);
01f2e4ea 2008 enic_stop(enic->netdev);
99ef5639
VK
2009 enic_dev_hang_reset(enic);
2010 enic_reset_multicast_list(enic);
01f2e4ea 2011 enic_init_vnic_resources(enic);
68f71708 2012 enic_set_niccfg(enic);
f8cac14a 2013 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF
2014 enic_open(enic->netdev);
2015
2016 rtnl_unlock();
2017}
2018
2019static int enic_set_intr_mode(struct enic *enic)
2020{
6ba9cdc0
SF
2021 unsigned int n = 1;
2022 unsigned int m = 1;
01f2e4ea
SF
2023 unsigned int i;
2024
2025 /* Set interrupt mode (INTx, MSI, MSI-X) depending
2026 * system capabilities.
2027 *
2028 * Try MSI-X first
2029 *
2030 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2031 * (the second to last INTR is used for WQ/RQ errors)
2032 * (the last INTR is used for notifications)
2033 */
2034
2035 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2036 for (i = 0; i < n + m + 2; i++)
2037 enic->msix_entry[i].entry = i;
2038
2039 if (enic->config.intr_mode < 1 &&
2040 enic->rq_count >= n &&
2041 enic->wq_count >= m &&
2042 enic->cq_count >= n + m &&
2043 enic->intr_count >= n + m + 2 &&
2044 !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
2045
2046 enic->rq_count = n;
2047 enic->wq_count = m;
2048 enic->cq_count = n + m;
2049 enic->intr_count = n + m + 2;
2050
2051 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
2052
2053 return 0;
2054 }
2055
2056 /* Next try MSI
2057 *
2058 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2059 */
2060
2061 if (enic->config.intr_mode < 2 &&
2062 enic->rq_count >= 1 &&
2063 enic->wq_count >= 1 &&
2064 enic->cq_count >= 2 &&
2065 enic->intr_count >= 1 &&
2066 !pci_enable_msi(enic->pdev)) {
2067
2068 enic->rq_count = 1;
2069 enic->wq_count = 1;
2070 enic->cq_count = 2;
2071 enic->intr_count = 1;
2072
2073 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2074
2075 return 0;
2076 }
2077
2078 /* Next try INTx
2079 *
2080 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2081 * (the first INTR is used for WQ/RQ)
2082 * (the second INTR is used for WQ/RQ errors)
2083 * (the last INTR is used for notifications)
2084 */
2085
2086 if (enic->config.intr_mode < 3 &&
2087 enic->rq_count >= 1 &&
2088 enic->wq_count >= 1 &&
2089 enic->cq_count >= 2 &&
2090 enic->intr_count >= 3) {
2091
2092 enic->rq_count = 1;
2093 enic->wq_count = 1;
2094 enic->cq_count = 2;
2095 enic->intr_count = 3;
2096
2097 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2098
2099 return 0;
2100 }
2101
2102 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2103
2104 return -EINVAL;
2105}
2106
2107static void enic_clear_intr_mode(struct enic *enic)
2108{
2109 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2110 case VNIC_DEV_INTR_MODE_MSIX:
2111 pci_disable_msix(enic->pdev);
2112 break;
2113 case VNIC_DEV_INTR_MODE_MSI:
2114 pci_disable_msi(enic->pdev);
2115 break;
2116 default:
2117 break;
2118 }
2119
2120 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2121}
2122
f8bd9091
SF
2123static const struct net_device_ops enic_netdev_dynamic_ops = {
2124 .ndo_open = enic_open,
2125 .ndo_stop = enic_stop,
2126 .ndo_start_xmit = enic_hard_start_xmit,
2127 .ndo_get_stats = enic_get_stats,
2128 .ndo_validate_addr = eth_validate_addr,
2129 .ndo_set_multicast_list = enic_set_multicast_list,
2130 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2131 .ndo_change_mtu = enic_change_mtu,
2132 .ndo_vlan_rx_register = enic_vlan_rx_register,
2133 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2134 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2135 .ndo_tx_timeout = enic_tx_timeout,
2136 .ndo_set_vf_port = enic_set_vf_port,
2137 .ndo_get_vf_port = enic_get_vf_port,
2138#ifdef CONFIG_NET_POLL_CONTROLLER
2139 .ndo_poll_controller = enic_poll_controller,
2140#endif
2141};
2142
afe29f7a
SH
2143static const struct net_device_ops enic_netdev_ops = {
2144 .ndo_open = enic_open,
2145 .ndo_stop = enic_stop,
00829823 2146 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH
2147 .ndo_get_stats = enic_get_stats,
2148 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2149 .ndo_set_mac_address = enic_set_mac_address,
383ab92f 2150 .ndo_set_multicast_list = enic_set_multicast_list,
afe29f7a
SH
2151 .ndo_change_mtu = enic_change_mtu,
2152 .ndo_vlan_rx_register = enic_vlan_rx_register,
2153 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2154 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2155 .ndo_tx_timeout = enic_tx_timeout,
2156#ifdef CONFIG_NET_POLL_CONTROLLER
2157 .ndo_poll_controller = enic_poll_controller,
2158#endif
2159};
2160
6fdfa970
SF
2161void enic_dev_deinit(struct enic *enic)
2162{
2163 netif_napi_del(&enic->napi);
2164 enic_free_vnic_resources(enic);
2165 enic_clear_intr_mode(enic);
2166}
2167
383ab92f
VK
2168static int enic_dev_stats_clear(struct enic *enic)
2169{
2170 int err;
2171
2172 spin_lock(&enic->devcmd_lock);
2173 err = vnic_dev_stats_clear(enic->vdev);
2174 spin_unlock(&enic->devcmd_lock);
2175
2176 return err;
2177}
2178
6fdfa970
SF
2179int enic_dev_init(struct enic *enic)
2180{
a7a79deb 2181 struct device *dev = enic_get_dev(enic);
6fdfa970
SF
2182 struct net_device *netdev = enic->netdev;
2183 int err;
2184
2185 /* Get vNIC configuration
2186 */
2187
2188 err = enic_get_vnic_config(enic);
2189 if (err) {
a7a79deb 2190 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF
2191 return err;
2192 }
2193
2194 /* Get available resource counts
2195 */
2196
2197 enic_get_res_counts(enic);
2198
2199 /* Set interrupt mode based on resource counts and system
2200 * capabilities
2201 */
2202
2203 err = enic_set_intr_mode(enic);
2204 if (err) {
a7a79deb
VK
2205 dev_err(dev, "Failed to set intr mode based on resource "
2206 "counts and system capabilities, aborting\n");
6fdfa970
SF
2207 return err;
2208 }
2209
2210 /* Allocate and configure vNIC resources
2211 */
2212
2213 err = enic_alloc_vnic_resources(enic);
2214 if (err) {
a7a79deb 2215 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF
2216 goto err_out_free_vnic_resources;
2217 }
2218
2219 enic_init_vnic_resources(enic);
2220
383ab92f
VK
2221 /* Clear LIF stats
2222 */
2223 enic_dev_stats_clear(enic);
2224
6fdfa970
SF
2225 err = enic_set_rq_alloc_buf(enic);
2226 if (err) {
a7a79deb 2227 dev_err(dev, "Failed to set RQ buffer allocator, aborting\n");
6fdfa970
SF
2228 goto err_out_free_vnic_resources;
2229 }
2230
2231 err = enic_set_niccfg(enic);
2232 if (err) {
a7a79deb 2233 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF
2234 goto err_out_free_vnic_resources;
2235 }
2236
f8cac14a
VK
2237 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2238 if (err) {
a7a79deb 2239 netdev_err(netdev,
f8cac14a
VK
2240 "Failed to set ingress vlan rewrite mode, aborting.\n");
2241 goto err_out_free_vnic_resources;
2242 }
2243
6fdfa970
SF
2244 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2245 default:
2246 netif_napi_add(netdev, &enic->napi, enic_poll, 64);
2247 break;
2248 case VNIC_DEV_INTR_MODE_MSIX:
2249 netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
2250 break;
2251 }
2252
2253 return 0;
2254
2255err_out_free_vnic_resources:
2256 enic_clear_intr_mode(enic);
2257 enic_free_vnic_resources(enic);
2258
2259 return err;
2260}
2261
27e6c7d3
SF
2262static void enic_iounmap(struct enic *enic)
2263{
2264 unsigned int i;
2265
2266 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2267 if (enic->bar[i].vaddr)
2268 iounmap(enic->bar[i].vaddr);
2269}
2270
01f2e4ea
SF
2271static int __devinit enic_probe(struct pci_dev *pdev,
2272 const struct pci_device_id *ent)
2273{
a7a79deb 2274 struct device *dev = &pdev->dev;
01f2e4ea
SF
2275 struct net_device *netdev;
2276 struct enic *enic;
2277 int using_dac = 0;
2278 unsigned int i;
2279 int err;
2280
01f2e4ea
SF
2281 /* Allocate net device structure and initialize. Private
2282 * instance data is initialized to zero.
2283 */
2284
2285 netdev = alloc_etherdev(sizeof(struct enic));
2286 if (!netdev) {
a7a79deb 2287 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF
2288 return -ENOMEM;
2289 }
2290
01f2e4ea
SF
2291 pci_set_drvdata(pdev, netdev);
2292
2293 SET_NETDEV_DEV(netdev, &pdev->dev);
2294
2295 enic = netdev_priv(netdev);
2296 enic->netdev = netdev;
2297 enic->pdev = pdev;
2298
2299 /* Setup PCI resources
2300 */
2301
29046f9b 2302 err = pci_enable_device_mem(pdev);
01f2e4ea 2303 if (err) {
a7a79deb 2304 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF
2305 goto err_out_free_netdev;
2306 }
2307
2308 err = pci_request_regions(pdev, DRV_NAME);
2309 if (err) {
a7a79deb 2310 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF
2311 goto err_out_disable_device;
2312 }
2313
2314 pci_set_master(pdev);
2315
2316 /* Query PCI controller on system for DMA addressing
2317 * limitation for the device. Try 40-bit first, and
2318 * fail to 32-bit.
2319 */
2320
50cf156a 2321 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2322 if (err) {
284901a9 2323 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2324 if (err) {
a7a79deb 2325 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF
2326 goto err_out_release_regions;
2327 }
284901a9 2328 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2329 if (err) {
a7a79deb
VK
2330 dev_err(dev, "Unable to obtain %u-bit DMA "
2331 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF
2332 goto err_out_release_regions;
2333 }
2334 } else {
50cf156a 2335 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2336 if (err) {
a7a79deb
VK
2337 dev_err(dev, "Unable to obtain %u-bit DMA "
2338 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF
2339 goto err_out_release_regions;
2340 }
2341 using_dac = 1;
2342 }
2343
27e6c7d3 2344 /* Map vNIC resources from BAR0-5
01f2e4ea
SF
2345 */
2346
27e6c7d3
SF
2347 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2348 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2349 continue;
2350 enic->bar[i].len = pci_resource_len(pdev, i);
2351 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2352 if (!enic->bar[i].vaddr) {
a7a79deb 2353 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF
2354 err = -ENODEV;
2355 goto err_out_iounmap;
2356 }
2357 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF
2358 }
2359
2360 /* Register vNIC device
2361 */
2362
27e6c7d3
SF
2363 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2364 ARRAY_SIZE(enic->bar));
01f2e4ea 2365 if (!enic->vdev) {
a7a79deb 2366 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF
2367 err = -ENODEV;
2368 goto err_out_iounmap;
2369 }
2370
2371 /* Issue device open to get device in known state
2372 */
2373
2374 err = enic_dev_open(enic);
2375 if (err) {
a7a79deb 2376 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF
2377 goto err_out_vnic_unregister;
2378 }
2379
2380 /* Issue device init to initialize the vnic-to-switch link.
2381 * We'll start with carrier off and wait for link UP
2382 * notification later to turn on carrier. We don't need
2383 * to wait here for the vnic-to-switch link initialization
2384 * to complete; link UP notification is the indication that
2385 * the process is complete.
2386 */
2387
2388 netif_carrier_off(netdev);
2389
a7a79deb
VK
2390 /* Do not call dev_init for a dynamic vnic.
2391 * For a dynamic vnic, init_prov_info will be
2392 * called later by an upper layer.
2393 */
2394
f8bd9091
SF
2395 if (!enic_is_dynamic(enic)) {
2396 err = vnic_dev_init(enic->vdev, 0);
2397 if (err) {
a7a79deb 2398 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF
2399 goto err_out_dev_close;
2400 }
01f2e4ea
SF
2401 }
2402
383ab92f
VK
2403 /* Setup devcmd lock
2404 */
2405
2406 spin_lock_init(&enic->devcmd_lock);
2407
6fdfa970 2408 err = enic_dev_init(enic);
01f2e4ea 2409 if (err) {
a7a79deb 2410 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF
2411 goto err_out_dev_close;
2412 }
2413
383ab92f 2414 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF
2415 */
2416
2417 init_timer(&enic->notify_timer);
2418 enic->notify_timer.function = enic_notify_timer;
2419 enic->notify_timer.data = (unsigned long)enic;
2420
2421 INIT_WORK(&enic->reset, enic_reset);
2422
2423 for (i = 0; i < enic->wq_count; i++)
2424 spin_lock_init(&enic->wq_lock[i]);
2425
01f2e4ea
SF
2426 /* Register net device
2427 */
2428
2429 enic->port_mtu = enic->config.mtu;
2430 (void)enic_change_mtu(netdev, enic->port_mtu);
2431
2432 err = enic_set_mac_addr(netdev, enic->mac_addr);
2433 if (err) {
a7a79deb 2434 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2435 goto err_out_dev_deinit;
01f2e4ea
SF
2436 }
2437
7c844599
SF
2438 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2439 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2440
f8bd9091
SF
2441 if (enic_is_dynamic(enic))
2442 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2443 else
2444 netdev->netdev_ops = &enic_netdev_ops;
2445
01f2e4ea
SF
2446 netdev->watchdog_timeo = 2 * HZ;
2447 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2448
73c1ea9b 2449 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK
2450 if (ENIC_SETTING(enic, LOOP)) {
2451 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2452 enic->loop_enable = 1;
2453 enic->loop_tag = enic->config.loop_tag;
2454 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2455 }
01f2e4ea
SF
2456 if (ENIC_SETTING(enic, TXCSUM))
2457 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2458 if (ENIC_SETTING(enic, TSO))
2459 netdev->features |= NETIF_F_TSO |
2460 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2461 if (ENIC_SETTING(enic, LRO))
88132f55 2462 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF
2463 if (using_dac)
2464 netdev->features |= NETIF_F_HIGHDMA;
2465
01f2e4ea
SF
2466 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2467
01f2e4ea
SF
2468 err = register_netdev(netdev);
2469 if (err) {
a7a79deb 2470 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2471 goto err_out_dev_deinit;
01f2e4ea
SF
2472 }
2473
2474 return 0;
2475
6fdfa970
SF
2476err_out_dev_deinit:
2477 enic_dev_deinit(enic);
01f2e4ea
SF
2478err_out_dev_close:
2479 vnic_dev_close(enic->vdev);
2480err_out_vnic_unregister:
01f2e4ea
SF
2481 vnic_dev_unregister(enic->vdev);
2482err_out_iounmap:
2483 enic_iounmap(enic);
2484err_out_release_regions:
2485 pci_release_regions(pdev);
2486err_out_disable_device:
2487 pci_disable_device(pdev);
2488err_out_free_netdev:
2489 pci_set_drvdata(pdev, NULL);
2490 free_netdev(netdev);
2491
2492 return err;
2493}
2494
2495static void __devexit enic_remove(struct pci_dev *pdev)
2496{
2497 struct net_device *netdev = pci_get_drvdata(pdev);
2498
2499 if (netdev) {
2500 struct enic *enic = netdev_priv(netdev);
2501
2502 flush_scheduled_work();
2503 unregister_netdev(netdev);
6fdfa970 2504 enic_dev_deinit(enic);
01f2e4ea 2505 vnic_dev_close(enic->vdev);
01f2e4ea
SF
2506 vnic_dev_unregister(enic->vdev);
2507 enic_iounmap(enic);
2508 pci_release_regions(pdev);
2509 pci_disable_device(pdev);
2510 pci_set_drvdata(pdev, NULL);
2511 free_netdev(netdev);
2512 }
2513}
2514
2515static struct pci_driver enic_driver = {
2516 .name = DRV_NAME,
2517 .id_table = enic_id_table,
2518 .probe = enic_probe,
2519 .remove = __devexit_p(enic_remove),
2520};
2521
2522static int __init enic_init_module(void)
2523{
a7a79deb 2524 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF
2525
2526 return pci_register_driver(&enic_driver);
2527}
2528
2529static void __exit enic_cleanup_module(void)
2530{
2531 pci_unregister_driver(&enic_driver);
2532}
2533
2534module_init(enic_init_module);
2535module_exit(enic_cleanup_module);
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