enic: Add support for multiple hardware receive queues
[deliverable/linux.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
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3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
29046f9b 37#include <linux/rtnetlink.h>
b7c6bfb7 38#include <net/ip6_checksum.h>
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39
40#include "cq_enet_desc.h"
41#include "vnic_dev.h"
42#include "vnic_intr.h"
43#include "vnic_stats.h"
f8bd9091 44#include "vnic_vic.h"
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45#include "enic_res.h"
46#include "enic.h"
47
48#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
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49#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
50#define MAX_TSO (1 << 16)
51#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
52
53#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 54#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
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55
56/* Supported devices */
a3aa1884 57static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 58 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 59 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
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60 { 0, } /* end of table */
61};
62
63MODULE_DESCRIPTION(DRV_DESCRIPTION);
64MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
65MODULE_LICENSE("GPL");
66MODULE_VERSION(DRV_VERSION);
67MODULE_DEVICE_TABLE(pci, enic_id_table);
68
69struct enic_stat {
70 char name[ETH_GSTRING_LEN];
71 unsigned int offset;
72};
73
74#define ENIC_TX_STAT(stat) \
75 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
76#define ENIC_RX_STAT(stat) \
77 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
78
79static const struct enic_stat enic_tx_stats[] = {
80 ENIC_TX_STAT(tx_frames_ok),
81 ENIC_TX_STAT(tx_unicast_frames_ok),
82 ENIC_TX_STAT(tx_multicast_frames_ok),
83 ENIC_TX_STAT(tx_broadcast_frames_ok),
84 ENIC_TX_STAT(tx_bytes_ok),
85 ENIC_TX_STAT(tx_unicast_bytes_ok),
86 ENIC_TX_STAT(tx_multicast_bytes_ok),
87 ENIC_TX_STAT(tx_broadcast_bytes_ok),
88 ENIC_TX_STAT(tx_drops),
89 ENIC_TX_STAT(tx_errors),
90 ENIC_TX_STAT(tx_tso),
91};
92
93static const struct enic_stat enic_rx_stats[] = {
94 ENIC_RX_STAT(rx_frames_ok),
95 ENIC_RX_STAT(rx_frames_total),
96 ENIC_RX_STAT(rx_unicast_frames_ok),
97 ENIC_RX_STAT(rx_multicast_frames_ok),
98 ENIC_RX_STAT(rx_broadcast_frames_ok),
99 ENIC_RX_STAT(rx_bytes_ok),
100 ENIC_RX_STAT(rx_unicast_bytes_ok),
101 ENIC_RX_STAT(rx_multicast_bytes_ok),
102 ENIC_RX_STAT(rx_broadcast_bytes_ok),
103 ENIC_RX_STAT(rx_drop),
104 ENIC_RX_STAT(rx_no_bufs),
105 ENIC_RX_STAT(rx_errors),
106 ENIC_RX_STAT(rx_rss),
107 ENIC_RX_STAT(rx_crc_errors),
108 ENIC_RX_STAT(rx_frames_64),
109 ENIC_RX_STAT(rx_frames_127),
110 ENIC_RX_STAT(rx_frames_255),
111 ENIC_RX_STAT(rx_frames_511),
112 ENIC_RX_STAT(rx_frames_1023),
113 ENIC_RX_STAT(rx_frames_1518),
114 ENIC_RX_STAT(rx_frames_to_max),
115};
116
117static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
118static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
119
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120static int enic_is_dynamic(struct enic *enic)
121{
122 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
123}
124
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125static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
126{
127 return rq;
128}
129
130static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
131{
132 return enic->rq_count + wq;
133}
134
135static inline unsigned int enic_legacy_io_intr(void)
136{
137 return 0;
138}
139
140static inline unsigned int enic_legacy_err_intr(void)
141{
142 return 1;
143}
144
145static inline unsigned int enic_legacy_notify_intr(void)
146{
147 return 2;
148}
149
150static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
151{
152 return rq;
153}
154
155static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
156{
157 return enic->rq_count + wq;
158}
159
160static inline unsigned int enic_msix_err_intr(struct enic *enic)
161{
162 return enic->rq_count + enic->wq_count;
163}
164
165static inline unsigned int enic_msix_notify_intr(struct enic *enic)
166{
167 return enic->rq_count + enic->wq_count + 1;
168}
169
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170static int enic_get_settings(struct net_device *netdev,
171 struct ethtool_cmd *ecmd)
172{
173 struct enic *enic = netdev_priv(netdev);
174
175 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
176 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
177 ecmd->port = PORT_FIBRE;
178 ecmd->transceiver = XCVR_EXTERNAL;
179
180 if (netif_carrier_ok(netdev)) {
181 ecmd->speed = vnic_dev_port_speed(enic->vdev);
182 ecmd->duplex = DUPLEX_FULL;
183 } else {
184 ecmd->speed = -1;
185 ecmd->duplex = -1;
186 }
187
188 ecmd->autoneg = AUTONEG_DISABLE;
189
190 return 0;
191}
192
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193static int enic_dev_fw_info(struct enic *enic,
194 struct vnic_devcmd_fw_info **fw_info)
195{
196 int err;
197
198 spin_lock(&enic->devcmd_lock);
199 err = vnic_dev_fw_info(enic->vdev, fw_info);
200 spin_unlock(&enic->devcmd_lock);
201
202 return err;
203}
204
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205static void enic_get_drvinfo(struct net_device *netdev,
206 struct ethtool_drvinfo *drvinfo)
207{
208 struct enic *enic = netdev_priv(netdev);
209 struct vnic_devcmd_fw_info *fw_info;
210
383ab92f 211 enic_dev_fw_info(enic, &fw_info);
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212
213 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
214 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
215 strncpy(drvinfo->fw_version, fw_info->fw_version,
216 sizeof(drvinfo->fw_version));
217 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
218 sizeof(drvinfo->bus_info));
219}
220
221static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
222{
223 unsigned int i;
224
225 switch (stringset) {
226 case ETH_SS_STATS:
227 for (i = 0; i < enic_n_tx_stats; i++) {
228 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
229 data += ETH_GSTRING_LEN;
230 }
231 for (i = 0; i < enic_n_rx_stats; i++) {
232 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
233 data += ETH_GSTRING_LEN;
234 }
235 break;
236 }
237}
238
25f0a061 239static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 240{
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241 switch (sset) {
242 case ETH_SS_STATS:
243 return enic_n_tx_stats + enic_n_rx_stats;
244 default:
245 return -EOPNOTSUPP;
246 }
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247}
248
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249static int enic_dev_stats_dump(struct enic *enic, struct vnic_stats **vstats)
250{
251 int err;
252
253 spin_lock(&enic->devcmd_lock);
254 err = vnic_dev_stats_dump(enic->vdev, vstats);
255 spin_unlock(&enic->devcmd_lock);
256
257 return err;
258}
259
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260static void enic_get_ethtool_stats(struct net_device *netdev,
261 struct ethtool_stats *stats, u64 *data)
262{
263 struct enic *enic = netdev_priv(netdev);
264 struct vnic_stats *vstats;
265 unsigned int i;
266
383ab92f 267 enic_dev_stats_dump(enic, &vstats);
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268
269 for (i = 0; i < enic_n_tx_stats; i++)
270 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
271 for (i = 0; i < enic_n_rx_stats; i++)
272 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
273}
274
275static u32 enic_get_rx_csum(struct net_device *netdev)
276{
277 struct enic *enic = netdev_priv(netdev);
278 return enic->csum_rx_enabled;
279}
280
281static int enic_set_rx_csum(struct net_device *netdev, u32 data)
282{
283 struct enic *enic = netdev_priv(netdev);
284
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285 if (data && !ENIC_SETTING(enic, RXCSUM))
286 return -EINVAL;
287
288 enic->csum_rx_enabled = !!data;
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289
290 return 0;
291}
292
293static int enic_set_tx_csum(struct net_device *netdev, u32 data)
294{
295 struct enic *enic = netdev_priv(netdev);
296
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297 if (data && !ENIC_SETTING(enic, TXCSUM))
298 return -EINVAL;
299
300 if (data)
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301 netdev->features |= NETIF_F_HW_CSUM;
302 else
303 netdev->features &= ~NETIF_F_HW_CSUM;
304
305 return 0;
306}
307
308static int enic_set_tso(struct net_device *netdev, u32 data)
309{
310 struct enic *enic = netdev_priv(netdev);
311
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312 if (data && !ENIC_SETTING(enic, TSO))
313 return -EINVAL;
314
315 if (data)
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316 netdev->features |=
317 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
318 else
319 netdev->features &=
320 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
321
322 return 0;
323}
324
325static u32 enic_get_msglevel(struct net_device *netdev)
326{
327 struct enic *enic = netdev_priv(netdev);
328 return enic->msg_enable;
329}
330
331static void enic_set_msglevel(struct net_device *netdev, u32 value)
332{
333 struct enic *enic = netdev_priv(netdev);
334 enic->msg_enable = value;
335}
336
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337static int enic_get_coalesce(struct net_device *netdev,
338 struct ethtool_coalesce *ecmd)
339{
340 struct enic *enic = netdev_priv(netdev);
341
342 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
343 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
344
345 return 0;
346}
347
348static int enic_set_coalesce(struct net_device *netdev,
349 struct ethtool_coalesce *ecmd)
350{
351 struct enic *enic = netdev_priv(netdev);
352 u32 tx_coalesce_usecs;
353 u32 rx_coalesce_usecs;
717258ba 354 unsigned int i, intr;
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355
356 tx_coalesce_usecs = min_t(u32,
357 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
358 ecmd->tx_coalesce_usecs);
359 rx_coalesce_usecs = min_t(u32,
360 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
361 ecmd->rx_coalesce_usecs);
362
363 switch (vnic_dev_get_intr_mode(enic->vdev)) {
364 case VNIC_DEV_INTR_MODE_INTX:
365 if (tx_coalesce_usecs != rx_coalesce_usecs)
366 return -EINVAL;
367
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368 intr = enic_legacy_io_intr();
369 vnic_intr_coalescing_timer_set(&enic->intr[intr],
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370 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
371 break;
372 case VNIC_DEV_INTR_MODE_MSI:
373 if (tx_coalesce_usecs != rx_coalesce_usecs)
374 return -EINVAL;
375
376 vnic_intr_coalescing_timer_set(&enic->intr[0],
377 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
378 break;
379 case VNIC_DEV_INTR_MODE_MSIX:
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380 for (i = 0; i < enic->wq_count; i++) {
381 intr = enic_msix_wq_intr(enic, i);
382 vnic_intr_coalescing_timer_set(&enic->intr[intr],
383 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
384 }
385
386 for (i = 0; i < enic->rq_count; i++) {
387 intr = enic_msix_rq_intr(enic, i);
388 vnic_intr_coalescing_timer_set(&enic->intr[intr],
389 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
390 }
391
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392 break;
393 default:
394 break;
395 }
396
397 enic->tx_coalesce_usecs = tx_coalesce_usecs;
398 enic->rx_coalesce_usecs = rx_coalesce_usecs;
399
400 return 0;
401}
402
0fc0b732 403static const struct ethtool_ops enic_ethtool_ops = {
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404 .get_settings = enic_get_settings,
405 .get_drvinfo = enic_get_drvinfo,
406 .get_msglevel = enic_get_msglevel,
407 .set_msglevel = enic_set_msglevel,
408 .get_link = ethtool_op_get_link,
409 .get_strings = enic_get_strings,
25f0a061 410 .get_sset_count = enic_get_sset_count,
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411 .get_ethtool_stats = enic_get_ethtool_stats,
412 .get_rx_csum = enic_get_rx_csum,
413 .set_rx_csum = enic_set_rx_csum,
414 .get_tx_csum = ethtool_op_get_tx_csum,
415 .set_tx_csum = enic_set_tx_csum,
416 .get_sg = ethtool_op_get_sg,
417 .set_sg = ethtool_op_set_sg,
418 .get_tso = ethtool_op_get_tso,
419 .set_tso = enic_set_tso,
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420 .get_coalesce = enic_get_coalesce,
421 .set_coalesce = enic_set_coalesce,
86ca9db7 422 .get_flags = ethtool_op_get_flags,
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423};
424
425static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
426{
427 struct enic *enic = vnic_dev_priv(wq->vdev);
428
429 if (buf->sop)
430 pci_unmap_single(enic->pdev, buf->dma_addr,
431 buf->len, PCI_DMA_TODEVICE);
432 else
433 pci_unmap_page(enic->pdev, buf->dma_addr,
434 buf->len, PCI_DMA_TODEVICE);
435
436 if (buf->os_buf)
437 dev_kfree_skb_any(buf->os_buf);
438}
439
440static void enic_wq_free_buf(struct vnic_wq *wq,
441 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
442{
443 enic_free_wq_buf(wq, buf);
444}
445
446static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
447 u8 type, u16 q_number, u16 completed_index, void *opaque)
448{
449 struct enic *enic = vnic_dev_priv(vdev);
450
451 spin_lock(&enic->wq_lock[q_number]);
452
453 vnic_wq_service(&enic->wq[q_number], cq_desc,
454 completed_index, enic_wq_free_buf,
455 opaque);
456
457 if (netif_queue_stopped(enic->netdev) &&
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458 vnic_wq_desc_avail(&enic->wq[q_number]) >=
459 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
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460 netif_wake_queue(enic->netdev);
461
462 spin_unlock(&enic->wq_lock[q_number]);
463
464 return 0;
465}
466
467static void enic_log_q_error(struct enic *enic)
468{
469 unsigned int i;
470 u32 error_status;
471
472 for (i = 0; i < enic->wq_count; i++) {
473 error_status = vnic_wq_error_status(&enic->wq[i]);
474 if (error_status)
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475 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
476 i, error_status);
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477 }
478
479 for (i = 0; i < enic->rq_count; i++) {
480 error_status = vnic_rq_error_status(&enic->rq[i]);
481 if (error_status)
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482 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
483 i, error_status);
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484 }
485}
486
383ab92f 487static void enic_msglvl_check(struct enic *enic)
01f2e4ea 488{
383ab92f 489 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 490
383ab92f 491 if (msg_enable != enic->msg_enable) {
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492 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
493 enic->msg_enable, msg_enable);
383ab92f 494 enic->msg_enable = msg_enable;
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495 }
496}
497
498static void enic_mtu_check(struct enic *enic)
499{
500 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 501 struct net_device *netdev = enic->netdev;
01f2e4ea 502
491598a4 503 if (mtu && mtu != enic->port_mtu) {
7c844599 504 enic->port_mtu = mtu;
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505 if (mtu < netdev->mtu)
506 netdev_warn(netdev,
507 "interface MTU (%d) set higher "
01f2e4ea 508 "than switch port MTU (%d)\n",
a7a79deb 509 netdev->mtu, mtu);
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510 }
511}
512
383ab92f 513static void enic_link_check(struct enic *enic)
01f2e4ea 514{
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515 int link_status = vnic_dev_link_status(enic->vdev);
516 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 517
383ab92f 518 if (link_status && !carrier_ok) {
a7a79deb 519 netdev_info(enic->netdev, "Link UP\n");
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520 netif_carrier_on(enic->netdev);
521 } else if (!link_status && carrier_ok) {
a7a79deb 522 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 523 netif_carrier_off(enic->netdev);
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524 }
525}
526
527static void enic_notify_check(struct enic *enic)
528{
529 enic_msglvl_check(enic);
530 enic_mtu_check(enic);
531 enic_link_check(enic);
532}
533
534#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
535
536static irqreturn_t enic_isr_legacy(int irq, void *data)
537{
538 struct net_device *netdev = data;
539 struct enic *enic = netdev_priv(netdev);
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540 unsigned int io_intr = enic_legacy_io_intr();
541 unsigned int err_intr = enic_legacy_err_intr();
542 unsigned int notify_intr = enic_legacy_notify_intr();
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543 u32 pba;
544
717258ba 545 vnic_intr_mask(&enic->intr[io_intr]);
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546
547 pba = vnic_intr_legacy_pba(enic->legacy_pba);
548 if (!pba) {
717258ba 549 vnic_intr_unmask(&enic->intr[io_intr]);
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550 return IRQ_NONE; /* not our interrupt */
551 }
552
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553 if (ENIC_TEST_INTR(pba, notify_intr)) {
554 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 555 enic_notify_check(enic);
ed8af6b2 556 }
01f2e4ea 557
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558 if (ENIC_TEST_INTR(pba, err_intr)) {
559 vnic_intr_return_all_credits(&enic->intr[err_intr]);
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560 enic_log_q_error(enic);
561 /* schedule recovery from WQ/RQ error */
562 schedule_work(&enic->reset);
563 return IRQ_HANDLED;
564 }
565
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566 if (ENIC_TEST_INTR(pba, io_intr)) {
567 if (napi_schedule_prep(&enic->napi[0]))
568 __napi_schedule(&enic->napi[0]);
01f2e4ea 569 } else {
717258ba 570 vnic_intr_unmask(&enic->intr[io_intr]);
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571 }
572
573 return IRQ_HANDLED;
574}
575
576static irqreturn_t enic_isr_msi(int irq, void *data)
577{
578 struct enic *enic = data;
579
580 /* With MSI, there is no sharing of interrupts, so this is
581 * our interrupt and there is no need to ack it. The device
582 * is not providing per-vector masking, so the OS will not
583 * write to PCI config space to mask/unmask the interrupt.
584 * We're using mask_on_assertion for MSI, so the device
585 * automatically masks the interrupt when the interrupt is
586 * generated. Later, when exiting polling, the interrupt
587 * will be unmasked (see enic_poll).
588 *
589 * Also, the device uses the same PCIe Traffic Class (TC)
590 * for Memory Write data and MSI, so there are no ordering
591 * issues; the MSI will always arrive at the Root Complex
592 * _after_ corresponding Memory Writes (i.e. descriptor
593 * writes).
594 */
595
717258ba 596 napi_schedule(&enic->napi[0]);
01f2e4ea
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597
598 return IRQ_HANDLED;
599}
600
601static irqreturn_t enic_isr_msix_rq(int irq, void *data)
602{
717258ba 603 struct napi_struct *napi = data;
01f2e4ea
SF
604
605 /* schedule NAPI polling for RQ cleanup */
717258ba 606 napi_schedule(napi);
01f2e4ea
SF
607
608 return IRQ_HANDLED;
609}
610
611static irqreturn_t enic_isr_msix_wq(int irq, void *data)
612{
613 struct enic *enic = data;
717258ba
VK
614 unsigned int cq = enic_cq_wq(enic, 0);
615 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF
616 unsigned int wq_work_to_do = -1; /* no limit */
617 unsigned int wq_work_done;
618
717258ba 619 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF
620 wq_work_to_do, enic_wq_service, NULL);
621
717258ba 622 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
623 wq_work_done,
624 1 /* unmask intr */,
625 1 /* reset intr timer */);
626
627 return IRQ_HANDLED;
628}
629
630static irqreturn_t enic_isr_msix_err(int irq, void *data)
631{
632 struct enic *enic = data;
717258ba 633 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 634
717258ba 635 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 636
01f2e4ea
SF
637 enic_log_q_error(enic);
638
639 /* schedule recovery from WQ/RQ error */
640 schedule_work(&enic->reset);
641
642 return IRQ_HANDLED;
643}
644
645static irqreturn_t enic_isr_msix_notify(int irq, void *data)
646{
647 struct enic *enic = data;
717258ba 648 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 649
717258ba 650 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 651 enic_notify_check(enic);
01f2e4ea
SF
652
653 return IRQ_HANDLED;
654}
655
656static inline void enic_queue_wq_skb_cont(struct enic *enic,
657 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 658 unsigned int len_left, int loopback)
01f2e4ea
SF
659{
660 skb_frag_t *frag;
661
662 /* Queue additional data fragments */
663 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
664 len_left -= frag->size;
665 enic_queue_wq_desc_cont(wq, skb,
666 pci_map_page(enic->pdev, frag->page,
667 frag->page_offset, frag->size,
668 PCI_DMA_TODEVICE),
669 frag->size,
1825aca6
VK
670 (len_left == 0), /* EOP? */
671 loopback);
01f2e4ea
SF
672 }
673}
674
675static inline void enic_queue_wq_skb_vlan(struct enic *enic,
676 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 677 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
678{
679 unsigned int head_len = skb_headlen(skb);
680 unsigned int len_left = skb->len - head_len;
681 int eop = (len_left == 0);
682
ea0d7d91
SF
683 /* Queue the main skb fragment. The fragments are no larger
684 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
685 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
686 * per fragment is queued.
687 */
01f2e4ea
SF
688 enic_queue_wq_desc(wq, skb,
689 pci_map_single(enic->pdev, skb->data,
690 head_len, PCI_DMA_TODEVICE),
691 head_len,
692 vlan_tag_insert, vlan_tag,
1825aca6 693 eop, loopback);
01f2e4ea
SF
694
695 if (!eop)
1825aca6 696 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
697}
698
699static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
700 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 701 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF
702{
703 unsigned int head_len = skb_headlen(skb);
704 unsigned int len_left = skb->len - head_len;
705 unsigned int hdr_len = skb_transport_offset(skb);
706 unsigned int csum_offset = hdr_len + skb->csum_offset;
707 int eop = (len_left == 0);
708
ea0d7d91
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709 /* Queue the main skb fragment. The fragments are no larger
710 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
711 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
712 * per fragment is queued.
713 */
01f2e4ea
SF
714 enic_queue_wq_desc_csum_l4(wq, skb,
715 pci_map_single(enic->pdev, skb->data,
716 head_len, PCI_DMA_TODEVICE),
717 head_len,
718 csum_offset,
719 hdr_len,
720 vlan_tag_insert, vlan_tag,
1825aca6 721 eop, loopback);
01f2e4ea
SF
722
723 if (!eop)
1825aca6 724 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF
725}
726
727static inline void enic_queue_wq_skb_tso(struct enic *enic,
728 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 729 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 730{
ea0d7d91
SF
731 unsigned int frag_len_left = skb_headlen(skb);
732 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF
733 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
734 int eop = (len_left == 0);
ea0d7d91
SF
735 unsigned int len;
736 dma_addr_t dma_addr;
737 unsigned int offset = 0;
738 skb_frag_t *frag;
01f2e4ea
SF
739
740 /* Preload TCP csum field with IP pseudo hdr calculated
741 * with IP length set to zero. HW will later add in length
742 * to each TCP segment resulting from the TSO.
743 */
744
09640e63 745 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF
746 ip_hdr(skb)->check = 0;
747 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
748 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 749 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF
750 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
751 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
752 }
753
ea0d7d91
SF
754 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
755 * for the main skb fragment
756 */
757 while (frag_len_left) {
758 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
759 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
760 len, PCI_DMA_TODEVICE);
761 enic_queue_wq_desc_tso(wq, skb,
762 dma_addr,
763 len,
764 mss, hdr_len,
765 vlan_tag_insert, vlan_tag,
1825aca6 766 eop && (len == frag_len_left), loopback);
ea0d7d91
SF
767 frag_len_left -= len;
768 offset += len;
769 }
01f2e4ea 770
ea0d7d91
SF
771 if (eop)
772 return;
773
774 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
775 * for additional data fragments
776 */
777 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
778 len_left -= frag->size;
779 frag_len_left = frag->size;
780 offset = frag->page_offset;
781
782 while (frag_len_left) {
783 len = min(frag_len_left,
784 (unsigned int)WQ_ENET_MAX_DESC_LEN);
785 dma_addr = pci_map_page(enic->pdev, frag->page,
786 offset, len,
787 PCI_DMA_TODEVICE);
788 enic_queue_wq_desc_cont(wq, skb,
789 dma_addr,
790 len,
791 (len_left == 0) &&
1825aca6
VK
792 (len == frag_len_left), /* EOP? */
793 loopback);
ea0d7d91
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794 frag_len_left -= len;
795 offset += len;
796 }
797 }
01f2e4ea
SF
798}
799
800static inline void enic_queue_wq_skb(struct enic *enic,
801 struct vnic_wq *wq, struct sk_buff *skb)
802{
803 unsigned int mss = skb_shinfo(skb)->gso_size;
804 unsigned int vlan_tag = 0;
805 int vlan_tag_insert = 0;
1825aca6 806 int loopback = 0;
01f2e4ea
SF
807
808 if (enic->vlan_group && vlan_tx_tag_present(skb)) {
809 /* VLAN tag from trunking driver */
810 vlan_tag_insert = 1;
811 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK
812 } else if (enic->loop_enable) {
813 vlan_tag = enic->loop_tag;
814 loopback = 1;
01f2e4ea
SF
815 }
816
817 if (mss)
818 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 819 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
820 else if (skb->ip_summed == CHECKSUM_PARTIAL)
821 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 822 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
823 else
824 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 825 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF
826}
827
ed8af6b2 828/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 829static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 830 struct net_device *netdev)
01f2e4ea
SF
831{
832 struct enic *enic = netdev_priv(netdev);
833 struct vnic_wq *wq = &enic->wq[0];
834 unsigned long flags;
835
836 if (skb->len <= 0) {
837 dev_kfree_skb(skb);
838 return NETDEV_TX_OK;
839 }
840
841 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
842 * which is very likely. In the off chance it's going to take
843 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
844 */
845
846 if (skb_shinfo(skb)->gso_size == 0 &&
847 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
848 skb_linearize(skb)) {
849 dev_kfree_skb(skb);
850 return NETDEV_TX_OK;
851 }
852
853 spin_lock_irqsave(&enic->wq_lock[0], flags);
854
ea0d7d91
SF
855 if (vnic_wq_desc_avail(wq) <
856 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF
857 netif_stop_queue(netdev);
858 /* This is a hard error, log it */
a7a79deb 859 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF
860 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
861 return NETDEV_TX_BUSY;
862 }
863
864 enic_queue_wq_skb(enic, wq, skb);
865
ea0d7d91 866 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF
867 netif_stop_queue(netdev);
868
01f2e4ea
SF
869 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
870
871 return NETDEV_TX_OK;
872}
873
874/* dev_base_lock rwlock held, nominally process context */
875static struct net_device_stats *enic_get_stats(struct net_device *netdev)
876{
877 struct enic *enic = netdev_priv(netdev);
25f0a061 878 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF
879 struct vnic_stats *stats;
880
383ab92f 881 enic_dev_stats_dump(enic, &stats);
01f2e4ea 882
25f0a061
SF
883 net_stats->tx_packets = stats->tx.tx_frames_ok;
884 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
885 net_stats->tx_errors = stats->tx.tx_errors;
886 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 887
25f0a061
SF
888 net_stats->rx_packets = stats->rx.rx_frames_ok;
889 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
890 net_stats->rx_errors = stats->rx.rx_errors;
891 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 892 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 893 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 894 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 895
25f0a061 896 return net_stats;
01f2e4ea
SF
897}
898
99ef5639 899static void enic_reset_multicast_list(struct enic *enic)
01f2e4ea
SF
900{
901 enic->mc_count = 0;
99ef5639 902 enic->flags = 0;
01f2e4ea
SF
903}
904
905static int enic_set_mac_addr(struct net_device *netdev, char *addr)
906{
f8bd9091
SF
907 struct enic *enic = netdev_priv(netdev);
908
909 if (enic_is_dynamic(enic)) {
910 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
911 return -EADDRNOTAVAIL;
912 } else {
913 if (!is_valid_ether_addr(addr))
914 return -EADDRNOTAVAIL;
915 }
01f2e4ea
SF
916
917 memcpy(netdev->dev_addr, addr, netdev->addr_len);
918
919 return 0;
920}
921
f8bd9091
SF
922static int enic_dev_add_station_addr(struct enic *enic)
923{
924 int err = 0;
925
926 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
927 spin_lock(&enic->devcmd_lock);
928 err = vnic_dev_add_addr(enic->vdev, enic->netdev->dev_addr);
929 spin_unlock(&enic->devcmd_lock);
930 }
931
932 return err;
933}
934
935static int enic_dev_del_station_addr(struct enic *enic)
936{
937 int err = 0;
938
939 if (is_valid_ether_addr(enic->netdev->dev_addr)) {
940 spin_lock(&enic->devcmd_lock);
941 err = vnic_dev_del_addr(enic->vdev, enic->netdev->dev_addr);
942 spin_unlock(&enic->devcmd_lock);
943 }
944
945 return err;
946}
947
948static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
949{
950 struct enic *enic = netdev_priv(netdev);
951 struct sockaddr *saddr = p;
952 char *addr = saddr->sa_data;
953 int err;
954
955 if (netif_running(enic->netdev)) {
956 err = enic_dev_del_station_addr(enic);
957 if (err)
958 return err;
959 }
960
961 err = enic_set_mac_addr(netdev, addr);
962 if (err)
963 return err;
964
965 if (netif_running(enic->netdev)) {
966 err = enic_dev_add_station_addr(enic);
967 if (err)
968 return err;
969 }
970
971 return err;
972}
973
974static int enic_set_mac_address(struct net_device *netdev, void *p)
975{
294dab25
RP
976 struct sockaddr *saddr = p;
977
978 return enic_set_mac_addr(netdev, (char *)saddr->sa_data);
f8bd9091
SF
979}
980
383ab92f
VK
981static int enic_dev_packet_filter(struct enic *enic, int directed,
982 int multicast, int broadcast, int promisc, int allmulti)
983{
984 int err;
985
986 spin_lock(&enic->devcmd_lock);
987 err = vnic_dev_packet_filter(enic->vdev, directed,
988 multicast, broadcast, promisc, allmulti);
989 spin_unlock(&enic->devcmd_lock);
990
991 return err;
992}
993
994static int enic_dev_add_multicast_addr(struct enic *enic, u8 *addr)
995{
996 int err;
997
998 spin_lock(&enic->devcmd_lock);
999 err = vnic_dev_add_addr(enic->vdev, addr);
1000 spin_unlock(&enic->devcmd_lock);
1001
1002 return err;
1003}
1004
1005static int enic_dev_del_multicast_addr(struct enic *enic, u8 *addr)
1006{
1007 int err;
1008
1009 spin_lock(&enic->devcmd_lock);
1010 err = vnic_dev_del_addr(enic->vdev, addr);
1011 spin_unlock(&enic->devcmd_lock);
1012
1013 return err;
1014}
1015
01f2e4ea
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1016/* netif_tx_lock held, BHs disabled */
1017static void enic_set_multicast_list(struct net_device *netdev)
1018{
1019 struct enic *enic = netdev_priv(netdev);
22bedad3 1020 struct netdev_hw_addr *ha;
01f2e4ea
SF
1021 int directed = 1;
1022 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1023 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1024 int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
4cd24eaf 1025 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 1026 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
641cb85e 1027 mc_count > ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 1028 unsigned int flags = netdev->flags | (allmulti ? IFF_ALLMULTI : 0);
01f2e4ea 1029 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF
1030 unsigned int i, j;
1031
1032 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
1033 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
1034
9959a185
SF
1035 if (enic->flags != flags) {
1036 enic->flags = flags;
383ab92f 1037 enic_dev_packet_filter(enic, directed,
9959a185
SF
1038 multicast, broadcast, promisc, allmulti);
1039 }
01f2e4ea
SF
1040
1041 /* Is there an easier way? Trying to minimize to
1042 * calls to add/del multicast addrs. We keep the
1043 * addrs from the last call in enic->mc_addr and
1044 * look for changes to add/del.
1045 */
1046
48e2f183 1047 i = 0;
22bedad3 1048 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP
1049 if (i == mc_count)
1050 break;
22bedad3 1051 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF
1052 }
1053
1054 for (i = 0; i < enic->mc_count; i++) {
1055 for (j = 0; j < mc_count; j++)
1056 if (compare_ether_addr(enic->mc_addr[i],
1057 mc_addr[j]) == 0)
1058 break;
1059 if (j == mc_count)
383ab92f 1060 enic_dev_del_multicast_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF
1061 }
1062
1063 for (i = 0; i < mc_count; i++) {
1064 for (j = 0; j < enic->mc_count; j++)
1065 if (compare_ether_addr(mc_addr[i],
1066 enic->mc_addr[j]) == 0)
1067 break;
1068 if (j == enic->mc_count)
383ab92f 1069 enic_dev_add_multicast_addr(enic, mc_addr[i]);
01f2e4ea
SF
1070 }
1071
1072 /* Save the list to compare against next time
1073 */
1074
1075 for (i = 0; i < mc_count; i++)
1076 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
1077
1078 enic->mc_count = mc_count;
01f2e4ea
SF
1079}
1080
1081/* rtnl lock is held */
1082static void enic_vlan_rx_register(struct net_device *netdev,
1083 struct vlan_group *vlan_group)
1084{
1085 struct enic *enic = netdev_priv(netdev);
1086 enic->vlan_group = vlan_group;
1087}
1088
1089/* rtnl lock is held */
1090static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1091{
1092 struct enic *enic = netdev_priv(netdev);
1093
1094 spin_lock(&enic->devcmd_lock);
1095 enic_add_vlan(enic, vid);
1096 spin_unlock(&enic->devcmd_lock);
1097}
1098
1099/* rtnl lock is held */
1100static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1101{
1102 struct enic *enic = netdev_priv(netdev);
1103
1104 spin_lock(&enic->devcmd_lock);
1105 enic_del_vlan(enic, vid);
1106 spin_unlock(&enic->devcmd_lock);
1107}
1108
1109/* netif_tx_lock held, BHs disabled */
1110static void enic_tx_timeout(struct net_device *netdev)
1111{
1112 struct enic *enic = netdev_priv(netdev);
1113 schedule_work(&enic->reset);
1114}
1115
f8bd9091
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1116static int enic_vnic_dev_deinit(struct enic *enic)
1117{
1118 int err;
1119
1120 spin_lock(&enic->devcmd_lock);
1121 err = vnic_dev_deinit(enic->vdev);
1122 spin_unlock(&enic->devcmd_lock);
1123
1124 return err;
1125}
1126
1127static int enic_dev_init_prov(struct enic *enic, struct vic_provinfo *vp)
1128{
1129 int err;
1130
1131 spin_lock(&enic->devcmd_lock);
1132 err = vnic_dev_init_prov(enic->vdev,
1133 (u8 *)vp, vic_provinfo_size(vp));
1134 spin_unlock(&enic->devcmd_lock);
1135
1136 return err;
1137}
1138
1139static int enic_dev_init_done(struct enic *enic, int *done, int *error)
1140{
1141 int err;
1142
1143 spin_lock(&enic->devcmd_lock);
1144 err = vnic_dev_init_done(enic->vdev, done, error);
1145 spin_unlock(&enic->devcmd_lock);
1146
1147 return err;
1148}
1149
08f382eb 1150static int enic_set_port_profile(struct enic *enic, u8 *mac)
f8bd9091
SF
1151{
1152 struct vic_provinfo *vp;
1153 u8 oui[3] = VIC_PROVINFO_CISCO_OUI;
f8bd9091 1154 char uuid_str[38];
f8bd9091
SF
1155 int err;
1156
08f382eb
SF
1157 err = enic_vnic_dev_deinit(enic);
1158 if (err)
1159 return err;
f8bd9091 1160
08f382eb 1161 switch (enic->pp.request) {
f8bd9091 1162
08f382eb 1163 case PORT_REQUEST_ASSOCIATE:
f8bd9091 1164
08f382eb
SF
1165 if (!(enic->pp.set & ENIC_SET_NAME) || !strlen(enic->pp.name))
1166 return -EINVAL;
f8bd9091 1167
08f382eb
SF
1168 if (!is_valid_ether_addr(mac))
1169 return -EADDRNOTAVAIL;
f8bd9091 1170
08f382eb
SF
1171 vp = vic_provinfo_alloc(GFP_KERNEL, oui,
1172 VIC_PROVINFO_LINUX_TYPE);
1173 if (!vp)
1174 return -ENOMEM;
f8bd9091 1175
f8bd9091 1176 vic_provinfo_add_tlv(vp,
08f382eb
SF
1177 VIC_LINUX_PROV_TLV_PORT_PROFILE_NAME_STR,
1178 strlen(enic->pp.name) + 1, enic->pp.name);
f8bd9091 1179
08f382eb
SF
1180 vic_provinfo_add_tlv(vp,
1181 VIC_LINUX_PROV_TLV_CLIENT_MAC_ADDR,
1182 ETH_ALEN, mac);
1183
1184 if (enic->pp.set & ENIC_SET_INSTANCE) {
c33788b4 1185 sprintf(uuid_str, "%pUB", enic->pp.instance_uuid);
08f382eb
SF
1186 vic_provinfo_add_tlv(vp,
1187 VIC_LINUX_PROV_TLV_CLIENT_UUID_STR,
1188 sizeof(uuid_str), uuid_str);
1189 }
f8bd9091 1190
08f382eb 1191 if (enic->pp.set & ENIC_SET_HOST) {
c33788b4 1192 sprintf(uuid_str, "%pUB", enic->pp.host_uuid);
08f382eb
SF
1193 vic_provinfo_add_tlv(vp,
1194 VIC_LINUX_PROV_TLV_HOST_UUID_STR,
1195 sizeof(uuid_str), uuid_str);
1196 }
f8bd9091 1197
08f382eb
SF
1198 err = enic_dev_init_prov(enic, vp);
1199 vic_provinfo_free(vp);
1200 if (err)
1201 return err;
1202 break;
f8bd9091 1203
08f382eb
SF
1204 case PORT_REQUEST_DISASSOCIATE:
1205 break;
f8bd9091 1206
08f382eb
SF
1207 default:
1208 return -EINVAL;
1209 }
f8bd9091 1210
08f382eb
SF
1211 enic->pp.set |= ENIC_SET_APPLIED;
1212 return 0;
f8bd9091
SF
1213}
1214
1215static int enic_set_vf_port(struct net_device *netdev, int vf,
1216 struct nlattr *port[])
1217{
1218 struct enic *enic = netdev_priv(netdev);
08f382eb
SF
1219
1220 memset(&enic->pp, 0, sizeof(enic->pp));
1221
1222 if (port[IFLA_PORT_REQUEST]) {
1223 enic->pp.set |= ENIC_SET_REQUEST;
1224 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
1225 }
1226
1227 if (port[IFLA_PORT_PROFILE]) {
1228 enic->pp.set |= ENIC_SET_NAME;
1229 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
1230 PORT_PROFILE_MAX);
1231 }
1232
1233 if (port[IFLA_PORT_INSTANCE_UUID]) {
1234 enic->pp.set |= ENIC_SET_INSTANCE;
1235 memcpy(enic->pp.instance_uuid,
1236 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1237 }
1238
1239 if (port[IFLA_PORT_HOST_UUID]) {
1240 enic->pp.set |= ENIC_SET_HOST;
1241 memcpy(enic->pp.host_uuid,
1242 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1243 }
f8bd9091
SF
1244
1245 /* don't support VFs, yet */
1246 if (vf != PORT_SELF_VF)
1247 return -EOPNOTSUPP;
1248
08f382eb
SF
1249 if (!(enic->pp.set & ENIC_SET_REQUEST))
1250 return -EOPNOTSUPP;
f8bd9091 1251
08f382eb 1252 if (enic->pp.request == PORT_REQUEST_ASSOCIATE) {
f8bd9091 1253
418c437d
SF
1254 /* If the interface mac addr hasn't been assigned,
1255 * assign a random mac addr before setting port-
1256 * profile.
1257 */
1258
1259 if (is_zero_ether_addr(netdev->dev_addr))
1260 random_ether_addr(netdev->dev_addr);
f8bd9091
SF
1261 }
1262
08f382eb 1263 return enic_set_port_profile(enic, netdev->dev_addr);
f8bd9091
SF
1264}
1265
1266static int enic_get_vf_port(struct net_device *netdev, int vf,
1267 struct sk_buff *skb)
1268{
1269 struct enic *enic = netdev_priv(netdev);
1270 int err, error, done;
1271 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1272
08f382eb
SF
1273 if (!(enic->pp.set & ENIC_SET_APPLIED))
1274 return -ENODATA;
f8bd9091
SF
1275
1276 err = enic_dev_init_done(enic, &done, &error);
f8bd9091 1277 if (err)
08f382eb 1278 error = err;
f8bd9091
SF
1279
1280 switch (error) {
1281 case ERR_SUCCESS:
1282 if (!done)
1283 response = PORT_PROFILE_RESPONSE_INPROGRESS;
1284 break;
1285 case ERR_EINVAL:
1286 response = PORT_PROFILE_RESPONSE_INVALID;
1287 break;
1288 case ERR_EBADSTATE:
1289 response = PORT_PROFILE_RESPONSE_BADSTATE;
1290 break;
1291 case ERR_ENOMEM:
1292 response = PORT_PROFILE_RESPONSE_INSUFFICIENT_RESOURCES;
1293 break;
1294 default:
1295 response = PORT_PROFILE_RESPONSE_ERROR;
1296 break;
1297 }
1298
1299 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1300 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF
1301 if (enic->pp.set & ENIC_SET_NAME)
1302 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1303 enic->pp.name);
1304 if (enic->pp.set & ENIC_SET_INSTANCE)
1305 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1306 enic->pp.instance_uuid);
1307 if (enic->pp.set & ENIC_SET_HOST)
1308 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1309 enic->pp.host_uuid);
f8bd9091
SF
1310
1311 return 0;
1312
1313nla_put_failure:
1314 return -EMSGSIZE;
1315}
1316
01f2e4ea
SF
1317static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1318{
1319 struct enic *enic = vnic_dev_priv(rq->vdev);
1320
1321 if (!buf->os_buf)
1322 return;
1323
1324 pci_unmap_single(enic->pdev, buf->dma_addr,
1325 buf->len, PCI_DMA_FROMDEVICE);
1326 dev_kfree_skb_any(buf->os_buf);
1327}
1328
01f2e4ea
SF
1329static int enic_rq_alloc_buf(struct vnic_rq *rq)
1330{
1331 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1332 struct net_device *netdev = enic->netdev;
01f2e4ea 1333 struct sk_buff *skb;
1825aca6 1334 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF
1335 unsigned int os_buf_index = 0;
1336 dma_addr_t dma_addr;
1337
89d71a66 1338 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF
1339 if (!skb)
1340 return -ENOMEM;
1341
1342 dma_addr = pci_map_single(enic->pdev, skb->data,
1343 len, PCI_DMA_FROMDEVICE);
1344
1345 enic_queue_rq_desc(rq, skb, os_buf_index,
1346 dma_addr, len);
1347
1348 return 0;
1349}
1350
4badc385
SF
1351static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
1352{
1353 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
1354
1355 if (vnic_rq_posting_soon(rq)) {
1356
1357 /* SW workaround for A0 HW erratum: if we're just about
1358 * to write posted_index, insert a dummy desc
1359 * of type resvd
1360 */
1361
1362 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
1363 vnic_rq_post(rq, 0, 0, 0, 0);
1364 } else {
1365 return enic_rq_alloc_buf(rq);
1366 }
1367
1368 return 0;
1369}
1370
383ab92f
VK
1371static int enic_dev_hw_version(struct enic *enic,
1372 enum vnic_dev_hw_version *hw_ver)
1373{
1374 int err;
1375
1376 spin_lock(&enic->devcmd_lock);
1377 err = vnic_dev_hw_version(enic->vdev, hw_ver);
1378 spin_unlock(&enic->devcmd_lock);
1379
1380 return err;
1381}
1382
4badc385
SF
1383static int enic_set_rq_alloc_buf(struct enic *enic)
1384{
1385 enum vnic_dev_hw_version hw_ver;
1386 int err;
1387
383ab92f 1388 err = enic_dev_hw_version(enic, &hw_ver);
4badc385
SF
1389 if (err)
1390 return err;
1391
1392 switch (hw_ver) {
1393 case VNIC_DEV_HW_VER_A1:
1394 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
1395 break;
1396 case VNIC_DEV_HW_VER_A2:
1397 case VNIC_DEV_HW_VER_UNKNOWN:
1398 enic->rq_alloc_buf = enic_rq_alloc_buf;
1399 break;
1400 default:
1401 return -ENODEV;
1402 }
1403
1404 return 0;
1405}
1406
01f2e4ea
SF
1407static void enic_rq_indicate_buf(struct vnic_rq *rq,
1408 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1409 int skipped, void *opaque)
1410{
1411 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1412 struct net_device *netdev = enic->netdev;
01f2e4ea
SF
1413 struct sk_buff *skb;
1414
1415 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1416 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1417 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1418 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1419 u8 packet_error;
f8cac14a 1420 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF
1421 u32 rss_hash;
1422
1423 if (skipped)
1424 return;
1425
1426 skb = buf->os_buf;
1427 prefetch(skb->data - NET_IP_ALIGN);
1428 pci_unmap_single(enic->pdev, buf->dma_addr,
1429 buf->len, PCI_DMA_FROMDEVICE);
1430
1431 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1432 &type, &color, &q_number, &completed_index,
1433 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1434 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1435 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF
1436 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1437 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1438 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1439 &fcs_ok);
1440
1441 if (packet_error) {
1442
350991e1
SF
1443 if (!fcs_ok) {
1444 if (bytes_written > 0)
1445 enic->rq_bad_fcs++;
1446 else if (bytes_written == 0)
1447 enic->rq_truncated_pkts++;
1448 }
01f2e4ea
SF
1449
1450 dev_kfree_skb_any(skb);
1451
1452 return;
1453 }
1454
1455 if (eop && bytes_written > 0) {
1456
1457 /* Good receive
1458 */
1459
1460 skb_put(skb, bytes_written);
86ca9db7 1461 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF
1462
1463 if (enic->csum_rx_enabled && !csum_not_calc) {
1464 skb->csum = htons(checksum);
1465 skb->ip_summed = CHECKSUM_COMPLETE;
1466 }
1467
86ca9db7 1468 skb->dev = netdev;
01f2e4ea 1469
f8cac14a
VK
1470 if (enic->vlan_group && vlan_stripped &&
1471 (vlan_tci & CQ_ENET_RQ_DESC_VLAN_TCI_VLAN_MASK)) {
01f2e4ea 1472
88132f55 1473 if (netdev->features & NETIF_F_GRO)
717258ba
VK
1474 vlan_gro_receive(&enic->napi[q_number],
1475 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF
1476 else
1477 vlan_hwaccel_receive_skb(skb,
f8cac14a 1478 enic->vlan_group, vlan_tci);
01f2e4ea
SF
1479
1480 } else {
1481
88132f55 1482 if (netdev->features & NETIF_F_GRO)
717258ba 1483 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF
1484 else
1485 netif_receive_skb(skb);
1486
1487 }
01f2e4ea
SF
1488 } else {
1489
1490 /* Buffer overflow
1491 */
1492
1493 dev_kfree_skb_any(skb);
1494 }
1495}
1496
1497static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1498 u8 type, u16 q_number, u16 completed_index, void *opaque)
1499{
1500 struct enic *enic = vnic_dev_priv(vdev);
1501
1502 vnic_rq_service(&enic->rq[q_number], cq_desc,
1503 completed_index, VNIC_RQ_RETURN_DESC,
1504 enic_rq_indicate_buf, opaque);
1505
1506 return 0;
1507}
1508
01f2e4ea
SF
1509static int enic_poll(struct napi_struct *napi, int budget)
1510{
717258ba
VK
1511 struct net_device *netdev = napi->dev;
1512 struct enic *enic = netdev_priv(netdev);
1513 unsigned int cq_rq = enic_cq_rq(enic, 0);
1514 unsigned int cq_wq = enic_cq_wq(enic, 0);
1515 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF
1516 unsigned int rq_work_to_do = budget;
1517 unsigned int wq_work_to_do = -1; /* no limit */
1518 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1519 int err;
01f2e4ea
SF
1520
1521 /* Service RQ (first) and WQ
1522 */
1523
717258ba 1524 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF
1525 rq_work_to_do, enic_rq_service, NULL);
1526
717258ba 1527 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF
1528 wq_work_to_do, enic_wq_service, NULL);
1529
1530 /* Accumulate intr event credits for this polling
1531 * cycle. An intr event is the completion of a
1532 * a WQ or RQ packet.
1533 */
1534
1535 work_done = rq_work_done + wq_work_done;
1536
1537 if (work_done > 0)
717258ba 1538 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
1539 work_done,
1540 0 /* don't unmask intr */,
1541 0 /* don't reset intr timer */);
1542
2d6ddced 1543 err = vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1544
2d6ddced
SF
1545 /* Buffer allocation failed. Stay in polling
1546 * mode so we can try to fill the ring again.
1547 */
01f2e4ea 1548
2d6ddced
SF
1549 if (err)
1550 rq_work_done = rq_work_to_do;
01f2e4ea 1551
2d6ddced 1552 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1553
2d6ddced 1554 /* Some work done, but not enough to stay in polling,
88132f55 1555 * exit polling
01f2e4ea
SF
1556 */
1557
288379f0 1558 napi_complete(napi);
717258ba 1559 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF
1560 }
1561
1562 return rq_work_done;
1563}
1564
1565static int enic_poll_msix(struct napi_struct *napi, int budget)
1566{
717258ba
VK
1567 struct net_device *netdev = napi->dev;
1568 struct enic *enic = netdev_priv(netdev);
1569 unsigned int rq = (napi - &enic->napi[0]);
1570 unsigned int cq = enic_cq_rq(enic, rq);
1571 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF
1572 unsigned int work_to_do = budget;
1573 unsigned int work_done;
2d6ddced 1574 int err;
01f2e4ea
SF
1575
1576 /* Service RQ
1577 */
1578
717258ba 1579 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF
1580 work_to_do, enic_rq_service, NULL);
1581
2d6ddced
SF
1582 /* Return intr event credits for this polling
1583 * cycle. An intr event is the completion of a
1584 * RQ packet.
1585 */
01f2e4ea 1586
2d6ddced 1587 if (work_done > 0)
717258ba 1588 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF
1589 work_done,
1590 0 /* don't unmask intr */,
1591 0 /* don't reset intr timer */);
01f2e4ea 1592
717258ba 1593 err = vnic_rq_fill(&enic->rq[rq], enic->rq_alloc_buf);
2d6ddced
SF
1594
1595 /* Buffer allocation failed. Stay in polling mode
1596 * so we can try to fill the ring again.
1597 */
1598
1599 if (err)
1600 work_done = work_to_do;
1601
1602 if (work_done < work_to_do) {
1603
1604 /* Some work done, but not enough to stay in polling,
88132f55 1605 * exit polling
01f2e4ea
SF
1606 */
1607
288379f0 1608 napi_complete(napi);
717258ba 1609 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF
1610 }
1611
1612 return work_done;
1613}
1614
1615static void enic_notify_timer(unsigned long data)
1616{
1617 struct enic *enic = (struct enic *)data;
1618
1619 enic_notify_check(enic);
1620
25f0a061
SF
1621 mod_timer(&enic->notify_timer,
1622 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF
1623}
1624
1625static void enic_free_intr(struct enic *enic)
1626{
1627 struct net_device *netdev = enic->netdev;
1628 unsigned int i;
1629
1630 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1631 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF
1632 free_irq(enic->pdev->irq, netdev);
1633 break;
8f4d248c
SF
1634 case VNIC_DEV_INTR_MODE_MSI:
1635 free_irq(enic->pdev->irq, enic);
1636 break;
01f2e4ea
SF
1637 case VNIC_DEV_INTR_MODE_MSIX:
1638 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1639 if (enic->msix[i].requested)
1640 free_irq(enic->msix_entry[i].vector,
1641 enic->msix[i].devid);
1642 break;
1643 default:
1644 break;
1645 }
1646}
1647
1648static int enic_request_intr(struct enic *enic)
1649{
1650 struct net_device *netdev = enic->netdev;
717258ba 1651 unsigned int i, intr;
01f2e4ea
SF
1652 int err = 0;
1653
1654 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1655
1656 case VNIC_DEV_INTR_MODE_INTX:
1657
1658 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1659 IRQF_SHARED, netdev->name, netdev);
1660 break;
1661
1662 case VNIC_DEV_INTR_MODE_MSI:
1663
1664 err = request_irq(enic->pdev->irq, enic_isr_msi,
1665 0, netdev->name, enic);
1666 break;
1667
1668 case VNIC_DEV_INTR_MODE_MSIX:
1669
717258ba
VK
1670 for (i = 0; i < enic->rq_count; i++) {
1671 intr = enic_msix_rq_intr(enic, i);
1672 sprintf(enic->msix[intr].devname,
1673 "%.11s-rx-%d", netdev->name, i);
1674 enic->msix[intr].isr = enic_isr_msix_rq;
1675 enic->msix[intr].devid = &enic->napi[i];
1676 }
01f2e4ea 1677
717258ba
VK
1678 for (i = 0; i < enic->wq_count; i++) {
1679 intr = enic_msix_wq_intr(enic, i);
1680 sprintf(enic->msix[intr].devname,
1681 "%.11s-tx-%d", netdev->name, i);
1682 enic->msix[intr].isr = enic_isr_msix_wq;
1683 enic->msix[intr].devid = enic;
1684 }
01f2e4ea 1685
717258ba
VK
1686 intr = enic_msix_err_intr(enic);
1687 sprintf(enic->msix[intr].devname,
01f2e4ea 1688 "%.11s-err", netdev->name);
717258ba
VK
1689 enic->msix[intr].isr = enic_isr_msix_err;
1690 enic->msix[intr].devid = enic;
01f2e4ea 1691
717258ba
VK
1692 intr = enic_msix_notify_intr(enic);
1693 sprintf(enic->msix[intr].devname,
01f2e4ea 1694 "%.11s-notify", netdev->name);
717258ba
VK
1695 enic->msix[intr].isr = enic_isr_msix_notify;
1696 enic->msix[intr].devid = enic;
1697
1698 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1699 enic->msix[i].requested = 0;
01f2e4ea 1700
717258ba 1701 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF
1702 err = request_irq(enic->msix_entry[i].vector,
1703 enic->msix[i].isr, 0,
1704 enic->msix[i].devname,
1705 enic->msix[i].devid);
1706 if (err) {
1707 enic_free_intr(enic);
1708 break;
1709 }
1710 enic->msix[i].requested = 1;
1711 }
1712
1713 break;
1714
1715 default:
1716 break;
1717 }
1718
1719 return err;
1720}
1721
b3d18d19
SF
1722static void enic_synchronize_irqs(struct enic *enic)
1723{
1724 unsigned int i;
1725
1726 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1727 case VNIC_DEV_INTR_MODE_INTX:
1728 case VNIC_DEV_INTR_MODE_MSI:
1729 synchronize_irq(enic->pdev->irq);
1730 break;
1731 case VNIC_DEV_INTR_MODE_MSIX:
1732 for (i = 0; i < enic->intr_count; i++)
1733 synchronize_irq(enic->msix_entry[i].vector);
1734 break;
1735 default:
1736 break;
1737 }
1738}
1739
383ab92f 1740static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF
1741{
1742 int err;
1743
56ac88b3 1744 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF
1745 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1746 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK
1747 err = vnic_dev_notify_set(enic->vdev,
1748 enic_legacy_notify_intr());
01f2e4ea
SF
1749 break;
1750 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
1751 err = vnic_dev_notify_set(enic->vdev,
1752 enic_msix_notify_intr(enic));
01f2e4ea
SF
1753 break;
1754 default:
1755 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1756 break;
1757 }
56ac88b3 1758 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF
1759
1760 return err;
1761}
1762
383ab92f
VK
1763static int enic_dev_notify_unset(struct enic *enic)
1764{
1765 int err;
1766
1767 spin_lock(&enic->devcmd_lock);
1768 err = vnic_dev_notify_unset(enic->vdev);
1769 spin_unlock(&enic->devcmd_lock);
1770
1771 return err;
1772}
1773
1774static int enic_dev_enable(struct enic *enic)
1775{
1776 int err;
1777
1778 spin_lock(&enic->devcmd_lock);
1779 err = vnic_dev_enable(enic->vdev);
1780 spin_unlock(&enic->devcmd_lock);
1781
1782 return err;
1783}
1784
1785static int enic_dev_disable(struct enic *enic)
1786{
1787 int err;
1788
1789 spin_lock(&enic->devcmd_lock);
1790 err = vnic_dev_disable(enic->vdev);
1791 spin_unlock(&enic->devcmd_lock);
1792
1793 return err;
1794}
1795
01f2e4ea
SF
1796static void enic_notify_timer_start(struct enic *enic)
1797{
1798 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1799 case VNIC_DEV_INTR_MODE_MSI:
1800 mod_timer(&enic->notify_timer, jiffies);
1801 break;
1802 default:
1803 /* Using intr for notification for INTx/MSI-X */
1804 break;
1805 };
1806}
1807
1808/* rtnl lock is held, process context */
1809static int enic_open(struct net_device *netdev)
1810{
1811 struct enic *enic = netdev_priv(netdev);
1812 unsigned int i;
1813 int err;
1814
4b75a442
SF
1815 err = enic_request_intr(enic);
1816 if (err) {
a7a79deb 1817 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF
1818 return err;
1819 }
1820
383ab92f 1821 err = enic_dev_notify_set(enic);
4b75a442 1822 if (err) {
a7a79deb
VK
1823 netdev_err(netdev,
1824 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF
1825 goto err_out_free_intr;
1826 }
1827
01f2e4ea 1828 for (i = 0; i < enic->rq_count; i++) {
2d6ddced
SF
1829 vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
1830 /* Need at least one buffer on ring to get going */
1831 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1832 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1833 err = -ENOMEM;
4b75a442 1834 goto err_out_notify_unset;
01f2e4ea
SF
1835 }
1836 }
1837
1838 for (i = 0; i < enic->wq_count; i++)
1839 vnic_wq_enable(&enic->wq[i]);
1840 for (i = 0; i < enic->rq_count; i++)
1841 vnic_rq_enable(&enic->rq[i]);
1842
f8bd9091 1843 enic_dev_add_station_addr(enic);
01f2e4ea
SF
1844 enic_set_multicast_list(netdev);
1845
1846 netif_wake_queue(netdev);
717258ba
VK
1847
1848 for (i = 0; i < enic->rq_count; i++)
1849 napi_enable(&enic->napi[i]);
1850
383ab92f 1851 enic_dev_enable(enic);
01f2e4ea
SF
1852
1853 for (i = 0; i < enic->intr_count; i++)
1854 vnic_intr_unmask(&enic->intr[i]);
1855
1856 enic_notify_timer_start(enic);
1857
1858 return 0;
4b75a442
SF
1859
1860err_out_notify_unset:
383ab92f 1861 enic_dev_notify_unset(enic);
4b75a442
SF
1862err_out_free_intr:
1863 enic_free_intr(enic);
1864
1865 return err;
01f2e4ea
SF
1866}
1867
1868/* rtnl lock is held, process context */
1869static int enic_stop(struct net_device *netdev)
1870{
1871 struct enic *enic = netdev_priv(netdev);
1872 unsigned int i;
1873 int err;
1874
29046f9b 1875 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1876 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK
1877 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1878 }
b3d18d19
SF
1879
1880 enic_synchronize_irqs(enic);
1881
01f2e4ea
SF
1882 del_timer_sync(&enic->notify_timer);
1883
383ab92f 1884 enic_dev_disable(enic);
717258ba
VK
1885
1886 for (i = 0; i < enic->rq_count; i++)
1887 napi_disable(&enic->napi[i]);
1888
b3d18d19
SF
1889 netif_carrier_off(netdev);
1890 netif_tx_disable(netdev);
f8bd9091
SF
1891 enic_dev_del_station_addr(enic);
1892
01f2e4ea
SF
1893 for (i = 0; i < enic->wq_count; i++) {
1894 err = vnic_wq_disable(&enic->wq[i]);
1895 if (err)
1896 return err;
1897 }
1898 for (i = 0; i < enic->rq_count; i++) {
1899 err = vnic_rq_disable(&enic->rq[i]);
1900 if (err)
1901 return err;
1902 }
1903
383ab92f 1904 enic_dev_notify_unset(enic);
4b75a442
SF
1905 enic_free_intr(enic);
1906
01f2e4ea
SF
1907 for (i = 0; i < enic->wq_count; i++)
1908 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1909 for (i = 0; i < enic->rq_count; i++)
1910 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1911 for (i = 0; i < enic->cq_count; i++)
1912 vnic_cq_clean(&enic->cq[i]);
1913 for (i = 0; i < enic->intr_count; i++)
1914 vnic_intr_clean(&enic->intr[i]);
1915
1916 return 0;
1917}
1918
1919static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1920{
1921 struct enic *enic = netdev_priv(netdev);
1922 int running = netif_running(netdev);
1923
25f0a061
SF
1924 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1925 return -EINVAL;
1926
01f2e4ea
SF
1927 if (running)
1928 enic_stop(netdev);
1929
01f2e4ea
SF
1930 netdev->mtu = new_mtu;
1931
1932 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK
1933 netdev_warn(netdev,
1934 "interface MTU (%d) set higher than port MTU (%d)\n",
1935 netdev->mtu, enic->port_mtu);
01f2e4ea
SF
1936
1937 if (running)
1938 enic_open(netdev);
1939
1940 return 0;
1941}
1942
1943#ifdef CONFIG_NET_POLL_CONTROLLER
1944static void enic_poll_controller(struct net_device *netdev)
1945{
1946 struct enic *enic = netdev_priv(netdev);
1947 struct vnic_dev *vdev = enic->vdev;
717258ba 1948 unsigned int i, intr;
01f2e4ea
SF
1949
1950 switch (vnic_dev_get_intr_mode(vdev)) {
1951 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
1952 for (i = 0; i < enic->rq_count; i++) {
1953 intr = enic_msix_rq_intr(enic, i);
1954 enic_isr_msix_rq(enic->msix_entry[intr].vector, enic);
1955 }
1956 intr = enic_msix_wq_intr(enic, i);
1957 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF
1958 break;
1959 case VNIC_DEV_INTR_MODE_MSI:
1960 enic_isr_msi(enic->pdev->irq, enic);
1961 break;
1962 case VNIC_DEV_INTR_MODE_INTX:
1963 enic_isr_legacy(enic->pdev->irq, netdev);
1964 break;
1965 default:
1966 break;
1967 }
1968}
1969#endif
1970
1971static int enic_dev_wait(struct vnic_dev *vdev,
1972 int (*start)(struct vnic_dev *, int),
1973 int (*finished)(struct vnic_dev *, int *),
1974 int arg)
1975{
1976 unsigned long time;
1977 int done;
1978 int err;
1979
1980 BUG_ON(in_interrupt());
1981
1982 err = start(vdev, arg);
1983 if (err)
1984 return err;
1985
1986 /* Wait for func to complete...2 seconds max
1987 */
1988
1989 time = jiffies + (HZ * 2);
1990 do {
1991
1992 err = finished(vdev, &done);
1993 if (err)
1994 return err;
1995
1996 if (done)
1997 return 0;
1998
1999 schedule_timeout_uninterruptible(HZ / 10);
2000
2001 } while (time_after(time, jiffies));
2002
2003 return -ETIMEDOUT;
2004}
2005
2006static int enic_dev_open(struct enic *enic)
2007{
2008 int err;
2009
2010 err = enic_dev_wait(enic->vdev, vnic_dev_open,
2011 vnic_dev_open_done, 0);
2012 if (err)
a7a79deb
VK
2013 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
2014 err);
01f2e4ea
SF
2015
2016 return err;
2017}
2018
99ef5639 2019static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF
2020{
2021 int err;
2022
99ef5639
VK
2023 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
2024 vnic_dev_hang_reset_done, 0);
01f2e4ea 2025 if (err)
a7a79deb
VK
2026 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
2027 err);
01f2e4ea
SF
2028
2029 return err;
2030}
2031
717258ba
VK
2032static int enic_set_rsskey(struct enic *enic)
2033{
2034 u64 rss_key_buf_pa;
2035 union vnic_rss_key *rss_key_buf_va = NULL;
2036 union vnic_rss_key rss_key = {
2037 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
2038 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
2039 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
2040 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
2041 };
2042 int err;
2043
2044 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
2045 sizeof(union vnic_rss_key), &rss_key_buf_pa);
2046 if (!rss_key_buf_va)
2047 return -ENOMEM;
2048
2049 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
2050
2051 spin_lock(&enic->devcmd_lock);
2052 err = enic_set_rss_key(enic,
2053 rss_key_buf_pa,
2054 sizeof(union vnic_rss_key));
2055 spin_unlock(&enic->devcmd_lock);
2056
2057 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
2058 rss_key_buf_va, rss_key_buf_pa);
2059
2060 return err;
2061}
2062
2063static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
2064{
2065 u64 rss_cpu_buf_pa;
2066 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
2067 unsigned int i;
2068 int err;
2069
2070 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
2071 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
2072 if (!rss_cpu_buf_va)
2073 return -ENOMEM;
2074
2075 for (i = 0; i < (1 << rss_hash_bits); i++)
2076 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
2077
2078 spin_lock(&enic->devcmd_lock);
2079 err = enic_set_rss_cpu(enic,
2080 rss_cpu_buf_pa,
2081 sizeof(union vnic_rss_cpu));
2082 spin_unlock(&enic->devcmd_lock);
2083
2084 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
2085 rss_cpu_buf_va, rss_cpu_buf_pa);
2086
2087 return err;
2088}
2089
2090static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
2091 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 2092{
68f71708
SF
2093 const u8 tso_ipid_split_en = 0;
2094 const u8 ig_vlan_strip_en = 1;
383ab92f 2095 int err;
68f71708 2096
717258ba
VK
2097 /* Enable VLAN tag stripping.
2098 */
68f71708 2099
383ab92f
VK
2100 spin_lock(&enic->devcmd_lock);
2101 err = enic_set_nic_cfg(enic,
68f71708
SF
2102 rss_default_cpu, rss_hash_type,
2103 rss_hash_bits, rss_base_cpu,
2104 rss_enable, tso_ipid_split_en,
2105 ig_vlan_strip_en);
383ab92f
VK
2106 spin_unlock(&enic->devcmd_lock);
2107
2108 return err;
2109}
2110
717258ba
VK
2111static int enic_set_rss_nic_cfg(struct enic *enic)
2112{
2113 struct device *dev = enic_get_dev(enic);
2114 const u8 rss_default_cpu = 0;
2115 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
2116 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
2117 NIC_CFG_RSS_HASH_TYPE_IPV6 |
2118 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
2119 const u8 rss_hash_bits = 7;
2120 const u8 rss_base_cpu = 0;
2121 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
2122
2123 if (rss_enable) {
2124 if (!enic_set_rsskey(enic)) {
2125 if (enic_set_rsscpu(enic, rss_hash_bits)) {
2126 rss_enable = 0;
2127 dev_warn(dev, "RSS disabled, "
2128 "Failed to set RSS cpu indirection table.");
2129 }
2130 } else {
2131 rss_enable = 0;
2132 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
2133 }
2134 }
2135
2136 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
2137 rss_hash_bits, rss_base_cpu, rss_enable);
2138}
2139
383ab92f
VK
2140static int enic_dev_hang_notify(struct enic *enic)
2141{
2142 int err;
2143
2144 spin_lock(&enic->devcmd_lock);
2145 err = vnic_dev_hang_notify(enic->vdev);
2146 spin_unlock(&enic->devcmd_lock);
2147
2148 return err;
68f71708
SF
2149}
2150
2fdba388 2151static int enic_dev_set_ig_vlan_rewrite_mode(struct enic *enic)
f8cac14a
VK
2152{
2153 int err;
2154
2155 spin_lock(&enic->devcmd_lock);
2156 err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
2157 IG_VLAN_REWRITE_MODE_PRIORITY_TAG_DEFAULT_VLAN);
2158 spin_unlock(&enic->devcmd_lock);
2159
2160 return err;
2161}
2162
01f2e4ea
SF
2163static void enic_reset(struct work_struct *work)
2164{
2165 struct enic *enic = container_of(work, struct enic, reset);
2166
2167 if (!netif_running(enic->netdev))
2168 return;
2169
2170 rtnl_lock();
2171
383ab92f 2172 enic_dev_hang_notify(enic);
01f2e4ea 2173 enic_stop(enic->netdev);
99ef5639
VK
2174 enic_dev_hang_reset(enic);
2175 enic_reset_multicast_list(enic);
01f2e4ea 2176 enic_init_vnic_resources(enic);
717258ba 2177 enic_set_rss_nic_cfg(enic);
f8cac14a 2178 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF
2179 enic_open(enic->netdev);
2180
2181 rtnl_unlock();
2182}
2183
2184static int enic_set_intr_mode(struct enic *enic)
2185{
717258ba 2186 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
6ba9cdc0 2187 unsigned int m = 1;
01f2e4ea
SF
2188 unsigned int i;
2189
2190 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2191 * on system capabilities.
01f2e4ea
SF
2192 *
2193 * Try MSI-X first
2194 *
2195 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2196 * (the second to last INTR is used for WQ/RQ errors)
2197 * (the last INTR is used for notifications)
2198 */
2199
2200 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2201 for (i = 0; i < n + m + 2; i++)
2202 enic->msix_entry[i].entry = i;
2203
717258ba
VK
2204 /* Use multiple RQs if RSS is enabled
2205 */
2206
2207 if (ENIC_SETTING(enic, RSS) &&
2208 enic->config.intr_mode < 1 &&
01f2e4ea
SF
2209 enic->rq_count >= n &&
2210 enic->wq_count >= m &&
2211 enic->cq_count >= n + m &&
717258ba 2212 enic->intr_count >= n + m + 2) {
01f2e4ea 2213
717258ba 2214 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2215
717258ba
VK
2216 enic->rq_count = n;
2217 enic->wq_count = m;
2218 enic->cq_count = n + m;
2219 enic->intr_count = n + m + 2;
01f2e4ea 2220
717258ba
VK
2221 vnic_dev_set_intr_mode(enic->vdev,
2222 VNIC_DEV_INTR_MODE_MSIX);
2223
2224 return 0;
2225 }
2226 }
2227
2228 if (enic->config.intr_mode < 1 &&
2229 enic->rq_count >= 1 &&
2230 enic->wq_count >= m &&
2231 enic->cq_count >= 1 + m &&
2232 enic->intr_count >= 1 + m + 2) {
2233 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2234
2235 enic->rq_count = 1;
2236 enic->wq_count = m;
2237 enic->cq_count = 1 + m;
2238 enic->intr_count = 1 + m + 2;
2239
2240 vnic_dev_set_intr_mode(enic->vdev,
2241 VNIC_DEV_INTR_MODE_MSIX);
2242
2243 return 0;
2244 }
01f2e4ea
SF
2245 }
2246
2247 /* Next try MSI
2248 *
2249 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2250 */
2251
2252 if (enic->config.intr_mode < 2 &&
2253 enic->rq_count >= 1 &&
2254 enic->wq_count >= 1 &&
2255 enic->cq_count >= 2 &&
2256 enic->intr_count >= 1 &&
2257 !pci_enable_msi(enic->pdev)) {
2258
2259 enic->rq_count = 1;
2260 enic->wq_count = 1;
2261 enic->cq_count = 2;
2262 enic->intr_count = 1;
2263
2264 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2265
2266 return 0;
2267 }
2268
2269 /* Next try INTx
2270 *
2271 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2272 * (the first INTR is used for WQ/RQ)
2273 * (the second INTR is used for WQ/RQ errors)
2274 * (the last INTR is used for notifications)
2275 */
2276
2277 if (enic->config.intr_mode < 3 &&
2278 enic->rq_count >= 1 &&
2279 enic->wq_count >= 1 &&
2280 enic->cq_count >= 2 &&
2281 enic->intr_count >= 3) {
2282
2283 enic->rq_count = 1;
2284 enic->wq_count = 1;
2285 enic->cq_count = 2;
2286 enic->intr_count = 3;
2287
2288 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2289
2290 return 0;
2291 }
2292
2293 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2294
2295 return -EINVAL;
2296}
2297
2298static void enic_clear_intr_mode(struct enic *enic)
2299{
2300 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2301 case VNIC_DEV_INTR_MODE_MSIX:
2302 pci_disable_msix(enic->pdev);
2303 break;
2304 case VNIC_DEV_INTR_MODE_MSI:
2305 pci_disable_msi(enic->pdev);
2306 break;
2307 default:
2308 break;
2309 }
2310
2311 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2312}
2313
f8bd9091
SF
2314static const struct net_device_ops enic_netdev_dynamic_ops = {
2315 .ndo_open = enic_open,
2316 .ndo_stop = enic_stop,
2317 .ndo_start_xmit = enic_hard_start_xmit,
2318 .ndo_get_stats = enic_get_stats,
2319 .ndo_validate_addr = eth_validate_addr,
2320 .ndo_set_multicast_list = enic_set_multicast_list,
2321 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2322 .ndo_change_mtu = enic_change_mtu,
2323 .ndo_vlan_rx_register = enic_vlan_rx_register,
2324 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2325 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2326 .ndo_tx_timeout = enic_tx_timeout,
2327 .ndo_set_vf_port = enic_set_vf_port,
2328 .ndo_get_vf_port = enic_get_vf_port,
2329#ifdef CONFIG_NET_POLL_CONTROLLER
2330 .ndo_poll_controller = enic_poll_controller,
2331#endif
2332};
2333
afe29f7a
SH
2334static const struct net_device_ops enic_netdev_ops = {
2335 .ndo_open = enic_open,
2336 .ndo_stop = enic_stop,
00829823 2337 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH
2338 .ndo_get_stats = enic_get_stats,
2339 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2340 .ndo_set_mac_address = enic_set_mac_address,
383ab92f 2341 .ndo_set_multicast_list = enic_set_multicast_list,
afe29f7a
SH
2342 .ndo_change_mtu = enic_change_mtu,
2343 .ndo_vlan_rx_register = enic_vlan_rx_register,
2344 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2345 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2346 .ndo_tx_timeout = enic_tx_timeout,
2347#ifdef CONFIG_NET_POLL_CONTROLLER
2348 .ndo_poll_controller = enic_poll_controller,
2349#endif
2350};
2351
2fdba388 2352static void enic_dev_deinit(struct enic *enic)
6fdfa970 2353{
717258ba
VK
2354 unsigned int i;
2355
2356 for (i = 0; i < enic->rq_count; i++)
2357 netif_napi_del(&enic->napi[i]);
2358
6fdfa970
SF
2359 enic_free_vnic_resources(enic);
2360 enic_clear_intr_mode(enic);
2361}
2362
2fdba388 2363static int enic_dev_init(struct enic *enic)
6fdfa970 2364{
a7a79deb 2365 struct device *dev = enic_get_dev(enic);
6fdfa970 2366 struct net_device *netdev = enic->netdev;
717258ba 2367 unsigned int i;
6fdfa970
SF
2368 int err;
2369
2370 /* Get vNIC configuration
2371 */
2372
2373 err = enic_get_vnic_config(enic);
2374 if (err) {
a7a79deb 2375 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF
2376 return err;
2377 }
2378
2379 /* Get available resource counts
2380 */
2381
2382 enic_get_res_counts(enic);
2383
2384 /* Set interrupt mode based on resource counts and system
2385 * capabilities
2386 */
2387
2388 err = enic_set_intr_mode(enic);
2389 if (err) {
a7a79deb
VK
2390 dev_err(dev, "Failed to set intr mode based on resource "
2391 "counts and system capabilities, aborting\n");
6fdfa970
SF
2392 return err;
2393 }
2394
2395 /* Allocate and configure vNIC resources
2396 */
2397
2398 err = enic_alloc_vnic_resources(enic);
2399 if (err) {
a7a79deb 2400 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF
2401 goto err_out_free_vnic_resources;
2402 }
2403
2404 enic_init_vnic_resources(enic);
2405
2406 err = enic_set_rq_alloc_buf(enic);
2407 if (err) {
a7a79deb 2408 dev_err(dev, "Failed to set RQ buffer allocator, aborting\n");
6fdfa970
SF
2409 goto err_out_free_vnic_resources;
2410 }
2411
717258ba 2412 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2413 if (err) {
a7a79deb 2414 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF
2415 goto err_out_free_vnic_resources;
2416 }
2417
f8cac14a
VK
2418 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2419 if (err) {
a7a79deb 2420 netdev_err(netdev,
f8cac14a
VK
2421 "Failed to set ingress vlan rewrite mode, aborting.\n");
2422 goto err_out_free_vnic_resources;
2423 }
2424
6fdfa970
SF
2425 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2426 default:
717258ba 2427 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF
2428 break;
2429 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK
2430 for (i = 0; i < enic->rq_count; i++)
2431 netif_napi_add(netdev, &enic->napi[i],
2432 enic_poll_msix, 64);
6fdfa970
SF
2433 break;
2434 }
2435
2436 return 0;
2437
2438err_out_free_vnic_resources:
2439 enic_clear_intr_mode(enic);
2440 enic_free_vnic_resources(enic);
2441
2442 return err;
2443}
2444
27e6c7d3
SF
2445static void enic_iounmap(struct enic *enic)
2446{
2447 unsigned int i;
2448
2449 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2450 if (enic->bar[i].vaddr)
2451 iounmap(enic->bar[i].vaddr);
2452}
2453
01f2e4ea
SF
2454static int __devinit enic_probe(struct pci_dev *pdev,
2455 const struct pci_device_id *ent)
2456{
a7a79deb 2457 struct device *dev = &pdev->dev;
01f2e4ea
SF
2458 struct net_device *netdev;
2459 struct enic *enic;
2460 int using_dac = 0;
2461 unsigned int i;
2462 int err;
2463
01f2e4ea
SF
2464 /* Allocate net device structure and initialize. Private
2465 * instance data is initialized to zero.
2466 */
2467
2468 netdev = alloc_etherdev(sizeof(struct enic));
2469 if (!netdev) {
a7a79deb 2470 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF
2471 return -ENOMEM;
2472 }
2473
01f2e4ea
SF
2474 pci_set_drvdata(pdev, netdev);
2475
2476 SET_NETDEV_DEV(netdev, &pdev->dev);
2477
2478 enic = netdev_priv(netdev);
2479 enic->netdev = netdev;
2480 enic->pdev = pdev;
2481
2482 /* Setup PCI resources
2483 */
2484
29046f9b 2485 err = pci_enable_device_mem(pdev);
01f2e4ea 2486 if (err) {
a7a79deb 2487 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF
2488 goto err_out_free_netdev;
2489 }
2490
2491 err = pci_request_regions(pdev, DRV_NAME);
2492 if (err) {
a7a79deb 2493 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF
2494 goto err_out_disable_device;
2495 }
2496
2497 pci_set_master(pdev);
2498
2499 /* Query PCI controller on system for DMA addressing
2500 * limitation for the device. Try 40-bit first, and
2501 * fail to 32-bit.
2502 */
2503
50cf156a 2504 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2505 if (err) {
284901a9 2506 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2507 if (err) {
a7a79deb 2508 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF
2509 goto err_out_release_regions;
2510 }
284901a9 2511 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2512 if (err) {
a7a79deb
VK
2513 dev_err(dev, "Unable to obtain %u-bit DMA "
2514 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF
2515 goto err_out_release_regions;
2516 }
2517 } else {
50cf156a 2518 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2519 if (err) {
a7a79deb
VK
2520 dev_err(dev, "Unable to obtain %u-bit DMA "
2521 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF
2522 goto err_out_release_regions;
2523 }
2524 using_dac = 1;
2525 }
2526
27e6c7d3 2527 /* Map vNIC resources from BAR0-5
01f2e4ea
SF
2528 */
2529
27e6c7d3
SF
2530 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2531 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2532 continue;
2533 enic->bar[i].len = pci_resource_len(pdev, i);
2534 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2535 if (!enic->bar[i].vaddr) {
a7a79deb 2536 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF
2537 err = -ENODEV;
2538 goto err_out_iounmap;
2539 }
2540 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF
2541 }
2542
2543 /* Register vNIC device
2544 */
2545
27e6c7d3
SF
2546 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2547 ARRAY_SIZE(enic->bar));
01f2e4ea 2548 if (!enic->vdev) {
a7a79deb 2549 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF
2550 err = -ENODEV;
2551 goto err_out_iounmap;
2552 }
2553
2554 /* Issue device open to get device in known state
2555 */
2556
2557 err = enic_dev_open(enic);
2558 if (err) {
a7a79deb 2559 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF
2560 goto err_out_vnic_unregister;
2561 }
2562
2563 /* Issue device init to initialize the vnic-to-switch link.
2564 * We'll start with carrier off and wait for link UP
2565 * notification later to turn on carrier. We don't need
2566 * to wait here for the vnic-to-switch link initialization
2567 * to complete; link UP notification is the indication that
2568 * the process is complete.
2569 */
2570
2571 netif_carrier_off(netdev);
2572
a7a79deb
VK
2573 /* Do not call dev_init for a dynamic vnic.
2574 * For a dynamic vnic, init_prov_info will be
2575 * called later by an upper layer.
2576 */
2577
f8bd9091
SF
2578 if (!enic_is_dynamic(enic)) {
2579 err = vnic_dev_init(enic->vdev, 0);
2580 if (err) {
a7a79deb 2581 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF
2582 goto err_out_dev_close;
2583 }
01f2e4ea
SF
2584 }
2585
383ab92f
VK
2586 /* Setup devcmd lock
2587 */
2588
2589 spin_lock_init(&enic->devcmd_lock);
2590
6fdfa970 2591 err = enic_dev_init(enic);
01f2e4ea 2592 if (err) {
a7a79deb 2593 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF
2594 goto err_out_dev_close;
2595 }
2596
383ab92f 2597 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF
2598 */
2599
2600 init_timer(&enic->notify_timer);
2601 enic->notify_timer.function = enic_notify_timer;
2602 enic->notify_timer.data = (unsigned long)enic;
2603
2604 INIT_WORK(&enic->reset, enic_reset);
2605
2606 for (i = 0; i < enic->wq_count; i++)
2607 spin_lock_init(&enic->wq_lock[i]);
2608
01f2e4ea
SF
2609 /* Register net device
2610 */
2611
2612 enic->port_mtu = enic->config.mtu;
2613 (void)enic_change_mtu(netdev, enic->port_mtu);
2614
2615 err = enic_set_mac_addr(netdev, enic->mac_addr);
2616 if (err) {
a7a79deb 2617 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2618 goto err_out_dev_deinit;
01f2e4ea
SF
2619 }
2620
7c844599
SF
2621 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2622 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2623
f8bd9091
SF
2624 if (enic_is_dynamic(enic))
2625 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2626 else
2627 netdev->netdev_ops = &enic_netdev_ops;
2628
01f2e4ea
SF
2629 netdev->watchdog_timeo = 2 * HZ;
2630 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2631
73c1ea9b 2632 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK
2633 if (ENIC_SETTING(enic, LOOP)) {
2634 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2635 enic->loop_enable = 1;
2636 enic->loop_tag = enic->config.loop_tag;
2637 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2638 }
01f2e4ea
SF
2639 if (ENIC_SETTING(enic, TXCSUM))
2640 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
2641 if (ENIC_SETTING(enic, TSO))
2642 netdev->features |= NETIF_F_TSO |
2643 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7 2644 if (ENIC_SETTING(enic, LRO))
88132f55 2645 netdev->features |= NETIF_F_GRO;
01f2e4ea
SF
2646 if (using_dac)
2647 netdev->features |= NETIF_F_HIGHDMA;
2648
01f2e4ea
SF
2649 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
2650
01f2e4ea
SF
2651 err = register_netdev(netdev);
2652 if (err) {
a7a79deb 2653 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2654 goto err_out_dev_deinit;
01f2e4ea
SF
2655 }
2656
2657 return 0;
2658
6fdfa970
SF
2659err_out_dev_deinit:
2660 enic_dev_deinit(enic);
01f2e4ea
SF
2661err_out_dev_close:
2662 vnic_dev_close(enic->vdev);
2663err_out_vnic_unregister:
01f2e4ea
SF
2664 vnic_dev_unregister(enic->vdev);
2665err_out_iounmap:
2666 enic_iounmap(enic);
2667err_out_release_regions:
2668 pci_release_regions(pdev);
2669err_out_disable_device:
2670 pci_disable_device(pdev);
2671err_out_free_netdev:
2672 pci_set_drvdata(pdev, NULL);
2673 free_netdev(netdev);
2674
2675 return err;
2676}
2677
2678static void __devexit enic_remove(struct pci_dev *pdev)
2679{
2680 struct net_device *netdev = pci_get_drvdata(pdev);
2681
2682 if (netdev) {
2683 struct enic *enic = netdev_priv(netdev);
2684
2685 flush_scheduled_work();
2686 unregister_netdev(netdev);
6fdfa970 2687 enic_dev_deinit(enic);
01f2e4ea 2688 vnic_dev_close(enic->vdev);
01f2e4ea
SF
2689 vnic_dev_unregister(enic->vdev);
2690 enic_iounmap(enic);
2691 pci_release_regions(pdev);
2692 pci_disable_device(pdev);
2693 pci_set_drvdata(pdev, NULL);
2694 free_netdev(netdev);
2695 }
2696}
2697
2698static struct pci_driver enic_driver = {
2699 .name = DRV_NAME,
2700 .id_table = enic_id_table,
2701 .probe = enic_probe,
2702 .remove = __devexit_p(enic_remove),
2703};
2704
2705static int __init enic_init_module(void)
2706{
a7a79deb 2707 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF
2708
2709 return pci_register_driver(&enic_driver);
2710}
2711
2712static void __exit enic_cleanup_module(void)
2713{
2714 pci_unregister_driver(&enic_driver);
2715}
2716
2717module_init(enic_init_module);
2718module_exit(enic_cleanup_module);
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