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enic: Get/Set interrupt resource index for transmit and receive queues
[deliverable/linux.git] / drivers / net / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
31#include <linux/if_ether.h>
32#include <linux/if_vlan.h>
33#include <linux/ethtool.h>
34#include <linux/in.h>
35#include <linux/ip.h>
36#include <linux/ipv6.h>
37#include <linux/tcp.h>
29046f9b 38#include <linux/rtnetlink.h>
70c71606 39#include <linux/prefetch.h>
b7c6bfb7 40#include <net/ip6_checksum.h>
01f2e4ea
SF		 41
42#include "cq_enet_desc.h"
43#include "vnic_dev.h"
44#include "vnic_intr.h"
45#include "vnic_stats.h"
f8bd9091 46#include "vnic_vic.h"
01f2e4ea
SF		 47#include "enic_res.h"
48#include "enic.h"
51987461 49#include "enic_dev.h"
b3abfbd2 50#include "enic_pp.h"
01f2e4ea
SF		 51
52#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 53#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
54#define MAX_TSO (1 << 16)
55#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
56
57#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 58#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 59
60/* Supported devices */
a3aa1884 61static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 62 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 63 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 64 { 0, } /* end of table */
65};
66
67MODULE_DESCRIPTION(DRV_DESCRIPTION);
68MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
69MODULE_LICENSE("GPL");
70MODULE_VERSION(DRV_VERSION);
71MODULE_DEVICE_TABLE(pci, enic_id_table);
72
73struct enic_stat {
74 char name[ETH_GSTRING_LEN];
75 unsigned int offset;
76};
77
78#define ENIC_TX_STAT(stat) \
79 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
80#define ENIC_RX_STAT(stat) \
81 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
82
83static const struct enic_stat enic_tx_stats[] = {
84 ENIC_TX_STAT(tx_frames_ok),
85 ENIC_TX_STAT(tx_unicast_frames_ok),
86 ENIC_TX_STAT(tx_multicast_frames_ok),
87 ENIC_TX_STAT(tx_broadcast_frames_ok),
88 ENIC_TX_STAT(tx_bytes_ok),
89 ENIC_TX_STAT(tx_unicast_bytes_ok),
90 ENIC_TX_STAT(tx_multicast_bytes_ok),
91 ENIC_TX_STAT(tx_broadcast_bytes_ok),
92 ENIC_TX_STAT(tx_drops),
93 ENIC_TX_STAT(tx_errors),
94 ENIC_TX_STAT(tx_tso),
95};
96
97static const struct enic_stat enic_rx_stats[] = {
98 ENIC_RX_STAT(rx_frames_ok),
99 ENIC_RX_STAT(rx_frames_total),
100 ENIC_RX_STAT(rx_unicast_frames_ok),
101 ENIC_RX_STAT(rx_multicast_frames_ok),
102 ENIC_RX_STAT(rx_broadcast_frames_ok),
103 ENIC_RX_STAT(rx_bytes_ok),
104 ENIC_RX_STAT(rx_unicast_bytes_ok),
105 ENIC_RX_STAT(rx_multicast_bytes_ok),
106 ENIC_RX_STAT(rx_broadcast_bytes_ok),
107 ENIC_RX_STAT(rx_drop),
108 ENIC_RX_STAT(rx_no_bufs),
109 ENIC_RX_STAT(rx_errors),
110 ENIC_RX_STAT(rx_rss),
111 ENIC_RX_STAT(rx_crc_errors),
112 ENIC_RX_STAT(rx_frames_64),
113 ENIC_RX_STAT(rx_frames_127),
114 ENIC_RX_STAT(rx_frames_255),
115 ENIC_RX_STAT(rx_frames_511),
116 ENIC_RX_STAT(rx_frames_1023),
117 ENIC_RX_STAT(rx_frames_1518),
118 ENIC_RX_STAT(rx_frames_to_max),
119};
120
121static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
122static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
123
f8bd9091
SF		 124static int enic_is_dynamic(struct enic *enic)
125{
126 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
127}
128
717258ba
VK		 129static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
130{
131 return rq;
132}
133
134static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
135{
136 return enic->rq_count + wq;
137}
138
139static inline unsigned int enic_legacy_io_intr(void)
140{
141 return 0;
142}
143
144static inline unsigned int enic_legacy_err_intr(void)
145{
146 return 1;
147}
148
149static inline unsigned int enic_legacy_notify_intr(void)
150{
151 return 2;
152}
153
154static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
155{
7d260ec2 156 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 157}
158
159static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
160{
7d260ec2 161 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 162}
163
164static inline unsigned int enic_msix_err_intr(struct enic *enic)
165{
166 return enic->rq_count + enic->wq_count;
167}
168
169static inline unsigned int enic_msix_notify_intr(struct enic *enic)
170{
171 return enic->rq_count + enic->wq_count + 1;
172}
173
01f2e4ea
SF		 174static int enic_get_settings(struct net_device *netdev,
175 struct ethtool_cmd *ecmd)
176{
177 struct enic *enic = netdev_priv(netdev);
178
179 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
180 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
181 ecmd->port = PORT_FIBRE;
182 ecmd->transceiver = XCVR_EXTERNAL;
183
184 if (netif_carrier_ok(netdev)) {
70739497 185 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 186 ecmd->duplex = DUPLEX_FULL;
187 } else {
70739497 188 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 189 ecmd->duplex = -1;
190 }
191
192 ecmd->autoneg = AUTONEG_DISABLE;
193
194 return 0;
195}
196
197static void enic_get_drvinfo(struct net_device *netdev,
198 struct ethtool_drvinfo *drvinfo)
199{
200 struct enic *enic = netdev_priv(netdev);
201 struct vnic_devcmd_fw_info *fw_info;
202
383ab92f 203 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 204
205 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
206 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
207 strncpy(drvinfo->fw_version, fw_info->fw_version,
208 sizeof(drvinfo->fw_version));
209 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
210 sizeof(drvinfo->bus_info));
211}
212
213static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
214{
215 unsigned int i;
216
217 switch (stringset) {
218 case ETH_SS_STATS:
219 for (i = 0; i < enic_n_tx_stats; i++) {
220 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
221 data += ETH_GSTRING_LEN;
222 }
223 for (i = 0; i < enic_n_rx_stats; i++) {
224 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
225 data += ETH_GSTRING_LEN;
226 }
227 break;
228 }
229}
230
25f0a061 231static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 232{
25f0a061
SF		 233 switch (sset) {
234 case ETH_SS_STATS:
235 return enic_n_tx_stats + enic_n_rx_stats;
236 default:
237 return -EOPNOTSUPP;
238 }
01f2e4ea
SF		 239}
240
241static void enic_get_ethtool_stats(struct net_device *netdev,
242 struct ethtool_stats *stats, u64 *data)
243{
244 struct enic *enic = netdev_priv(netdev);
245 struct vnic_stats *vstats;
246 unsigned int i;
247
383ab92f 248 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 249
250 for (i = 0; i < enic_n_tx_stats; i++)
251 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
252 for (i = 0; i < enic_n_rx_stats; i++)
253 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
254}
255
01f2e4ea
SF		 256static u32 enic_get_msglevel(struct net_device *netdev)
257{
258 struct enic *enic = netdev_priv(netdev);
259 return enic->msg_enable;
260}
261
262static void enic_set_msglevel(struct net_device *netdev, u32 value)
263{
264 struct enic *enic = netdev_priv(netdev);
265 enic->msg_enable = value;
266}
267
7c844599
SF		 268static int enic_get_coalesce(struct net_device *netdev,
269 struct ethtool_coalesce *ecmd)
270{
271 struct enic *enic = netdev_priv(netdev);
272
273 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
274 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
275
276 return 0;
277}
278
279static int enic_set_coalesce(struct net_device *netdev,
280 struct ethtool_coalesce *ecmd)
281{
282 struct enic *enic = netdev_priv(netdev);
283 u32 tx_coalesce_usecs;
284 u32 rx_coalesce_usecs;
717258ba 285 unsigned int i, intr;
7c844599
SF		 286
287 tx_coalesce_usecs = min_t(u32,
288 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
289 ecmd->tx_coalesce_usecs);
290 rx_coalesce_usecs = min_t(u32,
291 INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX),
292 ecmd->rx_coalesce_usecs);
293
294 switch (vnic_dev_get_intr_mode(enic->vdev)) {
295 case VNIC_DEV_INTR_MODE_INTX:
296 if (tx_coalesce_usecs != rx_coalesce_usecs)
297 return -EINVAL;
298
717258ba
VK		 299 intr = enic_legacy_io_intr();
300 vnic_intr_coalescing_timer_set(&enic->intr[intr],
7c844599
SF		 301 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
302 break;
303 case VNIC_DEV_INTR_MODE_MSI:
304 if (tx_coalesce_usecs != rx_coalesce_usecs)
305 return -EINVAL;
306
307 vnic_intr_coalescing_timer_set(&enic->intr[0],
308 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
309 break;
310 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 311 for (i = 0; i < enic->wq_count; i++) {
312 intr = enic_msix_wq_intr(enic, i);
313 vnic_intr_coalescing_timer_set(&enic->intr[intr],
314 INTR_COALESCE_USEC_TO_HW(tx_coalesce_usecs));
315 }
316
317 for (i = 0; i < enic->rq_count; i++) {
318 intr = enic_msix_rq_intr(enic, i);
319 vnic_intr_coalescing_timer_set(&enic->intr[intr],
320 INTR_COALESCE_USEC_TO_HW(rx_coalesce_usecs));
321 }
322
7c844599
SF		 323 break;
324 default:
325 break;
326 }
327
328 enic->tx_coalesce_usecs = tx_coalesce_usecs;
329 enic->rx_coalesce_usecs = rx_coalesce_usecs;
330
331 return 0;
332}
333
0fc0b732 334static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 335 .get_settings = enic_get_settings,
336 .get_drvinfo = enic_get_drvinfo,
337 .get_msglevel = enic_get_msglevel,
338 .set_msglevel = enic_set_msglevel,
339 .get_link = ethtool_op_get_link,
340 .get_strings = enic_get_strings,
25f0a061 341 .get_sset_count = enic_get_sset_count,
01f2e4ea 342 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 343 .get_coalesce = enic_get_coalesce,
344 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 345};
346
347static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
348{
349 struct enic *enic = vnic_dev_priv(wq->vdev);
350
351 if (buf->sop)
352 pci_unmap_single(enic->pdev, buf->dma_addr,
353 buf->len, PCI_DMA_TODEVICE);
354 else
355 pci_unmap_page(enic->pdev, buf->dma_addr,
356 buf->len, PCI_DMA_TODEVICE);
357
358 if (buf->os_buf)
359 dev_kfree_skb_any(buf->os_buf);
360}
361
362static void enic_wq_free_buf(struct vnic_wq *wq,
363 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
364{
365 enic_free_wq_buf(wq, buf);
366}
367
368static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
369 u8 type, u16 q_number, u16 completed_index, void *opaque)
370{
371 struct enic *enic = vnic_dev_priv(vdev);
372
373 spin_lock(&enic->wq_lock[q_number]);
374
375 vnic_wq_service(&enic->wq[q_number], cq_desc,
376 completed_index, enic_wq_free_buf,
377 opaque);
378
379 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 380 vnic_wq_desc_avail(&enic->wq[q_number]) >=
381 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 382 netif_wake_queue(enic->netdev);
383
384 spin_unlock(&enic->wq_lock[q_number]);
385
386 return 0;
387}
388
389static void enic_log_q_error(struct enic *enic)
390{
391 unsigned int i;
392 u32 error_status;
393
394 for (i = 0; i < enic->wq_count; i++) {
395 error_status = vnic_wq_error_status(&enic->wq[i]);
396 if (error_status)
a7a79deb
VK		 397 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
398 i, error_status);
01f2e4ea
SF		 399 }
400
401 for (i = 0; i < enic->rq_count; i++) {
402 error_status = vnic_rq_error_status(&enic->rq[i]);
403 if (error_status)
a7a79deb
VK		 404 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
405 i, error_status);
01f2e4ea
SF		 406 }
407}
408
383ab92f 409static void enic_msglvl_check(struct enic *enic)
01f2e4ea 410{
383ab92f 411 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 412
383ab92f 413 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 414 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
415 enic->msg_enable, msg_enable);
383ab92f 416 enic->msg_enable = msg_enable;
01f2e4ea
SF		 417 }
418}
419
420static void enic_mtu_check(struct enic *enic)
421{
422 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 423 struct net_device *netdev = enic->netdev;
01f2e4ea 424
491598a4 425 if (mtu && mtu != enic->port_mtu) {
7c844599 426 enic->port_mtu = mtu;
c97c894d
RP		 427 if (enic_is_dynamic(enic)) {
428 mtu = max_t(int, ENIC_MIN_MTU,
429 min_t(int, ENIC_MAX_MTU, mtu));
430 if (mtu != netdev->mtu)
431 schedule_work(&enic->change_mtu_work);
432 } else {
433 if (mtu < netdev->mtu)
434 netdev_warn(netdev,
435 "interface MTU (%d) set higher "
436 "than switch port MTU (%d)\n",
437 netdev->mtu, mtu);
438 }
01f2e4ea
SF		 439 }
440}
441
383ab92f 442static void enic_link_check(struct enic *enic)
01f2e4ea 443{
383ab92f
VK		 444 int link_status = vnic_dev_link_status(enic->vdev);
445 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 446
383ab92f 447 if (link_status && !carrier_ok) {
a7a79deb 448 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 449 netif_carrier_on(enic->netdev);
450 } else if (!link_status && carrier_ok) {
a7a79deb 451 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 452 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 453 }
454}
455
456static void enic_notify_check(struct enic *enic)
457{
458 enic_msglvl_check(enic);
459 enic_mtu_check(enic);
460 enic_link_check(enic);
461}
462
463#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
464
465static irqreturn_t enic_isr_legacy(int irq, void *data)
466{
467 struct net_device *netdev = data;
468 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 469 unsigned int io_intr = enic_legacy_io_intr();
470 unsigned int err_intr = enic_legacy_err_intr();
471 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 472 u32 pba;
473
717258ba 474 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 475
476 pba = vnic_intr_legacy_pba(enic->legacy_pba);
477 if (!pba) {
717258ba 478 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 479 return IRQ_NONE; /* not our interrupt */
480 }
481
717258ba
VK		 482 if (ENIC_TEST_INTR(pba, notify_intr)) {
483 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 484 enic_notify_check(enic);
ed8af6b2 485 }
01f2e4ea 486
717258ba
VK		 487 if (ENIC_TEST_INTR(pba, err_intr)) {
488 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 489 enic_log_q_error(enic);
490 /* schedule recovery from WQ/RQ error */
491 schedule_work(&enic->reset);
492 return IRQ_HANDLED;
493 }
494
717258ba
VK		 495 if (ENIC_TEST_INTR(pba, io_intr)) {
496 if (napi_schedule_prep(&enic->napi[0]))
497 __napi_schedule(&enic->napi[0]);
01f2e4ea 498 } else {
717258ba 499 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 500 }
501
502 return IRQ_HANDLED;
503}
504
505static irqreturn_t enic_isr_msi(int irq, void *data)
506{
507 struct enic *enic = data;
508
509 /* With MSI, there is no sharing of interrupts, so this is
510 * our interrupt and there is no need to ack it. The device
511 * is not providing per-vector masking, so the OS will not
512 * write to PCI config space to mask/unmask the interrupt.
513 * We're using mask_on_assertion for MSI, so the device
514 * automatically masks the interrupt when the interrupt is
515 * generated. Later, when exiting polling, the interrupt
516 * will be unmasked (see enic_poll).
517 *
518 * Also, the device uses the same PCIe Traffic Class (TC)
519 * for Memory Write data and MSI, so there are no ordering
520 * issues; the MSI will always arrive at the Root Complex
521 * _after_ corresponding Memory Writes (i.e. descriptor
522 * writes).
523 */
524
717258ba 525 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 526
527 return IRQ_HANDLED;
528}
529
530static irqreturn_t enic_isr_msix_rq(int irq, void *data)
531{
717258ba 532 struct napi_struct *napi = data;
01f2e4ea
SF		 533
534 /* schedule NAPI polling for RQ cleanup */
717258ba 535 napi_schedule(napi);
01f2e4ea
SF		 536
537 return IRQ_HANDLED;
538}
539
540static irqreturn_t enic_isr_msix_wq(int irq, void *data)
541{
542 struct enic *enic = data;
717258ba
VK		 543 unsigned int cq = enic_cq_wq(enic, 0);
544 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 545 unsigned int wq_work_to_do = -1; /* no limit */
546 unsigned int wq_work_done;
547
717258ba 548 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 549 wq_work_to_do, enic_wq_service, NULL);
550
717258ba 551 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 552 wq_work_done,
553 1 /* unmask intr */,
554 1 /* reset intr timer */);
555
556 return IRQ_HANDLED;
557}
558
559static irqreturn_t enic_isr_msix_err(int irq, void *data)
560{
561 struct enic *enic = data;
717258ba 562 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 563
717258ba 564 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 565
01f2e4ea
SF		 566 enic_log_q_error(enic);
567
568 /* schedule recovery from WQ/RQ error */
569 schedule_work(&enic->reset);
570
571 return IRQ_HANDLED;
572}
573
574static irqreturn_t enic_isr_msix_notify(int irq, void *data)
575{
576 struct enic *enic = data;
717258ba 577 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 578
717258ba 579 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 580 enic_notify_check(enic);
01f2e4ea
SF		 581
582 return IRQ_HANDLED;
583}
584
585static inline void enic_queue_wq_skb_cont(struct enic *enic,
586 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 587 unsigned int len_left, int loopback)
01f2e4ea
SF		 588{
589 skb_frag_t *frag;
590
591 /* Queue additional data fragments */
592 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
593 len_left -= frag->size;
594 enic_queue_wq_desc_cont(wq, skb,
595 pci_map_page(enic->pdev, frag->page,
596 frag->page_offset, frag->size,
597 PCI_DMA_TODEVICE),
598 frag->size,
1825aca6
VK		 599 (len_left == 0), /* EOP? */
600 loopback);
01f2e4ea
SF		 601 }
602}
603
604static inline void enic_queue_wq_skb_vlan(struct enic *enic,
605 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 606 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 607{
608 unsigned int head_len = skb_headlen(skb);
609 unsigned int len_left = skb->len - head_len;
610 int eop = (len_left == 0);
611
ea0d7d91
SF		 612 /* Queue the main skb fragment. The fragments are no larger
613 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
614 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
615 * per fragment is queued.
616 */
01f2e4ea
SF		 617 enic_queue_wq_desc(wq, skb,
618 pci_map_single(enic->pdev, skb->data,
619 head_len, PCI_DMA_TODEVICE),
620 head_len,
621 vlan_tag_insert, vlan_tag,
1825aca6 622 eop, loopback);
01f2e4ea
SF		 623
624 if (!eop)
1825aca6 625 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 626}
627
628static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
629 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 630 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 631{
632 unsigned int head_len = skb_headlen(skb);
633 unsigned int len_left = skb->len - head_len;
0d0b1672 634 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 635 unsigned int csum_offset = hdr_len + skb->csum_offset;
636 int eop = (len_left == 0);
637
ea0d7d91
SF		 638 /* Queue the main skb fragment. The fragments are no larger
639 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
640 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
641 * per fragment is queued.
642 */
01f2e4ea
SF		 643 enic_queue_wq_desc_csum_l4(wq, skb,
644 pci_map_single(enic->pdev, skb->data,
645 head_len, PCI_DMA_TODEVICE),
646 head_len,
647 csum_offset,
648 hdr_len,
649 vlan_tag_insert, vlan_tag,
1825aca6 650 eop, loopback);
01f2e4ea
SF		 651
652 if (!eop)
1825aca6 653 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 654}
655
656static inline void enic_queue_wq_skb_tso(struct enic *enic,
657 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 658 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 659{
ea0d7d91
SF		 660 unsigned int frag_len_left = skb_headlen(skb);
661 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 662 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
663 int eop = (len_left == 0);
ea0d7d91
SF		 664 unsigned int len;
665 dma_addr_t dma_addr;
666 unsigned int offset = 0;
667 skb_frag_t *frag;
01f2e4ea
SF		 668
669 /* Preload TCP csum field with IP pseudo hdr calculated
670 * with IP length set to zero. HW will later add in length
671 * to each TCP segment resulting from the TSO.
672 */
673
09640e63 674 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 675 ip_hdr(skb)->check = 0;
676 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
677 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 678 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 679 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
680 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
681 }
682
ea0d7d91
SF		 683 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
684 * for the main skb fragment
685 */
686 while (frag_len_left) {
687 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
688 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
689 len, PCI_DMA_TODEVICE);
690 enic_queue_wq_desc_tso(wq, skb,
691 dma_addr,
692 len,
693 mss, hdr_len,
694 vlan_tag_insert, vlan_tag,
1825aca6 695 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 696 frag_len_left -= len;
697 offset += len;
698 }
01f2e4ea 699
ea0d7d91
SF		 700 if (eop)
701 return;
702
703 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
704 * for additional data fragments
705 */
706 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
707 len_left -= frag->size;
708 frag_len_left = frag->size;
709 offset = frag->page_offset;
710
711 while (frag_len_left) {
712 len = min(frag_len_left,
713 (unsigned int)WQ_ENET_MAX_DESC_LEN);
714 dma_addr = pci_map_page(enic->pdev, frag->page,
715 offset, len,
716 PCI_DMA_TODEVICE);
717 enic_queue_wq_desc_cont(wq, skb,
718 dma_addr,
719 len,
720 (len_left == 0) &&
1825aca6
VK		 721 (len == frag_len_left), /* EOP? */
722 loopback);
ea0d7d91
SF		 723 frag_len_left -= len;
724 offset += len;
725 }
726 }
01f2e4ea
SF		 727}
728
729static inline void enic_queue_wq_skb(struct enic *enic,
730 struct vnic_wq *wq, struct sk_buff *skb)
731{
732 unsigned int mss = skb_shinfo(skb)->gso_size;
733 unsigned int vlan_tag = 0;
734 int vlan_tag_insert = 0;
1825aca6 735 int loopback = 0;
01f2e4ea 736
eab6d18d 737 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 738 /* VLAN tag from trunking driver */
739 vlan_tag_insert = 1;
740 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 741 } else if (enic->loop_enable) {
742 vlan_tag = enic->loop_tag;
743 loopback = 1;
01f2e4ea
SF		 744 }
745
746 if (mss)
747 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 748 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 749 else if (skb->ip_summed == CHECKSUM_PARTIAL)
750 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 751 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 752 else
753 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 754 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 755}
756
ed8af6b2 757/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 758static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 759 struct net_device *netdev)
01f2e4ea
SF		 760{
761 struct enic *enic = netdev_priv(netdev);
762 struct vnic_wq *wq = &enic->wq[0];
763 unsigned long flags;
764
765 if (skb->len <= 0) {
766 dev_kfree_skb(skb);
767 return NETDEV_TX_OK;
768 }
769
770 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
771 * which is very likely. In the off chance it's going to take
772 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
773 */
774
775 if (skb_shinfo(skb)->gso_size == 0 &&
776 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
777 skb_linearize(skb)) {
778 dev_kfree_skb(skb);
779 return NETDEV_TX_OK;
780 }
781
782 spin_lock_irqsave(&enic->wq_lock[0], flags);
783
ea0d7d91
SF		 784 if (vnic_wq_desc_avail(wq) <
785 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 786 netif_stop_queue(netdev);
787 /* This is a hard error, log it */
a7a79deb 788 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 789 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
790 return NETDEV_TX_BUSY;
791 }
792
793 enic_queue_wq_skb(enic, wq, skb);
794
ea0d7d91 795 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 796 netif_stop_queue(netdev);
797
01f2e4ea
SF		 798 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
799
800 return NETDEV_TX_OK;
801}
802
803/* dev_base_lock rwlock held, nominally process context */
f20530bc 804static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
805 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 806{
807 struct enic *enic = netdev_priv(netdev);
808 struct vnic_stats *stats;
809
383ab92f 810 enic_dev_stats_dump(enic, &stats);
01f2e4ea 811
25f0a061
SF		 812 net_stats->tx_packets = stats->tx.tx_frames_ok;
813 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
814 net_stats->tx_errors = stats->tx.tx_errors;
815 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 816
25f0a061
SF		 817 net_stats->rx_packets = stats->rx.rx_frames_ok;
818 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
819 net_stats->rx_errors = stats->rx.rx_errors;
820 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 821 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 822 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 823 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 824
25f0a061 825 return net_stats;
01f2e4ea
SF		 826}
827
b3abfbd2 828void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 829{
830 enic->mc_count = 0;
e0afe53f 831 enic->uc_count = 0;
99ef5639 832 enic->flags = 0;
01f2e4ea
SF		 833}
834
835static int enic_set_mac_addr(struct net_device *netdev, char *addr)
836{
f8bd9091
SF		 837 struct enic *enic = netdev_priv(netdev);
838
839 if (enic_is_dynamic(enic)) {
840 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
841 return -EADDRNOTAVAIL;
842 } else {
843 if (!is_valid_ether_addr(addr))
844 return -EADDRNOTAVAIL;
845 }
01f2e4ea
SF		 846
847 memcpy(netdev->dev_addr, addr, netdev->addr_len);
848
849 return 0;
850}
851
f8bd9091
SF		 852static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
853{
854 struct enic *enic = netdev_priv(netdev);
855 struct sockaddr *saddr = p;
856 char *addr = saddr->sa_data;
857 int err;
858
859 if (netif_running(enic->netdev)) {
860 err = enic_dev_del_station_addr(enic);
861 if (err)
862 return err;
863 }
864
865 err = enic_set_mac_addr(netdev, addr);
866 if (err)
867 return err;
868
869 if (netif_running(enic->netdev)) {
870 err = enic_dev_add_station_addr(enic);
871 if (err)
872 return err;
873 }
874
875 return err;
876}
877
878static int enic_set_mac_address(struct net_device *netdev, void *p)
879{
294dab25 880 struct sockaddr *saddr = p;
c76fd32d
VK		 881 char *addr = saddr->sa_data;
882 struct enic *enic = netdev_priv(netdev);
883 int err;
884
885 err = enic_dev_del_station_addr(enic);
886 if (err)
887 return err;
888
889 err = enic_set_mac_addr(netdev, addr);
890 if (err)
891 return err;
294dab25 892
c76fd32d 893 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 894}
895
e0afe53f 896static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 897{
319d7e84 898 struct net_device *netdev = enic->netdev;
22bedad3 899 struct netdev_hw_addr *ha;
4cd24eaf 900 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 901 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 902 unsigned int i, j;
903
319d7e84
RP		 904 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
905 netdev_warn(netdev, "Registering only %d out of %d "
906 "multicast addresses\n",
907 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 908 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 909 }
01f2e4ea
SF		 910
911 /* Is there an easier way? Trying to minimize to
912 * calls to add/del multicast addrs. We keep the
913 * addrs from the last call in enic->mc_addr and
914 * look for changes to add/del.
915 */
916
48e2f183 917 i = 0;
22bedad3 918 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 919 if (i == mc_count)
920 break;
22bedad3 921 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 922 }
923
924 for (i = 0; i < enic->mc_count; i++) {
925 for (j = 0; j < mc_count; j++)
926 if (compare_ether_addr(enic->mc_addr[i],
927 mc_addr[j]) == 0)
928 break;
929 if (j == mc_count)
319d7e84 930 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 931 }
932
933 for (i = 0; i < mc_count; i++) {
934 for (j = 0; j < enic->mc_count; j++)
935 if (compare_ether_addr(mc_addr[i],
936 enic->mc_addr[j]) == 0)
937 break;
938 if (j == enic->mc_count)
319d7e84 939 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 940 }
941
942 /* Save the list to compare against next time
943 */
944
945 for (i = 0; i < mc_count; i++)
946 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
947
948 enic->mc_count = mc_count;
01f2e4ea
SF		 949}
950
e0afe53f 951static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 952{
953 struct net_device *netdev = enic->netdev;
954 struct netdev_hw_addr *ha;
955 unsigned int uc_count = netdev_uc_count(netdev);
956 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
957 unsigned int i, j;
958
959 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
960 netdev_warn(netdev, "Registering only %d out of %d "
961 "unicast addresses\n",
962 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
963 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
964 }
965
966 /* Is there an easier way? Trying to minimize to
967 * calls to add/del unicast addrs. We keep the
968 * addrs from the last call in enic->uc_addr and
969 * look for changes to add/del.
970 */
971
972 i = 0;
973 netdev_for_each_uc_addr(ha, netdev) {
974 if (i == uc_count)
975 break;
976 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
977 }
978
979 for (i = 0; i < enic->uc_count; i++) {
980 for (j = 0; j < uc_count; j++)
981 if (compare_ether_addr(enic->uc_addr[i],
982 uc_addr[j]) == 0)
983 break;
984 if (j == uc_count)
985 enic_dev_del_addr(enic, enic->uc_addr[i]);
986 }
987
988 for (i = 0; i < uc_count; i++) {
989 for (j = 0; j < enic->uc_count; j++)
990 if (compare_ether_addr(uc_addr[i],
991 enic->uc_addr[j]) == 0)
992 break;
993 if (j == enic->uc_count)
994 enic_dev_add_addr(enic, uc_addr[i]);
995 }
996
997 /* Save the list to compare against next time
998 */
999
1000 for (i = 0; i < uc_count; i++)
1001 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1002
1003 enic->uc_count = uc_count;
1004}
1005
1006/* netif_tx_lock held, BHs disabled */
1007static void enic_set_rx_mode(struct net_device *netdev)
1008{
1009 struct enic *enic = netdev_priv(netdev);
1010 int directed = 1;
1011 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1012 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1013 int promisc = (netdev->flags & IFF_PROMISC) ||
1014 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1015 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1016 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1017 unsigned int flags = netdev->flags |
1018 (allmulti ? IFF_ALLMULTI : 0) |
1019 (promisc ? IFF_PROMISC : 0);
1020
1021 if (enic->flags != flags) {
1022 enic->flags = flags;
1023 enic_dev_packet_filter(enic, directed,
1024 multicast, broadcast, promisc, allmulti);
1025 }
1026
1027 if (!promisc) {
e0afe53f 1028 enic_update_unicast_addr_list(enic);
319d7e84 1029 if (!allmulti)
e0afe53f 1030 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1031 }
1032}
1033
01f2e4ea
SF		 1034/* rtnl lock is held */
1035static void enic_vlan_rx_register(struct net_device *netdev,
1036 struct vlan_group *vlan_group)
1037{
1038 struct enic *enic = netdev_priv(netdev);
1039 enic->vlan_group = vlan_group;
1040}
1041
01f2e4ea
SF		 1042/* netif_tx_lock held, BHs disabled */
1043static void enic_tx_timeout(struct net_device *netdev)
1044{
1045 struct enic *enic = netdev_priv(netdev);
1046 schedule_work(&enic->reset);
1047}
1048
0b1c00fc
RP		 1049static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1050{
1051 struct enic *enic = netdev_priv(netdev);
1052
1053 if (vf != PORT_SELF_VF)
1054 return -EOPNOTSUPP;
1055
1056 /* Ignore the vf argument for now. We can assume the request
1057 * is coming on a vf.
1058 */
1059 if (is_valid_ether_addr(mac)) {
1060 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1061 return 0;
1062 } else
1063 return -EINVAL;
1064}
1065
f8bd9091
SF		 1066static int enic_set_vf_port(struct net_device *netdev, int vf,
1067 struct nlattr *port[])
1068{
1069 struct enic *enic = netdev_priv(netdev);
b3abfbd2
RP		 1070 struct enic_port_profile prev_pp;
1071 int err = 0, restore_pp = 1;
08f382eb 1072
b3abfbd2
RP		 1073 /* don't support VFs, yet */
1074 if (vf != PORT_SELF_VF)
1075 return -EOPNOTSUPP;
08f382eb 1076
b3abfbd2
RP		 1077 if (!port[IFLA_PORT_REQUEST])
1078 return -EOPNOTSUPP;
1079
1080 memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
1081 memset(&enic->pp, 0, sizeof(enic->pp));
1082
1083 enic->pp.set |= ENIC_SET_REQUEST;
1084 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1085
1086 if (port[IFLA_PORT_PROFILE]) {
b3abfbd2
RP		 1087 enic->pp.set |= ENIC_SET_NAME;
1088 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1089 PORT_PROFILE_MAX);
1090 }
1091
1092 if (port[IFLA_PORT_INSTANCE_UUID]) {
b3abfbd2
RP		 1093 enic->pp.set |= ENIC_SET_INSTANCE;
1094 memcpy(enic->pp.instance_uuid,
08f382eb
SF		 1095 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1096 }
1097
1098 if (port[IFLA_PORT_HOST_UUID]) {
b3abfbd2
RP		 1099 enic->pp.set |= ENIC_SET_HOST;
1100 memcpy(enic->pp.host_uuid,
08f382eb
SF		 1101 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1102 }
f8bd9091 1103
b3abfbd2
RP		 1104 /* Special case handling: mac came from IFLA_VF_MAC */
1105 if (!is_zero_ether_addr(prev_pp.vf_mac))
1106 memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d
SF		 1107
1108 if (is_zero_ether_addr(netdev->dev_addr))
1109 random_ether_addr(netdev->dev_addr);
f8bd9091 1110
b3abfbd2
RP		 1111 err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
1112 if (err) {
1113 if (restore_pp) {
1114 /* Things are still the way they were: Implicit
1115 * DISASSOCIATE failed
1116 */
1117 memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
1118 } else {
1119 memset(&enic->pp, 0, sizeof(enic->pp));
1120 memset(netdev->dev_addr, 0, ETH_ALEN);
1121 }
1122 } else {
1123 /* Set flag to indicate that the port assoc/disassoc
1124 * request has been sent out to fw
1125 */
1126 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1127
1128 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1129 if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1130 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1131 memset(netdev->dev_addr, 0, ETH_ALEN);
1132 }
1133 }
29639059 1134
29639059
RP		 1135 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1136
29639059 1137 return err;
f8bd9091
SF		 1138}
1139
1140static int enic_get_vf_port(struct net_device *netdev, int vf,
1141 struct sk_buff *skb)
1142{
1143 struct enic *enic = netdev_priv(netdev);
f8bd9091 1144 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
b3abfbd2 1145 int err;
f8bd9091 1146
4dce2396 1147 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1148 return -ENODATA;
f8bd9091 1149
b3abfbd2 1150 err = enic_process_get_pp_request(enic, enic->pp.request, &response);
f8bd9091 1151 if (err)
b3abfbd2 1152 return err;
f8bd9091
SF		 1153
1154 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1155 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1156 if (enic->pp.set & ENIC_SET_NAME)
1157 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1158 enic->pp.name);
1159 if (enic->pp.set & ENIC_SET_INSTANCE)
1160 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1161 enic->pp.instance_uuid);
1162 if (enic->pp.set & ENIC_SET_HOST)
1163 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1164 enic->pp.host_uuid);
f8bd9091
SF		 1165
1166 return 0;
1167
1168nla_put_failure:
1169 return -EMSGSIZE;
1170}
1171
01f2e4ea
SF		 1172static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1173{
1174 struct enic *enic = vnic_dev_priv(rq->vdev);
1175
1176 if (!buf->os_buf)
1177 return;
1178
1179 pci_unmap_single(enic->pdev, buf->dma_addr,
1180 buf->len, PCI_DMA_FROMDEVICE);
1181 dev_kfree_skb_any(buf->os_buf);
1182}
1183
01f2e4ea
SF		 1184static int enic_rq_alloc_buf(struct vnic_rq *rq)
1185{
1186 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1187 struct net_device *netdev = enic->netdev;
01f2e4ea 1188 struct sk_buff *skb;
1825aca6 1189 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1190 unsigned int os_buf_index = 0;
1191 dma_addr_t dma_addr;
1192
89d71a66 1193 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1194 if (!skb)
1195 return -ENOMEM;
1196
1197 dma_addr = pci_map_single(enic->pdev, skb->data,
1198 len, PCI_DMA_FROMDEVICE);
1199
1200 enic_queue_rq_desc(rq, skb, os_buf_index,
1201 dma_addr, len);
1202
1203 return 0;
1204}
1205
01f2e4ea
SF		 1206static void enic_rq_indicate_buf(struct vnic_rq *rq,
1207 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1208 int skipped, void *opaque)
1209{
1210 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1211 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1212 struct sk_buff *skb;
1213
1214 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1215 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1216 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1217 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1218 u8 packet_error;
f8cac14a 1219 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1220 u32 rss_hash;
1221
1222 if (skipped)
1223 return;
1224
1225 skb = buf->os_buf;
1226 prefetch(skb->data - NET_IP_ALIGN);
1227 pci_unmap_single(enic->pdev, buf->dma_addr,
1228 buf->len, PCI_DMA_FROMDEVICE);
1229
1230 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1231 &type, &color, &q_number, &completed_index,
1232 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1233 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1234 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1235 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1236 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1237 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1238 &fcs_ok);
1239
1240 if (packet_error) {
1241
350991e1
SF		 1242 if (!fcs_ok) {
1243 if (bytes_written > 0)
1244 enic->rq_bad_fcs++;
1245 else if (bytes_written == 0)
1246 enic->rq_truncated_pkts++;
1247 }
01f2e4ea
SF		 1248
1249 dev_kfree_skb_any(skb);
1250
1251 return;
1252 }
1253
1254 if (eop && bytes_written > 0) {
1255
1256 /* Good receive
1257 */
1258
1259 skb_put(skb, bytes_written);
86ca9db7 1260 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1261
5ec8f9b8 1262 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1263 skb->csum = htons(checksum);
1264 skb->ip_summed = CHECKSUM_COMPLETE;
1265 }
1266
86ca9db7 1267 skb->dev = netdev;
01f2e4ea 1268
8757446d 1269 if (vlan_stripped) {
01f2e4ea 1270
88132f55 1271 if (netdev->features & NETIF_F_GRO)
717258ba
VK		 1272 vlan_gro_receive(&enic->napi[q_number],
1273 enic->vlan_group, vlan_tci, skb);
01f2e4ea
SF		 1274 else
1275 vlan_hwaccel_receive_skb(skb,
f8cac14a 1276 enic->vlan_group, vlan_tci);
01f2e4ea
SF		 1277
1278 } else {
1279
88132f55 1280 if (netdev->features & NETIF_F_GRO)
717258ba 1281 napi_gro_receive(&enic->napi[q_number], skb);
01f2e4ea
SF		 1282 else
1283 netif_receive_skb(skb);
1284
1285 }
01f2e4ea
SF		 1286 } else {
1287
1288 /* Buffer overflow
1289 */
1290
1291 dev_kfree_skb_any(skb);
1292 }
1293}
1294
1295static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1296 u8 type, u16 q_number, u16 completed_index, void *opaque)
1297{
1298 struct enic *enic = vnic_dev_priv(vdev);
1299
1300 vnic_rq_service(&enic->rq[q_number], cq_desc,
1301 completed_index, VNIC_RQ_RETURN_DESC,
1302 enic_rq_indicate_buf, opaque);
1303
1304 return 0;
1305}
1306
01f2e4ea
SF		 1307static int enic_poll(struct napi_struct *napi, int budget)
1308{
717258ba
VK		 1309 struct net_device *netdev = napi->dev;
1310 struct enic *enic = netdev_priv(netdev);
1311 unsigned int cq_rq = enic_cq_rq(enic, 0);
1312 unsigned int cq_wq = enic_cq_wq(enic, 0);
1313 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1314 unsigned int rq_work_to_do = budget;
1315 unsigned int wq_work_to_do = -1; /* no limit */
1316 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1317 int err;
01f2e4ea
SF		 1318
1319 /* Service RQ (first) and WQ
1320 */
1321
717258ba 1322 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1323 rq_work_to_do, enic_rq_service, NULL);
1324
717258ba 1325 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1326 wq_work_to_do, enic_wq_service, NULL);
1327
1328 /* Accumulate intr event credits for this polling
1329 * cycle. An intr event is the completion of a
1330 * a WQ or RQ packet.
1331 */
1332
1333 work_done = rq_work_done + wq_work_done;
1334
1335 if (work_done > 0)
717258ba 1336 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1337 work_done,
1338 0 /* don't unmask intr */,
1339 0 /* don't reset intr timer */);
1340
0eb26022 1341 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1342
2d6ddced
SF		 1343 /* Buffer allocation failed. Stay in polling
1344 * mode so we can try to fill the ring again.
1345 */
01f2e4ea 1346
2d6ddced
SF		 1347 if (err)
1348 rq_work_done = rq_work_to_do;
01f2e4ea 1349
2d6ddced 1350 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1351
2d6ddced 1352 /* Some work done, but not enough to stay in polling,
88132f55 1353 * exit polling
01f2e4ea
SF		 1354 */
1355
288379f0 1356 napi_complete(napi);
717258ba 1357 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1358 }
1359
1360 return rq_work_done;
1361}
1362
1363static int enic_poll_msix(struct napi_struct *napi, int budget)
1364{
717258ba
VK		 1365 struct net_device *netdev = napi->dev;
1366 struct enic *enic = netdev_priv(netdev);
1367 unsigned int rq = (napi - &enic->napi[0]);
1368 unsigned int cq = enic_cq_rq(enic, rq);
1369 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1370 unsigned int work_to_do = budget;
1371 unsigned int work_done;
2d6ddced 1372 int err;
01f2e4ea
SF		 1373
1374 /* Service RQ
1375 */
1376
717258ba 1377 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1378 work_to_do, enic_rq_service, NULL);
1379
2d6ddced
SF		 1380 /* Return intr event credits for this polling
1381 * cycle. An intr event is the completion of a
1382 * RQ packet.
1383 */
01f2e4ea 1384
2d6ddced 1385 if (work_done > 0)
717258ba 1386 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1387 work_done,
1388 0 /* don't unmask intr */,
1389 0 /* don't reset intr timer */);
01f2e4ea 1390
0eb26022 1391 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1392
1393 /* Buffer allocation failed. Stay in polling mode
1394 * so we can try to fill the ring again.
1395 */
1396
1397 if (err)
1398 work_done = work_to_do;
1399
1400 if (work_done < work_to_do) {
1401
1402 /* Some work done, but not enough to stay in polling,
88132f55 1403 * exit polling
01f2e4ea
SF		 1404 */
1405
288379f0 1406 napi_complete(napi);
717258ba 1407 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1408 }
1409
1410 return work_done;
1411}
1412
1413static void enic_notify_timer(unsigned long data)
1414{
1415 struct enic *enic = (struct enic *)data;
1416
1417 enic_notify_check(enic);
1418
25f0a061
SF		 1419 mod_timer(&enic->notify_timer,
1420 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1421}
1422
1423static void enic_free_intr(struct enic *enic)
1424{
1425 struct net_device *netdev = enic->netdev;
1426 unsigned int i;
1427
1428 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1429 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1430 free_irq(enic->pdev->irq, netdev);
1431 break;
8f4d248c
SF		 1432 case VNIC_DEV_INTR_MODE_MSI:
1433 free_irq(enic->pdev->irq, enic);
1434 break;
01f2e4ea
SF		 1435 case VNIC_DEV_INTR_MODE_MSIX:
1436 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1437 if (enic->msix[i].requested)
1438 free_irq(enic->msix_entry[i].vector,
1439 enic->msix[i].devid);
1440 break;
1441 default:
1442 break;
1443 }
1444}
1445
1446static int enic_request_intr(struct enic *enic)
1447{
1448 struct net_device *netdev = enic->netdev;
717258ba 1449 unsigned int i, intr;
01f2e4ea
SF		 1450 int err = 0;
1451
1452 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1453
1454 case VNIC_DEV_INTR_MODE_INTX:
1455
1456 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1457 IRQF_SHARED, netdev->name, netdev);
1458 break;
1459
1460 case VNIC_DEV_INTR_MODE_MSI:
1461
1462 err = request_irq(enic->pdev->irq, enic_isr_msi,
1463 0, netdev->name, enic);
1464 break;
1465
1466 case VNIC_DEV_INTR_MODE_MSIX:
1467
717258ba
VK		 1468 for (i = 0; i < enic->rq_count; i++) {
1469 intr = enic_msix_rq_intr(enic, i);
1470 sprintf(enic->msix[intr].devname,
1471 "%.11s-rx-%d", netdev->name, i);
1472 enic->msix[intr].isr = enic_isr_msix_rq;
1473 enic->msix[intr].devid = &enic->napi[i];
1474 }
01f2e4ea 1475
717258ba
VK		 1476 for (i = 0; i < enic->wq_count; i++) {
1477 intr = enic_msix_wq_intr(enic, i);
1478 sprintf(enic->msix[intr].devname,
1479 "%.11s-tx-%d", netdev->name, i);
1480 enic->msix[intr].isr = enic_isr_msix_wq;
1481 enic->msix[intr].devid = enic;
1482 }
01f2e4ea 1483
717258ba
VK		 1484 intr = enic_msix_err_intr(enic);
1485 sprintf(enic->msix[intr].devname,
01f2e4ea 1486 "%.11s-err", netdev->name);
717258ba
VK		 1487 enic->msix[intr].isr = enic_isr_msix_err;
1488 enic->msix[intr].devid = enic;
01f2e4ea 1489
717258ba
VK		 1490 intr = enic_msix_notify_intr(enic);
1491 sprintf(enic->msix[intr].devname,
01f2e4ea 1492 "%.11s-notify", netdev->name);
717258ba
VK		 1493 enic->msix[intr].isr = enic_isr_msix_notify;
1494 enic->msix[intr].devid = enic;
1495
1496 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1497 enic->msix[i].requested = 0;
01f2e4ea 1498
717258ba 1499 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1500 err = request_irq(enic->msix_entry[i].vector,
1501 enic->msix[i].isr, 0,
1502 enic->msix[i].devname,
1503 enic->msix[i].devid);
1504 if (err) {
1505 enic_free_intr(enic);
1506 break;
1507 }
1508 enic->msix[i].requested = 1;
1509 }
1510
1511 break;
1512
1513 default:
1514 break;
1515 }
1516
1517 return err;
1518}
1519
b3d18d19
SF		 1520static void enic_synchronize_irqs(struct enic *enic)
1521{
1522 unsigned int i;
1523
1524 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1525 case VNIC_DEV_INTR_MODE_INTX:
1526 case VNIC_DEV_INTR_MODE_MSI:
1527 synchronize_irq(enic->pdev->irq);
1528 break;
1529 case VNIC_DEV_INTR_MODE_MSIX:
1530 for (i = 0; i < enic->intr_count; i++)
1531 synchronize_irq(enic->msix_entry[i].vector);
1532 break;
1533 default:
1534 break;
1535 }
1536}
1537
383ab92f 1538static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1539{
1540 int err;
1541
56ac88b3 1542 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1543 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1544 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1545 err = vnic_dev_notify_set(enic->vdev,
1546 enic_legacy_notify_intr());
01f2e4ea
SF		 1547 break;
1548 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1549 err = vnic_dev_notify_set(enic->vdev,
1550 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1551 break;
1552 default:
1553 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1554 break;
1555 }
56ac88b3 1556 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1557
1558 return err;
1559}
1560
1561static void enic_notify_timer_start(struct enic *enic)
1562{
1563 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1564 case VNIC_DEV_INTR_MODE_MSI:
1565 mod_timer(&enic->notify_timer, jiffies);
1566 break;
1567 default:
1568 /* Using intr for notification for INTx/MSI-X */
1569 break;
6403eab1 1570 }
01f2e4ea
SF		 1571}
1572
1573/* rtnl lock is held, process context */
1574static int enic_open(struct net_device *netdev)
1575{
1576 struct enic *enic = netdev_priv(netdev);
1577 unsigned int i;
1578 int err;
1579
4b75a442
SF		 1580 err = enic_request_intr(enic);
1581 if (err) {
a7a79deb 1582 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1583 return err;
1584 }
1585
383ab92f 1586 err = enic_dev_notify_set(enic);
4b75a442 1587 if (err) {
a7a79deb
VK		 1588 netdev_err(netdev,
1589 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1590 goto err_out_free_intr;
1591 }
1592
01f2e4ea 1593 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1594 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1595 /* Need at least one buffer on ring to get going */
1596 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1597 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1598 err = -ENOMEM;
4b75a442 1599 goto err_out_notify_unset;
01f2e4ea
SF		 1600 }
1601 }
1602
1603 for (i = 0; i < enic->wq_count; i++)
1604 vnic_wq_enable(&enic->wq[i]);
1605 for (i = 0; i < enic->rq_count; i++)
1606 vnic_rq_enable(&enic->rq[i]);
1607
29639059
RP		 1608 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1609 enic_dev_add_addr(enic, enic->pp.mac_addr);
1610 else
1611 enic_dev_add_station_addr(enic);
319d7e84 1612 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1613
1614 netif_wake_queue(netdev);
717258ba
VK		 1615
1616 for (i = 0; i < enic->rq_count; i++)
1617 napi_enable(&enic->napi[i]);
1618
383ab92f 1619 enic_dev_enable(enic);
01f2e4ea
SF		 1620
1621 for (i = 0; i < enic->intr_count; i++)
1622 vnic_intr_unmask(&enic->intr[i]);
1623
1624 enic_notify_timer_start(enic);
1625
1626 return 0;
4b75a442
SF		 1627
1628err_out_notify_unset:
383ab92f 1629 enic_dev_notify_unset(enic);
4b75a442
SF		 1630err_out_free_intr:
1631 enic_free_intr(enic);
1632
1633 return err;
01f2e4ea
SF		 1634}
1635
1636/* rtnl lock is held, process context */
1637static int enic_stop(struct net_device *netdev)
1638{
1639 struct enic *enic = netdev_priv(netdev);
1640 unsigned int i;
1641 int err;
1642
29046f9b 1643 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1644 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1645 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1646 }
b3d18d19
SF		 1647
1648 enic_synchronize_irqs(enic);
1649
01f2e4ea
SF		 1650 del_timer_sync(&enic->notify_timer);
1651
383ab92f 1652 enic_dev_disable(enic);
717258ba
VK		 1653
1654 for (i = 0; i < enic->rq_count; i++)
1655 napi_disable(&enic->napi[i]);
1656
b3d18d19
SF		 1657 netif_carrier_off(netdev);
1658 netif_tx_disable(netdev);
29639059
RP		 1659 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1660 enic_dev_del_addr(enic, enic->pp.mac_addr);
1661 else
1662 enic_dev_del_station_addr(enic);
f8bd9091 1663
01f2e4ea
SF		 1664 for (i = 0; i < enic->wq_count; i++) {
1665 err = vnic_wq_disable(&enic->wq[i]);
1666 if (err)
1667 return err;
1668 }
1669 for (i = 0; i < enic->rq_count; i++) {
1670 err = vnic_rq_disable(&enic->rq[i]);
1671 if (err)
1672 return err;
1673 }
1674
383ab92f 1675 enic_dev_notify_unset(enic);
4b75a442
SF		 1676 enic_free_intr(enic);
1677
01f2e4ea
SF		 1678 for (i = 0; i < enic->wq_count; i++)
1679 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1680 for (i = 0; i < enic->rq_count; i++)
1681 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1682 for (i = 0; i < enic->cq_count; i++)
1683 vnic_cq_clean(&enic->cq[i]);
1684 for (i = 0; i < enic->intr_count; i++)
1685 vnic_intr_clean(&enic->intr[i]);
1686
1687 return 0;
1688}
1689
1690static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1691{
1692 struct enic *enic = netdev_priv(netdev);
1693 int running = netif_running(netdev);
1694
25f0a061
SF		 1695 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1696 return -EINVAL;
1697
c97c894d
RP		 1698 if (enic_is_dynamic(enic))
1699 return -EOPNOTSUPP;
1700
01f2e4ea
SF		 1701 if (running)
1702 enic_stop(netdev);
1703
01f2e4ea
SF		 1704 netdev->mtu = new_mtu;
1705
1706 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1707 netdev_warn(netdev,
1708 "interface MTU (%d) set higher than port MTU (%d)\n",
1709 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1710
1711 if (running)
1712 enic_open(netdev);
1713
1714 return 0;
1715}
1716
c97c894d
RP		 1717static void enic_change_mtu_work(struct work_struct *work)
1718{
1719 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1720 struct net_device *netdev = enic->netdev;
1721 int new_mtu = vnic_dev_mtu(enic->vdev);
1722 int err;
1723 unsigned int i;
1724
1725 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1726
1727 rtnl_lock();
1728
1729 /* Stop RQ */
1730 del_timer_sync(&enic->notify_timer);
1731
1732 for (i = 0; i < enic->rq_count; i++)
1733 napi_disable(&enic->napi[i]);
1734
1735 vnic_intr_mask(&enic->intr[0]);
1736 enic_synchronize_irqs(enic);
1737 err = vnic_rq_disable(&enic->rq[0]);
1738 if (err) {
1739 netdev_err(netdev, "Unable to disable RQ.\n");
1740 return;
1741 }
1742 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1743 vnic_cq_clean(&enic->cq[0]);
1744 vnic_intr_clean(&enic->intr[0]);
1745
1746 /* Fill RQ with new_mtu-sized buffers */
1747 netdev->mtu = new_mtu;
1748 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1749 /* Need at least one buffer on ring to get going */
1750 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1751 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1752 return;
1753 }
1754
1755 /* Start RQ */
1756 vnic_rq_enable(&enic->rq[0]);
1757 napi_enable(&enic->napi[0]);
1758 vnic_intr_unmask(&enic->intr[0]);
1759 enic_notify_timer_start(enic);
1760
1761 rtnl_unlock();
1762
1763 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1764}
1765
01f2e4ea
SF		 1766#ifdef CONFIG_NET_POLL_CONTROLLER
1767static void enic_poll_controller(struct net_device *netdev)
1768{
1769 struct enic *enic = netdev_priv(netdev);
1770 struct vnic_dev *vdev = enic->vdev;
717258ba 1771 unsigned int i, intr;
01f2e4ea
SF		 1772
1773 switch (vnic_dev_get_intr_mode(vdev)) {
1774 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1775 for (i = 0; i < enic->rq_count; i++) {
1776 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1777 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1778 &enic->napi[i]);
717258ba
VK		 1779 }
1780 intr = enic_msix_wq_intr(enic, i);
1781 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
01f2e4ea
SF		 1782 break;
1783 case VNIC_DEV_INTR_MODE_MSI:
1784 enic_isr_msi(enic->pdev->irq, enic);
1785 break;
1786 case VNIC_DEV_INTR_MODE_INTX:
1787 enic_isr_legacy(enic->pdev->irq, netdev);
1788 break;
1789 default:
1790 break;
1791 }
1792}
1793#endif
1794
1795static int enic_dev_wait(struct vnic_dev *vdev,
1796 int (*start)(struct vnic_dev *, int),
1797 int (*finished)(struct vnic_dev *, int *),
1798 int arg)
1799{
1800 unsigned long time;
1801 int done;
1802 int err;
1803
1804 BUG_ON(in_interrupt());
1805
1806 err = start(vdev, arg);
1807 if (err)
1808 return err;
1809
1810 /* Wait for func to complete...2 seconds max
1811 */
1812
1813 time = jiffies + (HZ * 2);
1814 do {
1815
1816 err = finished(vdev, &done);
1817 if (err)
1818 return err;
1819
1820 if (done)
1821 return 0;
1822
1823 schedule_timeout_uninterruptible(HZ / 10);
1824
1825 } while (time_after(time, jiffies));
1826
1827 return -ETIMEDOUT;
1828}
1829
1830static int enic_dev_open(struct enic *enic)
1831{
1832 int err;
1833
1834 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1835 vnic_dev_open_done, 0);
1836 if (err)
a7a79deb
VK		 1837 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1838 err);
01f2e4ea
SF		 1839
1840 return err;
1841}
1842
99ef5639 1843static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1844{
1845 int err;
1846
99ef5639
VK		 1847 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1848 vnic_dev_hang_reset_done, 0);
01f2e4ea 1849 if (err)
a7a79deb
VK		 1850 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1851 err);
01f2e4ea
SF		 1852
1853 return err;
1854}
1855
717258ba
VK		 1856static int enic_set_rsskey(struct enic *enic)
1857{
1f4f067f 1858 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1859 union vnic_rss_key *rss_key_buf_va = NULL;
1860 union vnic_rss_key rss_key = {
1861 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1862 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1863 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1864 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1865 };
1866 int err;
1867
1868 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1869 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1870 if (!rss_key_buf_va)
1871 return -ENOMEM;
1872
1873 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1874
1875 spin_lock(&enic->devcmd_lock);
1876 err = enic_set_rss_key(enic,
1877 rss_key_buf_pa,
1878 sizeof(union vnic_rss_key));
1879 spin_unlock(&enic->devcmd_lock);
1880
1881 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1882 rss_key_buf_va, rss_key_buf_pa);
1883
1884 return err;
1885}
1886
1887static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1888{
1f4f067f 1889 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1890 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1891 unsigned int i;
1892 int err;
1893
1894 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1895 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1896 if (!rss_cpu_buf_va)
1897 return -ENOMEM;
1898
1899 for (i = 0; i < (1 << rss_hash_bits); i++)
1900 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1901
1902 spin_lock(&enic->devcmd_lock);
1903 err = enic_set_rss_cpu(enic,
1904 rss_cpu_buf_pa,
1905 sizeof(union vnic_rss_cpu));
1906 spin_unlock(&enic->devcmd_lock);
1907
1908 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1909 rss_cpu_buf_va, rss_cpu_buf_pa);
1910
1911 return err;
1912}
1913
1914static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1915 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1916{
68f71708
SF		 1917 const u8 tso_ipid_split_en = 0;
1918 const u8 ig_vlan_strip_en = 1;
383ab92f 1919 int err;
68f71708 1920
717258ba
VK		 1921 /* Enable VLAN tag stripping.
1922 */
68f71708 1923
383ab92f
VK		 1924 spin_lock(&enic->devcmd_lock);
1925 err = enic_set_nic_cfg(enic,
68f71708
SF		 1926 rss_default_cpu, rss_hash_type,
1927 rss_hash_bits, rss_base_cpu,
1928 rss_enable, tso_ipid_split_en,
1929 ig_vlan_strip_en);
383ab92f
VK		 1930 spin_unlock(&enic->devcmd_lock);
1931
1932 return err;
1933}
1934
717258ba
VK		 1935static int enic_set_rss_nic_cfg(struct enic *enic)
1936{
1937 struct device *dev = enic_get_dev(enic);
1938 const u8 rss_default_cpu = 0;
1939 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1940 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1941 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1942 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1943 const u8 rss_hash_bits = 7;
1944 const u8 rss_base_cpu = 0;
1945 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1946
1947 if (rss_enable) {
1948 if (!enic_set_rsskey(enic)) {
1949 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1950 rss_enable = 0;
1951 dev_warn(dev, "RSS disabled, "
1952 "Failed to set RSS cpu indirection table.");
1953 }
1954 } else {
1955 rss_enable = 0;
1956 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1957 }
1958 }
1959
1960 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1961 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1962}
1963
01f2e4ea
SF		 1964static void enic_reset(struct work_struct *work)
1965{
1966 struct enic *enic = container_of(work, struct enic, reset);
1967
1968 if (!netif_running(enic->netdev))
1969 return;
1970
1971 rtnl_lock();
1972
383ab92f 1973 enic_dev_hang_notify(enic);
01f2e4ea 1974 enic_stop(enic->netdev);
99ef5639 1975 enic_dev_hang_reset(enic);
e0afe53f 1976 enic_reset_addr_lists(enic);
01f2e4ea 1977 enic_init_vnic_resources(enic);
717258ba 1978 enic_set_rss_nic_cfg(enic);
f8cac14a 1979 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1980 enic_open(enic->netdev);
1981
1982 rtnl_unlock();
1983}
1984
1985static int enic_set_intr_mode(struct enic *enic)
1986{
717258ba 1987 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1988 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1989 unsigned int i;
1990
1991 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1992 * on system capabilities.
01f2e4ea
SF		 1993 *
1994 * Try MSI-X first
1995 *
1996 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1997 * (the second to last INTR is used for WQ/RQ errors)
1998 * (the last INTR is used for notifications)
1999 */
2000
2001 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2002 for (i = 0; i < n + m + 2; i++)
2003 enic->msix_entry[i].entry = i;
2004
717258ba
VK		 2005 /* Use multiple RQs if RSS is enabled
2006 */
2007
2008 if (ENIC_SETTING(enic, RSS) &&
2009 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2010 enic->rq_count >= n &&
2011 enic->wq_count >= m &&
2012 enic->cq_count >= n + m &&
717258ba 2013 enic->intr_count >= n + m + 2) {
01f2e4ea 2014
717258ba 2015 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2016
717258ba
VK		 2017 enic->rq_count = n;
2018 enic->wq_count = m;
2019 enic->cq_count = n + m;
2020 enic->intr_count = n + m + 2;
01f2e4ea 2021
717258ba
VK		 2022 vnic_dev_set_intr_mode(enic->vdev,
2023 VNIC_DEV_INTR_MODE_MSIX);
2024
2025 return 0;
2026 }
2027 }
2028
2029 if (enic->config.intr_mode < 1 &&
2030 enic->rq_count >= 1 &&
2031 enic->wq_count >= m &&
2032 enic->cq_count >= 1 + m &&
2033 enic->intr_count >= 1 + m + 2) {
2034 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2035
2036 enic->rq_count = 1;
2037 enic->wq_count = m;
2038 enic->cq_count = 1 + m;
2039 enic->intr_count = 1 + m + 2;
2040
2041 vnic_dev_set_intr_mode(enic->vdev,
2042 VNIC_DEV_INTR_MODE_MSIX);
2043
2044 return 0;
2045 }
01f2e4ea
SF		 2046 }
2047
2048 /* Next try MSI
2049 *
2050 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2051 */
2052
2053 if (enic->config.intr_mode < 2 &&
2054 enic->rq_count >= 1 &&
2055 enic->wq_count >= 1 &&
2056 enic->cq_count >= 2 &&
2057 enic->intr_count >= 1 &&
2058 !pci_enable_msi(enic->pdev)) {
2059
2060 enic->rq_count = 1;
2061 enic->wq_count = 1;
2062 enic->cq_count = 2;
2063 enic->intr_count = 1;
2064
2065 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2066
2067 return 0;
2068 }
2069
2070 /* Next try INTx
2071 *
2072 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2073 * (the first INTR is used for WQ/RQ)
2074 * (the second INTR is used for WQ/RQ errors)
2075 * (the last INTR is used for notifications)
2076 */
2077
2078 if (enic->config.intr_mode < 3 &&
2079 enic->rq_count >= 1 &&
2080 enic->wq_count >= 1 &&
2081 enic->cq_count >= 2 &&
2082 enic->intr_count >= 3) {
2083
2084 enic->rq_count = 1;
2085 enic->wq_count = 1;
2086 enic->cq_count = 2;
2087 enic->intr_count = 3;
2088
2089 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2090
2091 return 0;
2092 }
2093
2094 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2095
2096 return -EINVAL;
2097}
2098
2099static void enic_clear_intr_mode(struct enic *enic)
2100{
2101 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2102 case VNIC_DEV_INTR_MODE_MSIX:
2103 pci_disable_msix(enic->pdev);
2104 break;
2105 case VNIC_DEV_INTR_MODE_MSI:
2106 pci_disable_msi(enic->pdev);
2107 break;
2108 default:
2109 break;
2110 }
2111
2112 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2113}
2114
f8bd9091
SF		 2115static const struct net_device_ops enic_netdev_dynamic_ops = {
2116 .ndo_open = enic_open,
2117 .ndo_stop = enic_stop,
2118 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2119 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2120 .ndo_validate_addr = eth_validate_addr,
319d7e84
RP		 2121 .ndo_set_rx_mode = enic_set_rx_mode,
2122 .ndo_set_multicast_list = enic_set_rx_mode,
f8bd9091
SF		 2123 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2124 .ndo_change_mtu = enic_change_mtu,
2125 .ndo_vlan_rx_register = enic_vlan_rx_register,
2126 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2127 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2128 .ndo_tx_timeout = enic_tx_timeout,
2129 .ndo_set_vf_port = enic_set_vf_port,
2130 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2131 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2132#ifdef CONFIG_NET_POLL_CONTROLLER
2133 .ndo_poll_controller = enic_poll_controller,
2134#endif
2135};
2136
afe29f7a
SH		 2137static const struct net_device_ops enic_netdev_ops = {
2138 .ndo_open = enic_open,
2139 .ndo_stop = enic_stop,
00829823 2140 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2141 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2142 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2143 .ndo_set_mac_address = enic_set_mac_address,
319d7e84
RP		 2144 .ndo_set_rx_mode = enic_set_rx_mode,
2145 .ndo_set_multicast_list = enic_set_rx_mode,
afe29f7a
SH		 2146 .ndo_change_mtu = enic_change_mtu,
2147 .ndo_vlan_rx_register = enic_vlan_rx_register,
2148 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2149 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2150 .ndo_tx_timeout = enic_tx_timeout,
2151#ifdef CONFIG_NET_POLL_CONTROLLER
2152 .ndo_poll_controller = enic_poll_controller,
2153#endif
2154};
2155
2fdba388 2156static void enic_dev_deinit(struct enic *enic)
6fdfa970 2157{
717258ba
VK		 2158 unsigned int i;
2159
2160 for (i = 0; i < enic->rq_count; i++)
2161 netif_napi_del(&enic->napi[i]);
2162
6fdfa970
SF		 2163 enic_free_vnic_resources(enic);
2164 enic_clear_intr_mode(enic);
2165}
2166
2fdba388 2167static int enic_dev_init(struct enic *enic)
6fdfa970 2168{
a7a79deb 2169 struct device *dev = enic_get_dev(enic);
6fdfa970 2170 struct net_device *netdev = enic->netdev;
717258ba 2171 unsigned int i;
6fdfa970
SF		 2172 int err;
2173
2174 /* Get vNIC configuration
2175 */
2176
2177 err = enic_get_vnic_config(enic);
2178 if (err) {
a7a79deb 2179 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2180 return err;
2181 }
2182
2183 /* Get available resource counts
2184 */
2185
2186 enic_get_res_counts(enic);
2187
2188 /* Set interrupt mode based on resource counts and system
2189 * capabilities
2190 */
2191
2192 err = enic_set_intr_mode(enic);
2193 if (err) {
a7a79deb
VK		 2194 dev_err(dev, "Failed to set intr mode based on resource "
2195 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2196 return err;
2197 }
2198
2199 /* Allocate and configure vNIC resources
2200 */
2201
2202 err = enic_alloc_vnic_resources(enic);
2203 if (err) {
a7a79deb 2204 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2205 goto err_out_free_vnic_resources;
2206 }
2207
2208 enic_init_vnic_resources(enic);
2209
717258ba 2210 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2211 if (err) {
a7a79deb 2212 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2213 goto err_out_free_vnic_resources;
2214 }
2215
2216 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2217 default:
717258ba 2218 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2219 break;
2220 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2221 for (i = 0; i < enic->rq_count; i++)
2222 netif_napi_add(netdev, &enic->napi[i],
2223 enic_poll_msix, 64);
6fdfa970
SF		 2224 break;
2225 }
2226
2227 return 0;
2228
2229err_out_free_vnic_resources:
2230 enic_clear_intr_mode(enic);
2231 enic_free_vnic_resources(enic);
2232
2233 return err;
2234}
2235
27e6c7d3
SF		 2236static void enic_iounmap(struct enic *enic)
2237{
2238 unsigned int i;
2239
2240 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2241 if (enic->bar[i].vaddr)
2242 iounmap(enic->bar[i].vaddr);
2243}
2244
01f2e4ea
SF		 2245static int __devinit enic_probe(struct pci_dev *pdev,
2246 const struct pci_device_id *ent)
2247{
a7a79deb 2248 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2249 struct net_device *netdev;
2250 struct enic *enic;
2251 int using_dac = 0;
2252 unsigned int i;
2253 int err;
2254
01f2e4ea
SF		 2255 /* Allocate net device structure and initialize. Private
2256 * instance data is initialized to zero.
2257 */
2258
2259 netdev = alloc_etherdev(sizeof(struct enic));
2260 if (!netdev) {
a7a79deb 2261 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2262 return -ENOMEM;
2263 }
2264
01f2e4ea
SF		 2265 pci_set_drvdata(pdev, netdev);
2266
2267 SET_NETDEV_DEV(netdev, &pdev->dev);
2268
2269 enic = netdev_priv(netdev);
2270 enic->netdev = netdev;
2271 enic->pdev = pdev;
2272
2273 /* Setup PCI resources
2274 */
2275
29046f9b 2276 err = pci_enable_device_mem(pdev);
01f2e4ea 2277 if (err) {
a7a79deb 2278 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2279 goto err_out_free_netdev;
2280 }
2281
2282 err = pci_request_regions(pdev, DRV_NAME);
2283 if (err) {
a7a79deb 2284 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2285 goto err_out_disable_device;
2286 }
2287
2288 pci_set_master(pdev);
2289
2290 /* Query PCI controller on system for DMA addressing
2291 * limitation for the device. Try 40-bit first, and
2292 * fail to 32-bit.
2293 */
2294
50cf156a 2295 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2296 if (err) {
284901a9 2297 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2298 if (err) {
a7a79deb 2299 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2300 goto err_out_release_regions;
2301 }
284901a9 2302 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2303 if (err) {
a7a79deb
VK		 2304 dev_err(dev, "Unable to obtain %u-bit DMA "
2305 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2306 goto err_out_release_regions;
2307 }
2308 } else {
50cf156a 2309 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2310 if (err) {
a7a79deb
VK		 2311 dev_err(dev, "Unable to obtain %u-bit DMA "
2312 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2313 goto err_out_release_regions;
2314 }
2315 using_dac = 1;
2316 }
2317
27e6c7d3 2318 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2319 */
2320
27e6c7d3
SF		 2321 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2322 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2323 continue;
2324 enic->bar[i].len = pci_resource_len(pdev, i);
2325 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2326 if (!enic->bar[i].vaddr) {
a7a79deb 2327 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2328 err = -ENODEV;
2329 goto err_out_iounmap;
2330 }
2331 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2332 }
2333
2334 /* Register vNIC device
2335 */
2336
27e6c7d3
SF		 2337 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2338 ARRAY_SIZE(enic->bar));
01f2e4ea 2339 if (!enic->vdev) {
a7a79deb 2340 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2341 err = -ENODEV;
2342 goto err_out_iounmap;
2343 }
2344
2345 /* Issue device open to get device in known state
2346 */
2347
2348 err = enic_dev_open(enic);
2349 if (err) {
a7a79deb 2350 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2351 goto err_out_vnic_unregister;
2352 }
2353
69161425
VK		 2354 /* Setup devcmd lock
2355 */
2356
2357 spin_lock_init(&enic->devcmd_lock);
2358
2359 /*
2360 * Set ingress vlan rewrite mode before vnic initialization
2361 */
2362
2363 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2364 if (err) {
2365 dev_err(dev,
2366 "Failed to set ingress vlan rewrite mode, aborting.\n");
2367 goto err_out_dev_close;
2368 }
2369
01f2e4ea
SF		 2370 /* Issue device init to initialize the vnic-to-switch link.
2371 * We'll start with carrier off and wait for link UP
2372 * notification later to turn on carrier. We don't need
2373 * to wait here for the vnic-to-switch link initialization
2374 * to complete; link UP notification is the indication that
2375 * the process is complete.
2376 */
2377
2378 netif_carrier_off(netdev);
2379
a7a79deb
VK		 2380 /* Do not call dev_init for a dynamic vnic.
2381 * For a dynamic vnic, init_prov_info will be
2382 * called later by an upper layer.
2383 */
2384
f8bd9091
SF		 2385 if (!enic_is_dynamic(enic)) {
2386 err = vnic_dev_init(enic->vdev, 0);
2387 if (err) {
a7a79deb 2388 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2389 goto err_out_dev_close;
2390 }
01f2e4ea
SF		 2391 }
2392
6fdfa970 2393 err = enic_dev_init(enic);
01f2e4ea 2394 if (err) {
a7a79deb 2395 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2396 goto err_out_dev_close;
2397 }
2398
383ab92f 2399 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2400 */
2401
2402 init_timer(&enic->notify_timer);
2403 enic->notify_timer.function = enic_notify_timer;
2404 enic->notify_timer.data = (unsigned long)enic;
2405
2406 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2407 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2408
2409 for (i = 0; i < enic->wq_count; i++)
2410 spin_lock_init(&enic->wq_lock[i]);
2411
01f2e4ea
SF		 2412 /* Register net device
2413 */
2414
2415 enic->port_mtu = enic->config.mtu;
2416 (void)enic_change_mtu(netdev, enic->port_mtu);
2417
2418 err = enic_set_mac_addr(netdev, enic->mac_addr);
2419 if (err) {
a7a79deb 2420 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2421 goto err_out_dev_deinit;
01f2e4ea
SF		 2422 }
2423
7c844599
SF		 2424 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2425 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2426
f8bd9091
SF		 2427 if (enic_is_dynamic(enic))
2428 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2429 else
2430 netdev->netdev_ops = &enic_netdev_ops;
2431
01f2e4ea
SF		 2432 netdev->watchdog_timeo = 2 * HZ;
2433 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2434
73c1ea9b 2435 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2436 if (ENIC_SETTING(enic, LOOP)) {
2437 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2438 enic->loop_enable = 1;
2439 enic->loop_tag = enic->config.loop_tag;
2440 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2441 }
01f2e4ea 2442 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2443 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2444 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2445 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2446 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2447 if (ENIC_SETTING(enic, RXCSUM))
2448 netdev->hw_features |= NETIF_F_RXCSUM;
2449
2450 netdev->features |= netdev->hw_features;
2451
01f2e4ea
SF		 2452 if (using_dac)
2453 netdev->features |= NETIF_F_HIGHDMA;
2454
01f2e4ea
SF		 2455 err = register_netdev(netdev);
2456 if (err) {
a7a79deb 2457 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2458 goto err_out_dev_deinit;
01f2e4ea
SF		 2459 }
2460
2461 return 0;
2462
6fdfa970
SF		 2463err_out_dev_deinit:
2464 enic_dev_deinit(enic);
01f2e4ea
SF		 2465err_out_dev_close:
2466 vnic_dev_close(enic->vdev);
2467err_out_vnic_unregister:
01f2e4ea
SF		 2468 vnic_dev_unregister(enic->vdev);
2469err_out_iounmap:
2470 enic_iounmap(enic);
2471err_out_release_regions:
2472 pci_release_regions(pdev);
2473err_out_disable_device:
2474 pci_disable_device(pdev);
2475err_out_free_netdev:
2476 pci_set_drvdata(pdev, NULL);
2477 free_netdev(netdev);
2478
2479 return err;
2480}
2481
2482static void __devexit enic_remove(struct pci_dev *pdev)
2483{
2484 struct net_device *netdev = pci_get_drvdata(pdev);
2485
2486 if (netdev) {
2487 struct enic *enic = netdev_priv(netdev);
2488
23f333a2 2489 cancel_work_sync(&enic->reset);
c97c894d 2490 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2491 unregister_netdev(netdev);
6fdfa970 2492 enic_dev_deinit(enic);
01f2e4ea 2493 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2494 vnic_dev_unregister(enic->vdev);
2495 enic_iounmap(enic);
2496 pci_release_regions(pdev);
2497 pci_disable_device(pdev);
2498 pci_set_drvdata(pdev, NULL);
2499 free_netdev(netdev);
2500 }
2501}
2502
2503static struct pci_driver enic_driver = {
2504 .name = DRV_NAME,
2505 .id_table = enic_id_table,
2506 .probe = enic_probe,
2507 .remove = __devexit_p(enic_remove),
2508};
2509
2510static int __init enic_init_module(void)
2511{
a7a79deb 2512 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2513
2514 return pci_register_driver(&enic_driver);
2515}
2516
2517static void __exit enic_cleanup_module(void)
2518{
2519 pci_unregister_driver(&enic_driver);
2520}
2521
2522module_init(enic_init_module);
2523module_exit(enic_cleanup_module);
Linux kernel - Deliverables
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