enic: bug fix: split TSO fragments larger than 16K into multiple descs
[deliverable/linux.git] / drivers / net / enic / enic_main.c
CommitLineData
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1/*
2 * Copyright 2008 Cisco Systems, Inc. All rights reserved.
3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
26#include <linux/workqueue.h>
27#include <linux/pci.h>
28#include <linux/netdevice.h>
29#include <linux/etherdevice.h>
30#include <linux/if_ether.h>
31#include <linux/if_vlan.h>
32#include <linux/ethtool.h>
33#include <linux/in.h>
34#include <linux/ip.h>
35#include <linux/ipv6.h>
36#include <linux/tcp.h>
b7c6bfb7 37#include <net/ip6_checksum.h>
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38
39#include "cq_enet_desc.h"
40#include "vnic_dev.h"
41#include "vnic_intr.h"
42#include "vnic_stats.h"
43#include "enic_res.h"
44#include "enic.h"
45
46#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
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47#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
48#define MAX_TSO (1 << 16)
49#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
50
51#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
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52
53/* Supported devices */
54static struct pci_device_id enic_id_table[] = {
ea0d7d91 55 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
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56 { 0, } /* end of table */
57};
58
59MODULE_DESCRIPTION(DRV_DESCRIPTION);
60MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
61MODULE_LICENSE("GPL");
62MODULE_VERSION(DRV_VERSION);
63MODULE_DEVICE_TABLE(pci, enic_id_table);
64
65struct enic_stat {
66 char name[ETH_GSTRING_LEN];
67 unsigned int offset;
68};
69
70#define ENIC_TX_STAT(stat) \
71 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
72#define ENIC_RX_STAT(stat) \
73 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
74
75static const struct enic_stat enic_tx_stats[] = {
76 ENIC_TX_STAT(tx_frames_ok),
77 ENIC_TX_STAT(tx_unicast_frames_ok),
78 ENIC_TX_STAT(tx_multicast_frames_ok),
79 ENIC_TX_STAT(tx_broadcast_frames_ok),
80 ENIC_TX_STAT(tx_bytes_ok),
81 ENIC_TX_STAT(tx_unicast_bytes_ok),
82 ENIC_TX_STAT(tx_multicast_bytes_ok),
83 ENIC_TX_STAT(tx_broadcast_bytes_ok),
84 ENIC_TX_STAT(tx_drops),
85 ENIC_TX_STAT(tx_errors),
86 ENIC_TX_STAT(tx_tso),
87};
88
89static const struct enic_stat enic_rx_stats[] = {
90 ENIC_RX_STAT(rx_frames_ok),
91 ENIC_RX_STAT(rx_frames_total),
92 ENIC_RX_STAT(rx_unicast_frames_ok),
93 ENIC_RX_STAT(rx_multicast_frames_ok),
94 ENIC_RX_STAT(rx_broadcast_frames_ok),
95 ENIC_RX_STAT(rx_bytes_ok),
96 ENIC_RX_STAT(rx_unicast_bytes_ok),
97 ENIC_RX_STAT(rx_multicast_bytes_ok),
98 ENIC_RX_STAT(rx_broadcast_bytes_ok),
99 ENIC_RX_STAT(rx_drop),
100 ENIC_RX_STAT(rx_no_bufs),
101 ENIC_RX_STAT(rx_errors),
102 ENIC_RX_STAT(rx_rss),
103 ENIC_RX_STAT(rx_crc_errors),
104 ENIC_RX_STAT(rx_frames_64),
105 ENIC_RX_STAT(rx_frames_127),
106 ENIC_RX_STAT(rx_frames_255),
107 ENIC_RX_STAT(rx_frames_511),
108 ENIC_RX_STAT(rx_frames_1023),
109 ENIC_RX_STAT(rx_frames_1518),
110 ENIC_RX_STAT(rx_frames_to_max),
111};
112
113static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
114static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
115
116static int enic_get_settings(struct net_device *netdev,
117 struct ethtool_cmd *ecmd)
118{
119 struct enic *enic = netdev_priv(netdev);
120
121 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
122 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
123 ecmd->port = PORT_FIBRE;
124 ecmd->transceiver = XCVR_EXTERNAL;
125
126 if (netif_carrier_ok(netdev)) {
127 ecmd->speed = vnic_dev_port_speed(enic->vdev);
128 ecmd->duplex = DUPLEX_FULL;
129 } else {
130 ecmd->speed = -1;
131 ecmd->duplex = -1;
132 }
133
134 ecmd->autoneg = AUTONEG_DISABLE;
135
136 return 0;
137}
138
139static void enic_get_drvinfo(struct net_device *netdev,
140 struct ethtool_drvinfo *drvinfo)
141{
142 struct enic *enic = netdev_priv(netdev);
143 struct vnic_devcmd_fw_info *fw_info;
144
145 spin_lock(&enic->devcmd_lock);
146 vnic_dev_fw_info(enic->vdev, &fw_info);
147 spin_unlock(&enic->devcmd_lock);
148
149 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
150 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
151 strncpy(drvinfo->fw_version, fw_info->fw_version,
152 sizeof(drvinfo->fw_version));
153 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
154 sizeof(drvinfo->bus_info));
155}
156
157static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
158{
159 unsigned int i;
160
161 switch (stringset) {
162 case ETH_SS_STATS:
163 for (i = 0; i < enic_n_tx_stats; i++) {
164 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
165 data += ETH_GSTRING_LEN;
166 }
167 for (i = 0; i < enic_n_rx_stats; i++) {
168 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
169 data += ETH_GSTRING_LEN;
170 }
171 break;
172 }
173}
174
25f0a061 175static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 176{
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177 switch (sset) {
178 case ETH_SS_STATS:
179 return enic_n_tx_stats + enic_n_rx_stats;
180 default:
181 return -EOPNOTSUPP;
182 }
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183}
184
185static void enic_get_ethtool_stats(struct net_device *netdev,
186 struct ethtool_stats *stats, u64 *data)
187{
188 struct enic *enic = netdev_priv(netdev);
189 struct vnic_stats *vstats;
190 unsigned int i;
191
192 spin_lock(&enic->devcmd_lock);
193 vnic_dev_stats_dump(enic->vdev, &vstats);
194 spin_unlock(&enic->devcmd_lock);
195
196 for (i = 0; i < enic_n_tx_stats; i++)
197 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
198 for (i = 0; i < enic_n_rx_stats; i++)
199 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
200}
201
202static u32 enic_get_rx_csum(struct net_device *netdev)
203{
204 struct enic *enic = netdev_priv(netdev);
205 return enic->csum_rx_enabled;
206}
207
208static int enic_set_rx_csum(struct net_device *netdev, u32 data)
209{
210 struct enic *enic = netdev_priv(netdev);
211
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212 if (data && !ENIC_SETTING(enic, RXCSUM))
213 return -EINVAL;
214
215 enic->csum_rx_enabled = !!data;
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216
217 return 0;
218}
219
220static int enic_set_tx_csum(struct net_device *netdev, u32 data)
221{
222 struct enic *enic = netdev_priv(netdev);
223
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224 if (data && !ENIC_SETTING(enic, TXCSUM))
225 return -EINVAL;
226
227 if (data)
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228 netdev->features |= NETIF_F_HW_CSUM;
229 else
230 netdev->features &= ~NETIF_F_HW_CSUM;
231
232 return 0;
233}
234
235static int enic_set_tso(struct net_device *netdev, u32 data)
236{
237 struct enic *enic = netdev_priv(netdev);
238
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239 if (data && !ENIC_SETTING(enic, TSO))
240 return -EINVAL;
241
242 if (data)
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243 netdev->features |=
244 NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN;
245 else
246 netdev->features &=
247 ~(NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_TSO_ECN);
248
249 return 0;
250}
251
252static u32 enic_get_msglevel(struct net_device *netdev)
253{
254 struct enic *enic = netdev_priv(netdev);
255 return enic->msg_enable;
256}
257
258static void enic_set_msglevel(struct net_device *netdev, u32 value)
259{
260 struct enic *enic = netdev_priv(netdev);
261 enic->msg_enable = value;
262}
263
0fc0b732 264static const struct ethtool_ops enic_ethtool_ops = {
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265 .get_settings = enic_get_settings,
266 .get_drvinfo = enic_get_drvinfo,
267 .get_msglevel = enic_get_msglevel,
268 .set_msglevel = enic_set_msglevel,
269 .get_link = ethtool_op_get_link,
270 .get_strings = enic_get_strings,
25f0a061 271 .get_sset_count = enic_get_sset_count,
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272 .get_ethtool_stats = enic_get_ethtool_stats,
273 .get_rx_csum = enic_get_rx_csum,
274 .set_rx_csum = enic_set_rx_csum,
275 .get_tx_csum = ethtool_op_get_tx_csum,
276 .set_tx_csum = enic_set_tx_csum,
277 .get_sg = ethtool_op_get_sg,
278 .set_sg = ethtool_op_set_sg,
279 .get_tso = ethtool_op_get_tso,
280 .set_tso = enic_set_tso,
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281 .get_flags = ethtool_op_get_flags,
282 .set_flags = ethtool_op_set_flags,
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283};
284
285static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
286{
287 struct enic *enic = vnic_dev_priv(wq->vdev);
288
289 if (buf->sop)
290 pci_unmap_single(enic->pdev, buf->dma_addr,
291 buf->len, PCI_DMA_TODEVICE);
292 else
293 pci_unmap_page(enic->pdev, buf->dma_addr,
294 buf->len, PCI_DMA_TODEVICE);
295
296 if (buf->os_buf)
297 dev_kfree_skb_any(buf->os_buf);
298}
299
300static void enic_wq_free_buf(struct vnic_wq *wq,
301 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
302{
303 enic_free_wq_buf(wq, buf);
304}
305
306static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
307 u8 type, u16 q_number, u16 completed_index, void *opaque)
308{
309 struct enic *enic = vnic_dev_priv(vdev);
310
311 spin_lock(&enic->wq_lock[q_number]);
312
313 vnic_wq_service(&enic->wq[q_number], cq_desc,
314 completed_index, enic_wq_free_buf,
315 opaque);
316
317 if (netif_queue_stopped(enic->netdev) &&
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318 vnic_wq_desc_avail(&enic->wq[q_number]) >=
319 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
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320 netif_wake_queue(enic->netdev);
321
322 spin_unlock(&enic->wq_lock[q_number]);
323
324 return 0;
325}
326
327static void enic_log_q_error(struct enic *enic)
328{
329 unsigned int i;
330 u32 error_status;
331
332 for (i = 0; i < enic->wq_count; i++) {
333 error_status = vnic_wq_error_status(&enic->wq[i]);
334 if (error_status)
335 printk(KERN_ERR PFX "%s: WQ[%d] error_status %d\n",
336 enic->netdev->name, i, error_status);
337 }
338
339 for (i = 0; i < enic->rq_count; i++) {
340 error_status = vnic_rq_error_status(&enic->rq[i]);
341 if (error_status)
342 printk(KERN_ERR PFX "%s: RQ[%d] error_status %d\n",
343 enic->netdev->name, i, error_status);
344 }
345}
346
347static void enic_link_check(struct enic *enic)
348{
349 int link_status = vnic_dev_link_status(enic->vdev);
350 int carrier_ok = netif_carrier_ok(enic->netdev);
351
352 if (link_status && !carrier_ok) {
353 printk(KERN_INFO PFX "%s: Link UP\n", enic->netdev->name);
354 netif_carrier_on(enic->netdev);
355 } else if (!link_status && carrier_ok) {
356 printk(KERN_INFO PFX "%s: Link DOWN\n", enic->netdev->name);
357 netif_carrier_off(enic->netdev);
358 }
359}
360
361static void enic_mtu_check(struct enic *enic)
362{
363 u32 mtu = vnic_dev_mtu(enic->vdev);
364
365 if (mtu != enic->port_mtu) {
366 if (mtu < enic->netdev->mtu)
367 printk(KERN_WARNING PFX
368 "%s: interface MTU (%d) set higher "
369 "than switch port MTU (%d)\n",
370 enic->netdev->name, enic->netdev->mtu, mtu);
371 enic->port_mtu = mtu;
372 }
373}
374
375static void enic_msglvl_check(struct enic *enic)
376{
377 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
378
379 if (msg_enable != enic->msg_enable) {
380 printk(KERN_INFO PFX "%s: msg lvl changed from 0x%x to 0x%x\n",
381 enic->netdev->name, enic->msg_enable, msg_enable);
382 enic->msg_enable = msg_enable;
383 }
384}
385
386static void enic_notify_check(struct enic *enic)
387{
388 enic_msglvl_check(enic);
389 enic_mtu_check(enic);
390 enic_link_check(enic);
391}
392
393#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
394
395static irqreturn_t enic_isr_legacy(int irq, void *data)
396{
397 struct net_device *netdev = data;
398 struct enic *enic = netdev_priv(netdev);
399 u32 pba;
400
401 vnic_intr_mask(&enic->intr[ENIC_INTX_WQ_RQ]);
402
403 pba = vnic_intr_legacy_pba(enic->legacy_pba);
404 if (!pba) {
405 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
406 return IRQ_NONE; /* not our interrupt */
407 }
408
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409 if (ENIC_TEST_INTR(pba, ENIC_INTX_NOTIFY)) {
410 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_NOTIFY]);
01f2e4ea 411 enic_notify_check(enic);
ed8af6b2 412 }
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413
414 if (ENIC_TEST_INTR(pba, ENIC_INTX_ERR)) {
ed8af6b2 415 vnic_intr_return_all_credits(&enic->intr[ENIC_INTX_ERR]);
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416 enic_log_q_error(enic);
417 /* schedule recovery from WQ/RQ error */
418 schedule_work(&enic->reset);
419 return IRQ_HANDLED;
420 }
421
422 if (ENIC_TEST_INTR(pba, ENIC_INTX_WQ_RQ)) {
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423 if (napi_schedule_prep(&enic->napi))
424 __napi_schedule(&enic->napi);
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425 } else {
426 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
427 }
428
429 return IRQ_HANDLED;
430}
431
432static irqreturn_t enic_isr_msi(int irq, void *data)
433{
434 struct enic *enic = data;
435
436 /* With MSI, there is no sharing of interrupts, so this is
437 * our interrupt and there is no need to ack it. The device
438 * is not providing per-vector masking, so the OS will not
439 * write to PCI config space to mask/unmask the interrupt.
440 * We're using mask_on_assertion for MSI, so the device
441 * automatically masks the interrupt when the interrupt is
442 * generated. Later, when exiting polling, the interrupt
443 * will be unmasked (see enic_poll).
444 *
445 * Also, the device uses the same PCIe Traffic Class (TC)
446 * for Memory Write data and MSI, so there are no ordering
447 * issues; the MSI will always arrive at the Root Complex
448 * _after_ corresponding Memory Writes (i.e. descriptor
449 * writes).
450 */
451
288379f0 452 napi_schedule(&enic->napi);
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453
454 return IRQ_HANDLED;
455}
456
457static irqreturn_t enic_isr_msix_rq(int irq, void *data)
458{
459 struct enic *enic = data;
460
461 /* schedule NAPI polling for RQ cleanup */
288379f0 462 napi_schedule(&enic->napi);
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463
464 return IRQ_HANDLED;
465}
466
467static irqreturn_t enic_isr_msix_wq(int irq, void *data)
468{
469 struct enic *enic = data;
470 unsigned int wq_work_to_do = -1; /* no limit */
471 unsigned int wq_work_done;
472
473 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
474 wq_work_to_do, enic_wq_service, NULL);
475
476 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_WQ],
477 wq_work_done,
478 1 /* unmask intr */,
479 1 /* reset intr timer */);
480
481 return IRQ_HANDLED;
482}
483
484static irqreturn_t enic_isr_msix_err(int irq, void *data)
485{
486 struct enic *enic = data;
487
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488 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_ERR]);
489
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490 enic_log_q_error(enic);
491
492 /* schedule recovery from WQ/RQ error */
493 schedule_work(&enic->reset);
494
495 return IRQ_HANDLED;
496}
497
498static irqreturn_t enic_isr_msix_notify(int irq, void *data)
499{
500 struct enic *enic = data;
501
ed8af6b2 502 vnic_intr_return_all_credits(&enic->intr[ENIC_MSIX_NOTIFY]);
01f2e4ea 503 enic_notify_check(enic);
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504
505 return IRQ_HANDLED;
506}
507
508static inline void enic_queue_wq_skb_cont(struct enic *enic,
509 struct vnic_wq *wq, struct sk_buff *skb,
510 unsigned int len_left)
511{
512 skb_frag_t *frag;
513
514 /* Queue additional data fragments */
515 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
516 len_left -= frag->size;
517 enic_queue_wq_desc_cont(wq, skb,
518 pci_map_page(enic->pdev, frag->page,
519 frag->page_offset, frag->size,
520 PCI_DMA_TODEVICE),
521 frag->size,
522 (len_left == 0)); /* EOP? */
523 }
524}
525
526static inline void enic_queue_wq_skb_vlan(struct enic *enic,
527 struct vnic_wq *wq, struct sk_buff *skb,
528 int vlan_tag_insert, unsigned int vlan_tag)
529{
530 unsigned int head_len = skb_headlen(skb);
531 unsigned int len_left = skb->len - head_len;
532 int eop = (len_left == 0);
533
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534 /* Queue the main skb fragment. The fragments are no larger
535 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
536 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
537 * per fragment is queued.
538 */
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539 enic_queue_wq_desc(wq, skb,
540 pci_map_single(enic->pdev, skb->data,
541 head_len, PCI_DMA_TODEVICE),
542 head_len,
543 vlan_tag_insert, vlan_tag,
544 eop);
545
546 if (!eop)
547 enic_queue_wq_skb_cont(enic, wq, skb, len_left);
548}
549
550static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
551 struct vnic_wq *wq, struct sk_buff *skb,
552 int vlan_tag_insert, unsigned int vlan_tag)
553{
554 unsigned int head_len = skb_headlen(skb);
555 unsigned int len_left = skb->len - head_len;
556 unsigned int hdr_len = skb_transport_offset(skb);
557 unsigned int csum_offset = hdr_len + skb->csum_offset;
558 int eop = (len_left == 0);
559
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560 /* Queue the main skb fragment. The fragments are no larger
561 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
562 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
563 * per fragment is queued.
564 */
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565 enic_queue_wq_desc_csum_l4(wq, skb,
566 pci_map_single(enic->pdev, skb->data,
567 head_len, PCI_DMA_TODEVICE),
568 head_len,
569 csum_offset,
570 hdr_len,
571 vlan_tag_insert, vlan_tag,
572 eop);
573
574 if (!eop)
575 enic_queue_wq_skb_cont(enic, wq, skb, len_left);
576}
577
578static inline void enic_queue_wq_skb_tso(struct enic *enic,
579 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
580 int vlan_tag_insert, unsigned int vlan_tag)
581{
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582 unsigned int frag_len_left = skb_headlen(skb);
583 unsigned int len_left = skb->len - frag_len_left;
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584 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
585 int eop = (len_left == 0);
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586 unsigned int len;
587 dma_addr_t dma_addr;
588 unsigned int offset = 0;
589 skb_frag_t *frag;
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590
591 /* Preload TCP csum field with IP pseudo hdr calculated
592 * with IP length set to zero. HW will later add in length
593 * to each TCP segment resulting from the TSO.
594 */
595
09640e63 596 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
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SF
597 ip_hdr(skb)->check = 0;
598 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
599 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 600 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF
601 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
602 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
603 }
604
ea0d7d91
SF
605 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
606 * for the main skb fragment
607 */
608 while (frag_len_left) {
609 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
610 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
611 len, PCI_DMA_TODEVICE);
612 enic_queue_wq_desc_tso(wq, skb,
613 dma_addr,
614 len,
615 mss, hdr_len,
616 vlan_tag_insert, vlan_tag,
617 eop && (len == frag_len_left));
618 frag_len_left -= len;
619 offset += len;
620 }
01f2e4ea 621
ea0d7d91
SF
622 if (eop)
623 return;
624
625 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
626 * for additional data fragments
627 */
628 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
629 len_left -= frag->size;
630 frag_len_left = frag->size;
631 offset = frag->page_offset;
632
633 while (frag_len_left) {
634 len = min(frag_len_left,
635 (unsigned int)WQ_ENET_MAX_DESC_LEN);
636 dma_addr = pci_map_page(enic->pdev, frag->page,
637 offset, len,
638 PCI_DMA_TODEVICE);
639 enic_queue_wq_desc_cont(wq, skb,
640 dma_addr,
641 len,
642 (len_left == 0) &&
643 (len == frag_len_left)); /* EOP? */
644 frag_len_left -= len;
645 offset += len;
646 }
647 }
01f2e4ea
SF
648}
649
650static inline void enic_queue_wq_skb(struct enic *enic,
651 struct vnic_wq *wq, struct sk_buff *skb)
652{
653 unsigned int mss = skb_shinfo(skb)->gso_size;
654 unsigned int vlan_tag = 0;
655 int vlan_tag_insert = 0;
656
657 if (enic->vlan_group && vlan_tx_tag_present(skb)) {
658 /* VLAN tag from trunking driver */
659 vlan_tag_insert = 1;
660 vlan_tag = vlan_tx_tag_get(skb);
661 }
662
663 if (mss)
664 enic_queue_wq_skb_tso(enic, wq, skb, mss,
665 vlan_tag_insert, vlan_tag);
666 else if (skb->ip_summed == CHECKSUM_PARTIAL)
667 enic_queue_wq_skb_csum_l4(enic, wq, skb,
668 vlan_tag_insert, vlan_tag);
669 else
670 enic_queue_wq_skb_vlan(enic, wq, skb,
671 vlan_tag_insert, vlan_tag);
672}
673
ed8af6b2 674/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325
SH
675static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
676 struct net_device *netdev)
01f2e4ea
SF
677{
678 struct enic *enic = netdev_priv(netdev);
679 struct vnic_wq *wq = &enic->wq[0];
680 unsigned long flags;
681
682 if (skb->len <= 0) {
683 dev_kfree_skb(skb);
684 return NETDEV_TX_OK;
685 }
686
687 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
688 * which is very likely. In the off chance it's going to take
689 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
690 */
691
692 if (skb_shinfo(skb)->gso_size == 0 &&
693 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
694 skb_linearize(skb)) {
695 dev_kfree_skb(skb);
696 return NETDEV_TX_OK;
697 }
698
699 spin_lock_irqsave(&enic->wq_lock[0], flags);
700
ea0d7d91
SF
701 if (vnic_wq_desc_avail(wq) <
702 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF
703 netif_stop_queue(netdev);
704 /* This is a hard error, log it */
705 printk(KERN_ERR PFX "%s: BUG! Tx ring full when "
706 "queue awake!\n", netdev->name);
707 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
708 return NETDEV_TX_BUSY;
709 }
710
711 enic_queue_wq_skb(enic, wq, skb);
712
ea0d7d91 713 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF
714 netif_stop_queue(netdev);
715
01f2e4ea
SF
716 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
717
718 return NETDEV_TX_OK;
719}
720
721/* dev_base_lock rwlock held, nominally process context */
722static struct net_device_stats *enic_get_stats(struct net_device *netdev)
723{
724 struct enic *enic = netdev_priv(netdev);
25f0a061 725 struct net_device_stats *net_stats = &netdev->stats;
01f2e4ea
SF
726 struct vnic_stats *stats;
727
728 spin_lock(&enic->devcmd_lock);
729 vnic_dev_stats_dump(enic->vdev, &stats);
730 spin_unlock(&enic->devcmd_lock);
731
25f0a061
SF
732 net_stats->tx_packets = stats->tx.tx_frames_ok;
733 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
734 net_stats->tx_errors = stats->tx.tx_errors;
735 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 736
25f0a061
SF
737 net_stats->rx_packets = stats->rx.rx_frames_ok;
738 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
739 net_stats->rx_errors = stats->rx.rx_errors;
740 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
bd9fb1a4 741 net_stats->rx_crc_errors = enic->rq_bad_fcs;
25f0a061 742 net_stats->rx_dropped = stats->rx.rx_no_bufs;
01f2e4ea 743
25f0a061 744 return net_stats;
01f2e4ea
SF
745}
746
747static void enic_reset_mcaddrs(struct enic *enic)
748{
749 enic->mc_count = 0;
750}
751
752static int enic_set_mac_addr(struct net_device *netdev, char *addr)
753{
754 if (!is_valid_ether_addr(addr))
755 return -EADDRNOTAVAIL;
756
757 memcpy(netdev->dev_addr, addr, netdev->addr_len);
758
759 return 0;
760}
761
762/* netif_tx_lock held, BHs disabled */
763static void enic_set_multicast_list(struct net_device *netdev)
764{
765 struct enic *enic = netdev_priv(netdev);
766 struct dev_mc_list *list = netdev->mc_list;
767 int directed = 1;
768 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
769 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
770 int promisc = (netdev->flags & IFF_PROMISC) ? 1 : 0;
771 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
772 (netdev->mc_count > ENIC_MULTICAST_PERFECT_FILTERS);
773 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
774 unsigned int mc_count = netdev->mc_count;
775 unsigned int i, j;
776
777 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS)
778 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
779
780 spin_lock(&enic->devcmd_lock);
781
782 vnic_dev_packet_filter(enic->vdev, directed,
783 multicast, broadcast, promisc, allmulti);
784
785 /* Is there an easier way? Trying to minimize to
786 * calls to add/del multicast addrs. We keep the
787 * addrs from the last call in enic->mc_addr and
788 * look for changes to add/del.
789 */
790
791 for (i = 0; list && i < mc_count; i++) {
792 memcpy(mc_addr[i], list->dmi_addr, ETH_ALEN);
793 list = list->next;
794 }
795
796 for (i = 0; i < enic->mc_count; i++) {
797 for (j = 0; j < mc_count; j++)
798 if (compare_ether_addr(enic->mc_addr[i],
799 mc_addr[j]) == 0)
800 break;
801 if (j == mc_count)
802 enic_del_multicast_addr(enic, enic->mc_addr[i]);
803 }
804
805 for (i = 0; i < mc_count; i++) {
806 for (j = 0; j < enic->mc_count; j++)
807 if (compare_ether_addr(mc_addr[i],
808 enic->mc_addr[j]) == 0)
809 break;
810 if (j == enic->mc_count)
811 enic_add_multicast_addr(enic, mc_addr[i]);
812 }
813
814 /* Save the list to compare against next time
815 */
816
817 for (i = 0; i < mc_count; i++)
818 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
819
820 enic->mc_count = mc_count;
821
822 spin_unlock(&enic->devcmd_lock);
823}
824
825/* rtnl lock is held */
826static void enic_vlan_rx_register(struct net_device *netdev,
827 struct vlan_group *vlan_group)
828{
829 struct enic *enic = netdev_priv(netdev);
830 enic->vlan_group = vlan_group;
831}
832
833/* rtnl lock is held */
834static void enic_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
835{
836 struct enic *enic = netdev_priv(netdev);
837
838 spin_lock(&enic->devcmd_lock);
839 enic_add_vlan(enic, vid);
840 spin_unlock(&enic->devcmd_lock);
841}
842
843/* rtnl lock is held */
844static void enic_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
845{
846 struct enic *enic = netdev_priv(netdev);
847
848 spin_lock(&enic->devcmd_lock);
849 enic_del_vlan(enic, vid);
850 spin_unlock(&enic->devcmd_lock);
851}
852
853/* netif_tx_lock held, BHs disabled */
854static void enic_tx_timeout(struct net_device *netdev)
855{
856 struct enic *enic = netdev_priv(netdev);
857 schedule_work(&enic->reset);
858}
859
860static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
861{
862 struct enic *enic = vnic_dev_priv(rq->vdev);
863
864 if (!buf->os_buf)
865 return;
866
867 pci_unmap_single(enic->pdev, buf->dma_addr,
868 buf->len, PCI_DMA_FROMDEVICE);
869 dev_kfree_skb_any(buf->os_buf);
870}
871
872static inline struct sk_buff *enic_rq_alloc_skb(unsigned int size)
873{
874 struct sk_buff *skb;
875
876 skb = dev_alloc_skb(size + NET_IP_ALIGN);
877
878 if (skb)
879 skb_reserve(skb, NET_IP_ALIGN);
880
881 return skb;
882}
883
884static int enic_rq_alloc_buf(struct vnic_rq *rq)
885{
886 struct enic *enic = vnic_dev_priv(rq->vdev);
887 struct sk_buff *skb;
888 unsigned int len = enic->netdev->mtu + ETH_HLEN;
889 unsigned int os_buf_index = 0;
890 dma_addr_t dma_addr;
891
892 skb = enic_rq_alloc_skb(len);
893 if (!skb)
894 return -ENOMEM;
895
896 dma_addr = pci_map_single(enic->pdev, skb->data,
897 len, PCI_DMA_FROMDEVICE);
898
899 enic_queue_rq_desc(rq, skb, os_buf_index,
900 dma_addr, len);
901
902 return 0;
903}
904
4badc385
SF
905static int enic_rq_alloc_buf_a1(struct vnic_rq *rq)
906{
907 struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
908
909 if (vnic_rq_posting_soon(rq)) {
910
911 /* SW workaround for A0 HW erratum: if we're just about
912 * to write posted_index, insert a dummy desc
913 * of type resvd
914 */
915
916 rq_enet_desc_enc(desc, 0, RQ_ENET_TYPE_RESV2, 0);
917 vnic_rq_post(rq, 0, 0, 0, 0);
918 } else {
919 return enic_rq_alloc_buf(rq);
920 }
921
922 return 0;
923}
924
925static int enic_set_rq_alloc_buf(struct enic *enic)
926{
927 enum vnic_dev_hw_version hw_ver;
928 int err;
929
930 err = vnic_dev_hw_version(enic->vdev, &hw_ver);
931 if (err)
932 return err;
933
934 switch (hw_ver) {
935 case VNIC_DEV_HW_VER_A1:
936 enic->rq_alloc_buf = enic_rq_alloc_buf_a1;
937 break;
938 case VNIC_DEV_HW_VER_A2:
939 case VNIC_DEV_HW_VER_UNKNOWN:
940 enic->rq_alloc_buf = enic_rq_alloc_buf;
941 break;
942 default:
943 return -ENODEV;
944 }
945
946 return 0;
947}
948
01f2e4ea
SF
949static int enic_get_skb_header(struct sk_buff *skb, void **iphdr,
950 void **tcph, u64 *hdr_flags, void *priv)
951{
952 struct cq_enet_rq_desc *cq_desc = priv;
953 unsigned int ip_len;
954 struct iphdr *iph;
955
956 u8 type, color, eop, sop, ingress_port, vlan_stripped;
957 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
958 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
959 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
960 u8 packet_error;
961 u16 q_number, completed_index, bytes_written, vlan, checksum;
962 u32 rss_hash;
963
964 cq_enet_rq_desc_dec(cq_desc,
965 &type, &color, &q_number, &completed_index,
966 &ingress_port, &fcoe, &eop, &sop, &rss_type,
967 &csum_not_calc, &rss_hash, &bytes_written,
968 &packet_error, &vlan_stripped, &vlan, &checksum,
969 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
970 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
971 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
972 &fcs_ok);
973
974 if (!(ipv4 && tcp && !ipv4_fragment))
975 return -1;
976
977 skb_reset_network_header(skb);
978 iph = ip_hdr(skb);
979
980 ip_len = ip_hdrlen(skb);
981 skb_set_transport_header(skb, ip_len);
982
983 /* check if ip header and tcp header are complete */
984 if (ntohs(iph->tot_len) < ip_len + tcp_hdrlen(skb))
985 return -1;
986
987 *hdr_flags = LRO_IPV4 | LRO_TCP;
988 *tcph = tcp_hdr(skb);
989 *iphdr = iph;
990
991 return 0;
992}
993
994static void enic_rq_indicate_buf(struct vnic_rq *rq,
995 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
996 int skipped, void *opaque)
997{
998 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 999 struct net_device *netdev = enic->netdev;
01f2e4ea
SF
1000 struct sk_buff *skb;
1001
1002 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1003 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1004 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1005 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1006 u8 packet_error;
1007 u16 q_number, completed_index, bytes_written, vlan, checksum;
1008 u32 rss_hash;
1009
1010 if (skipped)
1011 return;
1012
1013 skb = buf->os_buf;
1014 prefetch(skb->data - NET_IP_ALIGN);
1015 pci_unmap_single(enic->pdev, buf->dma_addr,
1016 buf->len, PCI_DMA_FROMDEVICE);
1017
1018 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1019 &type, &color, &q_number, &completed_index,
1020 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1021 &csum_not_calc, &rss_hash, &bytes_written,
1022 &packet_error, &vlan_stripped, &vlan, &checksum,
1023 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1024 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1025 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1026 &fcs_ok);
1027
1028 if (packet_error) {
1029
bd9fb1a4
SF
1030 if (bytes_written > 0 && !fcs_ok)
1031 enic->rq_bad_fcs++;
01f2e4ea
SF
1032
1033 dev_kfree_skb_any(skb);
1034
1035 return;
1036 }
1037
1038 if (eop && bytes_written > 0) {
1039
1040 /* Good receive
1041 */
1042
1043 skb_put(skb, bytes_written);
86ca9db7 1044 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea
SF
1045
1046 if (enic->csum_rx_enabled && !csum_not_calc) {
1047 skb->csum = htons(checksum);
1048 skb->ip_summed = CHECKSUM_COMPLETE;
1049 }
1050
86ca9db7 1051 skb->dev = netdev;
01f2e4ea
SF
1052
1053 if (enic->vlan_group && vlan_stripped) {
1054
86ca9db7 1055 if ((netdev->features & NETIF_F_LRO) && ipv4)
01f2e4ea
SF
1056 lro_vlan_hwaccel_receive_skb(&enic->lro_mgr,
1057 skb, enic->vlan_group,
1058 vlan, cq_desc);
1059 else
1060 vlan_hwaccel_receive_skb(skb,
1061 enic->vlan_group, vlan);
1062
1063 } else {
1064
86ca9db7 1065 if ((netdev->features & NETIF_F_LRO) && ipv4)
01f2e4ea
SF
1066 lro_receive_skb(&enic->lro_mgr, skb, cq_desc);
1067 else
1068 netif_receive_skb(skb);
1069
1070 }
1071
1072 } else {
1073
1074 /* Buffer overflow
1075 */
1076
1077 dev_kfree_skb_any(skb);
1078 }
1079}
1080
1081static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1082 u8 type, u16 q_number, u16 completed_index, void *opaque)
1083{
1084 struct enic *enic = vnic_dev_priv(vdev);
1085
1086 vnic_rq_service(&enic->rq[q_number], cq_desc,
1087 completed_index, VNIC_RQ_RETURN_DESC,
1088 enic_rq_indicate_buf, opaque);
1089
1090 return 0;
1091}
1092
1093static void enic_rq_drop_buf(struct vnic_rq *rq,
1094 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1095 int skipped, void *opaque)
1096{
1097 struct enic *enic = vnic_dev_priv(rq->vdev);
1098 struct sk_buff *skb = buf->os_buf;
1099
1100 if (skipped)
1101 return;
1102
1103 pci_unmap_single(enic->pdev, buf->dma_addr,
1104 buf->len, PCI_DMA_FROMDEVICE);
1105
1106 dev_kfree_skb_any(skb);
1107}
1108
1109static int enic_rq_service_drop(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1110 u8 type, u16 q_number, u16 completed_index, void *opaque)
1111{
1112 struct enic *enic = vnic_dev_priv(vdev);
1113
1114 vnic_rq_service(&enic->rq[q_number], cq_desc,
1115 completed_index, VNIC_RQ_RETURN_DESC,
1116 enic_rq_drop_buf, opaque);
1117
1118 return 0;
1119}
1120
1121static int enic_poll(struct napi_struct *napi, int budget)
1122{
1123 struct enic *enic = container_of(napi, struct enic, napi);
1124 struct net_device *netdev = enic->netdev;
1125 unsigned int rq_work_to_do = budget;
1126 unsigned int wq_work_to_do = -1; /* no limit */
1127 unsigned int work_done, rq_work_done, wq_work_done;
1128
1129 /* Service RQ (first) and WQ
1130 */
1131
1132 rq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1133 rq_work_to_do, enic_rq_service, NULL);
1134
1135 wq_work_done = vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
1136 wq_work_to_do, enic_wq_service, NULL);
1137
1138 /* Accumulate intr event credits for this polling
1139 * cycle. An intr event is the completion of a
1140 * a WQ or RQ packet.
1141 */
1142
1143 work_done = rq_work_done + wq_work_done;
1144
1145 if (work_done > 0)
1146 vnic_intr_return_credits(&enic->intr[ENIC_INTX_WQ_RQ],
1147 work_done,
1148 0 /* don't unmask intr */,
1149 0 /* don't reset intr timer */);
1150
1151 if (rq_work_done > 0) {
1152
1153 /* Replenish RQ
1154 */
1155
4badc385 1156 vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea
SF
1157
1158 } else {
1159
1160 /* If no work done, flush all LROs and exit polling
1161 */
1162
86ca9db7 1163 if (netdev->features & NETIF_F_LRO)
01f2e4ea
SF
1164 lro_flush_all(&enic->lro_mgr);
1165
288379f0 1166 napi_complete(napi);
ed8af6b2 1167 vnic_intr_unmask(&enic->intr[ENIC_INTX_WQ_RQ]);
01f2e4ea
SF
1168 }
1169
1170 return rq_work_done;
1171}
1172
1173static int enic_poll_msix(struct napi_struct *napi, int budget)
1174{
1175 struct enic *enic = container_of(napi, struct enic, napi);
1176 struct net_device *netdev = enic->netdev;
1177 unsigned int work_to_do = budget;
1178 unsigned int work_done;
1179
1180 /* Service RQ
1181 */
1182
1183 work_done = vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1184 work_to_do, enic_rq_service, NULL);
1185
1186 if (work_done > 0) {
1187
1188 /* Replenish RQ
1189 */
1190
4badc385 1191 vnic_rq_fill(&enic->rq[0], enic->rq_alloc_buf);
01f2e4ea 1192
ed8af6b2 1193 /* Return intr event credits for this polling
01f2e4ea 1194 * cycle. An intr event is the completion of a
ed8af6b2 1195 * RQ packet.
01f2e4ea
SF
1196 */
1197
1198 vnic_intr_return_credits(&enic->intr[ENIC_MSIX_RQ],
1199 work_done,
1200 0 /* don't unmask intr */,
1201 0 /* don't reset intr timer */);
1202 } else {
1203
1204 /* If no work done, flush all LROs and exit polling
1205 */
1206
86ca9db7 1207 if (netdev->features & NETIF_F_LRO)
01f2e4ea
SF
1208 lro_flush_all(&enic->lro_mgr);
1209
288379f0 1210 napi_complete(napi);
01f2e4ea
SF
1211 vnic_intr_unmask(&enic->intr[ENIC_MSIX_RQ]);
1212 }
1213
1214 return work_done;
1215}
1216
1217static void enic_notify_timer(unsigned long data)
1218{
1219 struct enic *enic = (struct enic *)data;
1220
1221 enic_notify_check(enic);
1222
25f0a061
SF
1223 mod_timer(&enic->notify_timer,
1224 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF
1225}
1226
1227static void enic_free_intr(struct enic *enic)
1228{
1229 struct net_device *netdev = enic->netdev;
1230 unsigned int i;
1231
1232 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1233 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF
1234 free_irq(enic->pdev->irq, netdev);
1235 break;
8f4d248c
SF
1236 case VNIC_DEV_INTR_MODE_MSI:
1237 free_irq(enic->pdev->irq, enic);
1238 break;
01f2e4ea
SF
1239 case VNIC_DEV_INTR_MODE_MSIX:
1240 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1241 if (enic->msix[i].requested)
1242 free_irq(enic->msix_entry[i].vector,
1243 enic->msix[i].devid);
1244 break;
1245 default:
1246 break;
1247 }
1248}
1249
1250static int enic_request_intr(struct enic *enic)
1251{
1252 struct net_device *netdev = enic->netdev;
1253 unsigned int i;
1254 int err = 0;
1255
1256 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1257
1258 case VNIC_DEV_INTR_MODE_INTX:
1259
1260 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1261 IRQF_SHARED, netdev->name, netdev);
1262 break;
1263
1264 case VNIC_DEV_INTR_MODE_MSI:
1265
1266 err = request_irq(enic->pdev->irq, enic_isr_msi,
1267 0, netdev->name, enic);
1268 break;
1269
1270 case VNIC_DEV_INTR_MODE_MSIX:
1271
1272 sprintf(enic->msix[ENIC_MSIX_RQ].devname,
8f4d248c 1273 "%.11s-rx-0", netdev->name);
01f2e4ea
SF
1274 enic->msix[ENIC_MSIX_RQ].isr = enic_isr_msix_rq;
1275 enic->msix[ENIC_MSIX_RQ].devid = enic;
1276
1277 sprintf(enic->msix[ENIC_MSIX_WQ].devname,
8f4d248c 1278 "%.11s-tx-0", netdev->name);
01f2e4ea
SF
1279 enic->msix[ENIC_MSIX_WQ].isr = enic_isr_msix_wq;
1280 enic->msix[ENIC_MSIX_WQ].devid = enic;
1281
1282 sprintf(enic->msix[ENIC_MSIX_ERR].devname,
1283 "%.11s-err", netdev->name);
1284 enic->msix[ENIC_MSIX_ERR].isr = enic_isr_msix_err;
1285 enic->msix[ENIC_MSIX_ERR].devid = enic;
1286
1287 sprintf(enic->msix[ENIC_MSIX_NOTIFY].devname,
1288 "%.11s-notify", netdev->name);
1289 enic->msix[ENIC_MSIX_NOTIFY].isr = enic_isr_msix_notify;
1290 enic->msix[ENIC_MSIX_NOTIFY].devid = enic;
1291
1292 for (i = 0; i < ARRAY_SIZE(enic->msix); i++) {
1293 err = request_irq(enic->msix_entry[i].vector,
1294 enic->msix[i].isr, 0,
1295 enic->msix[i].devname,
1296 enic->msix[i].devid);
1297 if (err) {
1298 enic_free_intr(enic);
1299 break;
1300 }
1301 enic->msix[i].requested = 1;
1302 }
1303
1304 break;
1305
1306 default:
1307 break;
1308 }
1309
1310 return err;
1311}
1312
1313static int enic_notify_set(struct enic *enic)
1314{
1315 int err;
1316
1317 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1318 case VNIC_DEV_INTR_MODE_INTX:
1319 err = vnic_dev_notify_set(enic->vdev, ENIC_INTX_NOTIFY);
1320 break;
1321 case VNIC_DEV_INTR_MODE_MSIX:
1322 err = vnic_dev_notify_set(enic->vdev, ENIC_MSIX_NOTIFY);
1323 break;
1324 default:
1325 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1326 break;
1327 }
1328
1329 return err;
1330}
1331
1332static void enic_notify_timer_start(struct enic *enic)
1333{
1334 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1335 case VNIC_DEV_INTR_MODE_MSI:
1336 mod_timer(&enic->notify_timer, jiffies);
1337 break;
1338 default:
1339 /* Using intr for notification for INTx/MSI-X */
1340 break;
1341 };
1342}
1343
1344/* rtnl lock is held, process context */
1345static int enic_open(struct net_device *netdev)
1346{
1347 struct enic *enic = netdev_priv(netdev);
1348 unsigned int i;
1349 int err;
1350
4b75a442
SF
1351 err = enic_request_intr(enic);
1352 if (err) {
1353 printk(KERN_ERR PFX "%s: Unable to request irq.\n",
1354 netdev->name);
1355 return err;
1356 }
1357
1358 err = enic_notify_set(enic);
1359 if (err) {
1360 printk(KERN_ERR PFX
1361 "%s: Failed to alloc notify buffer, aborting.\n",
1362 netdev->name);
1363 goto err_out_free_intr;
1364 }
1365
01f2e4ea 1366 for (i = 0; i < enic->rq_count; i++) {
4badc385 1367 err = vnic_rq_fill(&enic->rq[i], enic->rq_alloc_buf);
01f2e4ea
SF
1368 if (err) {
1369 printk(KERN_ERR PFX
1370 "%s: Unable to alloc receive buffers.\n",
1371 netdev->name);
4b75a442 1372 goto err_out_notify_unset;
01f2e4ea
SF
1373 }
1374 }
1375
1376 for (i = 0; i < enic->wq_count; i++)
1377 vnic_wq_enable(&enic->wq[i]);
1378 for (i = 0; i < enic->rq_count; i++)
1379 vnic_rq_enable(&enic->rq[i]);
1380
1381 enic_add_station_addr(enic);
1382 enic_set_multicast_list(netdev);
1383
1384 netif_wake_queue(netdev);
1385 napi_enable(&enic->napi);
1386 vnic_dev_enable(enic->vdev);
1387
1388 for (i = 0; i < enic->intr_count; i++)
1389 vnic_intr_unmask(&enic->intr[i]);
1390
1391 enic_notify_timer_start(enic);
1392
1393 return 0;
4b75a442
SF
1394
1395err_out_notify_unset:
1396 vnic_dev_notify_unset(enic->vdev);
1397err_out_free_intr:
1398 enic_free_intr(enic);
1399
1400 return err;
01f2e4ea
SF
1401}
1402
1403/* rtnl lock is held, process context */
1404static int enic_stop(struct net_device *netdev)
1405{
1406 struct enic *enic = netdev_priv(netdev);
1407 unsigned int i;
1408 int err;
1409
1410 del_timer_sync(&enic->notify_timer);
1411
1412 vnic_dev_disable(enic->vdev);
1413 napi_disable(&enic->napi);
1414 netif_stop_queue(netdev);
1415
1416 for (i = 0; i < enic->intr_count; i++)
1417 vnic_intr_mask(&enic->intr[i]);
1418
1419 for (i = 0; i < enic->wq_count; i++) {
1420 err = vnic_wq_disable(&enic->wq[i]);
1421 if (err)
1422 return err;
1423 }
1424 for (i = 0; i < enic->rq_count; i++) {
1425 err = vnic_rq_disable(&enic->rq[i]);
1426 if (err)
1427 return err;
1428 }
1429
4b75a442
SF
1430 vnic_dev_notify_unset(enic->vdev);
1431 enic_free_intr(enic);
1432
01f2e4ea
SF
1433 (void)vnic_cq_service(&enic->cq[ENIC_CQ_RQ],
1434 -1, enic_rq_service_drop, NULL);
1435 (void)vnic_cq_service(&enic->cq[ENIC_CQ_WQ],
1436 -1, enic_wq_service, NULL);
1437
1438 for (i = 0; i < enic->wq_count; i++)
1439 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1440 for (i = 0; i < enic->rq_count; i++)
1441 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1442 for (i = 0; i < enic->cq_count; i++)
1443 vnic_cq_clean(&enic->cq[i]);
1444 for (i = 0; i < enic->intr_count; i++)
1445 vnic_intr_clean(&enic->intr[i]);
1446
1447 return 0;
1448}
1449
1450static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1451{
1452 struct enic *enic = netdev_priv(netdev);
1453 int running = netif_running(netdev);
1454
25f0a061
SF
1455 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1456 return -EINVAL;
1457
01f2e4ea
SF
1458 if (running)
1459 enic_stop(netdev);
1460
01f2e4ea
SF
1461 netdev->mtu = new_mtu;
1462
1463 if (netdev->mtu > enic->port_mtu)
1464 printk(KERN_WARNING PFX
1465 "%s: interface MTU (%d) set higher "
1466 "than port MTU (%d)\n",
1467 netdev->name, netdev->mtu, enic->port_mtu);
1468
1469 if (running)
1470 enic_open(netdev);
1471
1472 return 0;
1473}
1474
1475#ifdef CONFIG_NET_POLL_CONTROLLER
1476static void enic_poll_controller(struct net_device *netdev)
1477{
1478 struct enic *enic = netdev_priv(netdev);
1479 struct vnic_dev *vdev = enic->vdev;
1480
1481 switch (vnic_dev_get_intr_mode(vdev)) {
1482 case VNIC_DEV_INTR_MODE_MSIX:
1483 enic_isr_msix_rq(enic->pdev->irq, enic);
1484 enic_isr_msix_wq(enic->pdev->irq, enic);
1485 break;
1486 case VNIC_DEV_INTR_MODE_MSI:
1487 enic_isr_msi(enic->pdev->irq, enic);
1488 break;
1489 case VNIC_DEV_INTR_MODE_INTX:
1490 enic_isr_legacy(enic->pdev->irq, netdev);
1491 break;
1492 default:
1493 break;
1494 }
1495}
1496#endif
1497
1498static int enic_dev_wait(struct vnic_dev *vdev,
1499 int (*start)(struct vnic_dev *, int),
1500 int (*finished)(struct vnic_dev *, int *),
1501 int arg)
1502{
1503 unsigned long time;
1504 int done;
1505 int err;
1506
1507 BUG_ON(in_interrupt());
1508
1509 err = start(vdev, arg);
1510 if (err)
1511 return err;
1512
1513 /* Wait for func to complete...2 seconds max
1514 */
1515
1516 time = jiffies + (HZ * 2);
1517 do {
1518
1519 err = finished(vdev, &done);
1520 if (err)
1521 return err;
1522
1523 if (done)
1524 return 0;
1525
1526 schedule_timeout_uninterruptible(HZ / 10);
1527
1528 } while (time_after(time, jiffies));
1529
1530 return -ETIMEDOUT;
1531}
1532
1533static int enic_dev_open(struct enic *enic)
1534{
1535 int err;
1536
1537 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1538 vnic_dev_open_done, 0);
1539 if (err)
1540 printk(KERN_ERR PFX
1541 "vNIC device open failed, err %d.\n", err);
1542
1543 return err;
1544}
1545
1546static int enic_dev_soft_reset(struct enic *enic)
1547{
1548 int err;
1549
1550 err = enic_dev_wait(enic->vdev, vnic_dev_soft_reset,
1551 vnic_dev_soft_reset_done, 0);
1552 if (err)
1553 printk(KERN_ERR PFX
1554 "vNIC soft reset failed, err %d.\n", err);
1555
1556 return err;
1557}
1558
68f71708
SF
1559static int enic_set_niccfg(struct enic *enic)
1560{
1561 const u8 rss_default_cpu = 0;
1562 const u8 rss_hash_type = 0;
1563 const u8 rss_hash_bits = 0;
1564 const u8 rss_base_cpu = 0;
1565 const u8 rss_enable = 0;
1566 const u8 tso_ipid_split_en = 0;
1567 const u8 ig_vlan_strip_en = 1;
1568
1569 /* Enable VLAN tag stripping. RSS not enabled (yet).
1570 */
1571
1572 return enic_set_nic_cfg(enic,
1573 rss_default_cpu, rss_hash_type,
1574 rss_hash_bits, rss_base_cpu,
1575 rss_enable, tso_ipid_split_en,
1576 ig_vlan_strip_en);
1577}
1578
01f2e4ea
SF
1579static void enic_reset(struct work_struct *work)
1580{
1581 struct enic *enic = container_of(work, struct enic, reset);
1582
1583 if (!netif_running(enic->netdev))
1584 return;
1585
1586 rtnl_lock();
1587
1588 spin_lock(&enic->devcmd_lock);
1589 vnic_dev_hang_notify(enic->vdev);
1590 spin_unlock(&enic->devcmd_lock);
1591
1592 enic_stop(enic->netdev);
1593 enic_dev_soft_reset(enic);
68f71708 1594 vnic_dev_init(enic->vdev, 0);
01f2e4ea
SF
1595 enic_reset_mcaddrs(enic);
1596 enic_init_vnic_resources(enic);
68f71708 1597 enic_set_niccfg(enic);
01f2e4ea
SF
1598 enic_open(enic->netdev);
1599
1600 rtnl_unlock();
1601}
1602
1603static int enic_set_intr_mode(struct enic *enic)
1604{
1605 unsigned int n = ARRAY_SIZE(enic->rq);
1606 unsigned int m = ARRAY_SIZE(enic->wq);
1607 unsigned int i;
1608
1609 /* Set interrupt mode (INTx, MSI, MSI-X) depending
1610 * system capabilities.
1611 *
1612 * Try MSI-X first
1613 *
1614 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1615 * (the second to last INTR is used for WQ/RQ errors)
1616 * (the last INTR is used for notifications)
1617 */
1618
1619 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
1620 for (i = 0; i < n + m + 2; i++)
1621 enic->msix_entry[i].entry = i;
1622
1623 if (enic->config.intr_mode < 1 &&
1624 enic->rq_count >= n &&
1625 enic->wq_count >= m &&
1626 enic->cq_count >= n + m &&
1627 enic->intr_count >= n + m + 2 &&
1628 !pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
1629
1630 enic->rq_count = n;
1631 enic->wq_count = m;
1632 enic->cq_count = n + m;
1633 enic->intr_count = n + m + 2;
1634
1635 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSIX);
1636
1637 return 0;
1638 }
1639
1640 /* Next try MSI
1641 *
1642 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
1643 */
1644
1645 if (enic->config.intr_mode < 2 &&
1646 enic->rq_count >= 1 &&
1647 enic->wq_count >= 1 &&
1648 enic->cq_count >= 2 &&
1649 enic->intr_count >= 1 &&
1650 !pci_enable_msi(enic->pdev)) {
1651
1652 enic->rq_count = 1;
1653 enic->wq_count = 1;
1654 enic->cq_count = 2;
1655 enic->intr_count = 1;
1656
1657 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
1658
1659 return 0;
1660 }
1661
1662 /* Next try INTx
1663 *
1664 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
1665 * (the first INTR is used for WQ/RQ)
1666 * (the second INTR is used for WQ/RQ errors)
1667 * (the last INTR is used for notifications)
1668 */
1669
1670 if (enic->config.intr_mode < 3 &&
1671 enic->rq_count >= 1 &&
1672 enic->wq_count >= 1 &&
1673 enic->cq_count >= 2 &&
1674 enic->intr_count >= 3) {
1675
1676 enic->rq_count = 1;
1677 enic->wq_count = 1;
1678 enic->cq_count = 2;
1679 enic->intr_count = 3;
1680
1681 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
1682
1683 return 0;
1684 }
1685
1686 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
1687
1688 return -EINVAL;
1689}
1690
1691static void enic_clear_intr_mode(struct enic *enic)
1692{
1693 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1694 case VNIC_DEV_INTR_MODE_MSIX:
1695 pci_disable_msix(enic->pdev);
1696 break;
1697 case VNIC_DEV_INTR_MODE_MSI:
1698 pci_disable_msi(enic->pdev);
1699 break;
1700 default:
1701 break;
1702 }
1703
1704 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
1705}
1706
afe29f7a
SH
1707static const struct net_device_ops enic_netdev_ops = {
1708 .ndo_open = enic_open,
1709 .ndo_stop = enic_stop,
00829823 1710 .ndo_start_xmit = enic_hard_start_xmit,
afe29f7a
SH
1711 .ndo_get_stats = enic_get_stats,
1712 .ndo_validate_addr = eth_validate_addr,
fe96aaa1 1713 .ndo_set_mac_address = eth_mac_addr,
afe29f7a
SH
1714 .ndo_set_multicast_list = enic_set_multicast_list,
1715 .ndo_change_mtu = enic_change_mtu,
1716 .ndo_vlan_rx_register = enic_vlan_rx_register,
1717 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
1718 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
1719 .ndo_tx_timeout = enic_tx_timeout,
1720#ifdef CONFIG_NET_POLL_CONTROLLER
1721 .ndo_poll_controller = enic_poll_controller,
1722#endif
1723};
1724
27e6c7d3
SF
1725static void enic_iounmap(struct enic *enic)
1726{
1727 unsigned int i;
1728
1729 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
1730 if (enic->bar[i].vaddr)
1731 iounmap(enic->bar[i].vaddr);
1732}
1733
01f2e4ea
SF
1734static int __devinit enic_probe(struct pci_dev *pdev,
1735 const struct pci_device_id *ent)
1736{
1737 struct net_device *netdev;
1738 struct enic *enic;
1739 int using_dac = 0;
1740 unsigned int i;
1741 int err;
1742
01f2e4ea
SF
1743 /* Allocate net device structure and initialize. Private
1744 * instance data is initialized to zero.
1745 */
1746
1747 netdev = alloc_etherdev(sizeof(struct enic));
1748 if (!netdev) {
1749 printk(KERN_ERR PFX "Etherdev alloc failed, aborting.\n");
1750 return -ENOMEM;
1751 }
1752
01f2e4ea
SF
1753 pci_set_drvdata(pdev, netdev);
1754
1755 SET_NETDEV_DEV(netdev, &pdev->dev);
1756
1757 enic = netdev_priv(netdev);
1758 enic->netdev = netdev;
1759 enic->pdev = pdev;
1760
1761 /* Setup PCI resources
1762 */
1763
1764 err = pci_enable_device(pdev);
1765 if (err) {
1766 printk(KERN_ERR PFX
4b75a442 1767 "Cannot enable PCI device, aborting.\n");
01f2e4ea
SF
1768 goto err_out_free_netdev;
1769 }
1770
1771 err = pci_request_regions(pdev, DRV_NAME);
1772 if (err) {
1773 printk(KERN_ERR PFX
4b75a442 1774 "Cannot request PCI regions, aborting.\n");
01f2e4ea
SF
1775 goto err_out_disable_device;
1776 }
1777
1778 pci_set_master(pdev);
1779
1780 /* Query PCI controller on system for DMA addressing
1781 * limitation for the device. Try 40-bit first, and
1782 * fail to 32-bit.
1783 */
1784
50cf156a 1785 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 1786 if (err) {
284901a9 1787 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea
SF
1788 if (err) {
1789 printk(KERN_ERR PFX
4b75a442 1790 "No usable DMA configuration, aborting.\n");
01f2e4ea
SF
1791 goto err_out_release_regions;
1792 }
284901a9 1793 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea
SF
1794 if (err) {
1795 printk(KERN_ERR PFX
4b75a442
SF
1796 "Unable to obtain 32-bit DMA "
1797 "for consistent allocations, aborting.\n");
01f2e4ea
SF
1798 goto err_out_release_regions;
1799 }
1800 } else {
50cf156a 1801 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea
SF
1802 if (err) {
1803 printk(KERN_ERR PFX
4b75a442
SF
1804 "Unable to obtain 40-bit DMA "
1805 "for consistent allocations, aborting.\n");
01f2e4ea
SF
1806 goto err_out_release_regions;
1807 }
1808 using_dac = 1;
1809 }
1810
27e6c7d3 1811 /* Map vNIC resources from BAR0-5
01f2e4ea
SF
1812 */
1813
27e6c7d3
SF
1814 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
1815 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
1816 continue;
1817 enic->bar[i].len = pci_resource_len(pdev, i);
1818 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
1819 if (!enic->bar[i].vaddr) {
1820 printk(KERN_ERR PFX
1821 "Cannot memory-map BAR %d, aborting.\n", i);
1822 err = -ENODEV;
1823 goto err_out_iounmap;
1824 }
1825 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF
1826 }
1827
1828 /* Register vNIC device
1829 */
1830
27e6c7d3
SF
1831 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
1832 ARRAY_SIZE(enic->bar));
01f2e4ea
SF
1833 if (!enic->vdev) {
1834 printk(KERN_ERR PFX
4b75a442 1835 "vNIC registration failed, aborting.\n");
01f2e4ea
SF
1836 err = -ENODEV;
1837 goto err_out_iounmap;
1838 }
1839
1840 /* Issue device open to get device in known state
1841 */
1842
1843 err = enic_dev_open(enic);
1844 if (err) {
1845 printk(KERN_ERR PFX
4b75a442 1846 "vNIC dev open failed, aborting.\n");
01f2e4ea
SF
1847 goto err_out_vnic_unregister;
1848 }
1849
1850 /* Issue device init to initialize the vnic-to-switch link.
1851 * We'll start with carrier off and wait for link UP
1852 * notification later to turn on carrier. We don't need
1853 * to wait here for the vnic-to-switch link initialization
1854 * to complete; link UP notification is the indication that
1855 * the process is complete.
1856 */
1857
1858 netif_carrier_off(netdev);
1859
1860 err = vnic_dev_init(enic->vdev, 0);
1861 if (err) {
1862 printk(KERN_ERR PFX
4b75a442 1863 "vNIC dev init failed, aborting.\n");
01f2e4ea
SF
1864 goto err_out_dev_close;
1865 }
1866
1867 /* Get vNIC configuration
1868 */
1869
1870 err = enic_get_vnic_config(enic);
1871 if (err) {
1872 printk(KERN_ERR PFX
4b75a442 1873 "Get vNIC configuration failed, aborting.\n");
01f2e4ea
SF
1874 goto err_out_dev_close;
1875 }
1876
1877 /* Get available resource counts
86ca9db7 1878 */
01f2e4ea
SF
1879
1880 enic_get_res_counts(enic);
1881
1882 /* Set interrupt mode based on resource counts and system
1883 * capabilities
86ca9db7 1884 */
01f2e4ea
SF
1885
1886 err = enic_set_intr_mode(enic);
1887 if (err) {
1888 printk(KERN_ERR PFX
4b75a442 1889 "Failed to set intr mode, aborting.\n");
01f2e4ea
SF
1890 goto err_out_dev_close;
1891 }
1892
1893 /* Allocate and configure vNIC resources
1894 */
1895
1896 err = enic_alloc_vnic_resources(enic);
1897 if (err) {
1898 printk(KERN_ERR PFX
4b75a442 1899 "Failed to alloc vNIC resources, aborting.\n");
01f2e4ea
SF
1900 goto err_out_free_vnic_resources;
1901 }
1902
1903 enic_init_vnic_resources(enic);
1904
68f71708 1905 err = enic_set_niccfg(enic);
01f2e4ea
SF
1906 if (err) {
1907 printk(KERN_ERR PFX
4b75a442 1908 "Failed to config nic, aborting.\n");
01f2e4ea
SF
1909 goto err_out_free_vnic_resources;
1910 }
1911
1912 /* Setup notification timer, HW reset task, and locks
1913 */
1914
1915 init_timer(&enic->notify_timer);
1916 enic->notify_timer.function = enic_notify_timer;
1917 enic->notify_timer.data = (unsigned long)enic;
1918
1919 INIT_WORK(&enic->reset, enic_reset);
1920
1921 for (i = 0; i < enic->wq_count; i++)
1922 spin_lock_init(&enic->wq_lock[i]);
1923
1924 spin_lock_init(&enic->devcmd_lock);
1925
1926 /* Register net device
1927 */
1928
1929 enic->port_mtu = enic->config.mtu;
1930 (void)enic_change_mtu(netdev, enic->port_mtu);
1931
1932 err = enic_set_mac_addr(netdev, enic->mac_addr);
1933 if (err) {
1934 printk(KERN_ERR PFX
4b75a442
SF
1935 "Invalid MAC address, aborting.\n");
1936 goto err_out_free_vnic_resources;
01f2e4ea
SF
1937 }
1938
afe29f7a 1939 netdev->netdev_ops = &enic_netdev_ops;
01f2e4ea
SF
1940 netdev->watchdog_timeo = 2 * HZ;
1941 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea
SF
1942
1943 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1944 default:
1945 netif_napi_add(netdev, &enic->napi, enic_poll, 64);
1946 break;
1947 case VNIC_DEV_INTR_MODE_MSIX:
1948 netif_napi_add(netdev, &enic->napi, enic_poll_msix, 64);
1949 break;
1950 }
1951
1952 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1953 if (ENIC_SETTING(enic, TXCSUM))
1954 netdev->features |= NETIF_F_SG | NETIF_F_HW_CSUM;
1955 if (ENIC_SETTING(enic, TSO))
1956 netdev->features |= NETIF_F_TSO |
1957 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
86ca9db7
SF
1958 if (ENIC_SETTING(enic, LRO))
1959 netdev->features |= NETIF_F_LRO;
01f2e4ea
SF
1960 if (using_dac)
1961 netdev->features |= NETIF_F_HIGHDMA;
1962
01f2e4ea
SF
1963 enic->csum_rx_enabled = ENIC_SETTING(enic, RXCSUM);
1964
86ca9db7
SF
1965 enic->lro_mgr.max_aggr = ENIC_LRO_MAX_AGGR;
1966 enic->lro_mgr.max_desc = ENIC_LRO_MAX_DESC;
1967 enic->lro_mgr.lro_arr = enic->lro_desc;
1968 enic->lro_mgr.get_skb_header = enic_get_skb_header;
1969 enic->lro_mgr.features = LRO_F_NAPI | LRO_F_EXTRACT_VLAN_ID;
1970 enic->lro_mgr.dev = netdev;
1971 enic->lro_mgr.ip_summed = CHECKSUM_COMPLETE;
1972 enic->lro_mgr.ip_summed_aggr = CHECKSUM_UNNECESSARY;
1973
01f2e4ea
SF
1974 err = register_netdev(netdev);
1975 if (err) {
1976 printk(KERN_ERR PFX
4b75a442
SF
1977 "Cannot register net device, aborting.\n");
1978 goto err_out_free_vnic_resources;
01f2e4ea
SF
1979 }
1980
1981 return 0;
1982
01f2e4ea
SF
1983err_out_free_vnic_resources:
1984 enic_free_vnic_resources(enic);
01f2e4ea
SF
1985err_out_dev_close:
1986 vnic_dev_close(enic->vdev);
1987err_out_vnic_unregister:
1988 enic_clear_intr_mode(enic);
1989 vnic_dev_unregister(enic->vdev);
1990err_out_iounmap:
1991 enic_iounmap(enic);
1992err_out_release_regions:
1993 pci_release_regions(pdev);
1994err_out_disable_device:
1995 pci_disable_device(pdev);
1996err_out_free_netdev:
1997 pci_set_drvdata(pdev, NULL);
1998 free_netdev(netdev);
1999
2000 return err;
2001}
2002
2003static void __devexit enic_remove(struct pci_dev *pdev)
2004{
2005 struct net_device *netdev = pci_get_drvdata(pdev);
2006
2007 if (netdev) {
2008 struct enic *enic = netdev_priv(netdev);
2009
2010 flush_scheduled_work();
2011 unregister_netdev(netdev);
01f2e4ea 2012 enic_free_vnic_resources(enic);
01f2e4ea
SF
2013 vnic_dev_close(enic->vdev);
2014 enic_clear_intr_mode(enic);
2015 vnic_dev_unregister(enic->vdev);
2016 enic_iounmap(enic);
2017 pci_release_regions(pdev);
2018 pci_disable_device(pdev);
2019 pci_set_drvdata(pdev, NULL);
2020 free_netdev(netdev);
2021 }
2022}
2023
2024static struct pci_driver enic_driver = {
2025 .name = DRV_NAME,
2026 .id_table = enic_id_table,
2027 .probe = enic_probe,
2028 .remove = __devexit_p(enic_remove),
2029};
2030
2031static int __init enic_init_module(void)
2032{
2033 printk(KERN_INFO PFX "%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
2034
2035 return pci_register_driver(&enic_driver);
2036}
2037
2038static void __exit enic_cleanup_module(void)
2039{
2040 pci_unregister_driver(&enic_driver);
2041}
2042
2043module_init(enic_init_module);
2044module_exit(enic_cleanup_module);
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