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01f2e4ea SF |
1 | /* |
2 | * Copyright 2008 Cisco Systems, Inc. All rights reserved. | |
3 | * Copyright 2007 Nuova Systems, Inc. All rights reserved. | |
4 | * | |
5 | * This program is free software; you may redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License as published by | |
7 | * the Free Software Foundation; version 2 of the License. | |
8 | * | |
9 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, | |
10 | * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
11 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND | |
12 | * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS | |
13 | * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN | |
14 | * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN | |
15 | * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE | |
16 | * SOFTWARE. | |
17 | * | |
18 | */ | |
19 | ||
20 | #include <linux/kernel.h> | |
21 | #include <linux/errno.h> | |
22 | #include <linux/types.h> | |
23 | #include <linux/pci.h> | |
24 | #include <linux/netdevice.h> | |
25 | ||
26 | #include "wq_enet_desc.h" | |
27 | #include "rq_enet_desc.h" | |
28 | #include "cq_enet_desc.h" | |
29 | #include "vnic_resource.h" | |
30 | #include "vnic_enet.h" | |
31 | #include "vnic_dev.h" | |
32 | #include "vnic_wq.h" | |
33 | #include "vnic_rq.h" | |
34 | #include "vnic_cq.h" | |
35 | #include "vnic_intr.h" | |
36 | #include "vnic_stats.h" | |
37 | #include "vnic_nic.h" | |
38 | #include "vnic_rss.h" | |
39 | #include "enic_res.h" | |
40 | #include "enic.h" | |
41 | ||
42 | int enic_get_vnic_config(struct enic *enic) | |
43 | { | |
44 | struct vnic_enet_config *c = &enic->config; | |
45 | int err; | |
46 | ||
47 | err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr); | |
48 | if (err) { | |
49 | printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err); | |
50 | return err; | |
51 | } | |
52 | ||
53 | #define GET_CONFIG(m) \ | |
54 | do { \ | |
55 | err = vnic_dev_spec(enic->vdev, \ | |
56 | offsetof(struct vnic_enet_config, m), \ | |
57 | sizeof(c->m), &c->m); \ | |
58 | if (err) { \ | |
59 | printk(KERN_ERR PFX \ | |
60 | "Error getting %s, %d\n", #m, err); \ | |
61 | return err; \ | |
62 | } \ | |
63 | } while (0) | |
64 | ||
65 | GET_CONFIG(flags); | |
66 | GET_CONFIG(wq_desc_count); | |
67 | GET_CONFIG(rq_desc_count); | |
68 | GET_CONFIG(mtu); | |
01f2e4ea SF |
69 | GET_CONFIG(intr_timer_type); |
70 | GET_CONFIG(intr_mode); | |
7c844599 | 71 | GET_CONFIG(intr_timer_usec); |
01f2e4ea SF |
72 | |
73 | c->wq_desc_count = | |
74 | min_t(u32, ENIC_MAX_WQ_DESCS, | |
75 | max_t(u32, ENIC_MIN_WQ_DESCS, | |
76 | c->wq_desc_count)); | |
bd249622 | 77 | c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */ |
01f2e4ea SF |
78 | |
79 | c->rq_desc_count = | |
80 | min_t(u32, ENIC_MAX_RQ_DESCS, | |
81 | max_t(u32, ENIC_MIN_RQ_DESCS, | |
82 | c->rq_desc_count)); | |
bd249622 | 83 | c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */ |
01f2e4ea SF |
84 | |
85 | if (c->mtu == 0) | |
86 | c->mtu = 1500; | |
87 | c->mtu = min_t(u16, ENIC_MAX_MTU, | |
88 | max_t(u16, ENIC_MIN_MTU, | |
89 | c->mtu)); | |
90 | ||
7c844599 SF |
91 | c->intr_timer_usec = min_t(u32, |
92 | INTR_COALESCE_HW_TO_USEC(VNIC_INTR_TIMER_MAX), | |
93 | c->intr_timer_usec); | |
01f2e4ea | 94 | |
7c510e4b JB |
95 | printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n", |
96 | enic->mac_addr, c->wq_desc_count, c->rq_desc_count); | |
01f2e4ea | 97 | printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d " |
7c844599 | 98 | "intr timer %d usec\n", |
01f2e4ea SF |
99 | c->mtu, ENIC_SETTING(enic, TXCSUM), |
100 | ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO), | |
7c844599 | 101 | ENIC_SETTING(enic, LRO), c->intr_timer_usec); |
01f2e4ea SF |
102 | |
103 | return 0; | |
104 | } | |
105 | ||
106 | void enic_add_station_addr(struct enic *enic) | |
107 | { | |
108 | vnic_dev_add_addr(enic->vdev, enic->mac_addr); | |
109 | } | |
110 | ||
111 | void enic_add_multicast_addr(struct enic *enic, u8 *addr) | |
112 | { | |
113 | vnic_dev_add_addr(enic->vdev, addr); | |
114 | } | |
115 | ||
116 | void enic_del_multicast_addr(struct enic *enic, u8 *addr) | |
117 | { | |
118 | vnic_dev_del_addr(enic->vdev, addr); | |
119 | } | |
120 | ||
121 | void enic_add_vlan(struct enic *enic, u16 vlanid) | |
122 | { | |
123 | u64 a0 = vlanid, a1 = 0; | |
124 | int wait = 1000; | |
125 | int err; | |
126 | ||
127 | err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait); | |
128 | if (err) | |
129 | printk(KERN_ERR PFX "Can't add vlan id, %d\n", err); | |
130 | } | |
131 | ||
132 | void enic_del_vlan(struct enic *enic, u16 vlanid) | |
133 | { | |
134 | u64 a0 = vlanid, a1 = 0; | |
135 | int wait = 1000; | |
136 | int err; | |
137 | ||
138 | err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait); | |
139 | if (err) | |
140 | printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err); | |
141 | } | |
142 | ||
143 | int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type, | |
144 | u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en, | |
145 | u8 ig_vlan_strip_en) | |
146 | { | |
147 | u64 a0, a1; | |
148 | u32 nic_cfg; | |
149 | int wait = 1000; | |
150 | ||
151 | vnic_set_nic_cfg(&nic_cfg, rss_default_cpu, | |
152 | rss_hash_type, rss_hash_bits, rss_base_cpu, | |
153 | rss_enable, tso_ipid_split_en, ig_vlan_strip_en); | |
154 | ||
155 | a0 = nic_cfg; | |
156 | a1 = 0; | |
157 | ||
158 | return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait); | |
159 | } | |
160 | ||
6ba9cdc0 SF |
161 | int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len) |
162 | { | |
163 | u64 a0 = (u64)key_pa, a1 = len; | |
164 | int wait = 1000; | |
165 | ||
166 | return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait); | |
167 | } | |
168 | ||
169 | int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len) | |
170 | { | |
171 | u64 a0 = (u64)cpu_pa, a1 = len; | |
172 | int wait = 1000; | |
173 | ||
174 | return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait); | |
175 | } | |
176 | ||
01f2e4ea SF |
177 | void enic_free_vnic_resources(struct enic *enic) |
178 | { | |
179 | unsigned int i; | |
180 | ||
181 | for (i = 0; i < enic->wq_count; i++) | |
182 | vnic_wq_free(&enic->wq[i]); | |
183 | for (i = 0; i < enic->rq_count; i++) | |
184 | vnic_rq_free(&enic->rq[i]); | |
185 | for (i = 0; i < enic->cq_count; i++) | |
186 | vnic_cq_free(&enic->cq[i]); | |
187 | for (i = 0; i < enic->intr_count; i++) | |
188 | vnic_intr_free(&enic->intr[i]); | |
189 | } | |
190 | ||
191 | void enic_get_res_counts(struct enic *enic) | |
192 | { | |
6ba9cdc0 SF |
193 | enic->wq_count = min_t(int, |
194 | vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ), | |
195 | ENIC_WQ_MAX); | |
196 | enic->rq_count = min_t(int, | |
197 | vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ), | |
198 | ENIC_RQ_MAX); | |
199 | enic->cq_count = min_t(int, | |
200 | vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ), | |
201 | ENIC_CQ_MAX); | |
202 | enic->intr_count = min_t(int, | |
203 | vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL), | |
204 | ENIC_INTR_MAX); | |
01f2e4ea SF |
205 | |
206 | printk(KERN_INFO PFX "vNIC resources avail: " | |
207 | "wq %d rq %d cq %d intr %d\n", | |
208 | enic->wq_count, enic->rq_count, | |
209 | enic->cq_count, enic->intr_count); | |
210 | } | |
211 | ||
212 | void enic_init_vnic_resources(struct enic *enic) | |
213 | { | |
214 | enum vnic_dev_intr_mode intr_mode; | |
215 | unsigned int mask_on_assertion; | |
216 | unsigned int interrupt_offset; | |
217 | unsigned int error_interrupt_enable; | |
218 | unsigned int error_interrupt_offset; | |
219 | unsigned int cq_index; | |
220 | unsigned int i; | |
221 | ||
222 | intr_mode = vnic_dev_get_intr_mode(enic->vdev); | |
223 | ||
224 | /* Init RQ/WQ resources. | |
225 | * | |
226 | * RQ[0 - n-1] point to CQ[0 - n-1] | |
227 | * WQ[0 - m-1] point to CQ[n - n+m-1] | |
228 | * | |
229 | * Error interrupt is not enabled for MSI. | |
230 | */ | |
231 | ||
232 | switch (intr_mode) { | |
233 | case VNIC_DEV_INTR_MODE_INTX: | |
234 | case VNIC_DEV_INTR_MODE_MSIX: | |
235 | error_interrupt_enable = 1; | |
236 | error_interrupt_offset = enic->intr_count - 2; | |
237 | break; | |
238 | default: | |
239 | error_interrupt_enable = 0; | |
240 | error_interrupt_offset = 0; | |
241 | break; | |
242 | } | |
243 | ||
244 | for (i = 0; i < enic->rq_count; i++) { | |
245 | cq_index = i; | |
246 | vnic_rq_init(&enic->rq[i], | |
247 | cq_index, | |
248 | error_interrupt_enable, | |
249 | error_interrupt_offset); | |
250 | } | |
251 | ||
252 | for (i = 0; i < enic->wq_count; i++) { | |
253 | cq_index = enic->rq_count + i; | |
254 | vnic_wq_init(&enic->wq[i], | |
255 | cq_index, | |
256 | error_interrupt_enable, | |
257 | error_interrupt_offset); | |
258 | } | |
259 | ||
260 | /* Init CQ resources | |
261 | * | |
262 | * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI | |
263 | * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X | |
264 | */ | |
265 | ||
266 | for (i = 0; i < enic->cq_count; i++) { | |
267 | ||
268 | switch (intr_mode) { | |
269 | case VNIC_DEV_INTR_MODE_MSIX: | |
270 | interrupt_offset = i; | |
271 | break; | |
272 | default: | |
273 | interrupt_offset = 0; | |
274 | break; | |
275 | } | |
276 | ||
277 | vnic_cq_init(&enic->cq[i], | |
278 | 0 /* flow_control_enable */, | |
279 | 1 /* color_enable */, | |
280 | 0 /* cq_head */, | |
281 | 0 /* cq_tail */, | |
282 | 1 /* cq_tail_color */, | |
283 | 1 /* interrupt_enable */, | |
284 | 1 /* cq_entry_enable */, | |
285 | 0 /* cq_message_enable */, | |
286 | interrupt_offset, | |
287 | 0 /* cq_message_addr */); | |
288 | } | |
289 | ||
290 | /* Init INTR resources | |
291 | * | |
292 | * mask_on_assertion is not used for INTx due to the level- | |
293 | * triggered nature of INTx | |
294 | */ | |
295 | ||
296 | switch (intr_mode) { | |
297 | case VNIC_DEV_INTR_MODE_MSI: | |
298 | case VNIC_DEV_INTR_MODE_MSIX: | |
299 | mask_on_assertion = 1; | |
300 | break; | |
301 | default: | |
302 | mask_on_assertion = 0; | |
303 | break; | |
304 | } | |
305 | ||
306 | for (i = 0; i < enic->intr_count; i++) { | |
307 | vnic_intr_init(&enic->intr[i], | |
7c844599 | 308 | INTR_COALESCE_USEC_TO_HW(enic->config.intr_timer_usec), |
01f2e4ea SF |
309 | enic->config.intr_timer_type, |
310 | mask_on_assertion); | |
311 | } | |
312 | ||
313 | /* Clear LIF stats | |
314 | */ | |
315 | ||
316 | vnic_dev_stats_clear(enic->vdev); | |
317 | } | |
318 | ||
319 | int enic_alloc_vnic_resources(struct enic *enic) | |
320 | { | |
321 | enum vnic_dev_intr_mode intr_mode; | |
322 | unsigned int i; | |
323 | int err; | |
324 | ||
325 | intr_mode = vnic_dev_get_intr_mode(enic->vdev); | |
326 | ||
327 | printk(KERN_INFO PFX "vNIC resources used: " | |
328 | "wq %d rq %d cq %d intr %d intr mode %s\n", | |
329 | enic->wq_count, enic->rq_count, | |
330 | enic->cq_count, enic->intr_count, | |
331 | intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" : | |
332 | intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" : | |
333 | intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" : | |
334 | "unknown" | |
335 | ); | |
336 | ||
337 | /* Allocate queue resources | |
338 | */ | |
339 | ||
340 | for (i = 0; i < enic->wq_count; i++) { | |
341 | err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i, | |
342 | enic->config.wq_desc_count, | |
343 | sizeof(struct wq_enet_desc)); | |
344 | if (err) | |
345 | goto err_out_cleanup; | |
346 | } | |
347 | ||
348 | for (i = 0; i < enic->rq_count; i++) { | |
349 | err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i, | |
350 | enic->config.rq_desc_count, | |
351 | sizeof(struct rq_enet_desc)); | |
352 | if (err) | |
353 | goto err_out_cleanup; | |
354 | } | |
355 | ||
356 | for (i = 0; i < enic->cq_count; i++) { | |
357 | if (i < enic->rq_count) | |
358 | err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i, | |
359 | enic->config.rq_desc_count, | |
360 | sizeof(struct cq_enet_rq_desc)); | |
361 | else | |
362 | err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i, | |
363 | enic->config.wq_desc_count, | |
364 | sizeof(struct cq_enet_wq_desc)); | |
365 | if (err) | |
366 | goto err_out_cleanup; | |
367 | } | |
368 | ||
369 | for (i = 0; i < enic->intr_count; i++) { | |
370 | err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i); | |
371 | if (err) | |
372 | goto err_out_cleanup; | |
373 | } | |
374 | ||
375 | /* Hook remaining resource | |
376 | */ | |
377 | ||
378 | enic->legacy_pba = vnic_dev_get_res(enic->vdev, | |
379 | RES_TYPE_INTR_PBA_LEGACY, 0); | |
380 | if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) { | |
381 | printk(KERN_ERR PFX "Failed to hook legacy pba resource\n"); | |
382 | err = -ENODEV; | |
383 | goto err_out_cleanup; | |
384 | } | |
385 | ||
386 | return 0; | |
387 | ||
388 | err_out_cleanup: | |
389 | enic_free_vnic_resources(enic); | |
390 | ||
391 | return err; | |
392 | } |