[deliverable/linux.git] / drivers / net / enic / enic_res.c

/*
 * Copyright 2008 Cisco Systems, Inc.  All rights reserved.
 * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
 *
 * This program is free software; you may redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/types.h>
#include <linux/pci.h>
#include <linux/netdevice.h>

#include "wq_enet_desc.h"
#include "rq_enet_desc.h"
#include "cq_enet_desc.h"
#include "vnic_resource.h"
#include "vnic_enet.h"
#include "vnic_dev.h"
#include "vnic_wq.h"
#include "vnic_rq.h"
#include "vnic_cq.h"
#include "vnic_intr.h"
#include "vnic_stats.h"
#include "vnic_nic.h"
#include "vnic_rss.h"
#include "enic_res.h"
#include "enic.h"

int enic_get_vnic_config(struct enic *enic)
{
	struct vnic_enet_config *c = &enic->config;
	int err;

	err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
	if (err) {
		printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
		return err;
	}

#define GET_CONFIG(m) \
	do { \
		err = vnic_dev_spec(enic->vdev, \
			offsetof(struct vnic_enet_config, m), \
			sizeof(c->m), &c->m); \
		if (err) { \
			printk(KERN_ERR PFX \
				"Error getting %s, %d\n", #m, err); \
			return err; \
		} \
	} while (0)

	GET_CONFIG(flags);
	GET_CONFIG(wq_desc_count);
	GET_CONFIG(rq_desc_count);
	GET_CONFIG(mtu);
	GET_CONFIG(intr_timer);
	GET_CONFIG(intr_timer_type);
	GET_CONFIG(intr_mode);

	c->wq_desc_count =
		min_t(u32, ENIC_MAX_WQ_DESCS,
		max_t(u32, ENIC_MIN_WQ_DESCS,
		c->wq_desc_count));
	c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */

	c->rq_desc_count =
		min_t(u32, ENIC_MAX_RQ_DESCS,
		max_t(u32, ENIC_MIN_RQ_DESCS,
		c->rq_desc_count));
	c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */

	if (c->mtu == 0)
		c->mtu = 1500;
	c->mtu = min_t(u16, ENIC_MAX_MTU,
		max_t(u16, ENIC_MIN_MTU,
		c->mtu));

	c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);

	printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n",
		enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
	printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
		"intr timer %d\n",
		c->mtu, ENIC_SETTING(enic, TXCSUM),
		ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
		ENIC_SETTING(enic, LRO), c->intr_timer);

	return 0;
}

void enic_add_station_addr(struct enic *enic)
{
	vnic_dev_add_addr(enic->vdev, enic->mac_addr);
}

void enic_add_multicast_addr(struct enic *enic, u8 *addr)
{
	vnic_dev_add_addr(enic->vdev, addr);
}

void enic_del_multicast_addr(struct enic *enic, u8 *addr)
{
	vnic_dev_del_addr(enic->vdev, addr);
}

void enic_add_vlan(struct enic *enic, u16 vlanid)
{
	u64 a0 = vlanid, a1 = 0;
	int wait = 1000;
	int err;

	err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
	if (err)
		printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
}

void enic_del_vlan(struct enic *enic, u16 vlanid)
{
	u64 a0 = vlanid, a1 = 0;
	int wait = 1000;
	int err;

	err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
	if (err)
		printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
}

int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
	u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
	u8 ig_vlan_strip_en)
{
	u64 a0, a1;
	u32 nic_cfg;
	int wait = 1000;

	vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
		rss_hash_type, rss_hash_bits, rss_base_cpu,
		rss_enable, tso_ipid_split_en, ig_vlan_strip_en);

	a0 = nic_cfg;
	a1 = 0;

	return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
}

int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
{
	u64 a0 = (u64)key_pa, a1 = len;
	int wait = 1000;

	return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
}

int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
{
	u64 a0 = (u64)cpu_pa, a1 = len;
	int wait = 1000;

	return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
}

void enic_free_vnic_resources(struct enic *enic)
{
	unsigned int i;

	for (i = 0; i < enic->wq_count; i++)
		vnic_wq_free(&enic->wq[i]);
	for (i = 0; i < enic->rq_count; i++)
		vnic_rq_free(&enic->rq[i]);
	for (i = 0; i < enic->cq_count; i++)
		vnic_cq_free(&enic->cq[i]);
	for (i = 0; i < enic->intr_count; i++)
		vnic_intr_free(&enic->intr[i]);
}

void enic_get_res_counts(struct enic *enic)
{
	enic->wq_count = min_t(int,
		vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
		ENIC_WQ_MAX);
	enic->rq_count = min_t(int,
		vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
		ENIC_RQ_MAX);
	enic->cq_count = min_t(int,
		vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
		ENIC_CQ_MAX);
	enic->intr_count = min_t(int,
		vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
		ENIC_INTR_MAX);

	printk(KERN_INFO PFX "vNIC resources avail: "
		"wq %d rq %d cq %d intr %d\n",
		enic->wq_count, enic->rq_count,
		enic->cq_count, enic->intr_count);
}

void enic_init_vnic_resources(struct enic *enic)
{
	enum vnic_dev_intr_mode intr_mode;
	unsigned int mask_on_assertion;
	unsigned int interrupt_offset;
	unsigned int error_interrupt_enable;
	unsigned int error_interrupt_offset;
	unsigned int cq_index;
	unsigned int i;

	intr_mode = vnic_dev_get_intr_mode(enic->vdev);

	/* Init RQ/WQ resources.
	 *
	 * RQ[0 - n-1] point to CQ[0 - n-1]
	 * WQ[0 - m-1] point to CQ[n - n+m-1]
	 *
	 * Error interrupt is not enabled for MSI.
	 */

	switch (intr_mode) {
	case VNIC_DEV_INTR_MODE_INTX:
	case VNIC_DEV_INTR_MODE_MSIX:
		error_interrupt_enable = 1;
		error_interrupt_offset = enic->intr_count - 2;
		break;
	default:
		error_interrupt_enable = 0;
		error_interrupt_offset = 0;
		break;
	}

	for (i = 0; i < enic->rq_count; i++) {
		cq_index = i;
		vnic_rq_init(&enic->rq[i],
			cq_index,
			error_interrupt_enable,
			error_interrupt_offset);
	}

	for (i = 0; i < enic->wq_count; i++) {
		cq_index = enic->rq_count + i;
		vnic_wq_init(&enic->wq[i],
			cq_index,
			error_interrupt_enable,
			error_interrupt_offset);
	}

	/* Init CQ resources
	 *
	 * CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
	 * CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
	 */

	for (i = 0; i < enic->cq_count; i++) {

		switch (intr_mode) {
		case VNIC_DEV_INTR_MODE_MSIX:
			interrupt_offset = i;
			break;
		default:
			interrupt_offset = 0;
			break;
		}

		vnic_cq_init(&enic->cq[i],
			0 /* flow_control_enable */,
			1 /* color_enable */,
			0 /* cq_head */,
			0 /* cq_tail */,
			1 /* cq_tail_color */,
			1 /* interrupt_enable */,
			1 /* cq_entry_enable */,
			0 /* cq_message_enable */,
			interrupt_offset,
			0 /* cq_message_addr */);
	}

	/* Init INTR resources
	 *
	 * mask_on_assertion is not used for INTx due to the level-
	 * triggered nature of INTx
	 */

	switch (intr_mode) {
	case VNIC_DEV_INTR_MODE_MSI:
	case VNIC_DEV_INTR_MODE_MSIX:
		mask_on_assertion = 1;
		break;
	default:
		mask_on_assertion = 0;
		break;
	}

	for (i = 0; i < enic->intr_count; i++) {
		vnic_intr_init(&enic->intr[i],
			enic->config.intr_timer,
			enic->config.intr_timer_type,
			mask_on_assertion);
	}

	/* Clear LIF stats
	 */

	vnic_dev_stats_clear(enic->vdev);
}

int enic_alloc_vnic_resources(struct enic *enic)
{
	enum vnic_dev_intr_mode intr_mode;
	unsigned int i;
	int err;

	intr_mode = vnic_dev_get_intr_mode(enic->vdev);

	printk(KERN_INFO PFX "vNIC resources used:  "
		"wq %d rq %d cq %d intr %d intr mode %s\n",
		enic->wq_count, enic->rq_count,
		enic->cq_count, enic->intr_count,
		intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
		intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
		intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
		"unknown"
		);

	/* Allocate queue resources
	 */

	for (i = 0; i < enic->wq_count; i++) {
		err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
			enic->config.wq_desc_count,
			sizeof(struct wq_enet_desc));
		if (err)
			goto err_out_cleanup;
	}

	for (i = 0; i < enic->rq_count; i++) {
		err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
			enic->config.rq_desc_count,
			sizeof(struct rq_enet_desc));
		if (err)
			goto err_out_cleanup;
	}

	for (i = 0; i < enic->cq_count; i++) {
		if (i < enic->rq_count)
			err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
				enic->config.rq_desc_count,
				sizeof(struct cq_enet_rq_desc));
		else
			err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
				enic->config.wq_desc_count,
				sizeof(struct cq_enet_wq_desc));
		if (err)
			goto err_out_cleanup;
	}

	for (i = 0; i < enic->intr_count; i++) {
		err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
		if (err)
			goto err_out_cleanup;
	}

	/* Hook remaining resource
	 */

	enic->legacy_pba = vnic_dev_get_res(enic->vdev,
		RES_TYPE_INTR_PBA_LEGACY, 0);
	if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
		printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
		err = -ENODEV;
		goto err_out_cleanup;
	}

	return 0;

err_out_cleanup:
	enic_free_vnic_resources(enic);

	return err;
}
Commit	Line	Data
01f2e4ea SF	1	/*
	2	* Copyright 2008 Cisco Systems, Inc. All rights reserved.
	3	* Copyright 2007 Nuova Systems, Inc. All rights reserved.
	4	*
	5	* This program is free software; you may redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation; version 2 of the License.
	8	*
	9	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	10	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	11	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	12	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
	13	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	14	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	15	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	16	* SOFTWARE.
	17	*
	18	*/
	19
	20	#include <linux/kernel.h>
	21	#include <linux/errno.h>
	22	#include <linux/types.h>
	23	#include <linux/pci.h>
	24	#include <linux/netdevice.h>
	25
	26	#include "wq_enet_desc.h"
	27	#include "rq_enet_desc.h"
	28	#include "cq_enet_desc.h"
	29	#include "vnic_resource.h"
	30	#include "vnic_enet.h"
	31	#include "vnic_dev.h"
	32	#include "vnic_wq.h"
	33	#include "vnic_rq.h"
	34	#include "vnic_cq.h"
	35	#include "vnic_intr.h"
	36	#include "vnic_stats.h"
	37	#include "vnic_nic.h"
	38	#include "vnic_rss.h"
	39	#include "enic_res.h"
	40	#include "enic.h"
	41
	42	int enic_get_vnic_config(struct enic *enic)
	43	{
	44	struct vnic_enet_config *c = &enic->config;
	45	int err;
	46
	47	err = vnic_dev_mac_addr(enic->vdev, enic->mac_addr);
	48	if (err) {
	49	printk(KERN_ERR PFX "Error getting MAC addr, %d\n", err);
	50	return err;
	51	}
	52
	53	#define GET_CONFIG(m) \
	54	do { \
	55	err = vnic_dev_spec(enic->vdev, \
	56	offsetof(struct vnic_enet_config, m), \
	57	sizeof(c->m), &c->m); \
	58	if (err) { \
	59	printk(KERN_ERR PFX \
	60	"Error getting %s, %d\n", #m, err); \
	61	return err; \
	62	} \
	63	} while (0)
	64
65	GET_CONFIG(flags);
66	GET_CONFIG(wq_desc_count);
67	GET_CONFIG(rq_desc_count);
68	GET_CONFIG(mtu);
69	GET_CONFIG(intr_timer);
70	GET_CONFIG(intr_timer_type);
71	GET_CONFIG(intr_mode);
72
73	c->wq_desc_count =
74	min_t(u32, ENIC_MAX_WQ_DESCS,
75	max_t(u32, ENIC_MIN_WQ_DESCS,
76	c->wq_desc_count));
bd249622	77	c->wq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
01f2e4ea SF	78
	79	c->rq_desc_count =
	80	min_t(u32, ENIC_MAX_RQ_DESCS,
	81	max_t(u32, ENIC_MIN_RQ_DESCS,
	82	c->rq_desc_count));
bd249622	83	c->rq_desc_count &= 0xffffffe0; /* must be aligned to groups of 32 */
01f2e4ea SF	84
	85	if (c->mtu == 0)
	86	c->mtu = 1500;
	87	c->mtu = min_t(u16, ENIC_MAX_MTU,
	88	max_t(u16, ENIC_MIN_MTU,
	89	c->mtu));
	90
	91	c->intr_timer = min_t(u16, VNIC_INTR_TIMER_MAX, c->intr_timer);
	92
7c510e4b JB	93	printk(KERN_INFO PFX "vNIC MAC addr %pM wq/rq %d/%d\n",
7c510e4b JB	94	enic->mac_addr, c->wq_desc_count, c->rq_desc_count);
01f2e4ea SF	95	printk(KERN_INFO PFX "vNIC mtu %d csum tx/rx %d/%d tso/lro %d/%d "
	96	"intr timer %d\n",
	97	c->mtu, ENIC_SETTING(enic, TXCSUM),
	98	ENIC_SETTING(enic, RXCSUM), ENIC_SETTING(enic, TSO),
	99	ENIC_SETTING(enic, LRO), c->intr_timer);
	100
	101	return 0;
	102	}
	103
	104	void enic_add_station_addr(struct enic *enic)
	105	{
	106	vnic_dev_add_addr(enic->vdev, enic->mac_addr);
	107	}
	108
	109	void enic_add_multicast_addr(struct enic enic, u8 addr)
	110	{
	111	vnic_dev_add_addr(enic->vdev, addr);
	112	}
	113
	114	void enic_del_multicast_addr(struct enic enic, u8 addr)
	115	{
	116	vnic_dev_del_addr(enic->vdev, addr);
	117	}
	118
	119	void enic_add_vlan(struct enic *enic, u16 vlanid)
	120	{
	121	u64 a0 = vlanid, a1 = 0;
	122	int wait = 1000;
	123	int err;
	124
	125	err = vnic_dev_cmd(enic->vdev, CMD_VLAN_ADD, &a0, &a1, wait);
	126	if (err)
	127	printk(KERN_ERR PFX "Can't add vlan id, %d\n", err);
	128	}
	129
	130	void enic_del_vlan(struct enic *enic, u16 vlanid)
	131	{
	132	u64 a0 = vlanid, a1 = 0;
	133	int wait = 1000;
	134	int err;
	135
	136	err = vnic_dev_cmd(enic->vdev, CMD_VLAN_DEL, &a0, &a1, wait);
	137	if (err)
	138	printk(KERN_ERR PFX "Can't delete vlan id, %d\n", err);
	139	}
	140
	141	int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
	142	u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
	143	u8 ig_vlan_strip_en)
	144	{
	145	u64 a0, a1;
	146	u32 nic_cfg;
	147	int wait = 1000;
	148
	149	vnic_set_nic_cfg(&nic_cfg, rss_default_cpu,
	150	rss_hash_type, rss_hash_bits, rss_base_cpu,
	151	rss_enable, tso_ipid_split_en, ig_vlan_strip_en);
	152
	153	a0 = nic_cfg;
	154	a1 = 0;
	155
	156	return vnic_dev_cmd(enic->vdev, CMD_NIC_CFG, &a0, &a1, wait);
	157	}
	158
6ba9cdc0 SF	159	int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len)
	160	{
	161	u64 a0 = (u64)key_pa, a1 = len;
	162	int wait = 1000;
	163
	164	return vnic_dev_cmd(enic->vdev, CMD_RSS_KEY, &a0, &a1, wait);
	165	}
	166
	167	int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len)
	168	{
	169	u64 a0 = (u64)cpu_pa, a1 = len;
	170	int wait = 1000;
	171
	172	return vnic_dev_cmd(enic->vdev, CMD_RSS_CPU, &a0, &a1, wait);
	173	}
	174
01f2e4ea SF	175	void enic_free_vnic_resources(struct enic *enic)
	176	{
	177	unsigned int i;
	178
	179	for (i = 0; i < enic->wq_count; i++)
	180	vnic_wq_free(&enic->wq[i]);
	181	for (i = 0; i < enic->rq_count; i++)
	182	vnic_rq_free(&enic->rq[i]);
	183	for (i = 0; i < enic->cq_count; i++)
	184	vnic_cq_free(&enic->cq[i]);
	185	for (i = 0; i < enic->intr_count; i++)
	186	vnic_intr_free(&enic->intr[i]);
	187	}
	188
	189	void enic_get_res_counts(struct enic *enic)
	190	{
6ba9cdc0 SF	191	enic->wq_count = min_t(int,
	192	vnic_dev_get_res_count(enic->vdev, RES_TYPE_WQ),
	193	ENIC_WQ_MAX);
	194	enic->rq_count = min_t(int,
	195	vnic_dev_get_res_count(enic->vdev, RES_TYPE_RQ),
	196	ENIC_RQ_MAX);
	197	enic->cq_count = min_t(int,
	198	vnic_dev_get_res_count(enic->vdev, RES_TYPE_CQ),
	199	ENIC_CQ_MAX);
	200	enic->intr_count = min_t(int,
	201	vnic_dev_get_res_count(enic->vdev, RES_TYPE_INTR_CTRL),
	202	ENIC_INTR_MAX);
01f2e4ea SF	203
	204	printk(KERN_INFO PFX "vNIC resources avail: "
	205	"wq %d rq %d cq %d intr %d\n",
	206	enic->wq_count, enic->rq_count,
	207	enic->cq_count, enic->intr_count);
	208	}
	209
	210	void enic_init_vnic_resources(struct enic *enic)
	211	{
	212	enum vnic_dev_intr_mode intr_mode;
	213	unsigned int mask_on_assertion;
	214	unsigned int interrupt_offset;
	215	unsigned int error_interrupt_enable;
	216	unsigned int error_interrupt_offset;
	217	unsigned int cq_index;
	218	unsigned int i;
	219
	220	intr_mode = vnic_dev_get_intr_mode(enic->vdev);
	221
	222	/* Init RQ/WQ resources.
	223	*
	224	* RQ[0 - n-1] point to CQ[0 - n-1]
	225	* WQ[0 - m-1] point to CQ[n - n+m-1]
	226	*
	227	* Error interrupt is not enabled for MSI.
	228	*/
	229
	230	switch (intr_mode) {
	231	case VNIC_DEV_INTR_MODE_INTX:
	232	case VNIC_DEV_INTR_MODE_MSIX:
	233	error_interrupt_enable = 1;
	234	error_interrupt_offset = enic->intr_count - 2;
	235	break;
	236	default:
	237	error_interrupt_enable = 0;
	238	error_interrupt_offset = 0;
	239	break;
	240	}
	241
	242	for (i = 0; i < enic->rq_count; i++) {
	243	cq_index = i;
	244	vnic_rq_init(&enic->rq[i],
	245	cq_index,
	246	error_interrupt_enable,
	247	error_interrupt_offset);
	248	}
	249
	250	for (i = 0; i < enic->wq_count; i++) {
	251	cq_index = enic->rq_count + i;
	252	vnic_wq_init(&enic->wq[i],
	253	cq_index,
	254	error_interrupt_enable,
	255	error_interrupt_offset);
	256	}
	257
	258	/* Init CQ resources
	259	*
	260	* CQ[0 - n+m-1] point to INTR[0] for INTx, MSI
	261	* CQ[0 - n+m-1] point to INTR[0 - n+m-1] for MSI-X
	262	*/
	263
	264	for (i = 0; i < enic->cq_count; i++) {
	265
	266	switch (intr_mode) {
267	case VNIC_DEV_INTR_MODE_MSIX:
268	interrupt_offset = i;
269	break;
270	default:
271	interrupt_offset = 0;
272	break;
273	}
274
275	vnic_cq_init(&enic->cq[i],
276	0 /* flow_control_enable */,
277	1 /* color_enable */,
278	0 /* cq_head */,
279	0 /* cq_tail */,
280	1 /* cq_tail_color */,
281	1 /* interrupt_enable */,
282	1 /* cq_entry_enable */,
283	0 /* cq_message_enable */,
284	interrupt_offset,
285	0 /* cq_message_addr */);
286	}
287
288	/* Init INTR resources
289	*
290	* mask_on_assertion is not used for INTx due to the level-
291	* triggered nature of INTx
292	*/
293
294	switch (intr_mode) {
295	case VNIC_DEV_INTR_MODE_MSI:
296	case VNIC_DEV_INTR_MODE_MSIX:
297	mask_on_assertion = 1;
298	break;
299	default:
300	mask_on_assertion = 0;
301	break;
302	}
303
304	for (i = 0; i < enic->intr_count; i++) {
305	vnic_intr_init(&enic->intr[i],
306	enic->config.intr_timer,
307	enic->config.intr_timer_type,
308	mask_on_assertion);
309	}
310
311	/* Clear LIF stats
312	*/
313
314	vnic_dev_stats_clear(enic->vdev);
315	}
316
317	int enic_alloc_vnic_resources(struct enic *enic)
318	{
319	enum vnic_dev_intr_mode intr_mode;
320	unsigned int i;
321	int err;
322
323	intr_mode = vnic_dev_get_intr_mode(enic->vdev);
324
325	printk(KERN_INFO PFX "vNIC resources used: "
326	"wq %d rq %d cq %d intr %d intr mode %s\n",
327	enic->wq_count, enic->rq_count,
328	enic->cq_count, enic->intr_count,
329	intr_mode == VNIC_DEV_INTR_MODE_INTX ? "legacy PCI INTx" :
330	intr_mode == VNIC_DEV_INTR_MODE_MSI ? "MSI" :
331	intr_mode == VNIC_DEV_INTR_MODE_MSIX ? "MSI-X" :
332	"unknown"
333	);
334
335	/* Allocate queue resources
336	*/
337
338	for (i = 0; i < enic->wq_count; i++) {
339	err = vnic_wq_alloc(enic->vdev, &enic->wq[i], i,
340	enic->config.wq_desc_count,
341	sizeof(struct wq_enet_desc));
342	if (err)
343	goto err_out_cleanup;
344	}
345
346	for (i = 0; i < enic->rq_count; i++) {
347	err = vnic_rq_alloc(enic->vdev, &enic->rq[i], i,
348	enic->config.rq_desc_count,
349	sizeof(struct rq_enet_desc));
350	if (err)
351	goto err_out_cleanup;
352	}
353
354	for (i = 0; i < enic->cq_count; i++) {
355	if (i < enic->rq_count)
356	err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
357	enic->config.rq_desc_count,
358	sizeof(struct cq_enet_rq_desc));
359	else
360	err = vnic_cq_alloc(enic->vdev, &enic->cq[i], i,
361	enic->config.wq_desc_count,
362	sizeof(struct cq_enet_wq_desc));
363	if (err)
364	goto err_out_cleanup;
365	}
366
367	for (i = 0; i < enic->intr_count; i++) {
368	err = vnic_intr_alloc(enic->vdev, &enic->intr[i], i);
369	if (err)
370	goto err_out_cleanup;
371	}
372
373	/* Hook remaining resource
374	*/
375
376	enic->legacy_pba = vnic_dev_get_res(enic->vdev,
377	RES_TYPE_INTR_PBA_LEGACY, 0);
378	if (!enic->legacy_pba && intr_mode == VNIC_DEV_INTR_MODE_INTX) {
379	printk(KERN_ERR PFX "Failed to hook legacy pba resource\n");
380	err = -ENODEV;
381	goto err_out_cleanup;
382	}
383
384	return 0;
385
386	err_out_cleanup:
387	enic_free_vnic_resources(enic);
388
389	return err;
390	}