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[NET] drivers/net: statistics cleanup #1 -- save memory and shrink code
[deliverable/linux.git] / drivers / net / eth16i.c
CommitLineData
1da177e4 1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
6aa20a22 2
1da177e4 3 Written 1994-1999 by Mika Kuoppala
6aa20a22 4
1da177e4
LT		 5 Copyright (C) 1994-1999 by Mika Kuoppala
6 Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 The author may be reached as miku@iki.fi
12
13 This driver supports following cards :
14 - ICL EtherTeam 16i
6aa20a22 15 - ICL EtherTeam 32 EISA
1da177e4
LT		 16 (Uses true 32 bit transfers rather than 16i compability mode)
17
18 Example Module usage:
19 insmod eth16i.o io=0x2a0 mediatype=bnc
20
21 mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23 'auto' will try to autoprobe mediatype.
24 'eprom' will use whatever type defined in eprom.
25
26 I have benchmarked driver with PII/300Mhz as a ftp client
27 and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
6aa20a22 28
1da177e4
LT		 29 Sources:
30 - skeleton.c a sample network driver core for linux,
31 written by Donald Becker <becker@scyld.com>
6aa20a22 32 - at1700.c a driver for Allied Telesis AT1700, written
1da177e4
LT		 33 by Donald Becker.
34 - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35 written by Markku Viima
36 - The Fujitsu MB86965 databook.
6aa20a22
JG		 37
38 Author thanks following persons due to their valueble assistance:
1da177e4 39 Markku Viima (ICL)
6aa20a22 40 Ari Valve (ICL)
1da177e4
LT		 41 Donald Becker
42 Kurt Huwig <kurt@huwig.de>
43
44 Revision history:
45
46 Version Date Description
6aa20a22 47
1da177e4
LT		 48 0.01 15.12-94 Initial version (card detection)
49 0.02 23.01-95 Interrupt is now hooked correctly
50 0.03 01.02-95 Rewrote initialization part
51 0.04 07.02-95 Base skeleton done...
52 Made a few changes to signature checking
53 to make it a bit reliable.
54 - fixed bug in tx_buf mapping
55 - fixed bug in initialization (DLC_EN
56 wasn't enabled when initialization
57 was done.)
58 0.05 08.02-95 If there were more than one packet to send,
59 transmit was jammed due to invalid
60 register write...now fixed
6aa20a22 61 0.06 19.02-95 Rewrote interrupt handling
1da177e4
LT		 62 0.07 13.04-95 Wrote EEPROM read routines
63 Card configuration now set according to
64 data read from EEPROM
65 0.08 23.06-95 Wrote part that tries to probe used interface
66 port if AUTO is selected
67
68 0.09 01.09-95 Added module support
6aa20a22 69
1da177e4
LT		 70 0.10 04.09-95 Fixed receive packet allocation to work
71 with kernels > 1.3.x
1da177e4 72
6aa20a22
JG		 73 0.20 20.09-95 Added support for EtherTeam32 EISA
74
75 0.21 17.10-95 Removed the unnecessary extern
1da177e4
LT		 76 init_etherdev() declaration. Some
77 other cleanups.
6aa20a22 78
1da177e4
LT		 79 0.22 22.02-96 Receive buffer was not flushed
80 correctly when faulty packet was
81 received. Now fixed.
82
6aa20a22 83 0.23 26.02-96 Made resetting the adapter
1da177e4 84 more reliable.
6aa20a22 85
1da177e4
LT		 86 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
87
88 0.25 22.05-96 kfree() was missing from cleanup_module.
89
6aa20a22 90 0.26 11.06-96 Sometimes card was not found by
1da177e4 91 check_signature(). Now made more reliable.
6aa20a22
JG		 92
93 0.27 23.06-96 Oops. 16 consecutive collisions halted
94 adapter. Now will try to retransmit
1da177e4 95 MAX_COL_16 times before finally giving up.
6aa20a22 96
1da177e4
LT		 97 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
98
99 0.29 29.10-97 Multiple card support for module users
100
101 0.30 30.10-97 Fixed irq allocation bug.
102 (request_irq moved from probe to open)
103
104 0.30a 21.08-98 Card detection made more relaxed. Driver
105 had problems with some TCP/IP-PROM boots
6aa20a22 106 to find the card. Suggested by
1da177e4
LT		 107 Kurt Huwig <kurt@huwig.de>
108
109 0.31 28.08-98 Media interface port can now be selected
110 with module parameters or kernel
6aa20a22 111 boot parameters.
1da177e4 112
6aa20a22 113 0.32 31.08-98 IRQ was never freed if open/close
1da177e4 114 pair wasn't called. Now fixed.
6aa20a22 115
1da177e4
LT		 116 0.33 10.09-98 When eth16i_open() was called after
117 eth16i_close() chip never recovered.
118 Now more shallow reset is made on
119 close.
120
121 0.34 29.06-99 Fixed one bad #ifdef.
122 Changed ioaddr -> io for consistency
123
124 0.35 01.07-99 transmit,-receive bytes were never
6aa20a22 125 updated in stats.
1da177e4
LT		 126
127 Bugs:
6aa20a22
JG		 128 In some cases the media interface autoprobing code doesn't find
129 the correct interface type. In this case you can
130 manually choose the interface type in DOS with E16IC.EXE which is
1da177e4
LT		 131 configuration software for EtherTeam16i and EtherTeam32 cards.
132 This is also true for IRQ setting. You cannot use module
6aa20a22 133 parameter to configure IRQ of the card (yet).
1da177e4
LT		 134
135 To do:
136 - Real multicast support
137 - Rewrite the media interface autoprobing code. Its _horrible_ !
138 - Possibly merge all the MB86965 specific code to external
139 module for use by eth16.c and Donald's at1700.c
140 - IRQ configuration with module parameter. I will do
141 this when i will get enough info about setting
142 irq without configuration utility.
143*/
144
6aa20a22 145static char *version =
1da177e4
LT		 146 "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
6aa20a22
JG		 150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/slab.h>
156#include <linux/string.h>
1da177e4
LT		 157#include <linux/errno.h>
158#include <linux/init.h>
159#include <linux/spinlock.h>
160#include <linux/netdevice.h>
161#include <linux/etherdevice.h>
162#include <linux/skbuff.h>
163#include <linux/bitops.h>
ff5688ae 164#include <linux/jiffies.h>
53d5ed62 165#include <linux/io.h>
1da177e4 166
6aa20a22 167#include <asm/system.h>
1da177e4
LT		 168#include <asm/dma.h>
169
170
171
172/* Few macros */
6aa20a22
JG		 173#define BIT(a) ( (1 << (a)) )
174#define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
1da177e4
LT		 175#define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
176
177/* This is the I/O address space for Etherteam 16i adapter. */
178#define ETH16I_IO_EXTENT 32
179
180/* Ticks before deciding that transmit has timed out */
181#define TX_TIMEOUT (400*HZ/1000)
182
183/* Maximum loop count when receiving packets */
184#define MAX_RX_LOOP 20
185
186/* Some interrupt masks */
187#define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
188#define ETH16I_INTR_OFF 0x0000
6aa20a22 189
1da177e4
LT		 190/* Buffers header status byte meanings */
191#define PKT_GOOD BIT(5)
192#define PKT_GOOD_RMT BIT(4)
193#define PKT_SHORT BIT(3)
194#define PKT_ALIGN_ERR BIT(2)
195#define PKT_CRC_ERR BIT(1)
196#define PKT_RX_BUF_OVERFLOW BIT(0)
197
198/* Transmit status register (DLCR0) */
199#define TX_STATUS_REG 0
200#define TX_DONE BIT(7)
201#define NET_BUSY BIT(6)
202#define TX_PKT_RCD BIT(5)
203#define CR_LOST BIT(4)
204#define TX_JABBER_ERR BIT(3)
205#define COLLISION BIT(2)
206#define COLLISIONS_16 BIT(1)
207
208/* Receive status register (DLCR1) */
209#define RX_STATUS_REG 1
210#define RX_PKT BIT(7) /* Packet received */
211#define BUS_RD_ERR BIT(6)
212#define SHORT_PKT_ERR BIT(3)
213#define ALIGN_ERR BIT(2)
214#define CRC_ERR BIT(1)
215#define RX_BUF_OVERFLOW BIT(0)
6aa20a22 216
1da177e4
LT		 217/* Transmit Interrupt Enable Register (DLCR2) */
218#define TX_INTR_REG 2
219#define TX_INTR_DONE BIT(7)
220#define TX_INTR_COL BIT(2)
221#define TX_INTR_16_COL BIT(1)
222
223/* Receive Interrupt Enable Register (DLCR3) */
224#define RX_INTR_REG 3
225#define RX_INTR_RECEIVE BIT(7)
226#define RX_INTR_SHORT_PKT BIT(3)
227#define RX_INTR_CRC_ERR BIT(1)
228#define RX_INTR_BUF_OVERFLOW BIT(0)
229
230/* Transmit Mode Register (DLCR4) */
231#define TRANSMIT_MODE_REG 4
232#define LOOPBACK_CONTROL BIT(1)
233#define CONTROL_OUTPUT BIT(2)
234
235/* Receive Mode Register (DLCR5) */
236#define RECEIVE_MODE_REG 5
237#define RX_BUFFER_EMPTY BIT(6)
238#define ACCEPT_BAD_PACKETS BIT(5)
239#define RECEIVE_SHORT_ADDR BIT(4)
240#define ACCEPT_SHORT_PACKETS BIT(3)
241#define REMOTE_RESET BIT(2)
242
243#define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
244#define REJECT_ALL 0
245#define ACCEPT_ALL 3
246#define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
247#define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
248
249/* Configuration Register 0 (DLCR6) */
250#define CONFIG_REG_0 6
251#define DLC_EN BIT(7)
252#define SRAM_CYCLE_TIME_100NS BIT(6)
253#define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
254#define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
6aa20a22 255#define TBS1 BIT(3)
1da177e4
LT		 256#define TBS0 BIT(2)
257#define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
258#define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
259
6aa20a22 260#ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
1da177e4 261#define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
6aa20a22 262#endif
1da177e4
LT		 263#define TX_BUF_1x2048 0
264#define TX_BUF_2x2048 1
265#define TX_BUF_2x4098 2
266#define TX_BUF_2x8192 3
267
268/* Configuration Register 1 (DLCR7) */
269#define CONFIG_REG_1 7
270#define POWERUP BIT(5)
271
272/* Transmit start register */
273#define TRANSMIT_START_REG 10
274#define TRANSMIT_START_RB 2
275#define TX_START BIT(7) /* Rest of register bit indicate*/
276 /* number of packets in tx buffer*/
277/* Node ID registers (DLCR8-13) */
278#define NODE_ID_0 8
279#define NODE_ID_RB 0
280
281/* Hash Table registers (HT8-15) */
282#define HASH_TABLE_0 8
283#define HASH_TABLE_RB 1
284
285/* Buffer memory ports */
286#define BUFFER_MEM_PORT_LB 8
287#define DATAPORT BUFFER_MEM_PORT_LB
288#define BUFFER_MEM_PORT_HB 9
289
290/* 16 Collision control register (BMPR11) */
291#define COL_16_REG 11
292#define HALT_ON_16 0x00
293#define RETRANS_AND_HALT_ON_16 0x02
294
295/* Maximum number of attempts to send after 16 concecutive collisions */
296#define MAX_COL_16 10
297
298/* DMA Burst and Transceiver Mode Register (BMPR13) */
299#define TRANSCEIVER_MODE_REG 13
6aa20a22 300#define TRANSCEIVER_MODE_RB 2
1da177e4
LT		 301#define IO_BASE_UNLOCK BIT(7)
302#define LOWER_SQUELCH_TRESH BIT(6)
303#define LINK_TEST_DISABLE BIT(5)
304#define AUI_SELECT BIT(4)
305#define DIS_AUTO_PORT_SEL BIT(3)
306
307/* Filter Self Receive Register (BMPR14) */
308#define FILTER_SELF_RX_REG 14
309#define SKIP_RX_PACKET BIT(2)
310#define FILTER_SELF_RECEIVE BIT(0)
311
312/* EEPROM Control Register (BMPR 16) */
313#define EEPROM_CTRL_REG 16
314
315/* EEPROM Data Register (BMPR 17) */
316#define EEPROM_DATA_REG 17
317
318/* NMC93CSx6 EEPROM Control Bits */
319#define CS_0 0x00
320#define CS_1 0x20
321#define SK_0 0x00
322#define SK_1 0x40
323#define DI_0 0x00
324#define DI_1 0x80
325
326/* NMC93CSx6 EEPROM Instructions */
327#define EEPROM_READ 0x80
328
329/* NMC93CSx6 EEPROM Addresses */
330#define E_NODEID_0 0x02
331#define E_NODEID_1 0x03
332#define E_NODEID_2 0x04
333#define E_PORT_SELECT 0x14
334 #define E_PORT_BNC 0x00
335 #define E_PORT_DIX 0x01
336 #define E_PORT_TP 0x02
337 #define E_PORT_AUTO 0x03
338 #define E_PORT_FROM_EPROM 0x04
339#define E_PRODUCT_CFG 0x30
6aa20a22 340
1da177e4
LT		 341
342/* Macro to slow down io between EEPROM clock transitions */
343#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
344
345/* Jumperless Configuration Register (BMPR19) */
346#define JUMPERLESS_CONFIG 19
347
348/* ID ROM registers, writing to them also resets some parts of chip */
349#define ID_ROM_0 24
350#define ID_ROM_7 31
351#define RESET ID_ROM_0
352
353/* This is the I/O address list to be probed when seeking the card */
354static unsigned int eth16i_portlist[] __initdata = {
6aa20a22 355 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
1da177e4
LT		 356};
357
6aa20a22 358static unsigned int eth32i_portlist[] __initdata = {
1da177e4 359 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
6aa20a22 360 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
1da177e4
LT		 361};
362
363/* This is the Interrupt lookup table for Eth16i card */
364static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
365#define NUM_OF_ISA_IRQS 4
366
367/* This is the Interrupt lookup table for Eth32i card */
6aa20a22 368static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
1da177e4
LT		 369#define EISA_IRQ_REG 0xc89
370#define NUM_OF_EISA_IRQS 8
371
372static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
373
374/* Use 0 for production, 1 for verification, >2 for debug */
375#ifndef ETH16I_DEBUG
376#define ETH16I_DEBUG 0
377#endif
378static unsigned int eth16i_debug = ETH16I_DEBUG;
379
380/* Information for each board */
381
382struct eth16i_local {
1da177e4
LT		 383 unsigned char tx_started;
384 unsigned char tx_buf_busy;
385 unsigned short tx_queue; /* Number of packets in transmit buffer */
6aa20a22 386 unsigned short tx_queue_len;
1da177e4
LT		 387 unsigned int tx_buf_size;
388 unsigned long open_time;
389 unsigned long tx_buffered_packets;
390 unsigned long tx_buffered_bytes;
391 unsigned long col_16;
392 spinlock_t lock;
393};
394
395/* Function prototypes */
396
397static int eth16i_probe1(struct net_device *dev, int ioaddr);
398static int eth16i_check_signature(int ioaddr);
399static int eth16i_probe_port(int ioaddr);
400static void eth16i_set_port(int ioaddr, int porttype);
401static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
402static int eth16i_receive_probe_packet(int ioaddr);
403static int eth16i_get_irq(int ioaddr);
404static int eth16i_read_eeprom(int ioaddr, int offset);
405static int eth16i_read_eeprom_word(int ioaddr);
406static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
407static int eth16i_open(struct net_device *dev);
408static int eth16i_close(struct net_device *dev);
409static int eth16i_tx(struct sk_buff *skb, struct net_device *dev);
410static void eth16i_rx(struct net_device *dev);
411static void eth16i_timeout(struct net_device *dev);
7d12e780 412static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
1da177e4
LT		 413static void eth16i_reset(struct net_device *dev);
414static void eth16i_timeout(struct net_device *dev);
415static void eth16i_skip_packet(struct net_device *dev);
6aa20a22 416static void eth16i_multicast(struct net_device *dev);
1da177e4
LT		 417static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
418static void eth16i_initialize(struct net_device *dev, int boot);
419
420#if 0
421static int eth16i_set_irq(struct net_device *dev);
422#endif
423
424#ifdef MODULE
425static ushort eth16i_parse_mediatype(const char* s);
426#endif
427
1da177e4
LT		 428static char cardname[] __initdata = "ICL EtherTeam 16i/32";
429
430static int __init do_eth16i_probe(struct net_device *dev)
431{
432 int i;
433 int ioaddr;
434 int base_addr = dev->base_addr;
6aa20a22 435
6aa20a22 436 if(eth16i_debug > 4)
1da177e4
LT		 437 printk(KERN_DEBUG "Probing started for %s\n", cardname);
438
439 if(base_addr > 0x1ff) /* Check only single location */
440 return eth16i_probe1(dev, base_addr);
441 else if(base_addr != 0) /* Don't probe at all */
442 return -ENXIO;
443
444 /* Seek card from the ISA io address space */
445 for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
446 if(eth16i_probe1(dev, ioaddr) == 0)
447 return 0;
448
449 /* Seek card from the EISA io address space */
450 for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
451 if(eth16i_probe1(dev, ioaddr) == 0)
452 return 0;
453
454 return -ENODEV;
455}
456
457#ifndef MODULE
458struct net_device * __init eth16i_probe(int unit)
459{
460 struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
461 int err;
462
463 if (!dev)
464 return ERR_PTR(-ENOMEM);
465
466 sprintf(dev->name, "eth%d", unit);
467 netdev_boot_setup_check(dev);
468
469 err = do_eth16i_probe(dev);
470 if (err)
471 goto out;
1da177e4 472 return dev;
1da177e4
LT		 473out:
474 free_netdev(dev);
475 return ERR_PTR(err);
476}
477#endif
478
479static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
480{
481 struct eth16i_local *lp = netdev_priv(dev);
482 static unsigned version_printed;
483 int retval;
484
485 /* Let's grab the region */
486 if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
487 return -EBUSY;
488
489 /*
6aa20a22 490 The MB86985 chip has on register which holds information in which
1da177e4
LT		 491 io address the chip lies. First read this register and compare
492 it to our current io address and if match then this could
493 be our chip.
494 */
495
496 if(ioaddr < 0x1000) {
6aa20a22 497 if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
1da177e4
LT		 498 != ioaddr) {
499 retval = -ENODEV;
500 goto out;
501 }
502 }
503
504 /* Now we will go a bit deeper and try to find the chip's signature */
505
506 if(eth16i_check_signature(ioaddr) != 0) {
507 retval = -ENODEV;
508 goto out;
509 }
510
6aa20a22 511 /*
1da177e4 512 Now it seems that we have found a ethernet chip in this particular
6aa20a22 513 ioaddr. The MB86985 chip has this feature, that when you read a
1da177e4
LT		 514 certain register it will increase it's io base address to next
515 configurable slot. Now when we have found the chip, first thing is
516 to make sure that the chip's ioaddr will hold still here.
517 */
518
519 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
520 outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
521
522 outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
523 BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
524
525 if( (eth16i_debug & version_printed++) == 0)
526 printk(KERN_INFO "%s", version);
527
528 dev->base_addr = ioaddr;
529 dev->irq = eth16i_get_irq(ioaddr);
530
531 /* Try to obtain interrupt vector */
532
533 if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
6aa20a22 534 printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
1da177e4
LT		 535 cardname, ioaddr, dev->irq);
536 goto out;
537 }
538
539 printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
540 dev->name, cardname, ioaddr, dev->irq);
541
542
543 /* Now we will have to lock the chip's io address */
544 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
6aa20a22 545 outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
1da177e4
LT		 546
547 eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
548
549 /* Now let's same some energy by shutting down the chip ;) */
550 BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
551
552 /* Initialize the device structure */
553 memset(lp, 0, sizeof(struct eth16i_local));
554 dev->open = eth16i_open;
555 dev->stop = eth16i_close;
556 dev->hard_start_xmit = eth16i_tx;
1da177e4
LT		 557 dev->set_multicast_list = eth16i_multicast;
558 dev->tx_timeout = eth16i_timeout;
559 dev->watchdog_timeo = TX_TIMEOUT;
560 spin_lock_init(&lp->lock);
b1fc5505 561
562 retval = register_netdev(dev);
563 if (retval)
564 goto out1;
1da177e4 565 return 0;
b1fc5505 566out1:
567 free_irq(dev->irq, dev);
1da177e4
LT		 568out:
569 release_region(ioaddr, ETH16I_IO_EXTENT);
570 return retval;
571}
572
573
574static void eth16i_initialize(struct net_device *dev, int boot)
575{
576 int ioaddr = dev->base_addr;
577 int i, node_w = 0;
578 unsigned char node_byte = 0;
579
580 /* Setup station address */
581 eth16i_select_regbank(NODE_ID_RB, ioaddr);
582 for(i = 0 ; i < 3 ; i++) {
583 unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
584 ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
585 }
586
6aa20a22 587 for(i = 0; i < 6; i++) {
1da177e4
LT		 588 outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
589 if(boot) {
590 printk("%02x", inb(ioaddr + NODE_ID_0 + i));
591 if(i != 5)
592 printk(":");
593 }
594 }
595
596 /* Now we will set multicast addresses to accept none */
597 eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
6aa20a22 598 for(i = 0; i < 8; i++)
1da177e4
LT		 599 outb(0x00, ioaddr + HASH_TABLE_0 + i);
600
601 /*
6aa20a22 602 Now let's disable the transmitter and receiver, set the buffer ram
1da177e4
LT		 603 cycle time, bus width and buffer data path width. Also we shall
604 set transmit buffer size and total buffer size.
605 */
606
607 eth16i_select_regbank(2, ioaddr);
608
609 node_byte = 0;
610 node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
611
612 if( (node_w & 0xFF00) == 0x0800)
613 node_byte |= BUFFER_WIDTH_8;
614
615 node_byte |= SRAM_BS1;
616
617 if( (node_w & 0x00FF) == 64)
618 node_byte |= SRAM_BS0;
619
620 node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
621
622 outb(node_byte, ioaddr + CONFIG_REG_0);
623
624 /* We shall halt the transmitting, if 16 collisions are detected */
625 outb(HALT_ON_16, ioaddr + COL_16_REG);
626
627#ifdef MODULE
628 /* if_port already set by init_module() */
629#else
6aa20a22 630 dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
1da177e4
LT		 631 dev->mem_start : E_PORT_FROM_EPROM;
632#endif
633
634 /* Set interface port type */
635 if(boot) {
636 char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
637
638 switch(dev->if_port)
639 {
640
641 case E_PORT_FROM_EPROM:
642 dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
643 break;
644
645 case E_PORT_AUTO:
646 dev->if_port = eth16i_probe_port(ioaddr);
647 break;
6aa20a22 648
1da177e4
LT		 649 case E_PORT_BNC:
650 case E_PORT_TP:
651 case E_PORT_DIX:
652 break;
653 }
654
655 printk(" %s interface.\n", porttype[dev->if_port]);
656
657 eth16i_set_port(ioaddr, dev->if_port);
658 }
659
660 /* Set Receive Mode to normal operation */
661 outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
662}
663
664static int eth16i_probe_port(int ioaddr)
665{
666 int i;
667 int retcode;
668 unsigned char dummy_packet[64];
669
670 /* Powerup the chip */
671 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
672
673 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
674
675 eth16i_select_regbank(NODE_ID_RB, ioaddr);
676
677 for(i = 0; i < 6; i++) {
678 dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
679 dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
680 }
681
682 dummy_packet[12] = 0x00;
683 dummy_packet[13] = 0x04;
684 memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
685
686 eth16i_select_regbank(2, ioaddr);
687
688 for(i = 0; i < 3; i++) {
689 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
690 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
691 eth16i_set_port(ioaddr, i);
692
693 if(eth16i_debug > 1)
694 printk(KERN_DEBUG "Set port number %d\n", i);
695
696 retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
697 if(retcode == 0) {
698 retcode = eth16i_receive_probe_packet(ioaddr);
699 if(retcode != -1) {
700 if(eth16i_debug > 1)
701 printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
702 return i;
703 }
704 }
705 else {
706 if(eth16i_debug > 1)
707 printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
708 }
709 }
710
711 if( eth16i_debug > 1)
712 printk(KERN_DEBUG "Using default port\n");
713
714 return E_PORT_BNC;
715}
716
717static void eth16i_set_port(int ioaddr, int porttype)
6aa20a22 718{
1da177e4
LT		 719 unsigned short temp = 0;
720
721 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
722 outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
723
724 temp |= DIS_AUTO_PORT_SEL;
725
726 switch(porttype) {
727
728 case E_PORT_BNC :
729 temp |= AUI_SELECT;
730 break;
731
732 case E_PORT_TP :
733 break;
734
735 case E_PORT_DIX :
736 temp |= AUI_SELECT;
737 BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
738 break;
6aa20a22 739 }
1da177e4
LT		 740
741 outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
742
743 if(eth16i_debug > 1) {
744 printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
6aa20a22 745 printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
1da177e4
LT		 746 inb(ioaddr+TRANSCEIVER_MODE_REG));
747 }
748}
749
750static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
751{
ff5688ae 752 unsigned long starttime;
1da177e4
LT		 753
754 outb(0xff, ioaddr + TX_STATUS_REG);
755
756 outw(l, ioaddr + DATAPORT);
6aa20a22 757 outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
1da177e4
LT		 758
759 starttime = jiffies;
6aa20a22 760 outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
1da177e4
LT		 761
762 while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
ff5688ae 763 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 764 return -1;
765 }
766 }
767
768 return 0;
769}
770
771static int eth16i_receive_probe_packet(int ioaddr)
772{
ff5688ae 773 unsigned long starttime;
1da177e4
LT		 774
775 starttime = jiffies;
776
777 while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
ff5688ae 778 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 779
780 if(eth16i_debug > 1)
781 printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
782 starttime = jiffies;
783 while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
ff5688ae 784 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 785 if(eth16i_debug > 1)
786 printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
787 return -1;
788 }
789 }
790
791 if(eth16i_debug > 1)
792 printk(KERN_DEBUG "RECEIVE_PACKET\n");
793 return(0); /* Found receive packet */
794 }
795 }
796
797 if(eth16i_debug > 1) {
798 printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
799 printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
800 }
801
802 return(0); /* Return success */
803}
804
805#if 0
806static int eth16i_set_irq(struct net_device* dev)
807{
808 const int ioaddr = dev->base_addr;
809 const int irq = dev->irq;
810 int i = 0;
811
6aa20a22 812 if(ioaddr < 0x1000) {
1da177e4
LT		 813 while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
814 i++;
6aa20a22 815
1da177e4
LT		 816 if(i < NUM_OF_ISA_IRQS) {
817 u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
818 cbyte = (cbyte & 0x3F) | (i << 6);
819 outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
820 return 0;
821 }
822 }
823 else {
824 printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
825 }
6aa20a22 826
1da177e4
LT		 827 return -1;
828
829}
830#endif
831
832static int __init eth16i_get_irq(int ioaddr)
833{
834 unsigned char cbyte;
835
836 if( ioaddr < 0x1000) {
837 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
838 return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
839 } else { /* Oh..the card is EISA so method getting IRQ different */
840 unsigned short index = 0;
841 cbyte = inb(ioaddr + EISA_IRQ_REG);
842 while( (cbyte & 0x01) == 0) {
843 cbyte = cbyte >> 1;
844 index++;
845 }
846 return( eth32i_irqmap[ index ] );
847 }
848}
849
850static int __init eth16i_check_signature(int ioaddr)
851{
852 int i;
853 unsigned char creg[4] = { 0 };
854
855 for(i = 0; i < 4 ; i++) {
856
857 creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
858
859 if(eth16i_debug > 1)
6aa20a22 860 printk("eth16i: read signature byte %x at %x\n",
1da177e4
LT		 861 creg[i],
862 ioaddr + TRANSMIT_MODE_REG + i);
863 }
864
865 creg[0] &= 0x0F; /* Mask collision cnr */
866 creg[2] &= 0x7F; /* Mask DCLEN bit */
867
868#if 0
6aa20a22 869 /*
1da177e4
LT		 870 This was removed because the card was sometimes left to state
871 from which it couldn't be find anymore. If there is need
872 to more strict check still this have to be fixed.
873 */
874 if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
875 if(creg[1] != 0x42)
876 return -1;
877 }
878#endif
879
880 if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
881 creg[2] &= 0x40;
882 creg[3] &= 0x03;
6aa20a22 883
1da177e4
LT		 884 if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
885 return -1;
886 }
6aa20a22 887
1da177e4
LT		 888 if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
889 return -1;
6aa20a22 890
1da177e4
LT		 891 if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
892 return -1;
893
894 return 0;
895}
896
897static int eth16i_read_eeprom(int ioaddr, int offset)
898{
899 int data = 0;
900
901 eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
902 outb(CS_1, ioaddr + EEPROM_CTRL_REG);
903 data = eth16i_read_eeprom_word(ioaddr);
904 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
905
6aa20a22 906 return(data);
1da177e4
LT		 907}
908
909static int eth16i_read_eeprom_word(int ioaddr)
910{
911 int i;
912 int data = 0;
6aa20a22 913
1da177e4
LT		 914 for(i = 16; i > 0; i--) {
915 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
916 eeprom_slow_io();
917 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
918 eeprom_slow_io();
6aa20a22 919 data = (data << 1) |
1da177e4 920 ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
6aa20a22 921
1da177e4
LT		 922 eeprom_slow_io();
923 }
924
925 return(data);
926}
927
928static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
929{
930 int i;
931
932 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
933 outb(DI_0, ioaddr + EEPROM_DATA_REG);
934 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
935 outb(DI_1, ioaddr + EEPROM_DATA_REG);
936 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
937
938 for(i = 7; i >= 0; i--) {
939 short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
940 outb(cmd, ioaddr + EEPROM_DATA_REG);
941 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
942 eeprom_slow_io();
943 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
944 eeprom_slow_io();
6aa20a22 945 }
1da177e4
LT		 946}
947
948static int eth16i_open(struct net_device *dev)
949{
950 struct eth16i_local *lp = netdev_priv(dev);
951 int ioaddr = dev->base_addr;
6aa20a22 952
1da177e4
LT		 953 /* Powerup the chip */
954 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
955
956 /* Initialize the chip */
6aa20a22 957 eth16i_initialize(dev, 0);
1da177e4
LT		 958
959 /* Set the transmit buffer size */
960 lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
961
962 if(eth16i_debug > 0)
6aa20a22 963 printk(KERN_DEBUG "%s: transmit buffer size %d\n",
1da177e4
LT		 964 dev->name, lp->tx_buf_size);
965
966 /* Now enable Transmitter and Receiver sections */
967 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
968
969 /* Now switch to register bank 2, for run time operation */
970 eth16i_select_regbank(2, ioaddr);
971
972 lp->open_time = jiffies;
973 lp->tx_started = 0;
974 lp->tx_queue = 0;
975 lp->tx_queue_len = 0;
976
977 /* Turn on interrupts*/
6aa20a22 978 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1da177e4
LT		 979
980 netif_start_queue(dev);
981 return 0;
982}
983
984static int eth16i_close(struct net_device *dev)
985{
986 struct eth16i_local *lp = netdev_priv(dev);
987 int ioaddr = dev->base_addr;
988
989 eth16i_reset(dev);
990
991 /* Turn off interrupts*/
6aa20a22 992 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1da177e4
LT		 993
994 netif_stop_queue(dev);
6aa20a22 995
1da177e4
LT		 996 lp->open_time = 0;
997
998 /* Disable transmit and receive */
999 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1000
1001 /* Reset the chip */
1002 /* outb(0xff, ioaddr + RESET); */
1003 /* outw(0xffff, ioaddr + TX_STATUS_REG); */
6aa20a22 1004
1da177e4
LT		 1005 outb(0x00, ioaddr + CONFIG_REG_1);
1006
1007 return 0;
1008}
1009
1010static void eth16i_timeout(struct net_device *dev)
1011{
1012 struct eth16i_local *lp = netdev_priv(dev);
1013 int ioaddr = dev->base_addr;
6aa20a22
JG		 1014 /*
1015 If we get here, some higher level has decided that
1016 we are broken. There should really be a "kick me"
1017 function call instead.
1da177e4
LT		 1018 */
1019
1020 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1021 printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1da177e4 1022 dev->name,
6aa20a22 1023 inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1da177e4
LT		 1024 "IRQ conflict" : "network cable problem");
1025
1026 dev->trans_start = jiffies;
1027
1028 /* Let's dump all registers */
6aa20a22 1029 if(eth16i_debug > 0) {
1da177e4 1030 printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
6aa20a22
JG		 1031 dev->name, inb(ioaddr + 0),
1032 inb(ioaddr + 1), inb(ioaddr + 2),
1033 inb(ioaddr + 3), inb(ioaddr + 4),
1da177e4
LT		 1034 inb(ioaddr + 5),
1035 inb(ioaddr + 6), inb(ioaddr + 7));
1036
1037 printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1038 dev->name, inb(ioaddr + TRANSMIT_START_REG),
1039 inb(ioaddr + COL_16_REG));
1040 printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1041 printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1042 printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1043 }
09f75cd7 1044 dev->stats.tx_errors++;
1da177e4
LT		 1045 eth16i_reset(dev);
1046 dev->trans_start = jiffies;
1047 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1048 netif_wake_queue(dev);
1049}
1050
1051static int eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1052{
1053 struct eth16i_local *lp = netdev_priv(dev);
1054 int ioaddr = dev->base_addr;
1055 int status = 0;
1056 ushort length = skb->len;
1057 unsigned char *buf;
1058 unsigned long flags;
1059
1060 if (length < ETH_ZLEN) {
5b057c6b 1061 if (skb_padto(skb, ETH_ZLEN))
1da177e4
LT		 1062 return 0;
1063 length = ETH_ZLEN;
1064 }
1065 buf = skb->data;
1066
1067 netif_stop_queue(dev);
6aa20a22 1068
1da177e4
LT		 1069 /* Turn off TX interrupts */
1070 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1071
1da177e4
LT		 1072 /* We would be better doing the disable_irq tricks the 3c509 does,
1073 that would make this suck a lot less */
6aa20a22 1074
1da177e4
LT		 1075 spin_lock_irqsave(&lp->lock, flags);
1076
1077 if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
6aa20a22
JG		 1078 if(eth16i_debug > 0)
1079 printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1080 }
1da177e4
LT		 1081 else {
1082 outw(length, ioaddr + DATAPORT);
1083
6aa20a22 1084 if( ioaddr < 0x1000 )
1da177e4
LT		 1085 outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1086 else {
1087 unsigned char frag = length % 4;
1088 outsl(ioaddr + DATAPORT, buf, length >> 2);
1089 if( frag != 0 ) {
1090 outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
6aa20a22
JG		 1091 if( frag == 3 )
1092 outsw(ioaddr + DATAPORT,
1da177e4
LT		 1093 (buf + (length & 0xFFFC) + 2), 1);
1094 }
1095 }
1096 lp->tx_buffered_packets++;
1097 lp->tx_buffered_bytes = length;
1098 lp->tx_queue++;
1099 lp->tx_queue_len += length + 2;
1100 }
1101 lp->tx_buf_busy = 0;
1102
1103 if(lp->tx_started == 0) {
1104 /* If the transmitter is idle..always trigger a transmit */
1105 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1106 lp->tx_queue = 0;
1107 lp->tx_queue_len = 0;
1108 dev->trans_start = jiffies;
1109 lp->tx_started = 1;
1110 netif_wake_queue(dev);
1111 }
1112 else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1113 /* There is still more room for one more packet in tx buffer */
1114 netif_wake_queue(dev);
1115 }
6aa20a22 1116
1da177e4 1117 spin_unlock_irqrestore(&lp->lock, flags);
6aa20a22 1118
1da177e4
LT		 1119 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1120 /* Turn TX interrupts back on */
1121 /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1122 status = 0;
1123 dev_kfree_skb(skb);
1124 return 0;
1125}
1126
1127static void eth16i_rx(struct net_device *dev)
1128{
1da177e4
LT		 1129 int ioaddr = dev->base_addr;
1130 int boguscount = MAX_RX_LOOP;
1131
1132 /* Loop until all packets have been read */
1133 while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1134
6aa20a22 1135 /* Read status byte from receive buffer */
1da177e4
LT		 1136 ushort status = inw(ioaddr + DATAPORT);
1137
1138 /* Get the size of the packet from receive buffer */
1139 ushort pkt_len = inw(ioaddr + DATAPORT);
1140
1141 if(eth16i_debug > 4)
6aa20a22
JG		 1142 printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1143 dev->name,
1da177e4 1144 inb(ioaddr + RECEIVE_MODE_REG), status);
6aa20a22 1145
1da177e4 1146 if( !(status & PKT_GOOD) ) {
09f75cd7 1147 dev->stats.rx_errors++;
1da177e4
LT		 1148
1149 if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
09f75cd7 1150 dev->stats.rx_length_errors++;
1da177e4 1151 eth16i_reset(dev);
6aa20a22 1152 return;
1da177e4 1153 }
6aa20a22 1154 else {
1da177e4 1155 eth16i_skip_packet(dev);
09f75cd7 1156 dev->stats.rx_dropped++;
6aa20a22 1157 }
1da177e4
LT		 1158 }
1159 else { /* Ok so now we should have a good packet */
1160 struct sk_buff *skb;
1161
1162 skb = dev_alloc_skb(pkt_len + 3);
1163 if( skb == NULL ) {
6aa20a22 1164 printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1da177e4
LT		 1165 dev->name, pkt_len);
1166 eth16i_skip_packet(dev);
09f75cd7 1167 dev->stats.rx_dropped++;
1da177e4
LT		 1168 break;
1169 }
1170
1da177e4 1171 skb_reserve(skb,2);
6aa20a22
JG		 1172
1173 /*
1da177e4
LT		 1174 Now let's get the packet out of buffer.
1175 size is (pkt_len + 1) >> 1, cause we are now reading words
1176 and it have to be even aligned.
6aa20a22
JG		 1177 */
1178
1179 if(ioaddr < 0x1000)
1180 insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1da177e4 1181 (pkt_len + 1) >> 1);
6aa20a22 1182 else {
1da177e4
LT		 1183 unsigned char *buf = skb_put(skb, pkt_len);
1184 unsigned char frag = pkt_len % 4;
1185
1186 insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1187
1188 if(frag != 0) {
1189 unsigned short rest[2];
1190 rest[0] = inw( ioaddr + DATAPORT );
1191 if(frag == 3)
1192 rest[1] = inw( ioaddr + DATAPORT );
1193
1194 memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1195 }
1196 }
1197
1198 skb->protocol=eth_type_trans(skb, dev);
1199
1200 if( eth16i_debug > 5 ) {
1201 int i;
6aa20a22 1202 printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1da177e4 1203 dev->name, pkt_len);
6aa20a22 1204 for(i = 0; i < 14; i++)
1da177e4
LT		 1205 printk(KERN_DEBUG " %02x", skb->data[i]);
1206 printk(KERN_DEBUG ".\n");
1207 }
1208 netif_rx(skb);
1209 dev->last_rx = jiffies;
09f75cd7
JG		 1210 dev->stats.rx_packets++;
1211 dev->stats.rx_bytes += pkt_len;
1da177e4
LT		 1212
1213 } /* else */
1214
1215 if(--boguscount <= 0)
1216 break;
1217
1218 } /* while */
1219}
1220
7d12e780 1221static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1da177e4
LT		 1222{
1223 struct net_device *dev = dev_id;
1224 struct eth16i_local *lp;
1225 int ioaddr = 0, status;
1226 int handled = 0;
1227
1228 ioaddr = dev->base_addr;
1229 lp = netdev_priv(dev);
1230
1231 /* Turn off all interrupts from adapter */
1232 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1233
1234 /* eth16i_tx won't be called */
1235 spin_lock(&lp->lock);
1236
1237 status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
1238 outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
1239
1240 if (status)
1241 handled = 1;
1242
1243 if(eth16i_debug > 3)
1244 printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1245
1246 if( status & 0x7f00 ) {
1247
09f75cd7 1248 dev->stats.rx_errors++;
1da177e4 1249
6aa20a22 1250 if(status & (BUS_RD_ERR << 8) )
1da177e4 1251 printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
09f75cd7
JG		 1252 if(status & (SHORT_PKT_ERR << 8) ) dev->stats.rx_length_errors++;
1253 if(status & (ALIGN_ERR << 8) ) dev->stats.rx_frame_errors++;
1254 if(status & (CRC_ERR << 8) ) dev->stats.rx_crc_errors++;
1255 if(status & (RX_BUF_OVERFLOW << 8) ) dev->stats.rx_over_errors++;
1da177e4
LT		 1256 }
1257 if( status & 0x001a) {
1258
09f75cd7 1259 dev->stats.tx_errors++;
1da177e4 1260
09f75cd7
JG		 1261 if(status & CR_LOST) dev->stats.tx_carrier_errors++;
1262 if(status & TX_JABBER_ERR) dev->stats.tx_window_errors++;
1da177e4 1263
6aa20a22 1264#if 0
1da177e4 1265 if(status & COLLISION) {
09f75cd7 1266 dev->stats.collisions +=
1da177e4
LT		 1267 ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1268 }
1269#endif
1270 if(status & COLLISIONS_16) {
6aa20a22 1271 if(lp->col_16 < MAX_COL_16) {
1da177e4 1272 lp->col_16++;
09f75cd7 1273 dev->stats.collisions++;
1da177e4
LT		 1274 /* Resume transmitting, skip failed packet */
1275 outb(0x02, ioaddr + COL_16_REG);
1276 }
1277 else {
1278 printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1279 }
1280 }
1281 }
1282
1283 if( status & 0x00ff ) { /* Let's check the transmit status reg */
1284
1285 if(status & TX_DONE) { /* The transmit has been done */
09f75cd7
JG		 1286 dev->stats.tx_packets = lp->tx_buffered_packets;
1287 dev->stats.tx_bytes += lp->tx_buffered_bytes;
6aa20a22 1288 lp->col_16 = 0;
1da177e4
LT		 1289
1290 if(lp->tx_queue) { /* Is there still packets ? */
1291 /* There was packet(s) so start transmitting and write also
1292 how many packets there is to be sended */
1293 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1294 lp->tx_queue = 0;
1295 lp->tx_queue_len = 0;
1296 lp->tx_started = 1;
1297 }
1298 else {
1299 lp->tx_started = 0;
1300 }
1301 netif_wake_queue(dev);
1302 }
1303 }
1304
6aa20a22 1305 if( ( status & 0x8000 ) ||
1da177e4
LT		 1306 ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1307 eth16i_rx(dev); /* We have packet in receive buffer */
6aa20a22
JG		 1308 }
1309
1da177e4
LT		 1310 /* Turn interrupts back on */
1311 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
6aa20a22 1312
1da177e4
LT		 1313 if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1314 /* There is still more room for one more packet in tx buffer */
1315 netif_wake_queue(dev);
1316 }
6aa20a22 1317
1da177e4 1318 spin_unlock(&lp->lock);
6aa20a22 1319
1da177e4
LT		 1320 return IRQ_RETVAL(handled);
1321}
1322
1323static void eth16i_skip_packet(struct net_device *dev)
6aa20a22 1324{
1da177e4
LT		 1325 int ioaddr = dev->base_addr;
1326
1327 inw(ioaddr + DATAPORT);
1328 inw(ioaddr + DATAPORT);
1329 inw(ioaddr + DATAPORT);
1330
1331 outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1332 while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1333}
1334
1335static void eth16i_reset(struct net_device *dev)
1336{
1337 struct eth16i_local *lp = netdev_priv(dev);
1338 int ioaddr = dev->base_addr;
1339
6aa20a22 1340 if(eth16i_debug > 1)
1da177e4
LT		 1341 printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1342
1343 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
6aa20a22 1344 outw(0xffff, ioaddr + TX_STATUS_REG);
1da177e4
LT		 1345 eth16i_select_regbank(2, ioaddr);
1346
1347 lp->tx_started = 0;
1348 lp->tx_buf_busy = 0;
1349 lp->tx_queue = 0;
6aa20a22 1350 lp->tx_queue_len = 0;
1da177e4
LT		 1351 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1352}
1353
1354static void eth16i_multicast(struct net_device *dev)
1355{
1356 int ioaddr = dev->base_addr;
6aa20a22
JG		 1357
1358 if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1da177e4
LT		 1359 {
1360 dev->flags|=IFF_PROMISC; /* Must do this */
6aa20a22 1361 outb(3, ioaddr + RECEIVE_MODE_REG);
1da177e4
LT		 1362 } else {
1363 outb(2, ioaddr + RECEIVE_MODE_REG);
1364 }
1365}
1366
1da177e4
LT		 1367static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1368{
1369 unsigned char data;
1370
1371 data = inb(ioaddr + CONFIG_REG_1);
6aa20a22 1372 outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1da177e4
LT		 1373}
1374
1375#ifdef MODULE
1376
1377static ushort eth16i_parse_mediatype(const char* s)
1378{
1379 if(!s)
1380 return E_PORT_FROM_EPROM;
6aa20a22 1381
1da177e4
LT		 1382 if (!strncmp(s, "bnc", 3))
1383 return E_PORT_BNC;
1384 else if (!strncmp(s, "tp", 2))
1385 return E_PORT_TP;
1386 else if (!strncmp(s, "dix", 3))
1387 return E_PORT_DIX;
1388 else if (!strncmp(s, "auto", 4))
1389 return E_PORT_AUTO;
1390 else
1391 return E_PORT_FROM_EPROM;
1392}
1393
1394#define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
1395
1396static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1397static int io[MAX_ETH16I_CARDS];
1398#if 0
1399static int irq[MAX_ETH16I_CARDS];
1400#endif
1401static char* mediatype[MAX_ETH16I_CARDS];
1402static int debug = -1;
1403
1404MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1405MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1406MODULE_LICENSE("GPL");
1407
1408
1409module_param_array(io, int, NULL, 0);
1410MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1411
1412#if 0
1413module_param_array(irq, int, NULL, 0);
1414MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1415#endif
1416
1417module_param_array(mediatype, charp, NULL, 0);
1418MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1419
1420module_param(debug, int, 0);
1421MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1422
58f149fc 1423int __init init_module(void)
1da177e4
LT		 1424{
1425 int this_dev, found = 0;
1426 struct net_device *dev;
1427
1428 for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1429 dev = alloc_etherdev(sizeof(struct eth16i_local));
1430 if (!dev)
1431 break;
1432
1433 dev->base_addr = io[this_dev];
1434
1435 if(debug != -1)
1436 eth16i_debug = debug;
1437
1438 if(eth16i_debug > 1)
1439 printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1440
1441 dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1442
1443 if(io[this_dev] == 0) {
1444 if(this_dev != 0) /* Only autoprobe 1st one */
1445 break;
1446
1447 printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1448 }
1449
1450 if (do_eth16i_probe(dev) == 0) {
b1fc5505 1451 dev_eth16i[found++] = dev;
1452 continue;
1da177e4
LT		 1453 }
1454 printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1455 io[this_dev]);
1456 free_netdev(dev);
1457 break;
1458 }
1459 if (found)
1460 return 0;
1461 return -ENXIO;
1462}
6aa20a22 1463
afc8eb46 1464void __exit cleanup_module(void)
1da177e4
LT		 1465{
1466 int this_dev;
1467
1468 for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1469 struct net_device *dev = dev_eth16i[this_dev];
6aa20a22 1470
1da177e4
LT		 1471 if(dev->priv) {
1472 unregister_netdev(dev);
1473 free_irq(dev->irq, dev);
1474 release_region(dev->base_addr, ETH16I_IO_EXTENT);
1475 free_netdev(dev);
1476 }
1477 }
1478}
1479#endif /* MODULE */
1480
1481/*
1482 * Local variables:
1483 * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c eth16i.c"
1484 * alt-compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict -prototypes -O6 -c eth16i.c"
1485 * tab-width: 8
1486 * c-basic-offset: 8
1487 * c-indent-level: 8
1488 * End:
1489 */
1490
1491/* End of file eth16i.c */
Linux kernel - Deliverables
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