[deliverable/linux.git] / drivers / net / ethernet / amd / 7990.c

/*
 * 7990.c -- LANCE ethernet IC generic routines.
 * This is an attempt to separate out the bits of various ethernet
 * drivers that are common because they all use the AMD 7990 LANCE
 * (Local Area Network Controller for Ethernet) chip.
 *
 * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
 *
 * Most of this stuff was obtained by looking at other LANCE drivers,
 * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
 * NB: this was made easy by the fact that Jes Sorensen had cleaned up
 * most of a2025 and sunlance with the aim of merging them, so the
 * common code was pretty obvious.
 */
#include <linux/crc32.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/fcntl.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/in.h>
#include <linux/route.h>
#include <linux/string.h>
#include <linux/skbuff.h>
#include <asm/irq.h>
/* Used for the temporal inet entries and routing */
#include <linux/socket.h>
#include <linux/bitops.h>

#include <asm/io.h>
#include <asm/dma.h>
#include <asm/pgtable.h>
#ifdef CONFIG_HP300
#include <asm/blinken.h>
#endif

#include "7990.h"

#define WRITERAP(lp, x)	out_be16(lp->base + LANCE_RAP, (x))
#define WRITERDP(lp, x)	out_be16(lp->base + LANCE_RDP, (x))
#define READRDP(lp)	in_be16(lp->base + LANCE_RDP)

#if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE)
#include "hplance.h"

#undef WRITERAP
#undef WRITERDP
#undef READRDP

#if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE)

/* Lossage Factor Nine, Mr Sulu. */
#define WRITERAP(lp, x)	(lp->writerap(lp, x))
#define WRITERDP(lp, x)	(lp->writerdp(lp, x))
#define READRDP(lp)	(lp->readrdp(lp))

#else

/* These inlines can be used if only CONFIG_HPLANCE is defined */
static inline void WRITERAP(struct lance_private *lp, __u16 value)
{
	do {
		out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value);
	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
}

static inline void WRITERDP(struct lance_private *lp, __u16 value)
{
	do {
		out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value);
	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
}

static inline __u16 READRDP(struct lance_private *lp)
{
	__u16 value;
	do {
		value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP);
	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
	return value;
}

#endif
#endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */

/* debugging output macros, various flavours */
/* #define TEST_HITS */
#ifdef UNDEF
#define PRINT_RINGS() \
do { \
	int t; \
	for (t = 0; t < RX_RING_SIZE; t++) { \
		printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n", \
		       t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \
		       ib->brx_ring[t].length, \
		       ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \
	} \
	for (t = 0; t < TX_RING_SIZE; t++) { \
		printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n", \
		       t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \
		       ib->btx_ring[t].length, \
		       ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \
	} \
} while (0)
#else
#define PRINT_RINGS()
#endif

/* Load the CSR registers. The LANCE has to be STOPped when we do this! */
static void load_csrs(struct lance_private *lp)
{
	volatile struct lance_init_block *aib = lp->lance_init_block;
	int leptr;

	leptr = LANCE_ADDR(aib);

	WRITERAP(lp, LE_CSR1);                    /* load address of init block */
	WRITERDP(lp, leptr & 0xFFFF);
	WRITERAP(lp, LE_CSR2);
	WRITERDP(lp, leptr >> 16);
	WRITERAP(lp, LE_CSR3);
	WRITERDP(lp, lp->busmaster_regval);       /* set byteswap/ALEctrl/byte ctrl */

	/* Point back to csr0 */
	WRITERAP(lp, LE_CSR0);
}

/* #define to 0 or 1 appropriately */
#define DEBUG_IRING 0
/* Set up the Lance Rx and Tx rings and the init block */
static void lance_init_ring(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	volatile struct lance_init_block *aib; /* for LANCE_ADDR computations */
	int leptr;
	int i;

	aib = lp->lance_init_block;

	lp->rx_new = lp->tx_new = 0;
	lp->rx_old = lp->tx_old = 0;

	ib->mode = LE_MO_PROM;                             /* normal, enable Tx & Rx */

	/* Copy the ethernet address to the lance init block
	 * Notice that we do a byteswap if we're big endian.
	 * [I think this is the right criterion; at least, sunlance,
	 * a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
	 * However, the datasheet says that the BSWAP bit doesn't affect
	 * the init block, so surely it should be low byte first for
	 * everybody? Um.]
	 * We could define the ib->physaddr as three 16bit values and
	 * use (addr[1] << 8) | addr[0] & co, but this is more efficient.
	 */
#ifdef __BIG_ENDIAN
	ib->phys_addr[0] = dev->dev_addr[1];
	ib->phys_addr[1] = dev->dev_addr[0];
	ib->phys_addr[2] = dev->dev_addr[3];
	ib->phys_addr[3] = dev->dev_addr[2];
	ib->phys_addr[4] = dev->dev_addr[5];
	ib->phys_addr[5] = dev->dev_addr[4];
#else
	for (i = 0; i < 6; i++)
	       ib->phys_addr[i] = dev->dev_addr[i];
#endif

	if (DEBUG_IRING)
		printk("TX rings:\n");

	lp->tx_full = 0;
	/* Setup the Tx ring entries */
	for (i = 0; i < (1 << lp->lance_log_tx_bufs); i++) {
		leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
		ib->btx_ring[i].tmd0      = leptr;
		ib->btx_ring[i].tmd1_hadr = leptr >> 16;
		ib->btx_ring[i].tmd1_bits = 0;
		ib->btx_ring[i].length    = 0xf000; /* The ones required by tmd2 */
		ib->btx_ring[i].misc      = 0;
		if (DEBUG_IRING)
			printk("%d: 0x%8.8x\n", i, leptr);
	}

	/* Setup the Rx ring entries */
	if (DEBUG_IRING)
		printk("RX rings:\n");
	for (i = 0; i < (1 << lp->lance_log_rx_bufs); i++) {
		leptr = LANCE_ADDR(&aib->rx_buf[i][0]);

		ib->brx_ring[i].rmd0      = leptr;
		ib->brx_ring[i].rmd1_hadr = leptr >> 16;
		ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
		/* 0xf000 == bits that must be one (reserved, presumably) */
		ib->brx_ring[i].length    = -RX_BUFF_SIZE | 0xf000;
		ib->brx_ring[i].mblength  = 0;
		if (DEBUG_IRING)
			printk("%d: 0x%8.8x\n", i, leptr);
	}

	/* Setup the initialization block */

	/* Setup rx descriptor pointer */
	leptr = LANCE_ADDR(&aib->brx_ring);
	ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16);
	ib->rx_ptr = leptr;
	if (DEBUG_IRING)
		printk("RX ptr: %8.8x\n", leptr);

	/* Setup tx descriptor pointer */
	leptr = LANCE_ADDR(&aib->btx_ring);
	ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16);
	ib->tx_ptr = leptr;
	if (DEBUG_IRING)
		printk("TX ptr: %8.8x\n", leptr);

	/* Clear the multicast filter */
	ib->filter[0] = 0;
	ib->filter[1] = 0;
	PRINT_RINGS();
}

/* LANCE must be STOPped before we do this, too... */
static int init_restart_lance(struct lance_private *lp)
{
	int i;

	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_INIT);

	/* Need a hook here for sunlance ledma stuff */

	/* Wait for the lance to complete initialization */
	for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR | LE_C0_IDON)); i++)
		barrier();
	if ((i == 100) || (READRDP(lp) & LE_C0_ERR)) {
		printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp));
		return -1;
	}

	/* Clear IDON by writing a "1", enable interrupts and start lance */
	WRITERDP(lp, LE_C0_IDON);
	WRITERDP(lp, LE_C0_INEA | LE_C0_STRT);

	return 0;
}

static int lance_reset(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	int status;

	/* Stop the lance */
	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_STOP);

	load_csrs(lp);
	lance_init_ring(dev);
	dev->trans_start = jiffies; /* prevent tx timeout */
	status = init_restart_lance(lp);
#ifdef DEBUG_DRIVER
	printk("Lance restart=%d\n", status);
#endif
	return status;
}

static int lance_rx(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	volatile struct lance_rx_desc *rd;
	unsigned char bits;
#ifdef TEST_HITS
	int i;
#endif

#ifdef TEST_HITS
	printk("[");
	for (i = 0; i < RX_RING_SIZE; i++) {
		if (i == lp->rx_new)
			printk("%s",
			       ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "_" : "X");
		else
			printk("%s",
			      ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "." : "1");
	}
	printk("]");
#endif
#ifdef CONFIG_HP300
	blinken_leds(0x40, 0);
#endif
	WRITERDP(lp, LE_C0_RINT | LE_C0_INEA);     /* ack Rx int, reenable ints */
	for (rd = &ib->brx_ring[lp->rx_new];     /* For each Rx ring we own... */
	     !((bits = rd->rmd1_bits) & LE_R1_OWN);
	     rd = &ib->brx_ring[lp->rx_new]) {

		/* We got an incomplete frame? */
		if ((bits & LE_R1_POK) != LE_R1_POK) {
			dev->stats.rx_over_errors++;
			dev->stats.rx_errors++;
			continue;
		} else if (bits & LE_R1_ERR) {
			/* Count only the end frame as a rx error,
			 * not the beginning
			 */
			if (bits & LE_R1_BUF)
				dev->stats.rx_fifo_errors++;
			if (bits & LE_R1_CRC)
				dev->stats.rx_crc_errors++;
			if (bits & LE_R1_OFL)
				dev->stats.rx_over_errors++;
			if (bits & LE_R1_FRA)
				dev->stats.rx_frame_errors++;
			if (bits & LE_R1_EOP)
				dev->stats.rx_errors++;
		} else {
			int len = (rd->mblength & 0xfff) - 4;
			struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);

			if (!skb) {
				dev->stats.rx_dropped++;
				rd->mblength = 0;
				rd->rmd1_bits = LE_R1_OWN;
				lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
				return 0;
			}

			skb_reserve(skb, 2);           /* 16 byte align */
			skb_put(skb, len);             /* make room */
			skb_copy_to_linear_data(skb,
					 (unsigned char *)&(ib->rx_buf[lp->rx_new][0]),
					 len);
			skb->protocol = eth_type_trans(skb, dev);
			netif_rx(skb);
			dev->stats.rx_packets++;
			dev->stats.rx_bytes += len;
		}

		/* Return the packet to the pool */
		rd->mblength = 0;
		rd->rmd1_bits = LE_R1_OWN;
		lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
	}
	return 0;
}

static int lance_tx(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	volatile struct lance_tx_desc *td;
	int i, j;
	int status;

#ifdef CONFIG_HP300
	blinken_leds(0x80, 0);
#endif
	/* csr0 is 2f3 */
	WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
	/* csr0 is 73 */

	j = lp->tx_old;
	for (i = j; i != lp->tx_new; i = j) {
		td = &ib->btx_ring[i];

		/* If we hit a packet not owned by us, stop */
		if (td->tmd1_bits & LE_T1_OWN)
			break;

		if (td->tmd1_bits & LE_T1_ERR) {
			status = td->misc;

			dev->stats.tx_errors++;
			if (status & LE_T3_RTY)
				dev->stats.tx_aborted_errors++;
			if (status & LE_T3_LCOL)
				dev->stats.tx_window_errors++;

			if (status & LE_T3_CLOS) {
				dev->stats.tx_carrier_errors++;
				if (lp->auto_select) {
					lp->tpe = 1 - lp->tpe;
					printk("%s: Carrier Lost, trying %s\n",
					       dev->name,
					       lp->tpe ? "TPE" : "AUI");
					/* Stop the lance */
					WRITERAP(lp, LE_CSR0);
					WRITERDP(lp, LE_C0_STOP);
					lance_init_ring(dev);
					load_csrs(lp);
					init_restart_lance(lp);
					return 0;
				}
			}

			/* buffer errors and underflows turn off the transmitter */
			/* Restart the adapter */
			if (status & (LE_T3_BUF|LE_T3_UFL)) {
				dev->stats.tx_fifo_errors++;

				printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
				       dev->name);
				/* Stop the lance */
				WRITERAP(lp, LE_CSR0);
				WRITERDP(lp, LE_C0_STOP);
				lance_init_ring(dev);
				load_csrs(lp);
				init_restart_lance(lp);
				return 0;
			}
		} else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
			/*
			 * So we don't count the packet more than once.
			 */
			td->tmd1_bits &= ~(LE_T1_POK);

			/* One collision before packet was sent. */
			if (td->tmd1_bits & LE_T1_EONE)
				dev->stats.collisions++;

			/* More than one collision, be optimistic. */
			if (td->tmd1_bits & LE_T1_EMORE)
				dev->stats.collisions += 2;

			dev->stats.tx_packets++;
		}

		j = (j + 1) & lp->tx_ring_mod_mask;
	}
	lp->tx_old = j;
	WRITERDP(lp, LE_C0_TINT | LE_C0_INEA);
	return 0;
}

static irqreturn_t
lance_interrupt(int irq, void *dev_id)
{
	struct net_device *dev = (struct net_device *)dev_id;
	struct lance_private *lp = netdev_priv(dev);
	int csr0;

	spin_lock(&lp->devlock);

	WRITERAP(lp, LE_CSR0);              /* LANCE Controller Status */
	csr0 = READRDP(lp);

	PRINT_RINGS();

	if (!(csr0 & LE_C0_INTR)) {     /* Check if any interrupt has */
		spin_unlock(&lp->devlock);
		return IRQ_NONE;        /* been generated by the Lance. */
	}

	/* Acknowledge all the interrupt sources ASAP */
	WRITERDP(lp, csr0 & ~(LE_C0_INEA|LE_C0_TDMD|LE_C0_STOP|LE_C0_STRT|LE_C0_INIT));

	if ((csr0 & LE_C0_ERR)) {
		/* Clear the error condition */
		WRITERDP(lp, LE_C0_BABL|LE_C0_ERR|LE_C0_MISS|LE_C0_INEA);
	}

	if (csr0 & LE_C0_RINT)
		lance_rx(dev);

	if (csr0 & LE_C0_TINT)
		lance_tx(dev);

	/* Log misc errors. */
	if (csr0 & LE_C0_BABL)
		dev->stats.tx_errors++;       /* Tx babble. */
	if (csr0 & LE_C0_MISS)
		dev->stats.rx_errors++;       /* Missed a Rx frame. */
	if (csr0 & LE_C0_MERR) {
		printk("%s: Bus master arbitration failure, status %4.4x.\n",
		       dev->name, csr0);
		/* Restart the chip. */
		WRITERDP(lp, LE_C0_STRT);
	}

	if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) {
		lp->tx_full = 0;
		netif_wake_queue(dev);
	}

	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_BABL|LE_C0_CERR|LE_C0_MISS|LE_C0_MERR|LE_C0_IDON|LE_C0_INEA);

	spin_unlock(&lp->devlock);
	return IRQ_HANDLED;
}

int lance_open(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	int res;

	/* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
	if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev))
		return -EAGAIN;

	res = lance_reset(dev);
	spin_lock_init(&lp->devlock);
	netif_start_queue(dev);

	return res;
}
EXPORT_SYMBOL_GPL(lance_open);

int lance_close(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);

	netif_stop_queue(dev);

	/* Stop the LANCE */
	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_STOP);

	free_irq(lp->irq, dev);

	return 0;
}
EXPORT_SYMBOL_GPL(lance_close);

void lance_tx_timeout(struct net_device *dev)
{
	printk("lance_tx_timeout\n");
	lance_reset(dev);
	dev->trans_start = jiffies; /* prevent tx timeout */
	netif_wake_queue(dev);
}
EXPORT_SYMBOL_GPL(lance_tx_timeout);

int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	int entry, skblen, len;
	static int outs;
	unsigned long flags;

	if (!TX_BUFFS_AVAIL)
		return NETDEV_TX_LOCKED;

	netif_stop_queue(dev);

	skblen = skb->len;

#ifdef DEBUG_DRIVER
	/* dump the packet */
	{
		int i;

		for (i = 0; i < 64; i++) {
			if ((i % 16) == 0)
				printk("\n");
			printk("%2.2x ", skb->data[i]);
		}
	}
#endif
	len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
	entry = lp->tx_new & lp->tx_ring_mod_mask;
	ib->btx_ring[entry].length = (-len) | 0xf000;
	ib->btx_ring[entry].misc = 0;

	if (skb->len < ETH_ZLEN)
		memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN);
	skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);

	/* Now, give the packet to the lance */
	ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
	lp->tx_new = (lp->tx_new + 1) & lp->tx_ring_mod_mask;

	outs++;
	/* Kick the lance: transmit now */
	WRITERDP(lp, LE_C0_INEA | LE_C0_TDMD);
	dev_consume_skb_any(skb);

	spin_lock_irqsave(&lp->devlock, flags);
	if (TX_BUFFS_AVAIL)
		netif_start_queue(dev);
	else
		lp->tx_full = 1;
	spin_unlock_irqrestore(&lp->devlock, flags);

	return NETDEV_TX_OK;
}
EXPORT_SYMBOL_GPL(lance_start_xmit);

/* taken from the depca driver via a2065.c */
static void lance_load_multicast(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	volatile u16 *mcast_table = (u16 *)&ib->filter;
	struct netdev_hw_addr *ha;
	u32 crc;

	/* set all multicast bits */
	if (dev->flags & IFF_ALLMULTI) {
		ib->filter[0] = 0xffffffff;
		ib->filter[1] = 0xffffffff;
		return;
	}
	/* clear the multicast filter */
	ib->filter[0] = 0;
	ib->filter[1] = 0;

	/* Add addresses */
	netdev_for_each_mc_addr(ha, dev) {
		crc = ether_crc_le(6, ha->addr);
		crc = crc >> 26;
		mcast_table[crc >> 4] |= 1 << (crc & 0xf);
	}
}


void lance_set_multicast(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);
	volatile struct lance_init_block *ib = lp->init_block;
	int stopped;

	stopped = netif_queue_stopped(dev);
	if (!stopped)
		netif_stop_queue(dev);

	while (lp->tx_old != lp->tx_new)
		schedule();

	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_STOP);
	lance_init_ring(dev);

	if (dev->flags & IFF_PROMISC) {
		ib->mode |= LE_MO_PROM;
	} else {
		ib->mode &= ~LE_MO_PROM;
		lance_load_multicast(dev);
	}
	load_csrs(lp);
	init_restart_lance(lp);

	if (!stopped)
		netif_start_queue(dev);
}
EXPORT_SYMBOL_GPL(lance_set_multicast);

#ifdef CONFIG_NET_POLL_CONTROLLER
void lance_poll(struct net_device *dev)
{
	struct lance_private *lp = netdev_priv(dev);

	spin_lock(&lp->devlock);
	WRITERAP(lp, LE_CSR0);
	WRITERDP(lp, LE_C0_STRT);
	spin_unlock(&lp->devlock);
	lance_interrupt(dev->irq, dev);
}
EXPORT_SYMBOL_GPL(lance_poll);
#endif

MODULE_LICENSE("GPL");
Commit	Line	Data
6aa20a22 JG	1	/*
6aa20a22 JG	2	* 7990.c -- LANCE ethernet IC generic routines.
1da177e4	3	* This is an attempt to separate out the bits of various ethernet
6aa20a22	4	* drivers that are common because they all use the AMD 7990 LANCE
1da177e4 LT	5	* (Local Area Network Controller for Ethernet) chip.
	6	*
	7	* Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
	8	*
	9	* Most of this stuff was obtained by looking at other LANCE drivers,
	10	* in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
	11	* NB: this was made easy by the fact that Jes Sorensen had cleaned up
6aa20a22	12	* most of a2025 and sunlance with the aim of merging them, so the
1da177e4 LT	13	* common code was pretty obvious.
	14	*/
	15	#include <linux/crc32.h>
	16	#include <linux/delay.h>
	17	#include <linux/errno.h>
	18	#include <linux/netdevice.h>
	19	#include <linux/etherdevice.h>
1da177e4 LT	20	#include <linux/module.h>
	21	#include <linux/kernel.h>
	22	#include <linux/types.h>
	23	#include <linux/fcntl.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/ioport.h>
	26	#include <linux/in.h>
	27	#include <linux/route.h>
1da177e4 LT	28	#include <linux/string.h>
1da177e4 LT	29	#include <linux/skbuff.h>
3c139586	30	#include <asm/irq.h>
1da177e4 LT	31	/* Used for the temporal inet entries and routing */
	32	#include <linux/socket.h>
	33	#include <linux/bitops.h>
	34
1da177e4 LT	35	#include <asm/io.h>
	36	#include <asm/dma.h>
	37	#include <asm/pgtable.h>
	38	#ifdef CONFIG_HP300
	39	#include <asm/blinken.h>
	40	#endif
	41
	42	#include "7990.h"
	43
a8ab77a8 GU	44	#define WRITERAP(lp, x) out_be16(lp->base + LANCE_RAP, (x))
	45	#define WRITERDP(lp, x) out_be16(lp->base + LANCE_RDP, (x))
	46	#define READRDP(lp) in_be16(lp->base + LANCE_RDP)
1da177e4 LT	47
	48	#if defined(CONFIG_HPLANCE) \|\| defined(CONFIG_HPLANCE_MODULE)
	49	#include "hplance.h"
	50
	51	#undef WRITERAP
	52	#undef WRITERDP
	53	#undef READRDP
	54
	55	#if defined(CONFIG_MVME147_NET) \|\| defined(CONFIG_MVME147_NET_MODULE)
	56
	57	/* Lossage Factor Nine, Mr Sulu. */
a8ab77a8 GU	58	#define WRITERAP(lp, x) (lp->writerap(lp, x))
	59	#define WRITERDP(lp, x) (lp->writerdp(lp, x))
	60	#define READRDP(lp) (lp->readrdp(lp))
1da177e4 LT	61
	62	#else
	63
	64	/* These inlines can be used if only CONFIG_HPLANCE is defined */
	65	static inline void WRITERAP(struct lance_private *lp, __u16 value)
	66	{
	67	do {
	68	out_be16(lp->base + HPLANCE_REGOFF + LANCE_RAP, value);
	69	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
	70	}
	71
	72	static inline void WRITERDP(struct lance_private *lp, __u16 value)
	73	{
	74	do {
	75	out_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP, value);
	76	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
	77	}
	78
	79	static inline __u16 READRDP(struct lance_private *lp)
	80	{
	81	__u16 value;
	82	do {
	83	value = in_be16(lp->base + HPLANCE_REGOFF + LANCE_RDP);
	84	} while ((in_8(lp->base + HPLANCE_STATUS) & LE_ACK) == 0);
	85	return value;
	86	}
	87
	88	#endif
	89	#endif /* CONFIG_HPLANCE \|\| CONFIG_HPLANCE_MODULE */
	90
	91	/* debugging output macros, various flavours */
	92	/* #define TEST_HITS */
	93	#ifdef UNDEF
	94	#define PRINT_RINGS() \
	95	do { \
a8ab77a8 GU	96	int t; \
	97	for (t = 0; t < RX_RING_SIZE; t++) { \
	98	printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n", \
	99	t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0, \
	100	ib->brx_ring[t].length, \
	101	ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits); \
	102	} \
	103	for (t = 0; t < TX_RING_SIZE; t++) { \
	104	printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n", \
	105	t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0, \
	106	ib->btx_ring[t].length, \
	107	ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits); \
	108	} \
6aa20a22	109	} while (0)
1da177e4 LT	110	#else
1da177e4 LT	111	#define PRINT_RINGS()
6aa20a22	112	#endif
1da177e4 LT	113
1da177e4 LT	114	/* Load the CSR registers. The LANCE has to be STOPped when we do this! */
a8ab77a8	115	static void load_csrs(struct lance_private *lp)
1da177e4	116	{
a8ab77a8 GU	117	volatile struct lance_init_block *aib = lp->lance_init_block;
a8ab77a8 GU	118	int leptr;
1da177e4	119
a8ab77a8	120	leptr = LANCE_ADDR(aib);
1da177e4	121
a8ab77a8 GU	122	WRITERAP(lp, LE_CSR1); /* load address of init block */
	123	WRITERDP(lp, leptr & 0xFFFF);
	124	WRITERAP(lp, LE_CSR2);
	125	WRITERDP(lp, leptr >> 16);
	126	WRITERAP(lp, LE_CSR3);
	127	WRITERDP(lp, lp->busmaster_regval); /* set byteswap/ALEctrl/byte ctrl */
1da177e4	128
a8ab77a8 GU	129	/* Point back to csr0 */
a8ab77a8 GU	130	WRITERAP(lp, LE_CSR0);
1da177e4 LT	131	}
	132
	133	/* #define to 0 or 1 appropriately */
	134	#define DEBUG_IRING 0
	135	/* Set up the Lance Rx and Tx rings and the init block */
a8ab77a8	136	static void lance_init_ring(struct net_device *dev)
1da177e4	137	{
a8ab77a8 GU	138	struct lance_private *lp = netdev_priv(dev);
	139	volatile struct lance_init_block *ib = lp->init_block;
	140	volatile struct lance_init_block aib; / for LANCE_ADDR computations */
	141	int leptr;
	142	int i;
	143
	144	aib = lp->lance_init_block;
	145
	146	lp->rx_new = lp->tx_new = 0;
	147	lp->rx_old = lp->tx_old = 0;
	148
	149	ib->mode = LE_MO_PROM; /* normal, enable Tx & Rx */
	150
	151	/* Copy the ethernet address to the lance init block
	152	* Notice that we do a byteswap if we're big endian.
	153	* [I think this is the right criterion; at least, sunlance,
	154	* a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
	155	* However, the datasheet says that the BSWAP bit doesn't affect
	156	* the init block, so surely it should be low byte first for
	157	* everybody? Um.]
	158	* We could define the ib->physaddr as three 16bit values and
	159	* use (addr[1] << 8) \| addr[0] & co, but this is more efficient.
	160	*/
1da177e4	161	#ifdef __BIG_ENDIAN
a8ab77a8 GU	162	ib->phys_addr[0] = dev->dev_addr[1];
	163	ib->phys_addr[1] = dev->dev_addr[0];
	164	ib->phys_addr[2] = dev->dev_addr[3];
	165	ib->phys_addr[3] = dev->dev_addr[2];
	166	ib->phys_addr[4] = dev->dev_addr[5];
	167	ib->phys_addr[5] = dev->dev_addr[4];
1da177e4	168	#else
a8ab77a8 GU	169	for (i = 0; i < 6; i++)
a8ab77a8 GU	170	ib->phys_addr[i] = dev->dev_addr[i];
6aa20a22	171	#endif
1da177e4	172
a8ab77a8 GU	173	if (DEBUG_IRING)
a8ab77a8 GU	174	printk("TX rings:\n");
6aa20a22	175
1da177e4	176	lp->tx_full = 0;
a8ab77a8 GU	177	/* Setup the Tx ring entries */
	178	for (i = 0; i < (1 << lp->lance_log_tx_bufs); i++) {
	179	leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
	180	ib->btx_ring[i].tmd0 = leptr;
	181	ib->btx_ring[i].tmd1_hadr = leptr >> 16;
	182	ib->btx_ring[i].tmd1_bits = 0;
	183	ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
	184	ib->btx_ring[i].misc = 0;
	185	if (DEBUG_IRING)
	186	printk("%d: 0x%8.8x\n", i, leptr);
	187	}
	188
	189	/* Setup the Rx ring entries */
	190	if (DEBUG_IRING)
	191	printk("RX rings:\n");
	192	for (i = 0; i < (1 << lp->lance_log_rx_bufs); i++) {
	193	leptr = LANCE_ADDR(&aib->rx_buf[i][0]);
	194
	195	ib->brx_ring[i].rmd0 = leptr;
	196	ib->brx_ring[i].rmd1_hadr = leptr >> 16;
	197	ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
	198	/* 0xf000 == bits that must be one (reserved, presumably) */
	199	ib->brx_ring[i].length = -RX_BUFF_SIZE \| 0xf000;
	200	ib->brx_ring[i].mblength = 0;
	201	if (DEBUG_IRING)
	202	printk("%d: 0x%8.8x\n", i, leptr);
	203	}
	204
	205	/* Setup the initialization block */
	206
	207	/* Setup rx descriptor pointer */
	208	leptr = LANCE_ADDR(&aib->brx_ring);
	209	ib->rx_len = (lp->lance_log_rx_bufs << 13) \| (leptr >> 16);
	210	ib->rx_ptr = leptr;
	211	if (DEBUG_IRING)
	212	printk("RX ptr: %8.8x\n", leptr);
	213
	214	/* Setup tx descriptor pointer */
	215	leptr = LANCE_ADDR(&aib->btx_ring);
	216	ib->tx_len = (lp->lance_log_tx_bufs << 13) \| (leptr >> 16);
	217	ib->tx_ptr = leptr;
	218	if (DEBUG_IRING)
	219	printk("TX ptr: %8.8x\n", leptr);
	220
	221	/* Clear the multicast filter */
	222	ib->filter[0] = 0;
	223	ib->filter[1] = 0;
	224	PRINT_RINGS();
1da177e4 LT	225	}
	226
	227	/* LANCE must be STOPped before we do this, too... */
a8ab77a8	228	static int init_restart_lance(struct lance_private *lp)
1da177e4	229	{
a8ab77a8	230	int i;
1da177e4	231
a8ab77a8 GU	232	WRITERAP(lp, LE_CSR0);
a8ab77a8 GU	233	WRITERDP(lp, LE_C0_INIT);
1da177e4	234
a8ab77a8	235	/* Need a hook here for sunlance ledma stuff */
1da177e4	236
a8ab77a8 GU	237	/* Wait for the lance to complete initialization */
	238	for (i = 0; (i < 100) && !(READRDP(lp) & (LE_C0_ERR \| LE_C0_IDON)); i++)
	239	barrier();
	240	if ((i == 100) \|\| (READRDP(lp) & LE_C0_ERR)) {
	241	printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, READRDP(lp));
	242	return -1;
	243	}
1da177e4	244
a8ab77a8 GU	245	/* Clear IDON by writing a "1", enable interrupts and start lance */
	246	WRITERDP(lp, LE_C0_IDON);
	247	WRITERDP(lp, LE_C0_INEA \| LE_C0_STRT);
1da177e4	248
a8ab77a8	249	return 0;
1da177e4 LT	250	}
1da177e4 LT	251
a8ab77a8	252	static int lance_reset(struct net_device *dev)
1da177e4	253	{
a8ab77a8 GU	254	struct lance_private *lp = netdev_priv(dev);
a8ab77a8 GU	255	int status;
6aa20a22	256
a8ab77a8 GU	257	/* Stop the lance */
	258	WRITERAP(lp, LE_CSR0);
	259	WRITERDP(lp, LE_C0_STOP);
1da177e4	260
a8ab77a8 GU	261	load_csrs(lp);
	262	lance_init_ring(dev);
	263	dev->trans_start = jiffies; /* prevent tx timeout */
	264	status = init_restart_lance(lp);
1da177e4	265	#ifdef DEBUG_DRIVER
a8ab77a8	266	printk("Lance restart=%d\n", status);
1da177e4	267	#endif
a8ab77a8	268	return status;
1da177e4 LT	269	}
1da177e4 LT	270
a8ab77a8	271	static int lance_rx(struct net_device *dev)
1da177e4	272	{
a8ab77a8 GU	273	struct lance_private *lp = netdev_priv(dev);
	274	volatile struct lance_init_block *ib = lp->init_block;
	275	volatile struct lance_rx_desc *rd;
	276	unsigned char bits;
1da177e4	277	#ifdef TEST_HITS
a8ab77a8	278	int i;
1da177e4 LT	279	#endif
	280
	281	#ifdef TEST_HITS
a8ab77a8 GU	282	printk("[");
	283	for (i = 0; i < RX_RING_SIZE; i++) {
	284	if (i == lp->rx_new)
	285	printk("%s",
	286	ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "_" : "X");
	287	else
	288	printk("%s",
	289	ib->brx_ring[i].rmd1_bits & LE_R1_OWN ? "." : "1");
	290	}
	291	printk("]");
1da177e4 LT	292	#endif
	293	#ifdef CONFIG_HP300
	294	blinken_leds(0x40, 0);
6aa20a22	295	#endif
a8ab77a8 GU	296	WRITERDP(lp, LE_C0_RINT \| LE_C0_INEA); /* ack Rx int, reenable ints */
	297	for (rd = &ib->brx_ring[lp->rx_new]; /* For each Rx ring we own... */
	298	!((bits = rd->rmd1_bits) & LE_R1_OWN);
	299	rd = &ib->brx_ring[lp->rx_new]) {
	300
	301	/* We got an incomplete frame? */
	302	if ((bits & LE_R1_POK) != LE_R1_POK) {
	303	dev->stats.rx_over_errors++;
	304	dev->stats.rx_errors++;
	305	continue;
	306	} else if (bits & LE_R1_ERR) {
	307	/* Count only the end frame as a rx error,
	308	* not the beginning
	309	*/
	310	if (bits & LE_R1_BUF)
	311	dev->stats.rx_fifo_errors++;
	312	if (bits & LE_R1_CRC)
	313	dev->stats.rx_crc_errors++;
	314	if (bits & LE_R1_OFL)
	315	dev->stats.rx_over_errors++;
	316	if (bits & LE_R1_FRA)
	317	dev->stats.rx_frame_errors++;
	318	if (bits & LE_R1_EOP)
	319	dev->stats.rx_errors++;
	320	} else {
79ea13ce	321	int len = (rd->mblength & 0xfff) - 4;
1d266430	322	struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
1da177e4	323
a8ab77a8 GU	324	if (!skb) {
	325	dev->stats.rx_dropped++;
	326	rd->mblength = 0;
	327	rd->rmd1_bits = LE_R1_OWN;
	328	lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
	329	return 0;
	330	}
	331
	332	skb_reserve(skb, 2); /* 16 byte align */
	333	skb_put(skb, len); /* make room */
	334	skb_copy_to_linear_data(skb,
	335	(unsigned char *)&(ib->rx_buf[lp->rx_new][0]),
	336	len);
	337	skb->protocol = eth_type_trans(skb, dev);
	338	netif_rx(skb);
09f75cd7 JG	339	dev->stats.rx_packets++;
09f75cd7 JG	340	dev->stats.rx_bytes += len;
a8ab77a8 GU	341	}
	342
	343	/* Return the packet to the pool */
	344	rd->mblength = 0;
	345	rd->rmd1_bits = LE_R1_OWN;
	346	lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
	347	}
	348	return 0;
1da177e4 LT	349	}
1da177e4 LT	350
a8ab77a8	351	static int lance_tx(struct net_device *dev)
1da177e4	352	{
a8ab77a8 GU	353	struct lance_private *lp = netdev_priv(dev);
	354	volatile struct lance_init_block *ib = lp->init_block;
	355	volatile struct lance_tx_desc *td;
	356	int i, j;
	357	int status;
1da177e4 LT	358
	359	#ifdef CONFIG_HP300
	360	blinken_leds(0x80, 0);
	361	#endif
a8ab77a8 GU	362	/* csr0 is 2f3 */
	363	WRITERDP(lp, LE_C0_TINT \| LE_C0_INEA);
	364	/* csr0 is 73 */
	365
	366	j = lp->tx_old;
	367	for (i = j; i != lp->tx_new; i = j) {
	368	td = &ib->btx_ring[i];
	369
	370	/* If we hit a packet not owned by us, stop */
	371	if (td->tmd1_bits & LE_T1_OWN)
	372	break;
	373
	374	if (td->tmd1_bits & LE_T1_ERR) {
	375	status = td->misc;
	376
	377	dev->stats.tx_errors++;
	378	if (status & LE_T3_RTY)
	379	dev->stats.tx_aborted_errors++;
	380	if (status & LE_T3_LCOL)
	381	dev->stats.tx_window_errors++;
	382
	383	if (status & LE_T3_CLOS) {
	384	dev->stats.tx_carrier_errors++;
	385	if (lp->auto_select) {
	386	lp->tpe = 1 - lp->tpe;
	387	printk("%s: Carrier Lost, trying %s\n",
	388	dev->name,
	389	lp->tpe ? "TPE" : "AUI");
	390	/* Stop the lance */
	391	WRITERAP(lp, LE_CSR0);
	392	WRITERDP(lp, LE_C0_STOP);
	393	lance_init_ring(dev);
	394	load_csrs(lp);
	395	init_restart_lance(lp);
	396	return 0;
	397	}
	398	}
	399
	400	/* buffer errors and underflows turn off the transmitter */
	401	/* Restart the adapter */
	402	if (status & (LE_T3_BUF\|LE_T3_UFL)) {
	403	dev->stats.tx_fifo_errors++;
	404
	405	printk("%s: Tx: ERR_BUF\|ERR_UFL, restarting\n",
	406	dev->name);
	407	/* Stop the lance */
	408	WRITERAP(lp, LE_CSR0);
	409	WRITERDP(lp, LE_C0_STOP);
	410	lance_init_ring(dev);
	411	load_csrs(lp);
	412	init_restart_lance(lp);
	413	return 0;
	414	}
	415	} else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
	416	/*
	417	* So we don't count the packet more than once.
	418	*/
	419	td->tmd1_bits &= ~(LE_T1_POK);
	420
	421	/* One collision before packet was sent. */
	422	if (td->tmd1_bits & LE_T1_EONE)
	423	dev->stats.collisions++;
	424
	425	/* More than one collision, be optimistic. */
426	if (td->tmd1_bits & LE_T1_EMORE)
427	dev->stats.collisions += 2;
428
429	dev->stats.tx_packets++;
430	}
431
432	j = (j + 1) & lp->tx_ring_mod_mask;
433	}
434	lp->tx_old = j;
435	WRITERDP(lp, LE_C0_TINT \| LE_C0_INEA);
436	return 0;
1da177e4 LT	437	}
	438
	439	static irqreturn_t
a8ab77a8	440	lance_interrupt(int irq, void *dev_id)
1da177e4	441	{
a8ab77a8 GU	442	struct net_device dev = (struct net_device )dev_id;
	443	struct lance_private *lp = netdev_priv(dev);
	444	int csr0;
1da177e4	445
a8ab77a8	446	spin_lock(&lp->devlock);
1da177e4	447
a8ab77a8 GU	448	WRITERAP(lp, LE_CSR0); /* LANCE Controller Status */
a8ab77a8 GU	449	csr0 = READRDP(lp);
1da177e4	450
a8ab77a8	451	PRINT_RINGS();
6aa20a22	452
a8ab77a8 GU	453	if (!(csr0 & LE_C0_INTR)) { /* Check if any interrupt has */
	454	spin_unlock(&lp->devlock);
	455	return IRQ_NONE; /* been generated by the Lance. */
1da177e4 LT	456	}
1da177e4 LT	457
a8ab77a8 GU	458	/* Acknowledge all the interrupt sources ASAP */
	459	WRITERDP(lp, csr0 & ~(LE_C0_INEA\|LE_C0_TDMD\|LE_C0_STOP\|LE_C0_STRT\|LE_C0_INIT));
	460
	461	if ((csr0 & LE_C0_ERR)) {
	462	/* Clear the error condition */
	463	WRITERDP(lp, LE_C0_BABL\|LE_C0_ERR\|LE_C0_MISS\|LE_C0_INEA);
	464	}
	465
	466	if (csr0 & LE_C0_RINT)
	467	lance_rx(dev);
	468
	469	if (csr0 & LE_C0_TINT)
	470	lance_tx(dev);
	471
	472	/* Log misc errors. */
	473	if (csr0 & LE_C0_BABL)
	474	dev->stats.tx_errors++; /* Tx babble. */
	475	if (csr0 & LE_C0_MISS)
	476	dev->stats.rx_errors++; /* Missed a Rx frame. */
	477	if (csr0 & LE_C0_MERR) {
	478	printk("%s: Bus master arbitration failure, status %4.4x.\n",
	479	dev->name, csr0);
	480	/* Restart the chip. */
	481	WRITERDP(lp, LE_C0_STRT);
	482	}
	483
	484	if (lp->tx_full && netif_queue_stopped(dev) && (TX_BUFFS_AVAIL >= 0)) {
1da177e4	485	lp->tx_full = 0;
a8ab77a8 GU	486	netif_wake_queue(dev);
a8ab77a8 GU	487	}
6aa20a22	488
a8ab77a8 GU	489	WRITERAP(lp, LE_CSR0);
a8ab77a8 GU	490	WRITERDP(lp, LE_C0_BABL\|LE_C0_CERR\|LE_C0_MISS\|LE_C0_MERR\|LE_C0_IDON\|LE_C0_INEA);
1da177e4	491
a8ab77a8	492	spin_unlock(&lp->devlock);
1da177e4 LT	493	return IRQ_HANDLED;
	494	}
	495
a8ab77a8	496	int lance_open(struct net_device *dev)
1da177e4	497	{
a8ab77a8	498	struct lance_private *lp = netdev_priv(dev);
1da177e4	499	int res;
6aa20a22	500
a8ab77a8 GU	501	/* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
	502	if (request_irq(lp->irq, lance_interrupt, IRQF_SHARED, lp->name, dev))
	503	return -EAGAIN;
1da177e4	504
a8ab77a8	505	res = lance_reset(dev);
1da177e4	506	spin_lock_init(&lp->devlock);
a8ab77a8	507	netif_start_queue(dev);
1da177e4 LT	508
	509	return res;
	510	}
bf4d5934	511	EXPORT_SYMBOL_GPL(lance_open);
1da177e4	512
a8ab77a8	513	int lance_close(struct net_device *dev)
1da177e4	514	{
a8ab77a8	515	struct lance_private *lp = netdev_priv(dev);
6aa20a22	516
a8ab77a8	517	netif_stop_queue(dev);
1da177e4	518
a8ab77a8 GU	519	/* Stop the LANCE */
	520	WRITERAP(lp, LE_CSR0);
	521	WRITERDP(lp, LE_C0_STOP);
1da177e4	522
a8ab77a8	523	free_irq(lp->irq, dev);
1da177e4	524
a8ab77a8	525	return 0;
1da177e4	526	}
bf4d5934	527	EXPORT_SYMBOL_GPL(lance_close);
1da177e4 LT	528
	529	void lance_tx_timeout(struct net_device *dev)
	530	{
	531	printk("lance_tx_timeout\n");
	532	lance_reset(dev);
1ae5dc34	533	dev->trans_start = jiffies; /* prevent tx timeout */
a8ab77a8	534	netif_wake_queue(dev);
1da177e4	535	}
bf4d5934	536	EXPORT_SYMBOL_GPL(lance_tx_timeout);
1da177e4	537
a8ab77a8	538	int lance_start_xmit(struct sk_buff skb, struct net_device dev)
1da177e4	539	{
a8ab77a8 GU	540	struct lance_private *lp = netdev_priv(dev);
	541	volatile struct lance_init_block *ib = lp->init_block;
	542	int entry, skblen, len;
	543	static int outs;
1da177e4 LT	544	unsigned long flags;
1da177e4 LT	545
a8ab77a8 GU	546	if (!TX_BUFFS_AVAIL)
a8ab77a8 GU	547	return NETDEV_TX_LOCKED;
1da177e4	548
a8ab77a8	549	netif_stop_queue(dev);
1da177e4	550
a8ab77a8	551	skblen = skb->len;
1da177e4 LT	552
1da177e4 LT	553	#ifdef DEBUG_DRIVER
a8ab77a8 GU	554	/* dump the packet */
	555	{
	556	int i;
	557
	558	for (i = 0; i < 64; i++) {
	559	if ((i % 16) == 0)
	560	printk("\n");
	561	printk("%2.2x ", skb->data[i]);
	562	}
	563	}
1da177e4	564	#endif
a8ab77a8 GU	565	len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
	566	entry = lp->tx_new & lp->tx_ring_mod_mask;
	567	ib->btx_ring[entry].length = (-len) \| 0xf000;
	568	ib->btx_ring[entry].misc = 0;
6aa20a22	569
cfa08bb5 GU	570	if (skb->len < ETH_ZLEN)
cfa08bb5 GU	571	memset((void *)&ib->tx_buf[entry][0], 0, ETH_ZLEN);
a8ab77a8	572	skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);
6aa20a22	573
a8ab77a8 GU	574	/* Now, give the packet to the lance */
	575	ib->btx_ring[entry].tmd1_bits = (LE_T1_POK\|LE_T1_OWN);
	576	lp->tx_new = (lp->tx_new + 1) & lp->tx_ring_mod_mask;
1da177e4	577
a8ab77a8 GU	578	outs++;
	579	/* Kick the lance: transmit now */
	580	WRITERDP(lp, LE_C0_INEA \| LE_C0_TDMD);
37392c7b	581	dev_consume_skb_any(skb);
6aa20a22	582
a8ab77a8 GU	583	spin_lock_irqsave(&lp->devlock, flags);
	584	if (TX_BUFFS_AVAIL)
	585	netif_start_queue(dev);
1da177e4 LT	586	else
1da177e4 LT	587	lp->tx_full = 1;
a8ab77a8	588	spin_unlock_irqrestore(&lp->devlock, flags);
1da177e4	589
a8ab77a8	590	return NETDEV_TX_OK;
1da177e4	591	}
bf4d5934	592	EXPORT_SYMBOL_GPL(lance_start_xmit);
1da177e4	593
1da177e4	594	/* taken from the depca driver via a2065.c */
a8ab77a8	595	static void lance_load_multicast(struct net_device *dev)
1da177e4	596	{
a8ab77a8 GU	597	struct lance_private *lp = netdev_priv(dev);
	598	volatile struct lance_init_block *ib = lp->init_block;
	599	volatile u16 mcast_table = (u16 )&ib->filter;
22bedad3	600	struct netdev_hw_addr *ha;
a8ab77a8 GU	601	u32 crc;
	602
	603	/* set all multicast bits */
	604	if (dev->flags & IFF_ALLMULTI) {
	605	ib->filter[0] = 0xffffffff;
	606	ib->filter[1] = 0xffffffff;
	607	return;
	608	}
	609	/* clear the multicast filter */
	610	ib->filter[0] = 0;
	611	ib->filter[1] = 0;
	612
	613	/* Add addresses */
22bedad3	614	netdev_for_each_mc_addr(ha, dev) {
498d8e23	615	crc = ether_crc_le(6, ha->addr);
a8ab77a8 GU	616	crc = crc >> 26;
	617	mcast_table[crc >> 4] \|= 1 << (crc & 0xf);
	618	}
1da177e4 LT	619	}
	620
	621
a8ab77a8	622	void lance_set_multicast(struct net_device *dev)
1da177e4	623	{
a8ab77a8 GU	624	struct lance_private *lp = netdev_priv(dev);
a8ab77a8 GU	625	volatile struct lance_init_block *ib = lp->init_block;
1da177e4 LT	626	int stopped;
	627
	628	stopped = netif_queue_stopped(dev);
	629	if (!stopped)
a8ab77a8	630	netif_stop_queue(dev);
1da177e4	631
a8ab77a8 GU	632	while (lp->tx_old != lp->tx_new)
a8ab77a8 GU	633	schedule();
1da177e4	634
a8ab77a8 GU	635	WRITERAP(lp, LE_CSR0);
	636	WRITERDP(lp, LE_C0_STOP);
	637	lance_init_ring(dev);
	638
	639	if (dev->flags & IFF_PROMISC) {
	640	ib->mode \|= LE_MO_PROM;
	641	} else {
	642	ib->mode &= ~LE_MO_PROM;
	643	lance_load_multicast(dev);
	644	}
	645	load_csrs(lp);
	646	init_restart_lance(lp);
1da177e4 LT	647
1da177e4 LT	648	if (!stopped)
a8ab77a8	649	netif_start_queue(dev);
1da177e4	650	}
bf4d5934	651	EXPORT_SYMBOL_GPL(lance_set_multicast);
1da177e4 LT	652
	653	#ifdef CONFIG_NET_POLL_CONTROLLER
	654	void lance_poll(struct net_device *dev)
	655	{
	656	struct lance_private *lp = netdev_priv(dev);
	657
a8ab77a8	658	spin_lock(&lp->devlock);
1da177e4 LT	659	WRITERAP(lp, LE_CSR0);
1da177e4 LT	660	WRITERDP(lp, LE_C0_STRT);
a8ab77a8	661	spin_unlock(&lp->devlock);
2850bc27	662	lance_interrupt(dev->irq, dev);
1da177e4	663	}
93a82ca2	664	EXPORT_SYMBOL_GPL(lance_poll);
1da177e4 LT	665	#endif
	666
	667	MODULE_LICENSE("GPL");