amd-xgbe: Add support for per DMA channel interrupts
[deliverable/linux.git] / drivers / net / ethernet / amd / xgbe / xgbe-main.c
CommitLineData
c5aa9e3b
LT
1/*
2 * AMD 10Gb Ethernet driver
3 *
4 * This file is available to you under your choice of the following two
5 * licenses:
6 *
7 * License 1: GPLv2
8 *
9 * Copyright (c) 2014 Advanced Micro Devices, Inc.
10 *
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 *
24 * This file incorporates work covered by the following copyright and
25 * permission notice:
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
29 * and you.
30 *
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
43 *
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
55 *
56 *
57 * License 2: Modified BSD
58 *
59 * Copyright (c) 2014 Advanced Micro Devices, Inc.
60 * All rights reserved.
61 *
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
72 *
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
83 *
84 * This file incorporates work covered by the following copyright and
85 * permission notice:
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
89 * and you.
90 *
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
100 *
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
103 *
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
115 */
116
117#include <linux/module.h>
118#include <linux/device.h>
119#include <linux/platform_device.h>
120#include <linux/spinlock.h>
121#include <linux/netdevice.h>
122#include <linux/etherdevice.h>
123#include <linux/io.h>
124#include <linux/of.h>
125#include <linux/of_net.h>
126#include <linux/clk.h>
127
128#include "xgbe.h"
129#include "xgbe-common.h"
130
c5aa9e3b
LT
131MODULE_AUTHOR("Tom Lendacky <thomas.lendacky@amd.com>");
132MODULE_LICENSE("Dual BSD/GPL");
133MODULE_VERSION(XGBE_DRV_VERSION);
134MODULE_DESCRIPTION(XGBE_DRV_DESC);
135
c5aa9e3b
LT
136static void xgbe_default_config(struct xgbe_prv_data *pdata)
137{
138 DBGPR("-->xgbe_default_config\n");
139
140 pdata->pblx8 = DMA_PBL_X8_ENABLE;
141 pdata->tx_sf_mode = MTL_TSF_ENABLE;
142 pdata->tx_threshold = MTL_TX_THRESHOLD_64;
143 pdata->tx_pbl = DMA_PBL_16;
144 pdata->tx_osp_mode = DMA_OSP_ENABLE;
145 pdata->rx_sf_mode = MTL_RSF_DISABLE;
146 pdata->rx_threshold = MTL_RX_THRESHOLD_64;
147 pdata->rx_pbl = DMA_PBL_16;
148 pdata->pause_autoneg = 1;
149 pdata->tx_pause = 1;
150 pdata->rx_pause = 1;
151 pdata->power_down = 0;
152 pdata->default_autoneg = AUTONEG_ENABLE;
153 pdata->default_speed = SPEED_10000;
154
155 DBGPR("<--xgbe_default_config\n");
156}
157
158static void xgbe_init_all_fptrs(struct xgbe_prv_data *pdata)
159{
160 xgbe_init_function_ptrs_dev(&pdata->hw_if);
161 xgbe_init_function_ptrs_desc(&pdata->desc_if);
162}
163
164static int xgbe_probe(struct platform_device *pdev)
165{
166 struct xgbe_prv_data *pdata;
167 struct xgbe_hw_if *hw_if;
168 struct xgbe_desc_if *desc_if;
169 struct net_device *netdev;
170 struct device *dev = &pdev->dev;
171 struct resource *res;
172 const u8 *mac_addr;
173 int ret;
174
175 DBGPR("--> xgbe_probe\n");
176
177 netdev = alloc_etherdev_mq(sizeof(struct xgbe_prv_data),
d5c48582 178 XGBE_MAX_DMA_CHANNELS);
c5aa9e3b
LT
179 if (!netdev) {
180 dev_err(dev, "alloc_etherdev failed\n");
181 ret = -ENOMEM;
182 goto err_alloc;
183 }
184 SET_NETDEV_DEV(netdev, dev);
185 pdata = netdev_priv(netdev);
186 pdata->netdev = netdev;
187 pdata->pdev = pdev;
188 pdata->dev = dev;
189 platform_set_drvdata(pdev, netdev);
190
191 spin_lock_init(&pdata->lock);
192 mutex_init(&pdata->xpcs_mutex);
23e4eef7 193 spin_lock_init(&pdata->tstamp_lock);
c5aa9e3b
LT
194
195 /* Set and validate the number of descriptors for a ring */
d0a8ba6c
LT
196 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_TX_DESC_CNT);
197 pdata->tx_desc_count = XGBE_TX_DESC_CNT;
c5aa9e3b
LT
198 if (pdata->tx_desc_count & (pdata->tx_desc_count - 1)) {
199 dev_err(dev, "tx descriptor count (%d) is not valid\n",
200 pdata->tx_desc_count);
201 ret = -EINVAL;
202 goto err_io;
203 }
d0a8ba6c
LT
204 BUILD_BUG_ON_NOT_POWER_OF_2(XGBE_RX_DESC_CNT);
205 pdata->rx_desc_count = XGBE_RX_DESC_CNT;
c5aa9e3b
LT
206 if (pdata->rx_desc_count & (pdata->rx_desc_count - 1)) {
207 dev_err(dev, "rx descriptor count (%d) is not valid\n",
208 pdata->rx_desc_count);
209 ret = -EINVAL;
210 goto err_io;
211 }
212
213 /* Obtain the system clock setting */
23e4eef7
LT
214 pdata->sysclk = devm_clk_get(dev, XGBE_DMA_CLOCK);
215 if (IS_ERR(pdata->sysclk)) {
216 dev_err(dev, "dma devm_clk_get failed\n");
217 ret = PTR_ERR(pdata->sysclk);
218 goto err_io;
219 }
220
221 /* Obtain the PTP clock setting */
222 pdata->ptpclk = devm_clk_get(dev, XGBE_PTP_CLOCK);
223 if (IS_ERR(pdata->ptpclk)) {
224 dev_err(dev, "ptp devm_clk_get failed\n");
225 ret = PTR_ERR(pdata->ptpclk);
c5aa9e3b
LT
226 goto err_io;
227 }
228
229 /* Obtain the mmio areas for the device */
230 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
231 pdata->xgmac_regs = devm_ioremap_resource(dev, res);
232 if (IS_ERR(pdata->xgmac_regs)) {
233 dev_err(dev, "xgmac ioremap failed\n");
234 ret = PTR_ERR(pdata->xgmac_regs);
235 goto err_io;
236 }
237 DBGPR(" xgmac_regs = %p\n", pdata->xgmac_regs);
238
239 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
240 pdata->xpcs_regs = devm_ioremap_resource(dev, res);
241 if (IS_ERR(pdata->xpcs_regs)) {
242 dev_err(dev, "xpcs ioremap failed\n");
243 ret = PTR_ERR(pdata->xpcs_regs);
244 goto err_io;
245 }
246 DBGPR(" xpcs_regs = %p\n", pdata->xpcs_regs);
247
248 /* Set the DMA mask */
249 if (!dev->dma_mask)
250 dev->dma_mask = &dev->coherent_dma_mask;
f3d0e78d
LT
251 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(40));
252 if (ret) {
253 dev_err(dev, "dma_set_mask_and_coherent failed\n");
254 goto err_io;
255 }
c5aa9e3b 256
cfa50c78
LT
257 if (of_property_read_bool(dev->of_node, "dma-coherent")) {
258 pdata->axdomain = XGBE_DMA_OS_AXDOMAIN;
259 pdata->arcache = XGBE_DMA_OS_ARCACHE;
260 pdata->awcache = XGBE_DMA_OS_AWCACHE;
261 } else {
262 pdata->axdomain = XGBE_DMA_SYS_AXDOMAIN;
263 pdata->arcache = XGBE_DMA_SYS_ARCACHE;
264 pdata->awcache = XGBE_DMA_SYS_AWCACHE;
265 }
266
9227dc5e
LT
267 /* Check for per channel interrupt support */
268 if (of_property_read_bool(dev->of_node, XGBE_DMA_IRQS))
269 pdata->per_channel_irq = 1;
270
c5aa9e3b
LT
271 ret = platform_get_irq(pdev, 0);
272 if (ret < 0) {
9227dc5e 273 dev_err(dev, "platform_get_irq 0 failed\n");
c5aa9e3b
LT
274 goto err_io;
275 }
9227dc5e
LT
276 pdata->dev_irq = ret;
277
278 netdev->irq = pdata->dev_irq;
c5aa9e3b
LT
279 netdev->base_addr = (unsigned long)pdata->xgmac_regs;
280
281 /* Set all the function pointers */
282 xgbe_init_all_fptrs(pdata);
283 hw_if = &pdata->hw_if;
284 desc_if = &pdata->desc_if;
285
286 /* Issue software reset to device */
287 hw_if->exit(pdata);
288
289 /* Populate the hardware features */
290 xgbe_get_all_hw_features(pdata);
291
292 /* Retrieve the MAC address */
293 mac_addr = of_get_mac_address(dev->of_node);
294 if (!mac_addr) {
295 dev_err(dev, "invalid mac address for this device\n");
296 ret = -EINVAL;
297 goto err_io;
298 }
299 memcpy(netdev->dev_addr, mac_addr, netdev->addr_len);
300
301 /* Retrieve the PHY mode - it must be "xgmii" */
302 pdata->phy_mode = of_get_phy_mode(dev->of_node);
303 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
304 dev_err(dev, "invalid phy-mode specified for this device\n");
305 ret = -EINVAL;
306 goto err_io;
307 }
308
309 /* Set default configuration data */
310 xgbe_default_config(pdata);
311
853eb16b
LT
312 /* Calculate the number of Tx and Rx rings to be created
313 * -Tx (DMA) Channels map 1-to-1 to Tx Queues so set
314 * the number of Tx queues to the number of Tx channels
315 * enabled
316 * -Rx (DMA) Channels do not map 1-to-1 so use the actual
317 * number of Rx queues
318 */
c5aa9e3b
LT
319 pdata->tx_ring_count = min_t(unsigned int, num_online_cpus(),
320 pdata->hw_feat.tx_ch_cnt);
853eb16b 321 pdata->tx_q_count = pdata->tx_ring_count;
332cfc82
WY
322 ret = netif_set_real_num_tx_queues(netdev, pdata->tx_ring_count);
323 if (ret) {
c5aa9e3b
LT
324 dev_err(dev, "error setting real tx queue count\n");
325 goto err_io;
326 }
327
328 pdata->rx_ring_count = min_t(unsigned int,
329 netif_get_num_default_rss_queues(),
330 pdata->hw_feat.rx_ch_cnt);
853eb16b 331 pdata->rx_q_count = pdata->hw_feat.rx_q_cnt;
c5aa9e3b
LT
332 ret = netif_set_real_num_rx_queues(netdev, pdata->rx_ring_count);
333 if (ret) {
334 dev_err(dev, "error setting real rx queue count\n");
335 goto err_io;
336 }
337
c5aa9e3b
LT
338 /* Prepare to regsiter with MDIO */
339 pdata->mii_bus_id = kasprintf(GFP_KERNEL, "%s", pdev->name);
340 if (!pdata->mii_bus_id) {
341 dev_err(dev, "failed to allocate mii bus id\n");
342 ret = -ENOMEM;
343 goto err_io;
344 }
345 ret = xgbe_mdio_register(pdata);
346 if (ret)
347 goto err_bus_id;
348
fca2d994 349 /* Set device operations */
c5aa9e3b
LT
350 netdev->netdev_ops = xgbe_get_netdev_ops();
351 netdev->ethtool_ops = xgbe_get_ethtool_ops();
fca2d994
LT
352#ifdef CONFIG_AMD_XGBE_DCB
353 netdev->dcbnl_ops = xgbe_get_dcbnl_ops();
354#endif
c5aa9e3b
LT
355
356 /* Set device features */
357 netdev->hw_features = NETIF_F_SG |
358 NETIF_F_IP_CSUM |
359 NETIF_F_IPV6_CSUM |
360 NETIF_F_RXCSUM |
361 NETIF_F_TSO |
362 NETIF_F_TSO6 |
363 NETIF_F_GRO |
364 NETIF_F_HW_VLAN_CTAG_RX |
801c62d9
LT
365 NETIF_F_HW_VLAN_CTAG_TX |
366 NETIF_F_HW_VLAN_CTAG_FILTER;
c5aa9e3b
LT
367
368 netdev->vlan_features |= NETIF_F_SG |
369 NETIF_F_IP_CSUM |
370 NETIF_F_IPV6_CSUM |
371 NETIF_F_TSO |
372 NETIF_F_TSO6;
373
374 netdev->features |= netdev->hw_features;
375 pdata->netdev_features = netdev->features;
376
b85e4d89
LT
377 netdev->priv_flags |= IFF_UNICAST_FLT;
378
c5aa9e3b
LT
379 xgbe_init_rx_coalesce(pdata);
380 xgbe_init_tx_coalesce(pdata);
381
382 netif_carrier_off(netdev);
383 ret = register_netdev(netdev);
384 if (ret) {
385 dev_err(dev, "net device registration failed\n");
386 goto err_reg_netdev;
387 }
388
23e4eef7
LT
389 xgbe_ptp_register(pdata);
390
c5aa9e3b
LT
391 xgbe_debugfs_init(pdata);
392
393 netdev_notice(netdev, "net device enabled\n");
394
395 DBGPR("<-- xgbe_probe\n");
396
397 return 0;
398
399err_reg_netdev:
400 xgbe_mdio_unregister(pdata);
401
402err_bus_id:
403 kfree(pdata->mii_bus_id);
404
405err_io:
406 free_netdev(netdev);
407
408err_alloc:
409 dev_notice(dev, "net device not enabled\n");
410
411 return ret;
412}
413
414static int xgbe_remove(struct platform_device *pdev)
415{
416 struct net_device *netdev = platform_get_drvdata(pdev);
417 struct xgbe_prv_data *pdata = netdev_priv(netdev);
418
419 DBGPR("-->xgbe_remove\n");
420
421 xgbe_debugfs_exit(pdata);
422
23e4eef7
LT
423 xgbe_ptp_unregister(pdata);
424
c5aa9e3b
LT
425 unregister_netdev(netdev);
426
427 xgbe_mdio_unregister(pdata);
428
429 kfree(pdata->mii_bus_id);
430
431 free_netdev(netdev);
432
433 DBGPR("<--xgbe_remove\n");
434
435 return 0;
436}
437
438#ifdef CONFIG_PM
439static int xgbe_suspend(struct device *dev)
440{
441 struct net_device *netdev = dev_get_drvdata(dev);
442 int ret;
443
444 DBGPR("-->xgbe_suspend\n");
445
446 if (!netif_running(netdev)) {
447 DBGPR("<--xgbe_dev_suspend\n");
448 return -EINVAL;
449 }
450
451 ret = xgbe_powerdown(netdev, XGMAC_DRIVER_CONTEXT);
452
453 DBGPR("<--xgbe_suspend\n");
454
455 return ret;
456}
457
458static int xgbe_resume(struct device *dev)
459{
460 struct net_device *netdev = dev_get_drvdata(dev);
461 int ret;
462
463 DBGPR("-->xgbe_resume\n");
464
465 if (!netif_running(netdev)) {
466 DBGPR("<--xgbe_dev_resume\n");
467 return -EINVAL;
468 }
469
470 ret = xgbe_powerup(netdev, XGMAC_DRIVER_CONTEXT);
471
472 DBGPR("<--xgbe_resume\n");
473
474 return ret;
475}
476#endif /* CONFIG_PM */
477
478static const struct of_device_id xgbe_of_match[] = {
479 { .compatible = "amd,xgbe-seattle-v1a", },
480 {},
481};
482
483MODULE_DEVICE_TABLE(of, xgbe_of_match);
484static SIMPLE_DEV_PM_OPS(xgbe_pm_ops, xgbe_suspend, xgbe_resume);
485
486static struct platform_driver xgbe_driver = {
487 .driver = {
488 .name = "amd-xgbe",
489 .of_match_table = xgbe_of_match,
490 .pm = &xgbe_pm_ops,
491 },
492 .probe = xgbe_probe,
493 .remove = xgbe_remove,
494};
495
496module_platform_driver(xgbe_driver);
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