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atl1e: Use setup_timer
[deliverable/linux.git] / drivers / net / ethernet / atheros / atl1e / atl1e_main.c
CommitLineData
a6a53252
JY		 1/*
2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
3 *
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 */
21
22#include "atl1e.h"
23
24#define DRV_VERSION "1.0.0.7-NAPI"
25
26char atl1e_driver_name[] = "ATL1E";
27char atl1e_driver_version[] = DRV_VERSION;
28#define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
29/*
30 * atl1e_pci_tbl - PCI Device ID Table
31 *
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
34 *
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
37 */
9baa3c34 38static const struct pci_device_id atl1e_pci_tbl[] = {
a6a53252 39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
bdb0e010 40 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, 0x1066)},
a6a53252
JY		 41 /* required last entry */
42 { 0 }
43};
44MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45
46MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
47MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
48MODULE_LICENSE("GPL");
49MODULE_VERSION(DRV_VERSION);
50
e6ca2328 51static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
a6a53252
JY		 52
53static const u16
54atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55{
56 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
57 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
58 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
59 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
60};
61
62static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63{
64 REG_RXF0_BASE_ADDR_HI,
65 REG_RXF1_BASE_ADDR_HI,
66 REG_RXF2_BASE_ADDR_HI,
67 REG_RXF3_BASE_ADDR_HI
68};
69
70static const u16
71atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72{
73 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
74 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
75 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
76 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
77};
78
79static const u16
80atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81{
82 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
83 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
84 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
85 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
86};
87
88static const u16 atl1e_pay_load_size[] = {
89 128, 256, 512, 1024, 2048, 4096,
90};
91
49ce9c2c 92/**
a6a53252
JY		 93 * atl1e_irq_enable - Enable default interrupt generation settings
94 * @adapter: board private structure
95 */
96static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97{
98 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
99 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
100 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
101 AT_WRITE_FLUSH(&adapter->hw);
102 }
103}
104
49ce9c2c 105/**
a6a53252
JY		 106 * atl1e_irq_disable - Mask off interrupt generation on the NIC
107 * @adapter: board private structure
108 */
109static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110{
111 atomic_inc(&adapter->irq_sem);
112 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
113 AT_WRITE_FLUSH(&adapter->hw);
114 synchronize_irq(adapter->pdev->irq);
115}
116
49ce9c2c 117/**
a6a53252
JY		 118 * atl1e_irq_reset - reset interrupt confiure on the NIC
119 * @adapter: board private structure
120 */
121static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122{
123 atomic_set(&adapter->irq_sem, 0);
124 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
125 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
126 AT_WRITE_FLUSH(&adapter->hw);
127}
128
49ce9c2c 129/**
a6a53252
JY		 130 * atl1e_phy_config - Timer Call-back
131 * @data: pointer to netdev cast into an unsigned long
132 */
133static void atl1e_phy_config(unsigned long data)
134{
135 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
136 struct atl1e_hw *hw = &adapter->hw;
137 unsigned long flags;
138
139 spin_lock_irqsave(&adapter->mdio_lock, flags);
140 atl1e_restart_autoneg(hw);
141 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
142}
143
144void atl1e_reinit_locked(struct atl1e_adapter *adapter)
145{
146
147 WARN_ON(in_interrupt());
148 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
149 msleep(1);
150 atl1e_down(adapter);
151 atl1e_up(adapter);
152 clear_bit(__AT_RESETTING, &adapter->flags);
153}
154
155static void atl1e_reset_task(struct work_struct *work)
156{
157 struct atl1e_adapter *adapter;
158 adapter = container_of(work, struct atl1e_adapter, reset_task);
159
160 atl1e_reinit_locked(adapter);
161}
162
163static int atl1e_check_link(struct atl1e_adapter *adapter)
164{
165 struct atl1e_hw *hw = &adapter->hw;
166 struct net_device *netdev = adapter->netdev;
a6a53252
JY		 167 int err = 0;
168 u16 speed, duplex, phy_data;
169
ba211e3e 170 /* MII_BMSR must read twice */
a6a53252
JY		 171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
174 /* link down */
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
176 u32 value;
177 /* disable rx */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
184 }
185 } else {
186 /* Link Up */
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
188 if (unlikely(err))
189 return err;
190
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
ba211e3e
JP		 197 netdev_info(netdev,
198 "NIC Link is Up <%d Mbps %s Duplex>\n",
199 adapter->link_speed,
200 adapter->link_duplex == FULL_DUPLEX ?
201 "Full" : "Half");
a6a53252
JY		 202 }
203
204 if (!netif_carrier_ok(netdev)) {
205 /* Link down -> Up */
206 netif_carrier_on(netdev);
207 netif_wake_queue(netdev);
208 }
209 }
210 return 0;
211}
212
49ce9c2c 213/**
a6a53252
JY		 214 * atl1e_link_chg_task - deal with link change event Out of interrupt context
215 * @netdev: network interface device structure
216 */
217static void atl1e_link_chg_task(struct work_struct *work)
218{
219 struct atl1e_adapter *adapter;
220 unsigned long flags;
221
222 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
223 spin_lock_irqsave(&adapter->mdio_lock, flags);
224 atl1e_check_link(adapter);
225 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
226}
227
228static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
229{
230 struct net_device *netdev = adapter->netdev;
a6a53252
JY		 231 u16 phy_data = 0;
232 u16 link_up = 0;
233
234 spin_lock(&adapter->mdio_lock);
235 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
236 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
237 spin_unlock(&adapter->mdio_lock);
238 link_up = phy_data & BMSR_LSTATUS;
239 /* notify upper layer link down ASAP */
240 if (!link_up) {
241 if (netif_carrier_ok(netdev)) {
242 /* old link state: Up */
ba211e3e 243 netdev_info(netdev, "NIC Link is Down\n");
a6a53252
JY		 244 adapter->link_speed = SPEED_0;
245 netif_stop_queue(netdev);
246 }
247 }
248 schedule_work(&adapter->link_chg_task);
249}
250
251static void atl1e_del_timer(struct atl1e_adapter *adapter)
252{
253 del_timer_sync(&adapter->phy_config_timer);
254}
255
256static void atl1e_cancel_work(struct atl1e_adapter *adapter)
257{
258 cancel_work_sync(&adapter->reset_task);
259 cancel_work_sync(&adapter->link_chg_task);
260}
261
49ce9c2c 262/**
a6a53252
JY		 263 * atl1e_tx_timeout - Respond to a Tx Hang
264 * @netdev: network interface device structure
265 */
266static void atl1e_tx_timeout(struct net_device *netdev)
267{
268 struct atl1e_adapter *adapter = netdev_priv(netdev);
269
270 /* Do the reset outside of interrupt context */
271 schedule_work(&adapter->reset_task);
272}
273
49ce9c2c 274/**
a6a53252
JY		 275 * atl1e_set_multi - Multicast and Promiscuous mode set
276 * @netdev: network interface device structure
277 *
278 * The set_multi entry point is called whenever the multicast address
279 * list or the network interface flags are updated. This routine is
280 * responsible for configuring the hardware for proper multicast,
281 * promiscuous mode, and all-multi behavior.
282 */
283static void atl1e_set_multi(struct net_device *netdev)
284{
285 struct atl1e_adapter *adapter = netdev_priv(netdev);
286 struct atl1e_hw *hw = &adapter->hw;
22bedad3 287 struct netdev_hw_addr *ha;
a6a53252
JY		 288 u32 mac_ctrl_data = 0;
289 u32 hash_value;
290
291 /* Check for Promiscuous and All Multicast modes */
292 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
293
294 if (netdev->flags & IFF_PROMISC) {
295 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
296 } else if (netdev->flags & IFF_ALLMULTI) {
297 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
298 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
299 } else {
300 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
301 }
302
303 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
304
305 /* clear the old settings from the multicast hash table */
306 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
307 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
308
309 /* comoute mc addresses' hash value ,and put it into hash table */
22bedad3
JP		 310 netdev_for_each_mc_addr(ha, netdev) {
311 hash_value = atl1e_hash_mc_addr(hw, ha->addr);
a6a53252
JY		 312 atl1e_hash_set(hw, hash_value);
313 }
314}
315
40dc9ab2
AM		 316static void __atl1e_rx_mode(netdev_features_t features, u32 *mac_ctrl_data)
317{
318
319 if (features & NETIF_F_RXALL) {
320 /* enable RX of ALL frames */
321 *mac_ctrl_data |= MAC_CTRL_DBG;
322 } else {
323 /* disable RX of ALL frames */
324 *mac_ctrl_data &= ~MAC_CTRL_DBG;
325 }
326}
327
328static void atl1e_rx_mode(struct net_device *netdev,
329 netdev_features_t features)
330{
331 struct atl1e_adapter *adapter = netdev_priv(netdev);
332 u32 mac_ctrl_data = 0;
333
334 netdev_dbg(adapter->netdev, "%s\n", __func__);
335
336 atl1e_irq_disable(adapter);
337 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
338 __atl1e_rx_mode(features, &mac_ctrl_data);
339 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
340 atl1e_irq_enable(adapter);
341}
342
343
c8f44aff 344static void __atl1e_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
2707fffc 345{
f646968f 346 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
2707fffc
JP		 347 /* enable VLAN tag insert/strip */
348 *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
349 } else {
350 /* disable VLAN tag insert/strip */
351 *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
352 }
353}
354
c8f44aff
MM		 355static void atl1e_vlan_mode(struct net_device *netdev,
356 netdev_features_t features)
a6a53252
JY		 357{
358 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 359 u32 mac_ctrl_data = 0;
360
ba211e3e 361 netdev_dbg(adapter->netdev, "%s\n", __func__);
a6a53252
JY		 362
363 atl1e_irq_disable(adapter);
a6a53252 364 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
2707fffc 365 __atl1e_vlan_mode(features, &mac_ctrl_data);
a6a53252
JY		 366 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
367 atl1e_irq_enable(adapter);
368}
369
370static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
371{
ba211e3e 372 netdev_dbg(adapter->netdev, "%s\n", __func__);
2707fffc 373 atl1e_vlan_mode(adapter->netdev, adapter->netdev->features);
a6a53252 374}
2707fffc 375
49ce9c2c 376/**
a6a53252
JY		 377 * atl1e_set_mac - Change the Ethernet Address of the NIC
378 * @netdev: network interface device structure
379 * @p: pointer to an address structure
380 *
381 * Returns 0 on success, negative on failure
382 */
383static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
384{
385 struct atl1e_adapter *adapter = netdev_priv(netdev);
386 struct sockaddr *addr = p;
387
388 if (!is_valid_ether_addr(addr->sa_data))
389 return -EADDRNOTAVAIL;
390
391 if (netif_running(netdev))
392 return -EBUSY;
393
394 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
395 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
396
397 atl1e_hw_set_mac_addr(&adapter->hw);
398
399 return 0;
400}
401
c8f44aff
MM		 402static netdev_features_t atl1e_fix_features(struct net_device *netdev,
403 netdev_features_t features)
2707fffc
JP		 404{
405 /*
406 * Since there is no support for separate rx/tx vlan accel
407 * enable/disable make sure tx flag is always in same state as rx.
408 */
f646968f
PM		 409 if (features & NETIF_F_HW_VLAN_CTAG_RX)
410 features |= NETIF_F_HW_VLAN_CTAG_TX;
2707fffc 411 else
f646968f 412 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2707fffc
JP		 413
414 return features;
415}
416
c8f44aff
MM		 417static int atl1e_set_features(struct net_device *netdev,
418 netdev_features_t features)
2707fffc 419{
c8f44aff 420 netdev_features_t changed = netdev->features ^ features;
2707fffc 421
f646968f 422 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2707fffc
JP		 423 atl1e_vlan_mode(netdev, features);
424
40dc9ab2
AM		 425 if (changed & NETIF_F_RXALL)
426 atl1e_rx_mode(netdev, features);
427
428
2707fffc
JP		 429 return 0;
430}
431
49ce9c2c 432/**
a6a53252
JY		 433 * atl1e_change_mtu - Change the Maximum Transfer Unit
434 * @netdev: network interface device structure
435 * @new_mtu: new value for maximum frame size
436 *
437 * Returns 0 on success, negative on failure
438 */
439static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
440{
441 struct atl1e_adapter *adapter = netdev_priv(netdev);
442 int old_mtu = netdev->mtu;
443 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
444
445 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
446 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
ba211e3e 447 netdev_warn(adapter->netdev, "invalid MTU setting\n");
a6a53252
JY		 448 return -EINVAL;
449 }
450 /* set MTU */
451 if (old_mtu != new_mtu && netif_running(netdev)) {
452 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
453 msleep(1);
454 netdev->mtu = new_mtu;
455 adapter->hw.max_frame_size = new_mtu;
456 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
457 atl1e_down(adapter);
458 atl1e_up(adapter);
459 clear_bit(__AT_RESETTING, &adapter->flags);
460 }
461 return 0;
462}
463
464/*
465 * caller should hold mdio_lock
466 */
467static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
468{
469 struct atl1e_adapter *adapter = netdev_priv(netdev);
470 u16 result;
471
472 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
473 return result;
474}
475
476static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
477 int reg_num, int val)
478{
479 struct atl1e_adapter *adapter = netdev_priv(netdev);
480
481 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
482}
483
a6a53252
JY		 484static int atl1e_mii_ioctl(struct net_device *netdev,
485 struct ifreq *ifr, int cmd)
486{
487 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 488 struct mii_ioctl_data *data = if_mii(ifr);
489 unsigned long flags;
490 int retval = 0;
491
492 if (!netif_running(netdev))
493 return -EINVAL;
494
495 spin_lock_irqsave(&adapter->mdio_lock, flags);
496 switch (cmd) {
497 case SIOCGMIIPHY:
498 data->phy_id = 0;
499 break;
500
501 case SIOCGMIIREG:
a6a53252
JY		 502 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
503 &data->val_out)) {
504 retval = -EIO;
505 goto out;
506 }
507 break;
508
509 case SIOCSMIIREG:
a6a53252
JY		 510 if (data->reg_num & ~(0x1F)) {
511 retval = -EFAULT;
512 goto out;
513 }
514
ba211e3e
JP		 515 netdev_dbg(adapter->netdev, "<atl1e_mii_ioctl> write %x %x\n",
516 data->reg_num, data->val_in);
a6a53252
JY		 517 if (atl1e_write_phy_reg(&adapter->hw,
518 data->reg_num, data->val_in)) {
519 retval = -EIO;
520 goto out;
521 }
522 break;
523
524 default:
525 retval = -EOPNOTSUPP;
526 break;
527 }
528out:
529 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
530 return retval;
531
532}
533
a6a53252
JY		 534static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
535{
536 switch (cmd) {
537 case SIOCGMIIPHY:
538 case SIOCGMIIREG:
539 case SIOCSMIIREG:
540 return atl1e_mii_ioctl(netdev, ifr, cmd);
541 default:
542 return -EOPNOTSUPP;
543 }
544}
545
546static void atl1e_setup_pcicmd(struct pci_dev *pdev)
547{
548 u16 cmd;
549
550 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
551 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
552 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
553 pci_write_config_word(pdev, PCI_COMMAND, cmd);
554
555 /*
556 * some motherboards BIOS(PXE/EFI) driver may set PME
557 * while they transfer control to OS (Windows/Linux)
558 * so we should clear this bit before NIC work normally
559 */
560 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
561 msleep(1);
562}
563
49ce9c2c 564/**
a6a53252
JY		 565 * atl1e_alloc_queues - Allocate memory for all rings
566 * @adapter: board private structure to initialize
567 *
568 */
093d369d 569static int atl1e_alloc_queues(struct atl1e_adapter *adapter)
a6a53252
JY		 570{
571 return 0;
572}
573
49ce9c2c 574/**
a6a53252
JY		 575 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
576 * @adapter: board private structure to initialize
577 *
578 * atl1e_sw_init initializes the Adapter private data structure.
579 * Fields are initialized based on PCI device information and
580 * OS network device settings (MTU size).
581 */
093d369d 582static int atl1e_sw_init(struct atl1e_adapter *adapter)
a6a53252
JY		 583{
584 struct atl1e_hw *hw = &adapter->hw;
585 struct pci_dev *pdev = adapter->pdev;
586 u32 phy_status_data = 0;
587
588 adapter->wol = 0;
589 adapter->link_speed = SPEED_0; /* hardware init */
590 adapter->link_duplex = FULL_DUPLEX;
591 adapter->num_rx_queues = 1;
592
593 /* PCI config space info */
594 hw->vendor_id = pdev->vendor;
595 hw->device_id = pdev->device;
596 hw->subsystem_vendor_id = pdev->subsystem_vendor;
597 hw->subsystem_id = pdev->subsystem_device;
ff938e43 598 hw->revision_id = pdev->revision;
a6a53252 599
a6a53252
JY		 600 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
601
602 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
603 /* nic type */
604 if (hw->revision_id >= 0xF0) {
605 hw->nic_type = athr_l2e_revB;
606 } else {
607 if (phy_status_data & PHY_STATUS_100M)
608 hw->nic_type = athr_l1e;
609 else
610 hw->nic_type = athr_l2e_revA;
611 }
612
613 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
614
615 if (phy_status_data & PHY_STATUS_EMI_CA)
616 hw->emi_ca = true;
617 else
618 hw->emi_ca = false;
619
620 hw->phy_configured = false;
621 hw->preamble_len = 7;
622 hw->max_frame_size = adapter->netdev->mtu;
623 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
624 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
625
626 hw->rrs_type = atl1e_rrs_disable;
627 hw->indirect_tab = 0;
628 hw->base_cpu = 0;
629
630 /* need confirm */
631
632 hw->ict = 50000; /* 100ms */
633 hw->smb_timer = 200000; /* 200ms */
634 hw->tpd_burst = 5;
635 hw->rrd_thresh = 1;
636 hw->tpd_thresh = adapter->tx_ring.count / 2;
637 hw->rx_count_down = 4; /* 2us resolution */
638 hw->tx_count_down = hw->imt * 4 / 3;
639 hw->dmar_block = atl1e_dma_req_1024;
640 hw->dmaw_block = atl1e_dma_req_1024;
641 hw->dmar_dly_cnt = 15;
642 hw->dmaw_dly_cnt = 4;
643
644 if (atl1e_alloc_queues(adapter)) {
ba211e3e 645 netdev_err(adapter->netdev, "Unable to allocate memory for queues\n");
a6a53252
JY		 646 return -ENOMEM;
647 }
648
649 atomic_set(&adapter->irq_sem, 1);
650 spin_lock_init(&adapter->mdio_lock);
651 spin_lock_init(&adapter->tx_lock);
652
653 set_bit(__AT_DOWN, &adapter->flags);
654
655 return 0;
656}
657
49ce9c2c 658/**
a6a53252
JY		 659 * atl1e_clean_tx_ring - Free Tx-skb
660 * @adapter: board private structure
661 */
662static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
663{
64699336 664 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
a6a53252
JY		 665 struct atl1e_tx_buffer *tx_buffer = NULL;
666 struct pci_dev *pdev = adapter->pdev;
667 u16 index, ring_count;
668
669 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
670 return;
671
672 ring_count = tx_ring->count;
673 /* first unmmap dma */
674 for (index = 0; index < ring_count; index++) {
675 tx_buffer = &tx_ring->tx_buffer[index];
676 if (tx_buffer->dma) {
03f18991
JY		 677 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
678 pci_unmap_single(pdev, tx_buffer->dma,
679 tx_buffer->length, PCI_DMA_TODEVICE);
680 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
681 pci_unmap_page(pdev, tx_buffer->dma,
a6a53252
JY		 682 tx_buffer->length, PCI_DMA_TODEVICE);
683 tx_buffer->dma = 0;
684 }
685 }
686 /* second free skb */
687 for (index = 0; index < ring_count; index++) {
688 tx_buffer = &tx_ring->tx_buffer[index];
689 if (tx_buffer->skb) {
690 dev_kfree_skb_any(tx_buffer->skb);
691 tx_buffer->skb = NULL;
692 }
693 }
694 /* Zero out Tx-buffers */
695 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
696 ring_count);
697 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
698 ring_count);
699}
700
49ce9c2c 701/**
a6a53252
JY		 702 * atl1e_clean_rx_ring - Free rx-reservation skbs
703 * @adapter: board private structure
704 */
705static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
706{
707 struct atl1e_rx_ring *rx_ring =
64699336 708 &adapter->rx_ring;
a6a53252
JY		 709 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
710 u16 i, j;
711
712
713 if (adapter->ring_vir_addr == NULL)
714 return;
715 /* Zero out the descriptor ring */
716 for (i = 0; i < adapter->num_rx_queues; i++) {
717 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
718 if (rx_page_desc[i].rx_page[j].addr != NULL) {
719 memset(rx_page_desc[i].rx_page[j].addr, 0,
720 rx_ring->real_page_size);
721 }
722 }
723 }
724}
725
726static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
727{
728 *ring_size = ((u32)(adapter->tx_ring.count *
729 sizeof(struct atl1e_tpd_desc) + 7
730 /* tx ring, qword align */
731 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
732 adapter->num_rx_queues + 31
733 /* rx ring, 32 bytes align */
734 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
735 sizeof(u32) + 3));
736 /* tx, rx cmd, dword align */
737}
738
739static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
740{
a6a53252
JY		 741 struct atl1e_rx_ring *rx_ring = NULL;
742
a6a53252
JY		 743 rx_ring = &adapter->rx_ring;
744
745 rx_ring->real_page_size = adapter->rx_ring.page_size
746 + adapter->hw.max_frame_size
747 + ETH_HLEN + VLAN_HLEN
748 + ETH_FCS_LEN;
749 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
750 atl1e_cal_ring_size(adapter, &adapter->ring_size);
751
752 adapter->ring_vir_addr = NULL;
753 adapter->rx_ring.desc = NULL;
754 rwlock_init(&adapter->tx_ring.tx_lock);
a6a53252
JY		 755}
756
757/*
758 * Read / Write Ptr Initialize:
759 */
760static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
761{
762 struct atl1e_tx_ring *tx_ring = NULL;
763 struct atl1e_rx_ring *rx_ring = NULL;
764 struct atl1e_rx_page_desc *rx_page_desc = NULL;
765 int i, j;
766
767 tx_ring = &adapter->tx_ring;
768 rx_ring = &adapter->rx_ring;
769 rx_page_desc = rx_ring->rx_page_desc;
770
771 tx_ring->next_to_use = 0;
772 atomic_set(&tx_ring->next_to_clean, 0);
773
774 for (i = 0; i < adapter->num_rx_queues; i++) {
775 rx_page_desc[i].rx_using = 0;
776 rx_page_desc[i].rx_nxseq = 0;
777 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
778 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
779 rx_page_desc[i].rx_page[j].read_offset = 0;
780 }
781 }
782}
783
49ce9c2c 784/**
a6a53252
JY		 785 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
786 * @adapter: board private structure
787 *
788 * Free all transmit software resources
789 */
790static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
791{
792 struct pci_dev *pdev = adapter->pdev;
793
794 atl1e_clean_tx_ring(adapter);
795 atl1e_clean_rx_ring(adapter);
796
797 if (adapter->ring_vir_addr) {
798 pci_free_consistent(pdev, adapter->ring_size,
799 adapter->ring_vir_addr, adapter->ring_dma);
800 adapter->ring_vir_addr = NULL;
801 }
802
803 if (adapter->tx_ring.tx_buffer) {
804 kfree(adapter->tx_ring.tx_buffer);
805 adapter->tx_ring.tx_buffer = NULL;
806 }
807}
808
49ce9c2c 809/**
a6a53252
JY		 810 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
811 * @adapter: board private structure
812 *
813 * Return 0 on success, negative on failure
814 */
815static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
816{
817 struct pci_dev *pdev = adapter->pdev;
818 struct atl1e_tx_ring *tx_ring;
819 struct atl1e_rx_ring *rx_ring;
820 struct atl1e_rx_page_desc *rx_page_desc;
821 int size, i, j;
822 u32 offset = 0;
823 int err = 0;
824
825 if (adapter->ring_vir_addr != NULL)
826 return 0; /* alloced already */
827
828 tx_ring = &adapter->tx_ring;
829 rx_ring = &adapter->rx_ring;
830
831 /* real ring DMA buffer */
832
833 size = adapter->ring_size;
19118268
JP		 834 adapter->ring_vir_addr = pci_zalloc_consistent(pdev, adapter->ring_size,
835 &adapter->ring_dma);
a6a53252 836 if (adapter->ring_vir_addr == NULL) {
ba211e3e
JP		 837 netdev_err(adapter->netdev,
838 "pci_alloc_consistent failed, size = D%d\n", size);
a6a53252
JY		 839 return -ENOMEM;
840 }
841
a6a53252
JY		 842 rx_page_desc = rx_ring->rx_page_desc;
843
844 /* Init TPD Ring */
845 tx_ring->dma = roundup(adapter->ring_dma, 8);
846 offset = tx_ring->dma - adapter->ring_dma;
43d620c8 847 tx_ring->desc = adapter->ring_vir_addr + offset;
a6a53252
JY		 848 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
849 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
850 if (tx_ring->tx_buffer == NULL) {
a6a53252
JY		 851 err = -ENOMEM;
852 goto failed;
853 }
854
855 /* Init RXF-Pages */
856 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
857 offset = roundup(offset, 32);
858
859 for (i = 0; i < adapter->num_rx_queues; i++) {
860 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
861 rx_page_desc[i].rx_page[j].dma =
862 adapter->ring_dma + offset;
863 rx_page_desc[i].rx_page[j].addr =
864 adapter->ring_vir_addr + offset;
865 offset += rx_ring->real_page_size;
866 }
867 }
868
869 /* Init CMB dma address */
870 tx_ring->cmb_dma = adapter->ring_dma + offset;
43d620c8 871 tx_ring->cmb = adapter->ring_vir_addr + offset;
a6a53252
JY		 872 offset += sizeof(u32);
873
874 for (i = 0; i < adapter->num_rx_queues; i++) {
875 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
876 rx_page_desc[i].rx_page[j].write_offset_dma =
877 adapter->ring_dma + offset;
878 rx_page_desc[i].rx_page[j].write_offset_addr =
879 adapter->ring_vir_addr + offset;
880 offset += sizeof(u32);
881 }
882 }
883
884 if (unlikely(offset > adapter->ring_size)) {
ba211e3e
JP		 885 netdev_err(adapter->netdev, "offset(%d) > ring size(%d) !!\n",
886 offset, adapter->ring_size);
a6a53252
JY		 887 err = -1;
888 goto failed;
889 }
890
891 return 0;
892failed:
893 if (adapter->ring_vir_addr != NULL) {
894 pci_free_consistent(pdev, adapter->ring_size,
895 adapter->ring_vir_addr, adapter->ring_dma);
896 adapter->ring_vir_addr = NULL;
897 }
898 return err;
899}
900
64699336 901static inline void atl1e_configure_des_ring(struct atl1e_adapter *adapter)
a6a53252
JY		 902{
903
64699336
JP		 904 struct atl1e_hw *hw = &adapter->hw;
905 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
906 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
a6a53252
JY		 907 struct atl1e_rx_page_desc *rx_page_desc = NULL;
908 int i, j;
909
910 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
911 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
912 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
913 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
914 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
915 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
916 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
917
918 rx_page_desc = rx_ring->rx_page_desc;
919 /* RXF Page Physical address / Page Length */
920 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
921 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
922 (u32)((adapter->ring_dma &
923 AT_DMA_HI_ADDR_MASK) >> 32));
924 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
925 u32 page_phy_addr;
926 u32 offset_phy_addr;
927
928 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
929 offset_phy_addr =
930 rx_page_desc[i].rx_page[j].write_offset_dma;
931
932 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
933 page_phy_addr & AT_DMA_LO_ADDR_MASK);
934 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
935 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
936 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
937 }
938 }
939 /* Page Length */
940 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
941 /* Load all of base address above */
942 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
a6a53252
JY		 943}
944
945static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
946{
64699336 947 struct atl1e_hw *hw = &adapter->hw;
a6a53252
JY		 948 u32 dev_ctrl_data = 0;
949 u32 max_pay_load = 0;
950 u32 jumbo_thresh = 0;
951 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
952
953 /* configure TXQ param */
954 if (hw->nic_type != athr_l2e_revB) {
955 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
956 if (hw->max_frame_size <= 1500) {
957 jumbo_thresh = hw->max_frame_size + extra_size;
958 } else if (hw->max_frame_size < 6*1024) {
959 jumbo_thresh =
960 (hw->max_frame_size + extra_size) * 2 / 3;
961 } else {
962 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
963 }
964 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
965 }
966
967 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
968
969 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
970 DEVICE_CTRL_MAX_PAYLOAD_MASK;
971
81b504b8 972 hw->dmaw_block = min_t(u32, max_pay_load, hw->dmaw_block);
a6a53252
JY		 973
974 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
975 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
81b504b8 976 hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
a6a53252
JY		 977
978 if (hw->nic_type != athr_l2e_revB)
979 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
980 atl1e_pay_load_size[hw->dmar_block]);
981 /* enable TXQ */
982 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
983 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
984 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
985 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
a6a53252
JY		 986}
987
988static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
989{
64699336 990 struct atl1e_hw *hw = &adapter->hw;
a6a53252
JY		 991 u32 rxf_len = 0;
992 u32 rxf_low = 0;
993 u32 rxf_high = 0;
994 u32 rxf_thresh_data = 0;
995 u32 rxq_ctrl_data = 0;
996
997 if (hw->nic_type != athr_l2e_revB) {
998 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
999 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
1000 RXQ_JMBOSZ_TH_SHIFT |
1001 (1 & RXQ_JMBO_LKAH_MASK) <<
1002 RXQ_JMBO_LKAH_SHIFT));
1003
1004 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
1005 rxf_high = rxf_len * 4 / 5;
1006 rxf_low = rxf_len / 5;
1007 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
1008 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
1009 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
1010 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
1011
1012 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
1013 }
1014
1015 /* RRS */
1016 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
1017 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
1018
1019 if (hw->rrs_type & atl1e_rrs_ipv4)
1020 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1021
1022 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1023 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1024
1025 if (hw->rrs_type & atl1e_rrs_ipv6)
1026 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1027
1028 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1029 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1030
1031 if (hw->rrs_type != atl1e_rrs_disable)
1032 rxq_ctrl_data |=
1033 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1034
1035 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1036 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1037
1038 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
a6a53252
JY		 1039}
1040
1041static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1042{
1043 struct atl1e_hw *hw = &adapter->hw;
1044 u32 dma_ctrl_data = 0;
1045
1046 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1047 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1048 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1049 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1050 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1051 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1052 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1053 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1054 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1055 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1056
1057 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
a6a53252
JY		 1058}
1059
e6ca2328 1060static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
a6a53252
JY		 1061{
1062 u32 value;
1063 struct atl1e_hw *hw = &adapter->hw;
1064 struct net_device *netdev = adapter->netdev;
1065
1066 /* Config MAC CTRL Register */
1067 value = MAC_CTRL_TX_EN |
1068 MAC_CTRL_RX_EN ;
1069
1070 if (FULL_DUPLEX == adapter->link_duplex)
1071 value |= MAC_CTRL_DUPLX;
1072
1073 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1074 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1075 MAC_CTRL_SPEED_SHIFT);
1076 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1077
1078 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1079 value |= (((u32)adapter->hw.preamble_len &
1080 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1081
2707fffc 1082 __atl1e_vlan_mode(netdev->features, &value);
a6a53252
JY		 1083
1084 value |= MAC_CTRL_BC_EN;
1085 if (netdev->flags & IFF_PROMISC)
1086 value |= MAC_CTRL_PROMIS_EN;
1087 if (netdev->flags & IFF_ALLMULTI)
1088 value |= MAC_CTRL_MC_ALL_EN;
40dc9ab2
AM		 1089 if (netdev->features & NETIF_F_RXALL)
1090 value |= MAC_CTRL_DBG;
a6a53252
JY		 1091 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1092}
1093
49ce9c2c 1094/**
a6a53252
JY		 1095 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1096 * @adapter: board private structure
1097 *
1098 * Configure the Tx /Rx unit of the MAC after a reset.
1099 */
1100static int atl1e_configure(struct atl1e_adapter *adapter)
1101{
1102 struct atl1e_hw *hw = &adapter->hw;
a6a53252
JY		 1103
1104 u32 intr_status_data = 0;
1105
1106 /* clear interrupt status */
1107 AT_WRITE_REG(hw, REG_ISR, ~0);
1108
1109 /* 1. set MAC Address */
1110 atl1e_hw_set_mac_addr(hw);
1111
1112 /* 2. Init the Multicast HASH table done by set_muti */
1113
1114 /* 3. Clear any WOL status */
1115 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1116
1117 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1118 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1119 * High 32bits memory */
1120 atl1e_configure_des_ring(adapter);
1121
1122 /* 5. set Interrupt Moderator Timer */
1123 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1124 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1125 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1126 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1127
1128 /* 6. rx/tx threshold to trig interrupt */
1129 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1130 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1131 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1132 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1133
1134 /* 7. set Interrupt Clear Timer */
1135 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1136
1137 /* 8. set MTU */
1138 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1139 VLAN_HLEN + ETH_FCS_LEN);
1140
1141 /* 9. config TXQ early tx threshold */
1142 atl1e_configure_tx(adapter);
1143
1144 /* 10. config RXQ */
1145 atl1e_configure_rx(adapter);
1146
1147 /* 11. config DMA Engine */
1148 atl1e_configure_dma(adapter);
1149
1150 /* 12. smb timer to trig interrupt */
1151 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1152
1153 intr_status_data = AT_READ_REG(hw, REG_ISR);
1154 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
ba211e3e
JP		 1155 netdev_err(adapter->netdev,
1156 "atl1e_configure failed, PCIE phy link down\n");
a6a53252
JY		 1157 return -1;
1158 }
1159
1160 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1161 return 0;
1162}
1163
49ce9c2c 1164/**
a6a53252
JY		 1165 * atl1e_get_stats - Get System Network Statistics
1166 * @netdev: network interface device structure
1167 *
1168 * Returns the address of the device statistics structure.
1169 * The statistics are actually updated from the timer callback.
1170 */
1171static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1172{
1173 struct atl1e_adapter *adapter = netdev_priv(netdev);
1174 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
d3f65f7c 1175 struct net_device_stats *net_stats = &netdev->stats;
a6a53252 1176
a6a53252
JY		 1177 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1178 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1179 net_stats->multicast = hw_stats->rx_mcast;
1180 net_stats->collisions = hw_stats->tx_1_col +
fb3a42fc
SD		 1181 hw_stats->tx_2_col +
1182 hw_stats->tx_late_col +
1183 hw_stats->tx_abort_col;
1184
1185 net_stats->rx_errors = hw_stats->rx_frag +
1186 hw_stats->rx_fcs_err +
1187 hw_stats->rx_len_err +
1188 hw_stats->rx_sz_ov +
1189 hw_stats->rx_rrd_ov +
1190 hw_stats->rx_align_err +
1191 hw_stats->rx_rxf_ov;
a6a53252 1192
a6a53252
JY		 1193 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1194 net_stats->rx_length_errors = hw_stats->rx_len_err;
1195 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1196 net_stats->rx_frame_errors = hw_stats->rx_align_err;
fb3a42fc 1197 net_stats->rx_dropped = hw_stats->rx_rrd_ov;
a6a53252 1198
fb3a42fc
SD		 1199 net_stats->tx_errors = hw_stats->tx_late_col +
1200 hw_stats->tx_abort_col +
1201 hw_stats->tx_underrun +
1202 hw_stats->tx_trunc;
a6a53252 1203
a6a53252
JY		 1204 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1205 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1206 net_stats->tx_window_errors = hw_stats->tx_late_col;
1207
fb3a42fc
SD		 1208 net_stats->rx_packets = hw_stats->rx_ok + net_stats->rx_errors;
1209 net_stats->tx_packets = hw_stats->tx_ok + net_stats->tx_errors;
1210
d3f65f7c 1211 return net_stats;
a6a53252
JY		 1212}
1213
1214static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1215{
1216 u16 hw_reg_addr = 0;
1217 unsigned long *stats_item = NULL;
1218
1219 /* update rx status */
1220 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1221 stats_item = &adapter->hw_stats.rx_ok;
1222 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1223 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1224 stats_item++;
1225 hw_reg_addr += 4;
1226 }
1227 /* update tx status */
1228 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1229 stats_item = &adapter->hw_stats.tx_ok;
1230 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1231 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1232 stats_item++;
1233 hw_reg_addr += 4;
1234 }
1235}
1236
1237static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1238{
1239 u16 phy_data;
1240
1241 spin_lock(&adapter->mdio_lock);
1242 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1243 spin_unlock(&adapter->mdio_lock);
1244}
1245
1246static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1247{
64699336 1248 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
a6a53252
JY		 1249 struct atl1e_tx_buffer *tx_buffer = NULL;
1250 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1251 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1252
1253 while (next_to_clean != hw_next_to_clean) {
1254 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1255 if (tx_buffer->dma) {
03f18991
JY		 1256 if (tx_buffer->flags & ATL1E_TX_PCIMAP_SINGLE)
1257 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1258 tx_buffer->length, PCI_DMA_TODEVICE);
1259 else if (tx_buffer->flags & ATL1E_TX_PCIMAP_PAGE)
1260 pci_unmap_page(adapter->pdev, tx_buffer->dma,
a6a53252
JY		 1261 tx_buffer->length, PCI_DMA_TODEVICE);
1262 tx_buffer->dma = 0;
1263 }
1264
1265 if (tx_buffer->skb) {
1266 dev_kfree_skb_irq(tx_buffer->skb);
1267 tx_buffer->skb = NULL;
1268 }
1269
1270 if (++next_to_clean == tx_ring->count)
1271 next_to_clean = 0;
1272 }
1273
1274 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1275
1276 if (netif_queue_stopped(adapter->netdev) &&
1277 netif_carrier_ok(adapter->netdev)) {
1278 netif_wake_queue(adapter->netdev);
1279 }
1280
1281 return true;
1282}
1283
49ce9c2c 1284/**
a6a53252
JY		 1285 * atl1e_intr - Interrupt Handler
1286 * @irq: interrupt number
1287 * @data: pointer to a network interface device structure
a6a53252
JY		 1288 */
1289static irqreturn_t atl1e_intr(int irq, void *data)
1290{
1291 struct net_device *netdev = data;
1292 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 1293 struct atl1e_hw *hw = &adapter->hw;
1294 int max_ints = AT_MAX_INT_WORK;
1295 int handled = IRQ_NONE;
1296 u32 status;
1297
1298 do {
1299 status = AT_READ_REG(hw, REG_ISR);
1300 if ((status & IMR_NORMAL_MASK) == 0 ||
1301 (status & ISR_DIS_INT) != 0) {
1302 if (max_ints != AT_MAX_INT_WORK)
1303 handled = IRQ_HANDLED;
1304 break;
1305 }
1306 /* link event */
1307 if (status & ISR_GPHY)
1308 atl1e_clear_phy_int(adapter);
1309 /* Ack ISR */
1310 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1311
1312 handled = IRQ_HANDLED;
1313 /* check if PCIE PHY Link down */
1314 if (status & ISR_PHY_LINKDOWN) {
ba211e3e
JP		 1315 netdev_err(adapter->netdev,
1316 "pcie phy linkdown %x\n", status);
a6a53252
JY		 1317 if (netif_running(adapter->netdev)) {
1318 /* reset MAC */
1319 atl1e_irq_reset(adapter);
1320 schedule_work(&adapter->reset_task);
1321 break;
1322 }
1323 }
1324
1325 /* check if DMA read/write error */
1326 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
ba211e3e
JP		 1327 netdev_err(adapter->netdev,
1328 "PCIE DMA RW error (status = 0x%x)\n",
1329 status);
a6a53252
JY		 1330 atl1e_irq_reset(adapter);
1331 schedule_work(&adapter->reset_task);
1332 break;
1333 }
1334
1335 if (status & ISR_SMB)
1336 atl1e_update_hw_stats(adapter);
1337
1338 /* link event */
1339 if (status & (ISR_GPHY | ISR_MANUAL)) {
d3f65f7c 1340 netdev->stats.tx_carrier_errors++;
a6a53252
JY		 1341 atl1e_link_chg_event(adapter);
1342 break;
1343 }
1344
1345 /* transmit event */
1346 if (status & ISR_TX_EVENT)
1347 atl1e_clean_tx_irq(adapter);
1348
1349 if (status & ISR_RX_EVENT) {
1350 /*
1351 * disable rx interrupts, without
1352 * the synchronize_irq bit
1353 */
1354 AT_WRITE_REG(hw, REG_IMR,
1355 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1356 AT_WRITE_FLUSH(hw);
288379f0 1357 if (likely(napi_schedule_prep(
a6a53252 1358 &adapter->napi)))
288379f0 1359 __napi_schedule(&adapter->napi);
a6a53252
JY		 1360 }
1361 } while (--max_ints > 0);
1362 /* re-enable Interrupt*/
1363 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1364
1365 return handled;
1366}
1367
1368static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1369 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1370{
1371 u8 *packet = (u8 *)(prrs + 1);
1372 struct iphdr *iph;
1373 u16 head_len = ETH_HLEN;
1374 u16 pkt_flags;
1375 u16 err_flags;
1376
bc8acf2c 1377 skb_checksum_none_assert(skb);
a6a53252
JY		 1378 pkt_flags = prrs->pkt_flag;
1379 err_flags = prrs->err_flag;
1380 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1381 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1382 if (pkt_flags & RRS_IS_IPV4) {
1383 if (pkt_flags & RRS_IS_802_3)
1384 head_len += 8;
1385 iph = (struct iphdr *) (packet + head_len);
1386 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1387 goto hw_xsum;
1388 }
1389 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1390 skb->ip_summed = CHECKSUM_UNNECESSARY;
1391 return;
1392 }
1393 }
1394
1395hw_xsum :
1396 return;
1397}
1398
1399static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1400 u8 que)
1401{
1402 struct atl1e_rx_page_desc *rx_page_desc =
1403 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1404 u8 rx_using = rx_page_desc[que].rx_using;
1405
64699336 1406 return &(rx_page_desc[que].rx_page[rx_using]);
a6a53252
JY		 1407}
1408
1409static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1410 int *work_done, int work_to_do)
1411{
a6a53252 1412 struct net_device *netdev = adapter->netdev;
64699336 1413 struct atl1e_rx_ring *rx_ring = &adapter->rx_ring;
a6a53252
JY		 1414 struct atl1e_rx_page_desc *rx_page_desc =
1415 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1416 struct sk_buff *skb = NULL;
1417 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1418 u32 packet_size, write_offset;
1419 struct atl1e_recv_ret_status *prrs;
1420
1421 write_offset = *(rx_page->write_offset_addr);
1422 if (likely(rx_page->read_offset < write_offset)) {
1423 do {
1424 if (*work_done >= work_to_do)
1425 break;
1426 (*work_done)++;
1427 /* get new packet's rrs */
1428 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1429 rx_page->read_offset);
1430 /* check sequence number */
1431 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
ba211e3e
JP		 1432 netdev_err(netdev,
1433 "rx sequence number error (rx=%d) (expect=%d)\n",
1434 prrs->seq_num,
1435 rx_page_desc[que].rx_nxseq);
a6a53252
JY		 1436 rx_page_desc[que].rx_nxseq++;
1437 /* just for debug use */
1438 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1439 (((u32)prrs->seq_num) << 16) |
1440 rx_page_desc[que].rx_nxseq);
1441 goto fatal_err;
1442 }
1443 rx_page_desc[que].rx_nxseq++;
1444
1445 /* error packet */
40dc9ab2
AM		 1446 if ((prrs->pkt_flag & RRS_IS_ERR_FRAME) &&
1447 !(netdev->features & NETIF_F_RXALL)) {
a6a53252
JY		 1448 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1449 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1450 RRS_ERR_TRUNC)) {
1451 /* hardware error, discard this packet*/
ba211e3e
JP		 1452 netdev_err(netdev,
1453 "rx packet desc error %x\n",
1454 *((u32 *)prrs + 1));
a6a53252
JY		 1455 goto skip_pkt;
1456 }
1457 }
1458
1459 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
40dc9ab2
AM		 1460 RRS_PKT_SIZE_MASK);
1461 if (likely(!(netdev->features & NETIF_F_RXFCS)))
1462 packet_size -= 4; /* CRC */
1463
89d71a66 1464 skb = netdev_alloc_skb_ip_align(netdev, packet_size);
720a43ef 1465 if (skb == NULL)
a6a53252 1466 goto skip_pkt;
720a43ef 1467
a6a53252
JY		 1468 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1469 skb_put(skb, packet_size);
1470 skb->protocol = eth_type_trans(skb, netdev);
1471 atl1e_rx_checksum(adapter, skb, prrs);
1472
2707fffc 1473 if (prrs->pkt_flag & RRS_IS_VLAN_TAG) {
a6a53252
JY		 1474 u16 vlan_tag = (prrs->vtag >> 4) |
1475 ((prrs->vtag & 7) << 13) |
1476 ((prrs->vtag & 8) << 9);
ba211e3e
JP		 1477 netdev_dbg(netdev,
1478 "RXD VLAN TAG<RRD>=0x%04x\n",
1479 prrs->vtag);
86a9bad3 1480 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
a6a53252 1481 }
2707fffc 1482 netif_receive_skb(skb);
a6a53252 1483
a6a53252
JY		 1484skip_pkt:
1485 /* skip current packet whether it's ok or not. */
1486 rx_page->read_offset +=
1487 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1488 RRS_PKT_SIZE_MASK) +
1489 sizeof(struct atl1e_recv_ret_status) + 31) &
1490 0xFFFFFFE0);
1491
1492 if (rx_page->read_offset >= rx_ring->page_size) {
1493 /* mark this page clean */
1494 u16 reg_addr;
1495 u8 rx_using;
1496
1497 rx_page->read_offset =
1498 *(rx_page->write_offset_addr) = 0;
1499 rx_using = rx_page_desc[que].rx_using;
1500 reg_addr =
1501 atl1e_rx_page_vld_regs[que][rx_using];
1502 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1503 rx_page_desc[que].rx_using ^= 1;
1504 rx_page = atl1e_get_rx_page(adapter, que);
1505 }
1506 write_offset = *(rx_page->write_offset_addr);
1507 } while (rx_page->read_offset < write_offset);
1508 }
1509
1510 return;
1511
1512fatal_err:
1513 if (!test_bit(__AT_DOWN, &adapter->flags))
1514 schedule_work(&adapter->reset_task);
1515}
1516
49ce9c2c 1517/**
a6a53252 1518 * atl1e_clean - NAPI Rx polling callback
a6a53252
JY		 1519 */
1520static int atl1e_clean(struct napi_struct *napi, int budget)
1521{
1522 struct atl1e_adapter *adapter =
1523 container_of(napi, struct atl1e_adapter, napi);
a6a53252
JY		 1524 u32 imr_data;
1525 int work_done = 0;
1526
1527 /* Keep link state information with original netdev */
1528 if (!netif_carrier_ok(adapter->netdev))
1529 goto quit_polling;
1530
1531 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1532
1533 /* If no Tx and not enough Rx work done, exit the polling mode */
1534 if (work_done < budget) {
1535quit_polling:
288379f0 1536 napi_complete(napi);
a6a53252
JY		 1537 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1538 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1539 /* test debug */
1540 if (test_bit(__AT_DOWN, &adapter->flags)) {
1541 atomic_dec(&adapter->irq_sem);
ba211e3e
JP		 1542 netdev_err(adapter->netdev,
1543 "atl1e_clean is called when AT_DOWN\n");
a6a53252
JY		 1544 }
1545 /* reenable RX intr */
1546 /*atl1e_irq_enable(adapter); */
1547
1548 }
1549 return work_done;
1550}
1551
1552#ifdef CONFIG_NET_POLL_CONTROLLER
1553
1554/*
1555 * Polling 'interrupt' - used by things like netconsole to send skbs
1556 * without having to re-enable interrupts. It's not called while
1557 * the interrupt routine is executing.
1558 */
1559static void atl1e_netpoll(struct net_device *netdev)
1560{
1561 struct atl1e_adapter *adapter = netdev_priv(netdev);
1562
1563 disable_irq(adapter->pdev->irq);
1564 atl1e_intr(adapter->pdev->irq, netdev);
1565 enable_irq(adapter->pdev->irq);
1566}
1567#endif
1568
1569static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1570{
1571 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1572 u16 next_to_use = 0;
1573 u16 next_to_clean = 0;
1574
1575 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1576 next_to_use = tx_ring->next_to_use;
1577
1578 return (u16)(next_to_clean > next_to_use) ?
1579 (next_to_clean - next_to_use - 1) :
1580 (tx_ring->count + next_to_clean - next_to_use - 1);
1581}
1582
1583/*
1584 * get next usable tpd
1585 * Note: should call atl1e_tdp_avail to make sure
1586 * there is enough tpd to use
1587 */
1588static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1589{
1590 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1591 u16 next_to_use = 0;
1592
1593 next_to_use = tx_ring->next_to_use;
1594 if (++tx_ring->next_to_use == tx_ring->count)
1595 tx_ring->next_to_use = 0;
1596
1597 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
64699336 1598 return &tx_ring->desc[next_to_use];
a6a53252
JY		 1599}
1600
1601static struct atl1e_tx_buffer *
1602atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1603{
1604 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1605
1606 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1607}
1608
1609/* Calculate the transmit packet descript needed*/
1610static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1611{
1612 int i = 0;
1613 u16 tpd_req = 1;
1614 u16 fg_size = 0;
1615 u16 proto_hdr_len = 0;
1616
1617 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
9e903e08 1618 fg_size = skb_frag_size(&skb_shinfo(skb)->frags[i]);
a6a53252
JY		 1619 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1620 }
1621
1622 if (skb_is_gso(skb)) {
17d0cdfa 1623 if (skb->protocol == htons(ETH_P_IP) ||
a6a53252
JY		 1624 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1625 proto_hdr_len = skb_transport_offset(skb) +
1626 tcp_hdrlen(skb);
1627 if (proto_hdr_len < skb_headlen(skb)) {
1628 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1629 MAX_TX_BUF_LEN - 1) >>
1630 MAX_TX_BUF_SHIFT);
1631 }
1632 }
1633
1634 }
1635 return tpd_req;
1636}
1637
1638static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1639 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1640{
d8e4435e 1641 unsigned short offload_type;
a6a53252
JY		 1642 u8 hdr_len;
1643 u32 real_len;
a6a53252
JY		 1644
1645 if (skb_is_gso(skb)) {
d8e4435e 1646 int err;
1647
1648 err = skb_cow_head(skb, 0);
1649 if (err < 0)
1650 return err;
1651
a6a53252
JY		 1652 offload_type = skb_shinfo(skb)->gso_type;
1653
1654 if (offload_type & SKB_GSO_TCPV4) {
1655 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1656 + ntohs(ip_hdr(skb)->tot_len));
1657
1658 if (real_len < skb->len)
1659 pskb_trim(skb, real_len);
1660
1661 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1662 if (unlikely(skb->len == hdr_len)) {
1663 /* only xsum need */
ba211e3e
JP		 1664 netdev_warn(adapter->netdev,
1665 "IPV4 tso with zero data??\n");
a6a53252
JY		 1666 goto check_sum;
1667 } else {
1668 ip_hdr(skb)->check = 0;
1669 ip_hdr(skb)->tot_len = 0;
1670 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1671 ip_hdr(skb)->saddr,
1672 ip_hdr(skb)->daddr,
1673 0, IPPROTO_TCP, 0);
1674 tpd->word3 |= (ip_hdr(skb)->ihl &
1675 TDP_V4_IPHL_MASK) <<
1676 TPD_V4_IPHL_SHIFT;
1677 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1678 TPD_TCPHDRLEN_MASK) <<
1679 TPD_TCPHDRLEN_SHIFT;
1680 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1681 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1682 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1683 }
1684 return 0;
1685 }
a6a53252
JY		 1686 }
1687
1688check_sum:
1689 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1690 u8 css, cso;
1691
0d0b1672 1692 cso = skb_checksum_start_offset(skb);
a6a53252 1693 if (unlikely(cso & 0x1)) {
ba211e3e
JP		 1694 netdev_err(adapter->netdev,
1695 "payload offset should not ant event number\n");
a6a53252
JY		 1696 return -1;
1697 } else {
1698 css = cso + skb->csum_offset;
1699 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1700 TPD_PLOADOFFSET_SHIFT;
1701 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1702 TPD_CCSUMOFFSET_SHIFT;
1703 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1704 }
1705 }
1706
1707 return 0;
1708}
1709
352900b5
NH		 1710static int atl1e_tx_map(struct atl1e_adapter *adapter,
1711 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
a6a53252
JY		 1712{
1713 struct atl1e_tpd_desc *use_tpd = NULL;
1714 struct atl1e_tx_buffer *tx_buffer = NULL;
e743d313 1715 u16 buf_len = skb_headlen(skb);
a6a53252
JY		 1716 u16 map_len = 0;
1717 u16 mapped_len = 0;
1718 u16 hdr_len = 0;
1719 u16 nr_frags;
1720 u16 f;
1721 int segment;
352900b5 1722 int ring_start = adapter->tx_ring.next_to_use;
584ec435 1723 int ring_end;
a6a53252
JY		 1724
1725 nr_frags = skb_shinfo(skb)->nr_frags;
1726 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1727 if (segment) {
1728 /* TSO */
1729 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1730 use_tpd = tpd;
1731
1732 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1733 tx_buffer->length = map_len;
1734 tx_buffer->dma = pci_map_single(adapter->pdev,
1735 skb->data, hdr_len, PCI_DMA_TODEVICE);
352900b5
NH		 1736 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma))
1737 return -ENOSPC;
1738
03f18991 1739 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
a6a53252
JY		 1740 mapped_len += map_len;
1741 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1742 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1743 ((cpu_to_le32(tx_buffer->length) &
1744 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1745 }
1746
1747 while (mapped_len < buf_len) {
1748 /* mapped_len == 0, means we should use the first tpd,
1749 which is given by caller */
1750 if (mapped_len == 0) {
1751 use_tpd = tpd;
1752 } else {
1753 use_tpd = atl1e_get_tpd(adapter);
1754 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1755 }
1756 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1757 tx_buffer->skb = NULL;
1758
1759 tx_buffer->length = map_len =
1760 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1761 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1762 tx_buffer->dma =
1763 pci_map_single(adapter->pdev, skb->data + mapped_len,
1764 map_len, PCI_DMA_TODEVICE);
352900b5
NH		 1765
1766 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
584ec435
NH		 1767 /* We need to unwind the mappings we've done */
1768 ring_end = adapter->tx_ring.next_to_use;
1769 adapter->tx_ring.next_to_use = ring_start;
1770 while (adapter->tx_ring.next_to_use != ring_end) {
1771 tpd = atl1e_get_tpd(adapter);
1772 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1773 pci_unmap_single(adapter->pdev, tx_buffer->dma,
1774 tx_buffer->length, PCI_DMA_TODEVICE);
1775 }
352900b5
NH		 1776 /* Reset the tx rings next pointer */
1777 adapter->tx_ring.next_to_use = ring_start;
1778 return -ENOSPC;
1779 }
1780
03f18991 1781 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_SINGLE);
a6a53252
JY		 1782 mapped_len += map_len;
1783 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1784 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1785 ((cpu_to_le32(tx_buffer->length) &
1786 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1787 }
1788
1789 for (f = 0; f < nr_frags; f++) {
9e903e08 1790 const struct skb_frag_struct *frag;
a6a53252
JY		 1791 u16 i;
1792 u16 seg_num;
1793
1794 frag = &skb_shinfo(skb)->frags[f];
9e903e08 1795 buf_len = skb_frag_size(frag);
a6a53252
JY		 1796
1797 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1798 for (i = 0; i < seg_num; i++) {
1799 use_tpd = atl1e_get_tpd(adapter);
1800 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1801
1802 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
0ee904c3 1803 BUG_ON(tx_buffer->skb);
a6a53252
JY		 1804
1805 tx_buffer->skb = NULL;
1806 tx_buffer->length =
1807 (buf_len > MAX_TX_BUF_LEN) ?
1808 MAX_TX_BUF_LEN : buf_len;
1809 buf_len -= tx_buffer->length;
1810
6adaaac7
IC		 1811 tx_buffer->dma = skb_frag_dma_map(&adapter->pdev->dev,
1812 frag,
1813 (i * MAX_TX_BUF_LEN),
1814 tx_buffer->length,
5d6bcdfe 1815 DMA_TO_DEVICE);
352900b5
NH		 1816
1817 if (dma_mapping_error(&adapter->pdev->dev, tx_buffer->dma)) {
584ec435
NH		 1818 /* We need to unwind the mappings we've done */
1819 ring_end = adapter->tx_ring.next_to_use;
1820 adapter->tx_ring.next_to_use = ring_start;
1821 while (adapter->tx_ring.next_to_use != ring_end) {
1822 tpd = atl1e_get_tpd(adapter);
1823 tx_buffer = atl1e_get_tx_buffer(adapter, tpd);
1824 dma_unmap_page(&adapter->pdev->dev, tx_buffer->dma,
1825 tx_buffer->length, DMA_TO_DEVICE);
1826 }
1827
352900b5
NH		 1828 /* Reset the ring next to use pointer */
1829 adapter->tx_ring.next_to_use = ring_start;
1830 return -ENOSPC;
1831 }
1832
03f18991 1833 ATL1E_SET_PCIMAP_TYPE(tx_buffer, ATL1E_TX_PCIMAP_PAGE);
a6a53252
JY		 1834 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1835 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1836 ((cpu_to_le32(tx_buffer->length) &
1837 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1838 }
1839 }
1840
1841 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1842 /* note this one is a tcp header */
1843 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1844 /* The last tpd */
1845
1846 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1847 /* The last buffer info contain the skb address,
1848 so it will be free after unmap */
1849 tx_buffer->skb = skb;
352900b5 1850 return 0;
a6a53252
JY		 1851}
1852
1853static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1854 struct atl1e_tpd_desc *tpd)
1855{
1856 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1857 /* Force memory writes to complete before letting h/w
1858 * know there are new descriptors to fetch. (Only
1859 * applicable for weak-ordered memory model archs,
1860 * such as IA-64). */
1861 wmb();
1862 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1863}
1864
61357325
SH		 1865static netdev_tx_t atl1e_xmit_frame(struct sk_buff *skb,
1866 struct net_device *netdev)
a6a53252
JY		 1867{
1868 struct atl1e_adapter *adapter = netdev_priv(netdev);
1869 unsigned long flags;
1870 u16 tpd_req = 1;
1871 struct atl1e_tpd_desc *tpd;
1872
1873 if (test_bit(__AT_DOWN, &adapter->flags)) {
1874 dev_kfree_skb_any(skb);
1875 return NETDEV_TX_OK;
1876 }
1877
1878 if (unlikely(skb->len <= 0)) {
1879 dev_kfree_skb_any(skb);
1880 return NETDEV_TX_OK;
1881 }
1882 tpd_req = atl1e_cal_tdp_req(skb);
1883 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1884 return NETDEV_TX_LOCKED;
1885
1886 if (atl1e_tpd_avail(adapter) < tpd_req) {
1887 /* no enough descriptor, just stop queue */
1888 netif_stop_queue(netdev);
1889 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1890 return NETDEV_TX_BUSY;
1891 }
1892
1893 tpd = atl1e_get_tpd(adapter);
1894
2707fffc 1895 if (vlan_tx_tag_present(skb)) {
a6a53252
JY		 1896 u16 vlan_tag = vlan_tx_tag_get(skb);
1897 u16 atl1e_vlan_tag;
1898
1899 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1900 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1901 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1902 TPD_VLAN_SHIFT;
1903 }
1904
17d0cdfa 1905 if (skb->protocol == htons(ETH_P_8021Q))
a6a53252
JY		 1906 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1907
1908 if (skb_network_offset(skb) != ETH_HLEN)
1909 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1910
1911 /* do TSO and check sum */
1912 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1913 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1914 dev_kfree_skb_any(skb);
1915 return NETDEV_TX_OK;
1916 }
1917
584ec435
NH		 1918 if (atl1e_tx_map(adapter, skb, tpd)) {
1919 dev_kfree_skb_any(skb);
352900b5 1920 goto out;
584ec435 1921 }
352900b5 1922
a6a53252
JY		 1923 atl1e_tx_queue(adapter, tpd_req, tpd);
1924
cdd0db05 1925 netdev->trans_start = jiffies; /* NETIF_F_LLTX driver :( */
352900b5 1926out:
a6a53252
JY		 1927 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1928 return NETDEV_TX_OK;
1929}
1930
1931static void atl1e_free_irq(struct atl1e_adapter *adapter)
1932{
1933 struct net_device *netdev = adapter->netdev;
1934
1935 free_irq(adapter->pdev->irq, netdev);
a6a53252
JY		 1936}
1937
1938static int atl1e_request_irq(struct atl1e_adapter *adapter)
1939{
1940 struct pci_dev *pdev = adapter->pdev;
1941 struct net_device *netdev = adapter->netdev;
a6a53252
JY		 1942 int err = 0;
1943
188ab1b1
HFS		 1944 err = request_irq(pdev->irq, atl1e_intr, IRQF_SHARED, netdev->name,
1945 netdev);
a6a53252 1946 if (err) {
ba211e3e
JP		 1947 netdev_dbg(adapter->netdev,
1948 "Unable to allocate interrupt Error: %d\n", err);
a6a53252
JY		 1949 return err;
1950 }
b5efab99 1951 netdev_dbg(netdev, "atl1e_request_irq OK\n");
a6a53252
JY		 1952 return err;
1953}
1954
1955int atl1e_up(struct atl1e_adapter *adapter)
1956{
1957 struct net_device *netdev = adapter->netdev;
1958 int err = 0;
1959 u32 val;
1960
1961 /* hardware has been reset, we need to reload some things */
1962 err = atl1e_init_hw(&adapter->hw);
1963 if (err) {
1964 err = -EIO;
1965 return err;
1966 }
1967 atl1e_init_ring_ptrs(adapter);
1968 atl1e_set_multi(netdev);
1969 atl1e_restore_vlan(adapter);
1970
1971 if (atl1e_configure(adapter)) {
1972 err = -EIO;
1973 goto err_up;
1974 }
1975
1976 clear_bit(__AT_DOWN, &adapter->flags);
1977 napi_enable(&adapter->napi);
1978 atl1e_irq_enable(adapter);
1979 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1980 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1981 val | MASTER_CTRL_MANUAL_INT);
1982
1983err_up:
1984 return err;
1985}
1986
1987void atl1e_down(struct atl1e_adapter *adapter)
1988{
1989 struct net_device *netdev = adapter->netdev;
1990
1991 /* signal that we're down so the interrupt handler does not
1992 * reschedule our watchdog timer */
1993 set_bit(__AT_DOWN, &adapter->flags);
1994
a6a53252 1995 netif_stop_queue(netdev);
a6a53252
JY		 1996
1997 /* reset MAC to disable all RX/TX */
1998 atl1e_reset_hw(&adapter->hw);
1999 msleep(1);
2000
2001 napi_disable(&adapter->napi);
2002 atl1e_del_timer(adapter);
2003 atl1e_irq_disable(adapter);
2004
2005 netif_carrier_off(netdev);
2006 adapter->link_speed = SPEED_0;
2007 adapter->link_duplex = -1;
2008 atl1e_clean_tx_ring(adapter);
2009 atl1e_clean_rx_ring(adapter);
2010}
2011
49ce9c2c 2012/**
a6a53252
JY		 2013 * atl1e_open - Called when a network interface is made active
2014 * @netdev: network interface device structure
2015 *
2016 * Returns 0 on success, negative value on failure
2017 *
2018 * The open entry point is called when a network interface is made
2019 * active by the system (IFF_UP). At this point all resources needed
2020 * for transmit and receive operations are allocated, the interrupt
2021 * handler is registered with the OS, the watchdog timer is started,
2022 * and the stack is notified that the interface is ready.
2023 */
2024static int atl1e_open(struct net_device *netdev)
2025{
2026 struct atl1e_adapter *adapter = netdev_priv(netdev);
2027 int err;
2028
2029 /* disallow open during test */
2030 if (test_bit(__AT_TESTING, &adapter->flags))
2031 return -EBUSY;
2032
2033 /* allocate rx/tx dma buffer & descriptors */
2034 atl1e_init_ring_resources(adapter);
2035 err = atl1e_setup_ring_resources(adapter);
2036 if (unlikely(err))
2037 return err;
2038
2039 err = atl1e_request_irq(adapter);
2040 if (unlikely(err))
2041 goto err_req_irq;
2042
2043 err = atl1e_up(adapter);
2044 if (unlikely(err))
2045 goto err_up;
2046
2047 return 0;
2048
2049err_up:
2050 atl1e_free_irq(adapter);
2051err_req_irq:
2052 atl1e_free_ring_resources(adapter);
2053 atl1e_reset_hw(&adapter->hw);
2054
2055 return err;
2056}
2057
49ce9c2c 2058/**
a6a53252
JY		 2059 * atl1e_close - Disables a network interface
2060 * @netdev: network interface device structure
2061 *
2062 * Returns 0, this is not allowed to fail
2063 *
2064 * The close entry point is called when an interface is de-activated
2065 * by the OS. The hardware is still under the drivers control, but
2066 * needs to be disabled. A global MAC reset is issued to stop the
2067 * hardware, and all transmit and receive resources are freed.
2068 */
2069static int atl1e_close(struct net_device *netdev)
2070{
2071 struct atl1e_adapter *adapter = netdev_priv(netdev);
2072
2073 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2074 atl1e_down(adapter);
2075 atl1e_free_irq(adapter);
2076 atl1e_free_ring_resources(adapter);
2077
2078 return 0;
2079}
2080
a6a53252
JY		 2081static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2082{
2083 struct net_device *netdev = pci_get_drvdata(pdev);
2084 struct atl1e_adapter *adapter = netdev_priv(netdev);
2085 struct atl1e_hw *hw = &adapter->hw;
2086 u32 ctrl = 0;
2087 u32 mac_ctrl_data = 0;
2088 u32 wol_ctrl_data = 0;
2089 u16 mii_advertise_data = 0;
2090 u16 mii_bmsr_data = 0;
2091 u16 mii_intr_status_data = 0;
2092 u32 wufc = adapter->wol;
2093 u32 i;
2094#ifdef CONFIG_PM
2095 int retval = 0;
2096#endif
2097
2098 if (netif_running(netdev)) {
2099 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2100 atl1e_down(adapter);
2101 }
2102 netif_device_detach(netdev);
2103
2104#ifdef CONFIG_PM
2105 retval = pci_save_state(pdev);
2106 if (retval)
2107 return retval;
2108#endif
2109
2110 if (wufc) {
2111 /* get link status */
64699336
JP		 2112 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
2113 atl1e_read_phy_reg(hw, MII_BMSR, &mii_bmsr_data);
a6a53252 2114
ccd5c8ef 2115 mii_advertise_data = ADVERTISE_10HALF;
a6a53252 2116
ccd5c8ef 2117 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
a6a53252
JY		 2118 (atl1e_write_phy_reg(hw,
2119 MII_ADVERTISE, mii_advertise_data) != 0) ||
2120 (atl1e_phy_commit(hw)) != 0) {
ba211e3e 2121 netdev_dbg(adapter->netdev, "set phy register failed\n");
a6a53252
JY		 2122 goto wol_dis;
2123 }
2124
2125 hw->phy_configured = false; /* re-init PHY when resume */
2126
2127 /* turn on magic packet wol */
2128 if (wufc & AT_WUFC_MAG)
2129 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2130
2131 if (wufc & AT_WUFC_LNKC) {
2132 /* if orignal link status is link, just wait for retrive link */
2133 if (mii_bmsr_data & BMSR_LSTATUS) {
2134 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2135 msleep(100);
2136 atl1e_read_phy_reg(hw, MII_BMSR,
64699336 2137 &mii_bmsr_data);
a6a53252
JY		 2138 if (mii_bmsr_data & BMSR_LSTATUS)
2139 break;
2140 }
2141
2142 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
ba211e3e
JP		 2143 netdev_dbg(adapter->netdev,
2144 "Link may change when suspend\n");
a6a53252
JY		 2145 }
2146 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2147 /* only link up can wake up */
2148 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
ba211e3e
JP		 2149 netdev_dbg(adapter->netdev,
2150 "read write phy register failed\n");
a6a53252
JY		 2151 goto wol_dis;
2152 }
2153 }
2154 /* clear phy interrupt */
2155 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2156 /* Config MAC Ctrl register */
2157 mac_ctrl_data = MAC_CTRL_RX_EN;
2158 /* set to 10/100M halt duplex */
2159 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2160 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2161 MAC_CTRL_PRMLEN_MASK) <<
2162 MAC_CTRL_PRMLEN_SHIFT);
2163
2707fffc 2164 __atl1e_vlan_mode(netdev->features, &mac_ctrl_data);
a6a53252
JY		 2165
2166 /* magic packet maybe Broadcast&multicast&Unicast frame */
2167 if (wufc & AT_WUFC_MAG)
2168 mac_ctrl_data |= MAC_CTRL_BC_EN;
2169
ba211e3e
JP		 2170 netdev_dbg(adapter->netdev, "suspend MAC=0x%x\n",
2171 mac_ctrl_data);
a6a53252
JY		 2172
2173 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2174 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2175 /* pcie patch */
2176 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2177 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2178 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2179 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2180 goto suspend_exit;
2181 }
2182wol_dis:
2183
2184 /* WOL disabled */
2185 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2186
2187 /* pcie patch */
2188 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2189 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2190 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2191
2192 atl1e_force_ps(hw);
2193 hw->phy_configured = false; /* re-init PHY when resume */
2194
2195 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2196
2197suspend_exit:
2198
2199 if (netif_running(netdev))
2200 atl1e_free_irq(adapter);
2201
2202 pci_disable_device(pdev);
2203
2204 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2205
2206 return 0;
2207}
2208
d6f8aa85 2209#ifdef CONFIG_PM
a6a53252
JY		 2210static int atl1e_resume(struct pci_dev *pdev)
2211{
2212 struct net_device *netdev = pci_get_drvdata(pdev);
2213 struct atl1e_adapter *adapter = netdev_priv(netdev);
2214 u32 err;
2215
2216 pci_set_power_state(pdev, PCI_D0);
2217 pci_restore_state(pdev);
2218
2219 err = pci_enable_device(pdev);
2220 if (err) {
ba211e3e
JP		 2221 netdev_err(adapter->netdev,
2222 "Cannot enable PCI device from suspend\n");
a6a53252
JY		 2223 return err;
2224 }
2225
2226 pci_set_master(pdev);
2227
2228 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2229
2230 pci_enable_wake(pdev, PCI_D3hot, 0);
2231 pci_enable_wake(pdev, PCI_D3cold, 0);
2232
2233 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2234
50f684b9 2235 if (netif_running(netdev)) {
a6a53252
JY		 2236 err = atl1e_request_irq(adapter);
2237 if (err)
2238 return err;
50f684b9 2239 }
a6a53252
JY		 2240
2241 atl1e_reset_hw(&adapter->hw);
2242
2243 if (netif_running(netdev))
2244 atl1e_up(adapter);
2245
2246 netif_device_attach(netdev);
2247
2248 return 0;
2249}
2250#endif
2251
2252static void atl1e_shutdown(struct pci_dev *pdev)
2253{
2254 atl1e_suspend(pdev, PMSG_SUSPEND);
2255}
2256
1e058ab5
SH		 2257static const struct net_device_ops atl1e_netdev_ops = {
2258 .ndo_open = atl1e_open,
2259 .ndo_stop = atl1e_close,
00829823 2260 .ndo_start_xmit = atl1e_xmit_frame,
1e058ab5 2261 .ndo_get_stats = atl1e_get_stats,
afc4b13d 2262 .ndo_set_rx_mode = atl1e_set_multi,
1e058ab5
SH		 2263 .ndo_validate_addr = eth_validate_addr,
2264 .ndo_set_mac_address = atl1e_set_mac_addr,
2707fffc
JP		 2265 .ndo_fix_features = atl1e_fix_features,
2266 .ndo_set_features = atl1e_set_features,
1e058ab5
SH		 2267 .ndo_change_mtu = atl1e_change_mtu,
2268 .ndo_do_ioctl = atl1e_ioctl,
2269 .ndo_tx_timeout = atl1e_tx_timeout,
1e058ab5
SH		 2270#ifdef CONFIG_NET_POLL_CONTROLLER
2271 .ndo_poll_controller = atl1e_netpoll,
2272#endif
2273
2274};
2275
a6a53252
JY		 2276static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2277{
2278 SET_NETDEV_DEV(netdev, &pdev->dev);
2279 pci_set_drvdata(pdev, netdev);
2280
1e058ab5 2281 netdev->netdev_ops = &atl1e_netdev_ops;
00829823 2282
a6a53252 2283 netdev->watchdog_timeo = AT_TX_WATCHDOG;
a6a53252
JY		 2284 atl1e_set_ethtool_ops(netdev);
2285
782d640a 2286 netdev->hw_features = NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_TSO |
f646968f 2287 NETIF_F_HW_VLAN_CTAG_RX;
2707fffc 2288 netdev->features = netdev->hw_features | NETIF_F_LLTX |
f646968f 2289 NETIF_F_HW_VLAN_CTAG_TX;
40dc9ab2
AM		 2290 /* not enabled by default */
2291 netdev->hw_features |= NETIF_F_RXALL | NETIF_F_RXFCS;
a6a53252
JY		 2292 return 0;
2293}
2294
49ce9c2c 2295/**
a6a53252
JY		 2296 * atl1e_probe - Device Initialization Routine
2297 * @pdev: PCI device information struct
2298 * @ent: entry in atl1e_pci_tbl
2299 *
2300 * Returns 0 on success, negative on failure
2301 *
2302 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2303 * The OS initialization, configuring of the adapter private structure,
2304 * and a hardware reset occur.
2305 */
1dd06ae8 2306static int atl1e_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
a6a53252
JY		 2307{
2308 struct net_device *netdev;
2309 struct atl1e_adapter *adapter = NULL;
2310 static int cards_found;
2311
2312 int err = 0;
2313
2314 err = pci_enable_device(pdev);
2315 if (err) {
2316 dev_err(&pdev->dev, "cannot enable PCI device\n");
2317 return err;
2318 }
2319
2320 /*
2321 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2322 * shared register for the high 32 bits, so only a single, aligned,
2323 * 4 GB physical address range can be used at a time.
2324 *
2325 * Supporting 64-bit DMA on this hardware is more trouble than it's
2326 * worth. It is far easier to limit to 32-bit DMA than update
2327 * various kernel subsystems to support the mechanics required by a
2328 * fixed-high-32-bit system.
2329 */
284901a9
YH		 2330 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2331 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
a6a53252
JY		 2332 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2333 goto err_dma;
2334 }
2335
2336 err = pci_request_regions(pdev, atl1e_driver_name);
2337 if (err) {
2338 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2339 goto err_pci_reg;
2340 }
2341
2342 pci_set_master(pdev);
2343
2344 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2345 if (netdev == NULL) {
2346 err = -ENOMEM;
a6a53252
JY		 2347 goto err_alloc_etherdev;
2348 }
2349
2350 err = atl1e_init_netdev(netdev, pdev);
2351 if (err) {
ba211e3e 2352 netdev_err(netdev, "init netdevice failed\n");
a6a53252
JY		 2353 goto err_init_netdev;
2354 }
2355 adapter = netdev_priv(netdev);
2356 adapter->bd_number = cards_found;
2357 adapter->netdev = netdev;
2358 adapter->pdev = pdev;
2359 adapter->hw.adapter = adapter;
2360 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2361 if (!adapter->hw.hw_addr) {
2362 err = -EIO;
ba211e3e 2363 netdev_err(netdev, "cannot map device registers\n");
a6a53252
JY		 2364 goto err_ioremap;
2365 }
a6a53252
JY		 2366
2367 /* init mii data */
2368 adapter->mii.dev = netdev;
2369 adapter->mii.mdio_read = atl1e_mdio_read;
2370 adapter->mii.mdio_write = atl1e_mdio_write;
2371 adapter->mii.phy_id_mask = 0x1f;
2372 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2373
2374 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2375
cc73e41f
JL		 2376 setup_timer(&adapter->phy_config_timer, atl1e_phy_config,
2377 (unsigned long)adapter);
a6a53252
JY		 2378
2379 /* get user settings */
2380 atl1e_check_options(adapter);
2381 /*
2382 * Mark all PCI regions associated with PCI device
2383 * pdev as being reserved by owner atl1e_driver_name
2384 * Enables bus-mastering on the device and calls
2385 * pcibios_set_master to do the needed arch specific settings
2386 */
2387 atl1e_setup_pcicmd(pdev);
2388 /* setup the private structure */
2389 err = atl1e_sw_init(adapter);
2390 if (err) {
ba211e3e 2391 netdev_err(netdev, "net device private data init failed\n");
a6a53252
JY		 2392 goto err_sw_init;
2393 }
2394
2395 /* Init GPHY as early as possible due to power saving issue */
a6a53252 2396 atl1e_phy_init(&adapter->hw);
a6a53252
JY		 2397 /* reset the controller to
2398 * put the device in a known good starting state */
2399 err = atl1e_reset_hw(&adapter->hw);
2400 if (err) {
2401 err = -EIO;
2402 goto err_reset;
2403 }
2404
2405 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2406 err = -EIO;
ba211e3e 2407 netdev_err(netdev, "get mac address failed\n");
a6a53252
JY		 2408 goto err_eeprom;
2409 }
2410
2411 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
ba211e3e 2412 netdev_dbg(netdev, "mac address : %pM\n", adapter->hw.mac_addr);
a6a53252
JY		 2413
2414 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2415 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
31d1670e 2416 netif_set_gso_max_size(netdev, MAX_TSO_SEG_SIZE);
a6a53252
JY		 2417 err = register_netdev(netdev);
2418 if (err) {
ba211e3e 2419 netdev_err(netdev, "register netdevice failed\n");
a6a53252
JY		 2420 goto err_register;
2421 }
2422
2423 /* assume we have no link for now */
2424 netif_stop_queue(netdev);
2425 netif_carrier_off(netdev);
2426
2427 cards_found++;
2428
2429 return 0;
2430
2431err_reset:
2432err_register:
2433err_sw_init:
2434err_eeprom:
3e3d3540 2435 pci_iounmap(pdev, adapter->hw.hw_addr);
a6a53252
JY		 2436err_init_netdev:
2437err_ioremap:
2438 free_netdev(netdev);
2439err_alloc_etherdev:
2440 pci_release_regions(pdev);
2441err_pci_reg:
2442err_dma:
2443 pci_disable_device(pdev);
2444 return err;
2445}
2446
49ce9c2c 2447/**
a6a53252
JY		 2448 * atl1e_remove - Device Removal Routine
2449 * @pdev: PCI device information struct
2450 *
2451 * atl1e_remove is called by the PCI subsystem to alert the driver
2452 * that it should release a PCI device. The could be caused by a
2453 * Hot-Plug event, or because the driver is going to be removed from
2454 * memory.
2455 */
093d369d 2456static void atl1e_remove(struct pci_dev *pdev)
a6a53252
JY		 2457{
2458 struct net_device *netdev = pci_get_drvdata(pdev);
2459 struct atl1e_adapter *adapter = netdev_priv(netdev);
2460
2461 /*
2462 * flush_scheduled work may reschedule our watchdog task, so
2463 * explicitly disable watchdog tasks from being rescheduled
2464 */
2465 set_bit(__AT_DOWN, &adapter->flags);
2466
2467 atl1e_del_timer(adapter);
2468 atl1e_cancel_work(adapter);
2469
2470 unregister_netdev(netdev);
2471 atl1e_free_ring_resources(adapter);
2472 atl1e_force_ps(&adapter->hw);
3e3d3540 2473 pci_iounmap(pdev, adapter->hw.hw_addr);
a6a53252
JY		 2474 pci_release_regions(pdev);
2475 free_netdev(netdev);
2476 pci_disable_device(pdev);
2477}
2478
49ce9c2c 2479/**
a6a53252
JY		 2480 * atl1e_io_error_detected - called when PCI error is detected
2481 * @pdev: Pointer to PCI device
2482 * @state: The current pci connection state
2483 *
2484 * This function is called after a PCI bus error affecting
2485 * this device has been detected.
2486 */
2487static pci_ers_result_t
2488atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2489{
2490 struct net_device *netdev = pci_get_drvdata(pdev);
454d7c9b 2491 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 2492
2493 netif_device_detach(netdev);
2494
0d6ab58d
DN		 2495 if (state == pci_channel_io_perm_failure)
2496 return PCI_ERS_RESULT_DISCONNECT;
2497
a6a53252
JY		 2498 if (netif_running(netdev))
2499 atl1e_down(adapter);
2500
2501 pci_disable_device(pdev);
2502
2503 /* Request a slot slot reset. */
2504 return PCI_ERS_RESULT_NEED_RESET;
2505}
2506
49ce9c2c 2507/**
a6a53252
JY		 2508 * atl1e_io_slot_reset - called after the pci bus has been reset.
2509 * @pdev: Pointer to PCI device
2510 *
2511 * Restart the card from scratch, as if from a cold-boot. Implementation
2512 * resembles the first-half of the e1000_resume routine.
2513 */
2514static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2515{
2516 struct net_device *netdev = pci_get_drvdata(pdev);
454d7c9b 2517 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 2518
2519 if (pci_enable_device(pdev)) {
ba211e3e
JP		 2520 netdev_err(adapter->netdev,
2521 "Cannot re-enable PCI device after reset\n");
a6a53252
JY		 2522 return PCI_ERS_RESULT_DISCONNECT;
2523 }
2524 pci_set_master(pdev);
2525
2526 pci_enable_wake(pdev, PCI_D3hot, 0);
2527 pci_enable_wake(pdev, PCI_D3cold, 0);
2528
2529 atl1e_reset_hw(&adapter->hw);
2530
2531 return PCI_ERS_RESULT_RECOVERED;
2532}
2533
49ce9c2c 2534/**
a6a53252
JY		 2535 * atl1e_io_resume - called when traffic can start flowing again.
2536 * @pdev: Pointer to PCI device
2537 *
2538 * This callback is called when the error recovery driver tells us that
2539 * its OK to resume normal operation. Implementation resembles the
2540 * second-half of the atl1e_resume routine.
2541 */
2542static void atl1e_io_resume(struct pci_dev *pdev)
2543{
2544 struct net_device *netdev = pci_get_drvdata(pdev);
454d7c9b 2545 struct atl1e_adapter *adapter = netdev_priv(netdev);
a6a53252
JY		 2546
2547 if (netif_running(netdev)) {
2548 if (atl1e_up(adapter)) {
ba211e3e
JP		 2549 netdev_err(adapter->netdev,
2550 "can't bring device back up after reset\n");
a6a53252
JY		 2551 return;
2552 }
2553 }
2554
2555 netif_device_attach(netdev);
2556}
2557
3646f0e5 2558static const struct pci_error_handlers atl1e_err_handler = {
a6a53252
JY		 2559 .error_detected = atl1e_io_error_detected,
2560 .slot_reset = atl1e_io_slot_reset,
2561 .resume = atl1e_io_resume,
2562};
2563
2564static struct pci_driver atl1e_driver = {
2565 .name = atl1e_driver_name,
2566 .id_table = atl1e_pci_tbl,
2567 .probe = atl1e_probe,
093d369d 2568 .remove = atl1e_remove,
25985edc 2569 /* Power Management Hooks */
a6a53252
JY		 2570#ifdef CONFIG_PM
2571 .suspend = atl1e_suspend,
2572 .resume = atl1e_resume,
2573#endif
2574 .shutdown = atl1e_shutdown,
2575 .err_handler = &atl1e_err_handler
2576};
2577
687df5d4 2578module_pci_driver(atl1e_driver);
Linux kernel - Deliverables
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