[deliverable/linux.git] / drivers / net / ethernet / broadcom / cnic_if.h

/* cnic_if.h: Broadcom CNIC core network driver.
 *
 * Copyright (c) 2006-2014 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation.
 *
 */


#ifndef CNIC_IF_H
#define CNIC_IF_H

#include "bnx2x/bnx2x_mfw_req.h"

#define CNIC_MODULE_VERSION	"2.5.20"
#define CNIC_MODULE_RELDATE	"March 14, 2014"

#define CNIC_ULP_RDMA		0
#define CNIC_ULP_ISCSI		1
#define CNIC_ULP_FCOE		2
#define CNIC_ULP_L4		3
#define MAX_CNIC_ULP_TYPE_EXT	3
#define MAX_CNIC_ULP_TYPE	4

/* Use CPU native page size up to 16K for cnic ring sizes.  */
#if (PAGE_SHIFT > 14)
#define CNIC_PAGE_BITS	14
#else
#define CNIC_PAGE_BITS	PAGE_SHIFT
#endif
#define CNIC_PAGE_SIZE	(1 << (CNIC_PAGE_BITS))
#define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
#define CNIC_PAGE_MASK	(~((CNIC_PAGE_SIZE) - 1))

struct kwqe {
	u32 kwqe_op_flag;

#define KWQE_QID_SHIFT		8
#define KWQE_OPCODE_MASK	0x00ff0000
#define KWQE_OPCODE_SHIFT	16
#define KWQE_OPCODE(x)		((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
#define KWQE_LAYER_MASK			0x70000000
#define KWQE_LAYER_SHIFT		28
#define KWQE_FLAGS_LAYER_MASK_L2	(2<<28)
#define KWQE_FLAGS_LAYER_MASK_L3	(3<<28)
#define KWQE_FLAGS_LAYER_MASK_L4	(4<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)

	u32 kwqe_info0;
	u32 kwqe_info1;
	u32 kwqe_info2;
	u32 kwqe_info3;
	u32 kwqe_info4;
	u32 kwqe_info5;
	u32 kwqe_info6;
};

struct kwqe_16 {
	u32 kwqe_info0;
	u32 kwqe_info1;
	u32 kwqe_info2;
	u32 kwqe_info3;
};

struct kcqe {
	u32 kcqe_info0;
	u32 kcqe_info1;
	u32 kcqe_info2;
	u32 kcqe_info3;
	u32 kcqe_info4;
	u32 kcqe_info5;
	u32 kcqe_info6;
	u32 kcqe_op_flag;
		#define KCQE_RAMROD_COMPLETION		(0x1<<27) /* Everest */
		#define KCQE_FLAGS_LAYER_MASK		(0x7<<28)
		#define KCQE_FLAGS_LAYER_MASK_MISC	(0<<28)
		#define KCQE_FLAGS_LAYER_MASK_L2	(2<<28)
		#define KCQE_FLAGS_LAYER_MASK_L3	(3<<28)
		#define KCQE_FLAGS_LAYER_MASK_L4	(4<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)
		#define KCQE_FLAGS_NEXT 		(1<<31)
		#define KCQE_FLAGS_OPCODE_MASK		(0xff<<16)
		#define KCQE_FLAGS_OPCODE_SHIFT		(16)
		#define KCQE_OPCODE(op)			\
		(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
};

#define MAX_CNIC_CTL_DATA	64
#define MAX_DRV_CTL_DATA	64

#define CNIC_CTL_STOP_CMD		1
#define CNIC_CTL_START_CMD		2
#define CNIC_CTL_COMPLETION_CMD		3
#define CNIC_CTL_STOP_ISCSI_CMD		4
#define CNIC_CTL_FCOE_STATS_GET_CMD	5
#define CNIC_CTL_ISCSI_STATS_GET_CMD	6

#define DRV_CTL_IO_WR_CMD		0x101
#define DRV_CTL_IO_RD_CMD		0x102
#define DRV_CTL_CTX_WR_CMD		0x103
#define DRV_CTL_CTXTBL_WR_CMD		0x104
#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD	0x105
#define DRV_CTL_START_L2_CMD		0x106
#define DRV_CTL_STOP_L2_CMD		0x107
#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD	0x10c
#define DRV_CTL_ISCSI_STOPPED_CMD	0x10d
#define DRV_CTL_ULP_REGISTER_CMD	0x10e
#define DRV_CTL_ULP_UNREGISTER_CMD	0x10f

struct cnic_ctl_completion {
	u32	cid;
	u8	opcode;
	u8	error;
};

struct cnic_ctl_info {
	int	cmd;
	union {
		struct cnic_ctl_completion comp;
		char bytes[MAX_CNIC_CTL_DATA];
	} data;
};

struct drv_ctl_spq_credit {
	u32	credit_count;
};

struct drv_ctl_io {
	u32		cid_addr;
	u32		offset;
	u32		data;
	dma_addr_t	dma_addr;
};

struct drv_ctl_l2_ring {
	u32		client_id;
	u32		cid;
};

struct drv_ctl_register_data {
	int ulp_type;
	struct fcoe_capabilities fcoe_features;
};

struct drv_ctl_info {
	int	cmd;
	union {
		struct drv_ctl_spq_credit credit;
		struct drv_ctl_io io;
		struct drv_ctl_l2_ring ring;
		int ulp_type;
		struct drv_ctl_register_data register_data;
		char bytes[MAX_DRV_CTL_DATA];
	} data;
};

struct cnic_ops {
	struct module	*cnic_owner;
	/* Calls to these functions are protected by RCU.  When
	 * unregistering, we wait for any calls to complete before
	 * continuing.
	 */
	int		(*cnic_handler)(void *, void *);
	int		(*cnic_ctl)(void *, struct cnic_ctl_info *);
};

#define MAX_CNIC_VEC	8

struct cnic_irq {
	unsigned int	vector;
	void		*status_blk;
	u32		status_blk_num;
	u32		status_blk_num2;
	u32		irq_flags;
#define CNIC_IRQ_FL_MSIX		0x00000001
};

struct cnic_eth_dev {
	struct module	*drv_owner;
	u32		drv_state;
#define CNIC_DRV_STATE_REGD		0x00000001
#define CNIC_DRV_STATE_USING_MSIX	0x00000002
#define CNIC_DRV_STATE_NO_ISCSI_OOO	0x00000004
#define CNIC_DRV_STATE_NO_ISCSI		0x00000008
#define CNIC_DRV_STATE_NO_FCOE		0x00000010
#define CNIC_DRV_STATE_HANDLES_IRQ	0x00000020
	u32		chip_id;
	u32		max_kwqe_pending;
	struct pci_dev	*pdev;
	void __iomem	*io_base;
	void __iomem	*io_base2;
	const void	*iro_arr;

	u32		ctx_tbl_offset;
	u32		ctx_tbl_len;
	int		ctx_blk_size;
	u32		starting_cid;
	u32		max_iscsi_conn;
	u32		max_fcoe_conn;
	u32		max_rdma_conn;
	u32		fcoe_init_cid;
	u32		max_fcoe_exchanges;
	u32		fcoe_wwn_port_name_hi;
	u32		fcoe_wwn_port_name_lo;
	u32		fcoe_wwn_node_name_hi;
	u32		fcoe_wwn_node_name_lo;

	u16		iscsi_l2_client_id;
	u16		iscsi_l2_cid;
	u8		iscsi_mac[ETH_ALEN];

	int		num_irq;
	struct cnic_irq	irq_arr[MAX_CNIC_VEC];
	int		(*drv_register_cnic)(struct net_device *,
					     struct cnic_ops *, void *);
	int		(*drv_unregister_cnic)(struct net_device *);
	int		(*drv_submit_kwqes_32)(struct net_device *,
					       struct kwqe *[], u32);
	int		(*drv_submit_kwqes_16)(struct net_device *,
					       struct kwqe_16 *[], u32);
	int		(*drv_ctl)(struct net_device *, struct drv_ctl_info *);
	unsigned long	reserved1[2];
	union drv_info_to_mcp	*addr_drv_info_to_mcp;
};

struct cnic_sockaddr {
	union {
		struct sockaddr_in	v4;
		struct sockaddr_in6	v6;
	} local;
	union {
		struct sockaddr_in	v4;
		struct sockaddr_in6	v6;
	} remote;
};

struct cnic_sock {
	struct cnic_dev *dev;
	void	*context;
	u32	src_ip[4];
	u32	dst_ip[4];
	u16	src_port;
	u16	dst_port;
	u16	vlan_id;
	unsigned char old_ha[ETH_ALEN];
	unsigned char ha[ETH_ALEN];
	u32	mtu;
	u32	cid;
	u32	l5_cid;
	u32	pg_cid;
	int	ulp_type;

	u32	ka_timeout;
	u32	ka_interval;
	u8	ka_max_probe_count;
	u8	tos;
	u8	ttl;
	u8	snd_seq_scale;
	u32	rcv_buf;
	u32	snd_buf;
	u32	seed;

	unsigned long	tcp_flags;
#define SK_TCP_NO_DELAY_ACK	0x1
#define SK_TCP_KEEP_ALIVE	0x2
#define SK_TCP_NAGLE		0x4
#define SK_TCP_TIMESTAMP	0x8
#define SK_TCP_SACK		0x10
#define SK_TCP_SEG_SCALING	0x20
	unsigned long	flags;
#define SK_F_INUSE		0
#define SK_F_OFFLD_COMPLETE	1
#define SK_F_OFFLD_SCHED	2
#define SK_F_PG_OFFLD_COMPLETE	3
#define SK_F_CONNECT_START	4
#define SK_F_IPV6		5
#define SK_F_CLOSING		7
#define SK_F_HW_ERR		8

	atomic_t ref_count;
	u32 state;
	struct kwqe kwqe1;
	struct kwqe kwqe2;
	struct kwqe kwqe3;
};

struct cnic_dev {
	struct net_device	*netdev;
	struct pci_dev		*pcidev;
	void __iomem		*regview;
	struct list_head	list;

	int (*register_device)(struct cnic_dev *dev, int ulp_type,
			       void *ulp_ctx);
	int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
	int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
				u32 num_wqes);
	int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
				u32 num_wqes);

	int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
			 void *);
	int (*cm_destroy)(struct cnic_sock *);
	int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
	int (*cm_abort)(struct cnic_sock *);
	int (*cm_close)(struct cnic_sock *);
	struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
	int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
				 char *data, u16 data_size);
	unsigned long	flags;
#define CNIC_F_CNIC_UP		1
#define CNIC_F_BNX2_CLASS	3
#define CNIC_F_BNX2X_CLASS	4
	atomic_t	ref_count;
	u8		mac_addr[ETH_ALEN];

	int		max_iscsi_conn;
	int		max_fcoe_conn;
	int		max_rdma_conn;

	int		max_fcoe_exchanges;

	union drv_info_to_mcp	*stats_addr;
	struct fcoe_capabilities	*fcoe_cap;

	void		*cnic_priv;
};

#define CNIC_WR(dev, off, val)		writel(val, dev->regview + off)
#define CNIC_WR16(dev, off, val)	writew(val, dev->regview + off)
#define CNIC_WR8(dev, off, val)		writeb(val, dev->regview + off)
#define CNIC_RD(dev, off)		readl(dev->regview + off)
#define CNIC_RD16(dev, off)		readw(dev->regview + off)

struct cnic_ulp_ops {
	/* Calls to these functions are protected by RCU.  When
	 * unregistering, we wait for any calls to complete before
	 * continuing.
	 */

	void (*cnic_init)(struct cnic_dev *dev);
	void (*cnic_exit)(struct cnic_dev *dev);
	void (*cnic_start)(void *ulp_ctx);
	void (*cnic_stop)(void *ulp_ctx);
	void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
				u32 num_cqes);
	void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
	void (*cm_connect_complete)(struct cnic_sock *);
	void (*cm_close_complete)(struct cnic_sock *);
	void (*cm_abort_complete)(struct cnic_sock *);
	void (*cm_remote_close)(struct cnic_sock *);
	void (*cm_remote_abort)(struct cnic_sock *);
	int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
				  char *data, u16 data_size);
	int (*cnic_get_stats)(void *ulp_ctx);
	struct module *owner;
	atomic_t ref_count;
};

int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);

int cnic_unregister_driver(int ulp_type);

#endif
Commit	Line	Data
a4636960 MC	1	/* cnic_if.h: Broadcom CNIC core network driver.
a4636960 MC	2	*
c3661283	3	* Copyright (c) 2006-2014 Broadcom Corporation
a4636960 MC	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation.
	8	*
	9	*/
	10
	11
	12	#ifndef CNIC_IF_H
	13	#define CNIC_IF_H
	14
2e499d3c BW	15	#include "bnx2x/bnx2x_mfw_req.h"
2e499d3c BW	16
c3661283 MC	17	#define CNIC_MODULE_VERSION "2.5.20"
c3661283 MC	18	#define CNIC_MODULE_RELDATE "March 14, 2014"
a4636960 MC	19
	20	#define CNIC_ULP_RDMA 0
	21	#define CNIC_ULP_ISCSI 1
e1928c86 MC	22	#define CNIC_ULP_FCOE 2
	23	#define CNIC_ULP_L4 3
	24	#define MAX_CNIC_ULP_TYPE_EXT 3
	25	#define MAX_CNIC_ULP_TYPE 4
a4636960	26
be1fefc2 MC	27	/* Use CPU native page size up to 16K for cnic ring sizes. */
	28	#if (PAGE_SHIFT > 14)
	29	#define CNIC_PAGE_BITS 14
	30	#else
	31	#define CNIC_PAGE_BITS PAGE_SHIFT
	32	#endif
	33	#define CNIC_PAGE_SIZE (1 << (CNIC_PAGE_BITS))
	34	#define CNIC_PAGE_ALIGN(addr) ALIGN(addr, CNIC_PAGE_SIZE)
	35	#define CNIC_PAGE_MASK (~((CNIC_PAGE_SIZE) - 1))
	36
a4636960 MC	37	struct kwqe {
	38	u32 kwqe_op_flag;
	39
e1928c86	40	#define KWQE_QID_SHIFT 8
a4636960 MC	41	#define KWQE_OPCODE_MASK 0x00ff0000
a4636960 MC	42	#define KWQE_OPCODE_SHIFT 16
a4636960	43	#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
e1928c86 MC	44	#define KWQE_LAYER_MASK 0x70000000
	45	#define KWQE_LAYER_SHIFT 28
	46	#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
	47	#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
	48	#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
	49	#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
	50	#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
	51	#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
a4636960 MC	52
	53	u32 kwqe_info0;
	54	u32 kwqe_info1;
	55	u32 kwqe_info2;
	56	u32 kwqe_info3;
	57	u32 kwqe_info4;
	58	u32 kwqe_info5;
	59	u32 kwqe_info6;
	60	};
	61
	62	struct kwqe_16 {
	63	u32 kwqe_info0;
	64	u32 kwqe_info1;
	65	u32 kwqe_info2;
	66	u32 kwqe_info3;
	67	};
	68
	69	struct kcqe {
	70	u32 kcqe_info0;
	71	u32 kcqe_info1;
	72	u32 kcqe_info2;
	73	u32 kcqe_info3;
	74	u32 kcqe_info4;
	75	u32 kcqe_info5;
	76	u32 kcqe_info6;
	77	u32 kcqe_op_flag;
	78	#define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
	79	#define KCQE_FLAGS_LAYER_MASK (0x7<<28)
	80	#define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
	81	#define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
	82	#define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
	83	#define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
	84	#define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
	85	#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
e1928c86	86	#define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
a4636960 MC	87	#define KCQE_FLAGS_NEXT (1<<31)
	88	#define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
	89	#define KCQE_FLAGS_OPCODE_SHIFT (16)
	90	#define KCQE_OPCODE(op) \
	91	(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
	92	};
	93
	94	#define MAX_CNIC_CTL_DATA 64
	95	#define MAX_DRV_CTL_DATA 64
	96
	97	#define CNIC_CTL_STOP_CMD 1
	98	#define CNIC_CTL_START_CMD 2
	99	#define CNIC_CTL_COMPLETION_CMD 3
fab0dc89	100	#define CNIC_CTL_STOP_ISCSI_CMD 4
1d187b34 BW	101	#define CNIC_CTL_FCOE_STATS_GET_CMD 5
1d187b34 BW	102	#define CNIC_CTL_ISCSI_STATS_GET_CMD 6
a4636960 MC	103
	104	#define DRV_CTL_IO_WR_CMD 0x101
	105	#define DRV_CTL_IO_RD_CMD 0x102
	106	#define DRV_CTL_CTX_WR_CMD 0x103
	107	#define DRV_CTL_CTXTBL_WR_CMD 0x104
c2bff63f	108	#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
993ac7b5 MC	109	#define DRV_CTL_START_L2_CMD 0x106
993ac7b5 MC	110	#define DRV_CTL_STOP_L2_CMD 0x107
c2bff63f	111	#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
fab0dc89	112	#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
1d187b34 BW	113	#define DRV_CTL_ULP_REGISTER_CMD 0x10e
1d187b34 BW	114	#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f
a4636960 MC	115
	116	struct cnic_ctl_completion {
	117	u32 cid;
619c5cb6 VZ	118	u8 opcode;
619c5cb6 VZ	119	u8 error;
a4636960 MC	120	};
a4636960 MC	121
a4636960 MC	122	struct cnic_ctl_info {
	123	int cmd;
	124	union {
	125	struct cnic_ctl_completion comp;
	126	char bytes[MAX_CNIC_CTL_DATA];
	127	} data;
	128	};
	129
c2bff63f DK	130	struct drv_ctl_spq_credit {
	131	u32 credit_count;
	132	};
	133
a4636960 MC	134	struct drv_ctl_io {
	135	u32 cid_addr;
	136	u32 offset;
	137	u32 data;
	138	dma_addr_t dma_addr;
	139	};
	140
993ac7b5 MC	141	struct drv_ctl_l2_ring {
	142	u32 client_id;
	143	u32 cid;
	144	};
	145
2e499d3c BW	146	struct drv_ctl_register_data {
	147	int ulp_type;
	148	struct fcoe_capabilities fcoe_features;
	149	};
	150
a4636960 MC	151	struct drv_ctl_info {
	152	int cmd;
	153	union {
c2bff63f	154	struct drv_ctl_spq_credit credit;
a4636960	155	struct drv_ctl_io io;
993ac7b5	156	struct drv_ctl_l2_ring ring;
1d187b34	157	int ulp_type;
2e499d3c	158	struct drv_ctl_register_data register_data;
a4636960 MC	159	char bytes[MAX_DRV_CTL_DATA];
	160	} data;
	161	};
	162
	163	struct cnic_ops {
	164	struct module *cnic_owner;
	165	/* Calls to these functions are protected by RCU. When
	166	* unregistering, we wait for any calls to complete before
	167	* continuing.
	168	*/
	169	int (cnic_handler)(void , void *);
	170	int (cnic_ctl)(void , struct cnic_ctl_info *);
	171	};
	172
	173	#define MAX_CNIC_VEC 8
	174
	175	struct cnic_irq {
	176	unsigned int vector;
	177	void *status_blk;
	178	u32 status_blk_num;
523224a3	179	u32 status_blk_num2;
a4636960 MC	180	u32 irq_flags;
	181	#define CNIC_IRQ_FL_MSIX 0x00000001
	182	};
	183
	184	struct cnic_eth_dev {
	185	struct module *drv_owner;
	186	u32 drv_state;
	187	#define CNIC_DRV_STATE_REGD 0x00000001
	188	#define CNIC_DRV_STATE_USING_MSIX 0x00000002
2ba45142 VZ	189	#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
	190	#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
	191	#define CNIC_DRV_STATE_NO_FCOE 0x00000010
ad9b4359	192	#define CNIC_DRV_STATE_HANDLES_IRQ 0x00000020
a4636960 MC	193	u32 chip_id;
	194	u32 max_kwqe_pending;
	195	struct pci_dev *pdev;
	196	void __iomem *io_base;
993ac7b5	197	void __iomem *io_base2;
619c5cb6	198	const void *iro_arr;
a4636960 MC	199
	200	u32 ctx_tbl_offset;
	201	u32 ctx_tbl_len;
	202	int ctx_blk_size;
	203	u32 starting_cid;
	204	u32 max_iscsi_conn;
	205	u32 max_fcoe_conn;
	206	u32 max_rdma_conn;
c2bff63f	207	u32 fcoe_init_cid;
0eb43b4b	208	u32 max_fcoe_exchanges;
bf61ee14 VZ	209	u32 fcoe_wwn_port_name_hi;
	210	u32 fcoe_wwn_port_name_lo;
	211	u32 fcoe_wwn_node_name_hi;
	212	u32 fcoe_wwn_node_name_lo;
	213
c2bff63f DK	214	u16 iscsi_l2_client_id;
c2bff63f DK	215	u16 iscsi_l2_cid;
2ba45142	216	u8 iscsi_mac[ETH_ALEN];
a4636960 MC	217
	218	int num_irq;
	219	struct cnic_irq irq_arr[MAX_CNIC_VEC];
	220	int (drv_register_cnic)(struct net_device ,
	221	struct cnic_ops , void );
	222	int (drv_unregister_cnic)(struct net_device );
	223	int (drv_submit_kwqes_32)(struct net_device ,
	224	struct kwqe *[], u32);
	225	int (drv_submit_kwqes_16)(struct net_device ,
	226	struct kwqe_16 *[], u32);
	227	int (drv_ctl)(struct net_device , struct drv_ctl_info *);
	228	unsigned long reserved1[2];
1d187b34	229	union drv_info_to_mcp *addr_drv_info_to_mcp;
a4636960 MC	230	};
	231
	232	struct cnic_sockaddr {
	233	union {
	234	struct sockaddr_in v4;
	235	struct sockaddr_in6 v6;
	236	} local;
	237	union {
	238	struct sockaddr_in v4;
	239	struct sockaddr_in6 v6;
	240	} remote;
	241	};
	242
	243	struct cnic_sock {
	244	struct cnic_dev *dev;
	245	void *context;
	246	u32 src_ip[4];
	247	u32 dst_ip[4];
	248	u16 src_port;
	249	u16 dst_port;
	250	u16 vlan_id;
1409a932 JP	251	unsigned char old_ha[ETH_ALEN];
1409a932 JP	252	unsigned char ha[ETH_ALEN];
a4636960 MC	253	u32 mtu;
	254	u32 cid;
	255	u32 l5_cid;
	256	u32 pg_cid;
	257	int ulp_type;
	258
	259	u32 ka_timeout;
	260	u32 ka_interval;
	261	u8 ka_max_probe_count;
	262	u8 tos;
	263	u8 ttl;
	264	u8 snd_seq_scale;
	265	u32 rcv_buf;
	266	u32 snd_buf;
	267	u32 seed;
	268
	269	unsigned long tcp_flags;
	270	#define SK_TCP_NO_DELAY_ACK 0x1
	271	#define SK_TCP_KEEP_ALIVE 0x2
	272	#define SK_TCP_NAGLE 0x4
	273	#define SK_TCP_TIMESTAMP 0x8
	274	#define SK_TCP_SACK 0x10
	275	#define SK_TCP_SEG_SCALING 0x20
	276	unsigned long flags;
	277	#define SK_F_INUSE 0
	278	#define SK_F_OFFLD_COMPLETE 1
	279	#define SK_F_OFFLD_SCHED 2
	280	#define SK_F_PG_OFFLD_COMPLETE 3
	281	#define SK_F_CONNECT_START 4
	282	#define SK_F_IPV6 5
	283	#define SK_F_CLOSING 7
23021c21	284	#define SK_F_HW_ERR 8
a4636960 MC	285
	286	atomic_t ref_count;
	287	u32 state;
	288	struct kwqe kwqe1;
	289	struct kwqe kwqe2;
	290	struct kwqe kwqe3;
	291	};
	292
	293	struct cnic_dev {
	294	struct net_device *netdev;
	295	struct pci_dev *pcidev;
	296	void __iomem *regview;
	297	struct list_head list;
	298
	299	int (register_device)(struct cnic_dev dev, int ulp_type,
	300	void *ulp_ctx);
	301	int (unregister_device)(struct cnic_dev dev, int ulp_type);
	302	int (submit_kwqes)(struct cnic_dev dev, struct kwqe *wqes[],
	303	u32 num_wqes);
	304	int (submit_kwqes_16)(struct cnic_dev dev, struct kwqe_16 *wqes[],
	305	u32 num_wqes);
	306
	307	int (cm_create)(struct cnic_dev , int, u32, u32, struct cnic_sock **,
	308	void *);
	309	int (cm_destroy)(struct cnic_sock );
	310	int (cm_connect)(struct cnic_sock , struct cnic_sockaddr *);
	311	int (cm_abort)(struct cnic_sock );
	312	int (cm_close)(struct cnic_sock );
	313	struct cnic_dev (cm_select_dev)(struct sockaddr_in *, int ulp_type);
	314	int (iscsi_nl_msg_recv)(struct cnic_dev dev, u32 msg_type,
	315	char *data, u16 data_size);
	316	unsigned long flags;
	317	#define CNIC_F_CNIC_UP 1
	318	#define CNIC_F_BNX2_CLASS 3
	319	#define CNIC_F_BNX2X_CLASS 4
	320	atomic_t ref_count;
1409a932	321	u8 mac_addr[ETH_ALEN];
a4636960 MC	322
	323	int max_iscsi_conn;
	324	int max_fcoe_conn;
	325	int max_rdma_conn;
	326
0eb43b4b BPG	327	int max_fcoe_exchanges;
0eb43b4b BPG	328
1d187b34	329	union drv_info_to_mcp *stats_addr;
2e499d3c	330	struct fcoe_capabilities *fcoe_cap;
1d187b34	331
a4636960 MC	332	void *cnic_priv;
	333	};
	334
	335	#define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
	336	#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
	337	#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
	338	#define CNIC_RD(dev, off) readl(dev->regview + off)
	339	#define CNIC_RD16(dev, off) readw(dev->regview + off)
	340
	341	struct cnic_ulp_ops {
	342	/* Calls to these functions are protected by RCU. When
	343	* unregistering, we wait for any calls to complete before
	344	* continuing.
	345	*/
	346
	347	void (cnic_init)(struct cnic_dev dev);
	348	void (cnic_exit)(struct cnic_dev dev);
	349	void (cnic_start)(void ulp_ctx);
	350	void (cnic_stop)(void ulp_ctx);
	351	void (indicate_kcqes)(void ulp_ctx, struct kcqe *cqes[],
	352	u32 num_cqes);
415199f2	353	void (indicate_netevent)(void ulp_ctx, unsigned long event, u16 vid);
a4636960 MC	354	void (cm_connect_complete)(struct cnic_sock );
	355	void (cm_close_complete)(struct cnic_sock );
	356	void (cm_abort_complete)(struct cnic_sock );
	357	void (cm_remote_close)(struct cnic_sock );
	358	void (cm_remote_abort)(struct cnic_sock );
939b82e5	359	int (iscsi_nl_send_msg)(void ulp_ctx, u32 msg_type,
a4636960	360	char *data, u16 data_size);
1d187b34	361	int (cnic_get_stats)(void ulp_ctx);
a4636960	362	struct module *owner;
7fc1ece4	363	atomic_t ref_count;
a4636960 MC	364	};
a4636960 MC	365
1ee1725b	366	int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
a4636960	367
1ee1725b	368	int cnic_unregister_driver(int ulp_type);
a4636960 MC	369
a4636960 MC	370	#endif