[deliverable/linux.git] / drivers / net / ethernet / broadcom / cnic_if.h

/* cnic_if.h: Broadcom CNIC core network driver.
 *
 * Copyright (c) 2006-2012 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation.
 *
 */


#ifndef CNIC_IF_H
#define CNIC_IF_H

#include "bnx2x/bnx2x_mfw_req.h"

#define CNIC_MODULE_VERSION	"2.5.14"
#define CNIC_MODULE_RELDATE	"Sep 30, 2012"

#define CNIC_ULP_RDMA		0
#define CNIC_ULP_ISCSI		1
#define CNIC_ULP_FCOE		2
#define CNIC_ULP_L4		3
#define MAX_CNIC_ULP_TYPE_EXT	3
#define MAX_CNIC_ULP_TYPE	4

struct kwqe {
	u32 kwqe_op_flag;

#define KWQE_QID_SHIFT		8
#define KWQE_OPCODE_MASK	0x00ff0000
#define KWQE_OPCODE_SHIFT	16
#define KWQE_OPCODE(x)		((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
#define KWQE_LAYER_MASK			0x70000000
#define KWQE_LAYER_SHIFT		28
#define KWQE_FLAGS_LAYER_MASK_L2	(2<<28)
#define KWQE_FLAGS_LAYER_MASK_L3	(3<<28)
#define KWQE_FLAGS_LAYER_MASK_L4	(4<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
#define KWQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)

	u32 kwqe_info0;
	u32 kwqe_info1;
	u32 kwqe_info2;
	u32 kwqe_info3;
	u32 kwqe_info4;
	u32 kwqe_info5;
	u32 kwqe_info6;
};

struct kwqe_16 {
	u32 kwqe_info0;
	u32 kwqe_info1;
	u32 kwqe_info2;
	u32 kwqe_info3;
};

struct kcqe {
	u32 kcqe_info0;
	u32 kcqe_info1;
	u32 kcqe_info2;
	u32 kcqe_info3;
	u32 kcqe_info4;
	u32 kcqe_info5;
	u32 kcqe_info6;
	u32 kcqe_op_flag;
		#define KCQE_RAMROD_COMPLETION		(0x1<<27) /* Everest */
		#define KCQE_FLAGS_LAYER_MASK		(0x7<<28)
		#define KCQE_FLAGS_LAYER_MASK_MISC	(0<<28)
		#define KCQE_FLAGS_LAYER_MASK_L2	(2<<28)
		#define KCQE_FLAGS_LAYER_MASK_L3	(3<<28)
		#define KCQE_FLAGS_LAYER_MASK_L4	(4<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_RDMA	(5<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI	(6<<28)
		#define KCQE_FLAGS_LAYER_MASK_L5_FCOE	(7<<28)
		#define KCQE_FLAGS_NEXT 		(1<<31)
		#define KCQE_FLAGS_OPCODE_MASK		(0xff<<16)
		#define KCQE_FLAGS_OPCODE_SHIFT		(16)
		#define KCQE_OPCODE(op)			\
		(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
};

#define MAX_CNIC_CTL_DATA	64
#define MAX_DRV_CTL_DATA	64

#define CNIC_CTL_STOP_CMD		1
#define CNIC_CTL_START_CMD		2
#define CNIC_CTL_COMPLETION_CMD		3
#define CNIC_CTL_STOP_ISCSI_CMD		4
#define CNIC_CTL_FCOE_STATS_GET_CMD	5
#define CNIC_CTL_ISCSI_STATS_GET_CMD	6

#define DRV_CTL_IO_WR_CMD		0x101
#define DRV_CTL_IO_RD_CMD		0x102
#define DRV_CTL_CTX_WR_CMD		0x103
#define DRV_CTL_CTXTBL_WR_CMD		0x104
#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD	0x105
#define DRV_CTL_START_L2_CMD		0x106
#define DRV_CTL_STOP_L2_CMD		0x107
#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD	0x10c
#define DRV_CTL_ISCSI_STOPPED_CMD	0x10d
#define DRV_CTL_ULP_REGISTER_CMD	0x10e
#define DRV_CTL_ULP_UNREGISTER_CMD	0x10f

struct cnic_ctl_completion {
	u32	cid;
	u8	opcode;
	u8	error;
};

struct cnic_ctl_info {
	int	cmd;
	union {
		struct cnic_ctl_completion comp;
		char bytes[MAX_CNIC_CTL_DATA];
	} data;
};

struct drv_ctl_spq_credit {
	u32	credit_count;
};

struct drv_ctl_io {
	u32		cid_addr;
	u32		offset;
	u32		data;
	dma_addr_t	dma_addr;
};

struct drv_ctl_l2_ring {
	u32		client_id;
	u32		cid;
};

struct drv_ctl_register_data {
	int ulp_type;
	struct fcoe_capabilities fcoe_features;
};

struct drv_ctl_info {
	int	cmd;
	union {
		struct drv_ctl_spq_credit credit;
		struct drv_ctl_io io;
		struct drv_ctl_l2_ring ring;
		int ulp_type;
		struct drv_ctl_register_data register_data;
		char bytes[MAX_DRV_CTL_DATA];
	} data;
};

struct cnic_ops {
	struct module	*cnic_owner;
	/* Calls to these functions are protected by RCU.  When
	 * unregistering, we wait for any calls to complete before
	 * continuing.
	 */
	int		(*cnic_handler)(void *, void *);
	int		(*cnic_ctl)(void *, struct cnic_ctl_info *);
};

#define MAX_CNIC_VEC	8

struct cnic_irq {
	unsigned int	vector;
	void		*status_blk;
	u32		status_blk_num;
	u32		status_blk_num2;
	u32		irq_flags;
#define CNIC_IRQ_FL_MSIX		0x00000001
};

struct cnic_eth_dev {
	struct module	*drv_owner;
	u32		drv_state;
#define CNIC_DRV_STATE_REGD		0x00000001
#define CNIC_DRV_STATE_USING_MSIX	0x00000002
#define CNIC_DRV_STATE_NO_ISCSI_OOO	0x00000004
#define CNIC_DRV_STATE_NO_ISCSI		0x00000008
#define CNIC_DRV_STATE_NO_FCOE		0x00000010
	u32		chip_id;
	u32		max_kwqe_pending;
	struct pci_dev	*pdev;
	void __iomem	*io_base;
	void __iomem	*io_base2;
	const void	*iro_arr;

	u32		ctx_tbl_offset;
	u32		ctx_tbl_len;
	int		ctx_blk_size;
	u32		starting_cid;
	u32		max_iscsi_conn;
	u32		max_fcoe_conn;
	u32		max_rdma_conn;
	u32		fcoe_init_cid;
	u32		fcoe_wwn_port_name_hi;
	u32		fcoe_wwn_port_name_lo;
	u32		fcoe_wwn_node_name_hi;
	u32		fcoe_wwn_node_name_lo;

	u16		iscsi_l2_client_id;
	u16		iscsi_l2_cid;
	u8		iscsi_mac[ETH_ALEN];

	int		num_irq;
	struct cnic_irq	irq_arr[MAX_CNIC_VEC];
	int		(*drv_register_cnic)(struct net_device *,
					     struct cnic_ops *, void *);
	int		(*drv_unregister_cnic)(struct net_device *);
	int		(*drv_submit_kwqes_32)(struct net_device *,
					       struct kwqe *[], u32);
	int		(*drv_submit_kwqes_16)(struct net_device *,
					       struct kwqe_16 *[], u32);
	int		(*drv_ctl)(struct net_device *, struct drv_ctl_info *);
	unsigned long	reserved1[2];
	union drv_info_to_mcp	*addr_drv_info_to_mcp;
};

struct cnic_sockaddr {
	union {
		struct sockaddr_in	v4;
		struct sockaddr_in6	v6;
	} local;
	union {
		struct sockaddr_in	v4;
		struct sockaddr_in6	v6;
	} remote;
};

struct cnic_sock {
	struct cnic_dev *dev;
	void	*context;
	u32	src_ip[4];
	u32	dst_ip[4];
	u16	src_port;
	u16	dst_port;
	u16	vlan_id;
	unsigned char old_ha[6];
	unsigned char ha[6];
	u32	mtu;
	u32	cid;
	u32	l5_cid;
	u32	pg_cid;
	int	ulp_type;

	u32	ka_timeout;
	u32	ka_interval;
	u8	ka_max_probe_count;
	u8	tos;
	u8	ttl;
	u8	snd_seq_scale;
	u32	rcv_buf;
	u32	snd_buf;
	u32	seed;

	unsigned long	tcp_flags;
#define SK_TCP_NO_DELAY_ACK	0x1
#define SK_TCP_KEEP_ALIVE	0x2
#define SK_TCP_NAGLE		0x4
#define SK_TCP_TIMESTAMP	0x8
#define SK_TCP_SACK		0x10
#define SK_TCP_SEG_SCALING	0x20
	unsigned long	flags;
#define SK_F_INUSE		0
#define SK_F_OFFLD_COMPLETE	1
#define SK_F_OFFLD_SCHED	2
#define SK_F_PG_OFFLD_COMPLETE	3
#define SK_F_CONNECT_START	4
#define SK_F_IPV6		5
#define SK_F_CLOSING		7
#define SK_F_HW_ERR		8

	atomic_t ref_count;
	u32 state;
	struct kwqe kwqe1;
	struct kwqe kwqe2;
	struct kwqe kwqe3;
};

struct cnic_dev {
	struct net_device	*netdev;
	struct pci_dev		*pcidev;
	void __iomem		*regview;
	struct list_head	list;

	int (*register_device)(struct cnic_dev *dev, int ulp_type,
			       void *ulp_ctx);
	int (*unregister_device)(struct cnic_dev *dev, int ulp_type);
	int (*submit_kwqes)(struct cnic_dev *dev, struct kwqe *wqes[],
				u32 num_wqes);
	int (*submit_kwqes_16)(struct cnic_dev *dev, struct kwqe_16 *wqes[],
				u32 num_wqes);

	int (*cm_create)(struct cnic_dev *, int, u32, u32, struct cnic_sock **,
			 void *);
	int (*cm_destroy)(struct cnic_sock *);
	int (*cm_connect)(struct cnic_sock *, struct cnic_sockaddr *);
	int (*cm_abort)(struct cnic_sock *);
	int (*cm_close)(struct cnic_sock *);
	struct cnic_dev *(*cm_select_dev)(struct sockaddr_in *, int ulp_type);
	int (*iscsi_nl_msg_recv)(struct cnic_dev *dev, u32 msg_type,
				 char *data, u16 data_size);
	unsigned long	flags;
#define CNIC_F_CNIC_UP		1
#define CNIC_F_BNX2_CLASS	3
#define CNIC_F_BNX2X_CLASS	4
	atomic_t	ref_count;
	u8		mac_addr[6];

	int		max_iscsi_conn;
	int		max_fcoe_conn;
	int		max_rdma_conn;

	union drv_info_to_mcp	*stats_addr;
	struct fcoe_capabilities	*fcoe_cap;

	void		*cnic_priv;
};

#define CNIC_WR(dev, off, val)		writel(val, dev->regview + off)
#define CNIC_WR16(dev, off, val)	writew(val, dev->regview + off)
#define CNIC_WR8(dev, off, val)		writeb(val, dev->regview + off)
#define CNIC_RD(dev, off)		readl(dev->regview + off)
#define CNIC_RD16(dev, off)		readw(dev->regview + off)

struct cnic_ulp_ops {
	/* Calls to these functions are protected by RCU.  When
	 * unregistering, we wait for any calls to complete before
	 * continuing.
	 */

	void (*cnic_init)(struct cnic_dev *dev);
	void (*cnic_exit)(struct cnic_dev *dev);
	void (*cnic_start)(void *ulp_ctx);
	void (*cnic_stop)(void *ulp_ctx);
	void (*indicate_kcqes)(void *ulp_ctx, struct kcqe *cqes[],
				u32 num_cqes);
	void (*indicate_netevent)(void *ulp_ctx, unsigned long event, u16 vid);
	void (*cm_connect_complete)(struct cnic_sock *);
	void (*cm_close_complete)(struct cnic_sock *);
	void (*cm_abort_complete)(struct cnic_sock *);
	void (*cm_remote_close)(struct cnic_sock *);
	void (*cm_remote_abort)(struct cnic_sock *);
	int (*iscsi_nl_send_msg)(void *ulp_ctx, u32 msg_type,
				  char *data, u16 data_size);
	int (*cnic_get_stats)(void *ulp_ctx);
	struct module *owner;
	atomic_t ref_count;
};

extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);

extern int cnic_unregister_driver(int ulp_type);

extern struct cnic_eth_dev *bnx2_cnic_probe(struct net_device *dev);
extern struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev);

#endif
Commit	Line	Data
a4636960 MC	1	/* cnic_if.h: Broadcom CNIC core network driver.
a4636960 MC	2	*
23021c21	3	* Copyright (c) 2006-2012 Broadcom Corporation
a4636960 MC	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation.
	8	*
	9	*/
	10
	11
	12	#ifndef CNIC_IF_H
	13	#define CNIC_IF_H
	14
2e499d3c BW	15	#include "bnx2x/bnx2x_mfw_req.h"
2e499d3c BW	16
96bed4b9 YM	17	#define CNIC_MODULE_VERSION "2.5.14"
96bed4b9 YM	18	#define CNIC_MODULE_RELDATE "Sep 30, 2012"
a4636960 MC	19
	20	#define CNIC_ULP_RDMA 0
	21	#define CNIC_ULP_ISCSI 1
e1928c86 MC	22	#define CNIC_ULP_FCOE 2
	23	#define CNIC_ULP_L4 3
	24	#define MAX_CNIC_ULP_TYPE_EXT 3
	25	#define MAX_CNIC_ULP_TYPE 4
a4636960 MC	26
	27	struct kwqe {
	28	u32 kwqe_op_flag;
	29
e1928c86	30	#define KWQE_QID_SHIFT 8
a4636960 MC	31	#define KWQE_OPCODE_MASK 0x00ff0000
a4636960 MC	32	#define KWQE_OPCODE_SHIFT 16
a4636960	33	#define KWQE_OPCODE(x) ((x & KWQE_OPCODE_MASK) >> KWQE_OPCODE_SHIFT)
e1928c86 MC	34	#define KWQE_LAYER_MASK 0x70000000
	35	#define KWQE_LAYER_SHIFT 28
	36	#define KWQE_FLAGS_LAYER_MASK_L2 (2<<28)
	37	#define KWQE_FLAGS_LAYER_MASK_L3 (3<<28)
	38	#define KWQE_FLAGS_LAYER_MASK_L4 (4<<28)
	39	#define KWQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
	40	#define KWQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
	41	#define KWQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
a4636960 MC	42
	43	u32 kwqe_info0;
	44	u32 kwqe_info1;
	45	u32 kwqe_info2;
	46	u32 kwqe_info3;
	47	u32 kwqe_info4;
	48	u32 kwqe_info5;
	49	u32 kwqe_info6;
	50	};
	51
	52	struct kwqe_16 {
	53	u32 kwqe_info0;
	54	u32 kwqe_info1;
	55	u32 kwqe_info2;
	56	u32 kwqe_info3;
	57	};
	58
	59	struct kcqe {
	60	u32 kcqe_info0;
	61	u32 kcqe_info1;
	62	u32 kcqe_info2;
	63	u32 kcqe_info3;
	64	u32 kcqe_info4;
	65	u32 kcqe_info5;
	66	u32 kcqe_info6;
	67	u32 kcqe_op_flag;
	68	#define KCQE_RAMROD_COMPLETION (0x1<<27) /* Everest */
	69	#define KCQE_FLAGS_LAYER_MASK (0x7<<28)
	70	#define KCQE_FLAGS_LAYER_MASK_MISC (0<<28)
	71	#define KCQE_FLAGS_LAYER_MASK_L2 (2<<28)
	72	#define KCQE_FLAGS_LAYER_MASK_L3 (3<<28)
	73	#define KCQE_FLAGS_LAYER_MASK_L4 (4<<28)
	74	#define KCQE_FLAGS_LAYER_MASK_L5_RDMA (5<<28)
	75	#define KCQE_FLAGS_LAYER_MASK_L5_ISCSI (6<<28)
e1928c86	76	#define KCQE_FLAGS_LAYER_MASK_L5_FCOE (7<<28)
a4636960 MC	77	#define KCQE_FLAGS_NEXT (1<<31)
	78	#define KCQE_FLAGS_OPCODE_MASK (0xff<<16)
	79	#define KCQE_FLAGS_OPCODE_SHIFT (16)
	80	#define KCQE_OPCODE(op) \
	81	(((op) & KCQE_FLAGS_OPCODE_MASK) >> KCQE_FLAGS_OPCODE_SHIFT)
	82	};
	83
	84	#define MAX_CNIC_CTL_DATA 64
	85	#define MAX_DRV_CTL_DATA 64
	86
	87	#define CNIC_CTL_STOP_CMD 1
	88	#define CNIC_CTL_START_CMD 2
	89	#define CNIC_CTL_COMPLETION_CMD 3
fab0dc89	90	#define CNIC_CTL_STOP_ISCSI_CMD 4
1d187b34 BW	91	#define CNIC_CTL_FCOE_STATS_GET_CMD 5
1d187b34 BW	92	#define CNIC_CTL_ISCSI_STATS_GET_CMD 6
a4636960 MC	93
	94	#define DRV_CTL_IO_WR_CMD 0x101
	95	#define DRV_CTL_IO_RD_CMD 0x102
	96	#define DRV_CTL_CTX_WR_CMD 0x103
	97	#define DRV_CTL_CTXTBL_WR_CMD 0x104
c2bff63f	98	#define DRV_CTL_RET_L5_SPQ_CREDIT_CMD 0x105
993ac7b5 MC	99	#define DRV_CTL_START_L2_CMD 0x106
993ac7b5 MC	100	#define DRV_CTL_STOP_L2_CMD 0x107
c2bff63f	101	#define DRV_CTL_RET_L2_SPQ_CREDIT_CMD 0x10c
fab0dc89	102	#define DRV_CTL_ISCSI_STOPPED_CMD 0x10d
1d187b34 BW	103	#define DRV_CTL_ULP_REGISTER_CMD 0x10e
1d187b34 BW	104	#define DRV_CTL_ULP_UNREGISTER_CMD 0x10f
a4636960 MC	105
	106	struct cnic_ctl_completion {
	107	u32 cid;
619c5cb6 VZ	108	u8 opcode;
619c5cb6 VZ	109	u8 error;
a4636960 MC	110	};
a4636960 MC	111
a4636960 MC	112	struct cnic_ctl_info {
	113	int cmd;
	114	union {
	115	struct cnic_ctl_completion comp;
	116	char bytes[MAX_CNIC_CTL_DATA];
	117	} data;
	118	};
	119
c2bff63f DK	120	struct drv_ctl_spq_credit {
	121	u32 credit_count;
	122	};
	123
a4636960 MC	124	struct drv_ctl_io {
	125	u32 cid_addr;
	126	u32 offset;
	127	u32 data;
	128	dma_addr_t dma_addr;
	129	};
	130
993ac7b5 MC	131	struct drv_ctl_l2_ring {
	132	u32 client_id;
	133	u32 cid;
	134	};
	135
2e499d3c BW	136	struct drv_ctl_register_data {
	137	int ulp_type;
	138	struct fcoe_capabilities fcoe_features;
	139	};
	140
a4636960 MC	141	struct drv_ctl_info {
	142	int cmd;
	143	union {
c2bff63f	144	struct drv_ctl_spq_credit credit;
a4636960	145	struct drv_ctl_io io;
993ac7b5	146	struct drv_ctl_l2_ring ring;
1d187b34	147	int ulp_type;
2e499d3c	148	struct drv_ctl_register_data register_data;
a4636960 MC	149	char bytes[MAX_DRV_CTL_DATA];
	150	} data;
	151	};
	152
	153	struct cnic_ops {
	154	struct module *cnic_owner;
	155	/* Calls to these functions are protected by RCU. When
	156	* unregistering, we wait for any calls to complete before
	157	* continuing.
	158	*/
	159	int (cnic_handler)(void , void *);
	160	int (cnic_ctl)(void , struct cnic_ctl_info *);
	161	};
	162
	163	#define MAX_CNIC_VEC 8
	164
	165	struct cnic_irq {
	166	unsigned int vector;
	167	void *status_blk;
	168	u32 status_blk_num;
523224a3	169	u32 status_blk_num2;
a4636960 MC	170	u32 irq_flags;
	171	#define CNIC_IRQ_FL_MSIX 0x00000001
	172	};
	173
	174	struct cnic_eth_dev {
	175	struct module *drv_owner;
	176	u32 drv_state;
	177	#define CNIC_DRV_STATE_REGD 0x00000001
	178	#define CNIC_DRV_STATE_USING_MSIX 0x00000002
2ba45142 VZ	179	#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
	180	#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
	181	#define CNIC_DRV_STATE_NO_FCOE 0x00000010
a4636960 MC	182	u32 chip_id;
	183	u32 max_kwqe_pending;
	184	struct pci_dev *pdev;
	185	void __iomem *io_base;
993ac7b5	186	void __iomem *io_base2;
619c5cb6	187	const void *iro_arr;
a4636960 MC	188
	189	u32 ctx_tbl_offset;
	190	u32 ctx_tbl_len;
	191	int ctx_blk_size;
	192	u32 starting_cid;
	193	u32 max_iscsi_conn;
	194	u32 max_fcoe_conn;
	195	u32 max_rdma_conn;
c2bff63f	196	u32 fcoe_init_cid;
bf61ee14 VZ	197	u32 fcoe_wwn_port_name_hi;
	198	u32 fcoe_wwn_port_name_lo;
	199	u32 fcoe_wwn_node_name_hi;
	200	u32 fcoe_wwn_node_name_lo;
	201
c2bff63f DK	202	u16 iscsi_l2_client_id;
c2bff63f DK	203	u16 iscsi_l2_cid;
2ba45142	204	u8 iscsi_mac[ETH_ALEN];
a4636960 MC	205
	206	int num_irq;
	207	struct cnic_irq irq_arr[MAX_CNIC_VEC];
	208	int (drv_register_cnic)(struct net_device ,
	209	struct cnic_ops , void );
	210	int (drv_unregister_cnic)(struct net_device );
	211	int (drv_submit_kwqes_32)(struct net_device ,
	212	struct kwqe *[], u32);
	213	int (drv_submit_kwqes_16)(struct net_device ,
	214	struct kwqe_16 *[], u32);
	215	int (drv_ctl)(struct net_device , struct drv_ctl_info *);
	216	unsigned long reserved1[2];
1d187b34	217	union drv_info_to_mcp *addr_drv_info_to_mcp;
a4636960 MC	218	};
	219
	220	struct cnic_sockaddr {
	221	union {
	222	struct sockaddr_in v4;
	223	struct sockaddr_in6 v6;
	224	} local;
	225	union {
	226	struct sockaddr_in v4;
	227	struct sockaddr_in6 v6;
	228	} remote;
	229	};
	230
	231	struct cnic_sock {
	232	struct cnic_dev *dev;
	233	void *context;
	234	u32 src_ip[4];
	235	u32 dst_ip[4];
	236	u16 src_port;
	237	u16 dst_port;
	238	u16 vlan_id;
	239	unsigned char old_ha[6];
	240	unsigned char ha[6];
	241	u32 mtu;
	242	u32 cid;
	243	u32 l5_cid;
	244	u32 pg_cid;
	245	int ulp_type;
	246
	247	u32 ka_timeout;
	248	u32 ka_interval;
	249	u8 ka_max_probe_count;
	250	u8 tos;
	251	u8 ttl;
	252	u8 snd_seq_scale;
	253	u32 rcv_buf;
	254	u32 snd_buf;
	255	u32 seed;
	256
	257	unsigned long tcp_flags;
	258	#define SK_TCP_NO_DELAY_ACK 0x1
	259	#define SK_TCP_KEEP_ALIVE 0x2
	260	#define SK_TCP_NAGLE 0x4
	261	#define SK_TCP_TIMESTAMP 0x8
	262	#define SK_TCP_SACK 0x10
	263	#define SK_TCP_SEG_SCALING 0x20
	264	unsigned long flags;
	265	#define SK_F_INUSE 0
	266	#define SK_F_OFFLD_COMPLETE 1
	267	#define SK_F_OFFLD_SCHED 2
	268	#define SK_F_PG_OFFLD_COMPLETE 3
	269	#define SK_F_CONNECT_START 4
	270	#define SK_F_IPV6 5
	271	#define SK_F_CLOSING 7
23021c21	272	#define SK_F_HW_ERR 8
a4636960 MC	273
	274	atomic_t ref_count;
	275	u32 state;
	276	struct kwqe kwqe1;
	277	struct kwqe kwqe2;
	278	struct kwqe kwqe3;
	279	};
	280
	281	struct cnic_dev {
	282	struct net_device *netdev;
	283	struct pci_dev *pcidev;
	284	void __iomem *regview;
	285	struct list_head list;
	286
	287	int (register_device)(struct cnic_dev dev, int ulp_type,
	288	void *ulp_ctx);
	289	int (unregister_device)(struct cnic_dev dev, int ulp_type);
	290	int (submit_kwqes)(struct cnic_dev dev, struct kwqe *wqes[],
	291	u32 num_wqes);
	292	int (submit_kwqes_16)(struct cnic_dev dev, struct kwqe_16 *wqes[],
	293	u32 num_wqes);
	294
	295	int (cm_create)(struct cnic_dev , int, u32, u32, struct cnic_sock **,
	296	void *);
	297	int (cm_destroy)(struct cnic_sock );
	298	int (cm_connect)(struct cnic_sock , struct cnic_sockaddr *);
	299	int (cm_abort)(struct cnic_sock );
	300	int (cm_close)(struct cnic_sock );
	301	struct cnic_dev (cm_select_dev)(struct sockaddr_in *, int ulp_type);
	302	int (iscsi_nl_msg_recv)(struct cnic_dev dev, u32 msg_type,
	303	char *data, u16 data_size);
	304	unsigned long flags;
	305	#define CNIC_F_CNIC_UP 1
	306	#define CNIC_F_BNX2_CLASS 3
	307	#define CNIC_F_BNX2X_CLASS 4
	308	atomic_t ref_count;
	309	u8 mac_addr[6];
	310
	311	int max_iscsi_conn;
	312	int max_fcoe_conn;
	313	int max_rdma_conn;
	314
1d187b34	315	union drv_info_to_mcp *stats_addr;
2e499d3c	316	struct fcoe_capabilities *fcoe_cap;
1d187b34	317
a4636960 MC	318	void *cnic_priv;
	319	};
	320
	321	#define CNIC_WR(dev, off, val) writel(val, dev->regview + off)
	322	#define CNIC_WR16(dev, off, val) writew(val, dev->regview + off)
	323	#define CNIC_WR8(dev, off, val) writeb(val, dev->regview + off)
	324	#define CNIC_RD(dev, off) readl(dev->regview + off)
	325	#define CNIC_RD16(dev, off) readw(dev->regview + off)
	326
	327	struct cnic_ulp_ops {
	328	/* Calls to these functions are protected by RCU. When
	329	* unregistering, we wait for any calls to complete before
	330	* continuing.
	331	*/
	332
	333	void (cnic_init)(struct cnic_dev dev);
	334	void (cnic_exit)(struct cnic_dev dev);
	335	void (cnic_start)(void ulp_ctx);
	336	void (cnic_stop)(void ulp_ctx);
	337	void (indicate_kcqes)(void ulp_ctx, struct kcqe *cqes[],
	338	u32 num_cqes);
415199f2	339	void (indicate_netevent)(void ulp_ctx, unsigned long event, u16 vid);
a4636960 MC	340	void (cm_connect_complete)(struct cnic_sock );
	341	void (cm_close_complete)(struct cnic_sock );
	342	void (cm_abort_complete)(struct cnic_sock );
	343	void (cm_remote_close)(struct cnic_sock );
	344	void (cm_remote_abort)(struct cnic_sock );
939b82e5	345	int (iscsi_nl_send_msg)(void ulp_ctx, u32 msg_type,
a4636960	346	char *data, u16 data_size);
1d187b34	347	int (cnic_get_stats)(void ulp_ctx);
a4636960	348	struct module *owner;
7fc1ece4	349	atomic_t ref_count;
a4636960 MC	350	};
	351
	352	extern int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops);
	353
	354	extern int cnic_unregister_driver(int ulp_type);
	355
e2ee3616	356	extern struct cnic_eth_dev bnx2_cnic_probe(struct net_device dev);
993ac7b5	357	extern struct cnic_eth_dev bnx2x_cnic_probe(struct net_device dev);
e2ee3616	358
a4636960	359	#endif