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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | #ifndef __BNA_TYPES_H__ | |
19 | #define __BNA_TYPES_H__ | |
20 | ||
21 | #include "cna.h" | |
078086f3 | 22 | #include "bna_hw_defs.h" |
8b230ed8 | 23 | #include "bfa_cee.h" |
078086f3 | 24 | #include "bfa_msgq.h" |
8b230ed8 RM |
25 | |
26 | /** | |
27 | * | |
28 | * Forward declarations | |
29 | * | |
30 | */ | |
31 | ||
078086f3 | 32 | struct bna_mcam_handle; |
8b230ed8 RM |
33 | struct bna_txq; |
34 | struct bna_tx; | |
35 | struct bna_rxq; | |
36 | struct bna_cq; | |
37 | struct bna_rx; | |
38 | struct bna_rxf; | |
078086f3 | 39 | struct bna_enet; |
8b230ed8 RM |
40 | struct bna; |
41 | struct bnad; | |
42 | ||
43 | /** | |
44 | * | |
45 | * Enums, primitive data types | |
46 | * | |
47 | */ | |
48 | ||
49 | enum bna_status { | |
50 | BNA_STATUS_T_DISABLED = 0, | |
51 | BNA_STATUS_T_ENABLED = 1 | |
52 | }; | |
53 | ||
54 | enum bna_cleanup_type { | |
0120b99c RM |
55 | BNA_HARD_CLEANUP = 0, |
56 | BNA_SOFT_CLEANUP = 1 | |
8b230ed8 RM |
57 | }; |
58 | ||
59 | enum bna_cb_status { | |
0120b99c | 60 | BNA_CB_SUCCESS = 0, |
8b230ed8 RM |
61 | BNA_CB_FAIL = 1, |
62 | BNA_CB_INTERRUPT = 2, | |
63 | BNA_CB_BUSY = 3, | |
64 | BNA_CB_INVALID_MAC = 4, | |
65 | BNA_CB_MCAST_LIST_FULL = 5, | |
66 | BNA_CB_UCAST_CAM_FULL = 6, | |
67 | BNA_CB_WAITING = 7, | |
68 | BNA_CB_NOT_EXEC = 8 | |
69 | }; | |
70 | ||
71 | enum bna_res_type { | |
72 | BNA_RES_T_MEM = 1, | |
73 | BNA_RES_T_INTR = 2 | |
74 | }; | |
75 | ||
76 | enum bna_mem_type { | |
0120b99c RM |
77 | BNA_MEM_T_KVA = 1, |
78 | BNA_MEM_T_DMA = 2 | |
8b230ed8 RM |
79 | }; |
80 | ||
81 | enum bna_intr_type { | |
82 | BNA_INTR_T_INTX = 1, | |
83 | BNA_INTR_T_MSIX = 2 | |
84 | }; | |
85 | ||
86 | enum bna_res_req_type { | |
0120b99c RM |
87 | BNA_RES_MEM_T_COM = 0, |
88 | BNA_RES_MEM_T_ATTR = 1, | |
89 | BNA_RES_MEM_T_FWTRC = 2, | |
90 | BNA_RES_MEM_T_STATS = 3, | |
8b230ed8 RM |
91 | BNA_RES_T_MAX |
92 | }; | |
93 | ||
078086f3 RM |
94 | enum bna_mod_res_req_type { |
95 | BNA_MOD_RES_MEM_T_TX_ARRAY = 0, | |
96 | BNA_MOD_RES_MEM_T_TXQ_ARRAY = 1, | |
97 | BNA_MOD_RES_MEM_T_RX_ARRAY = 2, | |
98 | BNA_MOD_RES_MEM_T_RXP_ARRAY = 3, | |
99 | BNA_MOD_RES_MEM_T_RXQ_ARRAY = 4, | |
100 | BNA_MOD_RES_MEM_T_UCMAC_ARRAY = 5, | |
101 | BNA_MOD_RES_MEM_T_MCMAC_ARRAY = 6, | |
102 | BNA_MOD_RES_MEM_T_MCHANDLE_ARRAY = 7, | |
103 | BNA_MOD_RES_T_MAX | |
104 | }; | |
105 | ||
8b230ed8 RM |
106 | enum bna_tx_res_req_type { |
107 | BNA_TX_RES_MEM_T_TCB = 0, | |
108 | BNA_TX_RES_MEM_T_UNMAPQ = 1, | |
0120b99c | 109 | BNA_TX_RES_MEM_T_QPT = 2, |
8b230ed8 | 110 | BNA_TX_RES_MEM_T_SWQPT = 3, |
0120b99c | 111 | BNA_TX_RES_MEM_T_PAGE = 4, |
078086f3 RM |
112 | BNA_TX_RES_MEM_T_IBIDX = 5, |
113 | BNA_TX_RES_INTR_T_TXCMPL = 6, | |
8b230ed8 RM |
114 | BNA_TX_RES_T_MAX, |
115 | }; | |
116 | ||
117 | enum bna_rx_mem_type { | |
118 | BNA_RX_RES_MEM_T_CCB = 0, /* CQ context */ | |
119 | BNA_RX_RES_MEM_T_RCB = 1, /* CQ context */ | |
120 | BNA_RX_RES_MEM_T_UNMAPQ = 2, /* UnmapQ for RxQs */ | |
121 | BNA_RX_RES_MEM_T_CQPT = 3, /* CQ QPT */ | |
122 | BNA_RX_RES_MEM_T_CSWQPT = 4, /* S/W QPT */ | |
123 | BNA_RX_RES_MEM_T_CQPT_PAGE = 5, /* CQPT page */ | |
124 | BNA_RX_RES_MEM_T_HQPT = 6, /* RX QPT */ | |
125 | BNA_RX_RES_MEM_T_DQPT = 7, /* RX QPT */ | |
126 | BNA_RX_RES_MEM_T_HSWQPT = 8, /* RX s/w QPT */ | |
127 | BNA_RX_RES_MEM_T_DSWQPT = 9, /* RX s/w QPT */ | |
128 | BNA_RX_RES_MEM_T_DPAGE = 10, /* RX s/w QPT */ | |
129 | BNA_RX_RES_MEM_T_HPAGE = 11, /* RX s/w QPT */ | |
078086f3 RM |
130 | BNA_RX_RES_MEM_T_IBIDX = 12, |
131 | BNA_RX_RES_MEM_T_RIT = 13, | |
132 | BNA_RX_RES_T_INTR = 14, /* Rx interrupts */ | |
133 | BNA_RX_RES_T_MAX = 15 | |
8b230ed8 RM |
134 | }; |
135 | ||
8b230ed8 RM |
136 | enum bna_tx_type { |
137 | BNA_TX_T_REGULAR = 0, | |
138 | BNA_TX_T_LOOPBACK = 1, | |
139 | }; | |
140 | ||
141 | enum bna_tx_flags { | |
078086f3 | 142 | BNA_TX_F_ENET_STARTED = 1, |
8b230ed8 | 143 | BNA_TX_F_ENABLED = 2, |
078086f3 RM |
144 | BNA_TX_F_PRIO_CHANGED = 4, |
145 | BNA_TX_F_BW_UPDATED = 8, | |
8b230ed8 RM |
146 | }; |
147 | ||
148 | enum bna_tx_mod_flags { | |
078086f3 RM |
149 | BNA_TX_MOD_F_ENET_STARTED = 1, |
150 | BNA_TX_MOD_F_ENET_LOOPBACK = 2, | |
8b230ed8 RM |
151 | }; |
152 | ||
153 | enum bna_rx_type { | |
154 | BNA_RX_T_REGULAR = 0, | |
155 | BNA_RX_T_LOOPBACK = 1, | |
156 | }; | |
157 | ||
158 | enum bna_rxp_type { | |
0120b99c RM |
159 | BNA_RXP_SINGLE = 1, |
160 | BNA_RXP_SLR = 2, | |
161 | BNA_RXP_HDS = 3 | |
8b230ed8 RM |
162 | }; |
163 | ||
164 | enum bna_rxmode { | |
0120b99c | 165 | BNA_RXMODE_PROMISC = 1, |
078086f3 RM |
166 | BNA_RXMODE_DEFAULT = 2, |
167 | BNA_RXMODE_ALLMULTI = 4 | |
8b230ed8 RM |
168 | }; |
169 | ||
170 | enum bna_rx_event { | |
171 | RX_E_START = 1, | |
172 | RX_E_STOP = 2, | |
173 | RX_E_FAIL = 3, | |
078086f3 RM |
174 | RX_E_STARTED = 4, |
175 | RX_E_STOPPED = 5, | |
176 | RX_E_RXF_STARTED = 6, | |
177 | RX_E_RXF_STOPPED = 7, | |
178 | RX_E_CLEANUP_DONE = 8, | |
8b230ed8 RM |
179 | }; |
180 | ||
8b230ed8 | 181 | enum bna_rx_flags { |
078086f3 RM |
182 | BNA_RX_F_ENET_STARTED = 1, |
183 | BNA_RX_F_ENABLED = 2, | |
8b230ed8 RM |
184 | }; |
185 | ||
186 | enum bna_rx_mod_flags { | |
078086f3 RM |
187 | BNA_RX_MOD_F_ENET_STARTED = 1, |
188 | BNA_RX_MOD_F_ENET_LOOPBACK = 2, | |
8b230ed8 RM |
189 | }; |
190 | ||
8b230ed8 | 191 | enum bna_rxf_flags { |
078086f3 | 192 | BNA_RXF_F_PAUSED = 1, |
8b230ed8 RM |
193 | }; |
194 | ||
195 | enum bna_rxf_event { | |
196 | RXF_E_START = 1, | |
197 | RXF_E_STOP = 2, | |
198 | RXF_E_FAIL = 3, | |
078086f3 RM |
199 | RXF_E_CONFIG = 4, |
200 | RXF_E_PAUSE = 5, | |
201 | RXF_E_RESUME = 6, | |
202 | RXF_E_FW_RESP = 7, | |
8b230ed8 RM |
203 | }; |
204 | ||
078086f3 RM |
205 | enum bna_enet_type { |
206 | BNA_ENET_T_REGULAR = 0, | |
207 | BNA_ENET_T_LOOPBACK_INTERNAL = 1, | |
208 | BNA_ENET_T_LOOPBACK_EXTERNAL = 2, | |
209 | }; | |
210 | ||
8b230ed8 RM |
211 | enum bna_link_status { |
212 | BNA_LINK_DOWN = 0, | |
213 | BNA_LINK_UP = 1, | |
0120b99c | 214 | BNA_CEE_UP = 2 |
8b230ed8 RM |
215 | }; |
216 | ||
078086f3 RM |
217 | enum bna_ethport_flags { |
218 | BNA_ETHPORT_F_ADMIN_UP = 1, | |
219 | BNA_ETHPORT_F_PORT_ENABLED = 2, | |
220 | BNA_ETHPORT_F_RX_STARTED = 4, | |
221 | }; | |
222 | ||
078086f3 RM |
223 | enum bna_enet_flags { |
224 | BNA_ENET_F_IOCETH_READY = 1, | |
225 | BNA_ENET_F_ENABLED = 2, | |
226 | BNA_ENET_F_PAUSE_CHANGED = 4, | |
227 | BNA_ENET_F_MTU_CHANGED = 8 | |
228 | }; | |
229 | ||
230 | enum bna_rss_flags { | |
231 | BNA_RSS_F_RIT_PENDING = 1, | |
232 | BNA_RSS_F_CFG_PENDING = 2, | |
233 | BNA_RSS_F_STATUS_PENDING = 4, | |
234 | }; | |
235 | ||
236 | enum bna_mod_flags { | |
237 | BNA_MOD_F_INIT_DONE = 1, | |
238 | }; | |
239 | ||
8b230ed8 RM |
240 | enum bna_pkt_rates { |
241 | BNA_PKT_RATE_10K = 10000, | |
242 | BNA_PKT_RATE_20K = 20000, | |
243 | BNA_PKT_RATE_30K = 30000, | |
244 | BNA_PKT_RATE_40K = 40000, | |
245 | BNA_PKT_RATE_50K = 50000, | |
246 | BNA_PKT_RATE_60K = 60000, | |
247 | BNA_PKT_RATE_70K = 70000, | |
248 | BNA_PKT_RATE_80K = 80000, | |
249 | }; | |
250 | ||
251 | enum bna_dim_load_types { | |
252 | BNA_LOAD_T_HIGH_4 = 0, /* 80K <= r */ | |
253 | BNA_LOAD_T_HIGH_3 = 1, /* 60K <= r < 80K */ | |
254 | BNA_LOAD_T_HIGH_2 = 2, /* 50K <= r < 60K */ | |
255 | BNA_LOAD_T_HIGH_1 = 3, /* 40K <= r < 50K */ | |
256 | BNA_LOAD_T_LOW_1 = 4, /* 30K <= r < 40K */ | |
257 | BNA_LOAD_T_LOW_2 = 5, /* 20K <= r < 30K */ | |
258 | BNA_LOAD_T_LOW_3 = 6, /* 10K <= r < 20K */ | |
259 | BNA_LOAD_T_LOW_4 = 7, /* r < 10K */ | |
260 | BNA_LOAD_T_MAX = 8 | |
261 | }; | |
262 | ||
263 | enum bna_dim_bias_types { | |
264 | BNA_BIAS_T_SMALL = 0, /* small pkts > (large pkts * 2) */ | |
265 | BNA_BIAS_T_LARGE = 1, /* Not BNA_BIAS_T_SMALL */ | |
266 | BNA_BIAS_T_MAX = 2 | |
267 | }; | |
268 | ||
078086f3 RM |
269 | #define BNA_MAX_NAME_SIZE 64 |
270 | struct bna_ident { | |
271 | int id; | |
272 | char name[BNA_MAX_NAME_SIZE]; | |
273 | }; | |
274 | ||
8b230ed8 RM |
275 | struct bna_mac { |
276 | /* This should be the first one */ | |
277 | struct list_head qe; | |
278 | u8 addr[ETH_ALEN]; | |
078086f3 | 279 | struct bna_mcam_handle *handle; |
8b230ed8 RM |
280 | }; |
281 | ||
282 | struct bna_mem_descr { | |
283 | u32 len; | |
284 | void *kva; | |
285 | struct bna_dma_addr dma; | |
286 | }; | |
287 | ||
288 | struct bna_mem_info { | |
289 | enum bna_mem_type mem_type; | |
290 | u32 len; | |
0120b99c | 291 | u32 num; |
8b230ed8 RM |
292 | u32 align_sz; /* 0/1 = no alignment */ |
293 | struct bna_mem_descr *mdl; | |
294 | void *cookie; /* For bnad to unmap dma later */ | |
295 | }; | |
296 | ||
297 | struct bna_intr_descr { | |
298 | int vector; | |
299 | }; | |
300 | ||
301 | struct bna_intr_info { | |
302 | enum bna_intr_type intr_type; | |
303 | int num; | |
304 | struct bna_intr_descr *idl; | |
305 | }; | |
306 | ||
307 | union bna_res_u { | |
308 | struct bna_mem_info mem_info; | |
309 | struct bna_intr_info intr_info; | |
310 | }; | |
311 | ||
312 | struct bna_res_info { | |
313 | enum bna_res_type res_type; | |
314 | union bna_res_u res_u; | |
315 | }; | |
316 | ||
317 | /* HW QPT */ | |
318 | struct bna_qpt { | |
319 | struct bna_dma_addr hw_qpt_ptr; | |
320 | void *kv_qpt_ptr; | |
321 | u32 page_count; | |
322 | u32 page_size; | |
323 | }; | |
324 | ||
078086f3 | 325 | struct bna_attr { |
761fab37 | 326 | bool fw_query_complete; |
078086f3 RM |
327 | int num_txq; |
328 | int num_rxp; | |
329 | int num_ucmac; | |
330 | int num_mcmac; | |
331 | int max_rit_size; | |
332 | }; | |
333 | ||
8b230ed8 RM |
334 | /** |
335 | * | |
078086f3 | 336 | * IOCEth |
8b230ed8 RM |
337 | * |
338 | */ | |
339 | ||
078086f3 | 340 | struct bna_ioceth { |
8b230ed8 RM |
341 | bfa_fsm_t fsm; |
342 | struct bfa_ioc ioc; | |
343 | ||
078086f3 RM |
344 | struct bna_attr attr; |
345 | struct bfa_msgq_cmd_entry msgq_cmd; | |
346 | struct bfi_enet_attr_req attr_req; | |
8b230ed8 | 347 | |
078086f3 | 348 | void (*stop_cbfn)(struct bnad *bnad); |
8b230ed8 RM |
349 | struct bnad *stop_cbarg; |
350 | ||
351 | struct bna *bna; | |
352 | }; | |
353 | ||
354 | /** | |
355 | * | |
f6d46a2e | 356 | * Enet |
8b230ed8 RM |
357 | * |
358 | */ | |
359 | ||
360 | /* Pause configuration */ | |
361 | struct bna_pause_config { | |
362 | enum bna_status tx_pause; | |
363 | enum bna_status rx_pause; | |
364 | }; | |
365 | ||
078086f3 RM |
366 | struct bna_enet { |
367 | bfa_fsm_t fsm; | |
368 | enum bna_enet_flags flags; | |
369 | ||
370 | enum bna_enet_type type; | |
371 | ||
372 | struct bna_pause_config pause_config; | |
373 | int mtu; | |
374 | ||
375 | /* Callback for bna_enet_disable(), enet_stop() */ | |
376 | void (*stop_cbfn)(void *); | |
377 | void *stop_cbarg; | |
378 | ||
379 | /* Callback for bna_enet_pause_config() */ | |
380 | void (*pause_cbfn)(struct bnad *); | |
381 | ||
382 | /* Callback for bna_enet_mtu_set() */ | |
383 | void (*mtu_cbfn)(struct bnad *); | |
384 | ||
385 | struct bfa_wc chld_stop_wc; | |
386 | ||
387 | struct bfa_msgq_cmd_entry msgq_cmd; | |
388 | struct bfi_enet_set_pause_req pause_req; | |
389 | ||
390 | struct bna *bna; | |
391 | }; | |
392 | ||
393 | /** | |
394 | * | |
395 | * Ethport | |
396 | * | |
397 | */ | |
398 | ||
399 | struct bna_ethport { | |
400 | bfa_fsm_t fsm; | |
401 | enum bna_ethport_flags flags; | |
402 | ||
403 | enum bna_link_status link_status; | |
404 | ||
405 | int rx_started_count; | |
406 | ||
407 | void (*stop_cbfn)(struct bna_enet *); | |
408 | ||
409 | void (*adminup_cbfn)(struct bnad *, enum bna_cb_status); | |
410 | ||
411 | void (*link_cbfn)(struct bnad *, enum bna_link_status); | |
412 | ||
413 | struct bfa_msgq_cmd_entry msgq_cmd; | |
414 | union { | |
415 | struct bfi_enet_enable_req admin_req; | |
416 | struct bfi_enet_diag_lb_req lpbk_req; | |
417 | } bfi_enet_cmd; | |
418 | ||
419 | struct bna *bna; | |
420 | }; | |
421 | ||
8b230ed8 RM |
422 | /** |
423 | * | |
424 | * Interrupt Block | |
425 | * | |
426 | */ | |
427 | ||
8b230ed8 RM |
428 | /* Doorbell structure */ |
429 | struct bna_ib_dbell { | |
430 | void *__iomem doorbell_addr; | |
431 | u32 doorbell_ack; | |
432 | }; | |
433 | ||
8b230ed8 RM |
434 | /* IB structure */ |
435 | struct bna_ib { | |
8b230ed8 RM |
436 | struct bna_dma_addr ib_seg_host_addr; |
437 | void *ib_seg_host_addr_kva; | |
8b230ed8 RM |
438 | |
439 | struct bna_ib_dbell door_bell; | |
440 | ||
078086f3 RM |
441 | enum bna_intr_type intr_type; |
442 | int intr_vector; | |
8b230ed8 | 443 | |
078086f3 | 444 | u8 coalescing_timeo; /* Unit is 5usec. */ |
8b230ed8 | 445 | |
078086f3 RM |
446 | int interpkt_count; |
447 | int interpkt_timeo; | |
8b230ed8 RM |
448 | }; |
449 | ||
450 | /** | |
451 | * | |
452 | * Tx object | |
453 | * | |
454 | */ | |
455 | ||
456 | /* Tx datapath control structure */ | |
457 | #define BNA_Q_NAME_SIZE 16 | |
458 | struct bna_tcb { | |
459 | /* Fast path */ | |
460 | void **sw_qpt; | |
461 | void *unmap_q; | |
462 | u32 producer_index; | |
463 | u32 consumer_index; | |
464 | volatile u32 *hw_consumer_index; | |
465 | u32 q_depth; | |
466 | void *__iomem q_dbell; | |
467 | struct bna_ib_dbell *i_dbell; | |
468 | int page_idx; | |
469 | int page_count; | |
470 | /* Control path */ | |
471 | struct bna_txq *txq; | |
472 | struct bnad *bnad; | |
078086f3 | 473 | void *priv; /* BNAD's cookie */ |
8b230ed8 RM |
474 | enum bna_intr_type intr_type; |
475 | int intr_vector; | |
476 | u8 priority; /* Current priority */ | |
477 | unsigned long flags; /* Used by bnad as required */ | |
478 | int id; | |
479 | char name[BNA_Q_NAME_SIZE]; | |
480 | }; | |
481 | ||
482 | /* TxQ QPT and configuration */ | |
483 | struct bna_txq { | |
484 | /* This should be the first one */ | |
485 | struct list_head qe; | |
486 | ||
8b230ed8 RM |
487 | u8 priority; |
488 | ||
489 | struct bna_qpt qpt; | |
490 | struct bna_tcb *tcb; | |
078086f3 | 491 | struct bna_ib ib; |
8b230ed8 RM |
492 | |
493 | struct bna_tx *tx; | |
494 | ||
078086f3 RM |
495 | int hw_id; |
496 | ||
0120b99c RM |
497 | u64 tx_packets; |
498 | u64 tx_bytes; | |
8b230ed8 RM |
499 | }; |
500 | ||
8b230ed8 RM |
501 | /* Tx object */ |
502 | struct bna_tx { | |
503 | /* This should be the first one */ | |
504 | struct list_head qe; | |
078086f3 RM |
505 | int rid; |
506 | int hw_id; | |
8b230ed8 RM |
507 | |
508 | bfa_fsm_t fsm; | |
509 | enum bna_tx_flags flags; | |
510 | ||
511 | enum bna_tx_type type; | |
078086f3 | 512 | int num_txq; |
8b230ed8 RM |
513 | |
514 | struct list_head txq_q; | |
078086f3 | 515 | u16 txf_vlan_id; |
8b230ed8 RM |
516 | |
517 | /* Tx event handlers */ | |
518 | void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); | |
519 | void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); | |
078086f3 RM |
520 | void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *); |
521 | void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *); | |
522 | void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *); | |
8b230ed8 RM |
523 | |
524 | /* callback for bna_tx_disable(), bna_tx_stop() */ | |
078086f3 | 525 | void (*stop_cbfn)(void *arg, struct bna_tx *tx); |
8b230ed8 RM |
526 | void *stop_cbarg; |
527 | ||
528 | /* callback for bna_tx_prio_set() */ | |
078086f3 | 529 | void (*prio_change_cbfn)(struct bnad *bnad, struct bna_tx *tx); |
8b230ed8 | 530 | |
078086f3 RM |
531 | struct bfa_msgq_cmd_entry msgq_cmd; |
532 | union { | |
533 | struct bfi_enet_tx_cfg_req cfg_req; | |
534 | struct bfi_enet_req req; | |
535 | struct bfi_enet_tx_cfg_rsp cfg_rsp; | |
536 | } bfi_enet_cmd; | |
8b230ed8 RM |
537 | |
538 | struct bna *bna; | |
539 | void *priv; /* bnad's cookie */ | |
540 | }; | |
541 | ||
078086f3 | 542 | /* Tx object configuration used during creation */ |
8b230ed8 RM |
543 | struct bna_tx_config { |
544 | int num_txq; | |
545 | int txq_depth; | |
078086f3 | 546 | int coalescing_timeo; |
8b230ed8 RM |
547 | enum bna_tx_type tx_type; |
548 | }; | |
549 | ||
550 | struct bna_tx_event_cbfn { | |
551 | /* Optional */ | |
552 | void (*tcb_setup_cbfn)(struct bnad *, struct bna_tcb *); | |
553 | void (*tcb_destroy_cbfn)(struct bnad *, struct bna_tcb *); | |
554 | /* Mandatory */ | |
078086f3 RM |
555 | void (*tx_stall_cbfn)(struct bnad *, struct bna_tx *); |
556 | void (*tx_resume_cbfn)(struct bnad *, struct bna_tx *); | |
557 | void (*tx_cleanup_cbfn)(struct bnad *, struct bna_tx *); | |
8b230ed8 RM |
558 | }; |
559 | ||
560 | /* Tx module - keeps track of free, active tx objects */ | |
561 | struct bna_tx_mod { | |
562 | struct bna_tx *tx; /* BFI_MAX_TXQ entries */ | |
563 | struct bna_txq *txq; /* BFI_MAX_TXQ entries */ | |
564 | ||
565 | struct list_head tx_free_q; | |
566 | struct list_head tx_active_q; | |
567 | ||
568 | struct list_head txq_free_q; | |
569 | ||
570 | /* callback for bna_tx_mod_stop() */ | |
078086f3 | 571 | void (*stop_cbfn)(struct bna_enet *enet); |
8b230ed8 RM |
572 | |
573 | struct bfa_wc tx_stop_wc; | |
574 | ||
575 | enum bna_tx_mod_flags flags; | |
576 | ||
078086f3 RM |
577 | u8 prio_map; |
578 | int default_prio; | |
579 | int iscsi_over_cee; | |
580 | int iscsi_prio; | |
581 | int prio_reconfigured; | |
8b230ed8 | 582 | |
078086f3 | 583 | u32 rid_mask; |
8b230ed8 RM |
584 | |
585 | struct bna *bna; | |
586 | }; | |
587 | ||
8b230ed8 RM |
588 | /** |
589 | * | |
590 | * Rx object | |
591 | * | |
592 | */ | |
593 | ||
594 | /* Rx datapath control structure */ | |
595 | struct bna_rcb { | |
596 | /* Fast path */ | |
597 | void **sw_qpt; | |
598 | void *unmap_q; | |
599 | u32 producer_index; | |
600 | u32 consumer_index; | |
601 | u32 q_depth; | |
602 | void *__iomem q_dbell; | |
603 | int page_idx; | |
604 | int page_count; | |
605 | /* Control path */ | |
606 | struct bna_rxq *rxq; | |
078086f3 | 607 | struct bna_ccb *ccb; |
8b230ed8 | 608 | struct bnad *bnad; |
078086f3 | 609 | void *priv; /* BNAD's cookie */ |
8b230ed8 RM |
610 | unsigned long flags; |
611 | int id; | |
612 | }; | |
613 | ||
614 | /* RxQ structure - QPT, configuration */ | |
615 | struct bna_rxq { | |
616 | struct list_head qe; | |
8b230ed8 RM |
617 | |
618 | int buffer_size; | |
619 | int q_depth; | |
620 | ||
621 | struct bna_qpt qpt; | |
622 | struct bna_rcb *rcb; | |
623 | ||
624 | struct bna_rxp *rxp; | |
625 | struct bna_rx *rx; | |
626 | ||
078086f3 RM |
627 | int hw_id; |
628 | ||
0120b99c | 629 | u64 rx_packets; |
8b230ed8 | 630 | u64 rx_bytes; |
0120b99c RM |
631 | u64 rx_packets_with_error; |
632 | u64 rxbuf_alloc_failed; | |
8b230ed8 RM |
633 | }; |
634 | ||
635 | /* RxQ pair */ | |
636 | union bna_rxq_u { | |
637 | struct { | |
638 | struct bna_rxq *hdr; | |
639 | struct bna_rxq *data; | |
640 | } hds; | |
641 | struct { | |
642 | struct bna_rxq *small; | |
643 | struct bna_rxq *large; | |
644 | } slr; | |
645 | struct { | |
646 | struct bna_rxq *only; | |
647 | struct bna_rxq *reserved; | |
648 | } single; | |
649 | }; | |
650 | ||
651 | /* Packet rate for Dynamic Interrupt Moderation */ | |
652 | struct bna_pkt_rate { | |
653 | u32 small_pkt_cnt; | |
654 | u32 large_pkt_cnt; | |
655 | }; | |
656 | ||
657 | /* Completion control structure */ | |
658 | struct bna_ccb { | |
659 | /* Fast path */ | |
660 | void **sw_qpt; | |
661 | u32 producer_index; | |
662 | volatile u32 *hw_producer_index; | |
663 | u32 q_depth; | |
664 | struct bna_ib_dbell *i_dbell; | |
665 | struct bna_rcb *rcb[2]; | |
666 | void *ctrl; /* For bnad */ | |
667 | struct bna_pkt_rate pkt_rate; | |
668 | int page_idx; | |
669 | int page_count; | |
670 | ||
671 | /* Control path */ | |
672 | struct bna_cq *cq; | |
673 | struct bnad *bnad; | |
078086f3 | 674 | void *priv; /* BNAD's cookie */ |
8b230ed8 RM |
675 | enum bna_intr_type intr_type; |
676 | int intr_vector; | |
677 | u8 rx_coalescing_timeo; /* For NAPI */ | |
678 | int id; | |
679 | char name[BNA_Q_NAME_SIZE]; | |
680 | }; | |
681 | ||
682 | /* CQ QPT, configuration */ | |
683 | struct bna_cq { | |
8b230ed8 RM |
684 | struct bna_qpt qpt; |
685 | struct bna_ccb *ccb; | |
686 | ||
078086f3 | 687 | struct bna_ib ib; |
8b230ed8 RM |
688 | |
689 | struct bna_rx *rx; | |
690 | }; | |
691 | ||
692 | struct bna_rss_config { | |
078086f3 | 693 | enum bfi_enet_rss_type hash_type; |
8b230ed8 | 694 | u8 hash_mask; |
078086f3 | 695 | u32 toeplitz_hash_key[BFI_ENET_RSS_KEY_LEN]; |
8b230ed8 RM |
696 | }; |
697 | ||
698 | struct bna_hds_config { | |
078086f3 RM |
699 | enum bfi_enet_hds_type hdr_type; |
700 | int forced_offset; | |
8b230ed8 RM |
701 | }; |
702 | ||
078086f3 | 703 | /* Rx object configuration used during creation */ |
8b230ed8 RM |
704 | struct bna_rx_config { |
705 | enum bna_rx_type rx_type; | |
706 | int num_paths; | |
707 | enum bna_rxp_type rxp_type; | |
708 | int paused; | |
709 | int q_depth; | |
078086f3 | 710 | int coalescing_timeo; |
8b230ed8 RM |
711 | /* |
712 | * Small/Large (or Header/Data) buffer size to be configured | |
713 | * for SLR and HDS queue type. Large buffer size comes from | |
078086f3 | 714 | * enet->mtu. |
8b230ed8 RM |
715 | */ |
716 | int small_buff_size; | |
717 | ||
718 | enum bna_status rss_status; | |
719 | struct bna_rss_config rss_config; | |
720 | ||
8b230ed8 RM |
721 | struct bna_hds_config hds_config; |
722 | ||
723 | enum bna_status vlan_strip_status; | |
724 | }; | |
725 | ||
726 | /* Rx Path structure - one per MSIX vector/CPU */ | |
727 | struct bna_rxp { | |
728 | /* This should be the first one */ | |
729 | struct list_head qe; | |
730 | ||
731 | enum bna_rxp_type type; | |
732 | union bna_rxq_u rxq; | |
733 | struct bna_cq cq; | |
734 | ||
735 | struct bna_rx *rx; | |
736 | ||
737 | /* MSI-x vector number for configuring RSS */ | |
738 | int vector; | |
078086f3 | 739 | int hw_id; |
8b230ed8 RM |
740 | }; |
741 | ||
742 | /* RxF structure (hardware Rx Function) */ | |
743 | struct bna_rxf { | |
744 | bfa_fsm_t fsm; | |
078086f3 RM |
745 | enum bna_rxf_flags flags; |
746 | ||
747 | struct bfa_msgq_cmd_entry msgq_cmd; | |
748 | union { | |
749 | struct bfi_enet_enable_req req; | |
750 | struct bfi_enet_rss_cfg_req rss_req; | |
751 | struct bfi_enet_rit_req rit_req; | |
752 | struct bfi_enet_rx_vlan_req vlan_req; | |
753 | struct bfi_enet_mcast_add_req mcast_add_req; | |
754 | struct bfi_enet_mcast_del_req mcast_del_req; | |
755 | struct bfi_enet_ucast_req ucast_req; | |
756 | } bfi_enet_cmd; | |
8b230ed8 RM |
757 | |
758 | /* callback for bna_rxf_start() */ | |
078086f3 | 759 | void (*start_cbfn) (struct bna_rx *rx); |
8b230ed8 RM |
760 | struct bna_rx *start_cbarg; |
761 | ||
762 | /* callback for bna_rxf_stop() */ | |
078086f3 | 763 | void (*stop_cbfn) (struct bna_rx *rx); |
8b230ed8 RM |
764 | struct bna_rx *stop_cbarg; |
765 | ||
078086f3 RM |
766 | /* callback for bna_rx_receive_pause() / bna_rx_receive_resume() */ |
767 | void (*oper_state_cbfn) (struct bnad *bnad, struct bna_rx *rx); | |
8b230ed8 RM |
768 | struct bnad *oper_state_cbarg; |
769 | ||
770 | /** | |
771 | * callback for: | |
772 | * bna_rxf_ucast_set() | |
773 | * bna_rxf_{ucast/mcast}_add(), | |
0120b99c | 774 | * bna_rxf_{ucast/mcast}_del(), |
8b230ed8 RM |
775 | * bna_rxf_mode_set() |
776 | */ | |
078086f3 | 777 | void (*cam_fltr_cbfn)(struct bnad *bnad, struct bna_rx *rx); |
8b230ed8 RM |
778 | struct bnad *cam_fltr_cbarg; |
779 | ||
8b230ed8 RM |
780 | /* List of unicast addresses yet to be applied to h/w */ |
781 | struct list_head ucast_pending_add_q; | |
782 | struct list_head ucast_pending_del_q; | |
078086f3 | 783 | struct bna_mac *ucast_pending_mac; |
8b230ed8 RM |
784 | int ucast_pending_set; |
785 | /* ucast addresses applied to the h/w */ | |
786 | struct list_head ucast_active_q; | |
078086f3 RM |
787 | struct bna_mac ucast_active_mac; |
788 | int ucast_active_set; | |
8b230ed8 RM |
789 | |
790 | /* List of multicast addresses yet to be applied to h/w */ | |
791 | struct list_head mcast_pending_add_q; | |
792 | struct list_head mcast_pending_del_q; | |
793 | /* multicast addresses applied to the h/w */ | |
794 | struct list_head mcast_active_q; | |
078086f3 | 795 | struct list_head mcast_handle_q; |
8b230ed8 RM |
796 | |
797 | /* Rx modes yet to be applied to h/w */ | |
798 | enum bna_rxmode rxmode_pending; | |
799 | enum bna_rxmode rxmode_pending_bitmask; | |
800 | /* Rx modes applied to h/w */ | |
801 | enum bna_rxmode rxmode_active; | |
802 | ||
078086f3 | 803 | u8 vlan_pending_bitmask; |
8b230ed8 | 804 | enum bna_status vlan_filter_status; |
078086f3 RM |
805 | u32 vlan_filter_table[(BFI_ENET_VLAN_ID_MAX) / 32]; |
806 | bool vlan_strip_pending; | |
807 | enum bna_status vlan_strip_status; | |
808 | ||
809 | enum bna_rss_flags rss_pending; | |
810 | enum bna_status rss_status; | |
811 | struct bna_rss_config rss_cfg; | |
812 | u8 *rit; | |
813 | int rit_size; | |
814 | ||
815 | struct bna_rx *rx; | |
8b230ed8 RM |
816 | }; |
817 | ||
818 | /* Rx object */ | |
819 | struct bna_rx { | |
820 | /* This should be the first one */ | |
821 | struct list_head qe; | |
078086f3 RM |
822 | int rid; |
823 | int hw_id; | |
8b230ed8 RM |
824 | |
825 | bfa_fsm_t fsm; | |
826 | ||
827 | enum bna_rx_type type; | |
828 | ||
078086f3 | 829 | int num_paths; |
8b230ed8 RM |
830 | struct list_head rxp_q; |
831 | ||
078086f3 RM |
832 | struct bna_hds_config hds_cfg; |
833 | ||
8b230ed8 RM |
834 | struct bna_rxf rxf; |
835 | ||
836 | enum bna_rx_flags rx_flags; | |
837 | ||
078086f3 RM |
838 | struct bfa_msgq_cmd_entry msgq_cmd; |
839 | union { | |
840 | struct bfi_enet_rx_cfg_req cfg_req; | |
841 | struct bfi_enet_req req; | |
842 | struct bfi_enet_rx_cfg_rsp cfg_rsp; | |
843 | } bfi_enet_cmd; | |
8b230ed8 RM |
844 | |
845 | /* Rx event handlers */ | |
846 | void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); | |
847 | void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); | |
848 | void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); | |
849 | void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); | |
5bcf6ac0 | 850 | void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *); |
078086f3 RM |
851 | void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *); |
852 | void (*rx_post_cbfn)(struct bnad *, struct bna_rx *); | |
8b230ed8 RM |
853 | |
854 | /* callback for bna_rx_disable(), bna_rx_stop() */ | |
078086f3 | 855 | void (*stop_cbfn)(void *arg, struct bna_rx *rx); |
8b230ed8 RM |
856 | void *stop_cbarg; |
857 | ||
858 | struct bna *bna; | |
859 | void *priv; /* bnad's cookie */ | |
860 | }; | |
861 | ||
862 | struct bna_rx_event_cbfn { | |
863 | /* Optional */ | |
864 | void (*rcb_setup_cbfn)(struct bnad *, struct bna_rcb *); | |
865 | void (*rcb_destroy_cbfn)(struct bnad *, struct bna_rcb *); | |
866 | void (*ccb_setup_cbfn)(struct bnad *, struct bna_ccb *); | |
867 | void (*ccb_destroy_cbfn)(struct bnad *, struct bna_ccb *); | |
5bcf6ac0 | 868 | void (*rx_stall_cbfn)(struct bnad *, struct bna_rx *); |
8b230ed8 | 869 | /* Mandatory */ |
078086f3 RM |
870 | void (*rx_cleanup_cbfn)(struct bnad *, struct bna_rx *); |
871 | void (*rx_post_cbfn)(struct bnad *, struct bna_rx *); | |
8b230ed8 RM |
872 | }; |
873 | ||
874 | /* Rx module - keeps track of free, active rx objects */ | |
875 | struct bna_rx_mod { | |
876 | struct bna *bna; /* back pointer to parent */ | |
877 | struct bna_rx *rx; /* BFI_MAX_RXQ entries */ | |
878 | struct bna_rxp *rxp; /* BFI_MAX_RXQ entries */ | |
879 | struct bna_rxq *rxq; /* BFI_MAX_RXQ entries */ | |
880 | ||
881 | struct list_head rx_free_q; | |
882 | struct list_head rx_active_q; | |
883 | int rx_free_count; | |
884 | ||
885 | struct list_head rxp_free_q; | |
886 | int rxp_free_count; | |
887 | ||
888 | struct list_head rxq_free_q; | |
889 | int rxq_free_count; | |
890 | ||
891 | enum bna_rx_mod_flags flags; | |
892 | ||
893 | /* callback for bna_rx_mod_stop() */ | |
078086f3 | 894 | void (*stop_cbfn)(struct bna_enet *enet); |
8b230ed8 RM |
895 | |
896 | struct bfa_wc rx_stop_wc; | |
897 | u32 dim_vector[BNA_LOAD_T_MAX][BNA_BIAS_T_MAX]; | |
078086f3 | 898 | u32 rid_mask; |
8b230ed8 RM |
899 | }; |
900 | ||
901 | /** | |
902 | * | |
903 | * CAM | |
904 | * | |
905 | */ | |
906 | ||
907 | struct bna_ucam_mod { | |
908 | struct bna_mac *ucmac; /* BFI_MAX_UCMAC entries */ | |
909 | struct list_head free_q; | |
910 | ||
911 | struct bna *bna; | |
912 | }; | |
913 | ||
078086f3 RM |
914 | struct bna_mcam_handle { |
915 | /* This should be the first one */ | |
916 | struct list_head qe; | |
917 | int handle; | |
918 | int refcnt; | |
919 | }; | |
920 | ||
8b230ed8 RM |
921 | struct bna_mcam_mod { |
922 | struct bna_mac *mcmac; /* BFI_MAX_MCMAC entries */ | |
078086f3 | 923 | struct bna_mcam_handle *mchandle; /* BFI_MAX_MCMAC entries */ |
8b230ed8 | 924 | struct list_head free_q; |
078086f3 | 925 | struct list_head free_handle_q; |
8b230ed8 RM |
926 | |
927 | struct bna *bna; | |
928 | }; | |
929 | ||
930 | /** | |
931 | * | |
932 | * Statistics | |
933 | * | |
934 | */ | |
935 | ||
8b230ed8 | 936 | struct bna_stats { |
078086f3 RM |
937 | struct bna_dma_addr hw_stats_dma; |
938 | struct bfi_enet_stats *hw_stats_kva; | |
939 | struct bfi_enet_stats hw_stats; | |
940 | }; | |
941 | ||
942 | struct bna_stats_mod { | |
943 | bool ioc_ready; | |
944 | bool stats_get_busy; | |
945 | bool stats_clr_busy; | |
946 | struct bfa_msgq_cmd_entry stats_get_cmd; | |
947 | struct bfa_msgq_cmd_entry stats_clr_cmd; | |
948 | struct bfi_enet_stats_req stats_get; | |
949 | struct bfi_enet_stats_req stats_clr; | |
8b230ed8 RM |
950 | }; |
951 | ||
952 | /** | |
953 | * | |
954 | * BNA | |
955 | * | |
956 | */ | |
957 | ||
958 | struct bna { | |
078086f3 | 959 | struct bna_ident ident; |
8b230ed8 RM |
960 | struct bfa_pcidev pcidev; |
961 | ||
078086f3 RM |
962 | struct bna_reg regs; |
963 | struct bna_bit_defn bits; | |
8b230ed8 | 964 | |
8b230ed8 RM |
965 | struct bna_stats stats; |
966 | ||
078086f3 | 967 | struct bna_ioceth ioceth; |
8b230ed8 | 968 | struct bfa_cee cee; |
078086f3 | 969 | struct bfa_msgq msgq; |
8b230ed8 | 970 | |
078086f3 RM |
971 | struct bna_ethport ethport; |
972 | struct bna_enet enet; | |
973 | struct bna_stats_mod stats_mod; | |
8b230ed8 RM |
974 | |
975 | struct bna_tx_mod tx_mod; | |
8b230ed8 | 976 | struct bna_rx_mod rx_mod; |
8b230ed8 RM |
977 | struct bna_ucam_mod ucam_mod; |
978 | struct bna_mcam_mod mcam_mod; | |
979 | ||
078086f3 | 980 | enum bna_mod_flags mod_flags; |
8b230ed8 | 981 | |
078086f3 RM |
982 | int default_mode_rid; |
983 | int promisc_rid; | |
8b230ed8 RM |
984 | |
985 | struct bnad *bnad; | |
986 | }; | |
8b230ed8 | 987 | #endif /* __BNA_TYPES_H__ */ |