Commit | Line | Data |
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8b230ed8 RM |
1 | /* |
2 | * Linux network driver for Brocade Converged Network Adapter. | |
3 | * | |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms of the GNU General Public License (GPL) Version 2 as | |
6 | * published by the Free Software Foundation | |
7 | * | |
8 | * This program is distributed in the hope that it will be useful, but | |
9 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | * General Public License for more details. | |
12 | */ | |
13 | /* | |
14 | * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. | |
15 | * All rights reserved | |
16 | * www.brocade.com | |
17 | */ | |
18 | #ifndef __BNAD_H__ | |
19 | #define __BNAD_H__ | |
20 | ||
21 | #include <linux/rtnetlink.h> | |
22 | #include <linux/workqueue.h> | |
23 | #include <linux/ipv6.h> | |
24 | #include <linux/etherdevice.h> | |
25 | #include <linux/mutex.h> | |
26 | #include <linux/firmware.h> | |
f859d7cb | 27 | #include <linux/if_vlan.h> |
8b230ed8 RM |
28 | |
29 | /* Fix for IA64 */ | |
30 | #include <asm/checksum.h> | |
31 | #include <net/ip6_checksum.h> | |
32 | ||
33 | #include <net/ip.h> | |
34 | #include <net/tcp.h> | |
35 | ||
36 | #include "bna.h" | |
37 | ||
38 | #define BNAD_TXQ_DEPTH 2048 | |
39 | #define BNAD_RXQ_DEPTH 2048 | |
40 | ||
772b5235 | 41 | #define BNAD_MAX_TX 1 |
8b230ed8 RM |
42 | #define BNAD_MAX_TXQ_PER_TX 8 /* 8 priority queues */ |
43 | #define BNAD_TXQ_NUM 1 | |
44 | ||
772b5235 RM |
45 | #define BNAD_MAX_RX 1 |
46 | #define BNAD_MAX_RXP_PER_RX 16 | |
078086f3 | 47 | #define BNAD_MAX_RXQ_PER_RXP 2 |
8b230ed8 RM |
48 | |
49 | /* | |
50 | * Control structure pointed to ccb->ctrl, which | |
51 | * determines the NAPI / LRO behavior CCB | |
52 | * There is 1:1 corres. between ccb & ctrl | |
53 | */ | |
54 | struct bnad_rx_ctrl { | |
55 | struct bna_ccb *ccb; | |
2be67144 | 56 | struct bnad *bnad; |
be7fa326 | 57 | unsigned long flags; |
8b230ed8 | 58 | struct napi_struct napi; |
271e8b79 RM |
59 | u64 rx_intr_ctr; |
60 | u64 rx_poll_ctr; | |
61 | u64 rx_schedule; | |
62 | u64 rx_keep_poll; | |
63 | u64 rx_complete; | |
8b230ed8 RM |
64 | }; |
65 | ||
66 | #define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC | |
67 | ||
8b230ed8 RM |
68 | /* |
69 | * GLOBAL #defines (CONSTANTS) | |
70 | */ | |
71 | #define BNAD_NAME "bna" | |
72 | #define BNAD_NAME_LEN 64 | |
73 | ||
45e98341 | 74 | #define BNAD_VERSION "3.2.21.1" |
8b230ed8 | 75 | |
8811e267 | 76 | #define BNAD_MAILBOX_MSIX_INDEX 0 |
8b230ed8 | 77 | #define BNAD_MAILBOX_MSIX_VECTORS 1 |
8811e267 RM |
78 | #define BNAD_INTX_TX_IB_BITMASK 0x1 |
79 | #define BNAD_INTX_RX_IB_BITMASK 0x2 | |
8b230ed8 | 80 | |
0120b99c RM |
81 | #define BNAD_STATS_TIMER_FREQ 1000 /* in msecs */ |
82 | #define BNAD_DIM_TIMER_FREQ 1000 /* in msecs */ | |
8b230ed8 | 83 | |
078086f3 RM |
84 | #define BNAD_IOCETH_TIMEOUT 10000 |
85 | ||
5216562a RM |
86 | #define BNAD_MIN_Q_DEPTH 512 |
87 | #define BNAD_MAX_RXQ_DEPTH 2048 | |
88 | #define BNAD_MAX_TXQ_DEPTH 2048 | |
41eb5ba4 | 89 | |
8b230ed8 RM |
90 | #define BNAD_JUMBO_MTU 9000 |
91 | ||
92 | #define BNAD_NETIF_WAKE_THRESHOLD 8 | |
93 | ||
94 | #define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3 | |
95 | ||
96 | /* Bit positions for tcb->flags */ | |
97 | #define BNAD_TXQ_FREE_SENT 0 | |
be7fa326 | 98 | #define BNAD_TXQ_TX_STARTED 1 |
8b230ed8 RM |
99 | |
100 | /* Bit positions for rcb->flags */ | |
5216562a RM |
101 | #define BNAD_RXQ_STARTED 0 |
102 | #define BNAD_RXQ_POST_OK 1 | |
8b230ed8 | 103 | |
078086f3 RM |
104 | /* Resource limits */ |
105 | #define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx) | |
106 | #define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx) | |
107 | ||
e29aa339 RM |
108 | #define BNAD_FRAME_SIZE(_mtu) \ |
109 | (ETH_HLEN + VLAN_HLEN + (_mtu) + ETH_FCS_LEN) | |
110 | ||
8b230ed8 RM |
111 | /* |
112 | * DATA STRUCTURES | |
113 | */ | |
114 | ||
115 | /* enums */ | |
116 | enum bnad_intr_source { | |
117 | BNAD_INTR_TX = 1, | |
118 | BNAD_INTR_RX = 2 | |
119 | }; | |
120 | ||
121 | enum bnad_link_state { | |
122 | BNAD_LS_DOWN = 0, | |
0120b99c | 123 | BNAD_LS_UP = 1 |
8b230ed8 RM |
124 | }; |
125 | ||
72a9730b KG |
126 | struct bnad_iocmd_comp { |
127 | struct bnad *bnad; | |
128 | struct completion comp; | |
129 | int comp_status; | |
130 | }; | |
131 | ||
8b230ed8 | 132 | struct bnad_completion { |
0120b99c RM |
133 | struct completion ioc_comp; |
134 | struct completion ucast_comp; | |
8b230ed8 RM |
135 | struct completion mcast_comp; |
136 | struct completion tx_comp; | |
137 | struct completion rx_comp; | |
138 | struct completion stats_comp; | |
078086f3 RM |
139 | struct completion enet_comp; |
140 | struct completion mtu_comp; | |
8b230ed8 RM |
141 | |
142 | u8 ioc_comp_status; | |
143 | u8 ucast_comp_status; | |
144 | u8 mcast_comp_status; | |
145 | u8 tx_comp_status; | |
146 | u8 rx_comp_status; | |
147 | u8 stats_comp_status; | |
148 | u8 port_comp_status; | |
078086f3 | 149 | u8 mtu_comp_status; |
8b230ed8 RM |
150 | }; |
151 | ||
152 | /* Tx Rx Control Stats */ | |
153 | struct bnad_drv_stats { | |
0120b99c | 154 | u64 netif_queue_stop; |
8b230ed8 | 155 | u64 netif_queue_wakeup; |
f7c0fa4c | 156 | u64 netif_queue_stopped; |
8b230ed8 RM |
157 | u64 tso4; |
158 | u64 tso6; | |
159 | u64 tso_err; | |
160 | u64 tcpcsum_offload; | |
161 | u64 udpcsum_offload; | |
162 | u64 csum_help; | |
271e8b79 RM |
163 | u64 tx_skb_too_short; |
164 | u64 tx_skb_stopping; | |
165 | u64 tx_skb_max_vectors; | |
166 | u64 tx_skb_mss_too_long; | |
167 | u64 tx_skb_tso_too_short; | |
168 | u64 tx_skb_tso_prepare; | |
169 | u64 tx_skb_non_tso_too_long; | |
170 | u64 tx_skb_tcp_hdr; | |
171 | u64 tx_skb_udp_hdr; | |
172 | u64 tx_skb_csum_err; | |
173 | u64 tx_skb_headlen_too_long; | |
174 | u64 tx_skb_headlen_zero; | |
175 | u64 tx_skb_frag_zero; | |
176 | u64 tx_skb_len_mismatch; | |
8b230ed8 RM |
177 | |
178 | u64 hw_stats_updates; | |
8b230ed8 RM |
179 | u64 netif_rx_dropped; |
180 | ||
181 | u64 link_toggle; | |
078086f3 | 182 | u64 cee_toggle; |
8b230ed8 RM |
183 | |
184 | u64 rxp_info_alloc_failed; | |
185 | u64 mbox_intr_disabled; | |
186 | u64 mbox_intr_enabled; | |
187 | u64 tx_unmap_q_alloc_failed; | |
188 | u64 rx_unmap_q_alloc_failed; | |
189 | ||
190 | u64 rxbuf_alloc_failed; | |
191 | }; | |
192 | ||
193 | /* Complete driver stats */ | |
194 | struct bnad_stats { | |
195 | struct bnad_drv_stats drv_stats; | |
196 | struct bna_stats *bna_stats; | |
197 | }; | |
198 | ||
199 | /* Tx / Rx Resources */ | |
200 | struct bnad_tx_res_info { | |
201 | struct bna_res_info res_info[BNA_TX_RES_T_MAX]; | |
202 | }; | |
203 | ||
204 | struct bnad_rx_res_info { | |
205 | struct bna_res_info res_info[BNA_RX_RES_T_MAX]; | |
206 | }; | |
207 | ||
208 | struct bnad_tx_info { | |
209 | struct bna_tx *tx; /* 1:1 between tx_info & tx */ | |
210 | struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX]; | |
078086f3 | 211 | u32 tx_id; |
01b54b14 | 212 | struct delayed_work tx_cleanup_work; |
8b230ed8 RM |
213 | } ____cacheline_aligned; |
214 | ||
215 | struct bnad_rx_info { | |
216 | struct bna_rx *rx; /* 1:1 between rx_info & rx */ | |
217 | ||
772b5235 | 218 | struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX]; |
078086f3 | 219 | u32 rx_id; |
01b54b14 | 220 | struct work_struct rx_cleanup_work; |
8b230ed8 RM |
221 | } ____cacheline_aligned; |
222 | ||
5216562a RM |
223 | struct bnad_tx_vector { |
224 | DEFINE_DMA_UNMAP_ADDR(dma_addr); | |
225 | }; | |
226 | ||
227 | struct bnad_tx_unmap { | |
8b230ed8 | 228 | struct sk_buff *skb; |
5216562a RM |
229 | u32 nvecs; |
230 | struct bnad_tx_vector vectors[BFI_TX_MAX_VECTORS_PER_WI]; | |
231 | }; | |
232 | ||
233 | struct bnad_rx_vector { | |
5ea74318 | 234 | DEFINE_DMA_UNMAP_ADDR(dma_addr); |
5216562a | 235 | u32 len; |
8b230ed8 RM |
236 | }; |
237 | ||
5216562a | 238 | struct bnad_rx_unmap { |
30f9fc94 RM |
239 | struct page *page; |
240 | u32 page_offset; | |
5216562a RM |
241 | struct sk_buff *skb; |
242 | struct bnad_rx_vector vector; | |
8b230ed8 RM |
243 | }; |
244 | ||
30f9fc94 RM |
245 | enum bnad_rxbuf_type { |
246 | BNAD_RXBUF_NONE = 0, | |
e29aa339 | 247 | BNAD_RXBUF_SK_BUFF = 1, |
30f9fc94 | 248 | BNAD_RXBUF_PAGE = 2, |
e29aa339 | 249 | BNAD_RXBUF_MULTI_BUFF = 3 |
30f9fc94 RM |
250 | }; |
251 | ||
e29aa339 RM |
252 | #define BNAD_RXBUF_IS_SK_BUFF(_type) ((_type) == BNAD_RXBUF_SK_BUFF) |
253 | #define BNAD_RXBUF_IS_MULTI_BUFF(_type) ((_type) == BNAD_RXBUF_MULTI_BUFF) | |
30f9fc94 RM |
254 | |
255 | struct bnad_rx_unmap_q { | |
256 | int reuse_pi; | |
257 | int alloc_order; | |
258 | u32 map_size; | |
259 | enum bnad_rxbuf_type type; | |
260 | struct bnad_rx_unmap unmap[0]; | |
261 | }; | |
262 | ||
e29aa339 RM |
263 | #define BNAD_PCI_DEV_IS_CAT2(_bnad) \ |
264 | ((_bnad)->pcidev->device == BFA_PCI_DEVICE_ID_CT2) | |
265 | ||
8b230ed8 RM |
266 | /* Bit mask values for bnad->cfg_flags */ |
267 | #define BNAD_CF_DIM_ENABLED 0x01 /* DIM */ | |
268 | #define BNAD_CF_PROMISC 0x02 | |
269 | #define BNAD_CF_ALLMULTI 0x04 | |
fe1624cf RM |
270 | #define BNAD_CF_DEFAULT 0x08 |
271 | #define BNAD_CF_MSIX 0x10 /* If in MSIx mode */ | |
8b230ed8 RM |
272 | |
273 | /* Defines for run_flags bit-mask */ | |
274 | /* Set, tested & cleared using xxx_bit() functions */ | |
275 | /* Values indicated bit positions */ | |
078086f3 RM |
276 | #define BNAD_RF_CEE_RUNNING 0 |
277 | #define BNAD_RF_MTU_SET 1 | |
be7fa326 | 278 | #define BNAD_RF_MBOX_IRQ_DISABLED 2 |
078086f3 | 279 | #define BNAD_RF_NETDEV_REGISTERED 3 |
be7fa326 RM |
280 | #define BNAD_RF_DIM_TIMER_RUNNING 4 |
281 | #define BNAD_RF_STATS_TIMER_RUNNING 5 | |
078086f3 RM |
282 | #define BNAD_RF_TX_PRIO_SET 6 |
283 | ||
8b230ed8 | 284 | struct bnad { |
0120b99c | 285 | struct net_device *netdev; |
72a9730b KG |
286 | u32 id; |
287 | struct list_head list_entry; | |
8b230ed8 RM |
288 | |
289 | /* Data path */ | |
772b5235 RM |
290 | struct bnad_tx_info tx_info[BNAD_MAX_TX]; |
291 | struct bnad_rx_info rx_info[BNAD_MAX_RX]; | |
8b230ed8 | 292 | |
f859d7cb | 293 | unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)]; |
8b230ed8 RM |
294 | /* |
295 | * These q numbers are global only because | |
296 | * they are used to calculate MSIx vectors. | |
297 | * Actually the exact # of queues are per Tx/Rx | |
298 | * object. | |
299 | */ | |
300 | u32 num_tx; | |
301 | u32 num_rx; | |
302 | u32 num_txq_per_tx; | |
303 | u32 num_rxp_per_rx; | |
304 | ||
305 | u32 txq_depth; | |
306 | u32 rxq_depth; | |
307 | ||
308 | u8 tx_coalescing_timeo; | |
309 | u8 rx_coalescing_timeo; | |
310 | ||
5e46631f RM |
311 | struct bna_rx_config rx_config[BNAD_MAX_RX] ____cacheline_aligned; |
312 | struct bna_tx_config tx_config[BNAD_MAX_TX] ____cacheline_aligned; | |
8b230ed8 | 313 | |
8b230ed8 RM |
314 | void __iomem *bar0; /* BAR0 address */ |
315 | ||
316 | struct bna bna; | |
317 | ||
318 | u32 cfg_flags; | |
319 | unsigned long run_flags; | |
320 | ||
0120b99c | 321 | struct pci_dev *pcidev; |
8b230ed8 RM |
322 | u64 mmio_start; |
323 | u64 mmio_len; | |
324 | ||
325 | u32 msix_num; | |
8b230ed8 RM |
326 | struct msix_entry *msix_table; |
327 | ||
328 | struct mutex conf_mutex; | |
329 | spinlock_t bna_lock ____cacheline_aligned; | |
330 | ||
331 | /* Timers */ | |
332 | struct timer_list ioc_timer; | |
333 | struct timer_list dim_timer; | |
334 | struct timer_list stats_timer; | |
335 | ||
336 | /* Control path resources, memory & irq */ | |
337 | struct bna_res_info res_info[BNA_RES_T_MAX]; | |
078086f3 | 338 | struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX]; |
772b5235 RM |
339 | struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX]; |
340 | struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX]; | |
8b230ed8 RM |
341 | |
342 | struct bnad_completion bnad_completions; | |
343 | ||
344 | /* Burnt in MAC address */ | |
345 | mac_t perm_addr; | |
346 | ||
01b54b14 | 347 | struct workqueue_struct *work_q; |
8b230ed8 RM |
348 | |
349 | /* Statistics */ | |
350 | struct bnad_stats stats; | |
8b230ed8 RM |
351 | |
352 | struct bnad_diag *diag; | |
353 | ||
354 | char adapter_name[BNAD_NAME_LEN]; | |
0120b99c | 355 | char port_name[BNAD_NAME_LEN]; |
8b230ed8 | 356 | char mbox_irq_name[BNAD_NAME_LEN]; |
01b54b14 | 357 | char wq_name[BNAD_NAME_LEN]; |
7afc5dbd KG |
358 | |
359 | /* debugfs specific data */ | |
360 | char *regdata; | |
361 | u32 reglen; | |
362 | struct dentry *bnad_dentry_files[5]; | |
363 | struct dentry *port_debugfs_root; | |
364 | }; | |
365 | ||
366 | struct bnad_drvinfo { | |
367 | struct bfa_ioc_attr ioc_attr; | |
368 | struct bfa_cee_attr cee_attr; | |
369 | struct bfa_flash_attr flash_attr; | |
370 | u32 cee_status; | |
371 | u32 flash_status; | |
8b230ed8 RM |
372 | }; |
373 | ||
374 | /* | |
375 | * EXTERN VARIABLES | |
376 | */ | |
e1e0918f | 377 | extern const struct firmware *bfi_fw; |
8b230ed8 RM |
378 | |
379 | /* | |
380 | * EXTERN PROTOTYPES | |
381 | */ | |
49ca19bd | 382 | u32 *cna_get_firmware_buf(struct pci_dev *pdev); |
8b230ed8 | 383 | /* Netdev entry point prototypes */ |
49ca19bd JP |
384 | void bnad_set_rx_mode(struct net_device *netdev); |
385 | struct net_device_stats *bnad_get_netdev_stats(struct net_device *netdev); | |
386 | int bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr); | |
387 | int bnad_enable_default_bcast(struct bnad *bnad); | |
388 | void bnad_restore_vlans(struct bnad *bnad, u32 rx_id); | |
389 | void bnad_set_ethtool_ops(struct net_device *netdev); | |
390 | void bnad_cb_completion(void *arg, enum bfa_status status); | |
8b230ed8 RM |
391 | |
392 | /* Configuration & setup */ | |
49ca19bd JP |
393 | void bnad_tx_coalescing_timeo_set(struct bnad *bnad); |
394 | void bnad_rx_coalescing_timeo_set(struct bnad *bnad); | |
8b230ed8 | 395 | |
49ca19bd JP |
396 | int bnad_setup_rx(struct bnad *bnad, u32 rx_id); |
397 | int bnad_setup_tx(struct bnad *bnad, u32 tx_id); | |
398 | void bnad_destroy_tx(struct bnad *bnad, u32 tx_id); | |
399 | void bnad_destroy_rx(struct bnad *bnad, u32 rx_id); | |
8b230ed8 RM |
400 | |
401 | /* Timer start/stop protos */ | |
49ca19bd | 402 | void bnad_dim_timer_start(struct bnad *bnad); |
8b230ed8 RM |
403 | |
404 | /* Statistics */ | |
49ca19bd JP |
405 | void bnad_netdev_qstats_fill(struct bnad *bnad, |
406 | struct rtnl_link_stats64 *stats); | |
407 | void bnad_netdev_hwstats_fill(struct bnad *bnad, | |
408 | struct rtnl_link_stats64 *stats); | |
8b230ed8 | 409 | |
7afc5dbd | 410 | /* Debugfs */ |
49ca19bd JP |
411 | void bnad_debugfs_init(struct bnad *bnad); |
412 | void bnad_debugfs_uninit(struct bnad *bnad); | |
7afc5dbd | 413 | |
1aa8b471 | 414 | /* MACROS */ |
8b230ed8 RM |
415 | /* To set & get the stats counters */ |
416 | #define BNAD_UPDATE_CTR(_bnad, _ctr) \ | |
417 | (((_bnad)->stats.drv_stats._ctr)++) | |
418 | ||
419 | #define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr) | |
420 | ||
421 | #define bnad_enable_rx_irq_unsafe(_ccb) \ | |
422 | { \ | |
271e8b79 | 423 | if (likely(test_bit(BNAD_RXQ_STARTED, &(_ccb)->rcb[0]->flags))) {\ |
be7fa326 RM |
424 | bna_ib_coalescing_timer_set((_ccb)->i_dbell, \ |
425 | (_ccb)->rx_coalescing_timeo); \ | |
426 | bna_ib_ack((_ccb)->i_dbell, 0); \ | |
427 | } \ | |
8b230ed8 RM |
428 | } |
429 | ||
8b230ed8 | 430 | #endif /* __BNAD_H__ */ |