projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
net: introduce IFF_UNICAST_FLT private flag
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 60
61/* Supported devices */
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 63 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 65 { 0, } /* end of table */
66};
67
68MODULE_DESCRIPTION(DRV_DESCRIPTION);
69MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72MODULE_DEVICE_TABLE(pci, enic_id_table);
73
74struct enic_stat {
75 char name[ETH_GSTRING_LEN];
76 unsigned int offset;
77};
78
79#define ENIC_TX_STAT(stat) \
80 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
81#define ENIC_RX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
83
84static const struct enic_stat enic_tx_stats[] = {
85 ENIC_TX_STAT(tx_frames_ok),
86 ENIC_TX_STAT(tx_unicast_frames_ok),
87 ENIC_TX_STAT(tx_multicast_frames_ok),
88 ENIC_TX_STAT(tx_broadcast_frames_ok),
89 ENIC_TX_STAT(tx_bytes_ok),
90 ENIC_TX_STAT(tx_unicast_bytes_ok),
91 ENIC_TX_STAT(tx_multicast_bytes_ok),
92 ENIC_TX_STAT(tx_broadcast_bytes_ok),
93 ENIC_TX_STAT(tx_drops),
94 ENIC_TX_STAT(tx_errors),
95 ENIC_TX_STAT(tx_tso),
96};
97
98static const struct enic_stat enic_rx_stats[] = {
99 ENIC_RX_STAT(rx_frames_ok),
100 ENIC_RX_STAT(rx_frames_total),
101 ENIC_RX_STAT(rx_unicast_frames_ok),
102 ENIC_RX_STAT(rx_multicast_frames_ok),
103 ENIC_RX_STAT(rx_broadcast_frames_ok),
104 ENIC_RX_STAT(rx_bytes_ok),
105 ENIC_RX_STAT(rx_unicast_bytes_ok),
106 ENIC_RX_STAT(rx_multicast_bytes_ok),
107 ENIC_RX_STAT(rx_broadcast_bytes_ok),
108 ENIC_RX_STAT(rx_drop),
109 ENIC_RX_STAT(rx_no_bufs),
110 ENIC_RX_STAT(rx_errors),
111 ENIC_RX_STAT(rx_rss),
112 ENIC_RX_STAT(rx_crc_errors),
113 ENIC_RX_STAT(rx_frames_64),
114 ENIC_RX_STAT(rx_frames_127),
115 ENIC_RX_STAT(rx_frames_255),
116 ENIC_RX_STAT(rx_frames_511),
117 ENIC_RX_STAT(rx_frames_1023),
118 ENIC_RX_STAT(rx_frames_1518),
119 ENIC_RX_STAT(rx_frames_to_max),
120};
121
122static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
123static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
124
f8bd9091
SF		 125static int enic_is_dynamic(struct enic *enic)
126{
127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
128}
129
717258ba
VK		 130static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
131{
132 return rq;
133}
134
135static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
136{
137 return enic->rq_count + wq;
138}
139
140static inline unsigned int enic_legacy_io_intr(void)
141{
142 return 0;
143}
144
145static inline unsigned int enic_legacy_err_intr(void)
146{
147 return 1;
148}
149
150static inline unsigned int enic_legacy_notify_intr(void)
151{
152 return 2;
153}
154
155static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
156{
7d260ec2 157 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 158}
159
160static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
161{
7d260ec2 162 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 163}
164
165static inline unsigned int enic_msix_err_intr(struct enic *enic)
166{
167 return enic->rq_count + enic->wq_count;
168}
169
170static inline unsigned int enic_msix_notify_intr(struct enic *enic)
171{
172 return enic->rq_count + enic->wq_count + 1;
173}
174
01f2e4ea
SF		 175static int enic_get_settings(struct net_device *netdev,
176 struct ethtool_cmd *ecmd)
177{
178 struct enic *enic = netdev_priv(netdev);
179
180 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
181 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
182 ecmd->port = PORT_FIBRE;
183 ecmd->transceiver = XCVR_EXTERNAL;
184
185 if (netif_carrier_ok(netdev)) {
70739497 186 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 187 ecmd->duplex = DUPLEX_FULL;
188 } else {
70739497 189 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 190 ecmd->duplex = -1;
191 }
192
193 ecmd->autoneg = AUTONEG_DISABLE;
194
195 return 0;
196}
197
198static void enic_get_drvinfo(struct net_device *netdev,
199 struct ethtool_drvinfo *drvinfo)
200{
201 struct enic *enic = netdev_priv(netdev);
202 struct vnic_devcmd_fw_info *fw_info;
203
383ab92f 204 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 205
206 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
207 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
208 strncpy(drvinfo->fw_version, fw_info->fw_version,
209 sizeof(drvinfo->fw_version));
210 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
211 sizeof(drvinfo->bus_info));
212}
213
214static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
215{
216 unsigned int i;
217
218 switch (stringset) {
219 case ETH_SS_STATS:
220 for (i = 0; i < enic_n_tx_stats; i++) {
221 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
222 data += ETH_GSTRING_LEN;
223 }
224 for (i = 0; i < enic_n_rx_stats; i++) {
225 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
226 data += ETH_GSTRING_LEN;
227 }
228 break;
229 }
230}
231
25f0a061 232static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 233{
25f0a061
SF		 234 switch (sset) {
235 case ETH_SS_STATS:
236 return enic_n_tx_stats + enic_n_rx_stats;
237 default:
238 return -EOPNOTSUPP;
239 }
01f2e4ea
SF		 240}
241
242static void enic_get_ethtool_stats(struct net_device *netdev,
243 struct ethtool_stats *stats, u64 *data)
244{
245 struct enic *enic = netdev_priv(netdev);
246 struct vnic_stats *vstats;
247 unsigned int i;
248
383ab92f 249 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 250
251 for (i = 0; i < enic_n_tx_stats; i++)
252 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
253 for (i = 0; i < enic_n_rx_stats; i++)
254 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
255}
256
01f2e4ea
SF		 257static u32 enic_get_msglevel(struct net_device *netdev)
258{
259 struct enic *enic = netdev_priv(netdev);
260 return enic->msg_enable;
261}
262
263static void enic_set_msglevel(struct net_device *netdev, u32 value)
264{
265 struct enic *enic = netdev_priv(netdev);
266 enic->msg_enable = value;
267}
268
7c844599
SF		 269static int enic_get_coalesce(struct net_device *netdev,
270 struct ethtool_coalesce *ecmd)
271{
272 struct enic *enic = netdev_priv(netdev);
273
274 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
275 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
276
277 return 0;
278}
279
280static int enic_set_coalesce(struct net_device *netdev,
281 struct ethtool_coalesce *ecmd)
282{
283 struct enic *enic = netdev_priv(netdev);
284 u32 tx_coalesce_usecs;
285 u32 rx_coalesce_usecs;
717258ba 286 unsigned int i, intr;
7c844599 287
ea7ea65a
VK		 288 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
289 vnic_dev_get_intr_coal_timer_max(enic->vdev));
290 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
291 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 292
293 switch (vnic_dev_get_intr_mode(enic->vdev)) {
294 case VNIC_DEV_INTR_MODE_INTX:
295 if (tx_coalesce_usecs != rx_coalesce_usecs)
296 return -EINVAL;
297
717258ba
VK		 298 intr = enic_legacy_io_intr();
299 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 300 tx_coalesce_usecs);
7c844599
SF		 301 break;
302 case VNIC_DEV_INTR_MODE_MSI:
303 if (tx_coalesce_usecs != rx_coalesce_usecs)
304 return -EINVAL;
305
306 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 307 tx_coalesce_usecs);
7c844599
SF		 308 break;
309 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 310 for (i = 0; i < enic->wq_count; i++) {
311 intr = enic_msix_wq_intr(enic, i);
312 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 313 tx_coalesce_usecs);
717258ba
VK		 314 }
315
316 for (i = 0; i < enic->rq_count; i++) {
317 intr = enic_msix_rq_intr(enic, i);
318 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 319 rx_coalesce_usecs);
717258ba
VK		 320 }
321
7c844599
SF		 322 break;
323 default:
324 break;
325 }
326
327 enic->tx_coalesce_usecs = tx_coalesce_usecs;
328 enic->rx_coalesce_usecs = rx_coalesce_usecs;
329
330 return 0;
331}
332
0fc0b732 333static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 334 .get_settings = enic_get_settings,
335 .get_drvinfo = enic_get_drvinfo,
336 .get_msglevel = enic_get_msglevel,
337 .set_msglevel = enic_set_msglevel,
338 .get_link = ethtool_op_get_link,
339 .get_strings = enic_get_strings,
25f0a061 340 .get_sset_count = enic_get_sset_count,
01f2e4ea 341 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 342 .get_coalesce = enic_get_coalesce,
343 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 344};
345
346static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
347{
348 struct enic *enic = vnic_dev_priv(wq->vdev);
349
350 if (buf->sop)
351 pci_unmap_single(enic->pdev, buf->dma_addr,
352 buf->len, PCI_DMA_TODEVICE);
353 else
354 pci_unmap_page(enic->pdev, buf->dma_addr,
355 buf->len, PCI_DMA_TODEVICE);
356
357 if (buf->os_buf)
358 dev_kfree_skb_any(buf->os_buf);
359}
360
361static void enic_wq_free_buf(struct vnic_wq *wq,
362 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
363{
364 enic_free_wq_buf(wq, buf);
365}
366
367static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
368 u8 type, u16 q_number, u16 completed_index, void *opaque)
369{
370 struct enic *enic = vnic_dev_priv(vdev);
371
372 spin_lock(&enic->wq_lock[q_number]);
373
374 vnic_wq_service(&enic->wq[q_number], cq_desc,
375 completed_index, enic_wq_free_buf,
376 opaque);
377
378 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 379 vnic_wq_desc_avail(&enic->wq[q_number]) >=
380 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 381 netif_wake_queue(enic->netdev);
382
383 spin_unlock(&enic->wq_lock[q_number]);
384
385 return 0;
386}
387
388static void enic_log_q_error(struct enic *enic)
389{
390 unsigned int i;
391 u32 error_status;
392
393 for (i = 0; i < enic->wq_count; i++) {
394 error_status = vnic_wq_error_status(&enic->wq[i]);
395 if (error_status)
a7a79deb
VK		 396 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
397 i, error_status);
01f2e4ea
SF		 398 }
399
400 for (i = 0; i < enic->rq_count; i++) {
401 error_status = vnic_rq_error_status(&enic->rq[i]);
402 if (error_status)
a7a79deb
VK		 403 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
404 i, error_status);
01f2e4ea
SF		 405 }
406}
407
383ab92f 408static void enic_msglvl_check(struct enic *enic)
01f2e4ea 409{
383ab92f 410 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 411
383ab92f 412 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 413 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
414 enic->msg_enable, msg_enable);
383ab92f 415 enic->msg_enable = msg_enable;
01f2e4ea
SF		 416 }
417}
418
419static void enic_mtu_check(struct enic *enic)
420{
421 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 422 struct net_device *netdev = enic->netdev;
01f2e4ea 423
491598a4 424 if (mtu && mtu != enic->port_mtu) {
7c844599 425 enic->port_mtu = mtu;
c97c894d
RP		 426 if (enic_is_dynamic(enic)) {
427 mtu = max_t(int, ENIC_MIN_MTU,
428 min_t(int, ENIC_MAX_MTU, mtu));
429 if (mtu != netdev->mtu)
430 schedule_work(&enic->change_mtu_work);
431 } else {
432 if (mtu < netdev->mtu)
433 netdev_warn(netdev,
434 "interface MTU (%d) set higher "
435 "than switch port MTU (%d)\n",
436 netdev->mtu, mtu);
437 }
01f2e4ea
SF		 438 }
439}
440
383ab92f 441static void enic_link_check(struct enic *enic)
01f2e4ea 442{
383ab92f
VK		 443 int link_status = vnic_dev_link_status(enic->vdev);
444 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 445
383ab92f 446 if (link_status && !carrier_ok) {
a7a79deb 447 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 448 netif_carrier_on(enic->netdev);
449 } else if (!link_status && carrier_ok) {
a7a79deb 450 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 451 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 452 }
453}
454
455static void enic_notify_check(struct enic *enic)
456{
457 enic_msglvl_check(enic);
458 enic_mtu_check(enic);
459 enic_link_check(enic);
460}
461
462#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
463
464static irqreturn_t enic_isr_legacy(int irq, void *data)
465{
466 struct net_device *netdev = data;
467 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 468 unsigned int io_intr = enic_legacy_io_intr();
469 unsigned int err_intr = enic_legacy_err_intr();
470 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 471 u32 pba;
472
717258ba 473 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 474
475 pba = vnic_intr_legacy_pba(enic->legacy_pba);
476 if (!pba) {
717258ba 477 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 478 return IRQ_NONE; /* not our interrupt */
479 }
480
717258ba
VK		 481 if (ENIC_TEST_INTR(pba, notify_intr)) {
482 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 483 enic_notify_check(enic);
ed8af6b2 484 }
01f2e4ea 485
717258ba
VK		 486 if (ENIC_TEST_INTR(pba, err_intr)) {
487 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 488 enic_log_q_error(enic);
489 /* schedule recovery from WQ/RQ error */
490 schedule_work(&enic->reset);
491 return IRQ_HANDLED;
492 }
493
717258ba
VK		 494 if (ENIC_TEST_INTR(pba, io_intr)) {
495 if (napi_schedule_prep(&enic->napi[0]))
496 __napi_schedule(&enic->napi[0]);
01f2e4ea 497 } else {
717258ba 498 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 499 }
500
501 return IRQ_HANDLED;
502}
503
504static irqreturn_t enic_isr_msi(int irq, void *data)
505{
506 struct enic *enic = data;
507
508 /* With MSI, there is no sharing of interrupts, so this is
509 * our interrupt and there is no need to ack it. The device
510 * is not providing per-vector masking, so the OS will not
511 * write to PCI config space to mask/unmask the interrupt.
512 * We're using mask_on_assertion for MSI, so the device
513 * automatically masks the interrupt when the interrupt is
514 * generated. Later, when exiting polling, the interrupt
515 * will be unmasked (see enic_poll).
516 *
517 * Also, the device uses the same PCIe Traffic Class (TC)
518 * for Memory Write data and MSI, so there are no ordering
519 * issues; the MSI will always arrive at the Root Complex
520 * _after_ corresponding Memory Writes (i.e. descriptor
521 * writes).
522 */
523
717258ba 524 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 525
526 return IRQ_HANDLED;
527}
528
529static irqreturn_t enic_isr_msix_rq(int irq, void *data)
530{
717258ba 531 struct napi_struct *napi = data;
01f2e4ea
SF		 532
533 /* schedule NAPI polling for RQ cleanup */
717258ba 534 napi_schedule(napi);
01f2e4ea
SF		 535
536 return IRQ_HANDLED;
537}
538
539static irqreturn_t enic_isr_msix_wq(int irq, void *data)
540{
541 struct enic *enic = data;
717258ba
VK		 542 unsigned int cq = enic_cq_wq(enic, 0);
543 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 544 unsigned int wq_work_to_do = -1; /* no limit */
545 unsigned int wq_work_done;
546
717258ba 547 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 548 wq_work_to_do, enic_wq_service, NULL);
549
717258ba 550 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 551 wq_work_done,
552 1 /* unmask intr */,
553 1 /* reset intr timer */);
554
555 return IRQ_HANDLED;
556}
557
558static irqreturn_t enic_isr_msix_err(int irq, void *data)
559{
560 struct enic *enic = data;
717258ba 561 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 562
717258ba 563 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 564
01f2e4ea
SF		 565 enic_log_q_error(enic);
566
567 /* schedule recovery from WQ/RQ error */
568 schedule_work(&enic->reset);
569
570 return IRQ_HANDLED;
571}
572
573static irqreturn_t enic_isr_msix_notify(int irq, void *data)
574{
575 struct enic *enic = data;
717258ba 576 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 577
717258ba 578 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 579 enic_notify_check(enic);
01f2e4ea
SF		 580
581 return IRQ_HANDLED;
582}
583
584static inline void enic_queue_wq_skb_cont(struct enic *enic,
585 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 586 unsigned int len_left, int loopback)
01f2e4ea
SF		 587{
588 skb_frag_t *frag;
589
590 /* Queue additional data fragments */
591 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
592 len_left -= frag->size;
593 enic_queue_wq_desc_cont(wq, skb,
594 pci_map_page(enic->pdev, frag->page,
595 frag->page_offset, frag->size,
596 PCI_DMA_TODEVICE),
597 frag->size,
1825aca6
VK		 598 (len_left == 0), /* EOP? */
599 loopback);
01f2e4ea
SF		 600 }
601}
602
603static inline void enic_queue_wq_skb_vlan(struct enic *enic,
604 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 605 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 606{
607 unsigned int head_len = skb_headlen(skb);
608 unsigned int len_left = skb->len - head_len;
609 int eop = (len_left == 0);
610
ea0d7d91
SF		 611 /* Queue the main skb fragment. The fragments are no larger
612 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
613 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
614 * per fragment is queued.
615 */
01f2e4ea
SF		 616 enic_queue_wq_desc(wq, skb,
617 pci_map_single(enic->pdev, skb->data,
618 head_len, PCI_DMA_TODEVICE),
619 head_len,
620 vlan_tag_insert, vlan_tag,
1825aca6 621 eop, loopback);
01f2e4ea
SF		 622
623 if (!eop)
1825aca6 624 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 625}
626
627static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
628 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 629 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 630{
631 unsigned int head_len = skb_headlen(skb);
632 unsigned int len_left = skb->len - head_len;
0d0b1672 633 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 634 unsigned int csum_offset = hdr_len + skb->csum_offset;
635 int eop = (len_left == 0);
636
ea0d7d91
SF		 637 /* Queue the main skb fragment. The fragments are no larger
638 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
639 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
640 * per fragment is queued.
641 */
01f2e4ea
SF		 642 enic_queue_wq_desc_csum_l4(wq, skb,
643 pci_map_single(enic->pdev, skb->data,
644 head_len, PCI_DMA_TODEVICE),
645 head_len,
646 csum_offset,
647 hdr_len,
648 vlan_tag_insert, vlan_tag,
1825aca6 649 eop, loopback);
01f2e4ea
SF		 650
651 if (!eop)
1825aca6 652 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 653}
654
655static inline void enic_queue_wq_skb_tso(struct enic *enic,
656 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 657 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 658{
ea0d7d91
SF		 659 unsigned int frag_len_left = skb_headlen(skb);
660 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 661 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
662 int eop = (len_left == 0);
ea0d7d91
SF		 663 unsigned int len;
664 dma_addr_t dma_addr;
665 unsigned int offset = 0;
666 skb_frag_t *frag;
01f2e4ea
SF		 667
668 /* Preload TCP csum field with IP pseudo hdr calculated
669 * with IP length set to zero. HW will later add in length
670 * to each TCP segment resulting from the TSO.
671 */
672
09640e63 673 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 674 ip_hdr(skb)->check = 0;
675 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
676 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 677 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 678 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
679 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
680 }
681
ea0d7d91
SF		 682 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
683 * for the main skb fragment
684 */
685 while (frag_len_left) {
686 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
687 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
688 len, PCI_DMA_TODEVICE);
689 enic_queue_wq_desc_tso(wq, skb,
690 dma_addr,
691 len,
692 mss, hdr_len,
693 vlan_tag_insert, vlan_tag,
1825aca6 694 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 695 frag_len_left -= len;
696 offset += len;
697 }
01f2e4ea 698
ea0d7d91
SF		 699 if (eop)
700 return;
701
702 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
703 * for additional data fragments
704 */
705 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
706 len_left -= frag->size;
707 frag_len_left = frag->size;
708 offset = frag->page_offset;
709
710 while (frag_len_left) {
711 len = min(frag_len_left,
712 (unsigned int)WQ_ENET_MAX_DESC_LEN);
713 dma_addr = pci_map_page(enic->pdev, frag->page,
714 offset, len,
715 PCI_DMA_TODEVICE);
716 enic_queue_wq_desc_cont(wq, skb,
717 dma_addr,
718 len,
719 (len_left == 0) &&
1825aca6
VK		 720 (len == frag_len_left), /* EOP? */
721 loopback);
ea0d7d91
SF		 722 frag_len_left -= len;
723 offset += len;
724 }
725 }
01f2e4ea
SF		 726}
727
728static inline void enic_queue_wq_skb(struct enic *enic,
729 struct vnic_wq *wq, struct sk_buff *skb)
730{
731 unsigned int mss = skb_shinfo(skb)->gso_size;
732 unsigned int vlan_tag = 0;
733 int vlan_tag_insert = 0;
1825aca6 734 int loopback = 0;
01f2e4ea 735
eab6d18d 736 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 737 /* VLAN tag from trunking driver */
738 vlan_tag_insert = 1;
739 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 740 } else if (enic->loop_enable) {
741 vlan_tag = enic->loop_tag;
742 loopback = 1;
01f2e4ea
SF		 743 }
744
745 if (mss)
746 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 747 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 748 else if (skb->ip_summed == CHECKSUM_PARTIAL)
749 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 750 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 751 else
752 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 753 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 754}
755
ed8af6b2 756/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 757static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 758 struct net_device *netdev)
01f2e4ea
SF		 759{
760 struct enic *enic = netdev_priv(netdev);
761 struct vnic_wq *wq = &enic->wq[0];
762 unsigned long flags;
763
764 if (skb->len <= 0) {
765 dev_kfree_skb(skb);
766 return NETDEV_TX_OK;
767 }
768
769 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
770 * which is very likely. In the off chance it's going to take
771 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
772 */
773
774 if (skb_shinfo(skb)->gso_size == 0 &&
775 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
776 skb_linearize(skb)) {
777 dev_kfree_skb(skb);
778 return NETDEV_TX_OK;
779 }
780
781 spin_lock_irqsave(&enic->wq_lock[0], flags);
782
ea0d7d91
SF		 783 if (vnic_wq_desc_avail(wq) <
784 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 785 netif_stop_queue(netdev);
786 /* This is a hard error, log it */
a7a79deb 787 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 788 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
789 return NETDEV_TX_BUSY;
790 }
791
792 enic_queue_wq_skb(enic, wq, skb);
793
ea0d7d91 794 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 795 netif_stop_queue(netdev);
796
01f2e4ea
SF		 797 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
798
799 return NETDEV_TX_OK;
800}
801
802/* dev_base_lock rwlock held, nominally process context */
f20530bc 803static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
804 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 805{
806 struct enic *enic = netdev_priv(netdev);
807 struct vnic_stats *stats;
808
383ab92f 809 enic_dev_stats_dump(enic, &stats);
01f2e4ea 810
25f0a061
SF		 811 net_stats->tx_packets = stats->tx.tx_frames_ok;
812 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
813 net_stats->tx_errors = stats->tx.tx_errors;
814 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 815
25f0a061
SF		 816 net_stats->rx_packets = stats->rx.rx_frames_ok;
817 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
818 net_stats->rx_errors = stats->rx.rx_errors;
819 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 820 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 821 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 822 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 823
25f0a061 824 return net_stats;
01f2e4ea
SF		 825}
826
b3abfbd2 827void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 828{
829 enic->mc_count = 0;
e0afe53f 830 enic->uc_count = 0;
99ef5639 831 enic->flags = 0;
01f2e4ea
SF		 832}
833
834static int enic_set_mac_addr(struct net_device *netdev, char *addr)
835{
f8bd9091
SF		 836 struct enic *enic = netdev_priv(netdev);
837
838 if (enic_is_dynamic(enic)) {
839 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
840 return -EADDRNOTAVAIL;
841 } else {
842 if (!is_valid_ether_addr(addr))
843 return -EADDRNOTAVAIL;
844 }
01f2e4ea
SF		 845
846 memcpy(netdev->dev_addr, addr, netdev->addr_len);
847
848 return 0;
849}
850
f8bd9091
SF		 851static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
852{
853 struct enic *enic = netdev_priv(netdev);
854 struct sockaddr *saddr = p;
855 char *addr = saddr->sa_data;
856 int err;
857
858 if (netif_running(enic->netdev)) {
859 err = enic_dev_del_station_addr(enic);
860 if (err)
861 return err;
862 }
863
864 err = enic_set_mac_addr(netdev, addr);
865 if (err)
866 return err;
867
868 if (netif_running(enic->netdev)) {
869 err = enic_dev_add_station_addr(enic);
870 if (err)
871 return err;
872 }
873
874 return err;
875}
876
877static int enic_set_mac_address(struct net_device *netdev, void *p)
878{
294dab25 879 struct sockaddr *saddr = p;
c76fd32d
VK		 880 char *addr = saddr->sa_data;
881 struct enic *enic = netdev_priv(netdev);
882 int err;
883
884 err = enic_dev_del_station_addr(enic);
885 if (err)
886 return err;
887
888 err = enic_set_mac_addr(netdev, addr);
889 if (err)
890 return err;
294dab25 891
c76fd32d 892 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 893}
894
e0afe53f 895static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 896{
319d7e84 897 struct net_device *netdev = enic->netdev;
22bedad3 898 struct netdev_hw_addr *ha;
4cd24eaf 899 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 900 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 901 unsigned int i, j;
902
319d7e84
RP		 903 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
904 netdev_warn(netdev, "Registering only %d out of %d "
905 "multicast addresses\n",
906 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 907 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 908 }
01f2e4ea
SF		 909
910 /* Is there an easier way? Trying to minimize to
911 * calls to add/del multicast addrs. We keep the
912 * addrs from the last call in enic->mc_addr and
913 * look for changes to add/del.
914 */
915
48e2f183 916 i = 0;
22bedad3 917 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 918 if (i == mc_count)
919 break;
22bedad3 920 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 921 }
922
923 for (i = 0; i < enic->mc_count; i++) {
924 for (j = 0; j < mc_count; j++)
925 if (compare_ether_addr(enic->mc_addr[i],
926 mc_addr[j]) == 0)
927 break;
928 if (j == mc_count)
319d7e84 929 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 930 }
931
932 for (i = 0; i < mc_count; i++) {
933 for (j = 0; j < enic->mc_count; j++)
934 if (compare_ether_addr(mc_addr[i],
935 enic->mc_addr[j]) == 0)
936 break;
937 if (j == enic->mc_count)
319d7e84 938 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 939 }
940
941 /* Save the list to compare against next time
942 */
943
944 for (i = 0; i < mc_count; i++)
945 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
946
947 enic->mc_count = mc_count;
01f2e4ea
SF		 948}
949
e0afe53f 950static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 951{
952 struct net_device *netdev = enic->netdev;
953 struct netdev_hw_addr *ha;
954 unsigned int uc_count = netdev_uc_count(netdev);
955 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
956 unsigned int i, j;
957
958 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
959 netdev_warn(netdev, "Registering only %d out of %d "
960 "unicast addresses\n",
961 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
962 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
963 }
964
965 /* Is there an easier way? Trying to minimize to
966 * calls to add/del unicast addrs. We keep the
967 * addrs from the last call in enic->uc_addr and
968 * look for changes to add/del.
969 */
970
971 i = 0;
972 netdev_for_each_uc_addr(ha, netdev) {
973 if (i == uc_count)
974 break;
975 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
976 }
977
978 for (i = 0; i < enic->uc_count; i++) {
979 for (j = 0; j < uc_count; j++)
980 if (compare_ether_addr(enic->uc_addr[i],
981 uc_addr[j]) == 0)
982 break;
983 if (j == uc_count)
984 enic_dev_del_addr(enic, enic->uc_addr[i]);
985 }
986
987 for (i = 0; i < uc_count; i++) {
988 for (j = 0; j < enic->uc_count; j++)
989 if (compare_ether_addr(uc_addr[i],
990 enic->uc_addr[j]) == 0)
991 break;
992 if (j == enic->uc_count)
993 enic_dev_add_addr(enic, uc_addr[i]);
994 }
995
996 /* Save the list to compare against next time
997 */
998
999 for (i = 0; i < uc_count; i++)
1000 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1001
1002 enic->uc_count = uc_count;
1003}
1004
1005/* netif_tx_lock held, BHs disabled */
1006static void enic_set_rx_mode(struct net_device *netdev)
1007{
1008 struct enic *enic = netdev_priv(netdev);
1009 int directed = 1;
1010 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1011 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1012 int promisc = (netdev->flags & IFF_PROMISC) ||
1013 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1014 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1015 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1016 unsigned int flags = netdev->flags |
1017 (allmulti ? IFF_ALLMULTI : 0) |
1018 (promisc ? IFF_PROMISC : 0);
1019
1020 if (enic->flags != flags) {
1021 enic->flags = flags;
1022 enic_dev_packet_filter(enic, directed,
1023 multicast, broadcast, promisc, allmulti);
1024 }
1025
1026 if (!promisc) {
e0afe53f 1027 enic_update_unicast_addr_list(enic);
319d7e84 1028 if (!allmulti)
e0afe53f 1029 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1030 }
1031}
1032
01f2e4ea
SF		 1033/* netif_tx_lock held, BHs disabled */
1034static void enic_tx_timeout(struct net_device *netdev)
1035{
1036 struct enic *enic = netdev_priv(netdev);
1037 schedule_work(&enic->reset);
1038}
1039
0b1c00fc
RP		 1040static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1041{
1042 struct enic *enic = netdev_priv(netdev);
1043
1044 if (vf != PORT_SELF_VF)
1045 return -EOPNOTSUPP;
1046
1047 /* Ignore the vf argument for now. We can assume the request
1048 * is coming on a vf.
1049 */
1050 if (is_valid_ether_addr(mac)) {
1051 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1052 return 0;
1053 } else
1054 return -EINVAL;
1055}
1056
f8bd9091
SF		 1057static int enic_set_vf_port(struct net_device *netdev, int vf,
1058 struct nlattr *port[])
1059{
1060 struct enic *enic = netdev_priv(netdev);
b3abfbd2
RP		 1061 struct enic_port_profile prev_pp;
1062 int err = 0, restore_pp = 1;
08f382eb 1063
b3abfbd2
RP		 1064 /* don't support VFs, yet */
1065 if (vf != PORT_SELF_VF)
1066 return -EOPNOTSUPP;
08f382eb 1067
b3abfbd2
RP		 1068 if (!port[IFLA_PORT_REQUEST])
1069 return -EOPNOTSUPP;
1070
1071 memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
1072 memset(&enic->pp, 0, sizeof(enic->pp));
1073
1074 enic->pp.set |= ENIC_SET_REQUEST;
1075 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1076
1077 if (port[IFLA_PORT_PROFILE]) {
b3abfbd2
RP		 1078 enic->pp.set |= ENIC_SET_NAME;
1079 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1080 PORT_PROFILE_MAX);
1081 }
1082
1083 if (port[IFLA_PORT_INSTANCE_UUID]) {
b3abfbd2
RP		 1084 enic->pp.set |= ENIC_SET_INSTANCE;
1085 memcpy(enic->pp.instance_uuid,
08f382eb
SF		 1086 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1087 }
1088
1089 if (port[IFLA_PORT_HOST_UUID]) {
b3abfbd2
RP		 1090 enic->pp.set |= ENIC_SET_HOST;
1091 memcpy(enic->pp.host_uuid,
08f382eb
SF		 1092 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1093 }
f8bd9091 1094
b3abfbd2
RP		 1095 /* Special case handling: mac came from IFLA_VF_MAC */
1096 if (!is_zero_ether_addr(prev_pp.vf_mac))
1097 memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d
SF		 1098
1099 if (is_zero_ether_addr(netdev->dev_addr))
1100 random_ether_addr(netdev->dev_addr);
f8bd9091 1101
b3abfbd2
RP		 1102 err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
1103 if (err) {
1104 if (restore_pp) {
1105 /* Things are still the way they were: Implicit
1106 * DISASSOCIATE failed
1107 */
1108 memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
1109 } else {
1110 memset(&enic->pp, 0, sizeof(enic->pp));
1111 memset(netdev->dev_addr, 0, ETH_ALEN);
1112 }
1113 } else {
1114 /* Set flag to indicate that the port assoc/disassoc
1115 * request has been sent out to fw
1116 */
1117 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1118
1119 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1120 if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1121 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1122 memset(netdev->dev_addr, 0, ETH_ALEN);
1123 }
1124 }
29639059 1125
29639059
RP		 1126 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1127
29639059 1128 return err;
f8bd9091
SF		 1129}
1130
1131static int enic_get_vf_port(struct net_device *netdev, int vf,
1132 struct sk_buff *skb)
1133{
1134 struct enic *enic = netdev_priv(netdev);
f8bd9091 1135 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
b3abfbd2 1136 int err;
f8bd9091 1137
4dce2396 1138 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1139 return -ENODATA;
f8bd9091 1140
b3abfbd2 1141 err = enic_process_get_pp_request(enic, enic->pp.request, &response);
f8bd9091 1142 if (err)
b3abfbd2 1143 return err;
f8bd9091
SF		 1144
1145 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1146 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1147 if (enic->pp.set & ENIC_SET_NAME)
1148 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1149 enic->pp.name);
1150 if (enic->pp.set & ENIC_SET_INSTANCE)
1151 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1152 enic->pp.instance_uuid);
1153 if (enic->pp.set & ENIC_SET_HOST)
1154 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1155 enic->pp.host_uuid);
f8bd9091
SF		 1156
1157 return 0;
1158
1159nla_put_failure:
1160 return -EMSGSIZE;
1161}
1162
01f2e4ea
SF		 1163static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1164{
1165 struct enic *enic = vnic_dev_priv(rq->vdev);
1166
1167 if (!buf->os_buf)
1168 return;
1169
1170 pci_unmap_single(enic->pdev, buf->dma_addr,
1171 buf->len, PCI_DMA_FROMDEVICE);
1172 dev_kfree_skb_any(buf->os_buf);
1173}
1174
01f2e4ea
SF		 1175static int enic_rq_alloc_buf(struct vnic_rq *rq)
1176{
1177 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1178 struct net_device *netdev = enic->netdev;
01f2e4ea 1179 struct sk_buff *skb;
1825aca6 1180 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1181 unsigned int os_buf_index = 0;
1182 dma_addr_t dma_addr;
1183
89d71a66 1184 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1185 if (!skb)
1186 return -ENOMEM;
1187
1188 dma_addr = pci_map_single(enic->pdev, skb->data,
1189 len, PCI_DMA_FROMDEVICE);
1190
1191 enic_queue_rq_desc(rq, skb, os_buf_index,
1192 dma_addr, len);
1193
1194 return 0;
1195}
1196
01f2e4ea
SF		 1197static void enic_rq_indicate_buf(struct vnic_rq *rq,
1198 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1199 int skipped, void *opaque)
1200{
1201 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1202 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1203 struct sk_buff *skb;
1204
1205 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1206 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1207 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1208 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1209 u8 packet_error;
f8cac14a 1210 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1211 u32 rss_hash;
1212
1213 if (skipped)
1214 return;
1215
1216 skb = buf->os_buf;
1217 prefetch(skb->data - NET_IP_ALIGN);
1218 pci_unmap_single(enic->pdev, buf->dma_addr,
1219 buf->len, PCI_DMA_FROMDEVICE);
1220
1221 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1222 &type, &color, &q_number, &completed_index,
1223 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1224 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1225 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1226 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1227 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1228 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1229 &fcs_ok);
1230
1231 if (packet_error) {
1232
350991e1
SF		 1233 if (!fcs_ok) {
1234 if (bytes_written > 0)
1235 enic->rq_bad_fcs++;
1236 else if (bytes_written == 0)
1237 enic->rq_truncated_pkts++;
1238 }
01f2e4ea
SF		 1239
1240 dev_kfree_skb_any(skb);
1241
1242 return;
1243 }
1244
1245 if (eop && bytes_written > 0) {
1246
1247 /* Good receive
1248 */
1249
1250 skb_put(skb, bytes_written);
86ca9db7 1251 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1252
5ec8f9b8 1253 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1254 skb->csum = htons(checksum);
1255 skb->ip_summed = CHECKSUM_COMPLETE;
1256 }
1257
86ca9db7 1258 skb->dev = netdev;
01f2e4ea 1259
6ede746b
JP		 1260 if (vlan_stripped)
1261 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1262
6ede746b
JP		 1263 if (netdev->features & NETIF_F_GRO)
1264 napi_gro_receive(&enic->napi[q_number], skb);
1265 else
1266 netif_receive_skb(skb);
01f2e4ea
SF		 1267 } else {
1268
1269 /* Buffer overflow
1270 */
1271
1272 dev_kfree_skb_any(skb);
1273 }
1274}
1275
1276static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1277 u8 type, u16 q_number, u16 completed_index, void *opaque)
1278{
1279 struct enic *enic = vnic_dev_priv(vdev);
1280
1281 vnic_rq_service(&enic->rq[q_number], cq_desc,
1282 completed_index, VNIC_RQ_RETURN_DESC,
1283 enic_rq_indicate_buf, opaque);
1284
1285 return 0;
1286}
1287
01f2e4ea
SF		 1288static int enic_poll(struct napi_struct *napi, int budget)
1289{
717258ba
VK		 1290 struct net_device *netdev = napi->dev;
1291 struct enic *enic = netdev_priv(netdev);
1292 unsigned int cq_rq = enic_cq_rq(enic, 0);
1293 unsigned int cq_wq = enic_cq_wq(enic, 0);
1294 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1295 unsigned int rq_work_to_do = budget;
1296 unsigned int wq_work_to_do = -1; /* no limit */
1297 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1298 int err;
01f2e4ea
SF		 1299
1300 /* Service RQ (first) and WQ
1301 */
1302
717258ba 1303 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1304 rq_work_to_do, enic_rq_service, NULL);
1305
717258ba 1306 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1307 wq_work_to_do, enic_wq_service, NULL);
1308
1309 /* Accumulate intr event credits for this polling
1310 * cycle. An intr event is the completion of a
1311 * a WQ or RQ packet.
1312 */
1313
1314 work_done = rq_work_done + wq_work_done;
1315
1316 if (work_done > 0)
717258ba 1317 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1318 work_done,
1319 0 /* don't unmask intr */,
1320 0 /* don't reset intr timer */);
1321
0eb26022 1322 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1323
2d6ddced
SF		 1324 /* Buffer allocation failed. Stay in polling
1325 * mode so we can try to fill the ring again.
1326 */
01f2e4ea 1327
2d6ddced
SF		 1328 if (err)
1329 rq_work_done = rq_work_to_do;
01f2e4ea 1330
2d6ddced 1331 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1332
2d6ddced 1333 /* Some work done, but not enough to stay in polling,
88132f55 1334 * exit polling
01f2e4ea
SF		 1335 */
1336
288379f0 1337 napi_complete(napi);
717258ba 1338 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1339 }
1340
1341 return rq_work_done;
1342}
1343
1344static int enic_poll_msix(struct napi_struct *napi, int budget)
1345{
717258ba
VK		 1346 struct net_device *netdev = napi->dev;
1347 struct enic *enic = netdev_priv(netdev);
1348 unsigned int rq = (napi - &enic->napi[0]);
1349 unsigned int cq = enic_cq_rq(enic, rq);
1350 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1351 unsigned int work_to_do = budget;
1352 unsigned int work_done;
2d6ddced 1353 int err;
01f2e4ea
SF		 1354
1355 /* Service RQ
1356 */
1357
717258ba 1358 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1359 work_to_do, enic_rq_service, NULL);
1360
2d6ddced
SF		 1361 /* Return intr event credits for this polling
1362 * cycle. An intr event is the completion of a
1363 * RQ packet.
1364 */
01f2e4ea 1365
2d6ddced 1366 if (work_done > 0)
717258ba 1367 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1368 work_done,
1369 0 /* don't unmask intr */,
1370 0 /* don't reset intr timer */);
01f2e4ea 1371
0eb26022 1372 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1373
1374 /* Buffer allocation failed. Stay in polling mode
1375 * so we can try to fill the ring again.
1376 */
1377
1378 if (err)
1379 work_done = work_to_do;
1380
1381 if (work_done < work_to_do) {
1382
1383 /* Some work done, but not enough to stay in polling,
88132f55 1384 * exit polling
01f2e4ea
SF		 1385 */
1386
288379f0 1387 napi_complete(napi);
717258ba 1388 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1389 }
1390
1391 return work_done;
1392}
1393
1394static void enic_notify_timer(unsigned long data)
1395{
1396 struct enic *enic = (struct enic *)data;
1397
1398 enic_notify_check(enic);
1399
25f0a061
SF		 1400 mod_timer(&enic->notify_timer,
1401 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1402}
1403
1404static void enic_free_intr(struct enic *enic)
1405{
1406 struct net_device *netdev = enic->netdev;
1407 unsigned int i;
1408
1409 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1410 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1411 free_irq(enic->pdev->irq, netdev);
1412 break;
8f4d248c
SF		 1413 case VNIC_DEV_INTR_MODE_MSI:
1414 free_irq(enic->pdev->irq, enic);
1415 break;
01f2e4ea
SF		 1416 case VNIC_DEV_INTR_MODE_MSIX:
1417 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1418 if (enic->msix[i].requested)
1419 free_irq(enic->msix_entry[i].vector,
1420 enic->msix[i].devid);
1421 break;
1422 default:
1423 break;
1424 }
1425}
1426
1427static int enic_request_intr(struct enic *enic)
1428{
1429 struct net_device *netdev = enic->netdev;
717258ba 1430 unsigned int i, intr;
01f2e4ea
SF		 1431 int err = 0;
1432
1433 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1434
1435 case VNIC_DEV_INTR_MODE_INTX:
1436
1437 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1438 IRQF_SHARED, netdev->name, netdev);
1439 break;
1440
1441 case VNIC_DEV_INTR_MODE_MSI:
1442
1443 err = request_irq(enic->pdev->irq, enic_isr_msi,
1444 0, netdev->name, enic);
1445 break;
1446
1447 case VNIC_DEV_INTR_MODE_MSIX:
1448
717258ba
VK		 1449 for (i = 0; i < enic->rq_count; i++) {
1450 intr = enic_msix_rq_intr(enic, i);
1451 sprintf(enic->msix[intr].devname,
1452 "%.11s-rx-%d", netdev->name, i);
1453 enic->msix[intr].isr = enic_isr_msix_rq;
1454 enic->msix[intr].devid = &enic->napi[i];
1455 }
01f2e4ea 1456
717258ba
VK		 1457 for (i = 0; i < enic->wq_count; i++) {
1458 intr = enic_msix_wq_intr(enic, i);
1459 sprintf(enic->msix[intr].devname,
1460 "%.11s-tx-%d", netdev->name, i);
1461 enic->msix[intr].isr = enic_isr_msix_wq;
1462 enic->msix[intr].devid = enic;
1463 }
01f2e4ea 1464
717258ba
VK		 1465 intr = enic_msix_err_intr(enic);
1466 sprintf(enic->msix[intr].devname,
01f2e4ea 1467 "%.11s-err", netdev->name);
717258ba
VK		 1468 enic->msix[intr].isr = enic_isr_msix_err;
1469 enic->msix[intr].devid = enic;
01f2e4ea 1470
717258ba
VK		 1471 intr = enic_msix_notify_intr(enic);
1472 sprintf(enic->msix[intr].devname,
01f2e4ea 1473 "%.11s-notify", netdev->name);
717258ba
VK		 1474 enic->msix[intr].isr = enic_isr_msix_notify;
1475 enic->msix[intr].devid = enic;
1476
1477 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1478 enic->msix[i].requested = 0;
01f2e4ea 1479
717258ba 1480 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1481 err = request_irq(enic->msix_entry[i].vector,
1482 enic->msix[i].isr, 0,
1483 enic->msix[i].devname,
1484 enic->msix[i].devid);
1485 if (err) {
1486 enic_free_intr(enic);
1487 break;
1488 }
1489 enic->msix[i].requested = 1;
1490 }
1491
1492 break;
1493
1494 default:
1495 break;
1496 }
1497
1498 return err;
1499}
1500
b3d18d19
SF		 1501static void enic_synchronize_irqs(struct enic *enic)
1502{
1503 unsigned int i;
1504
1505 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1506 case VNIC_DEV_INTR_MODE_INTX:
1507 case VNIC_DEV_INTR_MODE_MSI:
1508 synchronize_irq(enic->pdev->irq);
1509 break;
1510 case VNIC_DEV_INTR_MODE_MSIX:
1511 for (i = 0; i < enic->intr_count; i++)
1512 synchronize_irq(enic->msix_entry[i].vector);
1513 break;
1514 default:
1515 break;
1516 }
1517}
1518
383ab92f 1519static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1520{
1521 int err;
1522
56ac88b3 1523 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1524 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1525 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1526 err = vnic_dev_notify_set(enic->vdev,
1527 enic_legacy_notify_intr());
01f2e4ea
SF		 1528 break;
1529 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1530 err = vnic_dev_notify_set(enic->vdev,
1531 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1532 break;
1533 default:
1534 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1535 break;
1536 }
56ac88b3 1537 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1538
1539 return err;
1540}
1541
1542static void enic_notify_timer_start(struct enic *enic)
1543{
1544 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1545 case VNIC_DEV_INTR_MODE_MSI:
1546 mod_timer(&enic->notify_timer, jiffies);
1547 break;
1548 default:
1549 /* Using intr for notification for INTx/MSI-X */
1550 break;
6403eab1 1551 }
01f2e4ea
SF		 1552}
1553
1554/* rtnl lock is held, process context */
1555static int enic_open(struct net_device *netdev)
1556{
1557 struct enic *enic = netdev_priv(netdev);
1558 unsigned int i;
1559 int err;
1560
4b75a442
SF		 1561 err = enic_request_intr(enic);
1562 if (err) {
a7a79deb 1563 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1564 return err;
1565 }
1566
383ab92f 1567 err = enic_dev_notify_set(enic);
4b75a442 1568 if (err) {
a7a79deb
VK		 1569 netdev_err(netdev,
1570 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1571 goto err_out_free_intr;
1572 }
1573
01f2e4ea 1574 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1575 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1576 /* Need at least one buffer on ring to get going */
1577 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1578 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1579 err = -ENOMEM;
4b75a442 1580 goto err_out_notify_unset;
01f2e4ea
SF		 1581 }
1582 }
1583
1584 for (i = 0; i < enic->wq_count; i++)
1585 vnic_wq_enable(&enic->wq[i]);
1586 for (i = 0; i < enic->rq_count; i++)
1587 vnic_rq_enable(&enic->rq[i]);
1588
29639059
RP		 1589 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1590 enic_dev_add_addr(enic, enic->pp.mac_addr);
1591 else
1592 enic_dev_add_station_addr(enic);
319d7e84 1593 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1594
1595 netif_wake_queue(netdev);
717258ba
VK		 1596
1597 for (i = 0; i < enic->rq_count; i++)
1598 napi_enable(&enic->napi[i]);
1599
383ab92f 1600 enic_dev_enable(enic);
01f2e4ea
SF		 1601
1602 for (i = 0; i < enic->intr_count; i++)
1603 vnic_intr_unmask(&enic->intr[i]);
1604
1605 enic_notify_timer_start(enic);
1606
1607 return 0;
4b75a442
SF		 1608
1609err_out_notify_unset:
383ab92f 1610 enic_dev_notify_unset(enic);
4b75a442
SF		 1611err_out_free_intr:
1612 enic_free_intr(enic);
1613
1614 return err;
01f2e4ea
SF		 1615}
1616
1617/* rtnl lock is held, process context */
1618static int enic_stop(struct net_device *netdev)
1619{
1620 struct enic *enic = netdev_priv(netdev);
1621 unsigned int i;
1622 int err;
1623
29046f9b 1624 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1625 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1626 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1627 }
b3d18d19
SF		 1628
1629 enic_synchronize_irqs(enic);
1630
01f2e4ea
SF		 1631 del_timer_sync(&enic->notify_timer);
1632
383ab92f 1633 enic_dev_disable(enic);
717258ba
VK		 1634
1635 for (i = 0; i < enic->rq_count; i++)
1636 napi_disable(&enic->napi[i]);
1637
b3d18d19
SF		 1638 netif_carrier_off(netdev);
1639 netif_tx_disable(netdev);
29639059
RP		 1640 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1641 enic_dev_del_addr(enic, enic->pp.mac_addr);
1642 else
1643 enic_dev_del_station_addr(enic);
f8bd9091 1644
01f2e4ea
SF		 1645 for (i = 0; i < enic->wq_count; i++) {
1646 err = vnic_wq_disable(&enic->wq[i]);
1647 if (err)
1648 return err;
1649 }
1650 for (i = 0; i < enic->rq_count; i++) {
1651 err = vnic_rq_disable(&enic->rq[i]);
1652 if (err)
1653 return err;
1654 }
1655
383ab92f 1656 enic_dev_notify_unset(enic);
4b75a442
SF		 1657 enic_free_intr(enic);
1658
01f2e4ea
SF		 1659 for (i = 0; i < enic->wq_count; i++)
1660 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1661 for (i = 0; i < enic->rq_count; i++)
1662 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1663 for (i = 0; i < enic->cq_count; i++)
1664 vnic_cq_clean(&enic->cq[i]);
1665 for (i = 0; i < enic->intr_count; i++)
1666 vnic_intr_clean(&enic->intr[i]);
1667
1668 return 0;
1669}
1670
1671static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1672{
1673 struct enic *enic = netdev_priv(netdev);
1674 int running = netif_running(netdev);
1675
25f0a061
SF		 1676 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1677 return -EINVAL;
1678
c97c894d
RP		 1679 if (enic_is_dynamic(enic))
1680 return -EOPNOTSUPP;
1681
01f2e4ea
SF		 1682 if (running)
1683 enic_stop(netdev);
1684
01f2e4ea
SF		 1685 netdev->mtu = new_mtu;
1686
1687 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1688 netdev_warn(netdev,
1689 "interface MTU (%d) set higher than port MTU (%d)\n",
1690 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1691
1692 if (running)
1693 enic_open(netdev);
1694
1695 return 0;
1696}
1697
c97c894d
RP		 1698static void enic_change_mtu_work(struct work_struct *work)
1699{
1700 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1701 struct net_device *netdev = enic->netdev;
1702 int new_mtu = vnic_dev_mtu(enic->vdev);
1703 int err;
1704 unsigned int i;
1705
1706 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1707
1708 rtnl_lock();
1709
1710 /* Stop RQ */
1711 del_timer_sync(&enic->notify_timer);
1712
1713 for (i = 0; i < enic->rq_count; i++)
1714 napi_disable(&enic->napi[i]);
1715
1716 vnic_intr_mask(&enic->intr[0]);
1717 enic_synchronize_irqs(enic);
1718 err = vnic_rq_disable(&enic->rq[0]);
1719 if (err) {
1720 netdev_err(netdev, "Unable to disable RQ.\n");
1721 return;
1722 }
1723 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1724 vnic_cq_clean(&enic->cq[0]);
1725 vnic_intr_clean(&enic->intr[0]);
1726
1727 /* Fill RQ with new_mtu-sized buffers */
1728 netdev->mtu = new_mtu;
1729 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1730 /* Need at least one buffer on ring to get going */
1731 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1732 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1733 return;
1734 }
1735
1736 /* Start RQ */
1737 vnic_rq_enable(&enic->rq[0]);
1738 napi_enable(&enic->napi[0]);
1739 vnic_intr_unmask(&enic->intr[0]);
1740 enic_notify_timer_start(enic);
1741
1742 rtnl_unlock();
1743
1744 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1745}
1746
01f2e4ea
SF		 1747#ifdef CONFIG_NET_POLL_CONTROLLER
1748static void enic_poll_controller(struct net_device *netdev)
1749{
1750 struct enic *enic = netdev_priv(netdev);
1751 struct vnic_dev *vdev = enic->vdev;
717258ba 1752 unsigned int i, intr;
01f2e4ea
SF		 1753
1754 switch (vnic_dev_get_intr_mode(vdev)) {
1755 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1756 for (i = 0; i < enic->rq_count; i++) {
1757 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1758 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1759 &enic->napi[i]);
717258ba 1760 }
b880a954
VK		 1761
1762 for (i = 0; i < enic->wq_count; i++) {
1763 intr = enic_msix_wq_intr(enic, i);
1764 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1765 }
1766
01f2e4ea
SF		 1767 break;
1768 case VNIC_DEV_INTR_MODE_MSI:
1769 enic_isr_msi(enic->pdev->irq, enic);
1770 break;
1771 case VNIC_DEV_INTR_MODE_INTX:
1772 enic_isr_legacy(enic->pdev->irq, netdev);
1773 break;
1774 default:
1775 break;
1776 }
1777}
1778#endif
1779
1780static int enic_dev_wait(struct vnic_dev *vdev,
1781 int (*start)(struct vnic_dev *, int),
1782 int (*finished)(struct vnic_dev *, int *),
1783 int arg)
1784{
1785 unsigned long time;
1786 int done;
1787 int err;
1788
1789 BUG_ON(in_interrupt());
1790
1791 err = start(vdev, arg);
1792 if (err)
1793 return err;
1794
1795 /* Wait for func to complete...2 seconds max
1796 */
1797
1798 time = jiffies + (HZ * 2);
1799 do {
1800
1801 err = finished(vdev, &done);
1802 if (err)
1803 return err;
1804
1805 if (done)
1806 return 0;
1807
1808 schedule_timeout_uninterruptible(HZ / 10);
1809
1810 } while (time_after(time, jiffies));
1811
1812 return -ETIMEDOUT;
1813}
1814
1815static int enic_dev_open(struct enic *enic)
1816{
1817 int err;
1818
1819 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1820 vnic_dev_open_done, 0);
1821 if (err)
a7a79deb
VK		 1822 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1823 err);
01f2e4ea
SF		 1824
1825 return err;
1826}
1827
99ef5639 1828static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1829{
1830 int err;
1831
99ef5639
VK		 1832 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1833 vnic_dev_hang_reset_done, 0);
01f2e4ea 1834 if (err)
a7a79deb
VK		 1835 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1836 err);
01f2e4ea
SF		 1837
1838 return err;
1839}
1840
717258ba
VK		 1841static int enic_set_rsskey(struct enic *enic)
1842{
1f4f067f 1843 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1844 union vnic_rss_key *rss_key_buf_va = NULL;
1845 union vnic_rss_key rss_key = {
1846 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1847 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1848 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1849 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1850 };
1851 int err;
1852
1853 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1854 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1855 if (!rss_key_buf_va)
1856 return -ENOMEM;
1857
1858 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1859
1860 spin_lock(&enic->devcmd_lock);
1861 err = enic_set_rss_key(enic,
1862 rss_key_buf_pa,
1863 sizeof(union vnic_rss_key));
1864 spin_unlock(&enic->devcmd_lock);
1865
1866 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1867 rss_key_buf_va, rss_key_buf_pa);
1868
1869 return err;
1870}
1871
1872static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1873{
1f4f067f 1874 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1875 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1876 unsigned int i;
1877 int err;
1878
1879 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1880 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1881 if (!rss_cpu_buf_va)
1882 return -ENOMEM;
1883
1884 for (i = 0; i < (1 << rss_hash_bits); i++)
1885 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1886
1887 spin_lock(&enic->devcmd_lock);
1888 err = enic_set_rss_cpu(enic,
1889 rss_cpu_buf_pa,
1890 sizeof(union vnic_rss_cpu));
1891 spin_unlock(&enic->devcmd_lock);
1892
1893 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1894 rss_cpu_buf_va, rss_cpu_buf_pa);
1895
1896 return err;
1897}
1898
1899static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1900 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1901{
68f71708
SF		 1902 const u8 tso_ipid_split_en = 0;
1903 const u8 ig_vlan_strip_en = 1;
383ab92f 1904 int err;
68f71708 1905
717258ba
VK		 1906 /* Enable VLAN tag stripping.
1907 */
68f71708 1908
383ab92f
VK		 1909 spin_lock(&enic->devcmd_lock);
1910 err = enic_set_nic_cfg(enic,
68f71708
SF		 1911 rss_default_cpu, rss_hash_type,
1912 rss_hash_bits, rss_base_cpu,
1913 rss_enable, tso_ipid_split_en,
1914 ig_vlan_strip_en);
383ab92f
VK		 1915 spin_unlock(&enic->devcmd_lock);
1916
1917 return err;
1918}
1919
717258ba
VK		 1920static int enic_set_rss_nic_cfg(struct enic *enic)
1921{
1922 struct device *dev = enic_get_dev(enic);
1923 const u8 rss_default_cpu = 0;
1924 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1925 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1926 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1927 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1928 const u8 rss_hash_bits = 7;
1929 const u8 rss_base_cpu = 0;
1930 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1931
1932 if (rss_enable) {
1933 if (!enic_set_rsskey(enic)) {
1934 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1935 rss_enable = 0;
1936 dev_warn(dev, "RSS disabled, "
1937 "Failed to set RSS cpu indirection table.");
1938 }
1939 } else {
1940 rss_enable = 0;
1941 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1942 }
1943 }
1944
1945 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1946 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1947}
1948
01f2e4ea
SF		 1949static void enic_reset(struct work_struct *work)
1950{
1951 struct enic *enic = container_of(work, struct enic, reset);
1952
1953 if (!netif_running(enic->netdev))
1954 return;
1955
1956 rtnl_lock();
1957
383ab92f 1958 enic_dev_hang_notify(enic);
01f2e4ea 1959 enic_stop(enic->netdev);
99ef5639 1960 enic_dev_hang_reset(enic);
e0afe53f 1961 enic_reset_addr_lists(enic);
01f2e4ea 1962 enic_init_vnic_resources(enic);
717258ba 1963 enic_set_rss_nic_cfg(enic);
f8cac14a 1964 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1965 enic_open(enic->netdev);
1966
1967 rtnl_unlock();
1968}
1969
1970static int enic_set_intr_mode(struct enic *enic)
1971{
717258ba 1972 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1973 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1974 unsigned int i;
1975
1976 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1977 * on system capabilities.
01f2e4ea
SF		 1978 *
1979 * Try MSI-X first
1980 *
1981 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1982 * (the second to last INTR is used for WQ/RQ errors)
1983 * (the last INTR is used for notifications)
1984 */
1985
1986 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
1987 for (i = 0; i < n + m + 2; i++)
1988 enic->msix_entry[i].entry = i;
1989
717258ba
VK		 1990 /* Use multiple RQs if RSS is enabled
1991 */
1992
1993 if (ENIC_SETTING(enic, RSS) &&
1994 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 1995 enic->rq_count >= n &&
1996 enic->wq_count >= m &&
1997 enic->cq_count >= n + m &&
717258ba 1998 enic->intr_count >= n + m + 2) {
01f2e4ea 1999
717258ba 2000 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2001
717258ba
VK		 2002 enic->rq_count = n;
2003 enic->wq_count = m;
2004 enic->cq_count = n + m;
2005 enic->intr_count = n + m + 2;
01f2e4ea 2006
717258ba
VK		 2007 vnic_dev_set_intr_mode(enic->vdev,
2008 VNIC_DEV_INTR_MODE_MSIX);
2009
2010 return 0;
2011 }
2012 }
2013
2014 if (enic->config.intr_mode < 1 &&
2015 enic->rq_count >= 1 &&
2016 enic->wq_count >= m &&
2017 enic->cq_count >= 1 + m &&
2018 enic->intr_count >= 1 + m + 2) {
2019 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2020
2021 enic->rq_count = 1;
2022 enic->wq_count = m;
2023 enic->cq_count = 1 + m;
2024 enic->intr_count = 1 + m + 2;
2025
2026 vnic_dev_set_intr_mode(enic->vdev,
2027 VNIC_DEV_INTR_MODE_MSIX);
2028
2029 return 0;
2030 }
01f2e4ea
SF		 2031 }
2032
2033 /* Next try MSI
2034 *
2035 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2036 */
2037
2038 if (enic->config.intr_mode < 2 &&
2039 enic->rq_count >= 1 &&
2040 enic->wq_count >= 1 &&
2041 enic->cq_count >= 2 &&
2042 enic->intr_count >= 1 &&
2043 !pci_enable_msi(enic->pdev)) {
2044
2045 enic->rq_count = 1;
2046 enic->wq_count = 1;
2047 enic->cq_count = 2;
2048 enic->intr_count = 1;
2049
2050 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2051
2052 return 0;
2053 }
2054
2055 /* Next try INTx
2056 *
2057 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2058 * (the first INTR is used for WQ/RQ)
2059 * (the second INTR is used for WQ/RQ errors)
2060 * (the last INTR is used for notifications)
2061 */
2062
2063 if (enic->config.intr_mode < 3 &&
2064 enic->rq_count >= 1 &&
2065 enic->wq_count >= 1 &&
2066 enic->cq_count >= 2 &&
2067 enic->intr_count >= 3) {
2068
2069 enic->rq_count = 1;
2070 enic->wq_count = 1;
2071 enic->cq_count = 2;
2072 enic->intr_count = 3;
2073
2074 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2075
2076 return 0;
2077 }
2078
2079 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2080
2081 return -EINVAL;
2082}
2083
2084static void enic_clear_intr_mode(struct enic *enic)
2085{
2086 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2087 case VNIC_DEV_INTR_MODE_MSIX:
2088 pci_disable_msix(enic->pdev);
2089 break;
2090 case VNIC_DEV_INTR_MODE_MSI:
2091 pci_disable_msi(enic->pdev);
2092 break;
2093 default:
2094 break;
2095 }
2096
2097 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2098}
2099
f8bd9091
SF		 2100static const struct net_device_ops enic_netdev_dynamic_ops = {
2101 .ndo_open = enic_open,
2102 .ndo_stop = enic_stop,
2103 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2104 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2105 .ndo_validate_addr = eth_validate_addr,
319d7e84
RP		 2106 .ndo_set_rx_mode = enic_set_rx_mode,
2107 .ndo_set_multicast_list = enic_set_rx_mode,
f8bd9091
SF		 2108 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2109 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2110 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2111 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2112 .ndo_tx_timeout = enic_tx_timeout,
2113 .ndo_set_vf_port = enic_set_vf_port,
2114 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2115 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2116#ifdef CONFIG_NET_POLL_CONTROLLER
2117 .ndo_poll_controller = enic_poll_controller,
2118#endif
2119};
2120
afe29f7a
SH		 2121static const struct net_device_ops enic_netdev_ops = {
2122 .ndo_open = enic_open,
2123 .ndo_stop = enic_stop,
00829823 2124 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2125 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2126 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2127 .ndo_set_mac_address = enic_set_mac_address,
319d7e84
RP		 2128 .ndo_set_rx_mode = enic_set_rx_mode,
2129 .ndo_set_multicast_list = enic_set_rx_mode,
afe29f7a 2130 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2131 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2132 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2133 .ndo_tx_timeout = enic_tx_timeout,
2134#ifdef CONFIG_NET_POLL_CONTROLLER
2135 .ndo_poll_controller = enic_poll_controller,
2136#endif
2137};
2138
2fdba388 2139static void enic_dev_deinit(struct enic *enic)
6fdfa970 2140{
717258ba
VK		 2141 unsigned int i;
2142
2143 for (i = 0; i < enic->rq_count; i++)
2144 netif_napi_del(&enic->napi[i]);
2145
6fdfa970
SF		 2146 enic_free_vnic_resources(enic);
2147 enic_clear_intr_mode(enic);
2148}
2149
2fdba388 2150static int enic_dev_init(struct enic *enic)
6fdfa970 2151{
a7a79deb 2152 struct device *dev = enic_get_dev(enic);
6fdfa970 2153 struct net_device *netdev = enic->netdev;
717258ba 2154 unsigned int i;
6fdfa970
SF		 2155 int err;
2156
ea7ea65a
VK		 2157 /* Get interrupt coalesce timer info */
2158 err = enic_dev_intr_coal_timer_info(enic);
2159 if (err) {
2160 dev_warn(dev, "Using default conversion factor for "
2161 "interrupt coalesce timer\n");
2162 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2163 }
2164
6fdfa970
SF		 2165 /* Get vNIC configuration
2166 */
2167
2168 err = enic_get_vnic_config(enic);
2169 if (err) {
a7a79deb 2170 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2171 return err;
2172 }
2173
2174 /* Get available resource counts
2175 */
2176
2177 enic_get_res_counts(enic);
2178
2179 /* Set interrupt mode based on resource counts and system
2180 * capabilities
2181 */
2182
2183 err = enic_set_intr_mode(enic);
2184 if (err) {
a7a79deb
VK		 2185 dev_err(dev, "Failed to set intr mode based on resource "
2186 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2187 return err;
2188 }
2189
2190 /* Allocate and configure vNIC resources
2191 */
2192
2193 err = enic_alloc_vnic_resources(enic);
2194 if (err) {
a7a79deb 2195 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2196 goto err_out_free_vnic_resources;
2197 }
2198
2199 enic_init_vnic_resources(enic);
2200
717258ba 2201 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2202 if (err) {
a7a79deb 2203 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2204 goto err_out_free_vnic_resources;
2205 }
2206
2207 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2208 default:
717258ba 2209 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2210 break;
2211 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2212 for (i = 0; i < enic->rq_count; i++)
2213 netif_napi_add(netdev, &enic->napi[i],
2214 enic_poll_msix, 64);
6fdfa970
SF		 2215 break;
2216 }
2217
2218 return 0;
2219
2220err_out_free_vnic_resources:
2221 enic_clear_intr_mode(enic);
2222 enic_free_vnic_resources(enic);
2223
2224 return err;
2225}
2226
27e6c7d3
SF		 2227static void enic_iounmap(struct enic *enic)
2228{
2229 unsigned int i;
2230
2231 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2232 if (enic->bar[i].vaddr)
2233 iounmap(enic->bar[i].vaddr);
2234}
2235
01f2e4ea
SF		 2236static int __devinit enic_probe(struct pci_dev *pdev,
2237 const struct pci_device_id *ent)
2238{
a7a79deb 2239 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2240 struct net_device *netdev;
2241 struct enic *enic;
2242 int using_dac = 0;
2243 unsigned int i;
2244 int err;
2245
01f2e4ea
SF		 2246 /* Allocate net device structure and initialize. Private
2247 * instance data is initialized to zero.
2248 */
2249
2250 netdev = alloc_etherdev(sizeof(struct enic));
2251 if (!netdev) {
a7a79deb 2252 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2253 return -ENOMEM;
2254 }
2255
01f2e4ea
SF		 2256 pci_set_drvdata(pdev, netdev);
2257
2258 SET_NETDEV_DEV(netdev, &pdev->dev);
2259
2260 enic = netdev_priv(netdev);
2261 enic->netdev = netdev;
2262 enic->pdev = pdev;
2263
2264 /* Setup PCI resources
2265 */
2266
29046f9b 2267 err = pci_enable_device_mem(pdev);
01f2e4ea 2268 if (err) {
a7a79deb 2269 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2270 goto err_out_free_netdev;
2271 }
2272
2273 err = pci_request_regions(pdev, DRV_NAME);
2274 if (err) {
a7a79deb 2275 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2276 goto err_out_disable_device;
2277 }
2278
2279 pci_set_master(pdev);
2280
2281 /* Query PCI controller on system for DMA addressing
2282 * limitation for the device. Try 40-bit first, and
2283 * fail to 32-bit.
2284 */
2285
50cf156a 2286 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2287 if (err) {
284901a9 2288 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2289 if (err) {
a7a79deb 2290 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2291 goto err_out_release_regions;
2292 }
284901a9 2293 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2294 if (err) {
a7a79deb
VK		 2295 dev_err(dev, "Unable to obtain %u-bit DMA "
2296 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2297 goto err_out_release_regions;
2298 }
2299 } else {
50cf156a 2300 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2301 if (err) {
a7a79deb
VK		 2302 dev_err(dev, "Unable to obtain %u-bit DMA "
2303 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2304 goto err_out_release_regions;
2305 }
2306 using_dac = 1;
2307 }
2308
27e6c7d3 2309 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2310 */
2311
27e6c7d3
SF		 2312 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2313 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2314 continue;
2315 enic->bar[i].len = pci_resource_len(pdev, i);
2316 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2317 if (!enic->bar[i].vaddr) {
a7a79deb 2318 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2319 err = -ENODEV;
2320 goto err_out_iounmap;
2321 }
2322 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2323 }
2324
2325 /* Register vNIC device
2326 */
2327
27e6c7d3
SF		 2328 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2329 ARRAY_SIZE(enic->bar));
01f2e4ea 2330 if (!enic->vdev) {
a7a79deb 2331 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2332 err = -ENODEV;
2333 goto err_out_iounmap;
2334 }
2335
2336 /* Issue device open to get device in known state
2337 */
2338
2339 err = enic_dev_open(enic);
2340 if (err) {
a7a79deb 2341 dev_err(dev, "vNIC dev open failed, aborting\n");
01f2e4ea
SF		 2342 goto err_out_vnic_unregister;
2343 }
2344
69161425
VK		 2345 /* Setup devcmd lock
2346 */
2347
2348 spin_lock_init(&enic->devcmd_lock);
2349
2350 /*
2351 * Set ingress vlan rewrite mode before vnic initialization
2352 */
2353
2354 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2355 if (err) {
2356 dev_err(dev,
2357 "Failed to set ingress vlan rewrite mode, aborting.\n");
2358 goto err_out_dev_close;
2359 }
2360
01f2e4ea
SF		 2361 /* Issue device init to initialize the vnic-to-switch link.
2362 * We'll start with carrier off and wait for link UP
2363 * notification later to turn on carrier. We don't need
2364 * to wait here for the vnic-to-switch link initialization
2365 * to complete; link UP notification is the indication that
2366 * the process is complete.
2367 */
2368
2369 netif_carrier_off(netdev);
2370
a7a79deb
VK		 2371 /* Do not call dev_init for a dynamic vnic.
2372 * For a dynamic vnic, init_prov_info will be
2373 * called later by an upper layer.
2374 */
2375
f8bd9091
SF		 2376 if (!enic_is_dynamic(enic)) {
2377 err = vnic_dev_init(enic->vdev, 0);
2378 if (err) {
a7a79deb 2379 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2380 goto err_out_dev_close;
2381 }
01f2e4ea
SF		 2382 }
2383
6fdfa970 2384 err = enic_dev_init(enic);
01f2e4ea 2385 if (err) {
a7a79deb 2386 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2387 goto err_out_dev_close;
2388 }
2389
383ab92f 2390 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2391 */
2392
2393 init_timer(&enic->notify_timer);
2394 enic->notify_timer.function = enic_notify_timer;
2395 enic->notify_timer.data = (unsigned long)enic;
2396
2397 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2398 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2399
2400 for (i = 0; i < enic->wq_count; i++)
2401 spin_lock_init(&enic->wq_lock[i]);
2402
01f2e4ea
SF		 2403 /* Register net device
2404 */
2405
2406 enic->port_mtu = enic->config.mtu;
2407 (void)enic_change_mtu(netdev, enic->port_mtu);
2408
2409 err = enic_set_mac_addr(netdev, enic->mac_addr);
2410 if (err) {
a7a79deb 2411 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2412 goto err_out_dev_deinit;
01f2e4ea
SF		 2413 }
2414
7c844599
SF		 2415 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2416 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2417
f8bd9091
SF		 2418 if (enic_is_dynamic(enic))
2419 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2420 else
2421 netdev->netdev_ops = &enic_netdev_ops;
2422
01f2e4ea
SF		 2423 netdev->watchdog_timeo = 2 * HZ;
2424 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2425
73c1ea9b 2426 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2427 if (ENIC_SETTING(enic, LOOP)) {
2428 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2429 enic->loop_enable = 1;
2430 enic->loop_tag = enic->config.loop_tag;
2431 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2432 }
01f2e4ea 2433 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2434 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2435 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2436 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2437 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2438 if (ENIC_SETTING(enic, RXCSUM))
2439 netdev->hw_features |= NETIF_F_RXCSUM;
2440
2441 netdev->features |= netdev->hw_features;
2442
01f2e4ea
SF		 2443 if (using_dac)
2444 netdev->features |= NETIF_F_HIGHDMA;
2445
01789349
JP		 2446 netdev->priv_flags |= IFF_UNICAST_FLT;
2447
01f2e4ea
SF		 2448 err = register_netdev(netdev);
2449 if (err) {
a7a79deb 2450 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2451 goto err_out_dev_deinit;
01f2e4ea
SF		 2452 }
2453
2454 return 0;
2455
6fdfa970
SF		 2456err_out_dev_deinit:
2457 enic_dev_deinit(enic);
01f2e4ea
SF		 2458err_out_dev_close:
2459 vnic_dev_close(enic->vdev);
2460err_out_vnic_unregister:
01f2e4ea
SF		 2461 vnic_dev_unregister(enic->vdev);
2462err_out_iounmap:
2463 enic_iounmap(enic);
2464err_out_release_regions:
2465 pci_release_regions(pdev);
2466err_out_disable_device:
2467 pci_disable_device(pdev);
2468err_out_free_netdev:
2469 pci_set_drvdata(pdev, NULL);
2470 free_netdev(netdev);
2471
2472 return err;
2473}
2474
2475static void __devexit enic_remove(struct pci_dev *pdev)
2476{
2477 struct net_device *netdev = pci_get_drvdata(pdev);
2478
2479 if (netdev) {
2480 struct enic *enic = netdev_priv(netdev);
2481
23f333a2 2482 cancel_work_sync(&enic->reset);
c97c894d 2483 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2484 unregister_netdev(netdev);
6fdfa970 2485 enic_dev_deinit(enic);
01f2e4ea 2486 vnic_dev_close(enic->vdev);
01f2e4ea
SF		 2487 vnic_dev_unregister(enic->vdev);
2488 enic_iounmap(enic);
2489 pci_release_regions(pdev);
2490 pci_disable_device(pdev);
2491 pci_set_drvdata(pdev, NULL);
2492 free_netdev(netdev);
2493 }
2494}
2495
2496static struct pci_driver enic_driver = {
2497 .name = DRV_NAME,
2498 .id_table = enic_id_table,
2499 .probe = enic_probe,
2500 .remove = __devexit_p(enic_remove),
2501};
2502
2503static int __init enic_init_module(void)
2504{
a7a79deb 2505 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2506
2507 return pci_register_driver(&enic_driver);
2508}
2509
2510static void __exit enic_cleanup_module(void)
2511{
2512 pci_unregister_driver(&enic_driver);
2513}
2514
2515module_init(enic_init_module);
2516module_exit(enic_cleanup_module);
Linux kernel - Deliverables
This page took 0.486632 seconds and 5 git commands to generate.