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drivers/net: Remove alloc_etherdev error messages
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
3a4adef5 60#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
01f2e4ea
SF		 61
62/* Supported devices */
a3aa1884 63static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 65 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
3a4adef5 66 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
01f2e4ea
SF		 67 { 0, } /* end of table */
68};
69
70MODULE_DESCRIPTION(DRV_DESCRIPTION);
71MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
72MODULE_LICENSE("GPL");
73MODULE_VERSION(DRV_VERSION);
74MODULE_DEVICE_TABLE(pci, enic_id_table);
75
76struct enic_stat {
77 char name[ETH_GSTRING_LEN];
78 unsigned int offset;
79};
80
81#define ENIC_TX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
83#define ENIC_RX_STAT(stat) \
84 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
85
86static const struct enic_stat enic_tx_stats[] = {
87 ENIC_TX_STAT(tx_frames_ok),
88 ENIC_TX_STAT(tx_unicast_frames_ok),
89 ENIC_TX_STAT(tx_multicast_frames_ok),
90 ENIC_TX_STAT(tx_broadcast_frames_ok),
91 ENIC_TX_STAT(tx_bytes_ok),
92 ENIC_TX_STAT(tx_unicast_bytes_ok),
93 ENIC_TX_STAT(tx_multicast_bytes_ok),
94 ENIC_TX_STAT(tx_broadcast_bytes_ok),
95 ENIC_TX_STAT(tx_drops),
96 ENIC_TX_STAT(tx_errors),
97 ENIC_TX_STAT(tx_tso),
98};
99
100static const struct enic_stat enic_rx_stats[] = {
101 ENIC_RX_STAT(rx_frames_ok),
102 ENIC_RX_STAT(rx_frames_total),
103 ENIC_RX_STAT(rx_unicast_frames_ok),
104 ENIC_RX_STAT(rx_multicast_frames_ok),
105 ENIC_RX_STAT(rx_broadcast_frames_ok),
106 ENIC_RX_STAT(rx_bytes_ok),
107 ENIC_RX_STAT(rx_unicast_bytes_ok),
108 ENIC_RX_STAT(rx_multicast_bytes_ok),
109 ENIC_RX_STAT(rx_broadcast_bytes_ok),
110 ENIC_RX_STAT(rx_drop),
111 ENIC_RX_STAT(rx_no_bufs),
112 ENIC_RX_STAT(rx_errors),
113 ENIC_RX_STAT(rx_rss),
114 ENIC_RX_STAT(rx_crc_errors),
115 ENIC_RX_STAT(rx_frames_64),
116 ENIC_RX_STAT(rx_frames_127),
117 ENIC_RX_STAT(rx_frames_255),
118 ENIC_RX_STAT(rx_frames_511),
119 ENIC_RX_STAT(rx_frames_1023),
120 ENIC_RX_STAT(rx_frames_1518),
121 ENIC_RX_STAT(rx_frames_to_max),
122};
123
124static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
125static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
126
3f192795 127int enic_is_dynamic(struct enic *enic)
f8bd9091
SF		 128{
129 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
130}
131
8749b427
RP		 132int enic_sriov_enabled(struct enic *enic)
133{
134 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
135}
136
3a4adef5
RP		 137static int enic_is_sriov_vf(struct enic *enic)
138{
139 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
140}
141
889d13f5
RP		 142int enic_is_valid_vf(struct enic *enic, int vf)
143{
144#ifdef CONFIG_PCI_IOV
145 return vf >= 0 && vf < enic->num_vfs;
146#else
147 return 0;
148#endif
149}
150
717258ba
VK		 151static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
152{
153 return rq;
154}
155
156static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
157{
158 return enic->rq_count + wq;
159}
160
161static inline unsigned int enic_legacy_io_intr(void)
162{
163 return 0;
164}
165
166static inline unsigned int enic_legacy_err_intr(void)
167{
168 return 1;
169}
170
171static inline unsigned int enic_legacy_notify_intr(void)
172{
173 return 2;
174}
175
176static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
177{
7d260ec2 178 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 179}
180
181static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
182{
7d260ec2 183 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 184}
185
186static inline unsigned int enic_msix_err_intr(struct enic *enic)
187{
188 return enic->rq_count + enic->wq_count;
189}
190
191static inline unsigned int enic_msix_notify_intr(struct enic *enic)
192{
193 return enic->rq_count + enic->wq_count + 1;
194}
195
01f2e4ea
SF		 196static int enic_get_settings(struct net_device *netdev,
197 struct ethtool_cmd *ecmd)
198{
199 struct enic *enic = netdev_priv(netdev);
200
201 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
202 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
203 ecmd->port = PORT_FIBRE;
204 ecmd->transceiver = XCVR_EXTERNAL;
205
206 if (netif_carrier_ok(netdev)) {
70739497 207 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 208 ecmd->duplex = DUPLEX_FULL;
209 } else {
70739497 210 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 211 ecmd->duplex = -1;
212 }
213
214 ecmd->autoneg = AUTONEG_DISABLE;
215
216 return 0;
217}
218
219static void enic_get_drvinfo(struct net_device *netdev,
220 struct ethtool_drvinfo *drvinfo)
221{
222 struct enic *enic = netdev_priv(netdev);
223 struct vnic_devcmd_fw_info *fw_info;
224
383ab92f 225 enic_dev_fw_info(enic, &fw_info);
01f2e4ea 226
612a94d6
RJ		 227 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
228 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
229 strlcpy(drvinfo->fw_version, fw_info->fw_version,
01f2e4ea 230 sizeof(drvinfo->fw_version));
612a94d6 231 strlcpy(drvinfo->bus_info, pci_name(enic->pdev),
01f2e4ea
SF		 232 sizeof(drvinfo->bus_info));
233}
234
235static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
236{
237 unsigned int i;
238
239 switch (stringset) {
240 case ETH_SS_STATS:
241 for (i = 0; i < enic_n_tx_stats; i++) {
242 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
243 data += ETH_GSTRING_LEN;
244 }
245 for (i = 0; i < enic_n_rx_stats; i++) {
246 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
247 data += ETH_GSTRING_LEN;
248 }
249 break;
250 }
251}
252
25f0a061 253static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 254{
25f0a061
SF		 255 switch (sset) {
256 case ETH_SS_STATS:
257 return enic_n_tx_stats + enic_n_rx_stats;
258 default:
259 return -EOPNOTSUPP;
260 }
01f2e4ea
SF		 261}
262
263static void enic_get_ethtool_stats(struct net_device *netdev,
264 struct ethtool_stats *stats, u64 *data)
265{
266 struct enic *enic = netdev_priv(netdev);
267 struct vnic_stats *vstats;
268 unsigned int i;
269
383ab92f 270 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 271
272 for (i = 0; i < enic_n_tx_stats; i++)
273 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
274 for (i = 0; i < enic_n_rx_stats; i++)
275 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
276}
277
01f2e4ea
SF		 278static u32 enic_get_msglevel(struct net_device *netdev)
279{
280 struct enic *enic = netdev_priv(netdev);
281 return enic->msg_enable;
282}
283
284static void enic_set_msglevel(struct net_device *netdev, u32 value)
285{
286 struct enic *enic = netdev_priv(netdev);
287 enic->msg_enable = value;
288}
289
7c844599
SF		 290static int enic_get_coalesce(struct net_device *netdev,
291 struct ethtool_coalesce *ecmd)
292{
293 struct enic *enic = netdev_priv(netdev);
294
295 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
296 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
297
298 return 0;
299}
300
301static int enic_set_coalesce(struct net_device *netdev,
302 struct ethtool_coalesce *ecmd)
303{
304 struct enic *enic = netdev_priv(netdev);
305 u32 tx_coalesce_usecs;
306 u32 rx_coalesce_usecs;
717258ba 307 unsigned int i, intr;
7c844599 308
ea7ea65a
VK		 309 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
310 vnic_dev_get_intr_coal_timer_max(enic->vdev));
311 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
312 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 313
314 switch (vnic_dev_get_intr_mode(enic->vdev)) {
315 case VNIC_DEV_INTR_MODE_INTX:
316 if (tx_coalesce_usecs != rx_coalesce_usecs)
317 return -EINVAL;
318
717258ba
VK		 319 intr = enic_legacy_io_intr();
320 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 321 tx_coalesce_usecs);
7c844599
SF		 322 break;
323 case VNIC_DEV_INTR_MODE_MSI:
324 if (tx_coalesce_usecs != rx_coalesce_usecs)
325 return -EINVAL;
326
327 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 328 tx_coalesce_usecs);
7c844599
SF		 329 break;
330 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 331 for (i = 0; i < enic->wq_count; i++) {
332 intr = enic_msix_wq_intr(enic, i);
333 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 334 tx_coalesce_usecs);
717258ba
VK		 335 }
336
337 for (i = 0; i < enic->rq_count; i++) {
338 intr = enic_msix_rq_intr(enic, i);
339 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 340 rx_coalesce_usecs);
717258ba
VK		 341 }
342
7c844599
SF		 343 break;
344 default:
345 break;
346 }
347
348 enic->tx_coalesce_usecs = tx_coalesce_usecs;
349 enic->rx_coalesce_usecs = rx_coalesce_usecs;
350
351 return 0;
352}
353
0fc0b732 354static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 355 .get_settings = enic_get_settings,
356 .get_drvinfo = enic_get_drvinfo,
357 .get_msglevel = enic_get_msglevel,
358 .set_msglevel = enic_set_msglevel,
359 .get_link = ethtool_op_get_link,
360 .get_strings = enic_get_strings,
25f0a061 361 .get_sset_count = enic_get_sset_count,
01f2e4ea 362 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 363 .get_coalesce = enic_get_coalesce,
364 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 365};
366
367static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
368{
369 struct enic *enic = vnic_dev_priv(wq->vdev);
370
371 if (buf->sop)
372 pci_unmap_single(enic->pdev, buf->dma_addr,
373 buf->len, PCI_DMA_TODEVICE);
374 else
375 pci_unmap_page(enic->pdev, buf->dma_addr,
376 buf->len, PCI_DMA_TODEVICE);
377
378 if (buf->os_buf)
379 dev_kfree_skb_any(buf->os_buf);
380}
381
382static void enic_wq_free_buf(struct vnic_wq *wq,
383 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
384{
385 enic_free_wq_buf(wq, buf);
386}
387
388static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
389 u8 type, u16 q_number, u16 completed_index, void *opaque)
390{
391 struct enic *enic = vnic_dev_priv(vdev);
392
393 spin_lock(&enic->wq_lock[q_number]);
394
395 vnic_wq_service(&enic->wq[q_number], cq_desc,
396 completed_index, enic_wq_free_buf,
397 opaque);
398
399 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 400 vnic_wq_desc_avail(&enic->wq[q_number]) >=
401 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 402 netif_wake_queue(enic->netdev);
403
404 spin_unlock(&enic->wq_lock[q_number]);
405
406 return 0;
407}
408
409static void enic_log_q_error(struct enic *enic)
410{
411 unsigned int i;
412 u32 error_status;
413
414 for (i = 0; i < enic->wq_count; i++) {
415 error_status = vnic_wq_error_status(&enic->wq[i]);
416 if (error_status)
a7a79deb
VK		 417 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
418 i, error_status);
01f2e4ea
SF		 419 }
420
421 for (i = 0; i < enic->rq_count; i++) {
422 error_status = vnic_rq_error_status(&enic->rq[i]);
423 if (error_status)
a7a79deb
VK		 424 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
425 i, error_status);
01f2e4ea
SF		 426 }
427}
428
383ab92f 429static void enic_msglvl_check(struct enic *enic)
01f2e4ea 430{
383ab92f 431 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 432
383ab92f 433 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 434 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
435 enic->msg_enable, msg_enable);
383ab92f 436 enic->msg_enable = msg_enable;
01f2e4ea
SF		 437 }
438}
439
440static void enic_mtu_check(struct enic *enic)
441{
442 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 443 struct net_device *netdev = enic->netdev;
01f2e4ea 444
491598a4 445 if (mtu && mtu != enic->port_mtu) {
7c844599 446 enic->port_mtu = mtu;
7335903c 447 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
c97c894d
RP		 448 mtu = max_t(int, ENIC_MIN_MTU,
449 min_t(int, ENIC_MAX_MTU, mtu));
450 if (mtu != netdev->mtu)
451 schedule_work(&enic->change_mtu_work);
452 } else {
453 if (mtu < netdev->mtu)
454 netdev_warn(netdev,
455 "interface MTU (%d) set higher "
456 "than switch port MTU (%d)\n",
457 netdev->mtu, mtu);
458 }
01f2e4ea
SF		 459 }
460}
461
383ab92f 462static void enic_link_check(struct enic *enic)
01f2e4ea 463{
383ab92f
VK		 464 int link_status = vnic_dev_link_status(enic->vdev);
465 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 466
383ab92f 467 if (link_status && !carrier_ok) {
a7a79deb 468 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 469 netif_carrier_on(enic->netdev);
470 } else if (!link_status && carrier_ok) {
a7a79deb 471 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 472 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 473 }
474}
475
476static void enic_notify_check(struct enic *enic)
477{
478 enic_msglvl_check(enic);
479 enic_mtu_check(enic);
480 enic_link_check(enic);
481}
482
483#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
484
485static irqreturn_t enic_isr_legacy(int irq, void *data)
486{
487 struct net_device *netdev = data;
488 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 489 unsigned int io_intr = enic_legacy_io_intr();
490 unsigned int err_intr = enic_legacy_err_intr();
491 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 492 u32 pba;
493
717258ba 494 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 495
496 pba = vnic_intr_legacy_pba(enic->legacy_pba);
497 if (!pba) {
717258ba 498 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 499 return IRQ_NONE; /* not our interrupt */
500 }
501
717258ba
VK		 502 if (ENIC_TEST_INTR(pba, notify_intr)) {
503 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 504 enic_notify_check(enic);
ed8af6b2 505 }
01f2e4ea 506
717258ba
VK		 507 if (ENIC_TEST_INTR(pba, err_intr)) {
508 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 509 enic_log_q_error(enic);
510 /* schedule recovery from WQ/RQ error */
511 schedule_work(&enic->reset);
512 return IRQ_HANDLED;
513 }
514
717258ba
VK		 515 if (ENIC_TEST_INTR(pba, io_intr)) {
516 if (napi_schedule_prep(&enic->napi[0]))
517 __napi_schedule(&enic->napi[0]);
01f2e4ea 518 } else {
717258ba 519 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 520 }
521
522 return IRQ_HANDLED;
523}
524
525static irqreturn_t enic_isr_msi(int irq, void *data)
526{
527 struct enic *enic = data;
528
529 /* With MSI, there is no sharing of interrupts, so this is
530 * our interrupt and there is no need to ack it. The device
531 * is not providing per-vector masking, so the OS will not
532 * write to PCI config space to mask/unmask the interrupt.
533 * We're using mask_on_assertion for MSI, so the device
534 * automatically masks the interrupt when the interrupt is
535 * generated. Later, when exiting polling, the interrupt
536 * will be unmasked (see enic_poll).
537 *
538 * Also, the device uses the same PCIe Traffic Class (TC)
539 * for Memory Write data and MSI, so there are no ordering
540 * issues; the MSI will always arrive at the Root Complex
541 * _after_ corresponding Memory Writes (i.e. descriptor
542 * writes).
543 */
544
717258ba 545 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 546
547 return IRQ_HANDLED;
548}
549
550static irqreturn_t enic_isr_msix_rq(int irq, void *data)
551{
717258ba 552 struct napi_struct *napi = data;
01f2e4ea
SF		 553
554 /* schedule NAPI polling for RQ cleanup */
717258ba 555 napi_schedule(napi);
01f2e4ea
SF		 556
557 return IRQ_HANDLED;
558}
559
560static irqreturn_t enic_isr_msix_wq(int irq, void *data)
561{
562 struct enic *enic = data;
717258ba
VK		 563 unsigned int cq = enic_cq_wq(enic, 0);
564 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 565 unsigned int wq_work_to_do = -1; /* no limit */
566 unsigned int wq_work_done;
567
717258ba 568 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 569 wq_work_to_do, enic_wq_service, NULL);
570
717258ba 571 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 572 wq_work_done,
573 1 /* unmask intr */,
574 1 /* reset intr timer */);
575
576 return IRQ_HANDLED;
577}
578
579static irqreturn_t enic_isr_msix_err(int irq, void *data)
580{
581 struct enic *enic = data;
717258ba 582 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 583
717258ba 584 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 585
01f2e4ea
SF		 586 enic_log_q_error(enic);
587
588 /* schedule recovery from WQ/RQ error */
589 schedule_work(&enic->reset);
590
591 return IRQ_HANDLED;
592}
593
594static irqreturn_t enic_isr_msix_notify(int irq, void *data)
595{
596 struct enic *enic = data;
717258ba 597 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 598
717258ba 599 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 600 enic_notify_check(enic);
01f2e4ea
SF		 601
602 return IRQ_HANDLED;
603}
604
605static inline void enic_queue_wq_skb_cont(struct enic *enic,
606 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 607 unsigned int len_left, int loopback)
01f2e4ea 608{
9e903e08 609 const skb_frag_t *frag;
01f2e4ea
SF		 610
611 /* Queue additional data fragments */
612 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08 613 len_left -= skb_frag_size(frag);
01f2e4ea 614 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf 615 skb_frag_dma_map(&enic->pdev->dev,
9e903e08 616 frag, 0, skb_frag_size(frag),
5d6bcdfe 617 DMA_TO_DEVICE),
9e903e08 618 skb_frag_size(frag),
1825aca6
VK		 619 (len_left == 0), /* EOP? */
620 loopback);
01f2e4ea
SF		 621 }
622}
623
624static inline void enic_queue_wq_skb_vlan(struct enic *enic,
625 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 626 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 627{
628 unsigned int head_len = skb_headlen(skb);
629 unsigned int len_left = skb->len - head_len;
630 int eop = (len_left == 0);
631
ea0d7d91
SF		 632 /* Queue the main skb fragment. The fragments are no larger
633 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
634 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
635 * per fragment is queued.
636 */
01f2e4ea
SF		 637 enic_queue_wq_desc(wq, skb,
638 pci_map_single(enic->pdev, skb->data,
639 head_len, PCI_DMA_TODEVICE),
640 head_len,
641 vlan_tag_insert, vlan_tag,
1825aca6 642 eop, loopback);
01f2e4ea
SF		 643
644 if (!eop)
1825aca6 645 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 646}
647
648static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
649 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 650 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 651{
652 unsigned int head_len = skb_headlen(skb);
653 unsigned int len_left = skb->len - head_len;
0d0b1672 654 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 655 unsigned int csum_offset = hdr_len + skb->csum_offset;
656 int eop = (len_left == 0);
657
ea0d7d91
SF		 658 /* Queue the main skb fragment. The fragments are no larger
659 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
660 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
661 * per fragment is queued.
662 */
01f2e4ea
SF		 663 enic_queue_wq_desc_csum_l4(wq, skb,
664 pci_map_single(enic->pdev, skb->data,
665 head_len, PCI_DMA_TODEVICE),
666 head_len,
667 csum_offset,
668 hdr_len,
669 vlan_tag_insert, vlan_tag,
1825aca6 670 eop, loopback);
01f2e4ea
SF		 671
672 if (!eop)
1825aca6 673 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 674}
675
676static inline void enic_queue_wq_skb_tso(struct enic *enic,
677 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 678 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 679{
ea0d7d91
SF		 680 unsigned int frag_len_left = skb_headlen(skb);
681 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 682 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
683 int eop = (len_left == 0);
ea0d7d91
SF		 684 unsigned int len;
685 dma_addr_t dma_addr;
686 unsigned int offset = 0;
687 skb_frag_t *frag;
01f2e4ea
SF		 688
689 /* Preload TCP csum field with IP pseudo hdr calculated
690 * with IP length set to zero. HW will later add in length
691 * to each TCP segment resulting from the TSO.
692 */
693
09640e63 694 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 695 ip_hdr(skb)->check = 0;
696 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
697 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 698 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 699 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
700 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
701 }
702
ea0d7d91
SF		 703 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
704 * for the main skb fragment
705 */
706 while (frag_len_left) {
707 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
708 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
709 len, PCI_DMA_TODEVICE);
710 enic_queue_wq_desc_tso(wq, skb,
711 dma_addr,
712 len,
713 mss, hdr_len,
714 vlan_tag_insert, vlan_tag,
1825aca6 715 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 716 frag_len_left -= len;
717 offset += len;
718 }
01f2e4ea 719
ea0d7d91
SF		 720 if (eop)
721 return;
722
723 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
724 * for additional data fragments
725 */
726 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08
ED		 727 len_left -= skb_frag_size(frag);
728 frag_len_left = skb_frag_size(frag);
4bf5adbf 729 offset = 0;
ea0d7d91
SF		 730
731 while (frag_len_left) {
732 len = min(frag_len_left,
733 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 734 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
735 offset, len,
5d6bcdfe 736 DMA_TO_DEVICE);
ea0d7d91
SF		 737 enic_queue_wq_desc_cont(wq, skb,
738 dma_addr,
739 len,
740 (len_left == 0) &&
1825aca6
VK		 741 (len == frag_len_left), /* EOP? */
742 loopback);
ea0d7d91
SF		 743 frag_len_left -= len;
744 offset += len;
745 }
746 }
01f2e4ea
SF		 747}
748
749static inline void enic_queue_wq_skb(struct enic *enic,
750 struct vnic_wq *wq, struct sk_buff *skb)
751{
752 unsigned int mss = skb_shinfo(skb)->gso_size;
753 unsigned int vlan_tag = 0;
754 int vlan_tag_insert = 0;
1825aca6 755 int loopback = 0;
01f2e4ea 756
eab6d18d 757 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 758 /* VLAN tag from trunking driver */
759 vlan_tag_insert = 1;
760 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 761 } else if (enic->loop_enable) {
762 vlan_tag = enic->loop_tag;
763 loopback = 1;
01f2e4ea
SF		 764 }
765
766 if (mss)
767 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 768 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 769 else if (skb->ip_summed == CHECKSUM_PARTIAL)
770 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 771 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 772 else
773 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 774 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 775}
776
ed8af6b2 777/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 778static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 779 struct net_device *netdev)
01f2e4ea
SF		 780{
781 struct enic *enic = netdev_priv(netdev);
782 struct vnic_wq *wq = &enic->wq[0];
783 unsigned long flags;
784
785 if (skb->len <= 0) {
786 dev_kfree_skb(skb);
787 return NETDEV_TX_OK;
788 }
789
790 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
791 * which is very likely. In the off chance it's going to take
792 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
793 */
794
795 if (skb_shinfo(skb)->gso_size == 0 &&
796 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
797 skb_linearize(skb)) {
798 dev_kfree_skb(skb);
799 return NETDEV_TX_OK;
800 }
801
802 spin_lock_irqsave(&enic->wq_lock[0], flags);
803
ea0d7d91
SF		 804 if (vnic_wq_desc_avail(wq) <
805 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 806 netif_stop_queue(netdev);
807 /* This is a hard error, log it */
a7a79deb 808 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 809 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
810 return NETDEV_TX_BUSY;
811 }
812
813 enic_queue_wq_skb(enic, wq, skb);
814
ea0d7d91 815 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 816 netif_stop_queue(netdev);
817
01f2e4ea
SF		 818 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
819
820 return NETDEV_TX_OK;
821}
822
823/* dev_base_lock rwlock held, nominally process context */
f20530bc 824static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
825 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 826{
827 struct enic *enic = netdev_priv(netdev);
828 struct vnic_stats *stats;
829
383ab92f 830 enic_dev_stats_dump(enic, &stats);
01f2e4ea 831
25f0a061
SF		 832 net_stats->tx_packets = stats->tx.tx_frames_ok;
833 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
834 net_stats->tx_errors = stats->tx.tx_errors;
835 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 836
25f0a061
SF		 837 net_stats->rx_packets = stats->rx.rx_frames_ok;
838 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
839 net_stats->rx_errors = stats->rx.rx_errors;
840 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 841 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 842 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 843 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 844
25f0a061 845 return net_stats;
01f2e4ea
SF		 846}
847
b3abfbd2 848void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 849{
850 enic->mc_count = 0;
e0afe53f 851 enic->uc_count = 0;
99ef5639 852 enic->flags = 0;
01f2e4ea
SF		 853}
854
855static int enic_set_mac_addr(struct net_device *netdev, char *addr)
856{
f8bd9091
SF		 857 struct enic *enic = netdev_priv(netdev);
858
7335903c 859 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
f8bd9091
SF		 860 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
861 return -EADDRNOTAVAIL;
862 } else {
863 if (!is_valid_ether_addr(addr))
864 return -EADDRNOTAVAIL;
865 }
01f2e4ea
SF		 866
867 memcpy(netdev->dev_addr, addr, netdev->addr_len);
868
869 return 0;
870}
871
f8bd9091
SF		 872static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
873{
874 struct enic *enic = netdev_priv(netdev);
875 struct sockaddr *saddr = p;
876 char *addr = saddr->sa_data;
877 int err;
878
879 if (netif_running(enic->netdev)) {
880 err = enic_dev_del_station_addr(enic);
881 if (err)
882 return err;
883 }
884
885 err = enic_set_mac_addr(netdev, addr);
886 if (err)
887 return err;
888
889 if (netif_running(enic->netdev)) {
890 err = enic_dev_add_station_addr(enic);
891 if (err)
892 return err;
893 }
894
895 return err;
896}
897
898static int enic_set_mac_address(struct net_device *netdev, void *p)
899{
294dab25 900 struct sockaddr *saddr = p;
c76fd32d
VK		 901 char *addr = saddr->sa_data;
902 struct enic *enic = netdev_priv(netdev);
903 int err;
904
905 err = enic_dev_del_station_addr(enic);
906 if (err)
907 return err;
908
909 err = enic_set_mac_addr(netdev, addr);
910 if (err)
911 return err;
294dab25 912
c76fd32d 913 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 914}
915
e0afe53f 916static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 917{
319d7e84 918 struct net_device *netdev = enic->netdev;
22bedad3 919 struct netdev_hw_addr *ha;
4cd24eaf 920 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 921 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 922 unsigned int i, j;
923
319d7e84
RP		 924 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
925 netdev_warn(netdev, "Registering only %d out of %d "
926 "multicast addresses\n",
927 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 928 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 929 }
01f2e4ea
SF		 930
931 /* Is there an easier way? Trying to minimize to
932 * calls to add/del multicast addrs. We keep the
933 * addrs from the last call in enic->mc_addr and
934 * look for changes to add/del.
935 */
936
48e2f183 937 i = 0;
22bedad3 938 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 939 if (i == mc_count)
940 break;
22bedad3 941 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 942 }
943
944 for (i = 0; i < enic->mc_count; i++) {
945 for (j = 0; j < mc_count; j++)
946 if (compare_ether_addr(enic->mc_addr[i],
947 mc_addr[j]) == 0)
948 break;
949 if (j == mc_count)
319d7e84 950 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 951 }
952
953 for (i = 0; i < mc_count; i++) {
954 for (j = 0; j < enic->mc_count; j++)
955 if (compare_ether_addr(mc_addr[i],
956 enic->mc_addr[j]) == 0)
957 break;
958 if (j == enic->mc_count)
319d7e84 959 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 960 }
961
962 /* Save the list to compare against next time
963 */
964
965 for (i = 0; i < mc_count; i++)
966 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
967
968 enic->mc_count = mc_count;
01f2e4ea
SF		 969}
970
e0afe53f 971static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 972{
973 struct net_device *netdev = enic->netdev;
974 struct netdev_hw_addr *ha;
975 unsigned int uc_count = netdev_uc_count(netdev);
976 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
977 unsigned int i, j;
978
979 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
980 netdev_warn(netdev, "Registering only %d out of %d "
981 "unicast addresses\n",
982 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
983 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
984 }
985
986 /* Is there an easier way? Trying to minimize to
987 * calls to add/del unicast addrs. We keep the
988 * addrs from the last call in enic->uc_addr and
989 * look for changes to add/del.
990 */
991
992 i = 0;
993 netdev_for_each_uc_addr(ha, netdev) {
994 if (i == uc_count)
995 break;
996 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
997 }
998
999 for (i = 0; i < enic->uc_count; i++) {
1000 for (j = 0; j < uc_count; j++)
1001 if (compare_ether_addr(enic->uc_addr[i],
1002 uc_addr[j]) == 0)
1003 break;
1004 if (j == uc_count)
1005 enic_dev_del_addr(enic, enic->uc_addr[i]);
1006 }
1007
1008 for (i = 0; i < uc_count; i++) {
1009 for (j = 0; j < enic->uc_count; j++)
1010 if (compare_ether_addr(uc_addr[i],
1011 enic->uc_addr[j]) == 0)
1012 break;
1013 if (j == enic->uc_count)
1014 enic_dev_add_addr(enic, uc_addr[i]);
1015 }
1016
1017 /* Save the list to compare against next time
1018 */
1019
1020 for (i = 0; i < uc_count; i++)
1021 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1022
1023 enic->uc_count = uc_count;
1024}
1025
1026/* netif_tx_lock held, BHs disabled */
1027static void enic_set_rx_mode(struct net_device *netdev)
1028{
1029 struct enic *enic = netdev_priv(netdev);
1030 int directed = 1;
1031 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1032 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1033 int promisc = (netdev->flags & IFF_PROMISC) ||
1034 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1035 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1036 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1037 unsigned int flags = netdev->flags |
1038 (allmulti ? IFF_ALLMULTI : 0) |
1039 (promisc ? IFF_PROMISC : 0);
1040
1041 if (enic->flags != flags) {
1042 enic->flags = flags;
1043 enic_dev_packet_filter(enic, directed,
1044 multicast, broadcast, promisc, allmulti);
1045 }
1046
1047 if (!promisc) {
e0afe53f 1048 enic_update_unicast_addr_list(enic);
319d7e84 1049 if (!allmulti)
e0afe53f 1050 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1051 }
1052}
1053
01f2e4ea
SF		 1054/* netif_tx_lock held, BHs disabled */
1055static void enic_tx_timeout(struct net_device *netdev)
1056{
1057 struct enic *enic = netdev_priv(netdev);
1058 schedule_work(&enic->reset);
1059}
1060
0b1c00fc
RP		 1061static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1062{
1063 struct enic *enic = netdev_priv(netdev);
3f192795
RP		 1064 struct enic_port_profile *pp;
1065 int err;
0b1c00fc 1066
3f192795
RP		 1067 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1068 if (err)
1069 return err;
0b1c00fc 1070
0b1c00fc 1071 if (is_valid_ether_addr(mac)) {
3f192795 1072 memcpy(pp->vf_mac, mac, ETH_ALEN);
0b1c00fc
RP		 1073 return 0;
1074 } else
1075 return -EINVAL;
1076}
1077
f8bd9091
SF		 1078static int enic_set_vf_port(struct net_device *netdev, int vf,
1079 struct nlattr *port[])
1080{
1081 struct enic *enic = netdev_priv(netdev);
b3abfbd2 1082 struct enic_port_profile prev_pp;
3f192795 1083 struct enic_port_profile *pp;
b3abfbd2 1084 int err = 0, restore_pp = 1;
08f382eb 1085
3f192795
RP		 1086 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1087 if (err)
1088 return err;
08f382eb 1089
b3abfbd2
RP		 1090 if (!port[IFLA_PORT_REQUEST])
1091 return -EOPNOTSUPP;
1092
3f192795
RP		 1093 memcpy(&prev_pp, pp, sizeof(*enic->pp));
1094 memset(pp, 0, sizeof(*enic->pp));
b3abfbd2 1095
3f192795
RP		 1096 pp->set |= ENIC_SET_REQUEST;
1097 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1098
1099 if (port[IFLA_PORT_PROFILE]) {
3f192795
RP		 1100 pp->set |= ENIC_SET_NAME;
1101 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1102 PORT_PROFILE_MAX);
1103 }
1104
1105 if (port[IFLA_PORT_INSTANCE_UUID]) {
3f192795
RP		 1106 pp->set |= ENIC_SET_INSTANCE;
1107 memcpy(pp->instance_uuid,
08f382eb
SF		 1108 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1109 }
1110
1111 if (port[IFLA_PORT_HOST_UUID]) {
3f192795
RP		 1112 pp->set |= ENIC_SET_HOST;
1113 memcpy(pp->host_uuid,
08f382eb
SF		 1114 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1115 }
f8bd9091 1116
b3abfbd2
RP		 1117 /* Special case handling: mac came from IFLA_VF_MAC */
1118 if (!is_zero_ether_addr(prev_pp.vf_mac))
3f192795 1119 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d 1120
3f192795
RP		 1121 if (vf == PORT_SELF_VF && is_zero_ether_addr(netdev->dev_addr))
1122 random_ether_addr(netdev->dev_addr);
f8bd9091 1123
3f192795 1124 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
b3abfbd2
RP		 1125 if (err) {
1126 if (restore_pp) {
1127 /* Things are still the way they were: Implicit
1128 * DISASSOCIATE failed
1129 */
3f192795 1130 memcpy(pp, &prev_pp, sizeof(*pp));
b3abfbd2 1131 } else {
3f192795
RP		 1132 memset(pp, 0, sizeof(*pp));
1133 if (vf == PORT_SELF_VF)
1134 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1135 }
1136 } else {
1137 /* Set flag to indicate that the port assoc/disassoc
1138 * request has been sent out to fw
1139 */
3f192795 1140 pp->set |= ENIC_PORT_REQUEST_APPLIED;
b3abfbd2
RP		 1141
1142 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
3f192795
RP		 1143 if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1144 memset(pp->mac_addr, 0, ETH_ALEN);
1145 if (vf == PORT_SELF_VF)
1146 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1147 }
1148 }
29639059 1149
3f192795 1150 memset(pp->vf_mac, 0, ETH_ALEN);
29639059 1151
29639059 1152 return err;
f8bd9091
SF		 1153}
1154
1155static int enic_get_vf_port(struct net_device *netdev, int vf,
1156 struct sk_buff *skb)
1157{
1158 struct enic *enic = netdev_priv(netdev);
f8bd9091 1159 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
3f192795 1160 struct enic_port_profile *pp;
b3abfbd2 1161 int err;
f8bd9091 1162
3f192795
RP		 1163 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1164 if (err)
1165 return err;
1166
1167 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1168 return -ENODATA;
f8bd9091 1169
3f192795 1170 err = enic_process_get_pp_request(enic, vf, pp->request, &response);
f8bd9091 1171 if (err)
b3abfbd2 1172 return err;
f8bd9091 1173
3f192795 1174 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, pp->request);
f8bd9091 1175 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
3f192795 1176 if (pp->set & ENIC_SET_NAME)
08f382eb 1177 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
3f192795
RP		 1178 pp->name);
1179 if (pp->set & ENIC_SET_INSTANCE)
08f382eb 1180 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
3f192795
RP		 1181 pp->instance_uuid);
1182 if (pp->set & ENIC_SET_HOST)
08f382eb 1183 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
3f192795 1184 pp->host_uuid);
f8bd9091
SF		 1185
1186 return 0;
1187
1188nla_put_failure:
1189 return -EMSGSIZE;
1190}
1191
01f2e4ea
SF		 1192static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1193{
1194 struct enic *enic = vnic_dev_priv(rq->vdev);
1195
1196 if (!buf->os_buf)
1197 return;
1198
1199 pci_unmap_single(enic->pdev, buf->dma_addr,
1200 buf->len, PCI_DMA_FROMDEVICE);
1201 dev_kfree_skb_any(buf->os_buf);
1202}
1203
01f2e4ea
SF		 1204static int enic_rq_alloc_buf(struct vnic_rq *rq)
1205{
1206 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1207 struct net_device *netdev = enic->netdev;
01f2e4ea 1208 struct sk_buff *skb;
1825aca6 1209 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1210 unsigned int os_buf_index = 0;
1211 dma_addr_t dma_addr;
1212
89d71a66 1213 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1214 if (!skb)
1215 return -ENOMEM;
1216
1217 dma_addr = pci_map_single(enic->pdev, skb->data,
1218 len, PCI_DMA_FROMDEVICE);
1219
1220 enic_queue_rq_desc(rq, skb, os_buf_index,
1221 dma_addr, len);
1222
1223 return 0;
1224}
1225
01f2e4ea
SF		 1226static void enic_rq_indicate_buf(struct vnic_rq *rq,
1227 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1228 int skipped, void *opaque)
1229{
1230 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1231 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1232 struct sk_buff *skb;
1233
1234 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1235 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1236 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1237 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1238 u8 packet_error;
f8cac14a 1239 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1240 u32 rss_hash;
1241
1242 if (skipped)
1243 return;
1244
1245 skb = buf->os_buf;
1246 prefetch(skb->data - NET_IP_ALIGN);
1247 pci_unmap_single(enic->pdev, buf->dma_addr,
1248 buf->len, PCI_DMA_FROMDEVICE);
1249
1250 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1251 &type, &color, &q_number, &completed_index,
1252 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1253 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1254 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1255 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1256 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1257 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1258 &fcs_ok);
1259
1260 if (packet_error) {
1261
350991e1
SF		 1262 if (!fcs_ok) {
1263 if (bytes_written > 0)
1264 enic->rq_bad_fcs++;
1265 else if (bytes_written == 0)
1266 enic->rq_truncated_pkts++;
1267 }
01f2e4ea
SF		 1268
1269 dev_kfree_skb_any(skb);
1270
1271 return;
1272 }
1273
1274 if (eop && bytes_written > 0) {
1275
1276 /* Good receive
1277 */
1278
1279 skb_put(skb, bytes_written);
86ca9db7 1280 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1281
5ec8f9b8 1282 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1283 skb->csum = htons(checksum);
1284 skb->ip_summed = CHECKSUM_COMPLETE;
1285 }
1286
86ca9db7 1287 skb->dev = netdev;
01f2e4ea 1288
6ede746b
JP		 1289 if (vlan_stripped)
1290 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1291
6ede746b
JP		 1292 if (netdev->features & NETIF_F_GRO)
1293 napi_gro_receive(&enic->napi[q_number], skb);
1294 else
1295 netif_receive_skb(skb);
01f2e4ea
SF		 1296 } else {
1297
1298 /* Buffer overflow
1299 */
1300
1301 dev_kfree_skb_any(skb);
1302 }
1303}
1304
1305static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1306 u8 type, u16 q_number, u16 completed_index, void *opaque)
1307{
1308 struct enic *enic = vnic_dev_priv(vdev);
1309
1310 vnic_rq_service(&enic->rq[q_number], cq_desc,
1311 completed_index, VNIC_RQ_RETURN_DESC,
1312 enic_rq_indicate_buf, opaque);
1313
1314 return 0;
1315}
1316
01f2e4ea
SF		 1317static int enic_poll(struct napi_struct *napi, int budget)
1318{
717258ba
VK		 1319 struct net_device *netdev = napi->dev;
1320 struct enic *enic = netdev_priv(netdev);
1321 unsigned int cq_rq = enic_cq_rq(enic, 0);
1322 unsigned int cq_wq = enic_cq_wq(enic, 0);
1323 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1324 unsigned int rq_work_to_do = budget;
1325 unsigned int wq_work_to_do = -1; /* no limit */
1326 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1327 int err;
01f2e4ea
SF		 1328
1329 /* Service RQ (first) and WQ
1330 */
1331
717258ba 1332 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1333 rq_work_to_do, enic_rq_service, NULL);
1334
717258ba 1335 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1336 wq_work_to_do, enic_wq_service, NULL);
1337
1338 /* Accumulate intr event credits for this polling
1339 * cycle. An intr event is the completion of a
1340 * a WQ or RQ packet.
1341 */
1342
1343 work_done = rq_work_done + wq_work_done;
1344
1345 if (work_done > 0)
717258ba 1346 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1347 work_done,
1348 0 /* don't unmask intr */,
1349 0 /* don't reset intr timer */);
1350
0eb26022 1351 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1352
2d6ddced
SF		 1353 /* Buffer allocation failed. Stay in polling
1354 * mode so we can try to fill the ring again.
1355 */
01f2e4ea 1356
2d6ddced
SF		 1357 if (err)
1358 rq_work_done = rq_work_to_do;
01f2e4ea 1359
2d6ddced 1360 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1361
2d6ddced 1362 /* Some work done, but not enough to stay in polling,
88132f55 1363 * exit polling
01f2e4ea
SF		 1364 */
1365
288379f0 1366 napi_complete(napi);
717258ba 1367 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1368 }
1369
1370 return rq_work_done;
1371}
1372
1373static int enic_poll_msix(struct napi_struct *napi, int budget)
1374{
717258ba
VK		 1375 struct net_device *netdev = napi->dev;
1376 struct enic *enic = netdev_priv(netdev);
1377 unsigned int rq = (napi - &enic->napi[0]);
1378 unsigned int cq = enic_cq_rq(enic, rq);
1379 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1380 unsigned int work_to_do = budget;
1381 unsigned int work_done;
2d6ddced 1382 int err;
01f2e4ea
SF		 1383
1384 /* Service RQ
1385 */
1386
717258ba 1387 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1388 work_to_do, enic_rq_service, NULL);
1389
2d6ddced
SF		 1390 /* Return intr event credits for this polling
1391 * cycle. An intr event is the completion of a
1392 * RQ packet.
1393 */
01f2e4ea 1394
2d6ddced 1395 if (work_done > 0)
717258ba 1396 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1397 work_done,
1398 0 /* don't unmask intr */,
1399 0 /* don't reset intr timer */);
01f2e4ea 1400
0eb26022 1401 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1402
1403 /* Buffer allocation failed. Stay in polling mode
1404 * so we can try to fill the ring again.
1405 */
1406
1407 if (err)
1408 work_done = work_to_do;
1409
1410 if (work_done < work_to_do) {
1411
1412 /* Some work done, but not enough to stay in polling,
88132f55 1413 * exit polling
01f2e4ea
SF		 1414 */
1415
288379f0 1416 napi_complete(napi);
717258ba 1417 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1418 }
1419
1420 return work_done;
1421}
1422
1423static void enic_notify_timer(unsigned long data)
1424{
1425 struct enic *enic = (struct enic *)data;
1426
1427 enic_notify_check(enic);
1428
25f0a061
SF		 1429 mod_timer(&enic->notify_timer,
1430 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1431}
1432
1433static void enic_free_intr(struct enic *enic)
1434{
1435 struct net_device *netdev = enic->netdev;
1436 unsigned int i;
1437
1438 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1439 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1440 free_irq(enic->pdev->irq, netdev);
1441 break;
8f4d248c
SF		 1442 case VNIC_DEV_INTR_MODE_MSI:
1443 free_irq(enic->pdev->irq, enic);
1444 break;
01f2e4ea
SF		 1445 case VNIC_DEV_INTR_MODE_MSIX:
1446 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1447 if (enic->msix[i].requested)
1448 free_irq(enic->msix_entry[i].vector,
1449 enic->msix[i].devid);
1450 break;
1451 default:
1452 break;
1453 }
1454}
1455
1456static int enic_request_intr(struct enic *enic)
1457{
1458 struct net_device *netdev = enic->netdev;
717258ba 1459 unsigned int i, intr;
01f2e4ea
SF		 1460 int err = 0;
1461
1462 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1463
1464 case VNIC_DEV_INTR_MODE_INTX:
1465
1466 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1467 IRQF_SHARED, netdev->name, netdev);
1468 break;
1469
1470 case VNIC_DEV_INTR_MODE_MSI:
1471
1472 err = request_irq(enic->pdev->irq, enic_isr_msi,
1473 0, netdev->name, enic);
1474 break;
1475
1476 case VNIC_DEV_INTR_MODE_MSIX:
1477
717258ba
VK		 1478 for (i = 0; i < enic->rq_count; i++) {
1479 intr = enic_msix_rq_intr(enic, i);
1480 sprintf(enic->msix[intr].devname,
1481 "%.11s-rx-%d", netdev->name, i);
1482 enic->msix[intr].isr = enic_isr_msix_rq;
1483 enic->msix[intr].devid = &enic->napi[i];
1484 }
01f2e4ea 1485
717258ba
VK		 1486 for (i = 0; i < enic->wq_count; i++) {
1487 intr = enic_msix_wq_intr(enic, i);
1488 sprintf(enic->msix[intr].devname,
1489 "%.11s-tx-%d", netdev->name, i);
1490 enic->msix[intr].isr = enic_isr_msix_wq;
1491 enic->msix[intr].devid = enic;
1492 }
01f2e4ea 1493
717258ba
VK		 1494 intr = enic_msix_err_intr(enic);
1495 sprintf(enic->msix[intr].devname,
01f2e4ea 1496 "%.11s-err", netdev->name);
717258ba
VK		 1497 enic->msix[intr].isr = enic_isr_msix_err;
1498 enic->msix[intr].devid = enic;
01f2e4ea 1499
717258ba
VK		 1500 intr = enic_msix_notify_intr(enic);
1501 sprintf(enic->msix[intr].devname,
01f2e4ea 1502 "%.11s-notify", netdev->name);
717258ba
VK		 1503 enic->msix[intr].isr = enic_isr_msix_notify;
1504 enic->msix[intr].devid = enic;
1505
1506 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1507 enic->msix[i].requested = 0;
01f2e4ea 1508
717258ba 1509 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1510 err = request_irq(enic->msix_entry[i].vector,
1511 enic->msix[i].isr, 0,
1512 enic->msix[i].devname,
1513 enic->msix[i].devid);
1514 if (err) {
1515 enic_free_intr(enic);
1516 break;
1517 }
1518 enic->msix[i].requested = 1;
1519 }
1520
1521 break;
1522
1523 default:
1524 break;
1525 }
1526
1527 return err;
1528}
1529
b3d18d19
SF		 1530static void enic_synchronize_irqs(struct enic *enic)
1531{
1532 unsigned int i;
1533
1534 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1535 case VNIC_DEV_INTR_MODE_INTX:
1536 case VNIC_DEV_INTR_MODE_MSI:
1537 synchronize_irq(enic->pdev->irq);
1538 break;
1539 case VNIC_DEV_INTR_MODE_MSIX:
1540 for (i = 0; i < enic->intr_count; i++)
1541 synchronize_irq(enic->msix_entry[i].vector);
1542 break;
1543 default:
1544 break;
1545 }
1546}
1547
383ab92f 1548static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1549{
1550 int err;
1551
56ac88b3 1552 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1553 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1554 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1555 err = vnic_dev_notify_set(enic->vdev,
1556 enic_legacy_notify_intr());
01f2e4ea
SF		 1557 break;
1558 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1559 err = vnic_dev_notify_set(enic->vdev,
1560 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1561 break;
1562 default:
1563 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1564 break;
1565 }
56ac88b3 1566 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1567
1568 return err;
1569}
1570
1571static void enic_notify_timer_start(struct enic *enic)
1572{
1573 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1574 case VNIC_DEV_INTR_MODE_MSI:
1575 mod_timer(&enic->notify_timer, jiffies);
1576 break;
1577 default:
1578 /* Using intr for notification for INTx/MSI-X */
1579 break;
6403eab1 1580 }
01f2e4ea
SF		 1581}
1582
1583/* rtnl lock is held, process context */
1584static int enic_open(struct net_device *netdev)
1585{
1586 struct enic *enic = netdev_priv(netdev);
1587 unsigned int i;
1588 int err;
1589
4b75a442
SF		 1590 err = enic_request_intr(enic);
1591 if (err) {
a7a79deb 1592 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1593 return err;
1594 }
1595
383ab92f 1596 err = enic_dev_notify_set(enic);
4b75a442 1597 if (err) {
a7a79deb
VK		 1598 netdev_err(netdev,
1599 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1600 goto err_out_free_intr;
1601 }
1602
01f2e4ea 1603 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1604 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1605 /* Need at least one buffer on ring to get going */
1606 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1607 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1608 err = -ENOMEM;
4b75a442 1609 goto err_out_notify_unset;
01f2e4ea
SF		 1610 }
1611 }
1612
1613 for (i = 0; i < enic->wq_count; i++)
1614 vnic_wq_enable(&enic->wq[i]);
1615 for (i = 0; i < enic->rq_count; i++)
1616 vnic_rq_enable(&enic->rq[i]);
1617
7335903c 1618 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1619 enic_dev_add_station_addr(enic);
3f192795 1620
319d7e84 1621 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1622
1623 netif_wake_queue(netdev);
717258ba
VK		 1624
1625 for (i = 0; i < enic->rq_count; i++)
1626 napi_enable(&enic->napi[i]);
1627
383ab92f 1628 enic_dev_enable(enic);
01f2e4ea
SF		 1629
1630 for (i = 0; i < enic->intr_count; i++)
1631 vnic_intr_unmask(&enic->intr[i]);
1632
1633 enic_notify_timer_start(enic);
1634
1635 return 0;
4b75a442
SF		 1636
1637err_out_notify_unset:
383ab92f 1638 enic_dev_notify_unset(enic);
4b75a442
SF		 1639err_out_free_intr:
1640 enic_free_intr(enic);
1641
1642 return err;
01f2e4ea
SF		 1643}
1644
1645/* rtnl lock is held, process context */
1646static int enic_stop(struct net_device *netdev)
1647{
1648 struct enic *enic = netdev_priv(netdev);
1649 unsigned int i;
1650 int err;
1651
29046f9b 1652 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1653 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1654 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1655 }
b3d18d19
SF		 1656
1657 enic_synchronize_irqs(enic);
1658
01f2e4ea
SF		 1659 del_timer_sync(&enic->notify_timer);
1660
383ab92f 1661 enic_dev_disable(enic);
717258ba
VK		 1662
1663 for (i = 0; i < enic->rq_count; i++)
1664 napi_disable(&enic->napi[i]);
1665
b3d18d19
SF		 1666 netif_carrier_off(netdev);
1667 netif_tx_disable(netdev);
3f192795 1668
7335903c 1669 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1670 enic_dev_del_station_addr(enic);
f8bd9091 1671
01f2e4ea
SF		 1672 for (i = 0; i < enic->wq_count; i++) {
1673 err = vnic_wq_disable(&enic->wq[i]);
1674 if (err)
1675 return err;
1676 }
1677 for (i = 0; i < enic->rq_count; i++) {
1678 err = vnic_rq_disable(&enic->rq[i]);
1679 if (err)
1680 return err;
1681 }
1682
383ab92f 1683 enic_dev_notify_unset(enic);
4b75a442
SF		 1684 enic_free_intr(enic);
1685
01f2e4ea
SF		 1686 for (i = 0; i < enic->wq_count; i++)
1687 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1688 for (i = 0; i < enic->rq_count; i++)
1689 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1690 for (i = 0; i < enic->cq_count; i++)
1691 vnic_cq_clean(&enic->cq[i]);
1692 for (i = 0; i < enic->intr_count; i++)
1693 vnic_intr_clean(&enic->intr[i]);
1694
1695 return 0;
1696}
1697
1698static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1699{
1700 struct enic *enic = netdev_priv(netdev);
1701 int running = netif_running(netdev);
1702
25f0a061
SF		 1703 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1704 return -EINVAL;
1705
7335903c 1706 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
c97c894d
RP		 1707 return -EOPNOTSUPP;
1708
01f2e4ea
SF		 1709 if (running)
1710 enic_stop(netdev);
1711
01f2e4ea
SF		 1712 netdev->mtu = new_mtu;
1713
1714 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1715 netdev_warn(netdev,
1716 "interface MTU (%d) set higher than port MTU (%d)\n",
1717 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1718
1719 if (running)
1720 enic_open(netdev);
1721
1722 return 0;
1723}
1724
c97c894d
RP		 1725static void enic_change_mtu_work(struct work_struct *work)
1726{
1727 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1728 struct net_device *netdev = enic->netdev;
1729 int new_mtu = vnic_dev_mtu(enic->vdev);
1730 int err;
1731 unsigned int i;
1732
1733 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1734
1735 rtnl_lock();
1736
1737 /* Stop RQ */
1738 del_timer_sync(&enic->notify_timer);
1739
1740 for (i = 0; i < enic->rq_count; i++)
1741 napi_disable(&enic->napi[i]);
1742
1743 vnic_intr_mask(&enic->intr[0]);
1744 enic_synchronize_irqs(enic);
1745 err = vnic_rq_disable(&enic->rq[0]);
1746 if (err) {
1747 netdev_err(netdev, "Unable to disable RQ.\n");
1748 return;
1749 }
1750 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1751 vnic_cq_clean(&enic->cq[0]);
1752 vnic_intr_clean(&enic->intr[0]);
1753
1754 /* Fill RQ with new_mtu-sized buffers */
1755 netdev->mtu = new_mtu;
1756 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1757 /* Need at least one buffer on ring to get going */
1758 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1759 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1760 return;
1761 }
1762
1763 /* Start RQ */
1764 vnic_rq_enable(&enic->rq[0]);
1765 napi_enable(&enic->napi[0]);
1766 vnic_intr_unmask(&enic->intr[0]);
1767 enic_notify_timer_start(enic);
1768
1769 rtnl_unlock();
1770
1771 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1772}
1773
01f2e4ea
SF		 1774#ifdef CONFIG_NET_POLL_CONTROLLER
1775static void enic_poll_controller(struct net_device *netdev)
1776{
1777 struct enic *enic = netdev_priv(netdev);
1778 struct vnic_dev *vdev = enic->vdev;
717258ba 1779 unsigned int i, intr;
01f2e4ea
SF		 1780
1781 switch (vnic_dev_get_intr_mode(vdev)) {
1782 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1783 for (i = 0; i < enic->rq_count; i++) {
1784 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1785 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1786 &enic->napi[i]);
717258ba 1787 }
b880a954
VK		 1788
1789 for (i = 0; i < enic->wq_count; i++) {
1790 intr = enic_msix_wq_intr(enic, i);
1791 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1792 }
1793
01f2e4ea
SF		 1794 break;
1795 case VNIC_DEV_INTR_MODE_MSI:
1796 enic_isr_msi(enic->pdev->irq, enic);
1797 break;
1798 case VNIC_DEV_INTR_MODE_INTX:
1799 enic_isr_legacy(enic->pdev->irq, netdev);
1800 break;
1801 default:
1802 break;
1803 }
1804}
1805#endif
1806
1807static int enic_dev_wait(struct vnic_dev *vdev,
1808 int (*start)(struct vnic_dev *, int),
1809 int (*finished)(struct vnic_dev *, int *),
1810 int arg)
1811{
1812 unsigned long time;
1813 int done;
1814 int err;
1815
1816 BUG_ON(in_interrupt());
1817
1818 err = start(vdev, arg);
1819 if (err)
1820 return err;
1821
1822 /* Wait for func to complete...2 seconds max
1823 */
1824
1825 time = jiffies + (HZ * 2);
1826 do {
1827
1828 err = finished(vdev, &done);
1829 if (err)
1830 return err;
1831
1832 if (done)
1833 return 0;
1834
1835 schedule_timeout_uninterruptible(HZ / 10);
1836
1837 } while (time_after(time, jiffies));
1838
1839 return -ETIMEDOUT;
1840}
1841
1842static int enic_dev_open(struct enic *enic)
1843{
1844 int err;
1845
1846 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1847 vnic_dev_open_done, 0);
1848 if (err)
a7a79deb
VK		 1849 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1850 err);
01f2e4ea
SF		 1851
1852 return err;
1853}
1854
99ef5639 1855static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1856{
1857 int err;
1858
99ef5639
VK		 1859 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1860 vnic_dev_hang_reset_done, 0);
01f2e4ea 1861 if (err)
a7a79deb
VK		 1862 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1863 err);
01f2e4ea
SF		 1864
1865 return err;
1866}
1867
717258ba
VK		 1868static int enic_set_rsskey(struct enic *enic)
1869{
1f4f067f 1870 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1871 union vnic_rss_key *rss_key_buf_va = NULL;
1872 union vnic_rss_key rss_key = {
1873 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1874 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1875 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1876 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1877 };
1878 int err;
1879
1880 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1881 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1882 if (!rss_key_buf_va)
1883 return -ENOMEM;
1884
1885 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1886
1887 spin_lock(&enic->devcmd_lock);
1888 err = enic_set_rss_key(enic,
1889 rss_key_buf_pa,
1890 sizeof(union vnic_rss_key));
1891 spin_unlock(&enic->devcmd_lock);
1892
1893 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1894 rss_key_buf_va, rss_key_buf_pa);
1895
1896 return err;
1897}
1898
1899static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1900{
1f4f067f 1901 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1902 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1903 unsigned int i;
1904 int err;
1905
1906 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1907 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1908 if (!rss_cpu_buf_va)
1909 return -ENOMEM;
1910
1911 for (i = 0; i < (1 << rss_hash_bits); i++)
1912 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1913
1914 spin_lock(&enic->devcmd_lock);
1915 err = enic_set_rss_cpu(enic,
1916 rss_cpu_buf_pa,
1917 sizeof(union vnic_rss_cpu));
1918 spin_unlock(&enic->devcmd_lock);
1919
1920 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1921 rss_cpu_buf_va, rss_cpu_buf_pa);
1922
1923 return err;
1924}
1925
1926static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1927 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1928{
68f71708
SF		 1929 const u8 tso_ipid_split_en = 0;
1930 const u8 ig_vlan_strip_en = 1;
383ab92f 1931 int err;
68f71708 1932
717258ba
VK		 1933 /* Enable VLAN tag stripping.
1934 */
68f71708 1935
383ab92f
VK		 1936 spin_lock(&enic->devcmd_lock);
1937 err = enic_set_nic_cfg(enic,
68f71708
SF		 1938 rss_default_cpu, rss_hash_type,
1939 rss_hash_bits, rss_base_cpu,
1940 rss_enable, tso_ipid_split_en,
1941 ig_vlan_strip_en);
383ab92f
VK		 1942 spin_unlock(&enic->devcmd_lock);
1943
1944 return err;
1945}
1946
717258ba
VK		 1947static int enic_set_rss_nic_cfg(struct enic *enic)
1948{
1949 struct device *dev = enic_get_dev(enic);
1950 const u8 rss_default_cpu = 0;
1951 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1952 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1953 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1954 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1955 const u8 rss_hash_bits = 7;
1956 const u8 rss_base_cpu = 0;
1957 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1958
1959 if (rss_enable) {
1960 if (!enic_set_rsskey(enic)) {
1961 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1962 rss_enable = 0;
1963 dev_warn(dev, "RSS disabled, "
1964 "Failed to set RSS cpu indirection table.");
1965 }
1966 } else {
1967 rss_enable = 0;
1968 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1969 }
1970 }
1971
1972 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1973 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1974}
1975
01f2e4ea
SF		 1976static void enic_reset(struct work_struct *work)
1977{
1978 struct enic *enic = container_of(work, struct enic, reset);
1979
1980 if (!netif_running(enic->netdev))
1981 return;
1982
1983 rtnl_lock();
1984
383ab92f 1985 enic_dev_hang_notify(enic);
01f2e4ea 1986 enic_stop(enic->netdev);
99ef5639 1987 enic_dev_hang_reset(enic);
e0afe53f 1988 enic_reset_addr_lists(enic);
01f2e4ea 1989 enic_init_vnic_resources(enic);
717258ba 1990 enic_set_rss_nic_cfg(enic);
f8cac14a 1991 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1992 enic_open(enic->netdev);
1993
1994 rtnl_unlock();
1995}
1996
1997static int enic_set_intr_mode(struct enic *enic)
1998{
717258ba 1999 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 2000 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 2001 unsigned int i;
2002
2003 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2004 * on system capabilities.
01f2e4ea
SF		 2005 *
2006 * Try MSI-X first
2007 *
2008 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2009 * (the second to last INTR is used for WQ/RQ errors)
2010 * (the last INTR is used for notifications)
2011 */
2012
2013 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2014 for (i = 0; i < n + m + 2; i++)
2015 enic->msix_entry[i].entry = i;
2016
717258ba
VK		 2017 /* Use multiple RQs if RSS is enabled
2018 */
2019
2020 if (ENIC_SETTING(enic, RSS) &&
2021 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2022 enic->rq_count >= n &&
2023 enic->wq_count >= m &&
2024 enic->cq_count >= n + m &&
717258ba 2025 enic->intr_count >= n + m + 2) {
01f2e4ea 2026
717258ba 2027 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2028
717258ba
VK		 2029 enic->rq_count = n;
2030 enic->wq_count = m;
2031 enic->cq_count = n + m;
2032 enic->intr_count = n + m + 2;
01f2e4ea 2033
717258ba
VK		 2034 vnic_dev_set_intr_mode(enic->vdev,
2035 VNIC_DEV_INTR_MODE_MSIX);
2036
2037 return 0;
2038 }
2039 }
2040
2041 if (enic->config.intr_mode < 1 &&
2042 enic->rq_count >= 1 &&
2043 enic->wq_count >= m &&
2044 enic->cq_count >= 1 + m &&
2045 enic->intr_count >= 1 + m + 2) {
2046 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2047
2048 enic->rq_count = 1;
2049 enic->wq_count = m;
2050 enic->cq_count = 1 + m;
2051 enic->intr_count = 1 + m + 2;
2052
2053 vnic_dev_set_intr_mode(enic->vdev,
2054 VNIC_DEV_INTR_MODE_MSIX);
2055
2056 return 0;
2057 }
01f2e4ea
SF		 2058 }
2059
2060 /* Next try MSI
2061 *
2062 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2063 */
2064
2065 if (enic->config.intr_mode < 2 &&
2066 enic->rq_count >= 1 &&
2067 enic->wq_count >= 1 &&
2068 enic->cq_count >= 2 &&
2069 enic->intr_count >= 1 &&
2070 !pci_enable_msi(enic->pdev)) {
2071
2072 enic->rq_count = 1;
2073 enic->wq_count = 1;
2074 enic->cq_count = 2;
2075 enic->intr_count = 1;
2076
2077 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2078
2079 return 0;
2080 }
2081
2082 /* Next try INTx
2083 *
2084 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2085 * (the first INTR is used for WQ/RQ)
2086 * (the second INTR is used for WQ/RQ errors)
2087 * (the last INTR is used for notifications)
2088 */
2089
2090 if (enic->config.intr_mode < 3 &&
2091 enic->rq_count >= 1 &&
2092 enic->wq_count >= 1 &&
2093 enic->cq_count >= 2 &&
2094 enic->intr_count >= 3) {
2095
2096 enic->rq_count = 1;
2097 enic->wq_count = 1;
2098 enic->cq_count = 2;
2099 enic->intr_count = 3;
2100
2101 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2102
2103 return 0;
2104 }
2105
2106 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2107
2108 return -EINVAL;
2109}
2110
2111static void enic_clear_intr_mode(struct enic *enic)
2112{
2113 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2114 case VNIC_DEV_INTR_MODE_MSIX:
2115 pci_disable_msix(enic->pdev);
2116 break;
2117 case VNIC_DEV_INTR_MODE_MSI:
2118 pci_disable_msi(enic->pdev);
2119 break;
2120 default:
2121 break;
2122 }
2123
2124 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2125}
2126
f8bd9091
SF		 2127static const struct net_device_ops enic_netdev_dynamic_ops = {
2128 .ndo_open = enic_open,
2129 .ndo_stop = enic_stop,
2130 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2131 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2132 .ndo_validate_addr = eth_validate_addr,
319d7e84 2133 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2134 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2135 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2136 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2137 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2138 .ndo_tx_timeout = enic_tx_timeout,
2139 .ndo_set_vf_port = enic_set_vf_port,
2140 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2141 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2142#ifdef CONFIG_NET_POLL_CONTROLLER
2143 .ndo_poll_controller = enic_poll_controller,
2144#endif
2145};
2146
afe29f7a
SH		 2147static const struct net_device_ops enic_netdev_ops = {
2148 .ndo_open = enic_open,
2149 .ndo_stop = enic_stop,
00829823 2150 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2151 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2152 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2153 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2154 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2155 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2156 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2157 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2158 .ndo_tx_timeout = enic_tx_timeout,
3f192795
RP		 2159 .ndo_set_vf_port = enic_set_vf_port,
2160 .ndo_get_vf_port = enic_get_vf_port,
2161 .ndo_set_vf_mac = enic_set_vf_mac,
afe29f7a
SH		 2162#ifdef CONFIG_NET_POLL_CONTROLLER
2163 .ndo_poll_controller = enic_poll_controller,
2164#endif
2165};
2166
2fdba388 2167static void enic_dev_deinit(struct enic *enic)
6fdfa970 2168{
717258ba
VK		 2169 unsigned int i;
2170
2171 for (i = 0; i < enic->rq_count; i++)
2172 netif_napi_del(&enic->napi[i]);
2173
6fdfa970
SF		 2174 enic_free_vnic_resources(enic);
2175 enic_clear_intr_mode(enic);
2176}
2177
2fdba388 2178static int enic_dev_init(struct enic *enic)
6fdfa970 2179{
a7a79deb 2180 struct device *dev = enic_get_dev(enic);
6fdfa970 2181 struct net_device *netdev = enic->netdev;
717258ba 2182 unsigned int i;
6fdfa970
SF		 2183 int err;
2184
ea7ea65a
VK		 2185 /* Get interrupt coalesce timer info */
2186 err = enic_dev_intr_coal_timer_info(enic);
2187 if (err) {
2188 dev_warn(dev, "Using default conversion factor for "
2189 "interrupt coalesce timer\n");
2190 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2191 }
2192
6fdfa970
SF		 2193 /* Get vNIC configuration
2194 */
2195
2196 err = enic_get_vnic_config(enic);
2197 if (err) {
a7a79deb 2198 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2199 return err;
2200 }
2201
2202 /* Get available resource counts
2203 */
2204
2205 enic_get_res_counts(enic);
2206
2207 /* Set interrupt mode based on resource counts and system
2208 * capabilities
2209 */
2210
2211 err = enic_set_intr_mode(enic);
2212 if (err) {
a7a79deb
VK		 2213 dev_err(dev, "Failed to set intr mode based on resource "
2214 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2215 return err;
2216 }
2217
2218 /* Allocate and configure vNIC resources
2219 */
2220
2221 err = enic_alloc_vnic_resources(enic);
2222 if (err) {
a7a79deb 2223 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2224 goto err_out_free_vnic_resources;
2225 }
2226
2227 enic_init_vnic_resources(enic);
2228
717258ba 2229 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2230 if (err) {
a7a79deb 2231 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2232 goto err_out_free_vnic_resources;
2233 }
2234
2235 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2236 default:
717258ba 2237 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2238 break;
2239 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2240 for (i = 0; i < enic->rq_count; i++)
2241 netif_napi_add(netdev, &enic->napi[i],
2242 enic_poll_msix, 64);
6fdfa970
SF		 2243 break;
2244 }
2245
2246 return 0;
2247
2248err_out_free_vnic_resources:
2249 enic_clear_intr_mode(enic);
2250 enic_free_vnic_resources(enic);
2251
2252 return err;
2253}
2254
27e6c7d3
SF		 2255static void enic_iounmap(struct enic *enic)
2256{
2257 unsigned int i;
2258
2259 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2260 if (enic->bar[i].vaddr)
2261 iounmap(enic->bar[i].vaddr);
2262}
2263
01f2e4ea
SF		 2264static int __devinit enic_probe(struct pci_dev *pdev,
2265 const struct pci_device_id *ent)
2266{
a7a79deb 2267 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2268 struct net_device *netdev;
2269 struct enic *enic;
2270 int using_dac = 0;
2271 unsigned int i;
2272 int err;
8749b427
RP		 2273#ifdef CONFIG_PCI_IOV
2274 int pos = 0;
2275#endif
b67f231d 2276 int num_pps = 1;
01f2e4ea 2277
01f2e4ea
SF		 2278 /* Allocate net device structure and initialize. Private
2279 * instance data is initialized to zero.
2280 */
2281
2282 netdev = alloc_etherdev(sizeof(struct enic));
41de8d4c 2283 if (!netdev)
01f2e4ea 2284 return -ENOMEM;
01f2e4ea 2285
01f2e4ea
SF		 2286 pci_set_drvdata(pdev, netdev);
2287
2288 SET_NETDEV_DEV(netdev, &pdev->dev);
2289
2290 enic = netdev_priv(netdev);
2291 enic->netdev = netdev;
2292 enic->pdev = pdev;
2293
2294 /* Setup PCI resources
2295 */
2296
29046f9b 2297 err = pci_enable_device_mem(pdev);
01f2e4ea 2298 if (err) {
a7a79deb 2299 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2300 goto err_out_free_netdev;
2301 }
2302
2303 err = pci_request_regions(pdev, DRV_NAME);
2304 if (err) {
a7a79deb 2305 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2306 goto err_out_disable_device;
2307 }
2308
2309 pci_set_master(pdev);
2310
2311 /* Query PCI controller on system for DMA addressing
2312 * limitation for the device. Try 40-bit first, and
2313 * fail to 32-bit.
2314 */
2315
50cf156a 2316 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2317 if (err) {
284901a9 2318 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2319 if (err) {
a7a79deb 2320 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2321 goto err_out_release_regions;
2322 }
284901a9 2323 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2324 if (err) {
a7a79deb
VK		 2325 dev_err(dev, "Unable to obtain %u-bit DMA "
2326 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2327 goto err_out_release_regions;
2328 }
2329 } else {
50cf156a 2330 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2331 if (err) {
a7a79deb
VK		 2332 dev_err(dev, "Unable to obtain %u-bit DMA "
2333 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2334 goto err_out_release_regions;
2335 }
2336 using_dac = 1;
2337 }
2338
27e6c7d3 2339 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2340 */
2341
27e6c7d3
SF		 2342 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2343 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2344 continue;
2345 enic->bar[i].len = pci_resource_len(pdev, i);
2346 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2347 if (!enic->bar[i].vaddr) {
a7a79deb 2348 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2349 err = -ENODEV;
2350 goto err_out_iounmap;
2351 }
2352 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2353 }
2354
2355 /* Register vNIC device
2356 */
2357
27e6c7d3
SF		 2358 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2359 ARRAY_SIZE(enic->bar));
01f2e4ea 2360 if (!enic->vdev) {
a7a79deb 2361 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2362 err = -ENODEV;
2363 goto err_out_iounmap;
2364 }
2365
8749b427
RP		 2366#ifdef CONFIG_PCI_IOV
2367 /* Get number of subvnics */
2368 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2369 if (pos) {
2370 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2371 (u16 *)&enic->num_vfs);
2372 if (enic->num_vfs) {
2373 err = pci_enable_sriov(pdev, enic->num_vfs);
2374 if (err) {
2375 dev_err(dev, "SRIOV enable failed, aborting."
2376 " pci_enable_sriov() returned %d\n",
2377 err);
2378 goto err_out_vnic_unregister;
2379 }
2380 enic->priv_flags |= ENIC_SRIOV_ENABLED;
b67f231d 2381 num_pps = enic->num_vfs;
8749b427
RP		 2382 }
2383 }
8749b427 2384#endif
ca2b721d 2385
3f192795 2386 /* Allocate structure for port profiles */
a1de2219 2387 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
3f192795 2388 if (!enic->pp) {
3f192795 2389 err = -ENOMEM;
ca2b721d 2390 goto err_out_disable_sriov_pp;
3f192795
RP		 2391 }
2392
01f2e4ea
SF		 2393 /* Issue device open to get device in known state
2394 */
2395
2396 err = enic_dev_open(enic);
2397 if (err) {
a7a79deb 2398 dev_err(dev, "vNIC dev open failed, aborting\n");
ca2b721d 2399 goto err_out_disable_sriov;
01f2e4ea
SF		 2400 }
2401
69161425
VK		 2402 /* Setup devcmd lock
2403 */
2404
2405 spin_lock_init(&enic->devcmd_lock);
2406
2407 /*
2408 * Set ingress vlan rewrite mode before vnic initialization
2409 */
2410
2411 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2412 if (err) {
2413 dev_err(dev,
2414 "Failed to set ingress vlan rewrite mode, aborting.\n");
2415 goto err_out_dev_close;
2416 }
2417
01f2e4ea
SF		 2418 /* Issue device init to initialize the vnic-to-switch link.
2419 * We'll start with carrier off and wait for link UP
2420 * notification later to turn on carrier. We don't need
2421 * to wait here for the vnic-to-switch link initialization
2422 * to complete; link UP notification is the indication that
2423 * the process is complete.
2424 */
2425
2426 netif_carrier_off(netdev);
2427
a7a79deb
VK		 2428 /* Do not call dev_init for a dynamic vnic.
2429 * For a dynamic vnic, init_prov_info will be
2430 * called later by an upper layer.
2431 */
2432
7335903c 2433 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) {
f8bd9091
SF		 2434 err = vnic_dev_init(enic->vdev, 0);
2435 if (err) {
a7a79deb 2436 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2437 goto err_out_dev_close;
2438 }
01f2e4ea
SF		 2439 }
2440
6fdfa970 2441 err = enic_dev_init(enic);
01f2e4ea 2442 if (err) {
a7a79deb 2443 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2444 goto err_out_dev_close;
2445 }
2446
383ab92f 2447 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2448 */
2449
2450 init_timer(&enic->notify_timer);
2451 enic->notify_timer.function = enic_notify_timer;
2452 enic->notify_timer.data = (unsigned long)enic;
2453
2454 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2455 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2456
2457 for (i = 0; i < enic->wq_count; i++)
2458 spin_lock_init(&enic->wq_lock[i]);
2459
01f2e4ea
SF		 2460 /* Register net device
2461 */
2462
2463 enic->port_mtu = enic->config.mtu;
2464 (void)enic_change_mtu(netdev, enic->port_mtu);
2465
8749b427 2466#ifdef CONFIG_PCI_IOV
7335903c 2467 if (enic_is_sriov_vf(enic) && is_zero_ether_addr(enic->mac_addr))
8749b427
RP		 2468 random_ether_addr(enic->mac_addr);
2469#endif
2470
01f2e4ea
SF		 2471 err = enic_set_mac_addr(netdev, enic->mac_addr);
2472 if (err) {
a7a79deb 2473 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2474 goto err_out_dev_deinit;
01f2e4ea
SF		 2475 }
2476
7c844599
SF		 2477 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2478 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2479
7335903c 2480 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
f8bd9091
SF		 2481 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2482 else
2483 netdev->netdev_ops = &enic_netdev_ops;
2484
01f2e4ea
SF		 2485 netdev->watchdog_timeo = 2 * HZ;
2486 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2487
73c1ea9b 2488 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2489 if (ENIC_SETTING(enic, LOOP)) {
2490 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2491 enic->loop_enable = 1;
2492 enic->loop_tag = enic->config.loop_tag;
2493 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2494 }
01f2e4ea 2495 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2496 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2497 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2498 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2499 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2500 if (ENIC_SETTING(enic, RXCSUM))
2501 netdev->hw_features |= NETIF_F_RXCSUM;
2502
2503 netdev->features |= netdev->hw_features;
2504
01f2e4ea
SF		 2505 if (using_dac)
2506 netdev->features |= NETIF_F_HIGHDMA;
2507
01789349
JP		 2508 netdev->priv_flags |= IFF_UNICAST_FLT;
2509
01f2e4ea
SF		 2510 err = register_netdev(netdev);
2511 if (err) {
a7a79deb 2512 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2513 goto err_out_dev_deinit;
01f2e4ea
SF		 2514 }
2515
2516 return 0;
2517
6fdfa970
SF		 2518err_out_dev_deinit:
2519 enic_dev_deinit(enic);
01f2e4ea
SF		 2520err_out_dev_close:
2521 vnic_dev_close(enic->vdev);
8749b427 2522err_out_disable_sriov:
ca2b721d
RP		 2523 kfree(enic->pp);
2524err_out_disable_sriov_pp:
8749b427
RP		 2525#ifdef CONFIG_PCI_IOV
2526 if (enic_sriov_enabled(enic)) {
2527 pci_disable_sriov(pdev);
2528 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2529 }
01f2e4ea 2530err_out_vnic_unregister:
8749b427 2531#endif
35d87e33 2532 vnic_dev_unregister(enic->vdev);
01f2e4ea
SF		 2533err_out_iounmap:
2534 enic_iounmap(enic);
2535err_out_release_regions:
2536 pci_release_regions(pdev);
2537err_out_disable_device:
2538 pci_disable_device(pdev);
2539err_out_free_netdev:
2540 pci_set_drvdata(pdev, NULL);
2541 free_netdev(netdev);
2542
2543 return err;
2544}
2545
2546static void __devexit enic_remove(struct pci_dev *pdev)
2547{
2548 struct net_device *netdev = pci_get_drvdata(pdev);
2549
2550 if (netdev) {
2551 struct enic *enic = netdev_priv(netdev);
2552
23f333a2 2553 cancel_work_sync(&enic->reset);
c97c894d 2554 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2555 unregister_netdev(netdev);
6fdfa970 2556 enic_dev_deinit(enic);
01f2e4ea 2557 vnic_dev_close(enic->vdev);
8749b427
RP		 2558#ifdef CONFIG_PCI_IOV
2559 if (enic_sriov_enabled(enic)) {
2560 pci_disable_sriov(pdev);
2561 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2562 }
2563#endif
3f192795 2564 kfree(enic->pp);
01f2e4ea
SF		 2565 vnic_dev_unregister(enic->vdev);
2566 enic_iounmap(enic);
2567 pci_release_regions(pdev);
2568 pci_disable_device(pdev);
2569 pci_set_drvdata(pdev, NULL);
2570 free_netdev(netdev);
2571 }
2572}
2573
2574static struct pci_driver enic_driver = {
2575 .name = DRV_NAME,
2576 .id_table = enic_id_table,
2577 .probe = enic_probe,
2578 .remove = __devexit_p(enic_remove),
2579};
2580
2581static int __init enic_init_module(void)
2582{
a7a79deb 2583 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2584
2585 return pci_register_driver(&enic_driver);
2586}
2587
2588static void __exit enic_cleanup_module(void)
2589{
2590 pci_unregister_driver(&enic_driver);
2591}
2592
2593module_init(enic_init_module);
2594module_exit(enic_cleanup_module);
Linux kernel - Deliverables
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