projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
enic: Helper code for SRIOV proxy commands
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
01f2e4ea
SF		 60
61/* Supported devices */
a3aa1884 62static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 63 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
01f2e4ea
SF		 65 { 0, } /* end of table */
66};
67
68MODULE_DESCRIPTION(DRV_DESCRIPTION);
69MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
70MODULE_LICENSE("GPL");
71MODULE_VERSION(DRV_VERSION);
72MODULE_DEVICE_TABLE(pci, enic_id_table);
73
74struct enic_stat {
75 char name[ETH_GSTRING_LEN];
76 unsigned int offset;
77};
78
79#define ENIC_TX_STAT(stat) \
80 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
81#define ENIC_RX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
83
84static const struct enic_stat enic_tx_stats[] = {
85 ENIC_TX_STAT(tx_frames_ok),
86 ENIC_TX_STAT(tx_unicast_frames_ok),
87 ENIC_TX_STAT(tx_multicast_frames_ok),
88 ENIC_TX_STAT(tx_broadcast_frames_ok),
89 ENIC_TX_STAT(tx_bytes_ok),
90 ENIC_TX_STAT(tx_unicast_bytes_ok),
91 ENIC_TX_STAT(tx_multicast_bytes_ok),
92 ENIC_TX_STAT(tx_broadcast_bytes_ok),
93 ENIC_TX_STAT(tx_drops),
94 ENIC_TX_STAT(tx_errors),
95 ENIC_TX_STAT(tx_tso),
96};
97
98static const struct enic_stat enic_rx_stats[] = {
99 ENIC_RX_STAT(rx_frames_ok),
100 ENIC_RX_STAT(rx_frames_total),
101 ENIC_RX_STAT(rx_unicast_frames_ok),
102 ENIC_RX_STAT(rx_multicast_frames_ok),
103 ENIC_RX_STAT(rx_broadcast_frames_ok),
104 ENIC_RX_STAT(rx_bytes_ok),
105 ENIC_RX_STAT(rx_unicast_bytes_ok),
106 ENIC_RX_STAT(rx_multicast_bytes_ok),
107 ENIC_RX_STAT(rx_broadcast_bytes_ok),
108 ENIC_RX_STAT(rx_drop),
109 ENIC_RX_STAT(rx_no_bufs),
110 ENIC_RX_STAT(rx_errors),
111 ENIC_RX_STAT(rx_rss),
112 ENIC_RX_STAT(rx_crc_errors),
113 ENIC_RX_STAT(rx_frames_64),
114 ENIC_RX_STAT(rx_frames_127),
115 ENIC_RX_STAT(rx_frames_255),
116 ENIC_RX_STAT(rx_frames_511),
117 ENIC_RX_STAT(rx_frames_1023),
118 ENIC_RX_STAT(rx_frames_1518),
119 ENIC_RX_STAT(rx_frames_to_max),
120};
121
122static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
123static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
124
f8bd9091
SF		 125static int enic_is_dynamic(struct enic *enic)
126{
127 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
128}
129
8749b427
RP		 130int enic_sriov_enabled(struct enic *enic)
131{
132 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
133}
134
889d13f5
RP		 135int enic_is_valid_vf(struct enic *enic, int vf)
136{
137#ifdef CONFIG_PCI_IOV
138 return vf >= 0 && vf < enic->num_vfs;
139#else
140 return 0;
141#endif
142}
143
717258ba
VK		 144static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
145{
146 return rq;
147}
148
149static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
150{
151 return enic->rq_count + wq;
152}
153
154static inline unsigned int enic_legacy_io_intr(void)
155{
156 return 0;
157}
158
159static inline unsigned int enic_legacy_err_intr(void)
160{
161 return 1;
162}
163
164static inline unsigned int enic_legacy_notify_intr(void)
165{
166 return 2;
167}
168
169static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
170{
7d260ec2 171 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 172}
173
174static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
175{
7d260ec2 176 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 177}
178
179static inline unsigned int enic_msix_err_intr(struct enic *enic)
180{
181 return enic->rq_count + enic->wq_count;
182}
183
184static inline unsigned int enic_msix_notify_intr(struct enic *enic)
185{
186 return enic->rq_count + enic->wq_count + 1;
187}
188
01f2e4ea
SF		 189static int enic_get_settings(struct net_device *netdev,
190 struct ethtool_cmd *ecmd)
191{
192 struct enic *enic = netdev_priv(netdev);
193
194 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
195 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
196 ecmd->port = PORT_FIBRE;
197 ecmd->transceiver = XCVR_EXTERNAL;
198
199 if (netif_carrier_ok(netdev)) {
70739497 200 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 201 ecmd->duplex = DUPLEX_FULL;
202 } else {
70739497 203 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 204 ecmd->duplex = -1;
205 }
206
207 ecmd->autoneg = AUTONEG_DISABLE;
208
209 return 0;
210}
211
212static void enic_get_drvinfo(struct net_device *netdev,
213 struct ethtool_drvinfo *drvinfo)
214{
215 struct enic *enic = netdev_priv(netdev);
216 struct vnic_devcmd_fw_info *fw_info;
217
383ab92f 218 enic_dev_fw_info(enic, &fw_info);
01f2e4ea
SF		 219
220 strncpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
221 strncpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
222 strncpy(drvinfo->fw_version, fw_info->fw_version,
223 sizeof(drvinfo->fw_version));
224 strncpy(drvinfo->bus_info, pci_name(enic->pdev),
225 sizeof(drvinfo->bus_info));
226}
227
228static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
229{
230 unsigned int i;
231
232 switch (stringset) {
233 case ETH_SS_STATS:
234 for (i = 0; i < enic_n_tx_stats; i++) {
235 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
236 data += ETH_GSTRING_LEN;
237 }
238 for (i = 0; i < enic_n_rx_stats; i++) {
239 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
240 data += ETH_GSTRING_LEN;
241 }
242 break;
243 }
244}
245
25f0a061 246static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 247{
25f0a061
SF		 248 switch (sset) {
249 case ETH_SS_STATS:
250 return enic_n_tx_stats + enic_n_rx_stats;
251 default:
252 return -EOPNOTSUPP;
253 }
01f2e4ea
SF		 254}
255
256static void enic_get_ethtool_stats(struct net_device *netdev,
257 struct ethtool_stats *stats, u64 *data)
258{
259 struct enic *enic = netdev_priv(netdev);
260 struct vnic_stats *vstats;
261 unsigned int i;
262
383ab92f 263 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 264
265 for (i = 0; i < enic_n_tx_stats; i++)
266 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
267 for (i = 0; i < enic_n_rx_stats; i++)
268 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
269}
270
01f2e4ea
SF		 271static u32 enic_get_msglevel(struct net_device *netdev)
272{
273 struct enic *enic = netdev_priv(netdev);
274 return enic->msg_enable;
275}
276
277static void enic_set_msglevel(struct net_device *netdev, u32 value)
278{
279 struct enic *enic = netdev_priv(netdev);
280 enic->msg_enable = value;
281}
282
7c844599
SF		 283static int enic_get_coalesce(struct net_device *netdev,
284 struct ethtool_coalesce *ecmd)
285{
286 struct enic *enic = netdev_priv(netdev);
287
288 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
289 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
290
291 return 0;
292}
293
294static int enic_set_coalesce(struct net_device *netdev,
295 struct ethtool_coalesce *ecmd)
296{
297 struct enic *enic = netdev_priv(netdev);
298 u32 tx_coalesce_usecs;
299 u32 rx_coalesce_usecs;
717258ba 300 unsigned int i, intr;
7c844599 301
ea7ea65a
VK		 302 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
303 vnic_dev_get_intr_coal_timer_max(enic->vdev));
304 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
305 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 306
307 switch (vnic_dev_get_intr_mode(enic->vdev)) {
308 case VNIC_DEV_INTR_MODE_INTX:
309 if (tx_coalesce_usecs != rx_coalesce_usecs)
310 return -EINVAL;
311
717258ba
VK		 312 intr = enic_legacy_io_intr();
313 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 314 tx_coalesce_usecs);
7c844599
SF		 315 break;
316 case VNIC_DEV_INTR_MODE_MSI:
317 if (tx_coalesce_usecs != rx_coalesce_usecs)
318 return -EINVAL;
319
320 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 321 tx_coalesce_usecs);
7c844599
SF		 322 break;
323 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 324 for (i = 0; i < enic->wq_count; i++) {
325 intr = enic_msix_wq_intr(enic, i);
326 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 327 tx_coalesce_usecs);
717258ba
VK		 328 }
329
330 for (i = 0; i < enic->rq_count; i++) {
331 intr = enic_msix_rq_intr(enic, i);
332 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 333 rx_coalesce_usecs);
717258ba
VK		 334 }
335
7c844599
SF		 336 break;
337 default:
338 break;
339 }
340
341 enic->tx_coalesce_usecs = tx_coalesce_usecs;
342 enic->rx_coalesce_usecs = rx_coalesce_usecs;
343
344 return 0;
345}
346
0fc0b732 347static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 348 .get_settings = enic_get_settings,
349 .get_drvinfo = enic_get_drvinfo,
350 .get_msglevel = enic_get_msglevel,
351 .set_msglevel = enic_set_msglevel,
352 .get_link = ethtool_op_get_link,
353 .get_strings = enic_get_strings,
25f0a061 354 .get_sset_count = enic_get_sset_count,
01f2e4ea 355 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 356 .get_coalesce = enic_get_coalesce,
357 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 358};
359
360static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
361{
362 struct enic *enic = vnic_dev_priv(wq->vdev);
363
364 if (buf->sop)
365 pci_unmap_single(enic->pdev, buf->dma_addr,
366 buf->len, PCI_DMA_TODEVICE);
367 else
368 pci_unmap_page(enic->pdev, buf->dma_addr,
369 buf->len, PCI_DMA_TODEVICE);
370
371 if (buf->os_buf)
372 dev_kfree_skb_any(buf->os_buf);
373}
374
375static void enic_wq_free_buf(struct vnic_wq *wq,
376 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
377{
378 enic_free_wq_buf(wq, buf);
379}
380
381static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
382 u8 type, u16 q_number, u16 completed_index, void *opaque)
383{
384 struct enic *enic = vnic_dev_priv(vdev);
385
386 spin_lock(&enic->wq_lock[q_number]);
387
388 vnic_wq_service(&enic->wq[q_number], cq_desc,
389 completed_index, enic_wq_free_buf,
390 opaque);
391
392 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 393 vnic_wq_desc_avail(&enic->wq[q_number]) >=
394 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 395 netif_wake_queue(enic->netdev);
396
397 spin_unlock(&enic->wq_lock[q_number]);
398
399 return 0;
400}
401
402static void enic_log_q_error(struct enic *enic)
403{
404 unsigned int i;
405 u32 error_status;
406
407 for (i = 0; i < enic->wq_count; i++) {
408 error_status = vnic_wq_error_status(&enic->wq[i]);
409 if (error_status)
a7a79deb
VK		 410 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
411 i, error_status);
01f2e4ea
SF		 412 }
413
414 for (i = 0; i < enic->rq_count; i++) {
415 error_status = vnic_rq_error_status(&enic->rq[i]);
416 if (error_status)
a7a79deb
VK		 417 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
418 i, error_status);
01f2e4ea
SF		 419 }
420}
421
383ab92f 422static void enic_msglvl_check(struct enic *enic)
01f2e4ea 423{
383ab92f 424 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 425
383ab92f 426 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 427 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
428 enic->msg_enable, msg_enable);
383ab92f 429 enic->msg_enable = msg_enable;
01f2e4ea
SF		 430 }
431}
432
433static void enic_mtu_check(struct enic *enic)
434{
435 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 436 struct net_device *netdev = enic->netdev;
01f2e4ea 437
491598a4 438 if (mtu && mtu != enic->port_mtu) {
7c844599 439 enic->port_mtu = mtu;
c97c894d
RP		 440 if (enic_is_dynamic(enic)) {
441 mtu = max_t(int, ENIC_MIN_MTU,
442 min_t(int, ENIC_MAX_MTU, mtu));
443 if (mtu != netdev->mtu)
444 schedule_work(&enic->change_mtu_work);
445 } else {
446 if (mtu < netdev->mtu)
447 netdev_warn(netdev,
448 "interface MTU (%d) set higher "
449 "than switch port MTU (%d)\n",
450 netdev->mtu, mtu);
451 }
01f2e4ea
SF		 452 }
453}
454
383ab92f 455static void enic_link_check(struct enic *enic)
01f2e4ea 456{
383ab92f
VK		 457 int link_status = vnic_dev_link_status(enic->vdev);
458 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 459
383ab92f 460 if (link_status && !carrier_ok) {
a7a79deb 461 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 462 netif_carrier_on(enic->netdev);
463 } else if (!link_status && carrier_ok) {
a7a79deb 464 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 465 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 466 }
467}
468
469static void enic_notify_check(struct enic *enic)
470{
471 enic_msglvl_check(enic);
472 enic_mtu_check(enic);
473 enic_link_check(enic);
474}
475
476#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
477
478static irqreturn_t enic_isr_legacy(int irq, void *data)
479{
480 struct net_device *netdev = data;
481 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 482 unsigned int io_intr = enic_legacy_io_intr();
483 unsigned int err_intr = enic_legacy_err_intr();
484 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 485 u32 pba;
486
717258ba 487 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 488
489 pba = vnic_intr_legacy_pba(enic->legacy_pba);
490 if (!pba) {
717258ba 491 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 492 return IRQ_NONE; /* not our interrupt */
493 }
494
717258ba
VK		 495 if (ENIC_TEST_INTR(pba, notify_intr)) {
496 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 497 enic_notify_check(enic);
ed8af6b2 498 }
01f2e4ea 499
717258ba
VK		 500 if (ENIC_TEST_INTR(pba, err_intr)) {
501 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 502 enic_log_q_error(enic);
503 /* schedule recovery from WQ/RQ error */
504 schedule_work(&enic->reset);
505 return IRQ_HANDLED;
506 }
507
717258ba
VK		 508 if (ENIC_TEST_INTR(pba, io_intr)) {
509 if (napi_schedule_prep(&enic->napi[0]))
510 __napi_schedule(&enic->napi[0]);
01f2e4ea 511 } else {
717258ba 512 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 513 }
514
515 return IRQ_HANDLED;
516}
517
518static irqreturn_t enic_isr_msi(int irq, void *data)
519{
520 struct enic *enic = data;
521
522 /* With MSI, there is no sharing of interrupts, so this is
523 * our interrupt and there is no need to ack it. The device
524 * is not providing per-vector masking, so the OS will not
525 * write to PCI config space to mask/unmask the interrupt.
526 * We're using mask_on_assertion for MSI, so the device
527 * automatically masks the interrupt when the interrupt is
528 * generated. Later, when exiting polling, the interrupt
529 * will be unmasked (see enic_poll).
530 *
531 * Also, the device uses the same PCIe Traffic Class (TC)
532 * for Memory Write data and MSI, so there are no ordering
533 * issues; the MSI will always arrive at the Root Complex
534 * _after_ corresponding Memory Writes (i.e. descriptor
535 * writes).
536 */
537
717258ba 538 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 539
540 return IRQ_HANDLED;
541}
542
543static irqreturn_t enic_isr_msix_rq(int irq, void *data)
544{
717258ba 545 struct napi_struct *napi = data;
01f2e4ea
SF		 546
547 /* schedule NAPI polling for RQ cleanup */
717258ba 548 napi_schedule(napi);
01f2e4ea
SF		 549
550 return IRQ_HANDLED;
551}
552
553static irqreturn_t enic_isr_msix_wq(int irq, void *data)
554{
555 struct enic *enic = data;
717258ba
VK		 556 unsigned int cq = enic_cq_wq(enic, 0);
557 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 558 unsigned int wq_work_to_do = -1; /* no limit */
559 unsigned int wq_work_done;
560
717258ba 561 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 562 wq_work_to_do, enic_wq_service, NULL);
563
717258ba 564 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 565 wq_work_done,
566 1 /* unmask intr */,
567 1 /* reset intr timer */);
568
569 return IRQ_HANDLED;
570}
571
572static irqreturn_t enic_isr_msix_err(int irq, void *data)
573{
574 struct enic *enic = data;
717258ba 575 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 576
717258ba 577 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 578
01f2e4ea
SF		 579 enic_log_q_error(enic);
580
581 /* schedule recovery from WQ/RQ error */
582 schedule_work(&enic->reset);
583
584 return IRQ_HANDLED;
585}
586
587static irqreturn_t enic_isr_msix_notify(int irq, void *data)
588{
589 struct enic *enic = data;
717258ba 590 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 591
717258ba 592 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 593 enic_notify_check(enic);
01f2e4ea
SF		 594
595 return IRQ_HANDLED;
596}
597
598static inline void enic_queue_wq_skb_cont(struct enic *enic,
599 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 600 unsigned int len_left, int loopback)
01f2e4ea
SF		 601{
602 skb_frag_t *frag;
603
604 /* Queue additional data fragments */
605 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
606 len_left -= frag->size;
607 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf
IC		 608 skb_frag_dma_map(&enic->pdev->dev,
609 frag, 0, frag->size,
610 PCI_DMA_TODEVICE),
01f2e4ea 611 frag->size,
1825aca6
VK		 612 (len_left == 0), /* EOP? */
613 loopback);
01f2e4ea
SF		 614 }
615}
616
617static inline void enic_queue_wq_skb_vlan(struct enic *enic,
618 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 619 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 620{
621 unsigned int head_len = skb_headlen(skb);
622 unsigned int len_left = skb->len - head_len;
623 int eop = (len_left == 0);
624
ea0d7d91
SF		 625 /* Queue the main skb fragment. The fragments are no larger
626 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
627 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
628 * per fragment is queued.
629 */
01f2e4ea
SF		 630 enic_queue_wq_desc(wq, skb,
631 pci_map_single(enic->pdev, skb->data,
632 head_len, PCI_DMA_TODEVICE),
633 head_len,
634 vlan_tag_insert, vlan_tag,
1825aca6 635 eop, loopback);
01f2e4ea
SF		 636
637 if (!eop)
1825aca6 638 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 639}
640
641static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
642 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 643 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 644{
645 unsigned int head_len = skb_headlen(skb);
646 unsigned int len_left = skb->len - head_len;
0d0b1672 647 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 648 unsigned int csum_offset = hdr_len + skb->csum_offset;
649 int eop = (len_left == 0);
650
ea0d7d91
SF		 651 /* Queue the main skb fragment. The fragments are no larger
652 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
653 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
654 * per fragment is queued.
655 */
01f2e4ea
SF		 656 enic_queue_wq_desc_csum_l4(wq, skb,
657 pci_map_single(enic->pdev, skb->data,
658 head_len, PCI_DMA_TODEVICE),
659 head_len,
660 csum_offset,
661 hdr_len,
662 vlan_tag_insert, vlan_tag,
1825aca6 663 eop, loopback);
01f2e4ea
SF		 664
665 if (!eop)
1825aca6 666 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 667}
668
669static inline void enic_queue_wq_skb_tso(struct enic *enic,
670 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 671 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 672{
ea0d7d91
SF		 673 unsigned int frag_len_left = skb_headlen(skb);
674 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 675 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
676 int eop = (len_left == 0);
ea0d7d91
SF		 677 unsigned int len;
678 dma_addr_t dma_addr;
679 unsigned int offset = 0;
680 skb_frag_t *frag;
01f2e4ea
SF		 681
682 /* Preload TCP csum field with IP pseudo hdr calculated
683 * with IP length set to zero. HW will later add in length
684 * to each TCP segment resulting from the TSO.
685 */
686
09640e63 687 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 688 ip_hdr(skb)->check = 0;
689 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
690 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 691 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 692 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
693 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
694 }
695
ea0d7d91
SF		 696 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
697 * for the main skb fragment
698 */
699 while (frag_len_left) {
700 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
701 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
702 len, PCI_DMA_TODEVICE);
703 enic_queue_wq_desc_tso(wq, skb,
704 dma_addr,
705 len,
706 mss, hdr_len,
707 vlan_tag_insert, vlan_tag,
1825aca6 708 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 709 frag_len_left -= len;
710 offset += len;
711 }
01f2e4ea 712
ea0d7d91
SF		 713 if (eop)
714 return;
715
716 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
717 * for additional data fragments
718 */
719 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
720 len_left -= frag->size;
721 frag_len_left = frag->size;
4bf5adbf 722 offset = 0;
ea0d7d91
SF		 723
724 while (frag_len_left) {
725 len = min(frag_len_left,
726 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 727 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
728 offset, len,
729 PCI_DMA_TODEVICE);
ea0d7d91
SF		 730 enic_queue_wq_desc_cont(wq, skb,
731 dma_addr,
732 len,
733 (len_left == 0) &&
1825aca6
VK		 734 (len == frag_len_left), /* EOP? */
735 loopback);
ea0d7d91
SF		 736 frag_len_left -= len;
737 offset += len;
738 }
739 }
01f2e4ea
SF		 740}
741
742static inline void enic_queue_wq_skb(struct enic *enic,
743 struct vnic_wq *wq, struct sk_buff *skb)
744{
745 unsigned int mss = skb_shinfo(skb)->gso_size;
746 unsigned int vlan_tag = 0;
747 int vlan_tag_insert = 0;
1825aca6 748 int loopback = 0;
01f2e4ea 749
eab6d18d 750 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 751 /* VLAN tag from trunking driver */
752 vlan_tag_insert = 1;
753 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 754 } else if (enic->loop_enable) {
755 vlan_tag = enic->loop_tag;
756 loopback = 1;
01f2e4ea
SF		 757 }
758
759 if (mss)
760 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 761 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 762 else if (skb->ip_summed == CHECKSUM_PARTIAL)
763 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 764 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 765 else
766 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 767 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 768}
769
ed8af6b2 770/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 771static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 772 struct net_device *netdev)
01f2e4ea
SF		 773{
774 struct enic *enic = netdev_priv(netdev);
775 struct vnic_wq *wq = &enic->wq[0];
776 unsigned long flags;
777
778 if (skb->len <= 0) {
779 dev_kfree_skb(skb);
780 return NETDEV_TX_OK;
781 }
782
783 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
784 * which is very likely. In the off chance it's going to take
785 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
786 */
787
788 if (skb_shinfo(skb)->gso_size == 0 &&
789 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
790 skb_linearize(skb)) {
791 dev_kfree_skb(skb);
792 return NETDEV_TX_OK;
793 }
794
795 spin_lock_irqsave(&enic->wq_lock[0], flags);
796
ea0d7d91
SF		 797 if (vnic_wq_desc_avail(wq) <
798 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 799 netif_stop_queue(netdev);
800 /* This is a hard error, log it */
a7a79deb 801 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 802 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
803 return NETDEV_TX_BUSY;
804 }
805
806 enic_queue_wq_skb(enic, wq, skb);
807
ea0d7d91 808 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 809 netif_stop_queue(netdev);
810
01f2e4ea
SF		 811 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
812
813 return NETDEV_TX_OK;
814}
815
816/* dev_base_lock rwlock held, nominally process context */
f20530bc 817static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
818 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 819{
820 struct enic *enic = netdev_priv(netdev);
821 struct vnic_stats *stats;
822
383ab92f 823 enic_dev_stats_dump(enic, &stats);
01f2e4ea 824
25f0a061
SF		 825 net_stats->tx_packets = stats->tx.tx_frames_ok;
826 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
827 net_stats->tx_errors = stats->tx.tx_errors;
828 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 829
25f0a061
SF		 830 net_stats->rx_packets = stats->rx.rx_frames_ok;
831 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
832 net_stats->rx_errors = stats->rx.rx_errors;
833 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 834 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 835 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 836 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 837
25f0a061 838 return net_stats;
01f2e4ea
SF		 839}
840
b3abfbd2 841void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 842{
843 enic->mc_count = 0;
e0afe53f 844 enic->uc_count = 0;
99ef5639 845 enic->flags = 0;
01f2e4ea
SF		 846}
847
848static int enic_set_mac_addr(struct net_device *netdev, char *addr)
849{
f8bd9091
SF		 850 struct enic *enic = netdev_priv(netdev);
851
852 if (enic_is_dynamic(enic)) {
853 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
854 return -EADDRNOTAVAIL;
855 } else {
856 if (!is_valid_ether_addr(addr))
857 return -EADDRNOTAVAIL;
858 }
01f2e4ea
SF		 859
860 memcpy(netdev->dev_addr, addr, netdev->addr_len);
861
862 return 0;
863}
864
f8bd9091
SF		 865static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
866{
867 struct enic *enic = netdev_priv(netdev);
868 struct sockaddr *saddr = p;
869 char *addr = saddr->sa_data;
870 int err;
871
872 if (netif_running(enic->netdev)) {
873 err = enic_dev_del_station_addr(enic);
874 if (err)
875 return err;
876 }
877
878 err = enic_set_mac_addr(netdev, addr);
879 if (err)
880 return err;
881
882 if (netif_running(enic->netdev)) {
883 err = enic_dev_add_station_addr(enic);
884 if (err)
885 return err;
886 }
887
888 return err;
889}
890
891static int enic_set_mac_address(struct net_device *netdev, void *p)
892{
294dab25 893 struct sockaddr *saddr = p;
c76fd32d
VK		 894 char *addr = saddr->sa_data;
895 struct enic *enic = netdev_priv(netdev);
896 int err;
897
898 err = enic_dev_del_station_addr(enic);
899 if (err)
900 return err;
901
902 err = enic_set_mac_addr(netdev, addr);
903 if (err)
904 return err;
294dab25 905
c76fd32d 906 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 907}
908
e0afe53f 909static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 910{
319d7e84 911 struct net_device *netdev = enic->netdev;
22bedad3 912 struct netdev_hw_addr *ha;
4cd24eaf 913 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 914 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 915 unsigned int i, j;
916
319d7e84
RP		 917 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
918 netdev_warn(netdev, "Registering only %d out of %d "
919 "multicast addresses\n",
920 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 921 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 922 }
01f2e4ea
SF		 923
924 /* Is there an easier way? Trying to minimize to
925 * calls to add/del multicast addrs. We keep the
926 * addrs from the last call in enic->mc_addr and
927 * look for changes to add/del.
928 */
929
48e2f183 930 i = 0;
22bedad3 931 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 932 if (i == mc_count)
933 break;
22bedad3 934 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 935 }
936
937 for (i = 0; i < enic->mc_count; i++) {
938 for (j = 0; j < mc_count; j++)
939 if (compare_ether_addr(enic->mc_addr[i],
940 mc_addr[j]) == 0)
941 break;
942 if (j == mc_count)
319d7e84 943 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 944 }
945
946 for (i = 0; i < mc_count; i++) {
947 for (j = 0; j < enic->mc_count; j++)
948 if (compare_ether_addr(mc_addr[i],
949 enic->mc_addr[j]) == 0)
950 break;
951 if (j == enic->mc_count)
319d7e84 952 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 953 }
954
955 /* Save the list to compare against next time
956 */
957
958 for (i = 0; i < mc_count; i++)
959 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
960
961 enic->mc_count = mc_count;
01f2e4ea
SF		 962}
963
e0afe53f 964static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 965{
966 struct net_device *netdev = enic->netdev;
967 struct netdev_hw_addr *ha;
968 unsigned int uc_count = netdev_uc_count(netdev);
969 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
970 unsigned int i, j;
971
972 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
973 netdev_warn(netdev, "Registering only %d out of %d "
974 "unicast addresses\n",
975 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
976 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
977 }
978
979 /* Is there an easier way? Trying to minimize to
980 * calls to add/del unicast addrs. We keep the
981 * addrs from the last call in enic->uc_addr and
982 * look for changes to add/del.
983 */
984
985 i = 0;
986 netdev_for_each_uc_addr(ha, netdev) {
987 if (i == uc_count)
988 break;
989 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
990 }
991
992 for (i = 0; i < enic->uc_count; i++) {
993 for (j = 0; j < uc_count; j++)
994 if (compare_ether_addr(enic->uc_addr[i],
995 uc_addr[j]) == 0)
996 break;
997 if (j == uc_count)
998 enic_dev_del_addr(enic, enic->uc_addr[i]);
999 }
1000
1001 for (i = 0; i < uc_count; i++) {
1002 for (j = 0; j < enic->uc_count; j++)
1003 if (compare_ether_addr(uc_addr[i],
1004 enic->uc_addr[j]) == 0)
1005 break;
1006 if (j == enic->uc_count)
1007 enic_dev_add_addr(enic, uc_addr[i]);
1008 }
1009
1010 /* Save the list to compare against next time
1011 */
1012
1013 for (i = 0; i < uc_count; i++)
1014 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1015
1016 enic->uc_count = uc_count;
1017}
1018
1019/* netif_tx_lock held, BHs disabled */
1020static void enic_set_rx_mode(struct net_device *netdev)
1021{
1022 struct enic *enic = netdev_priv(netdev);
1023 int directed = 1;
1024 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1025 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1026 int promisc = (netdev->flags & IFF_PROMISC) ||
1027 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1028 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1029 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1030 unsigned int flags = netdev->flags |
1031 (allmulti ? IFF_ALLMULTI : 0) |
1032 (promisc ? IFF_PROMISC : 0);
1033
1034 if (enic->flags != flags) {
1035 enic->flags = flags;
1036 enic_dev_packet_filter(enic, directed,
1037 multicast, broadcast, promisc, allmulti);
1038 }
1039
1040 if (!promisc) {
e0afe53f 1041 enic_update_unicast_addr_list(enic);
319d7e84 1042 if (!allmulti)
e0afe53f 1043 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1044 }
1045}
1046
01f2e4ea
SF		 1047/* netif_tx_lock held, BHs disabled */
1048static void enic_tx_timeout(struct net_device *netdev)
1049{
1050 struct enic *enic = netdev_priv(netdev);
1051 schedule_work(&enic->reset);
1052}
1053
0b1c00fc
RP		 1054static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1055{
1056 struct enic *enic = netdev_priv(netdev);
1057
1058 if (vf != PORT_SELF_VF)
1059 return -EOPNOTSUPP;
1060
1061 /* Ignore the vf argument for now. We can assume the request
1062 * is coming on a vf.
1063 */
1064 if (is_valid_ether_addr(mac)) {
1065 memcpy(enic->pp.vf_mac, mac, ETH_ALEN);
1066 return 0;
1067 } else
1068 return -EINVAL;
1069}
1070
f8bd9091
SF		 1071static int enic_set_vf_port(struct net_device *netdev, int vf,
1072 struct nlattr *port[])
1073{
1074 struct enic *enic = netdev_priv(netdev);
b3abfbd2
RP		 1075 struct enic_port_profile prev_pp;
1076 int err = 0, restore_pp = 1;
08f382eb 1077
b3abfbd2
RP		 1078 /* don't support VFs, yet */
1079 if (vf != PORT_SELF_VF)
1080 return -EOPNOTSUPP;
08f382eb 1081
b3abfbd2
RP		 1082 if (!port[IFLA_PORT_REQUEST])
1083 return -EOPNOTSUPP;
1084
1085 memcpy(&prev_pp, &enic->pp, sizeof(enic->pp));
1086 memset(&enic->pp, 0, sizeof(enic->pp));
1087
1088 enic->pp.set |= ENIC_SET_REQUEST;
1089 enic->pp.request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1090
1091 if (port[IFLA_PORT_PROFILE]) {
b3abfbd2
RP		 1092 enic->pp.set |= ENIC_SET_NAME;
1093 memcpy(enic->pp.name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1094 PORT_PROFILE_MAX);
1095 }
1096
1097 if (port[IFLA_PORT_INSTANCE_UUID]) {
b3abfbd2
RP		 1098 enic->pp.set |= ENIC_SET_INSTANCE;
1099 memcpy(enic->pp.instance_uuid,
08f382eb
SF		 1100 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1101 }
1102
1103 if (port[IFLA_PORT_HOST_UUID]) {
b3abfbd2
RP		 1104 enic->pp.set |= ENIC_SET_HOST;
1105 memcpy(enic->pp.host_uuid,
08f382eb
SF		 1106 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1107 }
f8bd9091 1108
b3abfbd2
RP		 1109 /* Special case handling: mac came from IFLA_VF_MAC */
1110 if (!is_zero_ether_addr(prev_pp.vf_mac))
1111 memcpy(enic->pp.mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d
SF		 1112
1113 if (is_zero_ether_addr(netdev->dev_addr))
1114 random_ether_addr(netdev->dev_addr);
f8bd9091 1115
b3abfbd2
RP		 1116 err = enic_process_set_pp_request(enic, &prev_pp, &restore_pp);
1117 if (err) {
1118 if (restore_pp) {
1119 /* Things are still the way they were: Implicit
1120 * DISASSOCIATE failed
1121 */
1122 memcpy(&enic->pp, &prev_pp, sizeof(enic->pp));
1123 } else {
1124 memset(&enic->pp, 0, sizeof(enic->pp));
1125 memset(netdev->dev_addr, 0, ETH_ALEN);
1126 }
1127 } else {
1128 /* Set flag to indicate that the port assoc/disassoc
1129 * request has been sent out to fw
1130 */
1131 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1132
1133 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
1134 if (enic->pp.request == PORT_REQUEST_DISASSOCIATE) {
1135 memset(enic->pp.mac_addr, 0, ETH_ALEN);
1136 memset(netdev->dev_addr, 0, ETH_ALEN);
1137 }
1138 }
29639059 1139
29639059
RP		 1140 memset(enic->pp.vf_mac, 0, ETH_ALEN);
1141
29639059 1142 return err;
f8bd9091
SF		 1143}
1144
1145static int enic_get_vf_port(struct net_device *netdev, int vf,
1146 struct sk_buff *skb)
1147{
1148 struct enic *enic = netdev_priv(netdev);
f8bd9091 1149 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
b3abfbd2 1150 int err;
f8bd9091 1151
4dce2396 1152 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1153 return -ENODATA;
f8bd9091 1154
b3abfbd2 1155 err = enic_process_get_pp_request(enic, enic->pp.request, &response);
f8bd9091 1156 if (err)
b3abfbd2 1157 return err;
f8bd9091
SF		 1158
1159 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, enic->pp.request);
1160 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
08f382eb
SF		 1161 if (enic->pp.set & ENIC_SET_NAME)
1162 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
1163 enic->pp.name);
1164 if (enic->pp.set & ENIC_SET_INSTANCE)
1165 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
1166 enic->pp.instance_uuid);
1167 if (enic->pp.set & ENIC_SET_HOST)
1168 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
1169 enic->pp.host_uuid);
f8bd9091
SF		 1170
1171 return 0;
1172
1173nla_put_failure:
1174 return -EMSGSIZE;
1175}
1176
01f2e4ea
SF		 1177static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1178{
1179 struct enic *enic = vnic_dev_priv(rq->vdev);
1180
1181 if (!buf->os_buf)
1182 return;
1183
1184 pci_unmap_single(enic->pdev, buf->dma_addr,
1185 buf->len, PCI_DMA_FROMDEVICE);
1186 dev_kfree_skb_any(buf->os_buf);
1187}
1188
01f2e4ea
SF		 1189static int enic_rq_alloc_buf(struct vnic_rq *rq)
1190{
1191 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1192 struct net_device *netdev = enic->netdev;
01f2e4ea 1193 struct sk_buff *skb;
1825aca6 1194 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1195 unsigned int os_buf_index = 0;
1196 dma_addr_t dma_addr;
1197
89d71a66 1198 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1199 if (!skb)
1200 return -ENOMEM;
1201
1202 dma_addr = pci_map_single(enic->pdev, skb->data,
1203 len, PCI_DMA_FROMDEVICE);
1204
1205 enic_queue_rq_desc(rq, skb, os_buf_index,
1206 dma_addr, len);
1207
1208 return 0;
1209}
1210
01f2e4ea
SF		 1211static void enic_rq_indicate_buf(struct vnic_rq *rq,
1212 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1213 int skipped, void *opaque)
1214{
1215 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1216 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1217 struct sk_buff *skb;
1218
1219 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1220 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1221 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1222 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1223 u8 packet_error;
f8cac14a 1224 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1225 u32 rss_hash;
1226
1227 if (skipped)
1228 return;
1229
1230 skb = buf->os_buf;
1231 prefetch(skb->data - NET_IP_ALIGN);
1232 pci_unmap_single(enic->pdev, buf->dma_addr,
1233 buf->len, PCI_DMA_FROMDEVICE);
1234
1235 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1236 &type, &color, &q_number, &completed_index,
1237 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1238 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1239 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1240 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1241 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1242 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1243 &fcs_ok);
1244
1245 if (packet_error) {
1246
350991e1
SF		 1247 if (!fcs_ok) {
1248 if (bytes_written > 0)
1249 enic->rq_bad_fcs++;
1250 else if (bytes_written == 0)
1251 enic->rq_truncated_pkts++;
1252 }
01f2e4ea
SF		 1253
1254 dev_kfree_skb_any(skb);
1255
1256 return;
1257 }
1258
1259 if (eop && bytes_written > 0) {
1260
1261 /* Good receive
1262 */
1263
1264 skb_put(skb, bytes_written);
86ca9db7 1265 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1266
5ec8f9b8 1267 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1268 skb->csum = htons(checksum);
1269 skb->ip_summed = CHECKSUM_COMPLETE;
1270 }
1271
86ca9db7 1272 skb->dev = netdev;
01f2e4ea 1273
6ede746b
JP		 1274 if (vlan_stripped)
1275 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1276
6ede746b
JP		 1277 if (netdev->features & NETIF_F_GRO)
1278 napi_gro_receive(&enic->napi[q_number], skb);
1279 else
1280 netif_receive_skb(skb);
01f2e4ea
SF		 1281 } else {
1282
1283 /* Buffer overflow
1284 */
1285
1286 dev_kfree_skb_any(skb);
1287 }
1288}
1289
1290static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1291 u8 type, u16 q_number, u16 completed_index, void *opaque)
1292{
1293 struct enic *enic = vnic_dev_priv(vdev);
1294
1295 vnic_rq_service(&enic->rq[q_number], cq_desc,
1296 completed_index, VNIC_RQ_RETURN_DESC,
1297 enic_rq_indicate_buf, opaque);
1298
1299 return 0;
1300}
1301
01f2e4ea
SF		 1302static int enic_poll(struct napi_struct *napi, int budget)
1303{
717258ba
VK		 1304 struct net_device *netdev = napi->dev;
1305 struct enic *enic = netdev_priv(netdev);
1306 unsigned int cq_rq = enic_cq_rq(enic, 0);
1307 unsigned int cq_wq = enic_cq_wq(enic, 0);
1308 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1309 unsigned int rq_work_to_do = budget;
1310 unsigned int wq_work_to_do = -1; /* no limit */
1311 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1312 int err;
01f2e4ea
SF		 1313
1314 /* Service RQ (first) and WQ
1315 */
1316
717258ba 1317 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1318 rq_work_to_do, enic_rq_service, NULL);
1319
717258ba 1320 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1321 wq_work_to_do, enic_wq_service, NULL);
1322
1323 /* Accumulate intr event credits for this polling
1324 * cycle. An intr event is the completion of a
1325 * a WQ or RQ packet.
1326 */
1327
1328 work_done = rq_work_done + wq_work_done;
1329
1330 if (work_done > 0)
717258ba 1331 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1332 work_done,
1333 0 /* don't unmask intr */,
1334 0 /* don't reset intr timer */);
1335
0eb26022 1336 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1337
2d6ddced
SF		 1338 /* Buffer allocation failed. Stay in polling
1339 * mode so we can try to fill the ring again.
1340 */
01f2e4ea 1341
2d6ddced
SF		 1342 if (err)
1343 rq_work_done = rq_work_to_do;
01f2e4ea 1344
2d6ddced 1345 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1346
2d6ddced 1347 /* Some work done, but not enough to stay in polling,
88132f55 1348 * exit polling
01f2e4ea
SF		 1349 */
1350
288379f0 1351 napi_complete(napi);
717258ba 1352 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1353 }
1354
1355 return rq_work_done;
1356}
1357
1358static int enic_poll_msix(struct napi_struct *napi, int budget)
1359{
717258ba
VK		 1360 struct net_device *netdev = napi->dev;
1361 struct enic *enic = netdev_priv(netdev);
1362 unsigned int rq = (napi - &enic->napi[0]);
1363 unsigned int cq = enic_cq_rq(enic, rq);
1364 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1365 unsigned int work_to_do = budget;
1366 unsigned int work_done;
2d6ddced 1367 int err;
01f2e4ea
SF		 1368
1369 /* Service RQ
1370 */
1371
717258ba 1372 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1373 work_to_do, enic_rq_service, NULL);
1374
2d6ddced
SF		 1375 /* Return intr event credits for this polling
1376 * cycle. An intr event is the completion of a
1377 * RQ packet.
1378 */
01f2e4ea 1379
2d6ddced 1380 if (work_done > 0)
717258ba 1381 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1382 work_done,
1383 0 /* don't unmask intr */,
1384 0 /* don't reset intr timer */);
01f2e4ea 1385
0eb26022 1386 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1387
1388 /* Buffer allocation failed. Stay in polling mode
1389 * so we can try to fill the ring again.
1390 */
1391
1392 if (err)
1393 work_done = work_to_do;
1394
1395 if (work_done < work_to_do) {
1396
1397 /* Some work done, but not enough to stay in polling,
88132f55 1398 * exit polling
01f2e4ea
SF		 1399 */
1400
288379f0 1401 napi_complete(napi);
717258ba 1402 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1403 }
1404
1405 return work_done;
1406}
1407
1408static void enic_notify_timer(unsigned long data)
1409{
1410 struct enic *enic = (struct enic *)data;
1411
1412 enic_notify_check(enic);
1413
25f0a061
SF		 1414 mod_timer(&enic->notify_timer,
1415 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1416}
1417
1418static void enic_free_intr(struct enic *enic)
1419{
1420 struct net_device *netdev = enic->netdev;
1421 unsigned int i;
1422
1423 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1424 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1425 free_irq(enic->pdev->irq, netdev);
1426 break;
8f4d248c
SF		 1427 case VNIC_DEV_INTR_MODE_MSI:
1428 free_irq(enic->pdev->irq, enic);
1429 break;
01f2e4ea
SF		 1430 case VNIC_DEV_INTR_MODE_MSIX:
1431 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1432 if (enic->msix[i].requested)
1433 free_irq(enic->msix_entry[i].vector,
1434 enic->msix[i].devid);
1435 break;
1436 default:
1437 break;
1438 }
1439}
1440
1441static int enic_request_intr(struct enic *enic)
1442{
1443 struct net_device *netdev = enic->netdev;
717258ba 1444 unsigned int i, intr;
01f2e4ea
SF		 1445 int err = 0;
1446
1447 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1448
1449 case VNIC_DEV_INTR_MODE_INTX:
1450
1451 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1452 IRQF_SHARED, netdev->name, netdev);
1453 break;
1454
1455 case VNIC_DEV_INTR_MODE_MSI:
1456
1457 err = request_irq(enic->pdev->irq, enic_isr_msi,
1458 0, netdev->name, enic);
1459 break;
1460
1461 case VNIC_DEV_INTR_MODE_MSIX:
1462
717258ba
VK		 1463 for (i = 0; i < enic->rq_count; i++) {
1464 intr = enic_msix_rq_intr(enic, i);
1465 sprintf(enic->msix[intr].devname,
1466 "%.11s-rx-%d", netdev->name, i);
1467 enic->msix[intr].isr = enic_isr_msix_rq;
1468 enic->msix[intr].devid = &enic->napi[i];
1469 }
01f2e4ea 1470
717258ba
VK		 1471 for (i = 0; i < enic->wq_count; i++) {
1472 intr = enic_msix_wq_intr(enic, i);
1473 sprintf(enic->msix[intr].devname,
1474 "%.11s-tx-%d", netdev->name, i);
1475 enic->msix[intr].isr = enic_isr_msix_wq;
1476 enic->msix[intr].devid = enic;
1477 }
01f2e4ea 1478
717258ba
VK		 1479 intr = enic_msix_err_intr(enic);
1480 sprintf(enic->msix[intr].devname,
01f2e4ea 1481 "%.11s-err", netdev->name);
717258ba
VK		 1482 enic->msix[intr].isr = enic_isr_msix_err;
1483 enic->msix[intr].devid = enic;
01f2e4ea 1484
717258ba
VK		 1485 intr = enic_msix_notify_intr(enic);
1486 sprintf(enic->msix[intr].devname,
01f2e4ea 1487 "%.11s-notify", netdev->name);
717258ba
VK		 1488 enic->msix[intr].isr = enic_isr_msix_notify;
1489 enic->msix[intr].devid = enic;
1490
1491 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1492 enic->msix[i].requested = 0;
01f2e4ea 1493
717258ba 1494 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1495 err = request_irq(enic->msix_entry[i].vector,
1496 enic->msix[i].isr, 0,
1497 enic->msix[i].devname,
1498 enic->msix[i].devid);
1499 if (err) {
1500 enic_free_intr(enic);
1501 break;
1502 }
1503 enic->msix[i].requested = 1;
1504 }
1505
1506 break;
1507
1508 default:
1509 break;
1510 }
1511
1512 return err;
1513}
1514
b3d18d19
SF		 1515static void enic_synchronize_irqs(struct enic *enic)
1516{
1517 unsigned int i;
1518
1519 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1520 case VNIC_DEV_INTR_MODE_INTX:
1521 case VNIC_DEV_INTR_MODE_MSI:
1522 synchronize_irq(enic->pdev->irq);
1523 break;
1524 case VNIC_DEV_INTR_MODE_MSIX:
1525 for (i = 0; i < enic->intr_count; i++)
1526 synchronize_irq(enic->msix_entry[i].vector);
1527 break;
1528 default:
1529 break;
1530 }
1531}
1532
383ab92f 1533static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1534{
1535 int err;
1536
56ac88b3 1537 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1538 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1539 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1540 err = vnic_dev_notify_set(enic->vdev,
1541 enic_legacy_notify_intr());
01f2e4ea
SF		 1542 break;
1543 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1544 err = vnic_dev_notify_set(enic->vdev,
1545 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1546 break;
1547 default:
1548 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1549 break;
1550 }
56ac88b3 1551 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1552
1553 return err;
1554}
1555
1556static void enic_notify_timer_start(struct enic *enic)
1557{
1558 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1559 case VNIC_DEV_INTR_MODE_MSI:
1560 mod_timer(&enic->notify_timer, jiffies);
1561 break;
1562 default:
1563 /* Using intr for notification for INTx/MSI-X */
1564 break;
6403eab1 1565 }
01f2e4ea
SF		 1566}
1567
1568/* rtnl lock is held, process context */
1569static int enic_open(struct net_device *netdev)
1570{
1571 struct enic *enic = netdev_priv(netdev);
1572 unsigned int i;
1573 int err;
1574
4b75a442
SF		 1575 err = enic_request_intr(enic);
1576 if (err) {
a7a79deb 1577 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1578 return err;
1579 }
1580
383ab92f 1581 err = enic_dev_notify_set(enic);
4b75a442 1582 if (err) {
a7a79deb
VK		 1583 netdev_err(netdev,
1584 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1585 goto err_out_free_intr;
1586 }
1587
01f2e4ea 1588 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1589 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1590 /* Need at least one buffer on ring to get going */
1591 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1592 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1593 err = -ENOMEM;
4b75a442 1594 goto err_out_notify_unset;
01f2e4ea
SF		 1595 }
1596 }
1597
1598 for (i = 0; i < enic->wq_count; i++)
1599 vnic_wq_enable(&enic->wq[i]);
1600 for (i = 0; i < enic->rq_count; i++)
1601 vnic_rq_enable(&enic->rq[i]);
1602
29639059
RP		 1603 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1604 enic_dev_add_addr(enic, enic->pp.mac_addr);
1605 else
1606 enic_dev_add_station_addr(enic);
319d7e84 1607 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1608
1609 netif_wake_queue(netdev);
717258ba
VK		 1610
1611 for (i = 0; i < enic->rq_count; i++)
1612 napi_enable(&enic->napi[i]);
1613
383ab92f 1614 enic_dev_enable(enic);
01f2e4ea
SF		 1615
1616 for (i = 0; i < enic->intr_count; i++)
1617 vnic_intr_unmask(&enic->intr[i]);
1618
1619 enic_notify_timer_start(enic);
1620
1621 return 0;
4b75a442
SF		 1622
1623err_out_notify_unset:
383ab92f 1624 enic_dev_notify_unset(enic);
4b75a442
SF		 1625err_out_free_intr:
1626 enic_free_intr(enic);
1627
1628 return err;
01f2e4ea
SF		 1629}
1630
1631/* rtnl lock is held, process context */
1632static int enic_stop(struct net_device *netdev)
1633{
1634 struct enic *enic = netdev_priv(netdev);
1635 unsigned int i;
1636 int err;
1637
29046f9b 1638 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1639 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1640 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1641 }
b3d18d19
SF		 1642
1643 enic_synchronize_irqs(enic);
1644
01f2e4ea
SF		 1645 del_timer_sync(&enic->notify_timer);
1646
383ab92f 1647 enic_dev_disable(enic);
717258ba
VK		 1648
1649 for (i = 0; i < enic->rq_count; i++)
1650 napi_disable(&enic->napi[i]);
1651
b3d18d19
SF		 1652 netif_carrier_off(netdev);
1653 netif_tx_disable(netdev);
29639059
RP		 1654 if (enic_is_dynamic(enic) && !is_zero_ether_addr(enic->pp.mac_addr))
1655 enic_dev_del_addr(enic, enic->pp.mac_addr);
1656 else
1657 enic_dev_del_station_addr(enic);
f8bd9091 1658
01f2e4ea
SF		 1659 for (i = 0; i < enic->wq_count; i++) {
1660 err = vnic_wq_disable(&enic->wq[i]);
1661 if (err)
1662 return err;
1663 }
1664 for (i = 0; i < enic->rq_count; i++) {
1665 err = vnic_rq_disable(&enic->rq[i]);
1666 if (err)
1667 return err;
1668 }
1669
383ab92f 1670 enic_dev_notify_unset(enic);
4b75a442
SF		 1671 enic_free_intr(enic);
1672
01f2e4ea
SF		 1673 for (i = 0; i < enic->wq_count; i++)
1674 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1675 for (i = 0; i < enic->rq_count; i++)
1676 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1677 for (i = 0; i < enic->cq_count; i++)
1678 vnic_cq_clean(&enic->cq[i]);
1679 for (i = 0; i < enic->intr_count; i++)
1680 vnic_intr_clean(&enic->intr[i]);
1681
1682 return 0;
1683}
1684
1685static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1686{
1687 struct enic *enic = netdev_priv(netdev);
1688 int running = netif_running(netdev);
1689
25f0a061
SF		 1690 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1691 return -EINVAL;
1692
c97c894d
RP		 1693 if (enic_is_dynamic(enic))
1694 return -EOPNOTSUPP;
1695
01f2e4ea
SF		 1696 if (running)
1697 enic_stop(netdev);
1698
01f2e4ea
SF		 1699 netdev->mtu = new_mtu;
1700
1701 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1702 netdev_warn(netdev,
1703 "interface MTU (%d) set higher than port MTU (%d)\n",
1704 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1705
1706 if (running)
1707 enic_open(netdev);
1708
1709 return 0;
1710}
1711
c97c894d
RP		 1712static void enic_change_mtu_work(struct work_struct *work)
1713{
1714 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1715 struct net_device *netdev = enic->netdev;
1716 int new_mtu = vnic_dev_mtu(enic->vdev);
1717 int err;
1718 unsigned int i;
1719
1720 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1721
1722 rtnl_lock();
1723
1724 /* Stop RQ */
1725 del_timer_sync(&enic->notify_timer);
1726
1727 for (i = 0; i < enic->rq_count; i++)
1728 napi_disable(&enic->napi[i]);
1729
1730 vnic_intr_mask(&enic->intr[0]);
1731 enic_synchronize_irqs(enic);
1732 err = vnic_rq_disable(&enic->rq[0]);
1733 if (err) {
1734 netdev_err(netdev, "Unable to disable RQ.\n");
1735 return;
1736 }
1737 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1738 vnic_cq_clean(&enic->cq[0]);
1739 vnic_intr_clean(&enic->intr[0]);
1740
1741 /* Fill RQ with new_mtu-sized buffers */
1742 netdev->mtu = new_mtu;
1743 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1744 /* Need at least one buffer on ring to get going */
1745 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1746 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1747 return;
1748 }
1749
1750 /* Start RQ */
1751 vnic_rq_enable(&enic->rq[0]);
1752 napi_enable(&enic->napi[0]);
1753 vnic_intr_unmask(&enic->intr[0]);
1754 enic_notify_timer_start(enic);
1755
1756 rtnl_unlock();
1757
1758 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1759}
1760
01f2e4ea
SF		 1761#ifdef CONFIG_NET_POLL_CONTROLLER
1762static void enic_poll_controller(struct net_device *netdev)
1763{
1764 struct enic *enic = netdev_priv(netdev);
1765 struct vnic_dev *vdev = enic->vdev;
717258ba 1766 unsigned int i, intr;
01f2e4ea
SF		 1767
1768 switch (vnic_dev_get_intr_mode(vdev)) {
1769 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1770 for (i = 0; i < enic->rq_count; i++) {
1771 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1772 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1773 &enic->napi[i]);
717258ba 1774 }
b880a954
VK		 1775
1776 for (i = 0; i < enic->wq_count; i++) {
1777 intr = enic_msix_wq_intr(enic, i);
1778 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1779 }
1780
01f2e4ea
SF		 1781 break;
1782 case VNIC_DEV_INTR_MODE_MSI:
1783 enic_isr_msi(enic->pdev->irq, enic);
1784 break;
1785 case VNIC_DEV_INTR_MODE_INTX:
1786 enic_isr_legacy(enic->pdev->irq, netdev);
1787 break;
1788 default:
1789 break;
1790 }
1791}
1792#endif
1793
1794static int enic_dev_wait(struct vnic_dev *vdev,
1795 int (*start)(struct vnic_dev *, int),
1796 int (*finished)(struct vnic_dev *, int *),
1797 int arg)
1798{
1799 unsigned long time;
1800 int done;
1801 int err;
1802
1803 BUG_ON(in_interrupt());
1804
1805 err = start(vdev, arg);
1806 if (err)
1807 return err;
1808
1809 /* Wait for func to complete...2 seconds max
1810 */
1811
1812 time = jiffies + (HZ * 2);
1813 do {
1814
1815 err = finished(vdev, &done);
1816 if (err)
1817 return err;
1818
1819 if (done)
1820 return 0;
1821
1822 schedule_timeout_uninterruptible(HZ / 10);
1823
1824 } while (time_after(time, jiffies));
1825
1826 return -ETIMEDOUT;
1827}
1828
1829static int enic_dev_open(struct enic *enic)
1830{
1831 int err;
1832
1833 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1834 vnic_dev_open_done, 0);
1835 if (err)
a7a79deb
VK		 1836 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1837 err);
01f2e4ea
SF		 1838
1839 return err;
1840}
1841
99ef5639 1842static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1843{
1844 int err;
1845
99ef5639
VK		 1846 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1847 vnic_dev_hang_reset_done, 0);
01f2e4ea 1848 if (err)
a7a79deb
VK		 1849 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1850 err);
01f2e4ea
SF		 1851
1852 return err;
1853}
1854
717258ba
VK		 1855static int enic_set_rsskey(struct enic *enic)
1856{
1f4f067f 1857 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1858 union vnic_rss_key *rss_key_buf_va = NULL;
1859 union vnic_rss_key rss_key = {
1860 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1861 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1862 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1863 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1864 };
1865 int err;
1866
1867 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1868 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1869 if (!rss_key_buf_va)
1870 return -ENOMEM;
1871
1872 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1873
1874 spin_lock(&enic->devcmd_lock);
1875 err = enic_set_rss_key(enic,
1876 rss_key_buf_pa,
1877 sizeof(union vnic_rss_key));
1878 spin_unlock(&enic->devcmd_lock);
1879
1880 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1881 rss_key_buf_va, rss_key_buf_pa);
1882
1883 return err;
1884}
1885
1886static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1887{
1f4f067f 1888 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1889 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1890 unsigned int i;
1891 int err;
1892
1893 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1894 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1895 if (!rss_cpu_buf_va)
1896 return -ENOMEM;
1897
1898 for (i = 0; i < (1 << rss_hash_bits); i++)
1899 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1900
1901 spin_lock(&enic->devcmd_lock);
1902 err = enic_set_rss_cpu(enic,
1903 rss_cpu_buf_pa,
1904 sizeof(union vnic_rss_cpu));
1905 spin_unlock(&enic->devcmd_lock);
1906
1907 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1908 rss_cpu_buf_va, rss_cpu_buf_pa);
1909
1910 return err;
1911}
1912
1913static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1914 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1915{
68f71708
SF		 1916 const u8 tso_ipid_split_en = 0;
1917 const u8 ig_vlan_strip_en = 1;
383ab92f 1918 int err;
68f71708 1919
717258ba
VK		 1920 /* Enable VLAN tag stripping.
1921 */
68f71708 1922
383ab92f
VK		 1923 spin_lock(&enic->devcmd_lock);
1924 err = enic_set_nic_cfg(enic,
68f71708
SF		 1925 rss_default_cpu, rss_hash_type,
1926 rss_hash_bits, rss_base_cpu,
1927 rss_enable, tso_ipid_split_en,
1928 ig_vlan_strip_en);
383ab92f
VK		 1929 spin_unlock(&enic->devcmd_lock);
1930
1931 return err;
1932}
1933
717258ba
VK		 1934static int enic_set_rss_nic_cfg(struct enic *enic)
1935{
1936 struct device *dev = enic_get_dev(enic);
1937 const u8 rss_default_cpu = 0;
1938 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1939 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1940 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1941 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1942 const u8 rss_hash_bits = 7;
1943 const u8 rss_base_cpu = 0;
1944 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1945
1946 if (rss_enable) {
1947 if (!enic_set_rsskey(enic)) {
1948 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1949 rss_enable = 0;
1950 dev_warn(dev, "RSS disabled, "
1951 "Failed to set RSS cpu indirection table.");
1952 }
1953 } else {
1954 rss_enable = 0;
1955 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1956 }
1957 }
1958
1959 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1960 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1961}
1962
01f2e4ea
SF		 1963static void enic_reset(struct work_struct *work)
1964{
1965 struct enic *enic = container_of(work, struct enic, reset);
1966
1967 if (!netif_running(enic->netdev))
1968 return;
1969
1970 rtnl_lock();
1971
383ab92f 1972 enic_dev_hang_notify(enic);
01f2e4ea 1973 enic_stop(enic->netdev);
99ef5639 1974 enic_dev_hang_reset(enic);
e0afe53f 1975 enic_reset_addr_lists(enic);
01f2e4ea 1976 enic_init_vnic_resources(enic);
717258ba 1977 enic_set_rss_nic_cfg(enic);
f8cac14a 1978 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1979 enic_open(enic->netdev);
1980
1981 rtnl_unlock();
1982}
1983
1984static int enic_set_intr_mode(struct enic *enic)
1985{
717258ba 1986 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 1987 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 1988 unsigned int i;
1989
1990 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 1991 * on system capabilities.
01f2e4ea
SF		 1992 *
1993 * Try MSI-X first
1994 *
1995 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
1996 * (the second to last INTR is used for WQ/RQ errors)
1997 * (the last INTR is used for notifications)
1998 */
1999
2000 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2001 for (i = 0; i < n + m + 2; i++)
2002 enic->msix_entry[i].entry = i;
2003
717258ba
VK		 2004 /* Use multiple RQs if RSS is enabled
2005 */
2006
2007 if (ENIC_SETTING(enic, RSS) &&
2008 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2009 enic->rq_count >= n &&
2010 enic->wq_count >= m &&
2011 enic->cq_count >= n + m &&
717258ba 2012 enic->intr_count >= n + m + 2) {
01f2e4ea 2013
717258ba 2014 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2015
717258ba
VK		 2016 enic->rq_count = n;
2017 enic->wq_count = m;
2018 enic->cq_count = n + m;
2019 enic->intr_count = n + m + 2;
01f2e4ea 2020
717258ba
VK		 2021 vnic_dev_set_intr_mode(enic->vdev,
2022 VNIC_DEV_INTR_MODE_MSIX);
2023
2024 return 0;
2025 }
2026 }
2027
2028 if (enic->config.intr_mode < 1 &&
2029 enic->rq_count >= 1 &&
2030 enic->wq_count >= m &&
2031 enic->cq_count >= 1 + m &&
2032 enic->intr_count >= 1 + m + 2) {
2033 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2034
2035 enic->rq_count = 1;
2036 enic->wq_count = m;
2037 enic->cq_count = 1 + m;
2038 enic->intr_count = 1 + m + 2;
2039
2040 vnic_dev_set_intr_mode(enic->vdev,
2041 VNIC_DEV_INTR_MODE_MSIX);
2042
2043 return 0;
2044 }
01f2e4ea
SF		 2045 }
2046
2047 /* Next try MSI
2048 *
2049 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2050 */
2051
2052 if (enic->config.intr_mode < 2 &&
2053 enic->rq_count >= 1 &&
2054 enic->wq_count >= 1 &&
2055 enic->cq_count >= 2 &&
2056 enic->intr_count >= 1 &&
2057 !pci_enable_msi(enic->pdev)) {
2058
2059 enic->rq_count = 1;
2060 enic->wq_count = 1;
2061 enic->cq_count = 2;
2062 enic->intr_count = 1;
2063
2064 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2065
2066 return 0;
2067 }
2068
2069 /* Next try INTx
2070 *
2071 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2072 * (the first INTR is used for WQ/RQ)
2073 * (the second INTR is used for WQ/RQ errors)
2074 * (the last INTR is used for notifications)
2075 */
2076
2077 if (enic->config.intr_mode < 3 &&
2078 enic->rq_count >= 1 &&
2079 enic->wq_count >= 1 &&
2080 enic->cq_count >= 2 &&
2081 enic->intr_count >= 3) {
2082
2083 enic->rq_count = 1;
2084 enic->wq_count = 1;
2085 enic->cq_count = 2;
2086 enic->intr_count = 3;
2087
2088 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2089
2090 return 0;
2091 }
2092
2093 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2094
2095 return -EINVAL;
2096}
2097
2098static void enic_clear_intr_mode(struct enic *enic)
2099{
2100 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2101 case VNIC_DEV_INTR_MODE_MSIX:
2102 pci_disable_msix(enic->pdev);
2103 break;
2104 case VNIC_DEV_INTR_MODE_MSI:
2105 pci_disable_msi(enic->pdev);
2106 break;
2107 default:
2108 break;
2109 }
2110
2111 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2112}
2113
f8bd9091
SF		 2114static const struct net_device_ops enic_netdev_dynamic_ops = {
2115 .ndo_open = enic_open,
2116 .ndo_stop = enic_stop,
2117 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2118 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2119 .ndo_validate_addr = eth_validate_addr,
319d7e84 2120 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2121 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2122 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2123 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2124 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2125 .ndo_tx_timeout = enic_tx_timeout,
2126 .ndo_set_vf_port = enic_set_vf_port,
2127 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2128 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2129#ifdef CONFIG_NET_POLL_CONTROLLER
2130 .ndo_poll_controller = enic_poll_controller,
2131#endif
2132};
2133
afe29f7a
SH		 2134static const struct net_device_ops enic_netdev_ops = {
2135 .ndo_open = enic_open,
2136 .ndo_stop = enic_stop,
00829823 2137 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2138 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2139 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2140 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2141 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2142 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2143 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2144 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2145 .ndo_tx_timeout = enic_tx_timeout,
2146#ifdef CONFIG_NET_POLL_CONTROLLER
2147 .ndo_poll_controller = enic_poll_controller,
2148#endif
2149};
2150
2fdba388 2151static void enic_dev_deinit(struct enic *enic)
6fdfa970 2152{
717258ba
VK		 2153 unsigned int i;
2154
2155 for (i = 0; i < enic->rq_count; i++)
2156 netif_napi_del(&enic->napi[i]);
2157
6fdfa970
SF		 2158 enic_free_vnic_resources(enic);
2159 enic_clear_intr_mode(enic);
2160}
2161
2fdba388 2162static int enic_dev_init(struct enic *enic)
6fdfa970 2163{
a7a79deb 2164 struct device *dev = enic_get_dev(enic);
6fdfa970 2165 struct net_device *netdev = enic->netdev;
717258ba 2166 unsigned int i;
6fdfa970
SF		 2167 int err;
2168
ea7ea65a
VK		 2169 /* Get interrupt coalesce timer info */
2170 err = enic_dev_intr_coal_timer_info(enic);
2171 if (err) {
2172 dev_warn(dev, "Using default conversion factor for "
2173 "interrupt coalesce timer\n");
2174 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2175 }
2176
6fdfa970
SF		 2177 /* Get vNIC configuration
2178 */
2179
2180 err = enic_get_vnic_config(enic);
2181 if (err) {
a7a79deb 2182 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2183 return err;
2184 }
2185
2186 /* Get available resource counts
2187 */
2188
2189 enic_get_res_counts(enic);
2190
2191 /* Set interrupt mode based on resource counts and system
2192 * capabilities
2193 */
2194
2195 err = enic_set_intr_mode(enic);
2196 if (err) {
a7a79deb
VK		 2197 dev_err(dev, "Failed to set intr mode based on resource "
2198 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2199 return err;
2200 }
2201
2202 /* Allocate and configure vNIC resources
2203 */
2204
2205 err = enic_alloc_vnic_resources(enic);
2206 if (err) {
a7a79deb 2207 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2208 goto err_out_free_vnic_resources;
2209 }
2210
2211 enic_init_vnic_resources(enic);
2212
717258ba 2213 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2214 if (err) {
a7a79deb 2215 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2216 goto err_out_free_vnic_resources;
2217 }
2218
2219 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2220 default:
717258ba 2221 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2222 break;
2223 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2224 for (i = 0; i < enic->rq_count; i++)
2225 netif_napi_add(netdev, &enic->napi[i],
2226 enic_poll_msix, 64);
6fdfa970
SF		 2227 break;
2228 }
2229
2230 return 0;
2231
2232err_out_free_vnic_resources:
2233 enic_clear_intr_mode(enic);
2234 enic_free_vnic_resources(enic);
2235
2236 return err;
2237}
2238
27e6c7d3
SF		 2239static void enic_iounmap(struct enic *enic)
2240{
2241 unsigned int i;
2242
2243 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2244 if (enic->bar[i].vaddr)
2245 iounmap(enic->bar[i].vaddr);
2246}
2247
01f2e4ea
SF		 2248static int __devinit enic_probe(struct pci_dev *pdev,
2249 const struct pci_device_id *ent)
2250{
a7a79deb 2251 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2252 struct net_device *netdev;
2253 struct enic *enic;
2254 int using_dac = 0;
2255 unsigned int i;
2256 int err;
8749b427
RP		 2257#ifdef CONFIG_PCI_IOV
2258 int pos = 0;
2259#endif
01f2e4ea 2260
01f2e4ea
SF		 2261 /* Allocate net device structure and initialize. Private
2262 * instance data is initialized to zero.
2263 */
2264
2265 netdev = alloc_etherdev(sizeof(struct enic));
2266 if (!netdev) {
a7a79deb 2267 pr_err("Etherdev alloc failed, aborting\n");
01f2e4ea
SF		 2268 return -ENOMEM;
2269 }
2270
01f2e4ea
SF		 2271 pci_set_drvdata(pdev, netdev);
2272
2273 SET_NETDEV_DEV(netdev, &pdev->dev);
2274
2275 enic = netdev_priv(netdev);
2276 enic->netdev = netdev;
2277 enic->pdev = pdev;
2278
2279 /* Setup PCI resources
2280 */
2281
29046f9b 2282 err = pci_enable_device_mem(pdev);
01f2e4ea 2283 if (err) {
a7a79deb 2284 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2285 goto err_out_free_netdev;
2286 }
2287
2288 err = pci_request_regions(pdev, DRV_NAME);
2289 if (err) {
a7a79deb 2290 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2291 goto err_out_disable_device;
2292 }
2293
2294 pci_set_master(pdev);
2295
2296 /* Query PCI controller on system for DMA addressing
2297 * limitation for the device. Try 40-bit first, and
2298 * fail to 32-bit.
2299 */
2300
50cf156a 2301 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2302 if (err) {
284901a9 2303 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2304 if (err) {
a7a79deb 2305 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2306 goto err_out_release_regions;
2307 }
284901a9 2308 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2309 if (err) {
a7a79deb
VK		 2310 dev_err(dev, "Unable to obtain %u-bit DMA "
2311 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2312 goto err_out_release_regions;
2313 }
2314 } else {
50cf156a 2315 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2316 if (err) {
a7a79deb
VK		 2317 dev_err(dev, "Unable to obtain %u-bit DMA "
2318 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2319 goto err_out_release_regions;
2320 }
2321 using_dac = 1;
2322 }
2323
27e6c7d3 2324 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2325 */
2326
27e6c7d3
SF		 2327 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2328 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2329 continue;
2330 enic->bar[i].len = pci_resource_len(pdev, i);
2331 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2332 if (!enic->bar[i].vaddr) {
a7a79deb 2333 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2334 err = -ENODEV;
2335 goto err_out_iounmap;
2336 }
2337 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2338 }
2339
2340 /* Register vNIC device
2341 */
2342
27e6c7d3
SF		 2343 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2344 ARRAY_SIZE(enic->bar));
01f2e4ea 2345 if (!enic->vdev) {
a7a79deb 2346 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2347 err = -ENODEV;
2348 goto err_out_iounmap;
2349 }
2350
8749b427
RP		 2351#ifdef CONFIG_PCI_IOV
2352 /* Get number of subvnics */
2353 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2354 if (pos) {
2355 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2356 (u16 *)&enic->num_vfs);
2357 if (enic->num_vfs) {
2358 err = pci_enable_sriov(pdev, enic->num_vfs);
2359 if (err) {
2360 dev_err(dev, "SRIOV enable failed, aborting."
2361 " pci_enable_sriov() returned %d\n",
2362 err);
2363 goto err_out_vnic_unregister;
2364 }
2365 enic->priv_flags |= ENIC_SRIOV_ENABLED;
2366 }
2367 }
2368
2369#endif
01f2e4ea
SF		 2370 /* Issue device open to get device in known state
2371 */
2372
2373 err = enic_dev_open(enic);
2374 if (err) {
a7a79deb 2375 dev_err(dev, "vNIC dev open failed, aborting\n");
8749b427 2376 goto err_out_disable_sriov;
01f2e4ea
SF		 2377 }
2378
69161425
VK		 2379 /* Setup devcmd lock
2380 */
2381
2382 spin_lock_init(&enic->devcmd_lock);
2383
2384 /*
2385 * Set ingress vlan rewrite mode before vnic initialization
2386 */
2387
2388 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2389 if (err) {
2390 dev_err(dev,
2391 "Failed to set ingress vlan rewrite mode, aborting.\n");
2392 goto err_out_dev_close;
2393 }
2394
01f2e4ea
SF		 2395 /* Issue device init to initialize the vnic-to-switch link.
2396 * We'll start with carrier off and wait for link UP
2397 * notification later to turn on carrier. We don't need
2398 * to wait here for the vnic-to-switch link initialization
2399 * to complete; link UP notification is the indication that
2400 * the process is complete.
2401 */
2402
2403 netif_carrier_off(netdev);
2404
a7a79deb
VK		 2405 /* Do not call dev_init for a dynamic vnic.
2406 * For a dynamic vnic, init_prov_info will be
2407 * called later by an upper layer.
2408 */
2409
f8bd9091
SF		 2410 if (!enic_is_dynamic(enic)) {
2411 err = vnic_dev_init(enic->vdev, 0);
2412 if (err) {
a7a79deb 2413 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2414 goto err_out_dev_close;
2415 }
01f2e4ea
SF		 2416 }
2417
6fdfa970 2418 err = enic_dev_init(enic);
01f2e4ea 2419 if (err) {
a7a79deb 2420 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2421 goto err_out_dev_close;
2422 }
2423
383ab92f 2424 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2425 */
2426
2427 init_timer(&enic->notify_timer);
2428 enic->notify_timer.function = enic_notify_timer;
2429 enic->notify_timer.data = (unsigned long)enic;
2430
2431 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2432 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2433
2434 for (i = 0; i < enic->wq_count; i++)
2435 spin_lock_init(&enic->wq_lock[i]);
2436
01f2e4ea
SF		 2437 /* Register net device
2438 */
2439
2440 enic->port_mtu = enic->config.mtu;
2441 (void)enic_change_mtu(netdev, enic->port_mtu);
2442
8749b427
RP		 2443#ifdef CONFIG_PCI_IOV
2444 if (enic_is_dynamic(enic) && pdev->is_virtfn &&
2445 is_zero_ether_addr(enic->mac_addr))
2446 random_ether_addr(enic->mac_addr);
2447#endif
2448
01f2e4ea
SF		 2449 err = enic_set_mac_addr(netdev, enic->mac_addr);
2450 if (err) {
a7a79deb 2451 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2452 goto err_out_dev_deinit;
01f2e4ea
SF		 2453 }
2454
7c844599
SF		 2455 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2456 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2457
f8bd9091
SF		 2458 if (enic_is_dynamic(enic))
2459 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2460 else
2461 netdev->netdev_ops = &enic_netdev_ops;
2462
01f2e4ea
SF		 2463 netdev->watchdog_timeo = 2 * HZ;
2464 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2465
73c1ea9b 2466 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2467 if (ENIC_SETTING(enic, LOOP)) {
2468 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2469 enic->loop_enable = 1;
2470 enic->loop_tag = enic->config.loop_tag;
2471 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2472 }
01f2e4ea 2473 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2474 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2475 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2476 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2477 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2478 if (ENIC_SETTING(enic, RXCSUM))
2479 netdev->hw_features |= NETIF_F_RXCSUM;
2480
2481 netdev->features |= netdev->hw_features;
2482
01f2e4ea
SF		 2483 if (using_dac)
2484 netdev->features |= NETIF_F_HIGHDMA;
2485
01789349
JP		 2486 netdev->priv_flags |= IFF_UNICAST_FLT;
2487
01f2e4ea
SF		 2488 err = register_netdev(netdev);
2489 if (err) {
a7a79deb 2490 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2491 goto err_out_dev_deinit;
01f2e4ea
SF		 2492 }
2493
2494 return 0;
2495
6fdfa970
SF		 2496err_out_dev_deinit:
2497 enic_dev_deinit(enic);
01f2e4ea
SF		 2498err_out_dev_close:
2499 vnic_dev_close(enic->vdev);
8749b427
RP		 2500err_out_disable_sriov:
2501#ifdef CONFIG_PCI_IOV
2502 if (enic_sriov_enabled(enic)) {
2503 pci_disable_sriov(pdev);
2504 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2505 }
01f2e4ea 2506err_out_vnic_unregister:
01f2e4ea 2507 vnic_dev_unregister(enic->vdev);
8749b427 2508#endif
01f2e4ea
SF		 2509err_out_iounmap:
2510 enic_iounmap(enic);
2511err_out_release_regions:
2512 pci_release_regions(pdev);
2513err_out_disable_device:
2514 pci_disable_device(pdev);
2515err_out_free_netdev:
2516 pci_set_drvdata(pdev, NULL);
2517 free_netdev(netdev);
2518
2519 return err;
2520}
2521
2522static void __devexit enic_remove(struct pci_dev *pdev)
2523{
2524 struct net_device *netdev = pci_get_drvdata(pdev);
2525
2526 if (netdev) {
2527 struct enic *enic = netdev_priv(netdev);
2528
23f333a2 2529 cancel_work_sync(&enic->reset);
c97c894d 2530 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2531 unregister_netdev(netdev);
6fdfa970 2532 enic_dev_deinit(enic);
01f2e4ea 2533 vnic_dev_close(enic->vdev);
8749b427
RP		 2534#ifdef CONFIG_PCI_IOV
2535 if (enic_sriov_enabled(enic)) {
2536 pci_disable_sriov(pdev);
2537 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2538 }
2539#endif
01f2e4ea
SF		 2540 vnic_dev_unregister(enic->vdev);
2541 enic_iounmap(enic);
2542 pci_release_regions(pdev);
2543 pci_disable_device(pdev);
2544 pci_set_drvdata(pdev, NULL);
2545 free_netdev(netdev);
2546 }
2547}
2548
2549static struct pci_driver enic_driver = {
2550 .name = DRV_NAME,
2551 .id_table = enic_id_table,
2552 .probe = enic_probe,
2553 .remove = __devexit_p(enic_remove),
2554};
2555
2556static int __init enic_init_module(void)
2557{
a7a79deb 2558 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2559
2560 return pci_register_driver(&enic_driver);
2561}
2562
2563static void __exit enic_cleanup_module(void)
2564{
2565 pci_unregister_driver(&enic_driver);
2566}
2567
2568module_init(enic_init_module);
2569module_exit(enic_cleanup_module);
Linux kernel - Deliverables
This page took 0.496316 seconds and 5 git commands to generate.