projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
enic: Add new fw devcmd to set mac address of an interface
[deliverable/linux.git] / drivers / net / ethernet / cisco / enic / enic_main.c
CommitLineData
01f2e4ea 1/*
29046f9b 2 * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
01f2e4ea
SF		 3 * Copyright 2007 Nuova Systems, Inc. All rights reserved.
4 *
5 * This program is free software; you may redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; version 2 of the License.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
10 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
11 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
12 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
13 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
14 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
15 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
16 * SOFTWARE.
17 *
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22#include <linux/string.h>
23#include <linux/errno.h>
24#include <linux/types.h>
25#include <linux/init.h>
a6b7a407 26#include <linux/interrupt.h>
01f2e4ea
SF		 27#include <linux/workqueue.h>
28#include <linux/pci.h>
29#include <linux/netdevice.h>
30#include <linux/etherdevice.h>
01789349 31#include <linux/if.h>
01f2e4ea
SF		 32#include <linux/if_ether.h>
33#include <linux/if_vlan.h>
34#include <linux/ethtool.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/ipv6.h>
38#include <linux/tcp.h>
29046f9b 39#include <linux/rtnetlink.h>
70c71606 40#include <linux/prefetch.h>
b7c6bfb7 41#include <net/ip6_checksum.h>
01f2e4ea
SF		 42
43#include "cq_enet_desc.h"
44#include "vnic_dev.h"
45#include "vnic_intr.h"
46#include "vnic_stats.h"
f8bd9091 47#include "vnic_vic.h"
01f2e4ea
SF		 48#include "enic_res.h"
49#include "enic.h"
51987461 50#include "enic_dev.h"
b3abfbd2 51#include "enic_pp.h"
01f2e4ea
SF		 52
53#define ENIC_NOTIFY_TIMER_PERIOD (2 * HZ)
ea0d7d91
SF		 54#define WQ_ENET_MAX_DESC_LEN (1 << WQ_ENET_LEN_BITS)
55#define MAX_TSO (1 << 16)
56#define ENIC_DESC_MAX_SPLITS (MAX_TSO / WQ_ENET_MAX_DESC_LEN + 1)
57
58#define PCI_DEVICE_ID_CISCO_VIC_ENET 0x0043 /* ethernet vnic */
f8bd9091 59#define PCI_DEVICE_ID_CISCO_VIC_ENET_DYN 0x0044 /* enet dynamic vnic */
3a4adef5 60#define PCI_DEVICE_ID_CISCO_VIC_ENET_VF 0x0071 /* enet SRIOV VF */
01f2e4ea
SF		 61
62/* Supported devices */
a3aa1884 63static DEFINE_PCI_DEVICE_TABLE(enic_id_table) = {
ea0d7d91 64 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET) },
f8bd9091 65 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_DYN) },
3a4adef5 66 { PCI_VDEVICE(CISCO, PCI_DEVICE_ID_CISCO_VIC_ENET_VF) },
01f2e4ea
SF		 67 { 0, } /* end of table */
68};
69
70MODULE_DESCRIPTION(DRV_DESCRIPTION);
71MODULE_AUTHOR("Scott Feldman <scofeldm@cisco.com>");
72MODULE_LICENSE("GPL");
73MODULE_VERSION(DRV_VERSION);
74MODULE_DEVICE_TABLE(pci, enic_id_table);
75
76struct enic_stat {
77 char name[ETH_GSTRING_LEN];
78 unsigned int offset;
79};
80
81#define ENIC_TX_STAT(stat) \
82 { .name = #stat, .offset = offsetof(struct vnic_tx_stats, stat) / 8 }
83#define ENIC_RX_STAT(stat) \
84 { .name = #stat, .offset = offsetof(struct vnic_rx_stats, stat) / 8 }
85
86static const struct enic_stat enic_tx_stats[] = {
87 ENIC_TX_STAT(tx_frames_ok),
88 ENIC_TX_STAT(tx_unicast_frames_ok),
89 ENIC_TX_STAT(tx_multicast_frames_ok),
90 ENIC_TX_STAT(tx_broadcast_frames_ok),
91 ENIC_TX_STAT(tx_bytes_ok),
92 ENIC_TX_STAT(tx_unicast_bytes_ok),
93 ENIC_TX_STAT(tx_multicast_bytes_ok),
94 ENIC_TX_STAT(tx_broadcast_bytes_ok),
95 ENIC_TX_STAT(tx_drops),
96 ENIC_TX_STAT(tx_errors),
97 ENIC_TX_STAT(tx_tso),
98};
99
100static const struct enic_stat enic_rx_stats[] = {
101 ENIC_RX_STAT(rx_frames_ok),
102 ENIC_RX_STAT(rx_frames_total),
103 ENIC_RX_STAT(rx_unicast_frames_ok),
104 ENIC_RX_STAT(rx_multicast_frames_ok),
105 ENIC_RX_STAT(rx_broadcast_frames_ok),
106 ENIC_RX_STAT(rx_bytes_ok),
107 ENIC_RX_STAT(rx_unicast_bytes_ok),
108 ENIC_RX_STAT(rx_multicast_bytes_ok),
109 ENIC_RX_STAT(rx_broadcast_bytes_ok),
110 ENIC_RX_STAT(rx_drop),
111 ENIC_RX_STAT(rx_no_bufs),
112 ENIC_RX_STAT(rx_errors),
113 ENIC_RX_STAT(rx_rss),
114 ENIC_RX_STAT(rx_crc_errors),
115 ENIC_RX_STAT(rx_frames_64),
116 ENIC_RX_STAT(rx_frames_127),
117 ENIC_RX_STAT(rx_frames_255),
118 ENIC_RX_STAT(rx_frames_511),
119 ENIC_RX_STAT(rx_frames_1023),
120 ENIC_RX_STAT(rx_frames_1518),
121 ENIC_RX_STAT(rx_frames_to_max),
122};
123
124static const unsigned int enic_n_tx_stats = ARRAY_SIZE(enic_tx_stats);
125static const unsigned int enic_n_rx_stats = ARRAY_SIZE(enic_rx_stats);
126
3f192795 127int enic_is_dynamic(struct enic *enic)
f8bd9091
SF		 128{
129 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_DYN;
130}
131
8749b427
RP		 132int enic_sriov_enabled(struct enic *enic)
133{
134 return (enic->priv_flags & ENIC_SRIOV_ENABLED) ? 1 : 0;
135}
136
3a4adef5
RP		 137static int enic_is_sriov_vf(struct enic *enic)
138{
139 return enic->pdev->device == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
140}
141
889d13f5
RP		 142int enic_is_valid_vf(struct enic *enic, int vf)
143{
144#ifdef CONFIG_PCI_IOV
145 return vf >= 0 && vf < enic->num_vfs;
146#else
147 return 0;
148#endif
149}
150
717258ba
VK		 151static inline unsigned int enic_cq_rq(struct enic *enic, unsigned int rq)
152{
153 return rq;
154}
155
156static inline unsigned int enic_cq_wq(struct enic *enic, unsigned int wq)
157{
158 return enic->rq_count + wq;
159}
160
161static inline unsigned int enic_legacy_io_intr(void)
162{
163 return 0;
164}
165
166static inline unsigned int enic_legacy_err_intr(void)
167{
168 return 1;
169}
170
171static inline unsigned int enic_legacy_notify_intr(void)
172{
173 return 2;
174}
175
176static inline unsigned int enic_msix_rq_intr(struct enic *enic, unsigned int rq)
177{
7d260ec2 178 return enic->cq[enic_cq_rq(enic, rq)].interrupt_offset;
717258ba
VK		 179}
180
181static inline unsigned int enic_msix_wq_intr(struct enic *enic, unsigned int wq)
182{
7d260ec2 183 return enic->cq[enic_cq_wq(enic, wq)].interrupt_offset;
717258ba
VK		 184}
185
186static inline unsigned int enic_msix_err_intr(struct enic *enic)
187{
188 return enic->rq_count + enic->wq_count;
189}
190
191static inline unsigned int enic_msix_notify_intr(struct enic *enic)
192{
193 return enic->rq_count + enic->wq_count + 1;
194}
195
01f2e4ea
SF		 196static int enic_get_settings(struct net_device *netdev,
197 struct ethtool_cmd *ecmd)
198{
199 struct enic *enic = netdev_priv(netdev);
200
201 ecmd->supported = (SUPPORTED_10000baseT_Full | SUPPORTED_FIBRE);
202 ecmd->advertising = (ADVERTISED_10000baseT_Full | ADVERTISED_FIBRE);
203 ecmd->port = PORT_FIBRE;
204 ecmd->transceiver = XCVR_EXTERNAL;
205
206 if (netif_carrier_ok(netdev)) {
70739497 207 ethtool_cmd_speed_set(ecmd, vnic_dev_port_speed(enic->vdev));
01f2e4ea
SF		 208 ecmd->duplex = DUPLEX_FULL;
209 } else {
70739497 210 ethtool_cmd_speed_set(ecmd, -1);
01f2e4ea
SF		 211 ecmd->duplex = -1;
212 }
213
214 ecmd->autoneg = AUTONEG_DISABLE;
215
216 return 0;
217}
218
219static void enic_get_drvinfo(struct net_device *netdev,
220 struct ethtool_drvinfo *drvinfo)
221{
222 struct enic *enic = netdev_priv(netdev);
223 struct vnic_devcmd_fw_info *fw_info;
224
383ab92f 225 enic_dev_fw_info(enic, &fw_info);
01f2e4ea 226
612a94d6
RJ		 227 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
228 strlcpy(drvinfo->version, DRV_VERSION, sizeof(drvinfo->version));
229 strlcpy(drvinfo->fw_version, fw_info->fw_version,
01f2e4ea 230 sizeof(drvinfo->fw_version));
612a94d6 231 strlcpy(drvinfo->bus_info, pci_name(enic->pdev),
01f2e4ea
SF		 232 sizeof(drvinfo->bus_info));
233}
234
235static void enic_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
236{
237 unsigned int i;
238
239 switch (stringset) {
240 case ETH_SS_STATS:
241 for (i = 0; i < enic_n_tx_stats; i++) {
242 memcpy(data, enic_tx_stats[i].name, ETH_GSTRING_LEN);
243 data += ETH_GSTRING_LEN;
244 }
245 for (i = 0; i < enic_n_rx_stats; i++) {
246 memcpy(data, enic_rx_stats[i].name, ETH_GSTRING_LEN);
247 data += ETH_GSTRING_LEN;
248 }
249 break;
250 }
251}
252
25f0a061 253static int enic_get_sset_count(struct net_device *netdev, int sset)
01f2e4ea 254{
25f0a061
SF		 255 switch (sset) {
256 case ETH_SS_STATS:
257 return enic_n_tx_stats + enic_n_rx_stats;
258 default:
259 return -EOPNOTSUPP;
260 }
01f2e4ea
SF		 261}
262
263static void enic_get_ethtool_stats(struct net_device *netdev,
264 struct ethtool_stats *stats, u64 *data)
265{
266 struct enic *enic = netdev_priv(netdev);
267 struct vnic_stats *vstats;
268 unsigned int i;
269
383ab92f 270 enic_dev_stats_dump(enic, &vstats);
01f2e4ea
SF		 271
272 for (i = 0; i < enic_n_tx_stats; i++)
273 *(data++) = ((u64 *)&vstats->tx)[enic_tx_stats[i].offset];
274 for (i = 0; i < enic_n_rx_stats; i++)
275 *(data++) = ((u64 *)&vstats->rx)[enic_rx_stats[i].offset];
276}
277
01f2e4ea
SF		 278static u32 enic_get_msglevel(struct net_device *netdev)
279{
280 struct enic *enic = netdev_priv(netdev);
281 return enic->msg_enable;
282}
283
284static void enic_set_msglevel(struct net_device *netdev, u32 value)
285{
286 struct enic *enic = netdev_priv(netdev);
287 enic->msg_enable = value;
288}
289
7c844599
SF		 290static int enic_get_coalesce(struct net_device *netdev,
291 struct ethtool_coalesce *ecmd)
292{
293 struct enic *enic = netdev_priv(netdev);
294
295 ecmd->tx_coalesce_usecs = enic->tx_coalesce_usecs;
296 ecmd->rx_coalesce_usecs = enic->rx_coalesce_usecs;
297
298 return 0;
299}
300
301static int enic_set_coalesce(struct net_device *netdev,
302 struct ethtool_coalesce *ecmd)
303{
304 struct enic *enic = netdev_priv(netdev);
305 u32 tx_coalesce_usecs;
306 u32 rx_coalesce_usecs;
717258ba 307 unsigned int i, intr;
7c844599 308
ea7ea65a
VK		 309 tx_coalesce_usecs = min_t(u32, ecmd->tx_coalesce_usecs,
310 vnic_dev_get_intr_coal_timer_max(enic->vdev));
311 rx_coalesce_usecs = min_t(u32, ecmd->rx_coalesce_usecs,
312 vnic_dev_get_intr_coal_timer_max(enic->vdev));
7c844599
SF		 313
314 switch (vnic_dev_get_intr_mode(enic->vdev)) {
315 case VNIC_DEV_INTR_MODE_INTX:
316 if (tx_coalesce_usecs != rx_coalesce_usecs)
317 return -EINVAL;
318
717258ba
VK		 319 intr = enic_legacy_io_intr();
320 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 321 tx_coalesce_usecs);
7c844599
SF		 322 break;
323 case VNIC_DEV_INTR_MODE_MSI:
324 if (tx_coalesce_usecs != rx_coalesce_usecs)
325 return -EINVAL;
326
327 vnic_intr_coalescing_timer_set(&enic->intr[0],
ea7ea65a 328 tx_coalesce_usecs);
7c844599
SF		 329 break;
330 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 331 for (i = 0; i < enic->wq_count; i++) {
332 intr = enic_msix_wq_intr(enic, i);
333 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 334 tx_coalesce_usecs);
717258ba
VK		 335 }
336
337 for (i = 0; i < enic->rq_count; i++) {
338 intr = enic_msix_rq_intr(enic, i);
339 vnic_intr_coalescing_timer_set(&enic->intr[intr],
ea7ea65a 340 rx_coalesce_usecs);
717258ba
VK		 341 }
342
7c844599
SF		 343 break;
344 default:
345 break;
346 }
347
348 enic->tx_coalesce_usecs = tx_coalesce_usecs;
349 enic->rx_coalesce_usecs = rx_coalesce_usecs;
350
351 return 0;
352}
353
0fc0b732 354static const struct ethtool_ops enic_ethtool_ops = {
01f2e4ea
SF		 355 .get_settings = enic_get_settings,
356 .get_drvinfo = enic_get_drvinfo,
357 .get_msglevel = enic_get_msglevel,
358 .set_msglevel = enic_set_msglevel,
359 .get_link = ethtool_op_get_link,
360 .get_strings = enic_get_strings,
25f0a061 361 .get_sset_count = enic_get_sset_count,
01f2e4ea 362 .get_ethtool_stats = enic_get_ethtool_stats,
7c844599
SF		 363 .get_coalesce = enic_get_coalesce,
364 .set_coalesce = enic_set_coalesce,
01f2e4ea
SF		 365};
366
367static void enic_free_wq_buf(struct vnic_wq *wq, struct vnic_wq_buf *buf)
368{
369 struct enic *enic = vnic_dev_priv(wq->vdev);
370
371 if (buf->sop)
372 pci_unmap_single(enic->pdev, buf->dma_addr,
373 buf->len, PCI_DMA_TODEVICE);
374 else
375 pci_unmap_page(enic->pdev, buf->dma_addr,
376 buf->len, PCI_DMA_TODEVICE);
377
378 if (buf->os_buf)
379 dev_kfree_skb_any(buf->os_buf);
380}
381
382static void enic_wq_free_buf(struct vnic_wq *wq,
383 struct cq_desc *cq_desc, struct vnic_wq_buf *buf, void *opaque)
384{
385 enic_free_wq_buf(wq, buf);
386}
387
388static int enic_wq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
389 u8 type, u16 q_number, u16 completed_index, void *opaque)
390{
391 struct enic *enic = vnic_dev_priv(vdev);
392
393 spin_lock(&enic->wq_lock[q_number]);
394
395 vnic_wq_service(&enic->wq[q_number], cq_desc,
396 completed_index, enic_wq_free_buf,
397 opaque);
398
399 if (netif_queue_stopped(enic->netdev) &&
ea0d7d91
SF		 400 vnic_wq_desc_avail(&enic->wq[q_number]) >=
401 (MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS))
01f2e4ea
SF		 402 netif_wake_queue(enic->netdev);
403
404 spin_unlock(&enic->wq_lock[q_number]);
405
406 return 0;
407}
408
409static void enic_log_q_error(struct enic *enic)
410{
411 unsigned int i;
412 u32 error_status;
413
414 for (i = 0; i < enic->wq_count; i++) {
415 error_status = vnic_wq_error_status(&enic->wq[i]);
416 if (error_status)
a7a79deb
VK		 417 netdev_err(enic->netdev, "WQ[%d] error_status %d\n",
418 i, error_status);
01f2e4ea
SF		 419 }
420
421 for (i = 0; i < enic->rq_count; i++) {
422 error_status = vnic_rq_error_status(&enic->rq[i]);
423 if (error_status)
a7a79deb
VK		 424 netdev_err(enic->netdev, "RQ[%d] error_status %d\n",
425 i, error_status);
01f2e4ea
SF		 426 }
427}
428
383ab92f 429static void enic_msglvl_check(struct enic *enic)
01f2e4ea 430{
383ab92f 431 u32 msg_enable = vnic_dev_msg_lvl(enic->vdev);
01f2e4ea 432
383ab92f 433 if (msg_enable != enic->msg_enable) {
a7a79deb
VK		 434 netdev_info(enic->netdev, "msg lvl changed from 0x%x to 0x%x\n",
435 enic->msg_enable, msg_enable);
383ab92f 436 enic->msg_enable = msg_enable;
01f2e4ea
SF		 437 }
438}
439
440static void enic_mtu_check(struct enic *enic)
441{
442 u32 mtu = vnic_dev_mtu(enic->vdev);
a7a79deb 443 struct net_device *netdev = enic->netdev;
01f2e4ea 444
491598a4 445 if (mtu && mtu != enic->port_mtu) {
7c844599 446 enic->port_mtu = mtu;
7335903c 447 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
c97c894d
RP		 448 mtu = max_t(int, ENIC_MIN_MTU,
449 min_t(int, ENIC_MAX_MTU, mtu));
450 if (mtu != netdev->mtu)
451 schedule_work(&enic->change_mtu_work);
452 } else {
453 if (mtu < netdev->mtu)
454 netdev_warn(netdev,
455 "interface MTU (%d) set higher "
456 "than switch port MTU (%d)\n",
457 netdev->mtu, mtu);
458 }
01f2e4ea
SF		 459 }
460}
461
383ab92f 462static void enic_link_check(struct enic *enic)
01f2e4ea 463{
383ab92f
VK		 464 int link_status = vnic_dev_link_status(enic->vdev);
465 int carrier_ok = netif_carrier_ok(enic->netdev);
01f2e4ea 466
383ab92f 467 if (link_status && !carrier_ok) {
a7a79deb 468 netdev_info(enic->netdev, "Link UP\n");
383ab92f
VK		 469 netif_carrier_on(enic->netdev);
470 } else if (!link_status && carrier_ok) {
a7a79deb 471 netdev_info(enic->netdev, "Link DOWN\n");
383ab92f 472 netif_carrier_off(enic->netdev);
01f2e4ea
SF		 473 }
474}
475
476static void enic_notify_check(struct enic *enic)
477{
478 enic_msglvl_check(enic);
479 enic_mtu_check(enic);
480 enic_link_check(enic);
481}
482
483#define ENIC_TEST_INTR(pba, i) (pba & (1 << i))
484
485static irqreturn_t enic_isr_legacy(int irq, void *data)
486{
487 struct net_device *netdev = data;
488 struct enic *enic = netdev_priv(netdev);
717258ba
VK		 489 unsigned int io_intr = enic_legacy_io_intr();
490 unsigned int err_intr = enic_legacy_err_intr();
491 unsigned int notify_intr = enic_legacy_notify_intr();
01f2e4ea
SF		 492 u32 pba;
493
717258ba 494 vnic_intr_mask(&enic->intr[io_intr]);
01f2e4ea
SF		 495
496 pba = vnic_intr_legacy_pba(enic->legacy_pba);
497 if (!pba) {
717258ba 498 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 499 return IRQ_NONE; /* not our interrupt */
500 }
501
717258ba
VK		 502 if (ENIC_TEST_INTR(pba, notify_intr)) {
503 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
01f2e4ea 504 enic_notify_check(enic);
ed8af6b2 505 }
01f2e4ea 506
717258ba
VK		 507 if (ENIC_TEST_INTR(pba, err_intr)) {
508 vnic_intr_return_all_credits(&enic->intr[err_intr]);
01f2e4ea
SF		 509 enic_log_q_error(enic);
510 /* schedule recovery from WQ/RQ error */
511 schedule_work(&enic->reset);
512 return IRQ_HANDLED;
513 }
514
717258ba
VK		 515 if (ENIC_TEST_INTR(pba, io_intr)) {
516 if (napi_schedule_prep(&enic->napi[0]))
517 __napi_schedule(&enic->napi[0]);
01f2e4ea 518 } else {
717258ba 519 vnic_intr_unmask(&enic->intr[io_intr]);
01f2e4ea
SF		 520 }
521
522 return IRQ_HANDLED;
523}
524
525static irqreturn_t enic_isr_msi(int irq, void *data)
526{
527 struct enic *enic = data;
528
529 /* With MSI, there is no sharing of interrupts, so this is
530 * our interrupt and there is no need to ack it. The device
531 * is not providing per-vector masking, so the OS will not
532 * write to PCI config space to mask/unmask the interrupt.
533 * We're using mask_on_assertion for MSI, so the device
534 * automatically masks the interrupt when the interrupt is
535 * generated. Later, when exiting polling, the interrupt
536 * will be unmasked (see enic_poll).
537 *
538 * Also, the device uses the same PCIe Traffic Class (TC)
539 * for Memory Write data and MSI, so there are no ordering
540 * issues; the MSI will always arrive at the Root Complex
541 * _after_ corresponding Memory Writes (i.e. descriptor
542 * writes).
543 */
544
717258ba 545 napi_schedule(&enic->napi[0]);
01f2e4ea
SF		 546
547 return IRQ_HANDLED;
548}
549
550static irqreturn_t enic_isr_msix_rq(int irq, void *data)
551{
717258ba 552 struct napi_struct *napi = data;
01f2e4ea
SF		 553
554 /* schedule NAPI polling for RQ cleanup */
717258ba 555 napi_schedule(napi);
01f2e4ea
SF		 556
557 return IRQ_HANDLED;
558}
559
560static irqreturn_t enic_isr_msix_wq(int irq, void *data)
561{
562 struct enic *enic = data;
717258ba
VK		 563 unsigned int cq = enic_cq_wq(enic, 0);
564 unsigned int intr = enic_msix_wq_intr(enic, 0);
01f2e4ea
SF		 565 unsigned int wq_work_to_do = -1; /* no limit */
566 unsigned int wq_work_done;
567
717258ba 568 wq_work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 569 wq_work_to_do, enic_wq_service, NULL);
570
717258ba 571 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 572 wq_work_done,
573 1 /* unmask intr */,
574 1 /* reset intr timer */);
575
576 return IRQ_HANDLED;
577}
578
579static irqreturn_t enic_isr_msix_err(int irq, void *data)
580{
581 struct enic *enic = data;
717258ba 582 unsigned int intr = enic_msix_err_intr(enic);
01f2e4ea 583
717258ba 584 vnic_intr_return_all_credits(&enic->intr[intr]);
ed8af6b2 585
01f2e4ea
SF		 586 enic_log_q_error(enic);
587
588 /* schedule recovery from WQ/RQ error */
589 schedule_work(&enic->reset);
590
591 return IRQ_HANDLED;
592}
593
594static irqreturn_t enic_isr_msix_notify(int irq, void *data)
595{
596 struct enic *enic = data;
717258ba 597 unsigned int intr = enic_msix_notify_intr(enic);
01f2e4ea 598
717258ba 599 vnic_intr_return_all_credits(&enic->intr[intr]);
01f2e4ea 600 enic_notify_check(enic);
01f2e4ea
SF		 601
602 return IRQ_HANDLED;
603}
604
605static inline void enic_queue_wq_skb_cont(struct enic *enic,
606 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 607 unsigned int len_left, int loopback)
01f2e4ea 608{
9e903e08 609 const skb_frag_t *frag;
01f2e4ea
SF		 610
611 /* Queue additional data fragments */
612 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08 613 len_left -= skb_frag_size(frag);
01f2e4ea 614 enic_queue_wq_desc_cont(wq, skb,
4bf5adbf 615 skb_frag_dma_map(&enic->pdev->dev,
9e903e08 616 frag, 0, skb_frag_size(frag),
5d6bcdfe 617 DMA_TO_DEVICE),
9e903e08 618 skb_frag_size(frag),
1825aca6
VK		 619 (len_left == 0), /* EOP? */
620 loopback);
01f2e4ea
SF		 621 }
622}
623
624static inline void enic_queue_wq_skb_vlan(struct enic *enic,
625 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 626 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 627{
628 unsigned int head_len = skb_headlen(skb);
629 unsigned int len_left = skb->len - head_len;
630 int eop = (len_left == 0);
631
ea0d7d91
SF		 632 /* Queue the main skb fragment. The fragments are no larger
633 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
634 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
635 * per fragment is queued.
636 */
01f2e4ea
SF		 637 enic_queue_wq_desc(wq, skb,
638 pci_map_single(enic->pdev, skb->data,
639 head_len, PCI_DMA_TODEVICE),
640 head_len,
641 vlan_tag_insert, vlan_tag,
1825aca6 642 eop, loopback);
01f2e4ea
SF		 643
644 if (!eop)
1825aca6 645 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 646}
647
648static inline void enic_queue_wq_skb_csum_l4(struct enic *enic,
649 struct vnic_wq *wq, struct sk_buff *skb,
1825aca6 650 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea
SF		 651{
652 unsigned int head_len = skb_headlen(skb);
653 unsigned int len_left = skb->len - head_len;
0d0b1672 654 unsigned int hdr_len = skb_checksum_start_offset(skb);
01f2e4ea
SF		 655 unsigned int csum_offset = hdr_len + skb->csum_offset;
656 int eop = (len_left == 0);
657
ea0d7d91
SF		 658 /* Queue the main skb fragment. The fragments are no larger
659 * than max MTU(9000)+ETH_HDR_LEN(14) bytes, which is less
660 * than WQ_ENET_MAX_DESC_LEN length. So only one descriptor
661 * per fragment is queued.
662 */
01f2e4ea
SF		 663 enic_queue_wq_desc_csum_l4(wq, skb,
664 pci_map_single(enic->pdev, skb->data,
665 head_len, PCI_DMA_TODEVICE),
666 head_len,
667 csum_offset,
668 hdr_len,
669 vlan_tag_insert, vlan_tag,
1825aca6 670 eop, loopback);
01f2e4ea
SF		 671
672 if (!eop)
1825aca6 673 enic_queue_wq_skb_cont(enic, wq, skb, len_left, loopback);
01f2e4ea
SF		 674}
675
676static inline void enic_queue_wq_skb_tso(struct enic *enic,
677 struct vnic_wq *wq, struct sk_buff *skb, unsigned int mss,
1825aca6 678 int vlan_tag_insert, unsigned int vlan_tag, int loopback)
01f2e4ea 679{
ea0d7d91
SF		 680 unsigned int frag_len_left = skb_headlen(skb);
681 unsigned int len_left = skb->len - frag_len_left;
01f2e4ea
SF		 682 unsigned int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
683 int eop = (len_left == 0);
ea0d7d91
SF		 684 unsigned int len;
685 dma_addr_t dma_addr;
686 unsigned int offset = 0;
687 skb_frag_t *frag;
01f2e4ea
SF		 688
689 /* Preload TCP csum field with IP pseudo hdr calculated
690 * with IP length set to zero. HW will later add in length
691 * to each TCP segment resulting from the TSO.
692 */
693
09640e63 694 if (skb->protocol == cpu_to_be16(ETH_P_IP)) {
01f2e4ea
SF		 695 ip_hdr(skb)->check = 0;
696 tcp_hdr(skb)->check = ~csum_tcpudp_magic(ip_hdr(skb)->saddr,
697 ip_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
09640e63 698 } else if (skb->protocol == cpu_to_be16(ETH_P_IPV6)) {
01f2e4ea
SF		 699 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
700 &ipv6_hdr(skb)->daddr, 0, IPPROTO_TCP, 0);
701 }
702
ea0d7d91
SF		 703 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
704 * for the main skb fragment
705 */
706 while (frag_len_left) {
707 len = min(frag_len_left, (unsigned int)WQ_ENET_MAX_DESC_LEN);
708 dma_addr = pci_map_single(enic->pdev, skb->data + offset,
709 len, PCI_DMA_TODEVICE);
710 enic_queue_wq_desc_tso(wq, skb,
711 dma_addr,
712 len,
713 mss, hdr_len,
714 vlan_tag_insert, vlan_tag,
1825aca6 715 eop && (len == frag_len_left), loopback);
ea0d7d91
SF		 716 frag_len_left -= len;
717 offset += len;
718 }
01f2e4ea 719
ea0d7d91
SF		 720 if (eop)
721 return;
722
723 /* Queue WQ_ENET_MAX_DESC_LEN length descriptors
724 * for additional data fragments
725 */
726 for (frag = skb_shinfo(skb)->frags; len_left; frag++) {
9e903e08
ED		 727 len_left -= skb_frag_size(frag);
728 frag_len_left = skb_frag_size(frag);
4bf5adbf 729 offset = 0;
ea0d7d91
SF		 730
731 while (frag_len_left) {
732 len = min(frag_len_left,
733 (unsigned int)WQ_ENET_MAX_DESC_LEN);
4bf5adbf
IC		 734 dma_addr = skb_frag_dma_map(&enic->pdev->dev, frag,
735 offset, len,
5d6bcdfe 736 DMA_TO_DEVICE);
ea0d7d91
SF		 737 enic_queue_wq_desc_cont(wq, skb,
738 dma_addr,
739 len,
740 (len_left == 0) &&
1825aca6
VK		 741 (len == frag_len_left), /* EOP? */
742 loopback);
ea0d7d91
SF		 743 frag_len_left -= len;
744 offset += len;
745 }
746 }
01f2e4ea
SF		 747}
748
749static inline void enic_queue_wq_skb(struct enic *enic,
750 struct vnic_wq *wq, struct sk_buff *skb)
751{
752 unsigned int mss = skb_shinfo(skb)->gso_size;
753 unsigned int vlan_tag = 0;
754 int vlan_tag_insert = 0;
1825aca6 755 int loopback = 0;
01f2e4ea 756
eab6d18d 757 if (vlan_tx_tag_present(skb)) {
01f2e4ea
SF		 758 /* VLAN tag from trunking driver */
759 vlan_tag_insert = 1;
760 vlan_tag = vlan_tx_tag_get(skb);
1825aca6
VK		 761 } else if (enic->loop_enable) {
762 vlan_tag = enic->loop_tag;
763 loopback = 1;
01f2e4ea
SF		 764 }
765
766 if (mss)
767 enic_queue_wq_skb_tso(enic, wq, skb, mss,
1825aca6 768 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 769 else if (skb->ip_summed == CHECKSUM_PARTIAL)
770 enic_queue_wq_skb_csum_l4(enic, wq, skb,
1825aca6 771 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 772 else
773 enic_queue_wq_skb_vlan(enic, wq, skb,
1825aca6 774 vlan_tag_insert, vlan_tag, loopback);
01f2e4ea
SF		 775}
776
ed8af6b2 777/* netif_tx_lock held, process context with BHs disabled, or BH */
61357325 778static netdev_tx_t enic_hard_start_xmit(struct sk_buff *skb,
d87fd25d 779 struct net_device *netdev)
01f2e4ea
SF		 780{
781 struct enic *enic = netdev_priv(netdev);
782 struct vnic_wq *wq = &enic->wq[0];
783 unsigned long flags;
784
785 if (skb->len <= 0) {
786 dev_kfree_skb(skb);
787 return NETDEV_TX_OK;
788 }
789
790 /* Non-TSO sends must fit within ENIC_NON_TSO_MAX_DESC descs,
791 * which is very likely. In the off chance it's going to take
792 * more than * ENIC_NON_TSO_MAX_DESC, linearize the skb.
793 */
794
795 if (skb_shinfo(skb)->gso_size == 0 &&
796 skb_shinfo(skb)->nr_frags + 1 > ENIC_NON_TSO_MAX_DESC &&
797 skb_linearize(skb)) {
798 dev_kfree_skb(skb);
799 return NETDEV_TX_OK;
800 }
801
802 spin_lock_irqsave(&enic->wq_lock[0], flags);
803
ea0d7d91
SF		 804 if (vnic_wq_desc_avail(wq) <
805 skb_shinfo(skb)->nr_frags + ENIC_DESC_MAX_SPLITS) {
01f2e4ea
SF		 806 netif_stop_queue(netdev);
807 /* This is a hard error, log it */
a7a79deb 808 netdev_err(netdev, "BUG! Tx ring full when queue awake!\n");
01f2e4ea
SF		 809 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
810 return NETDEV_TX_BUSY;
811 }
812
813 enic_queue_wq_skb(enic, wq, skb);
814
ea0d7d91 815 if (vnic_wq_desc_avail(wq) < MAX_SKB_FRAGS + ENIC_DESC_MAX_SPLITS)
01f2e4ea
SF		 816 netif_stop_queue(netdev);
817
01f2e4ea
SF		 818 spin_unlock_irqrestore(&enic->wq_lock[0], flags);
819
820 return NETDEV_TX_OK;
821}
822
823/* dev_base_lock rwlock held, nominally process context */
f20530bc 824static struct rtnl_link_stats64 *enic_get_stats(struct net_device *netdev,
825 struct rtnl_link_stats64 *net_stats)
01f2e4ea
SF		 826{
827 struct enic *enic = netdev_priv(netdev);
828 struct vnic_stats *stats;
829
383ab92f 830 enic_dev_stats_dump(enic, &stats);
01f2e4ea 831
25f0a061
SF		 832 net_stats->tx_packets = stats->tx.tx_frames_ok;
833 net_stats->tx_bytes = stats->tx.tx_bytes_ok;
834 net_stats->tx_errors = stats->tx.tx_errors;
835 net_stats->tx_dropped = stats->tx.tx_drops;
01f2e4ea 836
25f0a061
SF		 837 net_stats->rx_packets = stats->rx.rx_frames_ok;
838 net_stats->rx_bytes = stats->rx.rx_bytes_ok;
839 net_stats->rx_errors = stats->rx.rx_errors;
840 net_stats->multicast = stats->rx.rx_multicast_frames_ok;
350991e1 841 net_stats->rx_over_errors = enic->rq_truncated_pkts;
bd9fb1a4 842 net_stats->rx_crc_errors = enic->rq_bad_fcs;
350991e1 843 net_stats->rx_dropped = stats->rx.rx_no_bufs + stats->rx.rx_drop;
01f2e4ea 844
25f0a061 845 return net_stats;
01f2e4ea
SF		 846}
847
b3abfbd2 848void enic_reset_addr_lists(struct enic *enic)
01f2e4ea
SF		 849{
850 enic->mc_count = 0;
e0afe53f 851 enic->uc_count = 0;
99ef5639 852 enic->flags = 0;
01f2e4ea
SF		 853}
854
855static int enic_set_mac_addr(struct net_device *netdev, char *addr)
856{
f8bd9091
SF		 857 struct enic *enic = netdev_priv(netdev);
858
7335903c 859 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic)) {
f8bd9091
SF		 860 if (!is_valid_ether_addr(addr) && !is_zero_ether_addr(addr))
861 return -EADDRNOTAVAIL;
862 } else {
863 if (!is_valid_ether_addr(addr))
864 return -EADDRNOTAVAIL;
865 }
01f2e4ea
SF		 866
867 memcpy(netdev->dev_addr, addr, netdev->addr_len);
da194316 868 netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
01f2e4ea
SF		 869
870 return 0;
871}
872
f8bd9091
SF		 873static int enic_set_mac_address_dynamic(struct net_device *netdev, void *p)
874{
875 struct enic *enic = netdev_priv(netdev);
876 struct sockaddr *saddr = p;
877 char *addr = saddr->sa_data;
878 int err;
879
880 if (netif_running(enic->netdev)) {
881 err = enic_dev_del_station_addr(enic);
882 if (err)
883 return err;
884 }
885
886 err = enic_set_mac_addr(netdev, addr);
887 if (err)
888 return err;
889
890 if (netif_running(enic->netdev)) {
891 err = enic_dev_add_station_addr(enic);
892 if (err)
893 return err;
894 }
895
896 return err;
897}
898
899static int enic_set_mac_address(struct net_device *netdev, void *p)
900{
294dab25 901 struct sockaddr *saddr = p;
c76fd32d
VK		 902 char *addr = saddr->sa_data;
903 struct enic *enic = netdev_priv(netdev);
904 int err;
905
906 err = enic_dev_del_station_addr(enic);
907 if (err)
908 return err;
909
910 err = enic_set_mac_addr(netdev, addr);
911 if (err)
912 return err;
294dab25 913
c76fd32d 914 return enic_dev_add_station_addr(enic);
f8bd9091
SF		 915}
916
e0afe53f 917static void enic_update_multicast_addr_list(struct enic *enic)
01f2e4ea 918{
319d7e84 919 struct net_device *netdev = enic->netdev;
22bedad3 920 struct netdev_hw_addr *ha;
4cd24eaf 921 unsigned int mc_count = netdev_mc_count(netdev);
01f2e4ea 922 u8 mc_addr[ENIC_MULTICAST_PERFECT_FILTERS][ETH_ALEN];
01f2e4ea
SF		 923 unsigned int i, j;
924
319d7e84
RP		 925 if (mc_count > ENIC_MULTICAST_PERFECT_FILTERS) {
926 netdev_warn(netdev, "Registering only %d out of %d "
927 "multicast addresses\n",
928 ENIC_MULTICAST_PERFECT_FILTERS, mc_count);
01f2e4ea 929 mc_count = ENIC_MULTICAST_PERFECT_FILTERS;
9959a185 930 }
01f2e4ea
SF		 931
932 /* Is there an easier way? Trying to minimize to
933 * calls to add/del multicast addrs. We keep the
934 * addrs from the last call in enic->mc_addr and
935 * look for changes to add/del.
936 */
937
48e2f183 938 i = 0;
22bedad3 939 netdev_for_each_mc_addr(ha, netdev) {
48e2f183
JP		 940 if (i == mc_count)
941 break;
22bedad3 942 memcpy(mc_addr[i++], ha->addr, ETH_ALEN);
01f2e4ea
SF		 943 }
944
945 for (i = 0; i < enic->mc_count; i++) {
946 for (j = 0; j < mc_count; j++)
947 if (compare_ether_addr(enic->mc_addr[i],
948 mc_addr[j]) == 0)
949 break;
950 if (j == mc_count)
319d7e84 951 enic_dev_del_addr(enic, enic->mc_addr[i]);
01f2e4ea
SF		 952 }
953
954 for (i = 0; i < mc_count; i++) {
955 for (j = 0; j < enic->mc_count; j++)
956 if (compare_ether_addr(mc_addr[i],
957 enic->mc_addr[j]) == 0)
958 break;
959 if (j == enic->mc_count)
319d7e84 960 enic_dev_add_addr(enic, mc_addr[i]);
01f2e4ea
SF		 961 }
962
963 /* Save the list to compare against next time
964 */
965
966 for (i = 0; i < mc_count; i++)
967 memcpy(enic->mc_addr[i], mc_addr[i], ETH_ALEN);
968
969 enic->mc_count = mc_count;
01f2e4ea
SF		 970}
971
e0afe53f 972static void enic_update_unicast_addr_list(struct enic *enic)
319d7e84
RP		 973{
974 struct net_device *netdev = enic->netdev;
975 struct netdev_hw_addr *ha;
976 unsigned int uc_count = netdev_uc_count(netdev);
977 u8 uc_addr[ENIC_UNICAST_PERFECT_FILTERS][ETH_ALEN];
978 unsigned int i, j;
979
980 if (uc_count > ENIC_UNICAST_PERFECT_FILTERS) {
981 netdev_warn(netdev, "Registering only %d out of %d "
982 "unicast addresses\n",
983 ENIC_UNICAST_PERFECT_FILTERS, uc_count);
984 uc_count = ENIC_UNICAST_PERFECT_FILTERS;
985 }
986
987 /* Is there an easier way? Trying to minimize to
988 * calls to add/del unicast addrs. We keep the
989 * addrs from the last call in enic->uc_addr and
990 * look for changes to add/del.
991 */
992
993 i = 0;
994 netdev_for_each_uc_addr(ha, netdev) {
995 if (i == uc_count)
996 break;
997 memcpy(uc_addr[i++], ha->addr, ETH_ALEN);
998 }
999
1000 for (i = 0; i < enic->uc_count; i++) {
1001 for (j = 0; j < uc_count; j++)
1002 if (compare_ether_addr(enic->uc_addr[i],
1003 uc_addr[j]) == 0)
1004 break;
1005 if (j == uc_count)
1006 enic_dev_del_addr(enic, enic->uc_addr[i]);
1007 }
1008
1009 for (i = 0; i < uc_count; i++) {
1010 for (j = 0; j < enic->uc_count; j++)
1011 if (compare_ether_addr(uc_addr[i],
1012 enic->uc_addr[j]) == 0)
1013 break;
1014 if (j == enic->uc_count)
1015 enic_dev_add_addr(enic, uc_addr[i]);
1016 }
1017
1018 /* Save the list to compare against next time
1019 */
1020
1021 for (i = 0; i < uc_count; i++)
1022 memcpy(enic->uc_addr[i], uc_addr[i], ETH_ALEN);
1023
1024 enic->uc_count = uc_count;
1025}
1026
1027/* netif_tx_lock held, BHs disabled */
1028static void enic_set_rx_mode(struct net_device *netdev)
1029{
1030 struct enic *enic = netdev_priv(netdev);
1031 int directed = 1;
1032 int multicast = (netdev->flags & IFF_MULTICAST) ? 1 : 0;
1033 int broadcast = (netdev->flags & IFF_BROADCAST) ? 1 : 0;
1034 int promisc = (netdev->flags & IFF_PROMISC) ||
1035 netdev_uc_count(netdev) > ENIC_UNICAST_PERFECT_FILTERS;
1036 int allmulti = (netdev->flags & IFF_ALLMULTI) ||
1037 netdev_mc_count(netdev) > ENIC_MULTICAST_PERFECT_FILTERS;
1038 unsigned int flags = netdev->flags |
1039 (allmulti ? IFF_ALLMULTI : 0) |
1040 (promisc ? IFF_PROMISC : 0);
1041
1042 if (enic->flags != flags) {
1043 enic->flags = flags;
1044 enic_dev_packet_filter(enic, directed,
1045 multicast, broadcast, promisc, allmulti);
1046 }
1047
1048 if (!promisc) {
e0afe53f 1049 enic_update_unicast_addr_list(enic);
319d7e84 1050 if (!allmulti)
e0afe53f 1051 enic_update_multicast_addr_list(enic);
319d7e84
RP		 1052 }
1053}
1054
01f2e4ea
SF		 1055/* netif_tx_lock held, BHs disabled */
1056static void enic_tx_timeout(struct net_device *netdev)
1057{
1058 struct enic *enic = netdev_priv(netdev);
1059 schedule_work(&enic->reset);
1060}
1061
0b1c00fc
RP		 1062static int enic_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
1063{
1064 struct enic *enic = netdev_priv(netdev);
3f192795
RP		 1065 struct enic_port_profile *pp;
1066 int err;
0b1c00fc 1067
3f192795
RP		 1068 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1069 if (err)
1070 return err;
0b1c00fc 1071
0b1c00fc 1072 if (is_valid_ether_addr(mac)) {
3f192795 1073 memcpy(pp->vf_mac, mac, ETH_ALEN);
0b1c00fc
RP		 1074 return 0;
1075 } else
1076 return -EINVAL;
1077}
1078
f8bd9091
SF		 1079static int enic_set_vf_port(struct net_device *netdev, int vf,
1080 struct nlattr *port[])
1081{
1082 struct enic *enic = netdev_priv(netdev);
b3abfbd2 1083 struct enic_port_profile prev_pp;
3f192795 1084 struct enic_port_profile *pp;
b3abfbd2 1085 int err = 0, restore_pp = 1;
08f382eb 1086
3f192795
RP		 1087 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1088 if (err)
1089 return err;
08f382eb 1090
b3abfbd2
RP		 1091 if (!port[IFLA_PORT_REQUEST])
1092 return -EOPNOTSUPP;
1093
3f192795
RP		 1094 memcpy(&prev_pp, pp, sizeof(*enic->pp));
1095 memset(pp, 0, sizeof(*enic->pp));
b3abfbd2 1096
3f192795
RP		 1097 pp->set |= ENIC_SET_REQUEST;
1098 pp->request = nla_get_u8(port[IFLA_PORT_REQUEST]);
08f382eb
SF		 1099
1100 if (port[IFLA_PORT_PROFILE]) {
3f192795
RP		 1101 pp->set |= ENIC_SET_NAME;
1102 memcpy(pp->name, nla_data(port[IFLA_PORT_PROFILE]),
08f382eb
SF		 1103 PORT_PROFILE_MAX);
1104 }
1105
1106 if (port[IFLA_PORT_INSTANCE_UUID]) {
3f192795
RP		 1107 pp->set |= ENIC_SET_INSTANCE;
1108 memcpy(pp->instance_uuid,
08f382eb
SF		 1109 nla_data(port[IFLA_PORT_INSTANCE_UUID]), PORT_UUID_MAX);
1110 }
1111
1112 if (port[IFLA_PORT_HOST_UUID]) {
3f192795
RP		 1113 pp->set |= ENIC_SET_HOST;
1114 memcpy(pp->host_uuid,
08f382eb
SF		 1115 nla_data(port[IFLA_PORT_HOST_UUID]), PORT_UUID_MAX);
1116 }
f8bd9091 1117
b3abfbd2
RP		 1118 /* Special case handling: mac came from IFLA_VF_MAC */
1119 if (!is_zero_ether_addr(prev_pp.vf_mac))
3f192795 1120 memcpy(pp->mac_addr, prev_pp.vf_mac, ETH_ALEN);
418c437d 1121
3f192795 1122 if (vf == PORT_SELF_VF && is_zero_ether_addr(netdev->dev_addr))
da194316 1123 eth_hw_addr_random(netdev);
f8bd9091 1124
3f192795 1125 err = enic_process_set_pp_request(enic, vf, &prev_pp, &restore_pp);
b3abfbd2
RP		 1126 if (err) {
1127 if (restore_pp) {
1128 /* Things are still the way they were: Implicit
1129 * DISASSOCIATE failed
1130 */
3f192795 1131 memcpy(pp, &prev_pp, sizeof(*pp));
b3abfbd2 1132 } else {
3f192795
RP		 1133 memset(pp, 0, sizeof(*pp));
1134 if (vf == PORT_SELF_VF)
1135 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1136 }
1137 } else {
1138 /* Set flag to indicate that the port assoc/disassoc
1139 * request has been sent out to fw
1140 */
3f192795 1141 pp->set |= ENIC_PORT_REQUEST_APPLIED;
b3abfbd2
RP		 1142
1143 /* If DISASSOCIATE, clean up all assigned/saved macaddresses */
3f192795
RP		 1144 if (pp->request == PORT_REQUEST_DISASSOCIATE) {
1145 memset(pp->mac_addr, 0, ETH_ALEN);
1146 if (vf == PORT_SELF_VF)
1147 memset(netdev->dev_addr, 0, ETH_ALEN);
b3abfbd2
RP		 1148 }
1149 }
29639059 1150
3f192795 1151 memset(pp->vf_mac, 0, ETH_ALEN);
29639059 1152
29639059 1153 return err;
f8bd9091
SF		 1154}
1155
1156static int enic_get_vf_port(struct net_device *netdev, int vf,
1157 struct sk_buff *skb)
1158{
1159 struct enic *enic = netdev_priv(netdev);
f8bd9091 1160 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
3f192795 1161 struct enic_port_profile *pp;
b3abfbd2 1162 int err;
f8bd9091 1163
3f192795
RP		 1164 ENIC_PP_BY_INDEX(enic, vf, pp, &err);
1165 if (err)
1166 return err;
1167
1168 if (!(pp->set & ENIC_PORT_REQUEST_APPLIED))
08f382eb 1169 return -ENODATA;
f8bd9091 1170
3f192795 1171 err = enic_process_get_pp_request(enic, vf, pp->request, &response);
f8bd9091 1172 if (err)
b3abfbd2 1173 return err;
f8bd9091 1174
3f192795 1175 NLA_PUT_U16(skb, IFLA_PORT_REQUEST, pp->request);
f8bd9091 1176 NLA_PUT_U16(skb, IFLA_PORT_RESPONSE, response);
3f192795 1177 if (pp->set & ENIC_SET_NAME)
08f382eb 1178 NLA_PUT(skb, IFLA_PORT_PROFILE, PORT_PROFILE_MAX,
3f192795
RP		 1179 pp->name);
1180 if (pp->set & ENIC_SET_INSTANCE)
08f382eb 1181 NLA_PUT(skb, IFLA_PORT_INSTANCE_UUID, PORT_UUID_MAX,
3f192795
RP		 1182 pp->instance_uuid);
1183 if (pp->set & ENIC_SET_HOST)
08f382eb 1184 NLA_PUT(skb, IFLA_PORT_HOST_UUID, PORT_UUID_MAX,
3f192795 1185 pp->host_uuid);
f8bd9091
SF		 1186
1187 return 0;
1188
1189nla_put_failure:
1190 return -EMSGSIZE;
1191}
1192
01f2e4ea
SF		 1193static void enic_free_rq_buf(struct vnic_rq *rq, struct vnic_rq_buf *buf)
1194{
1195 struct enic *enic = vnic_dev_priv(rq->vdev);
1196
1197 if (!buf->os_buf)
1198 return;
1199
1200 pci_unmap_single(enic->pdev, buf->dma_addr,
1201 buf->len, PCI_DMA_FROMDEVICE);
1202 dev_kfree_skb_any(buf->os_buf);
1203}
1204
01f2e4ea
SF		 1205static int enic_rq_alloc_buf(struct vnic_rq *rq)
1206{
1207 struct enic *enic = vnic_dev_priv(rq->vdev);
d19e22dc 1208 struct net_device *netdev = enic->netdev;
01f2e4ea 1209 struct sk_buff *skb;
1825aca6 1210 unsigned int len = netdev->mtu + VLAN_ETH_HLEN;
01f2e4ea
SF		 1211 unsigned int os_buf_index = 0;
1212 dma_addr_t dma_addr;
1213
89d71a66 1214 skb = netdev_alloc_skb_ip_align(netdev, len);
01f2e4ea
SF		 1215 if (!skb)
1216 return -ENOMEM;
1217
1218 dma_addr = pci_map_single(enic->pdev, skb->data,
1219 len, PCI_DMA_FROMDEVICE);
1220
1221 enic_queue_rq_desc(rq, skb, os_buf_index,
1222 dma_addr, len);
1223
1224 return 0;
1225}
1226
01f2e4ea
SF		 1227static void enic_rq_indicate_buf(struct vnic_rq *rq,
1228 struct cq_desc *cq_desc, struct vnic_rq_buf *buf,
1229 int skipped, void *opaque)
1230{
1231 struct enic *enic = vnic_dev_priv(rq->vdev);
86ca9db7 1232 struct net_device *netdev = enic->netdev;
01f2e4ea
SF		 1233 struct sk_buff *skb;
1234
1235 u8 type, color, eop, sop, ingress_port, vlan_stripped;
1236 u8 fcoe, fcoe_sof, fcoe_fc_crc_ok, fcoe_enc_error, fcoe_eof;
1237 u8 tcp_udp_csum_ok, udp, tcp, ipv4_csum_ok;
1238 u8 ipv6, ipv4, ipv4_fragment, fcs_ok, rss_type, csum_not_calc;
1239 u8 packet_error;
f8cac14a 1240 u16 q_number, completed_index, bytes_written, vlan_tci, checksum;
01f2e4ea
SF		 1241 u32 rss_hash;
1242
1243 if (skipped)
1244 return;
1245
1246 skb = buf->os_buf;
1247 prefetch(skb->data - NET_IP_ALIGN);
1248 pci_unmap_single(enic->pdev, buf->dma_addr,
1249 buf->len, PCI_DMA_FROMDEVICE);
1250
1251 cq_enet_rq_desc_dec((struct cq_enet_rq_desc *)cq_desc,
1252 &type, &color, &q_number, &completed_index,
1253 &ingress_port, &fcoe, &eop, &sop, &rss_type,
1254 &csum_not_calc, &rss_hash, &bytes_written,
f8cac14a 1255 &packet_error, &vlan_stripped, &vlan_tci, &checksum,
01f2e4ea
SF		 1256 &fcoe_sof, &fcoe_fc_crc_ok, &fcoe_enc_error,
1257 &fcoe_eof, &tcp_udp_csum_ok, &udp, &tcp,
1258 &ipv4_csum_ok, &ipv6, &ipv4, &ipv4_fragment,
1259 &fcs_ok);
1260
1261 if (packet_error) {
1262
350991e1
SF		 1263 if (!fcs_ok) {
1264 if (bytes_written > 0)
1265 enic->rq_bad_fcs++;
1266 else if (bytes_written == 0)
1267 enic->rq_truncated_pkts++;
1268 }
01f2e4ea
SF		 1269
1270 dev_kfree_skb_any(skb);
1271
1272 return;
1273 }
1274
1275 if (eop && bytes_written > 0) {
1276
1277 /* Good receive
1278 */
1279
1280 skb_put(skb, bytes_written);
86ca9db7 1281 skb->protocol = eth_type_trans(skb, netdev);
01f2e4ea 1282
5ec8f9b8 1283 if ((netdev->features & NETIF_F_RXCSUM) && !csum_not_calc) {
01f2e4ea
SF		 1284 skb->csum = htons(checksum);
1285 skb->ip_summed = CHECKSUM_COMPLETE;
1286 }
1287
86ca9db7 1288 skb->dev = netdev;
01f2e4ea 1289
6ede746b
JP		 1290 if (vlan_stripped)
1291 __vlan_hwaccel_put_tag(skb, vlan_tci);
01f2e4ea 1292
6ede746b
JP		 1293 if (netdev->features & NETIF_F_GRO)
1294 napi_gro_receive(&enic->napi[q_number], skb);
1295 else
1296 netif_receive_skb(skb);
01f2e4ea
SF		 1297 } else {
1298
1299 /* Buffer overflow
1300 */
1301
1302 dev_kfree_skb_any(skb);
1303 }
1304}
1305
1306static int enic_rq_service(struct vnic_dev *vdev, struct cq_desc *cq_desc,
1307 u8 type, u16 q_number, u16 completed_index, void *opaque)
1308{
1309 struct enic *enic = vnic_dev_priv(vdev);
1310
1311 vnic_rq_service(&enic->rq[q_number], cq_desc,
1312 completed_index, VNIC_RQ_RETURN_DESC,
1313 enic_rq_indicate_buf, opaque);
1314
1315 return 0;
1316}
1317
01f2e4ea
SF		 1318static int enic_poll(struct napi_struct *napi, int budget)
1319{
717258ba
VK		 1320 struct net_device *netdev = napi->dev;
1321 struct enic *enic = netdev_priv(netdev);
1322 unsigned int cq_rq = enic_cq_rq(enic, 0);
1323 unsigned int cq_wq = enic_cq_wq(enic, 0);
1324 unsigned int intr = enic_legacy_io_intr();
01f2e4ea
SF		 1325 unsigned int rq_work_to_do = budget;
1326 unsigned int wq_work_to_do = -1; /* no limit */
1327 unsigned int work_done, rq_work_done, wq_work_done;
2d6ddced 1328 int err;
01f2e4ea
SF		 1329
1330 /* Service RQ (first) and WQ
1331 */
1332
717258ba 1333 rq_work_done = vnic_cq_service(&enic->cq[cq_rq],
01f2e4ea
SF		 1334 rq_work_to_do, enic_rq_service, NULL);
1335
717258ba 1336 wq_work_done = vnic_cq_service(&enic->cq[cq_wq],
01f2e4ea
SF		 1337 wq_work_to_do, enic_wq_service, NULL);
1338
1339 /* Accumulate intr event credits for this polling
1340 * cycle. An intr event is the completion of a
1341 * a WQ or RQ packet.
1342 */
1343
1344 work_done = rq_work_done + wq_work_done;
1345
1346 if (work_done > 0)
717258ba 1347 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1348 work_done,
1349 0 /* don't unmask intr */,
1350 0 /* don't reset intr timer */);
1351
0eb26022 1352 err = vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
01f2e4ea 1353
2d6ddced
SF		 1354 /* Buffer allocation failed. Stay in polling
1355 * mode so we can try to fill the ring again.
1356 */
01f2e4ea 1357
2d6ddced
SF		 1358 if (err)
1359 rq_work_done = rq_work_to_do;
01f2e4ea 1360
2d6ddced 1361 if (rq_work_done < rq_work_to_do) {
01f2e4ea 1362
2d6ddced 1363 /* Some work done, but not enough to stay in polling,
88132f55 1364 * exit polling
01f2e4ea
SF		 1365 */
1366
288379f0 1367 napi_complete(napi);
717258ba 1368 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1369 }
1370
1371 return rq_work_done;
1372}
1373
1374static int enic_poll_msix(struct napi_struct *napi, int budget)
1375{
717258ba
VK		 1376 struct net_device *netdev = napi->dev;
1377 struct enic *enic = netdev_priv(netdev);
1378 unsigned int rq = (napi - &enic->napi[0]);
1379 unsigned int cq = enic_cq_rq(enic, rq);
1380 unsigned int intr = enic_msix_rq_intr(enic, rq);
01f2e4ea
SF		 1381 unsigned int work_to_do = budget;
1382 unsigned int work_done;
2d6ddced 1383 int err;
01f2e4ea
SF		 1384
1385 /* Service RQ
1386 */
1387
717258ba 1388 work_done = vnic_cq_service(&enic->cq[cq],
01f2e4ea
SF		 1389 work_to_do, enic_rq_service, NULL);
1390
2d6ddced
SF		 1391 /* Return intr event credits for this polling
1392 * cycle. An intr event is the completion of a
1393 * RQ packet.
1394 */
01f2e4ea 1395
2d6ddced 1396 if (work_done > 0)
717258ba 1397 vnic_intr_return_credits(&enic->intr[intr],
01f2e4ea
SF		 1398 work_done,
1399 0 /* don't unmask intr */,
1400 0 /* don't reset intr timer */);
01f2e4ea 1401
0eb26022 1402 err = vnic_rq_fill(&enic->rq[rq], enic_rq_alloc_buf);
2d6ddced
SF		 1403
1404 /* Buffer allocation failed. Stay in polling mode
1405 * so we can try to fill the ring again.
1406 */
1407
1408 if (err)
1409 work_done = work_to_do;
1410
1411 if (work_done < work_to_do) {
1412
1413 /* Some work done, but not enough to stay in polling,
88132f55 1414 * exit polling
01f2e4ea
SF		 1415 */
1416
288379f0 1417 napi_complete(napi);
717258ba 1418 vnic_intr_unmask(&enic->intr[intr]);
01f2e4ea
SF		 1419 }
1420
1421 return work_done;
1422}
1423
1424static void enic_notify_timer(unsigned long data)
1425{
1426 struct enic *enic = (struct enic *)data;
1427
1428 enic_notify_check(enic);
1429
25f0a061
SF		 1430 mod_timer(&enic->notify_timer,
1431 round_jiffies(jiffies + ENIC_NOTIFY_TIMER_PERIOD));
01f2e4ea
SF		 1432}
1433
1434static void enic_free_intr(struct enic *enic)
1435{
1436 struct net_device *netdev = enic->netdev;
1437 unsigned int i;
1438
1439 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1440 case VNIC_DEV_INTR_MODE_INTX:
01f2e4ea
SF		 1441 free_irq(enic->pdev->irq, netdev);
1442 break;
8f4d248c
SF		 1443 case VNIC_DEV_INTR_MODE_MSI:
1444 free_irq(enic->pdev->irq, enic);
1445 break;
01f2e4ea
SF		 1446 case VNIC_DEV_INTR_MODE_MSIX:
1447 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1448 if (enic->msix[i].requested)
1449 free_irq(enic->msix_entry[i].vector,
1450 enic->msix[i].devid);
1451 break;
1452 default:
1453 break;
1454 }
1455}
1456
1457static int enic_request_intr(struct enic *enic)
1458{
1459 struct net_device *netdev = enic->netdev;
717258ba 1460 unsigned int i, intr;
01f2e4ea
SF		 1461 int err = 0;
1462
1463 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1464
1465 case VNIC_DEV_INTR_MODE_INTX:
1466
1467 err = request_irq(enic->pdev->irq, enic_isr_legacy,
1468 IRQF_SHARED, netdev->name, netdev);
1469 break;
1470
1471 case VNIC_DEV_INTR_MODE_MSI:
1472
1473 err = request_irq(enic->pdev->irq, enic_isr_msi,
1474 0, netdev->name, enic);
1475 break;
1476
1477 case VNIC_DEV_INTR_MODE_MSIX:
1478
717258ba
VK		 1479 for (i = 0; i < enic->rq_count; i++) {
1480 intr = enic_msix_rq_intr(enic, i);
1481 sprintf(enic->msix[intr].devname,
1482 "%.11s-rx-%d", netdev->name, i);
1483 enic->msix[intr].isr = enic_isr_msix_rq;
1484 enic->msix[intr].devid = &enic->napi[i];
1485 }
01f2e4ea 1486
717258ba
VK		 1487 for (i = 0; i < enic->wq_count; i++) {
1488 intr = enic_msix_wq_intr(enic, i);
1489 sprintf(enic->msix[intr].devname,
1490 "%.11s-tx-%d", netdev->name, i);
1491 enic->msix[intr].isr = enic_isr_msix_wq;
1492 enic->msix[intr].devid = enic;
1493 }
01f2e4ea 1494
717258ba
VK		 1495 intr = enic_msix_err_intr(enic);
1496 sprintf(enic->msix[intr].devname,
01f2e4ea 1497 "%.11s-err", netdev->name);
717258ba
VK		 1498 enic->msix[intr].isr = enic_isr_msix_err;
1499 enic->msix[intr].devid = enic;
01f2e4ea 1500
717258ba
VK		 1501 intr = enic_msix_notify_intr(enic);
1502 sprintf(enic->msix[intr].devname,
01f2e4ea 1503 "%.11s-notify", netdev->name);
717258ba
VK		 1504 enic->msix[intr].isr = enic_isr_msix_notify;
1505 enic->msix[intr].devid = enic;
1506
1507 for (i = 0; i < ARRAY_SIZE(enic->msix); i++)
1508 enic->msix[i].requested = 0;
01f2e4ea 1509
717258ba 1510 for (i = 0; i < enic->intr_count; i++) {
01f2e4ea
SF		 1511 err = request_irq(enic->msix_entry[i].vector,
1512 enic->msix[i].isr, 0,
1513 enic->msix[i].devname,
1514 enic->msix[i].devid);
1515 if (err) {
1516 enic_free_intr(enic);
1517 break;
1518 }
1519 enic->msix[i].requested = 1;
1520 }
1521
1522 break;
1523
1524 default:
1525 break;
1526 }
1527
1528 return err;
1529}
1530
b3d18d19
SF		 1531static void enic_synchronize_irqs(struct enic *enic)
1532{
1533 unsigned int i;
1534
1535 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1536 case VNIC_DEV_INTR_MODE_INTX:
1537 case VNIC_DEV_INTR_MODE_MSI:
1538 synchronize_irq(enic->pdev->irq);
1539 break;
1540 case VNIC_DEV_INTR_MODE_MSIX:
1541 for (i = 0; i < enic->intr_count; i++)
1542 synchronize_irq(enic->msix_entry[i].vector);
1543 break;
1544 default:
1545 break;
1546 }
1547}
1548
383ab92f 1549static int enic_dev_notify_set(struct enic *enic)
01f2e4ea
SF		 1550{
1551 int err;
1552
56ac88b3 1553 spin_lock(&enic->devcmd_lock);
01f2e4ea
SF		 1554 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1555 case VNIC_DEV_INTR_MODE_INTX:
717258ba
VK		 1556 err = vnic_dev_notify_set(enic->vdev,
1557 enic_legacy_notify_intr());
01f2e4ea
SF		 1558 break;
1559 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1560 err = vnic_dev_notify_set(enic->vdev,
1561 enic_msix_notify_intr(enic));
01f2e4ea
SF		 1562 break;
1563 default:
1564 err = vnic_dev_notify_set(enic->vdev, -1 /* no intr */);
1565 break;
1566 }
56ac88b3 1567 spin_unlock(&enic->devcmd_lock);
01f2e4ea
SF		 1568
1569 return err;
1570}
1571
1572static void enic_notify_timer_start(struct enic *enic)
1573{
1574 switch (vnic_dev_get_intr_mode(enic->vdev)) {
1575 case VNIC_DEV_INTR_MODE_MSI:
1576 mod_timer(&enic->notify_timer, jiffies);
1577 break;
1578 default:
1579 /* Using intr for notification for INTx/MSI-X */
1580 break;
6403eab1 1581 }
01f2e4ea
SF		 1582}
1583
1584/* rtnl lock is held, process context */
1585static int enic_open(struct net_device *netdev)
1586{
1587 struct enic *enic = netdev_priv(netdev);
1588 unsigned int i;
1589 int err;
1590
4b75a442
SF		 1591 err = enic_request_intr(enic);
1592 if (err) {
a7a79deb 1593 netdev_err(netdev, "Unable to request irq.\n");
4b75a442
SF		 1594 return err;
1595 }
1596
383ab92f 1597 err = enic_dev_notify_set(enic);
4b75a442 1598 if (err) {
a7a79deb
VK		 1599 netdev_err(netdev,
1600 "Failed to alloc notify buffer, aborting.\n");
4b75a442
SF		 1601 goto err_out_free_intr;
1602 }
1603
01f2e4ea 1604 for (i = 0; i < enic->rq_count; i++) {
0eb26022 1605 vnic_rq_fill(&enic->rq[i], enic_rq_alloc_buf);
2d6ddced
SF		 1606 /* Need at least one buffer on ring to get going */
1607 if (vnic_rq_desc_used(&enic->rq[i]) == 0) {
a7a79deb 1608 netdev_err(netdev, "Unable to alloc receive buffers\n");
2d6ddced 1609 err = -ENOMEM;
4b75a442 1610 goto err_out_notify_unset;
01f2e4ea
SF		 1611 }
1612 }
1613
1614 for (i = 0; i < enic->wq_count; i++)
1615 vnic_wq_enable(&enic->wq[i]);
1616 for (i = 0; i < enic->rq_count; i++)
1617 vnic_rq_enable(&enic->rq[i]);
1618
7335903c 1619 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1620 enic_dev_add_station_addr(enic);
3f192795 1621
319d7e84 1622 enic_set_rx_mode(netdev);
01f2e4ea
SF		 1623
1624 netif_wake_queue(netdev);
717258ba
VK		 1625
1626 for (i = 0; i < enic->rq_count; i++)
1627 napi_enable(&enic->napi[i]);
1628
383ab92f 1629 enic_dev_enable(enic);
01f2e4ea
SF		 1630
1631 for (i = 0; i < enic->intr_count; i++)
1632 vnic_intr_unmask(&enic->intr[i]);
1633
1634 enic_notify_timer_start(enic);
1635
1636 return 0;
4b75a442
SF		 1637
1638err_out_notify_unset:
383ab92f 1639 enic_dev_notify_unset(enic);
4b75a442
SF		 1640err_out_free_intr:
1641 enic_free_intr(enic);
1642
1643 return err;
01f2e4ea
SF		 1644}
1645
1646/* rtnl lock is held, process context */
1647static int enic_stop(struct net_device *netdev)
1648{
1649 struct enic *enic = netdev_priv(netdev);
1650 unsigned int i;
1651 int err;
1652
29046f9b 1653 for (i = 0; i < enic->intr_count; i++) {
b3d18d19 1654 vnic_intr_mask(&enic->intr[i]);
29046f9b
VK		 1655 (void)vnic_intr_masked(&enic->intr[i]); /* flush write */
1656 }
b3d18d19
SF		 1657
1658 enic_synchronize_irqs(enic);
1659
01f2e4ea
SF		 1660 del_timer_sync(&enic->notify_timer);
1661
383ab92f 1662 enic_dev_disable(enic);
717258ba
VK		 1663
1664 for (i = 0; i < enic->rq_count; i++)
1665 napi_disable(&enic->napi[i]);
1666
b3d18d19
SF		 1667 netif_carrier_off(netdev);
1668 netif_tx_disable(netdev);
3f192795 1669
7335903c 1670 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic))
29639059 1671 enic_dev_del_station_addr(enic);
f8bd9091 1672
01f2e4ea
SF		 1673 for (i = 0; i < enic->wq_count; i++) {
1674 err = vnic_wq_disable(&enic->wq[i]);
1675 if (err)
1676 return err;
1677 }
1678 for (i = 0; i < enic->rq_count; i++) {
1679 err = vnic_rq_disable(&enic->rq[i]);
1680 if (err)
1681 return err;
1682 }
1683
383ab92f 1684 enic_dev_notify_unset(enic);
4b75a442
SF		 1685 enic_free_intr(enic);
1686
01f2e4ea
SF		 1687 for (i = 0; i < enic->wq_count; i++)
1688 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
1689 for (i = 0; i < enic->rq_count; i++)
1690 vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
1691 for (i = 0; i < enic->cq_count; i++)
1692 vnic_cq_clean(&enic->cq[i]);
1693 for (i = 0; i < enic->intr_count; i++)
1694 vnic_intr_clean(&enic->intr[i]);
1695
1696 return 0;
1697}
1698
1699static int enic_change_mtu(struct net_device *netdev, int new_mtu)
1700{
1701 struct enic *enic = netdev_priv(netdev);
1702 int running = netif_running(netdev);
1703
25f0a061
SF		 1704 if (new_mtu < ENIC_MIN_MTU || new_mtu > ENIC_MAX_MTU)
1705 return -EINVAL;
1706
7335903c 1707 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
c97c894d
RP		 1708 return -EOPNOTSUPP;
1709
01f2e4ea
SF		 1710 if (running)
1711 enic_stop(netdev);
1712
01f2e4ea
SF		 1713 netdev->mtu = new_mtu;
1714
1715 if (netdev->mtu > enic->port_mtu)
a7a79deb
VK		 1716 netdev_warn(netdev,
1717 "interface MTU (%d) set higher than port MTU (%d)\n",
1718 netdev->mtu, enic->port_mtu);
01f2e4ea
SF		 1719
1720 if (running)
1721 enic_open(netdev);
1722
1723 return 0;
1724}
1725
c97c894d
RP		 1726static void enic_change_mtu_work(struct work_struct *work)
1727{
1728 struct enic *enic = container_of(work, struct enic, change_mtu_work);
1729 struct net_device *netdev = enic->netdev;
1730 int new_mtu = vnic_dev_mtu(enic->vdev);
1731 int err;
1732 unsigned int i;
1733
1734 new_mtu = max_t(int, ENIC_MIN_MTU, min_t(int, ENIC_MAX_MTU, new_mtu));
1735
1736 rtnl_lock();
1737
1738 /* Stop RQ */
1739 del_timer_sync(&enic->notify_timer);
1740
1741 for (i = 0; i < enic->rq_count; i++)
1742 napi_disable(&enic->napi[i]);
1743
1744 vnic_intr_mask(&enic->intr[0]);
1745 enic_synchronize_irqs(enic);
1746 err = vnic_rq_disable(&enic->rq[0]);
1747 if (err) {
1748 netdev_err(netdev, "Unable to disable RQ.\n");
1749 return;
1750 }
1751 vnic_rq_clean(&enic->rq[0], enic_free_rq_buf);
1752 vnic_cq_clean(&enic->cq[0]);
1753 vnic_intr_clean(&enic->intr[0]);
1754
1755 /* Fill RQ with new_mtu-sized buffers */
1756 netdev->mtu = new_mtu;
1757 vnic_rq_fill(&enic->rq[0], enic_rq_alloc_buf);
1758 /* Need at least one buffer on ring to get going */
1759 if (vnic_rq_desc_used(&enic->rq[0]) == 0) {
1760 netdev_err(netdev, "Unable to alloc receive buffers.\n");
1761 return;
1762 }
1763
1764 /* Start RQ */
1765 vnic_rq_enable(&enic->rq[0]);
1766 napi_enable(&enic->napi[0]);
1767 vnic_intr_unmask(&enic->intr[0]);
1768 enic_notify_timer_start(enic);
1769
1770 rtnl_unlock();
1771
1772 netdev_info(netdev, "interface MTU set as %d\n", netdev->mtu);
1773}
1774
01f2e4ea
SF		 1775#ifdef CONFIG_NET_POLL_CONTROLLER
1776static void enic_poll_controller(struct net_device *netdev)
1777{
1778 struct enic *enic = netdev_priv(netdev);
1779 struct vnic_dev *vdev = enic->vdev;
717258ba 1780 unsigned int i, intr;
01f2e4ea
SF		 1781
1782 switch (vnic_dev_get_intr_mode(vdev)) {
1783 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 1784 for (i = 0; i < enic->rq_count; i++) {
1785 intr = enic_msix_rq_intr(enic, i);
79aeec58
VK		 1786 enic_isr_msix_rq(enic->msix_entry[intr].vector,
1787 &enic->napi[i]);
717258ba 1788 }
b880a954
VK		 1789
1790 for (i = 0; i < enic->wq_count; i++) {
1791 intr = enic_msix_wq_intr(enic, i);
1792 enic_isr_msix_wq(enic->msix_entry[intr].vector, enic);
1793 }
1794
01f2e4ea
SF		 1795 break;
1796 case VNIC_DEV_INTR_MODE_MSI:
1797 enic_isr_msi(enic->pdev->irq, enic);
1798 break;
1799 case VNIC_DEV_INTR_MODE_INTX:
1800 enic_isr_legacy(enic->pdev->irq, netdev);
1801 break;
1802 default:
1803 break;
1804 }
1805}
1806#endif
1807
1808static int enic_dev_wait(struct vnic_dev *vdev,
1809 int (*start)(struct vnic_dev *, int),
1810 int (*finished)(struct vnic_dev *, int *),
1811 int arg)
1812{
1813 unsigned long time;
1814 int done;
1815 int err;
1816
1817 BUG_ON(in_interrupt());
1818
1819 err = start(vdev, arg);
1820 if (err)
1821 return err;
1822
1823 /* Wait for func to complete...2 seconds max
1824 */
1825
1826 time = jiffies + (HZ * 2);
1827 do {
1828
1829 err = finished(vdev, &done);
1830 if (err)
1831 return err;
1832
1833 if (done)
1834 return 0;
1835
1836 schedule_timeout_uninterruptible(HZ / 10);
1837
1838 } while (time_after(time, jiffies));
1839
1840 return -ETIMEDOUT;
1841}
1842
1843static int enic_dev_open(struct enic *enic)
1844{
1845 int err;
1846
1847 err = enic_dev_wait(enic->vdev, vnic_dev_open,
1848 vnic_dev_open_done, 0);
1849 if (err)
a7a79deb
VK		 1850 dev_err(enic_get_dev(enic), "vNIC device open failed, err %d\n",
1851 err);
01f2e4ea
SF		 1852
1853 return err;
1854}
1855
99ef5639 1856static int enic_dev_hang_reset(struct enic *enic)
01f2e4ea
SF		 1857{
1858 int err;
1859
99ef5639
VK		 1860 err = enic_dev_wait(enic->vdev, vnic_dev_hang_reset,
1861 vnic_dev_hang_reset_done, 0);
01f2e4ea 1862 if (err)
a7a79deb
VK		 1863 netdev_err(enic->netdev, "vNIC hang reset failed, err %d\n",
1864 err);
01f2e4ea
SF		 1865
1866 return err;
1867}
1868
717258ba
VK		 1869static int enic_set_rsskey(struct enic *enic)
1870{
1f4f067f 1871 dma_addr_t rss_key_buf_pa;
717258ba
VK		 1872 union vnic_rss_key *rss_key_buf_va = NULL;
1873 union vnic_rss_key rss_key = {
1874 .key[0].b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101},
1875 .key[1].b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101},
1876 .key[2].b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115},
1877 .key[3].b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108},
1878 };
1879 int err;
1880
1881 rss_key_buf_va = pci_alloc_consistent(enic->pdev,
1882 sizeof(union vnic_rss_key), &rss_key_buf_pa);
1883 if (!rss_key_buf_va)
1884 return -ENOMEM;
1885
1886 memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
1887
1888 spin_lock(&enic->devcmd_lock);
1889 err = enic_set_rss_key(enic,
1890 rss_key_buf_pa,
1891 sizeof(union vnic_rss_key));
1892 spin_unlock(&enic->devcmd_lock);
1893
1894 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_key),
1895 rss_key_buf_va, rss_key_buf_pa);
1896
1897 return err;
1898}
1899
1900static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
1901{
1f4f067f 1902 dma_addr_t rss_cpu_buf_pa;
717258ba
VK		 1903 union vnic_rss_cpu *rss_cpu_buf_va = NULL;
1904 unsigned int i;
1905 int err;
1906
1907 rss_cpu_buf_va = pci_alloc_consistent(enic->pdev,
1908 sizeof(union vnic_rss_cpu), &rss_cpu_buf_pa);
1909 if (!rss_cpu_buf_va)
1910 return -ENOMEM;
1911
1912 for (i = 0; i < (1 << rss_hash_bits); i++)
1913 (*rss_cpu_buf_va).cpu[i/4].b[i%4] = i % enic->rq_count;
1914
1915 spin_lock(&enic->devcmd_lock);
1916 err = enic_set_rss_cpu(enic,
1917 rss_cpu_buf_pa,
1918 sizeof(union vnic_rss_cpu));
1919 spin_unlock(&enic->devcmd_lock);
1920
1921 pci_free_consistent(enic->pdev, sizeof(union vnic_rss_cpu),
1922 rss_cpu_buf_va, rss_cpu_buf_pa);
1923
1924 return err;
1925}
1926
1927static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
1928 u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
68f71708 1929{
68f71708
SF		 1930 const u8 tso_ipid_split_en = 0;
1931 const u8 ig_vlan_strip_en = 1;
383ab92f 1932 int err;
68f71708 1933
717258ba
VK		 1934 /* Enable VLAN tag stripping.
1935 */
68f71708 1936
383ab92f
VK		 1937 spin_lock(&enic->devcmd_lock);
1938 err = enic_set_nic_cfg(enic,
68f71708
SF		 1939 rss_default_cpu, rss_hash_type,
1940 rss_hash_bits, rss_base_cpu,
1941 rss_enable, tso_ipid_split_en,
1942 ig_vlan_strip_en);
383ab92f
VK		 1943 spin_unlock(&enic->devcmd_lock);
1944
1945 return err;
1946}
1947
717258ba
VK		 1948static int enic_set_rss_nic_cfg(struct enic *enic)
1949{
1950 struct device *dev = enic_get_dev(enic);
1951 const u8 rss_default_cpu = 0;
1952 const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
1953 NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
1954 NIC_CFG_RSS_HASH_TYPE_IPV6 |
1955 NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
1956 const u8 rss_hash_bits = 7;
1957 const u8 rss_base_cpu = 0;
1958 u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
1959
1960 if (rss_enable) {
1961 if (!enic_set_rsskey(enic)) {
1962 if (enic_set_rsscpu(enic, rss_hash_bits)) {
1963 rss_enable = 0;
1964 dev_warn(dev, "RSS disabled, "
1965 "Failed to set RSS cpu indirection table.");
1966 }
1967 } else {
1968 rss_enable = 0;
1969 dev_warn(dev, "RSS disabled, Failed to set RSS key.\n");
1970 }
1971 }
1972
1973 return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
1974 rss_hash_bits, rss_base_cpu, rss_enable);
f8cac14a
VK		 1975}
1976
01f2e4ea
SF		 1977static void enic_reset(struct work_struct *work)
1978{
1979 struct enic *enic = container_of(work, struct enic, reset);
1980
1981 if (!netif_running(enic->netdev))
1982 return;
1983
1984 rtnl_lock();
1985
383ab92f 1986 enic_dev_hang_notify(enic);
01f2e4ea 1987 enic_stop(enic->netdev);
99ef5639 1988 enic_dev_hang_reset(enic);
e0afe53f 1989 enic_reset_addr_lists(enic);
01f2e4ea 1990 enic_init_vnic_resources(enic);
717258ba 1991 enic_set_rss_nic_cfg(enic);
f8cac14a 1992 enic_dev_set_ig_vlan_rewrite_mode(enic);
01f2e4ea
SF		 1993 enic_open(enic->netdev);
1994
1995 rtnl_unlock();
1996}
1997
1998static int enic_set_intr_mode(struct enic *enic)
1999{
717258ba 2000 unsigned int n = min_t(unsigned int, enic->rq_count, ENIC_RQ_MAX);
1cbb1a61 2001 unsigned int m = min_t(unsigned int, enic->wq_count, ENIC_WQ_MAX);
01f2e4ea
SF		 2002 unsigned int i;
2003
2004 /* Set interrupt mode (INTx, MSI, MSI-X) depending
717258ba 2005 * on system capabilities.
01f2e4ea
SF		 2006 *
2007 * Try MSI-X first
2008 *
2009 * We need n RQs, m WQs, n+m CQs, and n+m+2 INTRs
2010 * (the second to last INTR is used for WQ/RQ errors)
2011 * (the last INTR is used for notifications)
2012 */
2013
2014 BUG_ON(ARRAY_SIZE(enic->msix_entry) < n + m + 2);
2015 for (i = 0; i < n + m + 2; i++)
2016 enic->msix_entry[i].entry = i;
2017
717258ba
VK		 2018 /* Use multiple RQs if RSS is enabled
2019 */
2020
2021 if (ENIC_SETTING(enic, RSS) &&
2022 enic->config.intr_mode < 1 &&
01f2e4ea
SF		 2023 enic->rq_count >= n &&
2024 enic->wq_count >= m &&
2025 enic->cq_count >= n + m &&
717258ba 2026 enic->intr_count >= n + m + 2) {
01f2e4ea 2027
717258ba 2028 if (!pci_enable_msix(enic->pdev, enic->msix_entry, n + m + 2)) {
01f2e4ea 2029
717258ba
VK		 2030 enic->rq_count = n;
2031 enic->wq_count = m;
2032 enic->cq_count = n + m;
2033 enic->intr_count = n + m + 2;
01f2e4ea 2034
717258ba
VK		 2035 vnic_dev_set_intr_mode(enic->vdev,
2036 VNIC_DEV_INTR_MODE_MSIX);
2037
2038 return 0;
2039 }
2040 }
2041
2042 if (enic->config.intr_mode < 1 &&
2043 enic->rq_count >= 1 &&
2044 enic->wq_count >= m &&
2045 enic->cq_count >= 1 + m &&
2046 enic->intr_count >= 1 + m + 2) {
2047 if (!pci_enable_msix(enic->pdev, enic->msix_entry, 1 + m + 2)) {
2048
2049 enic->rq_count = 1;
2050 enic->wq_count = m;
2051 enic->cq_count = 1 + m;
2052 enic->intr_count = 1 + m + 2;
2053
2054 vnic_dev_set_intr_mode(enic->vdev,
2055 VNIC_DEV_INTR_MODE_MSIX);
2056
2057 return 0;
2058 }
01f2e4ea
SF		 2059 }
2060
2061 /* Next try MSI
2062 *
2063 * We need 1 RQ, 1 WQ, 2 CQs, and 1 INTR
2064 */
2065
2066 if (enic->config.intr_mode < 2 &&
2067 enic->rq_count >= 1 &&
2068 enic->wq_count >= 1 &&
2069 enic->cq_count >= 2 &&
2070 enic->intr_count >= 1 &&
2071 !pci_enable_msi(enic->pdev)) {
2072
2073 enic->rq_count = 1;
2074 enic->wq_count = 1;
2075 enic->cq_count = 2;
2076 enic->intr_count = 1;
2077
2078 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_MSI);
2079
2080 return 0;
2081 }
2082
2083 /* Next try INTx
2084 *
2085 * We need 1 RQ, 1 WQ, 2 CQs, and 3 INTRs
2086 * (the first INTR is used for WQ/RQ)
2087 * (the second INTR is used for WQ/RQ errors)
2088 * (the last INTR is used for notifications)
2089 */
2090
2091 if (enic->config.intr_mode < 3 &&
2092 enic->rq_count >= 1 &&
2093 enic->wq_count >= 1 &&
2094 enic->cq_count >= 2 &&
2095 enic->intr_count >= 3) {
2096
2097 enic->rq_count = 1;
2098 enic->wq_count = 1;
2099 enic->cq_count = 2;
2100 enic->intr_count = 3;
2101
2102 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_INTX);
2103
2104 return 0;
2105 }
2106
2107 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2108
2109 return -EINVAL;
2110}
2111
2112static void enic_clear_intr_mode(struct enic *enic)
2113{
2114 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2115 case VNIC_DEV_INTR_MODE_MSIX:
2116 pci_disable_msix(enic->pdev);
2117 break;
2118 case VNIC_DEV_INTR_MODE_MSI:
2119 pci_disable_msi(enic->pdev);
2120 break;
2121 default:
2122 break;
2123 }
2124
2125 vnic_dev_set_intr_mode(enic->vdev, VNIC_DEV_INTR_MODE_UNKNOWN);
2126}
2127
f8bd9091
SF		 2128static const struct net_device_ops enic_netdev_dynamic_ops = {
2129 .ndo_open = enic_open,
2130 .ndo_stop = enic_stop,
2131 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2132 .ndo_get_stats64 = enic_get_stats,
f8bd9091 2133 .ndo_validate_addr = eth_validate_addr,
319d7e84 2134 .ndo_set_rx_mode = enic_set_rx_mode,
f8bd9091
SF		 2135 .ndo_set_mac_address = enic_set_mac_address_dynamic,
2136 .ndo_change_mtu = enic_change_mtu,
f8bd9091
SF		 2137 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2138 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2139 .ndo_tx_timeout = enic_tx_timeout,
2140 .ndo_set_vf_port = enic_set_vf_port,
2141 .ndo_get_vf_port = enic_get_vf_port,
0b1c00fc 2142 .ndo_set_vf_mac = enic_set_vf_mac,
f8bd9091
SF		 2143#ifdef CONFIG_NET_POLL_CONTROLLER
2144 .ndo_poll_controller = enic_poll_controller,
2145#endif
2146};
2147
afe29f7a
SH		 2148static const struct net_device_ops enic_netdev_ops = {
2149 .ndo_open = enic_open,
2150 .ndo_stop = enic_stop,
00829823 2151 .ndo_start_xmit = enic_hard_start_xmit,
f20530bc 2152 .ndo_get_stats64 = enic_get_stats,
afe29f7a 2153 .ndo_validate_addr = eth_validate_addr,
f8bd9091 2154 .ndo_set_mac_address = enic_set_mac_address,
319d7e84 2155 .ndo_set_rx_mode = enic_set_rx_mode,
afe29f7a 2156 .ndo_change_mtu = enic_change_mtu,
afe29f7a
SH		 2157 .ndo_vlan_rx_add_vid = enic_vlan_rx_add_vid,
2158 .ndo_vlan_rx_kill_vid = enic_vlan_rx_kill_vid,
2159 .ndo_tx_timeout = enic_tx_timeout,
3f192795
RP		 2160 .ndo_set_vf_port = enic_set_vf_port,
2161 .ndo_get_vf_port = enic_get_vf_port,
2162 .ndo_set_vf_mac = enic_set_vf_mac,
afe29f7a
SH		 2163#ifdef CONFIG_NET_POLL_CONTROLLER
2164 .ndo_poll_controller = enic_poll_controller,
2165#endif
2166};
2167
2fdba388 2168static void enic_dev_deinit(struct enic *enic)
6fdfa970 2169{
717258ba
VK		 2170 unsigned int i;
2171
2172 for (i = 0; i < enic->rq_count; i++)
2173 netif_napi_del(&enic->napi[i]);
2174
6fdfa970
SF		 2175 enic_free_vnic_resources(enic);
2176 enic_clear_intr_mode(enic);
2177}
2178
2fdba388 2179static int enic_dev_init(struct enic *enic)
6fdfa970 2180{
a7a79deb 2181 struct device *dev = enic_get_dev(enic);
6fdfa970 2182 struct net_device *netdev = enic->netdev;
717258ba 2183 unsigned int i;
6fdfa970
SF		 2184 int err;
2185
ea7ea65a
VK		 2186 /* Get interrupt coalesce timer info */
2187 err = enic_dev_intr_coal_timer_info(enic);
2188 if (err) {
2189 dev_warn(dev, "Using default conversion factor for "
2190 "interrupt coalesce timer\n");
2191 vnic_dev_intr_coal_timer_info_default(enic->vdev);
2192 }
2193
6fdfa970
SF		 2194 /* Get vNIC configuration
2195 */
2196
2197 err = enic_get_vnic_config(enic);
2198 if (err) {
a7a79deb 2199 dev_err(dev, "Get vNIC configuration failed, aborting\n");
6fdfa970
SF		 2200 return err;
2201 }
2202
2203 /* Get available resource counts
2204 */
2205
2206 enic_get_res_counts(enic);
2207
2208 /* Set interrupt mode based on resource counts and system
2209 * capabilities
2210 */
2211
2212 err = enic_set_intr_mode(enic);
2213 if (err) {
a7a79deb
VK		 2214 dev_err(dev, "Failed to set intr mode based on resource "
2215 "counts and system capabilities, aborting\n");
6fdfa970
SF		 2216 return err;
2217 }
2218
2219 /* Allocate and configure vNIC resources
2220 */
2221
2222 err = enic_alloc_vnic_resources(enic);
2223 if (err) {
a7a79deb 2224 dev_err(dev, "Failed to alloc vNIC resources, aborting\n");
6fdfa970
SF		 2225 goto err_out_free_vnic_resources;
2226 }
2227
2228 enic_init_vnic_resources(enic);
2229
717258ba 2230 err = enic_set_rss_nic_cfg(enic);
6fdfa970 2231 if (err) {
a7a79deb 2232 dev_err(dev, "Failed to config nic, aborting\n");
6fdfa970
SF		 2233 goto err_out_free_vnic_resources;
2234 }
2235
2236 switch (vnic_dev_get_intr_mode(enic->vdev)) {
2237 default:
717258ba 2238 netif_napi_add(netdev, &enic->napi[0], enic_poll, 64);
6fdfa970
SF		 2239 break;
2240 case VNIC_DEV_INTR_MODE_MSIX:
717258ba
VK		 2241 for (i = 0; i < enic->rq_count; i++)
2242 netif_napi_add(netdev, &enic->napi[i],
2243 enic_poll_msix, 64);
6fdfa970
SF		 2244 break;
2245 }
2246
2247 return 0;
2248
2249err_out_free_vnic_resources:
2250 enic_clear_intr_mode(enic);
2251 enic_free_vnic_resources(enic);
2252
2253 return err;
2254}
2255
27e6c7d3
SF		 2256static void enic_iounmap(struct enic *enic)
2257{
2258 unsigned int i;
2259
2260 for (i = 0; i < ARRAY_SIZE(enic->bar); i++)
2261 if (enic->bar[i].vaddr)
2262 iounmap(enic->bar[i].vaddr);
2263}
2264
01f2e4ea
SF		 2265static int __devinit enic_probe(struct pci_dev *pdev,
2266 const struct pci_device_id *ent)
2267{
a7a79deb 2268 struct device *dev = &pdev->dev;
01f2e4ea
SF		 2269 struct net_device *netdev;
2270 struct enic *enic;
2271 int using_dac = 0;
2272 unsigned int i;
2273 int err;
8749b427
RP		 2274#ifdef CONFIG_PCI_IOV
2275 int pos = 0;
2276#endif
b67f231d 2277 int num_pps = 1;
01f2e4ea 2278
01f2e4ea
SF		 2279 /* Allocate net device structure and initialize. Private
2280 * instance data is initialized to zero.
2281 */
2282
2283 netdev = alloc_etherdev(sizeof(struct enic));
41de8d4c 2284 if (!netdev)
01f2e4ea 2285 return -ENOMEM;
01f2e4ea 2286
01f2e4ea
SF		 2287 pci_set_drvdata(pdev, netdev);
2288
2289 SET_NETDEV_DEV(netdev, &pdev->dev);
2290
2291 enic = netdev_priv(netdev);
2292 enic->netdev = netdev;
2293 enic->pdev = pdev;
2294
2295 /* Setup PCI resources
2296 */
2297
29046f9b 2298 err = pci_enable_device_mem(pdev);
01f2e4ea 2299 if (err) {
a7a79deb 2300 dev_err(dev, "Cannot enable PCI device, aborting\n");
01f2e4ea
SF		 2301 goto err_out_free_netdev;
2302 }
2303
2304 err = pci_request_regions(pdev, DRV_NAME);
2305 if (err) {
a7a79deb 2306 dev_err(dev, "Cannot request PCI regions, aborting\n");
01f2e4ea
SF		 2307 goto err_out_disable_device;
2308 }
2309
2310 pci_set_master(pdev);
2311
2312 /* Query PCI controller on system for DMA addressing
2313 * limitation for the device. Try 40-bit first, and
2314 * fail to 32-bit.
2315 */
2316
50cf156a 2317 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2318 if (err) {
284901a9 2319 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2320 if (err) {
a7a79deb 2321 dev_err(dev, "No usable DMA configuration, aborting\n");
01f2e4ea
SF		 2322 goto err_out_release_regions;
2323 }
284901a9 2324 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
01f2e4ea 2325 if (err) {
a7a79deb
VK		 2326 dev_err(dev, "Unable to obtain %u-bit DMA "
2327 "for consistent allocations, aborting\n", 32);
01f2e4ea
SF		 2328 goto err_out_release_regions;
2329 }
2330 } else {
50cf156a 2331 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40));
01f2e4ea 2332 if (err) {
a7a79deb
VK		 2333 dev_err(dev, "Unable to obtain %u-bit DMA "
2334 "for consistent allocations, aborting\n", 40);
01f2e4ea
SF		 2335 goto err_out_release_regions;
2336 }
2337 using_dac = 1;
2338 }
2339
27e6c7d3 2340 /* Map vNIC resources from BAR0-5
01f2e4ea
SF		 2341 */
2342
27e6c7d3
SF		 2343 for (i = 0; i < ARRAY_SIZE(enic->bar); i++) {
2344 if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
2345 continue;
2346 enic->bar[i].len = pci_resource_len(pdev, i);
2347 enic->bar[i].vaddr = pci_iomap(pdev, i, enic->bar[i].len);
2348 if (!enic->bar[i].vaddr) {
a7a79deb 2349 dev_err(dev, "Cannot memory-map BAR %d, aborting\n", i);
27e6c7d3
SF		 2350 err = -ENODEV;
2351 goto err_out_iounmap;
2352 }
2353 enic->bar[i].bus_addr = pci_resource_start(pdev, i);
01f2e4ea
SF		 2354 }
2355
2356 /* Register vNIC device
2357 */
2358
27e6c7d3
SF		 2359 enic->vdev = vnic_dev_register(NULL, enic, pdev, enic->bar,
2360 ARRAY_SIZE(enic->bar));
01f2e4ea 2361 if (!enic->vdev) {
a7a79deb 2362 dev_err(dev, "vNIC registration failed, aborting\n");
01f2e4ea
SF		 2363 err = -ENODEV;
2364 goto err_out_iounmap;
2365 }
2366
8749b427
RP		 2367#ifdef CONFIG_PCI_IOV
2368 /* Get number of subvnics */
2369 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
2370 if (pos) {
2371 pci_read_config_word(pdev, pos + PCI_SRIOV_TOTAL_VF,
2372 (u16 *)&enic->num_vfs);
2373 if (enic->num_vfs) {
2374 err = pci_enable_sriov(pdev, enic->num_vfs);
2375 if (err) {
2376 dev_err(dev, "SRIOV enable failed, aborting."
2377 " pci_enable_sriov() returned %d\n",
2378 err);
2379 goto err_out_vnic_unregister;
2380 }
2381 enic->priv_flags |= ENIC_SRIOV_ENABLED;
b67f231d 2382 num_pps = enic->num_vfs;
8749b427
RP		 2383 }
2384 }
8749b427 2385#endif
ca2b721d 2386
3f192795 2387 /* Allocate structure for port profiles */
a1de2219 2388 enic->pp = kcalloc(num_pps, sizeof(*enic->pp), GFP_KERNEL);
3f192795 2389 if (!enic->pp) {
3f192795 2390 err = -ENOMEM;
ca2b721d 2391 goto err_out_disable_sriov_pp;
3f192795
RP		 2392 }
2393
01f2e4ea
SF		 2394 /* Issue device open to get device in known state
2395 */
2396
2397 err = enic_dev_open(enic);
2398 if (err) {
a7a79deb 2399 dev_err(dev, "vNIC dev open failed, aborting\n");
ca2b721d 2400 goto err_out_disable_sriov;
01f2e4ea
SF		 2401 }
2402
69161425
VK		 2403 /* Setup devcmd lock
2404 */
2405
2406 spin_lock_init(&enic->devcmd_lock);
2407
2408 /*
2409 * Set ingress vlan rewrite mode before vnic initialization
2410 */
2411
2412 err = enic_dev_set_ig_vlan_rewrite_mode(enic);
2413 if (err) {
2414 dev_err(dev,
2415 "Failed to set ingress vlan rewrite mode, aborting.\n");
2416 goto err_out_dev_close;
2417 }
2418
01f2e4ea
SF		 2419 /* Issue device init to initialize the vnic-to-switch link.
2420 * We'll start with carrier off and wait for link UP
2421 * notification later to turn on carrier. We don't need
2422 * to wait here for the vnic-to-switch link initialization
2423 * to complete; link UP notification is the indication that
2424 * the process is complete.
2425 */
2426
2427 netif_carrier_off(netdev);
2428
a7a79deb
VK		 2429 /* Do not call dev_init for a dynamic vnic.
2430 * For a dynamic vnic, init_prov_info will be
2431 * called later by an upper layer.
2432 */
2433
7335903c 2434 if (!enic_is_dynamic(enic) && !enic_is_sriov_vf(enic)) {
f8bd9091
SF		 2435 err = vnic_dev_init(enic->vdev, 0);
2436 if (err) {
a7a79deb 2437 dev_err(dev, "vNIC dev init failed, aborting\n");
f8bd9091
SF		 2438 goto err_out_dev_close;
2439 }
01f2e4ea
SF		 2440 }
2441
6fdfa970 2442 err = enic_dev_init(enic);
01f2e4ea 2443 if (err) {
a7a79deb 2444 dev_err(dev, "Device initialization failed, aborting\n");
01f2e4ea
SF		 2445 goto err_out_dev_close;
2446 }
2447
383ab92f 2448 /* Setup notification timer, HW reset task, and wq locks
01f2e4ea
SF		 2449 */
2450
2451 init_timer(&enic->notify_timer);
2452 enic->notify_timer.function = enic_notify_timer;
2453 enic->notify_timer.data = (unsigned long)enic;
2454
2455 INIT_WORK(&enic->reset, enic_reset);
c97c894d 2456 INIT_WORK(&enic->change_mtu_work, enic_change_mtu_work);
01f2e4ea
SF		 2457
2458 for (i = 0; i < enic->wq_count; i++)
2459 spin_lock_init(&enic->wq_lock[i]);
2460
01f2e4ea
SF		 2461 /* Register net device
2462 */
2463
2464 enic->port_mtu = enic->config.mtu;
2465 (void)enic_change_mtu(netdev, enic->port_mtu);
2466
2467 err = enic_set_mac_addr(netdev, enic->mac_addr);
2468 if (err) {
a7a79deb 2469 dev_err(dev, "Invalid MAC address, aborting\n");
6fdfa970 2470 goto err_out_dev_deinit;
01f2e4ea
SF		 2471 }
2472
7c844599
SF		 2473 enic->tx_coalesce_usecs = enic->config.intr_timer_usec;
2474 enic->rx_coalesce_usecs = enic->tx_coalesce_usecs;
2475
7335903c 2476 if (enic_is_dynamic(enic) || enic_is_sriov_vf(enic))
f8bd9091
SF		 2477 netdev->netdev_ops = &enic_netdev_dynamic_ops;
2478 else
2479 netdev->netdev_ops = &enic_netdev_ops;
2480
01f2e4ea
SF		 2481 netdev->watchdog_timeo = 2 * HZ;
2482 netdev->ethtool_ops = &enic_ethtool_ops;
01f2e4ea 2483
73c1ea9b 2484 netdev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
1825aca6
VK		 2485 if (ENIC_SETTING(enic, LOOP)) {
2486 netdev->features &= ~NETIF_F_HW_VLAN_TX;
2487 enic->loop_enable = 1;
2488 enic->loop_tag = enic->config.loop_tag;
2489 dev_info(dev, "loopback tag=0x%04x\n", enic->loop_tag);
2490 }
01f2e4ea 2491 if (ENIC_SETTING(enic, TXCSUM))
5ec8f9b8 2492 netdev->hw_features |= NETIF_F_SG | NETIF_F_HW_CSUM;
01f2e4ea 2493 if (ENIC_SETTING(enic, TSO))
5ec8f9b8 2494 netdev->hw_features |= NETIF_F_TSO |
01f2e4ea 2495 NETIF_F_TSO6 | NETIF_F_TSO_ECN;
5ec8f9b8
MM		 2496 if (ENIC_SETTING(enic, RXCSUM))
2497 netdev->hw_features |= NETIF_F_RXCSUM;
2498
2499 netdev->features |= netdev->hw_features;
2500
01f2e4ea
SF		 2501 if (using_dac)
2502 netdev->features |= NETIF_F_HIGHDMA;
2503
01789349
JP		 2504 netdev->priv_flags |= IFF_UNICAST_FLT;
2505
01f2e4ea
SF		 2506 err = register_netdev(netdev);
2507 if (err) {
a7a79deb 2508 dev_err(dev, "Cannot register net device, aborting\n");
6fdfa970 2509 goto err_out_dev_deinit;
01f2e4ea
SF		 2510 }
2511
2512 return 0;
2513
6fdfa970
SF		 2514err_out_dev_deinit:
2515 enic_dev_deinit(enic);
01f2e4ea
SF		 2516err_out_dev_close:
2517 vnic_dev_close(enic->vdev);
8749b427 2518err_out_disable_sriov:
ca2b721d
RP		 2519 kfree(enic->pp);
2520err_out_disable_sriov_pp:
8749b427
RP		 2521#ifdef CONFIG_PCI_IOV
2522 if (enic_sriov_enabled(enic)) {
2523 pci_disable_sriov(pdev);
2524 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2525 }
01f2e4ea 2526err_out_vnic_unregister:
8749b427 2527#endif
35d87e33 2528 vnic_dev_unregister(enic->vdev);
01f2e4ea
SF		 2529err_out_iounmap:
2530 enic_iounmap(enic);
2531err_out_release_regions:
2532 pci_release_regions(pdev);
2533err_out_disable_device:
2534 pci_disable_device(pdev);
2535err_out_free_netdev:
2536 pci_set_drvdata(pdev, NULL);
2537 free_netdev(netdev);
2538
2539 return err;
2540}
2541
2542static void __devexit enic_remove(struct pci_dev *pdev)
2543{
2544 struct net_device *netdev = pci_get_drvdata(pdev);
2545
2546 if (netdev) {
2547 struct enic *enic = netdev_priv(netdev);
2548
23f333a2 2549 cancel_work_sync(&enic->reset);
c97c894d 2550 cancel_work_sync(&enic->change_mtu_work);
01f2e4ea 2551 unregister_netdev(netdev);
6fdfa970 2552 enic_dev_deinit(enic);
01f2e4ea 2553 vnic_dev_close(enic->vdev);
8749b427
RP		 2554#ifdef CONFIG_PCI_IOV
2555 if (enic_sriov_enabled(enic)) {
2556 pci_disable_sriov(pdev);
2557 enic->priv_flags &= ~ENIC_SRIOV_ENABLED;
2558 }
2559#endif
3f192795 2560 kfree(enic->pp);
01f2e4ea
SF		 2561 vnic_dev_unregister(enic->vdev);
2562 enic_iounmap(enic);
2563 pci_release_regions(pdev);
2564 pci_disable_device(pdev);
2565 pci_set_drvdata(pdev, NULL);
2566 free_netdev(netdev);
2567 }
2568}
2569
2570static struct pci_driver enic_driver = {
2571 .name = DRV_NAME,
2572 .id_table = enic_id_table,
2573 .probe = enic_probe,
2574 .remove = __devexit_p(enic_remove),
2575};
2576
2577static int __init enic_init_module(void)
2578{
a7a79deb 2579 pr_info("%s, ver %s\n", DRV_DESCRIPTION, DRV_VERSION);
01f2e4ea
SF		 2580
2581 return pci_register_driver(&enic_driver);
2582}
2583
2584static void __exit enic_cleanup_module(void)
2585{
2586 pci_unregister_driver(&enic_driver);
2587}
2588
2589module_init(enic_init_module);
2590module_exit(enic_cleanup_module);
Linux kernel - Deliverables
This page took 2.629085 seconds and 5 git commands to generate.