be2net: use adapter->flags to track SRIOV state
[deliverable/linux.git] / drivers / net / ethernet / emulex / benet / be.h
CommitLineData
6b7c5b94 1/*
40263820 2 * Copyright (C) 2005 - 2014 Emulex
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3 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
d2145cde 11 * linux-drivers@emulex.com
6b7c5b94 12 *
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13 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
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16 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
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23#include <linux/delay.h>
24#include <net/tcp.h>
25#include <net/ip.h>
26#include <net/ipv6.h>
27#include <linux/if_vlan.h>
28#include <linux/workqueue.h>
29#include <linux/interrupt.h>
84517482 30#include <linux/firmware.h>
5a0e3ad6 31#include <linux/slab.h>
ab1594e9 32#include <linux/u64_stats_sync.h>
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33
34#include "be_hw.h"
045508a8 35#include "be_roce.h"
6b7c5b94 36
d52afde9 37#define DRV_VER "10.2u"
6b7c5b94 38#define DRV_NAME "be2net"
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39#define BE_NAME "Emulex BladeEngine2"
40#define BE3_NAME "Emulex BladeEngine3"
41#define OC_NAME "Emulex OneConnect"
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42#define OC_NAME_BE OC_NAME "(be3)"
43#define OC_NAME_LANCER OC_NAME "(Lancer)"
ecedb6ae 44#define OC_NAME_SH OC_NAME "(Skyhawk)"
f3effb45 45#define DRV_DESC "Emulex OneConnect NIC Driver"
6b7c5b94 46
c4ca2374 47#define BE_VENDOR_ID 0x19a2
fe6d2a38 48#define EMULEX_VENDOR_ID 0x10df
c4ca2374 49#define BE_DEVICE_ID1 0x211
12d7ea2c 50#define BE_DEVICE_ID2 0x221
fe6d2a38
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51#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
12f4d0a8 54#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
ecedb6ae 55#define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
76b73530 56#define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
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57#define OC_SUBSYS_DEVICE_ID1 0xE602
58#define OC_SUBSYS_DEVICE_ID2 0xE642
59#define OC_SUBSYS_DEVICE_ID3 0xE612
60#define OC_SUBSYS_DEVICE_ID4 0xE652
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61
62static inline char *nic_name(struct pci_dev *pdev)
63{
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64 switch (pdev->device) {
65 case OC_DEVICE_ID1:
c4ca2374 66 return OC_NAME;
e254f6ec 67 case OC_DEVICE_ID2:
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68 return OC_NAME_BE;
69 case OC_DEVICE_ID3:
12f4d0a8 70 case OC_DEVICE_ID4:
fe6d2a38 71 return OC_NAME_LANCER;
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72 case BE_DEVICE_ID2:
73 return BE3_NAME;
ecedb6ae 74 case OC_DEVICE_ID5:
76b73530 75 case OC_DEVICE_ID6:
ecedb6ae 76 return OC_NAME_SH;
12d7ea2c 77 default:
c4ca2374 78 return BE_NAME;
12d7ea2c 79 }
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80}
81
6b7c5b94 82/* Number of bytes of an RX frame that are copied to skb->data */
2e588f84 83#define BE_HDR_LEN ((u16) 64)
bb349bb4
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84/* allocate extra space to allow tunneling decapsulation without head reallocation */
85#define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
86
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87#define BE_MAX_JUMBO_FRAME_SIZE 9018
88#define BE_MIN_MTU 256
89
90#define BE_NUM_VLANS_SUPPORTED 64
2632bafd 91#define BE_MAX_EQD 128u
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92#define BE_MAX_TX_FRAG_COUNT 30
93
94#define EVNT_Q_LEN 1024
95#define TX_Q_LEN 2048
96#define TX_CQ_LEN 1024
97#define RX_Q_LEN 1024 /* Does not support any other value */
98#define RX_CQ_LEN 1024
5fb379ee 99#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
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100#define MCC_CQ_LEN 256
101
10ef9ab4 102#define BE2_MAX_RSS_QS 4
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103#define BE3_MAX_RSS_QS 16
104#define BE3_MAX_TX_QS 16
105#define BE3_MAX_EVT_QS 16
e3dc867c 106#define BE3_SRIOV_MAX_EVT_QS 8
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107
108#define MAX_RX_QS 32
109#define MAX_EVT_QS 32
110#define MAX_TX_QS 32
10ef9ab4 111
045508a8 112#define MAX_ROCE_EQS 5
68d7bdcb 113#define MAX_MSIX_VECTORS 32
92bf14ab 114#define MIN_MSIX_VECTORS 1
10ef9ab4 115#define BE_TX_BUDGET 256
6b7c5b94 116#define BE_NAPI_WEIGHT 64
10ef9ab4 117#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
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118#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
119
7c5a5242 120#define MAX_VFS 30 /* Max VFs supported by BE3 FW */
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121#define FW_VER_LEN 32
122
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123#define RSS_INDIR_TABLE_LEN 128
124#define RSS_HASH_KEY_LEN 40
125
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126struct be_dma_mem {
127 void *va;
128 dma_addr_t dma;
129 u32 size;
130};
131
132struct be_queue_info {
133 struct be_dma_mem dma_mem;
134 u16 len;
135 u16 entry_size; /* Size of an element in the queue */
136 u16 id;
137 u16 tail, head;
138 bool created;
139 atomic_t used; /* Number of valid elements in the queue */
140};
141
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142static inline u32 MODULO(u16 val, u16 limit)
143{
144 BUG_ON(limit & (limit - 1));
145 return val & (limit - 1);
146}
147
148static inline void index_adv(u16 *index, u16 val, u16 limit)
149{
150 *index = MODULO((*index + val), limit);
151}
152
153static inline void index_inc(u16 *index, u16 limit)
154{
155 *index = MODULO((*index + 1), limit);
156}
157
158static inline void *queue_head_node(struct be_queue_info *q)
159{
160 return q->dma_mem.va + q->head * q->entry_size;
161}
162
163static inline void *queue_tail_node(struct be_queue_info *q)
164{
165 return q->dma_mem.va + q->tail * q->entry_size;
166}
167
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168static inline void *queue_index_node(struct be_queue_info *q, u16 index)
169{
170 return q->dma_mem.va + index * q->entry_size;
171}
172
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173static inline void queue_head_inc(struct be_queue_info *q)
174{
175 index_inc(&q->head, q->len);
176}
177
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178static inline void index_dec(u16 *index, u16 limit)
179{
180 *index = MODULO((*index - 1), limit);
181}
182
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183static inline void queue_tail_inc(struct be_queue_info *q)
184{
185 index_inc(&q->tail, q->len);
186}
187
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188struct be_eq_obj {
189 struct be_queue_info q;
190 char desc[32];
191
192 /* Adaptive interrupt coalescing (AIC) info */
193 bool enable_aic;
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194 u32 min_eqd; /* in usecs */
195 u32 max_eqd; /* in usecs */
196 u32 eqd; /* configured val when aic is off */
197 u32 cur_eqd; /* in usecs */
5fb379ee 198
10ef9ab4 199 u8 idx; /* array index */
f2f781a7 200 u8 msix_idx;
10ef9ab4 201 u16 tx_budget;
d0b9cec3 202 u16 spurious_intr;
5fb379ee 203 struct napi_struct napi;
10ef9ab4 204 struct be_adapter *adapter;
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205
206#ifdef CONFIG_NET_RX_BUSY_POLL
207#define BE_EQ_IDLE 0
208#define BE_EQ_NAPI 1 /* napi owns this EQ */
209#define BE_EQ_POLL 2 /* poll owns this EQ */
210#define BE_EQ_LOCKED (BE_EQ_NAPI | BE_EQ_POLL)
211#define BE_EQ_NAPI_YIELD 4 /* napi yielded this EQ */
212#define BE_EQ_POLL_YIELD 8 /* poll yielded this EQ */
213#define BE_EQ_YIELD (BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD)
214#define BE_EQ_USER_PEND (BE_EQ_POLL | BE_EQ_POLL_YIELD)
215 unsigned int state;
216 spinlock_t lock; /* lock to serialize napi and busy-poll */
217#endif /* CONFIG_NET_RX_BUSY_POLL */
10ef9ab4 218} ____cacheline_aligned_in_smp;
5fb379ee 219
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220struct be_aic_obj { /* Adaptive interrupt coalescing (AIC) info */
221 bool enable;
222 u32 min_eqd; /* in usecs */
223 u32 max_eqd; /* in usecs */
224 u32 prev_eqd; /* in usecs */
225 u32 et_eqd; /* configured val when aic is off */
226 ulong jiffies;
227 u64 rx_pkts_prev; /* Used to calculate RX pps */
228 u64 tx_reqs_prev; /* Used to calculate TX pps */
229};
230
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231enum {
232 NAPI_POLLING,
233 BUSY_POLLING
234};
235
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236struct be_mcc_obj {
237 struct be_queue_info q;
238 struct be_queue_info cq;
7a1e9b20 239 bool rearm_cq;
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240};
241
3abcdeda 242struct be_tx_stats {
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243 u64 tx_bytes;
244 u64 tx_pkts;
245 u64 tx_reqs;
246 u64 tx_wrbs;
247 u64 tx_compl;
248 ulong tx_jiffies;
249 u32 tx_stops;
bc617526 250 u32 tx_drv_drops; /* pkts dropped by driver */
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251 struct u64_stats_sync sync;
252 struct u64_stats_sync sync_compl;
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253};
254
6b7c5b94 255struct be_tx_obj {
94d73aaa 256 u32 db_offset;
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257 struct be_queue_info q;
258 struct be_queue_info cq;
259 /* Remember the skbs that were transmitted */
260 struct sk_buff *sent_skb_list[TX_Q_LEN];
3c8def97 261 struct be_tx_stats stats;
10ef9ab4 262} ____cacheline_aligned_in_smp;
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263
264/* Struct to remember the pages posted for rx frags */
265struct be_rx_page_info {
266 struct page *page;
e50287be 267 /* set to page-addr for last frag of the page & frag-addr otherwise */
fac6da5b 268 DEFINE_DMA_UNMAP_ADDR(bus);
6b7c5b94 269 u16 page_offset;
e50287be 270 bool last_frag; /* last frag of the page */
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271};
272
3abcdeda 273struct be_rx_stats {
3abcdeda 274 u64 rx_bytes;
3abcdeda 275 u64 rx_pkts;
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276 u32 rx_drops_no_skbs; /* skb allocation errors */
277 u32 rx_drops_no_frags; /* HW has no fetched frags */
278 u32 rx_post_fail; /* page post alloc failures */
ac124ff9 279 u32 rx_compl;
3abcdeda 280 u32 rx_mcast_pkts;
ac124ff9 281 u32 rx_compl_err; /* completions with err set */
ab1594e9 282 struct u64_stats_sync sync;
3abcdeda
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283};
284
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285struct be_rx_compl_info {
286 u32 rss_hash;
6709d952 287 u16 vlan_tag;
2e588f84 288 u16 pkt_size;
12004ae9 289 u16 port;
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290 u8 vlanf;
291 u8 num_rcvd;
292 u8 err;
293 u8 ipf;
294 u8 tcpf;
295 u8 udpf;
296 u8 ip_csum;
297 u8 l4_csum;
298 u8 ipv6;
f93f160b 299 u8 qnq;
2e588f84 300 u8 pkt_type;
e38b1706 301 u8 ip_frag;
c9c47142 302 u8 tunneled;
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303};
304
6b7c5b94 305struct be_rx_obj {
3abcdeda 306 struct be_adapter *adapter;
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307 struct be_queue_info q;
308 struct be_queue_info cq;
2e588f84 309 struct be_rx_compl_info rxcp;
6b7c5b94 310 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
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311 struct be_rx_stats stats;
312 u8 rss_id;
313 bool rx_post_starved; /* Zero rx frags have been posted to BE */
10ef9ab4 314} ____cacheline_aligned_in_smp;
6b7c5b94 315
609ff3bb 316struct be_drv_stats {
9ae081c6 317 u32 be_on_die_temperature;
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318 u32 eth_red_drops;
319 u32 rx_drops_no_pbuf;
320 u32 rx_drops_no_txpb;
321 u32 rx_drops_no_erx_descr;
322 u32 rx_drops_no_tpre_descr;
323 u32 rx_drops_too_many_frags;
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324 u32 forwarded_packets;
325 u32 rx_drops_mtu;
326 u32 rx_crc_errors;
327 u32 rx_alignment_symbol_errors;
328 u32 rx_pause_frames;
329 u32 rx_priority_pause_frames;
330 u32 rx_control_frames;
331 u32 rx_in_range_errors;
332 u32 rx_out_range_errors;
333 u32 rx_frame_too_long;
18fb06a1 334 u32 rx_address_filtered;
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335 u32 rx_dropped_too_small;
336 u32 rx_dropped_too_short;
337 u32 rx_dropped_header_too_small;
338 u32 rx_dropped_tcp_length;
339 u32 rx_dropped_runt;
340 u32 rx_ip_checksum_errs;
341 u32 rx_tcp_checksum_errs;
342 u32 rx_udp_checksum_errs;
343 u32 tx_pauseframes;
344 u32 tx_priority_pauseframes;
345 u32 tx_controlframes;
346 u32 rxpp_fifo_overflow_drop;
347 u32 rx_input_fifo_overflow_drop;
348 u32 pmem_fifo_overflow_drop;
349 u32 jabber_events;
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350 u32 rx_roce_bytes_lsd;
351 u32 rx_roce_bytes_msd;
352 u32 rx_roce_frames;
353 u32 roce_drops_payload_len;
354 u32 roce_drops_crc;
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355};
356
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357/* A vlan-id of 0xFFFF must be used to clear transparent vlan-tagging */
358#define BE_RESET_VLAN_TAG_ID 0xFFFF
359
64600ea5 360struct be_vf_cfg {
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361 unsigned char mac_addr[ETH_ALEN];
362 int if_handle;
363 int pmac_id;
364 u16 vlan_tag;
365 u32 tx_rate;
bdce2ad7 366 u32 plink_tracking;
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367};
368
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369enum vf_state {
370 ENABLED = 0,
371 ASSIGNED = 1
372};
373
b236916a 374#define BE_FLAGS_LINK_STATUS_INIT 1
f174c7ec 375#define BE_FLAGS_SRIOV_ENABLED (1 << 2)
191eb756 376#define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
d9d604f8 377#define BE_FLAGS_VLAN_PROMISC (1 << 4)
a0794885 378#define BE_FLAGS_MCAST_PROMISC (1 << 5)
04d3d624 379#define BE_FLAGS_NAPI_ENABLED (1 << 9)
bc0c3405 380#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
c9c47142 381#define BE_FLAGS_VXLAN_OFFLOADS (1 << 12)
e1ad8e33 382#define BE_FLAGS_SETUP_DONE (1 << 13)
b236916a 383
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384#define BE_UC_PMAC_COUNT 30
385#define BE_VF_UC_PMAC_COUNT 2
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386/* Ethtool set_dump flags */
387#define LANCER_INITIATE_FW_DUMP 0x1
388
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389struct phy_info {
390 u8 transceiver;
391 u8 autoneg;
392 u8 fc_autoneg;
393 u8 port_type;
394 u16 phy_type;
395 u16 interface_type;
396 u32 misc_params;
397 u16 auto_speeds_supported;
398 u16 fixed_speeds_supported;
399 int link_speed;
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400 u32 dac_cable_len;
401 u32 advertising;
402 u32 supported;
403};
404
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405struct be_resources {
406 u16 max_vfs; /* Total VFs "really" supported by FW/HW */
407 u16 max_mcast_mac;
408 u16 max_tx_qs;
409 u16 max_rss_qs;
410 u16 max_rx_qs;
411 u16 max_uc_mac; /* Max UC MACs programmable */
412 u16 max_vlans; /* Number of vlans supported */
413 u16 max_evt_qs;
414 u32 if_cap_flags;
10cccf60 415 u32 vf_if_cap_flags; /* VF if capability flags */
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416};
417
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418struct rss_info {
419 u64 rss_flags;
420 u8 rsstable[RSS_INDIR_TABLE_LEN];
421 u8 rss_queue[RSS_INDIR_TABLE_LEN];
422 u8 rss_hkey[RSS_HASH_KEY_LEN];
423};
424
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425struct be_adapter {
426 struct pci_dev *pdev;
427 struct net_device *netdev;
428
c5b3ad4c 429 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
8788fdc2 430 u8 __iomem *db; /* Door Bell */
8788fdc2 431
2984961c 432 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
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433 struct be_dma_mem mbox_mem;
434 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
435 * is stored for freeing purpose */
436 struct be_dma_mem mbox_mem_alloced;
437
438 struct be_mcc_obj mcc_obj;
439 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
440 spinlock_t mcc_cq_lock;
6b7c5b94 441
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442 u16 cfg_num_qs; /* configured via set-channels */
443 u16 num_evt_qs;
444 u16 num_msix_vec;
445 struct be_eq_obj eq_obj[MAX_EVT_QS];
10ef9ab4 446 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
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447 bool isr_registered;
448
449 /* TX Rings */
92bf14ab 450 u16 num_tx_qs;
3c8def97 451 struct be_tx_obj tx_obj[MAX_TX_QS];
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452
453 /* Rx rings */
92bf14ab 454 u16 num_rx_qs;
10ef9ab4 455 struct be_rx_obj rx_obj[MAX_RX_QS];
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456 u32 big_page_size; /* Compounded page size shared by rx wrbs */
457
609ff3bb 458 struct be_drv_stats drv_stats;
2632bafd 459 struct be_aic_obj aic_obj[MAX_EVT_QS];
82903e4b 460 u16 vlans_added;
f6cbd364 461 unsigned long vids[BITS_TO_LONGS(VLAN_N_VID)];
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462 u8 vlan_prio_bmap; /* Available Priority BitMap */
463 u16 recommended_prio; /* Recommended Priority */
5b8821b7 464 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
6b7c5b94 465
3abcdeda 466 struct be_dma_mem stats_cmd;
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467 /* Work queue used to perform periodic tasks like getting statistics */
468 struct delayed_work work;
609ff3bb 469 u16 work_counter;
6b7c5b94 470
f67ef7ba 471 struct delayed_work func_recovery_work;
b236916a 472 u32 flags;
f25b119c 473 u32 cmd_privileges;
6b7c5b94 474 /* Ethtool knobs and info */
6b7c5b94 475 char fw_ver[FW_VER_LEN];
eeb65ced 476 char fw_on_flash[FW_VER_LEN];
30128031 477 int if_handle; /* Used to configure filtering */
fbc13f01 478 u32 *pmac_id; /* MAC addr handle used by BE card */
1a642469 479 u32 beacon_state; /* for set_phys_id */
6b7c5b94 480
f67ef7ba 481 bool eeh_error;
6589ade0 482 bool fw_timeout;
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483 bool hw_error;
484
6b7c5b94 485 u32 port_num;
24307eef 486 bool promiscuous;
f93f160b 487 u8 mc_type;
3486be29 488 u32 function_mode;
3abcdeda 489 u32 function_caps;
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490 u32 rx_fc; /* Rx flow control */
491 u32 tx_fc; /* Tx flow control */
b2aebe6d 492 bool stats_cmd_sent;
045508a8 493 struct {
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494 u32 size;
495 u32 total_size;
496 u64 io_addr;
497 } roce_db;
498 u32 num_msix_roce_vec;
499 struct ocrdma_dev *ocrdma_dev;
500 struct list_head entry;
501
dd131e76 502 u32 flash_status;
5eeff635 503 struct completion et_cmd_compl;
ba343c77 504
bec84e6b 505 struct be_resources pool_res; /* resources available for the port */
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506 struct be_resources res; /* resources available for the func */
507 u16 num_vfs; /* Number of VFs provisioned by PF */
39f1d94d 508 u8 virtfn;
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509 struct be_vf_cfg *vf_cfg;
510 bool be3_native;
fe6d2a38 511 u32 sli_family;
9e1453c5 512 u8 hba_port_num;
3968fa1e 513 u16 pvid;
c9c47142 514 __be16 vxlan_port;
42f11cf2 515 struct phy_info phy;
4762f6ce 516 u8 wol_cap;
76a9e08e 517 bool wol_en;
fbc13f01 518 u32 uc_macs; /* Count of secondary UC MAC programmed */
0ad3157e 519 u16 asic_rev;
bc0c3405 520 u16 qnq_vid;
941a77d5 521 u32 msg_enable;
7aeb2156 522 int be_get_temp_freq;
d5c18473 523 u8 pf_number;
e2557877 524 struct rss_info rss_info;
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525};
526
39f1d94d 527#define be_physfn(adapter) (!adapter->virtfn)
2c7a9dc1 528#define be_virtfn(adapter) (adapter->virtfn)
f174c7ec
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529#define sriov_enabled(adapter) (adapter->flags & \
530 BE_FLAGS_SRIOV_ENABLED)
bec84e6b 531
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532#define for_all_vfs(adapter, vf_cfg, i) \
533 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
534 i++, vf_cfg++)
ba343c77 535
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536#define ON 1
537#define OFF 0
ca34fe38 538
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539#define be_max_vlans(adapter) (adapter->res.max_vlans)
540#define be_max_uc(adapter) (adapter->res.max_uc_mac)
541#define be_max_mc(adapter) (adapter->res.max_mcast_mac)
bec84e6b 542#define be_max_vfs(adapter) (adapter->pool_res.max_vfs)
92bf14ab
SP
543#define be_max_rss(adapter) (adapter->res.max_rss_qs)
544#define be_max_txqs(adapter) (adapter->res.max_tx_qs)
545#define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs)
546#define be_max_rxqs(adapter) (adapter->res.max_rx_qs)
547#define be_max_eqs(adapter) (adapter->res.max_evt_qs)
548#define be_if_cap_flags(adapter) (adapter->res.if_cap_flags)
549
550static inline u16 be_max_qs(struct be_adapter *adapter)
551{
552 /* If no RSS, need atleast the one def RXQ */
553 u16 num = max_t(u16, be_max_rss(adapter), 1);
554
555 num = min(num, be_max_eqs(adapter));
556 return min_t(u16, num, num_online_cpus());
557}
558
f93f160b
VV
559/* Is BE in pvid_tagging mode */
560#define be_pvid_tagging_enabled(adapter) (adapter->pvid)
561
562/* Is BE in QNQ multi-channel mode */
66064dbc 563#define be_is_qnq_mode(adapter) (adapter->function_mode & QNQ_MODE)
f93f160b 564
ca34fe38
SP
565#define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
566 adapter->pdev->device == OC_DEVICE_ID4)
fe6d2a38 567
76b73530
PR
568#define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
569 adapter->pdev->device == OC_DEVICE_ID6)
d3bd3a5e 570
ca34fe38
SP
571#define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
572 adapter->pdev->device == OC_DEVICE_ID2)
573
574#define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
575 adapter->pdev->device == OC_DEVICE_ID1)
576
577#define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
d3bd3a5e 578
dbf0f2a7
SP
579#define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
580 (adapter->function_mode & RDMA_ENABLED))
045508a8 581
0fc0b732 582extern const struct ethtool_ops be_ethtool_ops;
6b7c5b94 583
ac6a0c4a 584#define msix_enabled(adapter) (adapter->num_msix_vec > 0)
10ef9ab4
SP
585#define num_irqs(adapter) (msix_enabled(adapter) ? \
586 adapter->num_msix_vec : 1)
587#define tx_stats(txo) (&(txo)->stats)
588#define rx_stats(rxo) (&(rxo)->stats)
6b7c5b94 589
10ef9ab4
SP
590/* The default RXQ is the last RXQ */
591#define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
6b7c5b94 592
3abcdeda
SP
593#define for_all_rx_queues(adapter, rxo, i) \
594 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
595 i++, rxo++)
596
10ef9ab4 597/* Skip the default non-rss queue (last one)*/
3abcdeda 598#define for_all_rss_queues(adapter, rxo, i) \
10ef9ab4 599 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
3abcdeda
SP
600 i++, rxo++)
601
3c8def97
SP
602#define for_all_tx_queues(adapter, txo, i) \
603 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
604 i++, txo++)
605
10ef9ab4
SP
606#define for_all_evt_queues(adapter, eqo, i) \
607 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
608 i++, eqo++)
609
6384a4d0
SP
610#define for_all_rx_queues_on_eq(adapter, eqo, rxo, i) \
611 for (i = eqo->idx, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs;\
612 i += adapter->num_evt_qs, rxo += adapter->num_evt_qs)
613
10ef9ab4
SP
614#define is_mcc_eqo(eqo) (eqo->idx == 0)
615#define mcc_eqo(adapter) (&adapter->eq_obj[0])
616
6b7c5b94
SP
617#define PAGE_SHIFT_4K 12
618#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
619
620/* Returns number of pages spanned by the data starting at the given addr */
621#define PAGES_4K_SPANNED(_address, size) \
622 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
623 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
624
6b7c5b94
SP
625/* Returns bit offset within a DWORD of a bitfield */
626#define AMAP_BIT_OFFSET(_struct, field) \
627 (((size_t)&(((_struct *)0)->field))%32)
628
629/* Returns the bit mask of the field that is NOT shifted into location. */
630static inline u32 amap_mask(u32 bitsize)
631{
632 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
633}
634
635static inline void
636amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
637{
638 u32 *dw = (u32 *) ptr + dw_offset;
639 *dw &= ~(mask << offset);
640 *dw |= (mask & value) << offset;
641}
642
643#define AMAP_SET_BITS(_struct, field, ptr, val) \
644 amap_set(ptr, \
645 offsetof(_struct, field)/32, \
646 amap_mask(sizeof(((_struct *)0)->field)), \
647 AMAP_BIT_OFFSET(_struct, field), \
648 val)
649
650static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
651{
652 u32 *dw = (u32 *) ptr;
653 return mask & (*(dw + dw_offset) >> offset);
654}
655
656#define AMAP_GET_BITS(_struct, field, ptr) \
657 amap_get(ptr, \
658 offsetof(_struct, field)/32, \
659 amap_mask(sizeof(((_struct *)0)->field)), \
660 AMAP_BIT_OFFSET(_struct, field))
661
662#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
663#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
664static inline void swap_dws(void *wrb, int len)
665{
666#ifdef __BIG_ENDIAN
667 u32 *dw = wrb;
668 BUG_ON(len % 4);
669 do {
670 *dw = cpu_to_le32(*dw);
671 dw++;
672 len -= 4;
673 } while (len);
674#endif /* __BIG_ENDIAN */
675}
676
0532d4e3
KA
677#define be_cmd_status(status) (status > 0 ? -EIO : status)
678
6b7c5b94
SP
679static inline u8 is_tcp_pkt(struct sk_buff *skb)
680{
681 u8 val = 0;
682
683 if (ip_hdr(skb)->version == 4)
684 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
685 else if (ip_hdr(skb)->version == 6)
686 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
687
688 return val;
689}
690
691static inline u8 is_udp_pkt(struct sk_buff *skb)
692{
693 u8 val = 0;
694
695 if (ip_hdr(skb)->version == 4)
696 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
697 else if (ip_hdr(skb)->version == 6)
698 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
699
700 return val;
701}
702
93040ae5
SK
703static inline bool is_ipv4_pkt(struct sk_buff *skb)
704{
e8efcec5 705 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
93040ae5
SK
706}
707
6d87f5c3
AK
708static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
709{
710 u32 addr;
711
712 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
713
714 mac[5] = (u8)(addr & 0xFF);
715 mac[4] = (u8)((addr >> 8) & 0xFF);
716 mac[3] = (u8)((addr >> 16) & 0xFF);
7a2414a5
AK
717 /* Use the OUI from the current MAC address */
718 memcpy(mac, adapter->netdev->dev_addr, 3);
6d87f5c3
AK
719}
720
4b972914
AK
721static inline bool be_multi_rxq(const struct be_adapter *adapter)
722{
723 return adapter->num_rx_qs > 1;
724}
725
6589ade0
SP
726static inline bool be_error(struct be_adapter *adapter)
727{
f67ef7ba
PR
728 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
729}
730
d23e946c 731static inline bool be_hw_error(struct be_adapter *adapter)
f67ef7ba
PR
732{
733 return adapter->eeh_error || adapter->hw_error;
734}
735
736static inline void be_clear_all_error(struct be_adapter *adapter)
737{
738 adapter->eeh_error = false;
739 adapter->hw_error = false;
740 adapter->fw_timeout = false;
6589ade0
SP
741}
742
4762f6ce
AK
743static inline bool be_is_wol_excluded(struct be_adapter *adapter)
744{
745 struct pci_dev *pdev = adapter->pdev;
746
747 if (!be_physfn(adapter))
748 return true;
749
750 switch (pdev->subsystem_device) {
751 case OC_SUBSYS_DEVICE_ID1:
752 case OC_SUBSYS_DEVICE_ID2:
753 case OC_SUBSYS_DEVICE_ID3:
754 case OC_SUBSYS_DEVICE_ID4:
755 return true;
756 default:
757 return false;
758 }
759}
760
bc0c3405
AK
761static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
762{
763 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
764}
765
6384a4d0
SP
766#ifdef CONFIG_NET_RX_BUSY_POLL
767static inline bool be_lock_napi(struct be_eq_obj *eqo)
768{
769 bool status = true;
770
771 spin_lock(&eqo->lock); /* BH is already disabled */
772 if (eqo->state & BE_EQ_LOCKED) {
773 WARN_ON(eqo->state & BE_EQ_NAPI);
774 eqo->state |= BE_EQ_NAPI_YIELD;
775 status = false;
776 } else {
777 eqo->state = BE_EQ_NAPI;
778 }
779 spin_unlock(&eqo->lock);
780 return status;
781}
782
783static inline void be_unlock_napi(struct be_eq_obj *eqo)
784{
785 spin_lock(&eqo->lock); /* BH is already disabled */
786
787 WARN_ON(eqo->state & (BE_EQ_POLL | BE_EQ_NAPI_YIELD));
788 eqo->state = BE_EQ_IDLE;
789
790 spin_unlock(&eqo->lock);
791}
792
793static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
794{
795 bool status = true;
796
797 spin_lock_bh(&eqo->lock);
798 if (eqo->state & BE_EQ_LOCKED) {
799 eqo->state |= BE_EQ_POLL_YIELD;
800 status = false;
801 } else {
802 eqo->state |= BE_EQ_POLL;
803 }
804 spin_unlock_bh(&eqo->lock);
805 return status;
806}
807
808static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
809{
810 spin_lock_bh(&eqo->lock);
811
812 WARN_ON(eqo->state & (BE_EQ_NAPI));
813 eqo->state = BE_EQ_IDLE;
814
815 spin_unlock_bh(&eqo->lock);
816}
817
818static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
819{
820 spin_lock_init(&eqo->lock);
821 eqo->state = BE_EQ_IDLE;
822}
823
824static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
825{
826 local_bh_disable();
827
828 /* It's enough to just acquire napi lock on the eqo to stop
829 * be_busy_poll() from processing any queueus.
830 */
831 while (!be_lock_napi(eqo))
832 mdelay(1);
833
834 local_bh_enable();
835}
836
837#else /* CONFIG_NET_RX_BUSY_POLL */
838
839static inline bool be_lock_napi(struct be_eq_obj *eqo)
840{
841 return true;
842}
843
844static inline void be_unlock_napi(struct be_eq_obj *eqo)
845{
846}
847
848static inline bool be_lock_busy_poll(struct be_eq_obj *eqo)
849{
850 return false;
851}
852
853static inline void be_unlock_busy_poll(struct be_eq_obj *eqo)
854{
855}
856
857static inline void be_enable_busy_poll(struct be_eq_obj *eqo)
858{
859}
860
861static inline void be_disable_busy_poll(struct be_eq_obj *eqo)
862{
863}
864#endif /* CONFIG_NET_RX_BUSY_POLL */
865
31886e87
JP
866void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
867 u16 num_popped);
868void be_link_status_update(struct be_adapter *adapter, u8 link_status);
869void be_parse_stats(struct be_adapter *adapter);
870int be_load_fw(struct be_adapter *adapter, u8 *func);
871bool be_is_wol_supported(struct be_adapter *adapter);
872bool be_pause_supported(struct be_adapter *adapter);
873u32 be_get_fw_log_level(struct be_adapter *adapter);
394efd19 874
e9e2a904
SK
875static inline int fw_major_num(const char *fw_ver)
876{
877 int fw_major = 0;
878
879 sscanf(fw_ver, "%d.", &fw_major);
880
881 return fw_major;
882}
883
68d7bdcb
SP
884int be_update_queues(struct be_adapter *adapter);
885int be_poll(struct napi_struct *napi, int budget);
941a77d5 886
045508a8
PP
887/*
888 * internal function to initialize-cleanup roce device.
889 */
31886e87
JP
890void be_roce_dev_add(struct be_adapter *);
891void be_roce_dev_remove(struct be_adapter *);
045508a8
PP
892
893/*
894 * internal function to open-close roce device during ifup-ifdown.
895 */
31886e87
JP
896void be_roce_dev_open(struct be_adapter *);
897void be_roce_dev_close(struct be_adapter *);
045508a8 898
6b7c5b94 899#endif /* BE_H */
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