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Merge remote-tracking branch 'asoc/topic/tlv320aic32x4' into asoc-next
[deliverable/linux.git] / drivers / net / ethernet / freescale / gianfar_ethtool.c
CommitLineData
1da177e4 1/*
3396c782 2 * drivers/net/ethernet/freescale/gianfar_ethtool.c
1da177e4
LT		 3 *
4 * Gianfar Ethernet Driver
5 * Ethtool support for Gianfar Enet
6 * Based on e1000 ethtool support
7 *
8 * Author: Andy Fleming
4c8d3d99 9 * Maintainer: Kumar Gala
a12f801d 10 * Modifier: Sandeep Gopalpet <sandeep.kumar@freescale.com>
1da177e4 11 *
6c43e046 12 * Copyright 2003-2006, 2008-2009, 2011 Freescale Semiconductor, Inc.
1da177e4 13 *
6aa20a22
JG		 14 * This software may be used and distributed according to
15 * the terms of the GNU Public License, Version 2, incorporated herein
1da177e4
LT		 16 * by reference.
17 */
18
59deab26
JP		 19#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
20
1da177e4 21#include <linux/kernel.h>
1da177e4
LT		 22#include <linux/string.h>
23#include <linux/errno.h>
1da177e4 24#include <linux/interrupt.h>
1da177e4
LT		 25#include <linux/delay.h>
26#include <linux/netdevice.h>
27#include <linux/etherdevice.h>
65a85a8d 28#include <linux/net_tstamp.h>
1da177e4
LT		 29#include <linux/skbuff.h>
30#include <linux/spinlock.h>
31#include <linux/mm.h>
32
33#include <asm/io.h>
34#include <asm/irq.h>
35#include <asm/uaccess.h>
36#include <linux/module.h>
1da177e4
LT		 37#include <linux/crc32.h>
38#include <asm/types.h>
1da177e4 39#include <linux/ethtool.h>
bb40dcbb
AF		 40#include <linux/mii.h>
41#include <linux/phy.h>
4aa3a715 42#include <linux/sort.h>
380b153c 43#include <linux/if_vlan.h>
1da177e4
LT		 44
45#include "gianfar.h"
46
bb40dcbb
AF		 47#define GFAR_MAX_COAL_USECS 0xffff
48#define GFAR_MAX_COAL_FRAMES 0xff
0bbaf069 49static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
cbfc6071 50 u64 *buf);
0bbaf069 51static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf);
cbfc6071
JC		 52static int gfar_gcoalesce(struct net_device *dev,
53 struct ethtool_coalesce *cvals);
54static int gfar_scoalesce(struct net_device *dev,
55 struct ethtool_coalesce *cvals);
56static void gfar_gringparam(struct net_device *dev,
57 struct ethtool_ringparam *rvals);
58static int gfar_sringparam(struct net_device *dev,
59 struct ethtool_ringparam *rvals);
60static void gfar_gdrvinfo(struct net_device *dev,
61 struct ethtool_drvinfo *drvinfo);
1da177e4 62
30f7e310 63static const char stat_gstrings[][ETH_GSTRING_LEN] = {
76f31e8b
CM		 64 /* extra stats */
65 "rx-allocation-errors",
1da177e4
LT		 66 "rx-large-frame-errors",
67 "rx-short-frame-errors",
68 "rx-non-octet-errors",
69 "rx-crc-errors",
70 "rx-overrun-errors",
71 "rx-busy-errors",
72 "rx-babbling-errors",
73 "rx-truncated-frames",
74 "ethernet-bus-error",
75 "tx-babbling-errors",
76 "tx-underrun-errors",
1da177e4 77 "tx-timeout-errors",
76f31e8b 78 /* rmon stats */
1da177e4
LT		 79 "tx-rx-64-frames",
80 "tx-rx-65-127-frames",
81 "tx-rx-128-255-frames",
82 "tx-rx-256-511-frames",
83 "tx-rx-512-1023-frames",
84 "tx-rx-1024-1518-frames",
85 "tx-rx-1519-1522-good-vlan",
86 "rx-bytes",
87 "rx-packets",
88 "rx-fcs-errors",
89 "receive-multicast-packet",
90 "receive-broadcast-packet",
91 "rx-control-frame-packets",
92 "rx-pause-frame-packets",
93 "rx-unknown-op-code",
94 "rx-alignment-error",
95 "rx-frame-length-error",
96 "rx-code-error",
97 "rx-carrier-sense-error",
98 "rx-undersize-packets",
99 "rx-oversize-packets",
100 "rx-fragmented-frames",
101 "rx-jabber-frames",
102 "rx-dropped-frames",
103 "tx-byte-counter",
104 "tx-packets",
105 "tx-multicast-packets",
106 "tx-broadcast-packets",
107 "tx-pause-control-frames",
108 "tx-deferral-packets",
109 "tx-excessive-deferral-packets",
110 "tx-single-collision-packets",
111 "tx-multiple-collision-packets",
112 "tx-late-collision-packets",
113 "tx-excessive-collision-packets",
114 "tx-total-collision",
115 "reserved",
116 "tx-dropped-frames",
117 "tx-jabber-frames",
118 "tx-fcs-errors",
119 "tx-control-frames",
120 "tx-oversize-frames",
121 "tx-undersize-frames",
122 "tx-fragmented-frames",
123};
124
0bbaf069
KG		 125/* Fill in a buffer with the strings which correspond to the
126 * stats */
127static void gfar_gstrings(struct net_device *dev, u32 stringset, u8 * buf)
128{
129 struct gfar_private *priv = netdev_priv(dev);
7f7f5316 130
b31a1d8b 131 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
0bbaf069
KG		 132 memcpy(buf, stat_gstrings, GFAR_STATS_LEN * ETH_GSTRING_LEN);
133 else
134 memcpy(buf, stat_gstrings,
cbfc6071 135 GFAR_EXTRA_STATS_LEN * ETH_GSTRING_LEN);
0bbaf069
KG		 136}
137
1da177e4
LT		 138/* Fill in an array of 64-bit statistics from various sources.
139 * This array will be appended to the end of the ethtool_stats
140 * structure, and returned to user space
141 */
cbfc6071
JC		 142static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
143 u64 *buf)
1da177e4
LT		 144{
145 int i;
146 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 147 struct gfar __iomem *regs = priv->gfargrp[0].regs;
212079df 148 atomic64_t *extra = (atomic64_t *)&priv->extra_stats;
1da177e4 149
68719786 150 for (i = 0; i < GFAR_EXTRA_STATS_LEN; i++)
212079df 151 buf[i] = atomic64_read(&extra[i]);
68719786 152
b31a1d8b 153 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
f4983704 154 u32 __iomem *rmon = (u32 __iomem *) &regs->rmon;
1da177e4 155
68719786
PG		 156 for (; i < GFAR_STATS_LEN; i++, rmon++)
157 buf[i] = (u64) gfar_read(rmon);
158 }
1da177e4
LT		 159}
160
b9f2c044 161static int gfar_sset_count(struct net_device *dev, int sset)
1da177e4 162{
1da177e4 163 struct gfar_private *priv = netdev_priv(dev);
1da177e4 164
b9f2c044
JG		 165 switch (sset) {
166 case ETH_SS_STATS:
b31a1d8b 167 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON)
b9f2c044
JG		 168 return GFAR_STATS_LEN;
169 else
170 return GFAR_EXTRA_STATS_LEN;
171 default:
172 return -EOPNOTSUPP;
173 }
1da177e4
LT		 174}
175
1da177e4 176/* Fills in the drvinfo structure with some basic info */
cbfc6071
JC		 177static void gfar_gdrvinfo(struct net_device *dev,
178 struct ethtool_drvinfo *drvinfo)
1da177e4 179{
7826d43f
JP		 180 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
181 strlcpy(drvinfo->version, gfar_driver_version,
182 sizeof(drvinfo->version));
183 strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
184 strlcpy(drvinfo->bus_info, "N/A", sizeof(drvinfo->bus_info));
1da177e4
LT		 185}
186
bb40dcbb
AF		 187
188static int gfar_ssettings(struct net_device *dev, struct ethtool_cmd *cmd)
189{
190 struct gfar_private *priv = netdev_priv(dev);
191 struct phy_device *phydev = priv->phydev;
192
193 if (NULL == phydev)
194 return -ENODEV;
195
196 return phy_ethtool_sset(phydev, cmd);
197}
198
199
1da177e4 200/* Return the current settings in the ethtool_cmd structure */
0bbaf069 201static int gfar_gsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1da177e4
LT		 202{
203 struct gfar_private *priv = netdev_priv(dev);
bb40dcbb 204 struct phy_device *phydev = priv->phydev;
a12f801d
SG		 205 struct gfar_priv_rx_q *rx_queue = NULL;
206 struct gfar_priv_tx_q *tx_queue = NULL;
bb40dcbb
AF		 207
208 if (NULL == phydev)
209 return -ENODEV;
fba4ed03
SG		 210 tx_queue = priv->tx_queue[0];
211 rx_queue = priv->rx_queue[0];
6aa20a22 212
fba4ed03
SG		 213 /* etsec-1.7 and older versions have only one txic
214 * and rxic regs although they support multiple queues */
a12f801d
SG		 215 cmd->maxtxpkt = get_icft_value(tx_queue->txic);
216 cmd->maxrxpkt = get_icft_value(rx_queue->rxic);
1da177e4 217
bb40dcbb 218 return phy_ethtool_gset(phydev, cmd);
1da177e4
LT		 219}
220
221/* Return the length of the register structure */
0bbaf069 222static int gfar_reglen(struct net_device *dev)
1da177e4
LT		 223{
224 return sizeof (struct gfar);
225}
226
227/* Return a dump of the GFAR register space */
cbfc6071
JC		 228static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs,
229 void *regbuf)
1da177e4
LT		 230{
231 int i;
232 struct gfar_private *priv = netdev_priv(dev);
46ceb60c 233 u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp[0].regs;
1da177e4
LT		 234 u32 *buf = (u32 *) regbuf;
235
236 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++)
cc8c6e37 237 buf[i] = gfar_read(&theregs[i]);
1da177e4
LT		 238}
239
1da177e4
LT		 240/* Convert microseconds to ethernet clock ticks, which changes
241 * depending on what speed the controller is running at */
cbfc6071
JC		 242static unsigned int gfar_usecs2ticks(struct gfar_private *priv,
243 unsigned int usecs)
1da177e4
LT		 244{
245 unsigned int count;
246
247 /* The timer is different, depending on the interface speed */
bb40dcbb
AF		 248 switch (priv->phydev->speed) {
249 case SPEED_1000:
1da177e4
LT		 250 count = GFAR_GBIT_TIME;
251 break;
bb40dcbb 252 case SPEED_100:
1da177e4
LT		 253 count = GFAR_100_TIME;
254 break;
bb40dcbb 255 case SPEED_10:
1da177e4
LT		 256 default:
257 count = GFAR_10_TIME;
258 break;
259 }
260
261 /* Make sure we return a number greater than 0
262 * if usecs > 0 */
807540ba 263 return (usecs * 1000 + count - 1) / count;
1da177e4
LT		 264}
265
266/* Convert ethernet clock ticks to microseconds */
cbfc6071
JC		 267static unsigned int gfar_ticks2usecs(struct gfar_private *priv,
268 unsigned int ticks)
1da177e4
LT		 269{
270 unsigned int count;
271
272 /* The timer is different, depending on the interface speed */
bb40dcbb
AF		 273 switch (priv->phydev->speed) {
274 case SPEED_1000:
1da177e4
LT		 275 count = GFAR_GBIT_TIME;
276 break;
bb40dcbb 277 case SPEED_100:
1da177e4
LT		 278 count = GFAR_100_TIME;
279 break;
bb40dcbb 280 case SPEED_10:
1da177e4
LT		 281 default:
282 count = GFAR_10_TIME;
283 break;
284 }
285
286 /* Make sure we return a number greater than 0 */
287 /* if ticks is > 0 */
807540ba 288 return (ticks * count) / 1000;
1da177e4
LT		 289}
290
291/* Get the coalescing parameters, and put them in the cvals
292 * structure. */
cbfc6071
JC		 293static int gfar_gcoalesce(struct net_device *dev,
294 struct ethtool_coalesce *cvals)
1da177e4
LT		 295{
296 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 297 struct gfar_priv_rx_q *rx_queue = NULL;
298 struct gfar_priv_tx_q *tx_queue = NULL;
b46a8454
DH		 299 unsigned long rxtime;
300 unsigned long rxcount;
301 unsigned long txtime;
302 unsigned long txcount;
6aa20a22 303
b31a1d8b 304 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069 305 return -EOPNOTSUPP;
1da177e4 306
bb40dcbb
AF		 307 if (NULL == priv->phydev)
308 return -ENODEV;
309
fba4ed03
SG		 310 rx_queue = priv->rx_queue[0];
311 tx_queue = priv->tx_queue[0];
a12f801d
SG		 312
313 rxtime = get_ictt_value(rx_queue->rxic);
314 rxcount = get_icft_value(rx_queue->rxic);
315 txtime = get_ictt_value(tx_queue->txic);
316 txcount = get_icft_value(tx_queue->txic);
b46a8454
DH		 317 cvals->rx_coalesce_usecs = gfar_ticks2usecs(priv, rxtime);
318 cvals->rx_max_coalesced_frames = rxcount;
1da177e4 319
b46a8454
DH		 320 cvals->tx_coalesce_usecs = gfar_ticks2usecs(priv, txtime);
321 cvals->tx_max_coalesced_frames = txcount;
1da177e4
LT		 322
323 cvals->use_adaptive_rx_coalesce = 0;
324 cvals->use_adaptive_tx_coalesce = 0;
325
326 cvals->pkt_rate_low = 0;
327 cvals->rx_coalesce_usecs_low = 0;
328 cvals->rx_max_coalesced_frames_low = 0;
329 cvals->tx_coalesce_usecs_low = 0;
330 cvals->tx_max_coalesced_frames_low = 0;
331
332 /* When the packet rate is below pkt_rate_high but above
333 * pkt_rate_low (both measured in packets per second) the
334 * normal {rx,tx}_* coalescing parameters are used.
335 */
336
337 /* When the packet rate is (measured in packets per second)
338 * is above pkt_rate_high, the {rx,tx}_*_high parameters are
339 * used.
340 */
341 cvals->pkt_rate_high = 0;
342 cvals->rx_coalesce_usecs_high = 0;
343 cvals->rx_max_coalesced_frames_high = 0;
344 cvals->tx_coalesce_usecs_high = 0;
345 cvals->tx_max_coalesced_frames_high = 0;
346
347 /* How often to do adaptive coalescing packet rate sampling,
348 * measured in seconds. Must not be zero.
349 */
350 cvals->rate_sample_interval = 0;
351
352 return 0;
353}
354
355/* Change the coalescing values.
356 * Both cvals->*_usecs and cvals->*_frames have to be > 0
357 * in order for coalescing to be active
358 */
cbfc6071
JC		 359static int gfar_scoalesce(struct net_device *dev,
360 struct ethtool_coalesce *cvals)
1da177e4
LT		 361{
362 struct gfar_private *priv = netdev_priv(dev);
f19015ba 363 int i, err = 0;
1da177e4 364
b31a1d8b 365 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_COALESCE))
0bbaf069
KG		 366 return -EOPNOTSUPP;
367
bb40dcbb
AF		 368 if (NULL == priv->phydev)
369 return -ENODEV;
370
371 /* Check the bounds of the values */
372 if (cvals->rx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
375d6a1b
JP		 373 netdev_info(dev, "Coalescing is limited to %d microseconds\n",
374 GFAR_MAX_COAL_USECS);
bb40dcbb
AF		 375 return -EINVAL;
376 }
377
378 if (cvals->rx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
375d6a1b
JP		 379 netdev_info(dev, "Coalescing is limited to %d frames\n",
380 GFAR_MAX_COAL_FRAMES);
bb40dcbb
AF		 381 return -EINVAL;
382 }
383
f19015ba
CM		 384 /* Check the bounds of the values */
385 if (cvals->tx_coalesce_usecs > GFAR_MAX_COAL_USECS) {
386 netdev_info(dev, "Coalescing is limited to %d microseconds\n",
387 GFAR_MAX_COAL_USECS);
388 return -EINVAL;
389 }
390
391 if (cvals->tx_max_coalesced_frames > GFAR_MAX_COAL_FRAMES) {
392 netdev_info(dev, "Coalescing is limited to %d frames\n",
393 GFAR_MAX_COAL_FRAMES);
394 return -EINVAL;
395 }
396
397 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
398 cpu_relax();
399
400 /* Set up rx coalescing */
401 if ((cvals->rx_coalesce_usecs == 0) ||
402 (cvals->rx_max_coalesced_frames == 0)) {
403 for (i = 0; i < priv->num_rx_queues; i++)
404 priv->rx_queue[i]->rxcoalescing = 0;
405 } else {
406 for (i = 0; i < priv->num_rx_queues; i++)
407 priv->rx_queue[i]->rxcoalescing = 1;
408 }
409
46ceb60c
SG		 410 for (i = 0; i < priv->num_rx_queues; i++) {
411 priv->rx_queue[i]->rxic = mk_ic_value(
412 cvals->rx_max_coalesced_frames,
413 gfar_usecs2ticks(priv, cvals->rx_coalesce_usecs));
414 }
1da177e4
LT		 415
416 /* Set up tx coalescing */
417 if ((cvals->tx_coalesce_usecs == 0) ||
46ceb60c
SG		 418 (cvals->tx_max_coalesced_frames == 0)) {
419 for (i = 0; i < priv->num_tx_queues; i++)
420 priv->tx_queue[i]->txcoalescing = 0;
421 } else {
422 for (i = 0; i < priv->num_tx_queues; i++)
423 priv->tx_queue[i]->txcoalescing = 1;
424 }
1da177e4 425
46ceb60c
SG		 426 for (i = 0; i < priv->num_tx_queues; i++) {
427 priv->tx_queue[i]->txic = mk_ic_value(
428 cvals->tx_max_coalesced_frames,
429 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs));
430 }
1da177e4 431
f19015ba
CM		 432 if (dev->flags & IFF_UP) {
433 stop_gfar(dev);
434 err = startup_gfar(dev);
435 } else {
436 gfar_mac_reset(priv);
437 }
438
439 clear_bit_unlock(GFAR_RESETTING, &priv->state);
1da177e4 440
f19015ba 441 return err;
1da177e4
LT		 442}
443
444/* Fills in rvals with the current ring parameters. Currently,
445 * rx, rx_mini, and rx_jumbo rings are the same size, as mini and
446 * jumbo are ignored by the driver */
cbfc6071
JC		 447static void gfar_gringparam(struct net_device *dev,
448 struct ethtool_ringparam *rvals)
1da177e4
LT		 449{
450 struct gfar_private *priv = netdev_priv(dev);
a12f801d
SG		 451 struct gfar_priv_tx_q *tx_queue = NULL;
452 struct gfar_priv_rx_q *rx_queue = NULL;
453
fba4ed03
SG		 454 tx_queue = priv->tx_queue[0];
455 rx_queue = priv->rx_queue[0];
1da177e4
LT		 456
457 rvals->rx_max_pending = GFAR_RX_MAX_RING_SIZE;
458 rvals->rx_mini_max_pending = GFAR_RX_MAX_RING_SIZE;
459 rvals->rx_jumbo_max_pending = GFAR_RX_MAX_RING_SIZE;
460 rvals->tx_max_pending = GFAR_TX_MAX_RING_SIZE;
461
462 /* Values changeable by the user. The valid values are
463 * in the range 1 to the "*_max_pending" counterpart above.
464 */
a12f801d
SG		 465 rvals->rx_pending = rx_queue->rx_ring_size;
466 rvals->rx_mini_pending = rx_queue->rx_ring_size;
467 rvals->rx_jumbo_pending = rx_queue->rx_ring_size;
468 rvals->tx_pending = tx_queue->tx_ring_size;
1da177e4
LT		 469}
470
471/* Change the current ring parameters, stopping the controller if
7cca336a 472 * necessary so that we don't mess things up while we're in motion.
cbfc6071
JC		 473 */
474static int gfar_sringparam(struct net_device *dev,
475 struct ethtool_ringparam *rvals)
1da177e4 476{
1da177e4 477 struct gfar_private *priv = netdev_priv(dev);
7cca336a 478 int err = 0, i;
1da177e4
LT		 479
480 if (rvals->rx_pending > GFAR_RX_MAX_RING_SIZE)
481 return -EINVAL;
482
483 if (!is_power_of_2(rvals->rx_pending)) {
59deab26 484 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 485 return -EINVAL;
486 }
487
488 if (rvals->tx_pending > GFAR_TX_MAX_RING_SIZE)
489 return -EINVAL;
490
491 if (!is_power_of_2(rvals->tx_pending)) {
59deab26 492 netdev_err(dev, "Ring sizes must be a power of 2\n");
1da177e4
LT		 493 return -EINVAL;
494 }
495
0851133b
CM		 496 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
497 cpu_relax();
498
7cca336a 499 if (dev->flags & IFF_UP)
0bbaf069 500 stop_gfar(dev);
1da177e4 501
7cca336a
CM		 502 /* Change the sizes */
503 for (i = 0; i < priv->num_rx_queues; i++)
fba4ed03 504 priv->rx_queue[i]->rx_ring_size = rvals->rx_pending;
7cca336a
CM		 505
506 for (i = 0; i < priv->num_tx_queues; i++)
fba4ed03 507 priv->tx_queue[i]->tx_ring_size = rvals->tx_pending;
1da177e4 508
0bbaf069 509 /* Rebuild the rings with the new size */
0851133b 510 if (dev->flags & IFF_UP)
0bbaf069 511 err = startup_gfar(dev);
0851133b
CM		 512
513 clear_bit_unlock(GFAR_RESETTING, &priv->state);
514
0bbaf069
KG		 515 return err;
516}
1da177e4 517
23402bdd
CM		 518static void gfar_gpauseparam(struct net_device *dev,
519 struct ethtool_pauseparam *epause)
520{
521 struct gfar_private *priv = netdev_priv(dev);
522
523 epause->autoneg = !!priv->pause_aneg_en;
524 epause->rx_pause = !!priv->rx_pause_en;
525 epause->tx_pause = !!priv->tx_pause_en;
526}
527
528static int gfar_spauseparam(struct net_device *dev,
529 struct ethtool_pauseparam *epause)
530{
531 struct gfar_private *priv = netdev_priv(dev);
532 struct phy_device *phydev = priv->phydev;
533 struct gfar __iomem *regs = priv->gfargrp[0].regs;
534 u32 oldadv, newadv;
535
98a46d46
CM		 536 if (!phydev)
537 return -ENODEV;
538
23402bdd
CM		 539 if (!(phydev->supported & SUPPORTED_Pause) ||
540 (!(phydev->supported & SUPPORTED_Asym_Pause) &&
541 (epause->rx_pause != epause->tx_pause)))
542 return -EINVAL;
543
544 priv->rx_pause_en = priv->tx_pause_en = 0;
545 if (epause->rx_pause) {
546 priv->rx_pause_en = 1;
547
548 if (epause->tx_pause) {
549 priv->tx_pause_en = 1;
550 /* FLOW_CTRL_RX & TX */
551 newadv = ADVERTISED_Pause;
552 } else /* FLOW_CTLR_RX */
553 newadv = ADVERTISED_Pause | ADVERTISED_Asym_Pause;
554 } else if (epause->tx_pause) {
555 priv->tx_pause_en = 1;
556 /* FLOW_CTLR_TX */
557 newadv = ADVERTISED_Asym_Pause;
558 } else
559 newadv = 0;
560
561 if (epause->autoneg)
562 priv->pause_aneg_en = 1;
563 else
564 priv->pause_aneg_en = 0;
565
566 oldadv = phydev->advertising &
567 (ADVERTISED_Pause | ADVERTISED_Asym_Pause);
568 if (oldadv != newadv) {
569 phydev->advertising &=
570 ~(ADVERTISED_Pause | ADVERTISED_Asym_Pause);
571 phydev->advertising |= newadv;
572 if (phydev->autoneg)
573 /* inform link partner of our
574 * new flow ctrl settings
575 */
576 return phy_start_aneg(phydev);
577
578 if (!epause->autoneg) {
579 u32 tempval;
580 tempval = gfar_read(&regs->maccfg1);
581 tempval &= ~(MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
45b679c9
MP		 582
583 priv->tx_actual_en = 0;
584 if (priv->tx_pause_en) {
585 priv->tx_actual_en = 1;
23402bdd 586 tempval |= MACCFG1_TX_FLOW;
45b679c9
MP		 587 }
588
23402bdd
CM		 589 if (priv->rx_pause_en)
590 tempval |= MACCFG1_RX_FLOW;
591 gfar_write(&regs->maccfg1, tempval);
592 }
593 }
594
595 return 0;
596}
597
c8f44aff 598int gfar_set_features(struct net_device *dev, netdev_features_t features)
0bbaf069 599{
c8f44aff 600 netdev_features_t changed = dev->features ^ features;
0851133b 601 struct gfar_private *priv = netdev_priv(dev);
7cca336a 602 int err = 0;
1da177e4 603
88302648
CM		 604 if (!(changed & (NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
605 NETIF_F_RXCSUM)))
8b3afe95 606 return 0;
a12f801d 607
0851133b
CM		 608 while (test_and_set_bit_lock(GFAR_RESETTING, &priv->state))
609 cpu_relax();
610
88302648
CM		 611 dev->features = features;
612
0bbaf069 613 if (dev->flags & IFF_UP) {
0bbaf069 614 /* Now we take down the rings to rebuild them */
1da177e4 615 stop_gfar(dev);
1da177e4 616 err = startup_gfar(dev);
0851133b
CM		 617 } else {
618 gfar_mac_reset(priv);
12dea57b 619 }
0851133b
CM		 620
621 clear_bit_unlock(GFAR_RESETTING, &priv->state);
622
1da177e4
LT		 623 return err;
624}
625
0bbaf069 626static uint32_t gfar_get_msglevel(struct net_device *dev)
6aa20a22 627{
0bbaf069 628 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 629
0bbaf069 630 return priv->msg_enable;
6aa20a22
JG		 631}
632
0bbaf069 633static void gfar_set_msglevel(struct net_device *dev, uint32_t data)
6aa20a22 634{
0bbaf069 635 struct gfar_private *priv = netdev_priv(dev);
cbfc6071 636
0bbaf069
KG		 637 priv->msg_enable = data;
638}
639
d87eb127
SW		 640#ifdef CONFIG_PM
641static void gfar_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
642{
643 struct gfar_private *priv = netdev_priv(dev);
644
3e905b80
CM		 645 wol->supported = 0;
646 wol->wolopts = 0;
647
648 if (priv->wol_supported & GFAR_WOL_MAGIC)
649 wol->supported |= WAKE_MAGIC;
650
651 if (priv->wol_supported & GFAR_WOL_FILER_UCAST)
652 wol->supported |= WAKE_UCAST;
653
654 if (priv->wol_opts & GFAR_WOL_MAGIC)
655 wol->wolopts |= WAKE_MAGIC;
656
657 if (priv->wol_opts & GFAR_WOL_FILER_UCAST)
658 wol->wolopts |= WAKE_UCAST;
d87eb127
SW		 659}
660
661static int gfar_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
662{
663 struct gfar_private *priv = netdev_priv(dev);
3e905b80
CM		 664 u16 wol_opts = 0;
665 int err;
d87eb127 666
3e905b80 667 if (!priv->wol_supported && wol->wolopts)
d87eb127
SW		 668 return -EINVAL;
669
3e905b80 670 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_UCAST))
d87eb127
SW		 671 return -EINVAL;
672
3e905b80
CM		 673 if (wol->wolopts & WAKE_MAGIC) {
674 wol_opts |= GFAR_WOL_MAGIC;
675 } else {
676 if (wol->wolopts & WAKE_UCAST)
677 wol_opts |= GFAR_WOL_FILER_UCAST;
678 }
679
680 wol_opts &= priv->wol_supported;
681 priv->wol_opts = 0;
682
683 err = device_set_wakeup_enable(priv->dev, wol_opts);
684 if (err)
685 return err;
6c4f1994 686
3e905b80 687 priv->wol_opts = wol_opts;
d87eb127
SW		 688
689 return 0;
690}
691#endif
0bbaf069 692
7a8b3372
SG		 693static void ethflow_to_filer_rules (struct gfar_private *priv, u64 ethflow)
694{
695 u32 fcr = 0x0, fpr = FPR_FILER_MASK;
696
697 if (ethflow & RXH_L2DA) {
5188f7e5 698 fcr = RQFCR_PID_DAH | RQFCR_CMP_NOMATCH |
cbfc6071 699 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 700 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
701 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 702 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
703 priv->cur_filer_idx = priv->cur_filer_idx - 1;
704
5188f7e5 705 fcr = RQFCR_PID_DAL | RQFCR_CMP_NOMATCH |
cbfc6071 706 RQFCR_HASH | RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 707 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
708 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 709 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
710 priv->cur_filer_idx = priv->cur_filer_idx - 1;
711 }
712
713 if (ethflow & RXH_VLAN) {
714 fcr = RQFCR_PID_VID | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 715 RQFCR_AND | RQFCR_HASHTBL_0;
7a8b3372 716 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
6c43e046
WJB		 717 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
718 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 719 priv->cur_filer_idx = priv->cur_filer_idx - 1;
720 }
721
722 if (ethflow & RXH_IP_SRC) {
723 fcr = RQFCR_PID_SIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 724 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 725 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
726 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 727 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
728 priv->cur_filer_idx = priv->cur_filer_idx - 1;
729 }
730
731 if (ethflow & (RXH_IP_DST)) {
732 fcr = RQFCR_PID_DIA | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 733 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 734 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
735 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 736 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
737 priv->cur_filer_idx = priv->cur_filer_idx - 1;
738 }
739
740 if (ethflow & RXH_L3_PROTO) {
741 fcr = RQFCR_PID_L4P | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 742 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 743 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
744 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 745 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
746 priv->cur_filer_idx = priv->cur_filer_idx - 1;
747 }
748
749 if (ethflow & RXH_L4_B_0_1) {
750 fcr = RQFCR_PID_SPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 751 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 752 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
753 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 754 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
755 priv->cur_filer_idx = priv->cur_filer_idx - 1;
756 }
757
758 if (ethflow & RXH_L4_B_2_3) {
759 fcr = RQFCR_PID_DPT | RQFCR_CMP_NOMATCH | RQFCR_HASH |
cbfc6071 760 RQFCR_AND | RQFCR_HASHTBL_0;
6c43e046
WJB		 761 priv->ftp_rqfpr[priv->cur_filer_idx] = fpr;
762 priv->ftp_rqfcr[priv->cur_filer_idx] = fcr;
7a8b3372
SG		 763 gfar_write_filer(priv, priv->cur_filer_idx, fcr, fpr);
764 priv->cur_filer_idx = priv->cur_filer_idx - 1;
765 }
766}
767
cbfc6071
JC		 768static int gfar_ethflow_to_filer_table(struct gfar_private *priv, u64 ethflow,
769 u64 class)
7a8b3372
SG		 770{
771 unsigned int last_rule_idx = priv->cur_filer_idx;
772 unsigned int cmp_rqfpr;
588dc911
WS		 773 unsigned int *local_rqfpr;
774 unsigned int *local_rqfcr;
7a8b3372
SG		 775 int i = 0x0, k = 0x0;
776 int j = MAX_FILER_IDX, l = 0x0;
588dc911
WS		 777 int ret = 1;
778
b2adaca9
JP		 779 local_rqfpr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int),
780 GFP_KERNEL);
781 local_rqfcr = kmalloc_array(MAX_FILER_IDX + 1, sizeof(unsigned int),
782 GFP_KERNEL);
588dc911 783 if (!local_rqfpr || !local_rqfcr) {
588dc911
WS		 784 ret = 0;
785 goto err;
786 }
7a8b3372
SG		 787
788 switch (class) {
789 case TCP_V4_FLOW:
790 cmp_rqfpr = RQFPR_IPV4 |RQFPR_TCP;
791 break;
792 case UDP_V4_FLOW:
793 cmp_rqfpr = RQFPR_IPV4 |RQFPR_UDP;
794 break;
795 case TCP_V6_FLOW:
796 cmp_rqfpr = RQFPR_IPV6 |RQFPR_TCP;
797 break;
798 case UDP_V6_FLOW:
799 cmp_rqfpr = RQFPR_IPV6 |RQFPR_UDP;
800 break;
7a8b3372 801 default:
375d6a1b
JP		 802 netdev_err(priv->ndev,
803 "Right now this class is not supported\n");
588dc911
WS		 804 ret = 0;
805 goto err;
7a8b3372
SG		 806 }
807
808 for (i = 0; i < MAX_FILER_IDX + 1; i++) {
6c43e046
WJB		 809 local_rqfpr[j] = priv->ftp_rqfpr[i];
810 local_rqfcr[j] = priv->ftp_rqfcr[i];
7a8b3372 811 j--;
cbfc6071
JC		 812 if ((priv->ftp_rqfcr[i] ==
813 (RQFCR_PID_PARSE | RQFCR_CLE | RQFCR_AND)) &&
814 (priv->ftp_rqfpr[i] == cmp_rqfpr))
7a8b3372
SG		 815 break;
816 }
817
818 if (i == MAX_FILER_IDX + 1) {
375d6a1b
JP		 819 netdev_err(priv->ndev,
820 "No parse rule found, can't create hash rules\n");
588dc911
WS		 821 ret = 0;
822 goto err;
7a8b3372
SG		 823 }
824
825 /* If a match was found, then it begins the starting of a cluster rule
826 * if it was already programmed, we need to overwrite these rules
827 */
828 for (l = i+1; l < MAX_FILER_IDX; l++) {
6c43e046 829 if ((priv->ftp_rqfcr[l] & RQFCR_CLE) &&
cbfc6071 830 !(priv->ftp_rqfcr[l] & RQFCR_AND)) {
6c43e046 831 priv->ftp_rqfcr[l] = RQFCR_CLE | RQFCR_CMP_EXACT |
cbfc6071 832 RQFCR_HASHTBL_0 | RQFCR_PID_MASK;
6c43e046
WJB		 833 priv->ftp_rqfpr[l] = FPR_FILER_MASK;
834 gfar_write_filer(priv, l, priv->ftp_rqfcr[l],
cbfc6071 835 priv->ftp_rqfpr[l]);
7a8b3372
SG		 836 break;
837 }
838
6c43e046
WJB		 839 if (!(priv->ftp_rqfcr[l] & RQFCR_CLE) &&
840 (priv->ftp_rqfcr[l] & RQFCR_AND))
7a8b3372
SG		 841 continue;
842 else {
6c43e046
WJB		 843 local_rqfpr[j] = priv->ftp_rqfpr[l];
844 local_rqfcr[j] = priv->ftp_rqfcr[l];
7a8b3372
SG		 845 j--;
846 }
847 }
848
849 priv->cur_filer_idx = l - 1;
850 last_rule_idx = l;
851
852 /* hash rules */
853 ethflow_to_filer_rules(priv, ethflow);
854
855 /* Write back the popped out rules again */
856 for (k = j+1; k < MAX_FILER_IDX; k++) {
6c43e046
WJB		 857 priv->ftp_rqfpr[priv->cur_filer_idx] = local_rqfpr[k];
858 priv->ftp_rqfcr[priv->cur_filer_idx] = local_rqfcr[k];
7a8b3372 859 gfar_write_filer(priv, priv->cur_filer_idx,
cbfc6071 860 local_rqfcr[k], local_rqfpr[k]);
7a8b3372
SG		 861 if (!priv->cur_filer_idx)
862 break;
863 priv->cur_filer_idx = priv->cur_filer_idx - 1;
864 }
865
588dc911
WS		 866err:
867 kfree(local_rqfcr);
868 kfree(local_rqfpr);
869 return ret;
7a8b3372
SG		 870}
871
cbfc6071
JC		 872static int gfar_set_hash_opts(struct gfar_private *priv,
873 struct ethtool_rxnfc *cmd)
7a8b3372 874{
7a8b3372
SG		 875 /* write the filer rules here */
876 if (!gfar_ethflow_to_filer_table(priv, cmd->data, cmd->flow_type))
bde3528f 877 return -EINVAL;
7a8b3372
SG		 878
879 return 0;
880}
881
4aa3a715
SP		 882static int gfar_check_filer_hardware(struct gfar_private *priv)
883{
42851e88 884 struct gfar __iomem *regs = priv->gfargrp[0].regs;
4aa3a715
SP		 885 u32 i;
886
4aa3a715
SP		 887 /* Check if we are in FIFO mode */
888 i = gfar_read(&regs->ecntrl);
889 i &= ECNTRL_FIFM;
890 if (i == ECNTRL_FIFM) {
891 netdev_notice(priv->ndev, "Interface in FIFO mode\n");
892 i = gfar_read(&regs->rctrl);
893 i &= RCTRL_PRSDEP_MASK | RCTRL_PRSFM;
894 if (i == (RCTRL_PRSDEP_MASK | RCTRL_PRSFM)) {
895 netdev_info(priv->ndev,
cbfc6071 896 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 897 } else {
898 netdev_warn(priv->ndev,
cbfc6071 899 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 900 return -EOPNOTSUPP;
901 }
902 }
903 /* Or in standard mode */
904 else {
905 i = gfar_read(&regs->rctrl);
906 i &= RCTRL_PRSDEP_MASK;
907 if (i == RCTRL_PRSDEP_MASK) {
908 netdev_info(priv->ndev,
cbfc6071 909 "Receive Queue Filtering enabled\n");
4aa3a715
SP		 910 } else {
911 netdev_warn(priv->ndev,
cbfc6071 912 "Receive Queue Filtering disabled\n");
4aa3a715
SP		 913 return -EOPNOTSUPP;
914 }
915 }
916
917 /* Sets the properties for arbitrary filer rule
cbfc6071
JC		 918 * to the first 4 Layer 4 Bytes
919 */
42851e88 920 gfar_write(&regs->rbifx, 0xC0C1C2C3);
4aa3a715
SP		 921 return 0;
922}
923
4aa3a715
SP		 924/* Write a mask to filer cache */
925static void gfar_set_mask(u32 mask, struct filer_table *tab)
926{
927 tab->fe[tab->index].ctrl = RQFCR_AND | RQFCR_PID_MASK | RQFCR_CMP_EXACT;
928 tab->fe[tab->index].prop = mask;
929 tab->index++;
930}
931
932/* Sets parse bits (e.g. IP or TCP) */
933static void gfar_set_parse_bits(u32 value, u32 mask, struct filer_table *tab)
934{
935 gfar_set_mask(mask, tab);
cbfc6071
JC		 936 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_PID_PARSE |
937 RQFCR_AND;
4aa3a715
SP		 938 tab->fe[tab->index].prop = value;
939 tab->index++;
940}
941
942static void gfar_set_general_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 943 struct filer_table *tab)
4aa3a715
SP		 944{
945 gfar_set_mask(mask, tab);
946 tab->fe[tab->index].ctrl = RQFCR_CMP_EXACT | RQFCR_AND | flag;
947 tab->fe[tab->index].prop = value;
948 tab->index++;
949}
950
cbfc6071 951/* For setting a tuple of value and mask of type flag
4aa3a715
SP		 952 * Example:
953 * IP-Src = 10.0.0.0/255.0.0.0
954 * value: 0x0A000000 mask: FF000000 flag: RQFPR_IPV4
955 *
956 * Ethtool gives us a value=0 and mask=~0 for don't care a tuple
957 * For a don't care mask it gives us a 0
958 *
959 * The check if don't care and the mask adjustment if mask=0 is done for VLAN
960 * and MAC stuff on an upper level (due to missing information on this level).
961 * For these guys we can discard them if they are value=0 and mask=0.
962 *
963 * Further the all masks are one-padded for better hardware efficiency.
964 */
965static void gfar_set_attribute(u32 value, u32 mask, u32 flag,
cbfc6071 966 struct filer_table *tab)
4aa3a715
SP		 967{
968 switch (flag) {
380b153c 969 /* 3bit */
4aa3a715
SP		 970 case RQFCR_PID_PRI:
971 if (!(value | mask))
972 return;
973 mask |= RQFCR_PID_PRI_MASK;
974 break;
975 /* 8bit */
976 case RQFCR_PID_L4P:
977 case RQFCR_PID_TOS:
978 if (!~(mask | RQFCR_PID_L4P_MASK))
979 return;
980 if (!mask)
981 mask = ~0;
982 else
983 mask |= RQFCR_PID_L4P_MASK;
984 break;
985 /* 12bit */
986 case RQFCR_PID_VID:
987 if (!(value | mask))
988 return;
989 mask |= RQFCR_PID_VID_MASK;
990 break;
991 /* 16bit */
992 case RQFCR_PID_DPT:
993 case RQFCR_PID_SPT:
994 case RQFCR_PID_ETY:
995 if (!~(mask | RQFCR_PID_PORT_MASK))
996 return;
997 if (!mask)
998 mask = ~0;
999 else
1000 mask |= RQFCR_PID_PORT_MASK;
1001 break;
1002 /* 24bit */
1003 case RQFCR_PID_DAH:
1004 case RQFCR_PID_DAL:
1005 case RQFCR_PID_SAH:
1006 case RQFCR_PID_SAL:
1007 if (!(value | mask))
1008 return;
1009 mask |= RQFCR_PID_MAC_MASK;
1010 break;
1011 /* for all real 32bit masks */
1012 default:
1013 if (!~mask)
1014 return;
1015 if (!mask)
1016 mask = ~0;
1017 break;
1018 }
1019 gfar_set_general_attribute(value, mask, flag, tab);
1020}
1021
1022/* Translates value and mask for UDP, TCP or SCTP */
1023static void gfar_set_basic_ip(struct ethtool_tcpip4_spec *value,
cbfc6071
JC		 1024 struct ethtool_tcpip4_spec *mask,
1025 struct filer_table *tab)
4aa3a715 1026{
42851e88
CM		 1027 gfar_set_attribute(be32_to_cpu(value->ip4src),
1028 be32_to_cpu(mask->ip4src),
1029 RQFCR_PID_SIA, tab);
1030 gfar_set_attribute(be32_to_cpu(value->ip4dst),
1031 be32_to_cpu(mask->ip4dst),
1032 RQFCR_PID_DIA, tab);
1033 gfar_set_attribute(be16_to_cpu(value->pdst),
1034 be16_to_cpu(mask->pdst),
1035 RQFCR_PID_DPT, tab);
1036 gfar_set_attribute(be16_to_cpu(value->psrc),
1037 be16_to_cpu(mask->psrc),
1038 RQFCR_PID_SPT, tab);
4aa3a715
SP		 1039 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
1040}
1041
1042/* Translates value and mask for RAW-IP4 */
1043static void gfar_set_user_ip(struct ethtool_usrip4_spec *value,
cbfc6071
JC		 1044 struct ethtool_usrip4_spec *mask,
1045 struct filer_table *tab)
4aa3a715 1046{
42851e88
CM		 1047 gfar_set_attribute(be32_to_cpu(value->ip4src),
1048 be32_to_cpu(mask->ip4src),
1049 RQFCR_PID_SIA, tab);
1050 gfar_set_attribute(be32_to_cpu(value->ip4dst),
1051 be32_to_cpu(mask->ip4dst),
1052 RQFCR_PID_DIA, tab);
4aa3a715
SP		 1053 gfar_set_attribute(value->tos, mask->tos, RQFCR_PID_TOS, tab);
1054 gfar_set_attribute(value->proto, mask->proto, RQFCR_PID_L4P, tab);
42851e88
CM		 1055 gfar_set_attribute(be32_to_cpu(value->l4_4_bytes),
1056 be32_to_cpu(mask->l4_4_bytes),
1057 RQFCR_PID_ARB, tab);
4aa3a715
SP		 1058
1059}
1060
1061/* Translates value and mask for ETHER spec */
1062static void gfar_set_ether(struct ethhdr *value, struct ethhdr *mask,
cbfc6071 1063 struct filer_table *tab)
4aa3a715
SP		 1064{
1065 u32 upper_temp_mask = 0;
1066 u32 lower_temp_mask = 0;
cbfc6071 1067
4aa3a715
SP		 1068 /* Source address */
1069 if (!is_broadcast_ether_addr(mask->h_source)) {
4aa3a715
SP		 1070 if (is_zero_ether_addr(mask->h_source)) {
1071 upper_temp_mask = 0xFFFFFFFF;
1072 lower_temp_mask = 0xFFFFFFFF;
1073 } else {
cbfc6071
JC		 1074 upper_temp_mask = mask->h_source[0] << 16 |
1075 mask->h_source[1] << 8 |
1076 mask->h_source[2];
1077 lower_temp_mask = mask->h_source[3] << 16 |
1078 mask->h_source[4] << 8 |
1079 mask->h_source[5];
4aa3a715
SP		 1080 }
1081 /* Upper 24bit */
cbfc6071
JC		 1082 gfar_set_attribute(value->h_source[0] << 16 |
1083 value->h_source[1] << 8 |
1084 value->h_source[2],
1085 upper_temp_mask, RQFCR_PID_SAH, tab);
4aa3a715 1086 /* And the same for the lower part */
cbfc6071
JC		 1087 gfar_set_attribute(value->h_source[3] << 16 |
1088 value->h_source[4] << 8 |
1089 value->h_source[5],
1090 lower_temp_mask, RQFCR_PID_SAL, tab);
4aa3a715
SP		 1091 }
1092 /* Destination address */
1093 if (!is_broadcast_ether_addr(mask->h_dest)) {
4aa3a715 1094 /* Special for destination is limited broadcast */
cbfc6071
JC		 1095 if ((is_broadcast_ether_addr(value->h_dest) &&
1096 is_zero_ether_addr(mask->h_dest))) {
4aa3a715
SP		 1097 gfar_set_parse_bits(RQFPR_EBC, RQFPR_EBC, tab);
1098 } else {
4aa3a715
SP		 1099 if (is_zero_ether_addr(mask->h_dest)) {
1100 upper_temp_mask = 0xFFFFFFFF;
1101 lower_temp_mask = 0xFFFFFFFF;
1102 } else {
cbfc6071
JC		 1103 upper_temp_mask = mask->h_dest[0] << 16 |
1104 mask->h_dest[1] << 8 |
1105 mask->h_dest[2];
1106 lower_temp_mask = mask->h_dest[3] << 16 |
1107 mask->h_dest[4] << 8 |
1108 mask->h_dest[5];
4aa3a715
SP		 1109 }
1110
1111 /* Upper 24bit */
cbfc6071
JC		 1112 gfar_set_attribute(value->h_dest[0] << 16 |
1113 value->h_dest[1] << 8 |
1114 value->h_dest[2],
1115 upper_temp_mask, RQFCR_PID_DAH, tab);
4aa3a715 1116 /* And the same for the lower part */
cbfc6071
JC		 1117 gfar_set_attribute(value->h_dest[3] << 16 |
1118 value->h_dest[4] << 8 |
1119 value->h_dest[5],
1120 lower_temp_mask, RQFCR_PID_DAL, tab);
4aa3a715
SP		 1121 }
1122 }
1123
42851e88
CM		 1124 gfar_set_attribute(be16_to_cpu(value->h_proto),
1125 be16_to_cpu(mask->h_proto),
1126 RQFCR_PID_ETY, tab);
1127}
1128
1129static inline u32 vlan_tci_vid(struct ethtool_rx_flow_spec *rule)
1130{
1131 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_VID_MASK;
1132}
1133
1134static inline u32 vlan_tci_vidm(struct ethtool_rx_flow_spec *rule)
1135{
1136 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_VID_MASK;
1137}
1138
1139static inline u32 vlan_tci_cfi(struct ethtool_rx_flow_spec *rule)
1140{
1141 return be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_CFI_MASK;
1142}
1143
1144static inline u32 vlan_tci_cfim(struct ethtool_rx_flow_spec *rule)
1145{
1146 return be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_CFI_MASK;
1147}
1148
1149static inline u32 vlan_tci_prio(struct ethtool_rx_flow_spec *rule)
1150{
1151 return (be16_to_cpu(rule->h_ext.vlan_tci) & VLAN_PRIO_MASK) >>
1152 VLAN_PRIO_SHIFT;
1153}
1154
1155static inline u32 vlan_tci_priom(struct ethtool_rx_flow_spec *rule)
1156{
1157 return (be16_to_cpu(rule->m_ext.vlan_tci) & VLAN_PRIO_MASK) >>
1158 VLAN_PRIO_SHIFT;
4aa3a715
SP		 1159}
1160
1161/* Convert a rule to binary filter format of gianfar */
1162static int gfar_convert_to_filer(struct ethtool_rx_flow_spec *rule,
cbfc6071 1163 struct filer_table *tab)
4aa3a715
SP		 1164{
1165 u32 vlan = 0, vlan_mask = 0;
1166 u32 id = 0, id_mask = 0;
1167 u32 cfi = 0, cfi_mask = 0;
1168 u32 prio = 0, prio_mask = 0;
4aa3a715
SP		 1169 u32 old_index = tab->index;
1170
1171 /* Check if vlan is wanted */
42851e88
CM		 1172 if ((rule->flow_type & FLOW_EXT) &&
1173 (rule->m_ext.vlan_tci != cpu_to_be16(0xFFFF))) {
4aa3a715 1174 if (!rule->m_ext.vlan_tci)
42851e88 1175 rule->m_ext.vlan_tci = cpu_to_be16(0xFFFF);
4aa3a715
SP		 1176
1177 vlan = RQFPR_VLN;
1178 vlan_mask = RQFPR_VLN;
1179
1180 /* Separate the fields */
42851e88
CM		 1181 id = vlan_tci_vid(rule);
1182 id_mask = vlan_tci_vidm(rule);
1183 cfi = vlan_tci_cfi(rule);
1184 cfi_mask = vlan_tci_cfim(rule);
1185 prio = vlan_tci_prio(rule);
1186 prio_mask = vlan_tci_priom(rule);
380b153c
SP		 1187
1188 if (cfi == VLAN_TAG_PRESENT && cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1189 vlan |= RQFPR_CFI;
1190 vlan_mask |= RQFPR_CFI;
cbfc6071
JC		 1191 } else if (cfi != VLAN_TAG_PRESENT &&
1192 cfi_mask == VLAN_TAG_PRESENT) {
4aa3a715
SP		 1193 vlan_mask |= RQFPR_CFI;
1194 }
1195 }
1196
1197 switch (rule->flow_type & ~FLOW_EXT) {
1198 case TCP_V4_FLOW:
1199 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_TCP | vlan,
cbfc6071 1200 RQFPR_IPV4 | RQFPR_TCP | vlan_mask, tab);
4aa3a715 1201 gfar_set_basic_ip(&rule->h_u.tcp_ip4_spec,
cbfc6071 1202 &rule->m_u.tcp_ip4_spec, tab);
4aa3a715
SP		 1203 break;
1204 case UDP_V4_FLOW:
1205 gfar_set_parse_bits(RQFPR_IPV4 | RQFPR_UDP | vlan,
cbfc6071 1206 RQFPR_IPV4 | RQFPR_UDP | vlan_mask, tab);
4aa3a715 1207 gfar_set_basic_ip(&rule->h_u.udp_ip4_spec,
cbfc6071 1208 &rule->m_u.udp_ip4_spec, tab);
4aa3a715
SP		 1209 break;
1210 case SCTP_V4_FLOW:
1211 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1212 tab);
4aa3a715 1213 gfar_set_attribute(132, 0, RQFCR_PID_L4P, tab);
cbfc6071
JC		 1214 gfar_set_basic_ip((struct ethtool_tcpip4_spec *)&rule->h_u,
1215 (struct ethtool_tcpip4_spec *)&rule->m_u,
1216 tab);
4aa3a715
SP		 1217 break;
1218 case IP_USER_FLOW:
1219 gfar_set_parse_bits(RQFPR_IPV4 | vlan, RQFPR_IPV4 | vlan_mask,
cbfc6071 1220 tab);
4aa3a715 1221 gfar_set_user_ip((struct ethtool_usrip4_spec *) &rule->h_u,
cbfc6071
JC		 1222 (struct ethtool_usrip4_spec *) &rule->m_u,
1223 tab);
4aa3a715
SP		 1224 break;
1225 case ETHER_FLOW:
1226 if (vlan)
1227 gfar_set_parse_bits(vlan, vlan_mask, tab);
1228 gfar_set_ether((struct ethhdr *) &rule->h_u,
cbfc6071 1229 (struct ethhdr *) &rule->m_u, tab);
4aa3a715
SP		 1230 break;
1231 default:
1232 return -1;
1233 }
1234
1235 /* Set the vlan attributes in the end */
1236 if (vlan) {
1237 gfar_set_attribute(id, id_mask, RQFCR_PID_VID, tab);
1238 gfar_set_attribute(prio, prio_mask, RQFCR_PID_PRI, tab);
1239 }
1240
1241 /* If there has been nothing written till now, it must be a default */
1242 if (tab->index == old_index) {
1243 gfar_set_mask(0xFFFFFFFF, tab);
1244 tab->fe[tab->index].ctrl = 0x20;
1245 tab->fe[tab->index].prop = 0x0;
1246 tab->index++;
1247 }
1248
1249 /* Remove last AND */
1250 tab->fe[tab->index - 1].ctrl &= (~RQFCR_AND);
1251
1252 /* Specify which queue to use or to drop */
1253 if (rule->ring_cookie == RX_CLS_FLOW_DISC)
1254 tab->fe[tab->index - 1].ctrl |= RQFCR_RJE;
1255 else
1256 tab->fe[tab->index - 1].ctrl |= (rule->ring_cookie << 10);
1257
1258 /* Only big enough entries can be clustered */
1259 if (tab->index > (old_index + 2)) {
1260 tab->fe[old_index + 1].ctrl |= RQFCR_CLE;
1261 tab->fe[tab->index - 1].ctrl |= RQFCR_CLE;
1262 }
1263
cbfc6071
JC		 1264 /* In rare cases the cache can be full while there is
1265 * free space in hw
1266 */
4aa3a715
SP		 1267 if (tab->index > MAX_FILER_CACHE_IDX - 1)
1268 return -EBUSY;
1269
1270 return 0;
1271}
1272
4aa3a715
SP		 1273/* Write the bit-pattern from software's buffer to hardware registers */
1274static int gfar_write_filer_table(struct gfar_private *priv,
cbfc6071 1275 struct filer_table *tab)
4aa3a715
SP		 1276{
1277 u32 i = 0;
1278 if (tab->index > MAX_FILER_IDX - 1)
1279 return -EBUSY;
1280
4aa3a715 1281 /* Fill regular entries */
a898fe04 1282 for (; i < MAX_FILER_IDX && (tab->fe[i].ctrl | tab->fe[i].prop); i++)
4aa3a715
SP		 1283 gfar_write_filer(priv, i, tab->fe[i].ctrl, tab->fe[i].prop);
1284 /* Fill the rest with fall-troughs */
a898fe04 1285 for (; i < MAX_FILER_IDX; i++)
4aa3a715
SP		 1286 gfar_write_filer(priv, i, 0x60, 0xFFFFFFFF);
1287 /* Last entry must be default accept
cbfc6071
JC		 1288 * because that's what people expect
1289 */
4aa3a715
SP		 1290 gfar_write_filer(priv, i, 0x20, 0x0);
1291
4aa3a715
SP		 1292 return 0;
1293}
1294
1295static int gfar_check_capability(struct ethtool_rx_flow_spec *flow,
cbfc6071 1296 struct gfar_private *priv)
4aa3a715
SP		 1297{
1298
1299 if (flow->flow_type & FLOW_EXT) {
1300 if (~flow->m_ext.data[0] || ~flow->m_ext.data[1])
1301 netdev_warn(priv->ndev,
cbfc6071 1302 "User-specific data not supported!\n");
4aa3a715
SP		 1303 if (~flow->m_ext.vlan_etype)
1304 netdev_warn(priv->ndev,
cbfc6071 1305 "VLAN-etype not supported!\n");
4aa3a715
SP		 1306 }
1307 if (flow->flow_type == IP_USER_FLOW)
1308 if (flow->h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4)
1309 netdev_warn(priv->ndev,
cbfc6071 1310 "IP-Version differing from IPv4 not supported!\n");
4aa3a715
SP		 1311
1312 return 0;
1313}
1314
1315static int gfar_process_filer_changes(struct gfar_private *priv)
1316{
1317 struct ethtool_flow_spec_container *j;
1318 struct filer_table *tab;
4aa3a715
SP		 1319 s32 ret = 0;
1320
1321 /* So index is set to zero, too! */
1322 tab = kzalloc(sizeof(*tab), GFP_KERNEL);
1323 if (tab == NULL)
1324 return -ENOMEM;
1325
1326 /* Now convert the existing filer data from flow_spec into
cbfc6071
JC		 1327 * filer tables binary format
1328 */
4aa3a715
SP		 1329 list_for_each_entry(j, &priv->rx_list.list, list) {
1330 ret = gfar_convert_to_filer(&j->fs, tab);
1331 if (ret == -EBUSY) {
cbfc6071
JC		 1332 netdev_err(priv->ndev,
1333 "Rule not added: No free space!\n");
4aa3a715
SP		 1334 goto end;
1335 }
1336 if (ret == -1) {
cbfc6071
JC		 1337 netdev_err(priv->ndev,
1338 "Rule not added: Unsupported Flow-type!\n");
4aa3a715
SP		 1339 goto end;
1340 }
1341 }
1342
4aa3a715
SP		 1343 /* Write everything to hardware */
1344 ret = gfar_write_filer_table(priv, tab);
1345 if (ret == -EBUSY) {
1346 netdev_err(priv->ndev, "Rule not added: No free space!\n");
1347 goto end;
1348 }
1349
cbfc6071
JC		 1350end:
1351 kfree(tab);
4aa3a715
SP		 1352 return ret;
1353}
1354
1355static void gfar_invert_masks(struct ethtool_rx_flow_spec *flow)
1356{
1357 u32 i = 0;
1358
1359 for (i = 0; i < sizeof(flow->m_u); i++)
1360 flow->m_u.hdata[i] ^= 0xFF;
1361
42851e88
CM		 1362 flow->m_ext.vlan_etype ^= cpu_to_be16(0xFFFF);
1363 flow->m_ext.vlan_tci ^= cpu_to_be16(0xFFFF);
1364 flow->m_ext.data[0] ^= cpu_to_be32(~0);
1365 flow->m_ext.data[1] ^= cpu_to_be32(~0);
4aa3a715
SP		 1366}
1367
1368static int gfar_add_cls(struct gfar_private *priv,
cbfc6071 1369 struct ethtool_rx_flow_spec *flow)
4aa3a715
SP		 1370{
1371 struct ethtool_flow_spec_container *temp, *comp;
1372 int ret = 0;
1373
1374 temp = kmalloc(sizeof(*temp), GFP_KERNEL);
1375 if (temp == NULL)
1376 return -ENOMEM;
1377 memcpy(&temp->fs, flow, sizeof(temp->fs));
1378
1379 gfar_invert_masks(&temp->fs);
1380 ret = gfar_check_capability(&temp->fs, priv);
1381 if (ret)
1382 goto clean_mem;
1383 /* Link in the new element at the right @location */
1384 if (list_empty(&priv->rx_list.list)) {
1385 ret = gfar_check_filer_hardware(priv);
1386 if (ret != 0)
1387 goto clean_mem;
1388 list_add(&temp->list, &priv->rx_list.list);
1389 goto process;
1390 } else {
4aa3a715
SP		 1391 list_for_each_entry(comp, &priv->rx_list.list, list) {
1392 if (comp->fs.location > flow->location) {
1393 list_add_tail(&temp->list, &comp->list);
1394 goto process;
1395 }
1396 if (comp->fs.location == flow->location) {
1397 netdev_err(priv->ndev,
cbfc6071
JC		 1398 "Rule not added: ID %d not free!\n",
1399 flow->location);
4aa3a715
SP		 1400 ret = -EBUSY;
1401 goto clean_mem;
1402 }
1403 }
1404 list_add_tail(&temp->list, &priv->rx_list.list);
1405 }
1406
1407process:
b5c8c890 1408 priv->rx_list.count++;
4aa3a715
SP		 1409 ret = gfar_process_filer_changes(priv);
1410 if (ret)
1411 goto clean_list;
4aa3a715
SP		 1412 return ret;
1413
1414clean_list:
b5c8c890 1415 priv->rx_list.count--;
4aa3a715
SP		 1416 list_del(&temp->list);
1417clean_mem:
1418 kfree(temp);
1419 return ret;
1420}
1421
1422static int gfar_del_cls(struct gfar_private *priv, u32 loc)
1423{
1424 struct ethtool_flow_spec_container *comp;
1425 u32 ret = -EINVAL;
1426
1427 if (list_empty(&priv->rx_list.list))
1428 return ret;
1429
1430 list_for_each_entry(comp, &priv->rx_list.list, list) {
1431 if (comp->fs.location == loc) {
1432 list_del(&comp->list);
1433 kfree(comp);
1434 priv->rx_list.count--;
1435 gfar_process_filer_changes(priv);
1436 ret = 0;
1437 break;
1438 }
1439 }
1440
1441 return ret;
4aa3a715
SP		 1442}
1443
1444static int gfar_get_cls(struct gfar_private *priv, struct ethtool_rxnfc *cmd)
1445{
1446 struct ethtool_flow_spec_container *comp;
1447 u32 ret = -EINVAL;
1448
1449 list_for_each_entry(comp, &priv->rx_list.list, list) {
1450 if (comp->fs.location == cmd->fs.location) {
1451 memcpy(&cmd->fs, &comp->fs, sizeof(cmd->fs));
1452 gfar_invert_masks(&cmd->fs);
1453 ret = 0;
1454 break;
1455 }
1456 }
1457
1458 return ret;
1459}
1460
1461static int gfar_get_cls_all(struct gfar_private *priv,
cbfc6071 1462 struct ethtool_rxnfc *cmd, u32 *rule_locs)
4aa3a715
SP		 1463{
1464 struct ethtool_flow_spec_container *comp;
1465 u32 i = 0;
1466
1467 list_for_each_entry(comp, &priv->rx_list.list, list) {
710778ff
BH		 1468 if (i == cmd->rule_cnt)
1469 return -EMSGSIZE;
1470 rule_locs[i] = comp->fs.location;
1471 i++;
4aa3a715
SP		 1472 }
1473
1474 cmd->data = MAX_FILER_IDX;
473e64ee 1475 cmd->rule_cnt = i;
4aa3a715
SP		 1476
1477 return 0;
1478}
1479
7a8b3372
SG		 1480static int gfar_set_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1481{
1482 struct gfar_private *priv = netdev_priv(dev);
1483 int ret = 0;
1484
0851133b
CM		 1485 if (test_bit(GFAR_RESETTING, &priv->state))
1486 return -EBUSY;
1487
4aa3a715
SP		 1488 mutex_lock(&priv->rx_queue_access);
1489
1490 switch (cmd->cmd) {
7a8b3372
SG		 1491 case ETHTOOL_SRXFH:
1492 ret = gfar_set_hash_opts(priv, cmd);
1493 break;
4aa3a715 1494 case ETHTOOL_SRXCLSRLINS:
3a73e49c
BH		 1495 if ((cmd->fs.ring_cookie != RX_CLS_FLOW_DISC &&
1496 cmd->fs.ring_cookie >= priv->num_rx_queues) ||
1497 cmd->fs.location >= MAX_FILER_IDX) {
4aa3a715
SP		 1498 ret = -EINVAL;
1499 break;
1500 }
1501 ret = gfar_add_cls(priv, &cmd->fs);
1502 break;
1503 case ETHTOOL_SRXCLSRLDEL:
1504 ret = gfar_del_cls(priv, cmd->fs.location);
1505 break;
7a8b3372
SG		 1506 default:
1507 ret = -EINVAL;
1508 }
1509
4aa3a715
SP		 1510 mutex_unlock(&priv->rx_queue_access);
1511
1512 return ret;
1513}
1514
1515static int gfar_get_nfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
cbfc6071 1516 u32 *rule_locs)
4aa3a715
SP		 1517{
1518 struct gfar_private *priv = netdev_priv(dev);
1519 int ret = 0;
1520
1521 switch (cmd->cmd) {
1522 case ETHTOOL_GRXRINGS:
1523 cmd->data = priv->num_rx_queues;
1524 break;
1525 case ETHTOOL_GRXCLSRLCNT:
1526 cmd->rule_cnt = priv->rx_list.count;
1527 break;
1528 case ETHTOOL_GRXCLSRULE:
1529 ret = gfar_get_cls(priv, cmd);
1530 break;
1531 case ETHTOOL_GRXCLSRLALL:
815c7db5 1532 ret = gfar_get_cls_all(priv, cmd, rule_locs);
4aa3a715
SP		 1533 break;
1534 default:
1535 ret = -EINVAL;
1536 break;
1537 }
1538
7a8b3372
SG		 1539 return ret;
1540}
1541
66636287 1542int gfar_phc_index = -1;
28889b7e 1543EXPORT_SYMBOL(gfar_phc_index);
66636287
RC		 1544
1545static int gfar_get_ts_info(struct net_device *dev,
1546 struct ethtool_ts_info *info)
1547{
1548 struct gfar_private *priv = netdev_priv(dev);
1549
1550 if (!(priv->device_flags & FSL_GIANFAR_DEV_HAS_TIMER)) {
cbfc6071
JC		 1551 info->so_timestamping = SOF_TIMESTAMPING_RX_SOFTWARE |
1552 SOF_TIMESTAMPING_SOFTWARE;
66636287
RC		 1553 info->phc_index = -1;
1554 return 0;
1555 }
cbfc6071
JC		 1556 info->so_timestamping = SOF_TIMESTAMPING_TX_HARDWARE |
1557 SOF_TIMESTAMPING_RX_HARDWARE |
1558 SOF_TIMESTAMPING_RAW_HARDWARE;
66636287 1559 info->phc_index = gfar_phc_index;
cbfc6071
JC		 1560 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
1561 (1 << HWTSTAMP_TX_ON);
1562 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
1563 (1 << HWTSTAMP_FILTER_ALL);
66636287
RC		 1564 return 0;
1565}
1566
7282d491 1567const struct ethtool_ops gfar_ethtool_ops = {
1da177e4 1568 .get_settings = gfar_gsettings,
bb40dcbb 1569 .set_settings = gfar_ssettings,
1da177e4
LT		 1570 .get_drvinfo = gfar_gdrvinfo,
1571 .get_regs_len = gfar_reglen,
1572 .get_regs = gfar_get_regs,
1573 .get_link = ethtool_op_get_link,
1574 .get_coalesce = gfar_gcoalesce,
1575 .set_coalesce = gfar_scoalesce,
1576 .get_ringparam = gfar_gringparam,
1577 .set_ringparam = gfar_sringparam,
23402bdd
CM		 1578 .get_pauseparam = gfar_gpauseparam,
1579 .set_pauseparam = gfar_spauseparam,
1da177e4 1580 .get_strings = gfar_gstrings,
b9f2c044 1581 .get_sset_count = gfar_sset_count,
1da177e4 1582 .get_ethtool_stats = gfar_fill_stats,
0bbaf069
KG		 1583 .get_msglevel = gfar_get_msglevel,
1584 .set_msglevel = gfar_set_msglevel,
d87eb127
SW		 1585#ifdef CONFIG_PM
1586 .get_wol = gfar_get_wol,
1587 .set_wol = gfar_set_wol,
1588#endif
7a8b3372 1589 .set_rxnfc = gfar_set_nfc,
4aa3a715 1590 .get_rxnfc = gfar_get_nfc,
66636287 1591 .get_ts_info = gfar_get_ts_info,
1da177e4 1592};
Linux kernel - Deliverables
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