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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
CommitLineData
511e6bc0 1/*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/interrupt.h>
14#include <linux/netdevice.h>
15#include <linux/platform_device.h>
16#include <linux/of.h>
17#include <linux/of_address.h>
18#include <linux/of_irq.h>
19#include <linux/device.h>
119c7ad8
AB		 20#include <linux/vmalloc.h>
21
511e6bc0 22#include "hns_dsaf_main.h"
23#include "hns_dsaf_rcb.h"
24#include "hns_dsaf_ppe.h"
25#include "hns_dsaf_mac.h"
26
27const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
28 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
29 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
30 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
31};
32
33int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
34{
35 int ret, i;
36 u32 desc_num;
37 u32 buf_size;
48189d6a 38 const char *mode_str;
511e6bc0 39 struct device_node *np = dsaf_dev->dev->of_node;
40
13ac695e 41 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
511e6bc0 42 dsaf_dev->dsaf_ver = AE_VERSION_1;
13ac695e
S		 43 else
44 dsaf_dev->dsaf_ver = AE_VERSION_2;
511e6bc0 45
511e6bc0 46 ret = of_property_read_string(np, "mode", &mode_str);
47 if (ret) {
48 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
49 return ret;
50 }
51 for (i = 0; i < DSAF_MODE_MAX; i++) {
52 if (g_dsaf_mode_match[i] &&
53 !strcmp(mode_str, g_dsaf_mode_match[i]))
54 break;
55 }
56 if (i >= DSAF_MODE_MAX ||
57 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
58 dev_err(dsaf_dev->dev,
59 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
60 return -EINVAL;
61 }
62 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
63
64 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
65 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
66 else
67 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
68
69 if ((i == DSAF_MODE_ENABLE_16VM) ||
70 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
71 (i == DSAF_MODE_DISABLE_6PORT_2VM))
72 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
73 else
74 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
75
76 dsaf_dev->sc_base = of_iomap(np, 0);
77 if (!dsaf_dev->sc_base) {
78 dev_err(dsaf_dev->dev,
79 "%s of_iomap 0 fail!\n", dsaf_dev->ae_dev.name);
80 ret = -ENOMEM;
81 goto unmap_base_addr;
82 }
83
84 dsaf_dev->sds_base = of_iomap(np, 1);
85 if (!dsaf_dev->sds_base) {
86 dev_err(dsaf_dev->dev,
87 "%s of_iomap 1 fail!\n", dsaf_dev->ae_dev.name);
88 ret = -ENOMEM;
89 goto unmap_base_addr;
90 }
91
92 dsaf_dev->ppe_base = of_iomap(np, 2);
93 if (!dsaf_dev->ppe_base) {
94 dev_err(dsaf_dev->dev,
95 "%s of_iomap 2 fail!\n", dsaf_dev->ae_dev.name);
96 ret = -ENOMEM;
97 goto unmap_base_addr;
98 }
99
100 dsaf_dev->io_base = of_iomap(np, 3);
101 if (!dsaf_dev->io_base) {
102 dev_err(dsaf_dev->dev,
103 "%s of_iomap 3 fail!\n", dsaf_dev->ae_dev.name);
104 ret = -ENOMEM;
105 goto unmap_base_addr;
106 }
107
108 dsaf_dev->cpld_base = of_iomap(np, 4);
109 if (!dsaf_dev->cpld_base)
110 dev_dbg(dsaf_dev->dev, "NO CPLD ADDR");
111
112 ret = of_property_read_u32(np, "desc-num", &desc_num);
113 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
114 desc_num > HNS_DSAF_MAX_DESC_CNT) {
115 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
116 desc_num, ret);
117 goto unmap_base_addr;
118 }
119 dsaf_dev->desc_num = desc_num;
120
121 ret = of_property_read_u32(np, "buf-size", &buf_size);
122 if (ret < 0) {
123 dev_err(dsaf_dev->dev,
124 "get buf-size fail, ret=%d!\r\n", ret);
125 goto unmap_base_addr;
126 }
127 dsaf_dev->buf_size = buf_size;
128
129 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
130 if (dsaf_dev->buf_size_type < 0) {
131 dev_err(dsaf_dev->dev,
132 "buf_size(%d) is wrong!\n", buf_size);
133 goto unmap_base_addr;
134 }
135
136 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
137 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
138 else
139 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
140
141 return 0;
142
143unmap_base_addr:
144 if (dsaf_dev->io_base)
145 iounmap(dsaf_dev->io_base);
146 if (dsaf_dev->ppe_base)
147 iounmap(dsaf_dev->ppe_base);
148 if (dsaf_dev->sds_base)
149 iounmap(dsaf_dev->sds_base);
150 if (dsaf_dev->sc_base)
151 iounmap(dsaf_dev->sc_base);
152 if (dsaf_dev->cpld_base)
153 iounmap(dsaf_dev->cpld_base);
154 return ret;
155}
156
157static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
158{
159 if (dsaf_dev->io_base)
160 iounmap(dsaf_dev->io_base);
161
162 if (dsaf_dev->ppe_base)
163 iounmap(dsaf_dev->ppe_base);
164
165 if (dsaf_dev->sds_base)
166 iounmap(dsaf_dev->sds_base);
167
168 if (dsaf_dev->sc_base)
169 iounmap(dsaf_dev->sc_base);
170
171 if (dsaf_dev->cpld_base)
172 iounmap(dsaf_dev->cpld_base);
173}
174
175/**
176 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
177 * @dsaf_id: dsa fabric id
178 */
179static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
180{
181 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
182}
183
184/**
185 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
186 * @dsaf_id: dsa fabric id
187 * @hns_dsaf_reg_cnt_clr_ce: config value
188 */
189static void
190hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
191{
192 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
193 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
194}
195
196/**
197 * hns_ppe_qid_cfg - config ppe qid
198 * @dsaf_id: dsa fabric id
199 * @pppe_qid_cfg: value array
200 */
201static void
202hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
203{
204 u32 i;
205
206 for (i = 0; i < DSAF_COMM_CHN; i++) {
207 dsaf_set_dev_field(dsaf_dev,
208 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
209 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
210 qid_cfg);
211 }
212}
213
4568637f 214static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
215{
216 u16 max_q_per_vf, max_vfn;
217 u32 q_id, q_num_per_port;
218 u32 i;
219
220 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
221 HNS_DSAF_COMM_SERVICE_NW_IDX,
222 &max_vfn, &max_q_per_vf);
223 q_num_per_port = max_vfn * max_q_per_vf;
224
225 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
226 dsaf_set_dev_field(dsaf_dev,
227 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
228 0xff, 0, q_id);
229 q_id += q_num_per_port;
230 }
231}
232
68c222a6 233static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
234{
235 u16 max_q_per_vf, max_vfn;
236 u32 q_id, q_num_per_port;
237 u32 mac_id;
238
239 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
240 return;
241
242 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode,
243 HNS_DSAF_COMM_SERVICE_NW_IDX,
244 &max_vfn, &max_q_per_vf);
245 q_num_per_port = max_vfn * max_q_per_vf;
246
247 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
248 dsaf_set_dev_field(dsaf_dev,
249 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
250 DSAFV2_SERDES_LBK_QID_M,
251 DSAFV2_SERDES_LBK_QID_S,
252 q_id);
253 q_id += q_num_per_port;
254 }
255}
256
511e6bc0 257/**
258 * hns_dsaf_sw_port_type_cfg - cfg sw type
259 * @dsaf_id: dsa fabric id
260 * @psw_port_type: array
261 */
262static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
263 enum dsaf_sw_port_type port_type)
264{
265 u32 i;
266
267 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
268 dsaf_set_dev_field(dsaf_dev,
269 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
270 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
271 port_type);
272 }
273}
274
275/**
276 * hns_dsaf_stp_port_type_cfg - cfg stp type
277 * @dsaf_id: dsa fabric id
278 * @pstp_port_type: array
279 */
280static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
281 enum dsaf_stp_port_type port_type)
282{
283 u32 i;
284
285 for (i = 0; i < DSAF_COMM_CHN; i++) {
286 dsaf_set_dev_field(dsaf_dev,
287 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
288 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
289 port_type);
290 }
291}
292
13ac695e
S		 293#define HNS_DSAF_SBM_NUM(dev) \
294 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
511e6bc0 295/**
296 * hns_dsaf_sbm_cfg - config sbm
297 * @dsaf_id: dsa fabric id
298 */
299static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
300{
301 u32 o_sbm_cfg;
302 u32 i;
303
13ac695e 304 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 305 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
306 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
307 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
308 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
309 dsaf_write_dev(dsaf_dev,
310 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
311 }
312}
313
314/**
315 * hns_dsaf_sbm_cfg_mib_en - config sbm
316 * @dsaf_id: dsa fabric id
317 */
318static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
319{
320 u32 sbm_cfg_mib_en;
321 u32 i;
322 u32 reg;
323 u32 read_cnt;
324
13ac695e
S		 325 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
326 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
327 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
328 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
329 }
330
331 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 332 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
333 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
334 }
335
336 /* waitint for all sbm enable finished */
13ac695e 337 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 338 read_cnt = 0;
339 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
340 do {
341 udelay(1);
342 sbm_cfg_mib_en = dsaf_get_dev_bit(
343 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
344 read_cnt++;
345 } while (sbm_cfg_mib_en == 0 &&
346 read_cnt < DSAF_CFG_READ_CNT);
347
348 if (sbm_cfg_mib_en == 0) {
349 dev_err(dsaf_dev->dev,
350 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
351 dsaf_dev->ae_dev.name, i);
352 return -ENODEV;
353 }
354 }
355
356 return 0;
357}
358
359/**
360 * hns_dsaf_sbm_bp_wl_cfg - config sbm
361 * @dsaf_id: dsa fabric id
362 */
363static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
364{
13ac695e 365 u32 o_sbm_bp_cfg;
511e6bc0 366 u32 reg;
367 u32 i;
368
369 /* XGE */
370 for (i = 0; i < DSAF_XGE_NUM; i++) {
371 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
13ac695e
S		 372 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
373 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
511e6bc0 374 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
13ac695e 375 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
511e6bc0 376 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
13ac695e 377 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
511e6bc0 378 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
13ac695e 379 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 380
381 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
13ac695e
S		 382 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
383 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
511e6bc0 384 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
13ac695e 385 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
511e6bc0 386 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
13ac695e 387 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 388
389 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
13ac695e
S		 390 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
391 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 392 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
13ac695e 393 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 394 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
13ac695e 395 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 396
397 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
13ac695e
S		 398 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
399 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 400 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
401 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
13ac695e 402 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 403 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
404 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
13ac695e 405 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 406
407 /* for no enable pfc mode */
408 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
13ac695e
S		 409 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
410 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 411 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
412 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
13ac695e 413 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 414 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
415 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
13ac695e 416 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 417 }
418
419 /* PPE */
420 for (i = 0; i < DSAF_COMM_CHN; i++) {
421 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
13ac695e
S		 422 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
423 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 424 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
13ac695e 425 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 426 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
13ac695e 427 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 428 }
429
430 /* RoCEE */
431 for (i = 0; i < DSAF_COMM_CHN; i++) {
432 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
13ac695e
S		 433 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
434 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 435 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
13ac695e 436 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 437 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
13ac695e
S		 438 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
439 }
440}
441
442static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
443{
444 u32 o_sbm_bp_cfg;
445 u32 reg;
446 u32 i;
447
448 /* XGE */
449 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
450 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
451 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
452 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
453 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
454 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
455 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
456 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
457 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
458 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
459
460 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
461 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
462 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
463 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
464 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
465 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
466 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
467
468 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
469 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
470 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
471 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
472 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
473 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
474 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
475
476 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
477 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
478 dsaf_set_field(o_sbm_bp_cfg,
479 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
480 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
481 dsaf_set_field(o_sbm_bp_cfg,
482 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
483 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
484 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
485
486 /* for no enable pfc mode */
487 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
488 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
489 dsaf_set_field(o_sbm_bp_cfg,
490 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
491 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
492 dsaf_set_field(o_sbm_bp_cfg,
493 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
494 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
495 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
496 }
497
498 /* PPE */
499 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
500 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
502 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
503 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
504 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
505 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
506 /* RoCEE */
507 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
508 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
509 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
510 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
511 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
512 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
513 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
514 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 515 }
516}
517
518/**
519 * hns_dsaf_voq_bp_all_thrd_cfg - voq
520 * @dsaf_id: dsa fabric id
521 */
522static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
523{
524 u32 voq_bp_all_thrd;
525 u32 i;
526
527 for (i = 0; i < DSAF_VOQ_NUM; i++) {
528 voq_bp_all_thrd = dsaf_read_dev(
529 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
530 if (i < DSAF_XGE_NUM) {
531 dsaf_set_field(voq_bp_all_thrd,
532 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
533 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
534 dsaf_set_field(voq_bp_all_thrd,
535 DSAF_VOQ_BP_ALL_UPTHRD_M,
536 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
537 } else {
538 dsaf_set_field(voq_bp_all_thrd,
539 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
540 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
541 dsaf_set_field(voq_bp_all_thrd,
542 DSAF_VOQ_BP_ALL_UPTHRD_M,
543 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
544 }
545 dsaf_write_dev(
546 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
547 voq_bp_all_thrd);
548 }
549}
550
551/**
552 * hns_dsaf_tbl_tcam_data_cfg - tbl
553 * @dsaf_id: dsa fabric id
554 * @ptbl_tcam_data: addr
555 */
556static void hns_dsaf_tbl_tcam_data_cfg(
557 struct dsaf_device *dsaf_dev,
558 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
559{
560 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
561 ptbl_tcam_data->tbl_tcam_data_low);
562 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
563 ptbl_tcam_data->tbl_tcam_data_high);
564}
565
566/**
567 * dsaf_tbl_tcam_mcast_cfg - tbl
568 * @dsaf_id: dsa fabric id
569 * @ptbl_tcam_mcast: addr
570 */
571static void hns_dsaf_tbl_tcam_mcast_cfg(
572 struct dsaf_device *dsaf_dev,
573 struct dsaf_tbl_tcam_mcast_cfg *mcast)
574{
575 u32 mcast_cfg4;
576
577 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
578 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
579 mcast->tbl_mcast_item_vld);
580 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
581 mcast->tbl_mcast_old_en);
582 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
583 DSAF_TBL_MCAST_CFG4_VM128_112_S,
584 mcast->tbl_mcast_port_msk[4]);
585 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
586
587 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
588 mcast->tbl_mcast_port_msk[3]);
589
590 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
591 mcast->tbl_mcast_port_msk[2]);
592
593 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
594 mcast->tbl_mcast_port_msk[1]);
595
596 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
597 mcast->tbl_mcast_port_msk[0]);
598}
599
600/**
601 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
602 * @dsaf_id: dsa fabric id
603 * @ptbl_tcam_ucast: addr
604 */
605static void hns_dsaf_tbl_tcam_ucast_cfg(
606 struct dsaf_device *dsaf_dev,
607 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
608{
609 u32 ucast_cfg1;
610
611 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
612 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
613 tbl_tcam_ucast->tbl_ucast_mac_discard);
614 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
615 tbl_tcam_ucast->tbl_ucast_item_vld);
616 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
617 tbl_tcam_ucast->tbl_ucast_old_en);
618 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
619 tbl_tcam_ucast->tbl_ucast_dvc);
620 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
621 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
622 tbl_tcam_ucast->tbl_ucast_out_port);
623 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
624}
625
626/**
627 * hns_dsaf_tbl_line_cfg - tbl
628 * @dsaf_id: dsa fabric id
629 * @ptbl_lin: addr
630 */
631static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
632 struct dsaf_tbl_line_cfg *tbl_lin)
633{
634 u32 tbl_line;
635
636 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
637 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
638 tbl_lin->tbl_line_mac_discard);
639 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
640 tbl_lin->tbl_line_dvc);
641 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
642 DSAF_TBL_LINE_CFG_OUT_PORT_S,
643 tbl_lin->tbl_line_out_port);
644 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
645}
646
647/**
648 * hns_dsaf_tbl_tcam_mcast_pul - tbl
649 * @dsaf_id: dsa fabric id
650 */
651static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
652{
653 u32 o_tbl_pul;
654
655 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
656 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
657 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
658 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
659 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
660}
661
662/**
663 * hns_dsaf_tbl_line_pul - tbl
664 * @dsaf_id: dsa fabric id
665 */
666static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
667{
668 u32 tbl_pul;
669
670 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
671 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
672 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
673 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
674 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
675}
676
677/**
678 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
679 * @dsaf_id: dsa fabric id
680 */
681static void hns_dsaf_tbl_tcam_data_mcast_pul(
682 struct dsaf_device *dsaf_dev)
683{
684 u32 o_tbl_pul;
685
686 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
687 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
688 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
689 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
690 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
691 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
692 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
693}
694
695/**
696 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
697 * @dsaf_id: dsa fabric id
698 */
699static void hns_dsaf_tbl_tcam_data_ucast_pul(
700 struct dsaf_device *dsaf_dev)
701{
702 u32 o_tbl_pul;
703
704 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
705 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
706 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
707 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
708 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
709 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
710 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
711}
712
4568637f 713void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
714{
715 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_MIX_MODE_S, !!en);
716}
717
68c222a6 718void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
719{
720 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
721 dsaf_dev->mac_cb[mac_id].mac_type == HNAE_PORT_DEBUG)
722 return;
723
724 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
725 DSAFV2_SERDES_LBK_EN_B, !!en);
726}
727
511e6bc0 728/**
729 * hns_dsaf_tbl_stat_en - tbl
730 * @dsaf_id: dsa fabric id
731 * @ptbl_stat_en: addr
732 */
733static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
734{
735 u32 o_tbl_ctrl;
736
737 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
738 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
739 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
740 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
741 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
742 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
743}
744
745/**
746 * hns_dsaf_rocee_bp_en - rocee back press enable
747 * @dsaf_id: dsa fabric id
748 */
749static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
750{
6f80563c
QX		 751 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
752 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
753 DSAF_FC_XGE_TX_PAUSE_S, 1);
511e6bc0 754}
755
756/* set msk for dsaf exception irq*/
757static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
758 u32 chnn_num, u32 mask_set)
759{
760 dsaf_write_dev(dsaf_dev,
761 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
762}
763
764static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
765 u32 chnn_num, u32 msk_set)
766{
767 dsaf_write_dev(dsaf_dev,
768 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
769}
770
771static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
772 u32 chnn, u32 msk_set)
773{
774 dsaf_write_dev(dsaf_dev,
775 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
776}
777
778static void
779hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
780{
781 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
782}
783
784/* clr dsaf exception irq*/
785static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
786 u32 chnn_num, u32 int_src)
787{
788 dsaf_write_dev(dsaf_dev,
789 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
790}
791
792static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
793 u32 chnn, u32 int_src)
794{
795 dsaf_write_dev(dsaf_dev,
796 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
797}
798
799static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
800 u32 chnn, u32 int_src)
801{
802 dsaf_write_dev(dsaf_dev,
803 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
804}
805
806static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
807 u32 int_src)
808{
809 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
810}
811
812/**
813 * hns_dsaf_single_line_tbl_cfg - INT
814 * @dsaf_id: dsa fabric id
815 * @address:
816 * @ptbl_line:
817 */
818static void hns_dsaf_single_line_tbl_cfg(
819 struct dsaf_device *dsaf_dev,
820 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
821{
822 /*Write Addr*/
823 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
824
825 /*Write Line*/
826 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
827
828 /*Write Plus*/
829 hns_dsaf_tbl_line_pul(dsaf_dev);
830}
831
832/**
833 * hns_dsaf_tcam_uc_cfg - INT
834 * @dsaf_id: dsa fabric id
835 * @address,
836 * @ptbl_tcam_data,
837 */
838static void hns_dsaf_tcam_uc_cfg(
839 struct dsaf_device *dsaf_dev, u32 address,
840 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
841 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
842{
843 /*Write Addr*/
844 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
845 /*Write Tcam Data*/
846 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
847 /*Write Tcam Ucast*/
848 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
849 /*Write Plus*/
850 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
851}
852
853/**
854 * hns_dsaf_tcam_mc_cfg - INT
855 * @dsaf_id: dsa fabric id
856 * @address,
857 * @ptbl_tcam_data,
858 * @ptbl_tcam_mcast,
859 */
860static void hns_dsaf_tcam_mc_cfg(
861 struct dsaf_device *dsaf_dev, u32 address,
862 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
863 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
864{
865 /*Write Addr*/
866 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
867 /*Write Tcam Data*/
868 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
869 /*Write Tcam Mcast*/
870 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
871 /*Write Plus*/
872 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
873}
874
875/**
876 * hns_dsaf_tcam_mc_invld - INT
877 * @dsaf_id: dsa fabric id
878 * @address
879 */
880static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
881{
882 /*Write Addr*/
883 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
884
885 /*write tcam mcast*/
886 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
887 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
888 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
889 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
890 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
891
892 /*Write Plus*/
893 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
894}
895
896/**
897 * hns_dsaf_tcam_uc_get - INT
898 * @dsaf_id: dsa fabric id
899 * @address
900 * @ptbl_tcam_data
901 * @ptbl_tcam_ucast
902 */
903static void hns_dsaf_tcam_uc_get(
904 struct dsaf_device *dsaf_dev, u32 address,
905 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
906 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
907{
908 u32 tcam_read_data0;
909 u32 tcam_read_data4;
910
911 /*Write Addr*/
912 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
913
914 /*read tcam item puls*/
915 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
916
917 /*read tcam data*/
918 ptbl_tcam_data->tbl_tcam_data_high
919 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
920 ptbl_tcam_data->tbl_tcam_data_low
921 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
922
923 /*read tcam mcast*/
924 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
925 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
926 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
927 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
928
929 ptbl_tcam_ucast->tbl_ucast_item_vld
930 = dsaf_get_bit(tcam_read_data4,
931 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
932 ptbl_tcam_ucast->tbl_ucast_old_en
933 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
934 ptbl_tcam_ucast->tbl_ucast_mac_discard
935 = dsaf_get_bit(tcam_read_data0,
936 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
937 ptbl_tcam_ucast->tbl_ucast_out_port
938 = dsaf_get_field(tcam_read_data0,
939 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
940 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
941 ptbl_tcam_ucast->tbl_ucast_dvc
942 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
943}
944
945/**
946 * hns_dsaf_tcam_mc_get - INT
947 * @dsaf_id: dsa fabric id
948 * @address
949 * @ptbl_tcam_data
950 * @ptbl_tcam_ucast
951 */
952static void hns_dsaf_tcam_mc_get(
953 struct dsaf_device *dsaf_dev, u32 address,
954 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
955 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
956{
957 u32 data_tmp;
958
959 /*Write Addr*/
960 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
961
962 /*read tcam item puls*/
963 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
964
965 /*read tcam data*/
966 ptbl_tcam_data->tbl_tcam_data_high =
967 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
968 ptbl_tcam_data->tbl_tcam_data_low =
969 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
970
971 /*read tcam mcast*/
972 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
973 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
974 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
975 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
976 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
977 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
978 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
979 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
980
981 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
982 ptbl_tcam_mcast->tbl_mcast_item_vld =
983 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
984 ptbl_tcam_mcast->tbl_mcast_old_en =
985 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
986 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
987 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
988 DSAF_TBL_MCAST_CFG4_VM128_112_S);
989}
990
991/**
992 * hns_dsaf_tbl_line_init - INT
993 * @dsaf_id: dsa fabric id
994 */
995static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
996{
997 u32 i;
998 /* defaultly set all lineal mac table entry resulting discard */
999 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1000
1001 for (i = 0; i < DSAF_LINE_SUM; i++)
1002 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1003}
1004
1005/**
1006 * hns_dsaf_tbl_tcam_init - INT
1007 * @dsaf_id: dsa fabric id
1008 */
1009static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1010{
1011 u32 i;
1012 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1013 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1014
1015 /*tcam tbl*/
1016 for (i = 0; i < DSAF_TCAM_SUM; i++)
1017 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1018}
1019
1020/**
1021 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1022 * @mac_cb: mac contrl block
1023 */
1024static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
5ada37b5 1025 int mac_id, int tc_en)
511e6bc0 1026{
5ada37b5
L		 1027 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1028}
1029
1030static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1031 int mac_id, int tx_en, int rx_en)
1032{
1033 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1034 if (!tx_en || !rx_en)
1035 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1036
1037 return;
1038 }
1039
1040 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1041 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1042 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1043 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1044}
1045
1046int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1047 u32 en)
1048{
1049 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1050 if (!en)
1051 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1052
1053 return -EINVAL;
1054 }
1055
1056 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1057 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1058
1059 return 0;
1060}
1061
1062void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1063 u32 *en)
1064{
1065 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1066 *en = 1;
511e6bc0 1067 else
5ada37b5
L		 1068 *en = dsaf_get_dev_bit(dsaf_dev,
1069 DSAF_PAUSE_CFG_REG + mac_id * 4,
1070 DSAF_MAC_PAUSE_RX_EN_B);
511e6bc0 1071}
1072
1073/**
1074 * hns_dsaf_tbl_tcam_init - INT
1075 * @dsaf_id: dsa fabric id
1076 * @dsaf_mode
1077 */
1078static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1079{
1080 u32 i;
1081 u32 o_dsaf_cfg;
5ada37b5 1082 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
511e6bc0 1083
1084 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1085 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1086 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1087 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1088 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1089 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1090 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1091
1092 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1093 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1094
1095 /* set 22 queue per tx ppe engine, only used in switch mode */
1096 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1097
4568637f 1098 /* set promisc def queue id */
1099 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1100
68c222a6 1101 /* set inner loopback queue id */
1102 hns_dsaf_inner_qid_cfg(dsaf_dev);
1103
511e6bc0 1104 /* in non switch mode, set all port to access mode */
1105 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1106
1107 /*set dsaf pfc to 0 for parseing rx pause*/
5ada37b5 1108 for (i = 0; i < DSAF_COMM_CHN; i++) {
511e6bc0 1109 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
5ada37b5
L		 1110 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1111 }
511e6bc0 1112
1113 /*msk and clr exception irqs */
1114 for (i = 0; i < DSAF_COMM_CHN; i++) {
1115 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1116 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1117 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1118
1119 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1120 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1121 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1122 }
1123 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1124 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1125}
1126
1127/**
1128 * hns_dsaf_inode_init - INT
1129 * @dsaf_id: dsa fabric id
1130 */
1131static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1132{
1133 u32 reg;
1134 u32 tc_cfg;
1135 u32 i;
1136
1137 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1138 tc_cfg = HNS_DSAF_I4TC_CFG;
1139 else
1140 tc_cfg = HNS_DSAF_I8TC_CFG;
1141
13ac695e
S		 1142 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1143 for (i = 0; i < DSAF_INODE_NUM; i++) {
1144 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1145 dsaf_set_dev_field(dsaf_dev, reg,
1146 DSAF_INODE_IN_PORT_NUM_M,
1147 DSAF_INODE_IN_PORT_NUM_S,
1148 i % DSAF_XGE_NUM);
1149 }
1150 } else {
1151 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1152 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1153 dsaf_set_dev_field(dsaf_dev, reg,
1154 DSAF_INODE_IN_PORT_NUM_M,
1155 DSAF_INODE_IN_PORT_NUM_S, 0);
1156 dsaf_set_dev_field(dsaf_dev, reg,
1157 DSAFV2_INODE_IN_PORT1_NUM_M,
1158 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1159 dsaf_set_dev_field(dsaf_dev, reg,
1160 DSAFV2_INODE_IN_PORT2_NUM_M,
1161 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1162 dsaf_set_dev_field(dsaf_dev, reg,
1163 DSAFV2_INODE_IN_PORT3_NUM_M,
1164 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1165 dsaf_set_dev_field(dsaf_dev, reg,
1166 DSAFV2_INODE_IN_PORT4_NUM_M,
1167 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1168 dsaf_set_dev_field(dsaf_dev, reg,
1169 DSAFV2_INODE_IN_PORT5_NUM_M,
1170 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1171 }
1172 }
511e6bc0 1173 for (i = 0; i < DSAF_INODE_NUM; i++) {
511e6bc0 1174 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1175 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1176 }
1177}
1178
1179/**
1180 * hns_dsaf_sbm_init - INT
1181 * @dsaf_id: dsa fabric id
1182 */
1183static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1184{
1185 u32 flag;
13ac695e 1186 u32 finish_msk;
511e6bc0 1187 u32 cnt = 0;
1188 int ret;
1189
13ac695e
S		 1190 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1191 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1192 finish_msk = DSAF_SRAM_INIT_OVER_M;
1193 } else {
1194 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1195 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1196 }
511e6bc0 1197
1198 /* enable sbm chanel, disable sbm chanel shcut function*/
1199 hns_dsaf_sbm_cfg(dsaf_dev);
1200
1201 /* enable sbm mib */
1202 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1203 if (ret) {
1204 dev_err(dsaf_dev->dev,
1205 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1206 dsaf_dev->ae_dev.name, ret);
1207 return ret;
1208 }
1209
1210 /* enable sbm initial link sram */
1211 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1212
1213 do {
1214 usleep_range(200, 210);/*udelay(200);*/
13ac695e
S		 1215 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1216 finish_msk, DSAF_SRAM_INIT_OVER_S);
511e6bc0 1217 cnt++;
13ac695e
S		 1218 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1219 cnt < DSAF_CFG_READ_CNT);
511e6bc0 1220
13ac695e 1221 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
511e6bc0 1222 dev_err(dsaf_dev->dev,
1223 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1224 dsaf_dev->ae_dev.name, flag, cnt);
1225 return -ENODEV;
1226 }
1227
1228 hns_dsaf_rocee_bp_en(dsaf_dev);
1229
1230 return 0;
1231}
1232
1233/**
1234 * hns_dsaf_tbl_init - INT
1235 * @dsaf_id: dsa fabric id
1236 */
1237static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1238{
1239 hns_dsaf_tbl_stat_en(dsaf_dev);
1240
1241 hns_dsaf_tbl_tcam_init(dsaf_dev);
1242 hns_dsaf_tbl_line_init(dsaf_dev);
1243}
1244
1245/**
1246 * hns_dsaf_voq_init - INT
1247 * @dsaf_id: dsa fabric id
1248 */
1249static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1250{
1251 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1252}
1253
1254/**
1255 * hns_dsaf_init_hw - init dsa fabric hardware
1256 * @dsaf_dev: dsa fabric device struct pointer
1257 */
1258static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1259{
1260 int ret;
1261
1262 dev_dbg(dsaf_dev->dev,
1263 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1264
1265 hns_dsaf_rst(dsaf_dev, 0);
1266 mdelay(10);
1267 hns_dsaf_rst(dsaf_dev, 1);
1268
1269 hns_dsaf_comm_init(dsaf_dev);
1270
1271 /*init XBAR_INODE*/
1272 hns_dsaf_inode_init(dsaf_dev);
1273
1274 /*init SBM*/
1275 ret = hns_dsaf_sbm_init(dsaf_dev);
1276 if (ret)
1277 return ret;
1278
1279 /*init TBL*/
1280 hns_dsaf_tbl_init(dsaf_dev);
1281
1282 /*init VOQ*/
1283 hns_dsaf_voq_init(dsaf_dev);
1284
1285 return 0;
1286}
1287
1288/**
1289 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1290 * @dsaf_dev: dsa fabric device struct pointer
1291 */
1292static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1293{
1294 /*reset*/
1295 hns_dsaf_rst(dsaf_dev, 0);
1296}
1297
1298/**
1299 * hns_dsaf_init - init dsa fabric
1300 * @dsaf_dev: dsa fabric device struct pointer
1301 * retuen 0 - success , negative --fail
1302 */
1303static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1304{
1305 struct dsaf_drv_priv *priv =
1306 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1307 u32 i;
1308 int ret;
1309
1310 ret = hns_dsaf_init_hw(dsaf_dev);
1311 if (ret)
1312 return ret;
1313
1314 /* malloc mem for tcam mac key(vlan+mac) */
1315 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1316 * DSAF_TCAM_SUM);
1317 if (!priv->soft_mac_tbl) {
1318 ret = -ENOMEM;
1319 goto remove_hw;
1320 }
1321
1322 /*all entry invall */
1323 for (i = 0; i < DSAF_TCAM_SUM; i++)
1324 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1325
1326 return 0;
1327
1328remove_hw:
1329 hns_dsaf_remove_hw(dsaf_dev);
1330 return ret;
1331}
1332
1333/**
1334 * hns_dsaf_free - free dsa fabric
1335 * @dsaf_dev: dsa fabric device struct pointer
1336 */
1337static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1338{
1339 struct dsaf_drv_priv *priv =
1340 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1341
1342 hns_dsaf_remove_hw(dsaf_dev);
1343
1344 /* free all mac mem */
1345 vfree(priv->soft_mac_tbl);
1346 priv->soft_mac_tbl = NULL;
1347}
1348
1349/**
1350 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1351 * @dsaf_dev: dsa fabric device struct pointer
1352 * @mac_key: mac entry struct pointer
1353 */
1354static u16 hns_dsaf_find_soft_mac_entry(
1355 struct dsaf_device *dsaf_dev,
1356 struct dsaf_drv_tbl_tcam_key *mac_key)
1357{
1358 struct dsaf_drv_priv *priv =
1359 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1360 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1361 u32 i;
1362
1363 soft_mac_entry = priv->soft_mac_tbl;
1364 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1365 /* invall tab entry */
1366 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1367 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1368 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1369 /* return find result --soft index */
1370 return soft_mac_entry->index;
1371
1372 soft_mac_entry++;
1373 }
1374 return DSAF_INVALID_ENTRY_IDX;
1375}
1376
1377/**
1378 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1379 * @dsaf_dev: dsa fabric device struct pointer
1380 */
1381static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1382{
1383 struct dsaf_drv_priv *priv =
1384 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1385 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1386 u32 i;
1387
1388 soft_mac_entry = priv->soft_mac_tbl;
1389 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1390 /* inv all entry */
1391 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1392 /* return find result --soft index */
1393 return i;
1394
1395 soft_mac_entry++;
1396 }
1397 return DSAF_INVALID_ENTRY_IDX;
1398}
1399
1400/**
1401 * hns_dsaf_set_mac_key - set mac key
1402 * @dsaf_dev: dsa fabric device struct pointer
1403 * @mac_key: tcam key pointer
1404 * @vlan_id: vlan id
1405 * @in_port_num: input port num
1406 * @addr: mac addr
1407 */
1408static void hns_dsaf_set_mac_key(
1409 struct dsaf_device *dsaf_dev,
1410 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1411 u8 *addr)
1412{
1413 u8 port;
1414
1415 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1416 /*DSAF mode : in port id fixed 0*/
1417 port = 0;
1418 else
1419 /*non-dsaf mode*/
1420 port = in_port_num;
1421
1422 mac_key->high.bits.mac_0 = addr[0];
1423 mac_key->high.bits.mac_1 = addr[1];
1424 mac_key->high.bits.mac_2 = addr[2];
1425 mac_key->high.bits.mac_3 = addr[3];
1426 mac_key->low.bits.mac_4 = addr[4];
1427 mac_key->low.bits.mac_5 = addr[5];
1428 mac_key->low.bits.vlan = vlan_id;
1429 mac_key->low.bits.port = port;
1430}
1431
1432/**
1433 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1434 * @dsaf_dev: dsa fabric device struct pointer
1435 * @mac_entry: uc-mac entry
1436 */
1437int hns_dsaf_set_mac_uc_entry(
1438 struct dsaf_device *dsaf_dev,
1439 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1440{
1441 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1442 struct dsaf_drv_tbl_tcam_key mac_key;
1443 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1444 struct dsaf_drv_priv *priv =
1445 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1446 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1447
1448 /* mac addr check */
1449 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1450 MAC_IS_BROADCAST(mac_entry->addr) ||
1451 MAC_IS_MULTICAST(mac_entry->addr)) {
98900a80
AS		 1452 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1453 dsaf_dev->ae_dev.name, mac_entry->addr);
511e6bc0 1454 return -EINVAL;
1455 }
1456
1457 /* config key */
1458 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1459 mac_entry->in_port_num, mac_entry->addr);
1460
1461 /* entry ie exist? */
1462 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1463 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1464 /*if has not inv entry,find a empty entry */
1465 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1466 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1467 /* has not empty,return error */
1468 dev_err(dsaf_dev->dev,
1469 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1470 dsaf_dev->ae_dev.name,
1471 mac_key.high.val, mac_key.low.val);
1472 return -EINVAL;
1473 }
1474 }
1475
1476 dev_dbg(dsaf_dev->dev,
1477 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1478 dsaf_dev->ae_dev.name, mac_key.high.val,
1479 mac_key.low.val, entry_index);
1480
1481 /* config hardware entry */
1482 mac_data.tbl_ucast_item_vld = 1;
1483 mac_data.tbl_ucast_mac_discard = 0;
1484 mac_data.tbl_ucast_old_en = 0;
1485 /* default config dvc to 0 */
1486 mac_data.tbl_ucast_dvc = 0;
1487 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1488 hns_dsaf_tcam_uc_cfg(
1489 dsaf_dev, entry_index,
1490 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1491
1492 /* config software entry */
1493 soft_mac_entry += entry_index;
1494 soft_mac_entry->index = entry_index;
1495 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1496 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1497
1498 return 0;
1499}
1500
1501/**
1502 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1503 * @dsaf_dev: dsa fabric device struct pointer
1504 * @mac_entry: mc-mac entry
1505 */
1506int hns_dsaf_set_mac_mc_entry(
1507 struct dsaf_device *dsaf_dev,
1508 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1509{
1510 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1511 struct dsaf_drv_tbl_tcam_key mac_key;
1512 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1513 struct dsaf_drv_priv *priv =
1514 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1515 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1516 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1517
1518 /* mac addr check */
1519 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1520 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1521 dsaf_dev->ae_dev.name, mac_entry->addr);
511e6bc0 1522 return -EINVAL;
1523 }
1524
1525 /*config key */
1526 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1527 mac_entry->in_vlan_id,
1528 mac_entry->in_port_num, mac_entry->addr);
1529
1530 /* entry ie exist? */
1531 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1532 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1533 /*if hasnot, find enpty entry*/
1534 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1535 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1536 /*if hasnot empty, error*/
1537 dev_err(dsaf_dev->dev,
1538 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1539 dsaf_dev->ae_dev.name,
1540 mac_key.high.val, mac_key.low.val);
1541 return -EINVAL;
1542 }
1543
1544 /* config hardware entry */
1545 memset(mac_data.tbl_mcast_port_msk,
1546 0, sizeof(mac_data.tbl_mcast_port_msk));
1547 } else {
1548 /* config hardware entry */
1549 hns_dsaf_tcam_mc_get(
1550 dsaf_dev, entry_index,
1551 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1552 }
1553 mac_data.tbl_mcast_old_en = 0;
1554 mac_data.tbl_mcast_item_vld = 1;
1555 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1556 0x3F, 0, mac_entry->port_mask[0]);
1557
1558 dev_dbg(dsaf_dev->dev,
1559 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1560 dsaf_dev->ae_dev.name, mac_key.high.val,
1561 mac_key.low.val, entry_index);
1562
1563 hns_dsaf_tcam_mc_cfg(
1564 dsaf_dev, entry_index,
1565 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1566
1567 /* config software entry */
1568 soft_mac_entry += entry_index;
1569 soft_mac_entry->index = entry_index;
1570 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1571 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1572
1573 return 0;
1574}
1575
1576/**
1577 * hns_dsaf_add_mac_mc_port - add mac mc-port
1578 * @dsaf_dev: dsa fabric device struct pointer
1579 * @mac_entry: mc-mac entry
1580 */
1581int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1582 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1583{
1584 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1585 struct dsaf_drv_tbl_tcam_key mac_key;
1586 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1587 struct dsaf_drv_priv *priv =
1588 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1589 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1590 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1591 int mskid;
1592
1593 /*chechk mac addr */
1594 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1595 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1596 mac_entry->addr);
511e6bc0 1597 return -EINVAL;
1598 }
1599
1600 /*config key */
1601 hns_dsaf_set_mac_key(
1602 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1603 mac_entry->in_port_num, mac_entry->addr);
1604
1605 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1606
1607 /*check exist? */
1608 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1609 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1610 /*if hasnot , find a empty*/
1611 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1612 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1613 /*if hasnot empty, error*/
1614 dev_err(dsaf_dev->dev,
1615 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1616 dsaf_dev->ae_dev.name, mac_key.high.val,
1617 mac_key.low.val);
1618 return -EINVAL;
1619 }
1620 } else {
1621 /*if exist, add in */
1622 hns_dsaf_tcam_mc_get(
1623 dsaf_dev, entry_index,
1624 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1625 }
1626 /* config hardware entry */
1627 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1628 mskid = mac_entry->port_num;
1629 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1630 mskid = mac_entry->port_num -
1631 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1632 } else {
1633 dev_err(dsaf_dev->dev,
1634 "%s,pnum(%d)error,key(%#x:%#x)\n",
1635 dsaf_dev->ae_dev.name, mac_entry->port_num,
1636 mac_key.high.val, mac_key.low.val);
1637 return -EINVAL;
1638 }
1639 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1640 mac_data.tbl_mcast_old_en = 0;
1641 mac_data.tbl_mcast_item_vld = 1;
1642
1643 dev_dbg(dsaf_dev->dev,
1644 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1645 dsaf_dev->ae_dev.name, mac_key.high.val,
1646 mac_key.low.val, entry_index);
1647
1648 hns_dsaf_tcam_mc_cfg(
1649 dsaf_dev, entry_index,
1650 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1651
1652 /*config software entry */
1653 soft_mac_entry += entry_index;
1654 soft_mac_entry->index = entry_index;
1655 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1656 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1657
1658 return 0;
1659}
1660
1661/**
1662 * hns_dsaf_del_mac_entry - del mac mc-port
1663 * @dsaf_dev: dsa fabric device struct pointer
1664 * @vlan_id: vlian id
1665 * @in_port_num: input port num
1666 * @addr : mac addr
1667 */
1668int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1669 u8 in_port_num, u8 *addr)
1670{
1671 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1672 struct dsaf_drv_tbl_tcam_key mac_key;
1673 struct dsaf_drv_priv *priv =
1674 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1675 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1676
1677 /*check mac addr */
1678 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
98900a80
AS		 1679 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1680 addr);
511e6bc0 1681 return -EINVAL;
1682 }
1683
1684 /*config key */
1685 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1686
1687 /*exist ?*/
1688 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1689 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1690 /*not exist, error */
1691 dev_err(dsaf_dev->dev,
1692 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1693 dsaf_dev->ae_dev.name,
1694 mac_key.high.val, mac_key.low.val);
1695 return -EINVAL;
1696 }
1697 dev_dbg(dsaf_dev->dev,
1698 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1699 dsaf_dev->ae_dev.name, mac_key.high.val,
1700 mac_key.low.val, entry_index);
1701
1702 /*do del opt*/
1703 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1704
1705 /*del soft emtry */
1706 soft_mac_entry += entry_index;
1707 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1708
1709 return 0;
1710}
1711
1712/**
1713 * hns_dsaf_del_mac_mc_port - del mac mc- port
1714 * @dsaf_dev: dsa fabric device struct pointer
1715 * @mac_entry: mac entry
1716 */
1717int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1718 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1719{
1720 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1721 struct dsaf_drv_tbl_tcam_key mac_key;
1722 struct dsaf_drv_priv *priv =
1723 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1724 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1725 u16 vlan_id;
1726 u8 in_port_num;
1727 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1728 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1729 int mskid;
1730 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1731
1732 if (!(void *)mac_entry) {
1733 dev_err(dsaf_dev->dev,
1734 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1735 return -EINVAL;
1736 }
1737
1738 /*get key info*/
1739 vlan_id = mac_entry->in_vlan_id;
1740 in_port_num = mac_entry->in_port_num;
1741
1742 /*check mac addr */
1743 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1744 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1745 mac_entry->addr);
511e6bc0 1746 return -EINVAL;
1747 }
1748
1749 /*config key */
1750 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1751 mac_entry->addr);
1752
1753 /*check is exist? */
1754 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1755 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1756 /*find none */
1757 dev_err(dsaf_dev->dev,
1758 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1759 dsaf_dev->ae_dev.name,
1760 mac_key.high.val, mac_key.low.val);
1761 return -EINVAL;
1762 }
1763
1764 dev_dbg(dsaf_dev->dev,
1765 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1766 dsaf_dev->ae_dev.name, mac_key.high.val,
1767 mac_key.low.val, entry_index);
1768
1769 /*read entry*/
1770 hns_dsaf_tcam_mc_get(
1771 dsaf_dev, entry_index,
1772 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1773
1774 /*del the port*/
1775 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1776 mskid = mac_entry->port_num;
1777 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1778 mskid = mac_entry->port_num -
1779 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1780 } else {
1781 dev_err(dsaf_dev->dev,
1782 "%s,pnum(%d)error,key(%#x:%#x)\n",
1783 dsaf_dev->ae_dev.name, mac_entry->port_num,
1784 mac_key.high.val, mac_key.low.val);
1785 return -EINVAL;
1786 }
1787 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1788
1789 /*check non port, do del entry */
1790 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1791 sizeof(mac_data.tbl_mcast_port_msk))) {
1792 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1793
1794 /* del soft entry */
1795 soft_mac_entry += entry_index;
1796 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1797 } else { /* not zer, just del port, updata*/
1798 hns_dsaf_tcam_mc_cfg(
1799 dsaf_dev, entry_index,
1800 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1801 }
1802
1803 return 0;
1804}
1805
1806/**
1807 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1808 * @dsaf_dev: dsa fabric device struct pointer
1809 * @mac_entry: mac entry
1810 */
1811int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1812 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1813{
1814 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1815 struct dsaf_drv_tbl_tcam_key mac_key;
1816
1817 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1818
1819 /* check macaddr */
1820 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1821 MAC_IS_BROADCAST(mac_entry->addr)) {
98900a80
AS		 1822 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1823 mac_entry->addr);
511e6bc0 1824 return -EINVAL;
1825 }
1826
1827 /*config key */
1828 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1829 mac_entry->in_port_num, mac_entry->addr);
1830
1831 /*check exist? */
1832 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1833 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1834 /*find none, error */
1835 dev_err(dsaf_dev->dev,
1836 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1837 dsaf_dev->ae_dev.name,
1838 mac_key.high.val, mac_key.low.val);
1839 return -EINVAL;
1840 }
1841 dev_dbg(dsaf_dev->dev,
1842 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1843 dsaf_dev->ae_dev.name, mac_key.high.val,
1844 mac_key.low.val, entry_index);
1845
1846 /*read entry*/
1847 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1848 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1849 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1850
1851 return 0;
1852}
1853
1854/**
1855 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1856 * @dsaf_dev: dsa fabric device struct pointer
1857 * @mac_entry: mac entry
1858 */
1859int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1860 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1861{
1862 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1863 struct dsaf_drv_tbl_tcam_key mac_key;
1864
1865 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1866
1867 /*check mac addr */
1868 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1869 MAC_IS_BROADCAST(mac_entry->addr)) {
98900a80
AS		 1870 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1871 mac_entry->addr);
511e6bc0 1872 return -EINVAL;
1873 }
1874
1875 /*config key */
1876 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1877 mac_entry->in_port_num, mac_entry->addr);
1878
1879 /*check exist? */
1880 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1881 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1882 /* find none, error */
1883 dev_err(dsaf_dev->dev,
1884 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1885 dsaf_dev->ae_dev.name, mac_key.high.val,
1886 mac_key.low.val);
1887 return -EINVAL;
1888 }
1889 dev_dbg(dsaf_dev->dev,
1890 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1891 dsaf_dev->ae_dev.name, mac_key.high.val,
1892 mac_key.low.val, entry_index);
1893
1894 /*read entry */
1895 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1896 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1897
1898 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1899 return 0;
1900}
1901
1902/**
1903 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1904 * @dsaf_dev: dsa fabric device struct pointer
1905 * @entry_index: tab entry index
1906 * @mac_entry: mac entry
1907 */
1908int hns_dsaf_get_mac_entry_by_index(
1909 struct dsaf_device *dsaf_dev,
1910 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1911{
1912 struct dsaf_drv_tbl_tcam_key mac_key;
1913
1914 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1915 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1916 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1917
1918 if (entry_index >= DSAF_TCAM_SUM) {
1919 /* find none, del error */
1920 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1921 dsaf_dev->ae_dev.name);
1922 return -EINVAL;
1923 }
1924
1925 /* mc entry, do read opt */
1926 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1927 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1928
1929 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1930
1931 /***get mac addr*/
1932 mac_addr[0] = mac_key.high.bits.mac_0;
1933 mac_addr[1] = mac_key.high.bits.mac_1;
1934 mac_addr[2] = mac_key.high.bits.mac_2;
1935 mac_addr[3] = mac_key.high.bits.mac_3;
1936 mac_addr[4] = mac_key.low.bits.mac_4;
1937 mac_addr[5] = mac_key.low.bits.mac_5;
1938 /**is mc or uc*/
1939 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1940 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1941 /**mc donot do*/
1942 } else {
1943 /*is not mc, just uc... */
1944 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1945 (struct dsaf_tbl_tcam_data *)&mac_key,
1946 &mac_uc_data);
1947 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1948 }
1949
1950 return 0;
1951}
1952
1953static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1954 size_t sizeof_priv)
1955{
1956 struct dsaf_device *dsaf_dev;
1957
1958 dsaf_dev = devm_kzalloc(dev,
1959 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
1960 if (unlikely(!dsaf_dev)) {
1961 dsaf_dev = ERR_PTR(-ENOMEM);
1962 } else {
1963 dsaf_dev->dev = dev;
1964 dev_set_drvdata(dev, dsaf_dev);
1965 }
1966
1967 return dsaf_dev;
1968}
1969
1970/**
1971 * hns_dsaf_free_dev - free dev mem
1972 * @dev: struct device pointer
1973 */
1974static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
1975{
1976 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
1977}
1978
1979/**
1980 * dsaf_pfc_unit_cnt - set pfc unit count
1981 * @dsaf_id: dsa fabric id
1982 * @pport_rate: value array
1983 * @pdsaf_pfc_unit_cnt: value array
1984 */
1985static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
1986 enum dsaf_port_rate_mode rate)
1987{
1988 u32 unit_cnt;
1989
1990 switch (rate) {
1991 case DSAF_PORT_RATE_10000:
1992 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
1993 break;
1994 case DSAF_PORT_RATE_1000:
1995 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1996 break;
1997 case DSAF_PORT_RATE_2500:
1998 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
1999 break;
2000 default:
2001 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2002 }
2003
2004 dsaf_set_dev_field(dsaf_dev,
2005 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2006 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2007 unit_cnt);
2008}
2009
2010/**
2011 * dsaf_port_work_rate_cfg - fifo
2012 * @dsaf_id: dsa fabric id
2013 * @xge_ge_work_mode
2014 */
2015void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2016 enum dsaf_port_rate_mode rate_mode)
2017{
2018 u32 port_work_mode;
2019
2020 port_work_mode = dsaf_read_dev(
2021 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2022
2023 if (rate_mode == DSAF_PORT_RATE_10000)
2024 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2025 else
2026 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2027
2028 dsaf_write_dev(dsaf_dev,
2029 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2030 port_work_mode);
2031
2032 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2033}
2034
2035/**
2036 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2037 * @mac_cb: mac contrl block
2038 */
2039void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2040{
2041 enum dsaf_port_rate_mode mode;
2042 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2043 int mac_id = mac_cb->mac_id;
2044
2045 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2046 return;
2047 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2048 mode = DSAF_PORT_RATE_10000;
2049 else
2050 mode = DSAF_PORT_RATE_1000;
2051
2052 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2053}
2054
2055void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2056{
2057 struct dsaf_hw_stats *hw_stats
2058 = &dsaf_dev->hw_stats[node_num];
5ada37b5
L		 2059 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2060 u32 reg_tmp;
511e6bc0 2061
2062 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2063 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2064 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2065 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2066 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2067 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2068 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2069 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
5ada37b5
L		 2070
2071 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2072 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2073 hw_stats->rx_pause_frame +=
2074 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2075
511e6bc0 2076 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2077 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2078 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2079 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2080 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2081 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2082 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2083 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2084 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2085 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2086 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2087 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2088
2089 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2090 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2091 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2092 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2093
2094 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2095 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2096}
2097
2098/**
2099 *hns_dsaf_get_regs - dump dsaf regs
2100 *@dsaf_dev: dsaf device
2101 *@data:data for value of regs
2102 */
2103void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2104{
2105 u32 i = 0;
2106 u32 j;
2107 u32 *p = data;
5ada37b5
L		 2108 u32 reg_tmp;
2109 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
511e6bc0 2110
2111 /* dsaf common registers */
2112 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2113 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2114 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2115 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2116 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2117 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2118 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2119 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2120 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2121
2122 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2123 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2124 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2125 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2126 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2127 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2128 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2129 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2130 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2131 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2132 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2133 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2134 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2135 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2136 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2137
2138 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2139 p[24 + i] = dsaf_read_dev(ddev,
2140 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2141
2142 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2143
2144 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2145 p[33 + i] = dsaf_read_dev(ddev,
2146 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2147
2148 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2149 p[41 + i] = dsaf_read_dev(ddev,
2150 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2151
2152 /* dsaf inode registers */
2153 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2154
2155 p[171] = dsaf_read_dev(ddev,
2156 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2157
2158 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2159 j = i * DSAF_COMM_CHN + port;
2160 p[172 + i] = dsaf_read_dev(ddev,
2161 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2162 p[175 + i] = dsaf_read_dev(ddev,
2163 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2164 p[178 + i] = dsaf_read_dev(ddev,
2165 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2166 p[181 + i] = dsaf_read_dev(ddev,
2167 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2168 p[184 + i] = dsaf_read_dev(ddev,
2169 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2170 p[187 + i] = dsaf_read_dev(ddev,
2171 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2172 p[190 + i] = dsaf_read_dev(ddev,
2173 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
5ada37b5
L		 2174 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2175 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2176 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
511e6bc0 2177 p[196 + i] = dsaf_read_dev(ddev,
2178 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2179 p[199 + i] = dsaf_read_dev(ddev,
2180 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2181 p[202 + i] = dsaf_read_dev(ddev,
2182 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2183 p[205 + i] = dsaf_read_dev(ddev,
2184 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2185 p[208 + i] = dsaf_read_dev(ddev,
2186 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2187 p[211 + i] = dsaf_read_dev(ddev,
2188 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2189 p[214 + i] = dsaf_read_dev(ddev,
2190 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2191 p[217 + i] = dsaf_read_dev(ddev,
2192 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2193 p[220 + i] = dsaf_read_dev(ddev,
2194 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2195 p[223 + i] = dsaf_read_dev(ddev,
2196 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2197 p[224 + i] = dsaf_read_dev(ddev,
2198 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2199 }
2200
2201 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2202
2203 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2204 j = i * DSAF_COMM_CHN + port;
2205 p[228 + i] = dsaf_read_dev(ddev,
2206 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2207 }
2208
2209 p[231] = dsaf_read_dev(ddev,
2210 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2211
2212 /* dsaf inode registers */
13ac695e 2213 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
511e6bc0 2214 j = i * DSAF_COMM_CHN + port;
2215 p[232 + i] = dsaf_read_dev(ddev,
2216 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2217 p[235 + i] = dsaf_read_dev(ddev,
2218 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2219 p[238 + i] = dsaf_read_dev(ddev,
2220 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2221 p[241 + i] = dsaf_read_dev(ddev,
2222 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2223 p[244 + i] = dsaf_read_dev(ddev,
2224 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2225 p[245 + i] = dsaf_read_dev(ddev,
2226 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2227 p[248 + i] = dsaf_read_dev(ddev,
2228 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2229 p[251 + i] = dsaf_read_dev(ddev,
2230 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2231 p[254 + i] = dsaf_read_dev(ddev,
2232 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2233 p[257 + i] = dsaf_read_dev(ddev,
2234 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2235 p[260 + i] = dsaf_read_dev(ddev,
2236 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2237 p[263 + i] = dsaf_read_dev(ddev,
2238 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2239 p[266 + i] = dsaf_read_dev(ddev,
2240 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2241 p[269 + i] = dsaf_read_dev(ddev,
2242 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2243 p[272 + i] = dsaf_read_dev(ddev,
2244 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2245 p[275 + i] = dsaf_read_dev(ddev,
2246 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2247 p[278 + i] = dsaf_read_dev(ddev,
2248 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2249 p[281 + i] = dsaf_read_dev(ddev,
2250 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2251 p[284 + i] = dsaf_read_dev(ddev,
2252 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2253 p[287 + i] = dsaf_read_dev(ddev,
2254 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2255 p[290 + i] = dsaf_read_dev(ddev,
2256 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2257 p[293 + i] = dsaf_read_dev(ddev,
2258 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2259 p[296 + i] = dsaf_read_dev(ddev,
2260 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2261 p[299 + i] = dsaf_read_dev(ddev,
2262 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2263 p[302 + i] = dsaf_read_dev(ddev,
2264 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2265 p[305 + i] = dsaf_read_dev(ddev,
2266 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2267 p[308 + i] = dsaf_read_dev(ddev,
2268 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2269 }
2270
2271 /* dsaf onode registers */
2272 for (i = 0; i < DSAF_XOD_NUM; i++) {
2273 p[311 + i] = dsaf_read_dev(ddev,
52613126 2274 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
511e6bc0 2275 p[319 + i] = dsaf_read_dev(ddev,
52613126 2276 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
511e6bc0 2277 p[327 + i] = dsaf_read_dev(ddev,
52613126 2278 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
511e6bc0 2279 p[335 + i] = dsaf_read_dev(ddev,
52613126 2280 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
511e6bc0 2281 p[343 + i] = dsaf_read_dev(ddev,
52613126 2282 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
511e6bc0 2283 p[351 + i] = dsaf_read_dev(ddev,
52613126 2284 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
511e6bc0 2285 }
2286
2287 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2288 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2289 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2290
2291 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2292 j = i * DSAF_COMM_CHN + port;
2293 p[362 + i] = dsaf_read_dev(ddev,
2294 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2295 p[365 + i] = dsaf_read_dev(ddev,
2296 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2297 p[368 + i] = dsaf_read_dev(ddev,
2298 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2299 p[371 + i] = dsaf_read_dev(ddev,
2300 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2301 p[374 + i] = dsaf_read_dev(ddev,
2302 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2303 p[377 + i] = dsaf_read_dev(ddev,
2304 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2305 p[380 + i] = dsaf_read_dev(ddev,
2306 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2307 p[383 + i] = dsaf_read_dev(ddev,
2308 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2309 p[386 + i] = dsaf_read_dev(ddev,
2310 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2311 p[389 + i] = dsaf_read_dev(ddev,
2312 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2313 }
2314
2315 p[392] = dsaf_read_dev(ddev,
2316 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2317 p[393] = dsaf_read_dev(ddev,
2318 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2319 p[394] = dsaf_read_dev(ddev,
2320 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2321 p[395] = dsaf_read_dev(ddev,
2322 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2323 p[396] = dsaf_read_dev(ddev,
2324 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2325 p[397] = dsaf_read_dev(ddev,
2326 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2327 p[398] = dsaf_read_dev(ddev,
2328 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2329 p[399] = dsaf_read_dev(ddev,
2330 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2331 p[400] = dsaf_read_dev(ddev,
2332 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2333 p[401] = dsaf_read_dev(ddev,
2334 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2335 p[402] = dsaf_read_dev(ddev,
2336 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2337 p[403] = dsaf_read_dev(ddev,
2338 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2339 p[404] = dsaf_read_dev(ddev,
2340 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2341
2342 /* dsaf voq registers */
2343 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2344 j = (i * DSAF_COMM_CHN + port) * 0x90;
2345 p[405 + i] = dsaf_read_dev(ddev,
2346 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2347 p[408 + i] = dsaf_read_dev(ddev,
2348 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2349 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2350 p[414 + i] = dsaf_read_dev(ddev,
2351 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2352 p[417 + i] = dsaf_read_dev(ddev,
2353 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2354 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2355 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2356 p[426 + i] = dsaf_read_dev(ddev,
2357 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2358 p[429 + i] = dsaf_read_dev(ddev,
2359 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2360 p[432 + i] = dsaf_read_dev(ddev,
2361 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2362 p[435 + i] = dsaf_read_dev(ddev,
2363 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2364 p[438 + i] = dsaf_read_dev(ddev,
2365 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2366 }
2367
2368 /* dsaf tbl registers */
2369 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2370 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2371 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2372 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2373 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2374 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2375 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2376 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2377 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2378 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2379 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2380 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2381 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2382 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2383 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2384 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2385 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2386 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2387 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2388 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2389 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2390 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2391 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2392
2393 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2394 j = i * 0x8;
2395 p[464 + 2 * i] = dsaf_read_dev(ddev,
2396 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2397 p[465 + 2 * i] = dsaf_read_dev(ddev,
2398 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2399 }
2400
2401 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2402 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2403 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2404 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2405 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2406 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2407 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2408 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2409 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2410 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2411 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2412 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2413
2414 /* dsaf other registers */
2415 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2416 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2417 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2418 p[495] = dsaf_read_dev(ddev,
2419 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2420 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2421 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2422
5ada37b5
L		 2423 if (!is_ver1)
2424 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2425
511e6bc0 2426 /* mark end of dsaf regs */
5ada37b5 2427 for (i = 499; i < 504; i++)
511e6bc0 2428 p[i] = 0xdddddddd;
2429}
2430
2431static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2432{
2433 char *buff = data;
2434
2435 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2436 buff = buff + ETH_GSTRING_LEN;
2437 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2438 buff = buff + ETH_GSTRING_LEN;
2439 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2440 buff = buff + ETH_GSTRING_LEN;
2441 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2442 buff = buff + ETH_GSTRING_LEN;
2443 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2444 buff = buff + ETH_GSTRING_LEN;
2445 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2446 buff = buff + ETH_GSTRING_LEN;
2447 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2448 buff = buff + ETH_GSTRING_LEN;
2449 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2450 buff = buff + ETH_GSTRING_LEN;
2451 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2452 buff = buff + ETH_GSTRING_LEN;
2453 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2454 buff = buff + ETH_GSTRING_LEN;
2455 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2456 buff = buff + ETH_GSTRING_LEN;
2457 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2458 buff = buff + ETH_GSTRING_LEN;
2459 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2460 buff = buff + ETH_GSTRING_LEN;
2461 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2462 buff = buff + ETH_GSTRING_LEN;
2463
2464 return buff;
2465}
2466
2467static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2468 int node_num)
2469{
2470 u64 *p = data;
2471 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2472
2473 p[0] = hw_stats->pad_drop;
2474 p[1] = hw_stats->man_pkts;
2475 p[2] = hw_stats->rx_pkts;
2476 p[3] = hw_stats->rx_pkt_id;
2477 p[4] = hw_stats->rx_pause_frame;
2478 p[5] = hw_stats->release_buf_num;
2479 p[6] = hw_stats->sbm_drop;
2480 p[7] = hw_stats->crc_false;
2481 p[8] = hw_stats->bp_drop;
2482 p[9] = hw_stats->rslt_drop;
2483 p[10] = hw_stats->local_addr_false;
2484 p[11] = hw_stats->vlan_drop;
2485 p[12] = hw_stats->stp_drop;
2486 p[13] = hw_stats->tx_pkts;
2487
2488 return &p[14];
2489}
2490
2491/**
2492 *hns_dsaf_get_stats - get dsaf statistic
2493 *@ddev: dsaf device
2494 *@data:statistic value
2495 *@port: port num
2496 */
2497void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2498{
2499 u64 *p = data;
2500 int node_num = port;
2501
2502 /* for ge/xge node info */
2503 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2504
2505 /* for ppe node info */
2506 node_num = port + DSAF_PPE_INODE_BASE;
2507 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2508}
2509
2510/**
2511 *hns_dsaf_get_sset_count - get dsaf string set count
2512 *@stringset: type of values in data
2513 *return dsaf string name count
2514 */
2515int hns_dsaf_get_sset_count(int stringset)
2516{
2517 if (stringset == ETH_SS_STATS)
2518 return DSAF_STATIC_NUM;
2519
2520 return 0;
2521}
2522
2523/**
2524 *hns_dsaf_get_strings - get dsaf string set
2525 *@stringset:srting set index
2526 *@data:strings name value
2527 *@port:port index
2528 */
2529void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2530{
2531 char *buff = (char *)data;
2532 int node = port;
2533
2534 if (stringset != ETH_SS_STATS)
2535 return;
2536
2537 /* for ge/xge node info */
2538 buff = hns_dsaf_get_node_stats_strings(buff, node);
2539
2540 /* for ppe node info */
2541 node = port + DSAF_PPE_INODE_BASE;
2542 (void)hns_dsaf_get_node_stats_strings(buff, node);
2543}
2544
2545/**
2546 *hns_dsaf_get_sset_count - get dsaf regs count
2547 *return dsaf regs count
2548 */
2549int hns_dsaf_get_regs_count(void)
2550{
2551 return DSAF_DUMP_REGS_NUM;
2552}
2553
2554/**
2555 * dsaf_probe - probo dsaf dev
2556 * @pdev: dasf platform device
2557 * retuen 0 - success , negative --fail
2558 */
2559static int hns_dsaf_probe(struct platform_device *pdev)
2560{
2561 struct dsaf_device *dsaf_dev;
2562 int ret;
2563
2564 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2565 if (IS_ERR(dsaf_dev)) {
2566 ret = PTR_ERR(dsaf_dev);
2567 dev_err(&pdev->dev,
2568 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2569 return ret;
2570 }
2571
2572 ret = hns_dsaf_get_cfg(dsaf_dev);
2573 if (ret)
2574 goto free_dev;
2575
2576 ret = hns_dsaf_init(dsaf_dev);
2577 if (ret)
2578 goto free_cfg;
2579
2580 ret = hns_mac_init(dsaf_dev);
2581 if (ret)
2582 goto uninit_dsaf;
2583
2584 ret = hns_ppe_init(dsaf_dev);
2585 if (ret)
2586 goto uninit_mac;
2587
2588 ret = hns_dsaf_ae_init(dsaf_dev);
2589 if (ret)
2590 goto uninit_ppe;
2591
2592 return 0;
2593
2594uninit_ppe:
2595 hns_ppe_uninit(dsaf_dev);
2596
2597uninit_mac:
2598 hns_mac_uninit(dsaf_dev);
2599
2600uninit_dsaf:
2601 hns_dsaf_free(dsaf_dev);
2602
2603free_cfg:
2604 hns_dsaf_free_cfg(dsaf_dev);
2605
2606free_dev:
2607 hns_dsaf_free_dev(dsaf_dev);
2608
2609 return ret;
2610}
2611
2612/**
2613 * dsaf_remove - remove dsaf dev
2614 * @pdev: dasf platform device
2615 */
2616static int hns_dsaf_remove(struct platform_device *pdev)
2617{
2618 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2619
2620 hns_dsaf_ae_uninit(dsaf_dev);
2621
2622 hns_ppe_uninit(dsaf_dev);
2623
2624 hns_mac_uninit(dsaf_dev);
2625
2626 hns_dsaf_free(dsaf_dev);
2627
2628 hns_dsaf_free_cfg(dsaf_dev);
2629
2630 hns_dsaf_free_dev(dsaf_dev);
2631
2632 return 0;
2633}
2634
2635static const struct of_device_id g_dsaf_match[] = {
2636 {.compatible = "hisilicon,hns-dsaf-v1"},
2637 {.compatible = "hisilicon,hns-dsaf-v2"},
2638 {}
2639};
2640
2641static struct platform_driver g_dsaf_driver = {
2642 .probe = hns_dsaf_probe,
2643 .remove = hns_dsaf_remove,
2644 .driver = {
2645 .name = DSAF_DRV_NAME,
2646 .of_match_table = g_dsaf_match,
2647 },
2648};
2649
2650module_platform_driver(g_dsaf_driver);
2651
2652MODULE_LICENSE("GPL");
2653MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2654MODULE_DESCRIPTION("HNS DSAF driver");
2655MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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