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net: hns: add dsaf misc operation method
[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_main.c
CommitLineData
511e6bc0 1/*
2 * Copyright (c) 2014-2015 Hisilicon Limited.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
2e2591b1 10#include <linux/device.h>
511e6bc0 11#include <linux/init.h>
12#include <linux/interrupt.h>
2e2591b1
DH		 13#include <linux/kernel.h>
14#include <linux/module.h>
511e6bc0 15#include <linux/netdevice.h>
831d828b 16#include <linux/mfd/syscon.h>
511e6bc0 17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
2e2591b1 20#include <linux/platform_device.h>
119c7ad8
AB		 21#include <linux/vmalloc.h>
22
2e2591b1 23#include "hns_dsaf_mac.h"
511e6bc0 24#include "hns_dsaf_main.h"
511e6bc0 25#include "hns_dsaf_ppe.h"
2e2591b1 26#include "hns_dsaf_rcb.h"
a24274aa 27#include "hns_dsaf_misc.h"
511e6bc0 28
29const char *g_dsaf_mode_match[DSAF_MODE_MAX] = {
30 [DSAF_MODE_DISABLE_2PORT_64VM] = "2port-64vf",
31 [DSAF_MODE_DISABLE_6PORT_0VM] = "6port-16rss",
32 [DSAF_MODE_DISABLE_6PORT_16VM] = "6port-16vf",
89a44093 33 [DSAF_MODE_DISABLE_SP] = "single-port",
511e6bc0 34};
35
36int hns_dsaf_get_cfg(struct dsaf_device *dsaf_dev)
37{
38 int ret, i;
39 u32 desc_num;
40 u32 buf_size;
422c3107 41 u32 reset_offset = 0;
831d828b 42 u32 res_idx = 0;
48189d6a 43 const char *mode_str;
831d828b
YZZ		 44 struct regmap *syscon;
45 struct resource *res;
511e6bc0 46 struct device_node *np = dsaf_dev->dev->of_node;
831d828b 47 struct platform_device *pdev = to_platform_device(dsaf_dev->dev);
511e6bc0 48
13ac695e 49 if (of_device_is_compatible(np, "hisilicon,hns-dsaf-v1"))
511e6bc0 50 dsaf_dev->dsaf_ver = AE_VERSION_1;
13ac695e
S		 51 else
52 dsaf_dev->dsaf_ver = AE_VERSION_2;
511e6bc0 53
6162928c 54 ret = device_property_read_string(dsaf_dev->dev, "mode", &mode_str);
511e6bc0 55 if (ret) {
56 dev_err(dsaf_dev->dev, "get dsaf mode fail, ret=%d!\n", ret);
57 return ret;
58 }
59 for (i = 0; i < DSAF_MODE_MAX; i++) {
60 if (g_dsaf_mode_match[i] &&
61 !strcmp(mode_str, g_dsaf_mode_match[i]))
62 break;
63 }
64 if (i >= DSAF_MODE_MAX ||
65 i == DSAF_MODE_INVALID || i == DSAF_MODE_ENABLE) {
66 dev_err(dsaf_dev->dev,
67 "%s prs mode str fail!\n", dsaf_dev->ae_dev.name);
68 return -EINVAL;
69 }
70 dsaf_dev->dsaf_mode = (enum dsaf_mode)i;
71
72 if (dsaf_dev->dsaf_mode > DSAF_MODE_ENABLE)
73 dsaf_dev->dsaf_en = HRD_DSAF_NO_DSAF_MODE;
74 else
75 dsaf_dev->dsaf_en = HRD_DSAF_MODE;
76
77 if ((i == DSAF_MODE_ENABLE_16VM) ||
78 (i == DSAF_MODE_DISABLE_2PORT_8VM) ||
79 (i == DSAF_MODE_DISABLE_6PORT_2VM))
80 dsaf_dev->dsaf_tc_mode = HRD_DSAF_8TC_MODE;
81 else
82 dsaf_dev->dsaf_tc_mode = HRD_DSAF_4TC_MODE;
83
831d828b
YZZ		 84 syscon = syscon_node_to_regmap(
85 of_parse_phandle(np, "subctrl-syscon", 0));
86 if (IS_ERR_OR_NULL(syscon)) {
87 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
88 if (!res) {
89 dev_err(dsaf_dev->dev, "subctrl info is needed!\n");
90 return -ENOMEM;
91 }
92 dsaf_dev->sc_base = devm_ioremap_resource(&pdev->dev, res);
93 if (!dsaf_dev->sc_base) {
94 dev_err(dsaf_dev->dev, "subctrl can not map!\n");
95 return -ENOMEM;
96 }
511e6bc0 97
831d828b
YZZ		 98 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
99 if (!res) {
100 dev_err(dsaf_dev->dev, "serdes-ctrl info is needed!\n");
101 return -ENOMEM;
102 }
103 dsaf_dev->sds_base = devm_ioremap_resource(&pdev->dev, res);
104 if (!dsaf_dev->sds_base) {
105 dev_err(dsaf_dev->dev, "serdes-ctrl can not map!\n");
106 return -ENOMEM;
107 }
108 } else {
109 dsaf_dev->sub_ctrl = syscon;
511e6bc0 110 }
111
831d828b
YZZ		 112 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ppe-base");
113 if (!res) {
114 res = platform_get_resource(pdev, IORESOURCE_MEM, res_idx++);
115 if (!res) {
116 dev_err(dsaf_dev->dev, "ppe-base info is needed!\n");
117 return -ENOMEM;
118 }
119 }
120 dsaf_dev->ppe_base = devm_ioremap_resource(&pdev->dev, res);
511e6bc0 121 if (!dsaf_dev->ppe_base) {
831d828b
YZZ		 122 dev_err(dsaf_dev->dev, "ppe-base resource can not map!\n");
123 return -ENOMEM;
511e6bc0 124 }
831d828b
YZZ		 125 dsaf_dev->ppe_paddr = res->start;
126
127 if (!HNS_DSAF_IS_DEBUG(dsaf_dev)) {
128 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
129 "dsaf-base");
130 if (!res) {
131 res = platform_get_resource(pdev, IORESOURCE_MEM,
132 res_idx);
133 if (!res) {
134 dev_err(dsaf_dev->dev,
135 "dsaf-base info is needed!\n");
136 return -ENOMEM;
137 }
138 }
139 dsaf_dev->io_base = devm_ioremap_resource(&pdev->dev, res);
140 if (!dsaf_dev->io_base) {
141 dev_err(dsaf_dev->dev, "dsaf-base resource can not map!\n");
142 return -ENOMEM;
143 }
511e6bc0 144 }
145
6162928c 146 ret = device_property_read_u32(dsaf_dev->dev, "desc-num", &desc_num);
511e6bc0 147 if (ret < 0 || desc_num < HNS_DSAF_MIN_DESC_CNT ||
148 desc_num > HNS_DSAF_MAX_DESC_CNT) {
149 dev_err(dsaf_dev->dev, "get desc-num(%d) fail, ret=%d!\n",
150 desc_num, ret);
151 goto unmap_base_addr;
152 }
153 dsaf_dev->desc_num = desc_num;
154
6162928c
KY		 155 ret = device_property_read_u32(dsaf_dev->dev, "reset-field-offset",
156 &reset_offset);
422c3107
YZZ		 157 if (ret < 0) {
158 dev_dbg(dsaf_dev->dev,
159 "get reset-field-offset fail, ret=%d!\r\n", ret);
160 }
161 dsaf_dev->reset_offset = reset_offset;
162
6162928c 163 ret = device_property_read_u32(dsaf_dev->dev, "buf-size", &buf_size);
511e6bc0 164 if (ret < 0) {
165 dev_err(dsaf_dev->dev,
166 "get buf-size fail, ret=%d!\r\n", ret);
167 goto unmap_base_addr;
168 }
169 dsaf_dev->buf_size = buf_size;
170
171 dsaf_dev->buf_size_type = hns_rcb_buf_size2type(buf_size);
172 if (dsaf_dev->buf_size_type < 0) {
173 dev_err(dsaf_dev->dev,
174 "buf_size(%d) is wrong!\n", buf_size);
175 goto unmap_base_addr;
176 }
177
a24274aa
KY		 178 dsaf_dev->misc_op = hns_misc_op_get(dsaf_dev);
179 if (!dsaf_dev->misc_op)
180 return -ENOMEM;
181
511e6bc0 182 if (!dma_set_mask_and_coherent(dsaf_dev->dev, DMA_BIT_MASK(64ULL)))
183 dev_dbg(dsaf_dev->dev, "set mask to 64bit\n");
184 else
185 dev_err(dsaf_dev->dev, "set mask to 64bit fail!\n");
186
187 return 0;
188
189unmap_base_addr:
190 if (dsaf_dev->io_base)
191 iounmap(dsaf_dev->io_base);
192 if (dsaf_dev->ppe_base)
193 iounmap(dsaf_dev->ppe_base);
194 if (dsaf_dev->sds_base)
195 iounmap(dsaf_dev->sds_base);
196 if (dsaf_dev->sc_base)
197 iounmap(dsaf_dev->sc_base);
511e6bc0 198 return ret;
199}
200
201static void hns_dsaf_free_cfg(struct dsaf_device *dsaf_dev)
202{
203 if (dsaf_dev->io_base)
204 iounmap(dsaf_dev->io_base);
205
206 if (dsaf_dev->ppe_base)
207 iounmap(dsaf_dev->ppe_base);
208
209 if (dsaf_dev->sds_base)
210 iounmap(dsaf_dev->sds_base);
211
212 if (dsaf_dev->sc_base)
213 iounmap(dsaf_dev->sc_base);
511e6bc0 214}
215
216/**
217 * hns_dsaf_sbm_link_sram_init_en - config dsaf_sbm_init_en
218 * @dsaf_id: dsa fabric id
219 */
220static void hns_dsaf_sbm_link_sram_init_en(struct dsaf_device *dsaf_dev)
221{
222 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG, DSAF_CFG_SBM_INIT_S, 1);
223}
224
225/**
226 * hns_dsaf_reg_cnt_clr_ce - config hns_dsaf_reg_cnt_clr_ce
227 * @dsaf_id: dsa fabric id
228 * @hns_dsaf_reg_cnt_clr_ce: config value
229 */
230static void
231hns_dsaf_reg_cnt_clr_ce(struct dsaf_device *dsaf_dev, u32 reg_cnt_clr_ce)
232{
233 dsaf_set_dev_bit(dsaf_dev, DSAF_DSA_REG_CNT_CLR_CE_REG,
234 DSAF_CNT_CLR_CE_S, reg_cnt_clr_ce);
235}
236
237/**
238 * hns_ppe_qid_cfg - config ppe qid
239 * @dsaf_id: dsa fabric id
240 * @pppe_qid_cfg: value array
241 */
242static void
243hns_dsaf_ppe_qid_cfg(struct dsaf_device *dsaf_dev, u32 qid_cfg)
244{
245 u32 i;
246
247 for (i = 0; i < DSAF_COMM_CHN; i++) {
248 dsaf_set_dev_field(dsaf_dev,
249 DSAF_PPE_QID_CFG_0_REG + 0x0004 * i,
250 DSAF_PPE_QID_CFG_M, DSAF_PPE_QID_CFG_S,
251 qid_cfg);
252 }
253}
254
4568637f 255static void hns_dsaf_mix_def_qid_cfg(struct dsaf_device *dsaf_dev)
256{
257 u16 max_q_per_vf, max_vfn;
258 u32 q_id, q_num_per_port;
259 u32 i;
260
89a44093 261 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
4568637f 262 q_num_per_port = max_vfn * max_q_per_vf;
263
264 for (i = 0, q_id = 0; i < DSAF_SERVICE_NW_NUM; i++) {
265 dsaf_set_dev_field(dsaf_dev,
266 DSAF_MIX_DEF_QID_0_REG + 0x0004 * i,
267 0xff, 0, q_id);
268 q_id += q_num_per_port;
269 }
270}
271
68c222a6 272static void hns_dsaf_inner_qid_cfg(struct dsaf_device *dsaf_dev)
273{
274 u16 max_q_per_vf, max_vfn;
275 u32 q_id, q_num_per_port;
276 u32 mac_id;
277
278 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
279 return;
280
89a44093 281 hns_rcb_get_queue_mode(dsaf_dev->dsaf_mode, &max_vfn, &max_q_per_vf);
68c222a6 282 q_num_per_port = max_vfn * max_q_per_vf;
283
284 for (mac_id = 0, q_id = 0; mac_id < DSAF_SERVICE_NW_NUM; mac_id++) {
285 dsaf_set_dev_field(dsaf_dev,
286 DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
287 DSAFV2_SERDES_LBK_QID_M,
288 DSAFV2_SERDES_LBK_QID_S,
289 q_id);
290 q_id += q_num_per_port;
291 }
292}
293
511e6bc0 294/**
295 * hns_dsaf_sw_port_type_cfg - cfg sw type
296 * @dsaf_id: dsa fabric id
297 * @psw_port_type: array
298 */
299static void hns_dsaf_sw_port_type_cfg(struct dsaf_device *dsaf_dev,
300 enum dsaf_sw_port_type port_type)
301{
302 u32 i;
303
304 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
305 dsaf_set_dev_field(dsaf_dev,
306 DSAF_SW_PORT_TYPE_0_REG + 0x0004 * i,
307 DSAF_SW_PORT_TYPE_M, DSAF_SW_PORT_TYPE_S,
308 port_type);
309 }
310}
311
312/**
313 * hns_dsaf_stp_port_type_cfg - cfg stp type
314 * @dsaf_id: dsa fabric id
315 * @pstp_port_type: array
316 */
317static void hns_dsaf_stp_port_type_cfg(struct dsaf_device *dsaf_dev,
318 enum dsaf_stp_port_type port_type)
319{
320 u32 i;
321
322 for (i = 0; i < DSAF_COMM_CHN; i++) {
323 dsaf_set_dev_field(dsaf_dev,
324 DSAF_STP_PORT_TYPE_0_REG + 0x0004 * i,
325 DSAF_STP_PORT_TYPE_M, DSAF_STP_PORT_TYPE_S,
326 port_type);
327 }
328}
329
13ac695e
S		 330#define HNS_DSAF_SBM_NUM(dev) \
331 (AE_IS_VER1((dev)->dsaf_ver) ? DSAF_SBM_NUM : DSAFV2_SBM_NUM)
511e6bc0 332/**
333 * hns_dsaf_sbm_cfg - config sbm
334 * @dsaf_id: dsa fabric id
335 */
336static void hns_dsaf_sbm_cfg(struct dsaf_device *dsaf_dev)
337{
338 u32 o_sbm_cfg;
339 u32 i;
340
13ac695e 341 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 342 o_sbm_cfg = dsaf_read_dev(dsaf_dev,
343 DSAF_SBM_CFG_REG_0_REG + 0x80 * i);
344 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_EN_S, 1);
345 dsaf_set_bit(o_sbm_cfg, DSAF_SBM_CFG_SHCUT_EN_S, 0);
346 dsaf_write_dev(dsaf_dev,
347 DSAF_SBM_CFG_REG_0_REG + 0x80 * i, o_sbm_cfg);
348 }
349}
350
351/**
352 * hns_dsaf_sbm_cfg_mib_en - config sbm
353 * @dsaf_id: dsa fabric id
354 */
355static int hns_dsaf_sbm_cfg_mib_en(struct dsaf_device *dsaf_dev)
356{
357 u32 sbm_cfg_mib_en;
358 u32 i;
359 u32 reg;
360 u32 read_cnt;
361
13ac695e
S		 362 /* validate configure by setting SBM_CFG_MIB_EN bit from 0 to 1. */
363 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
364 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
365 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 0);
366 }
367
368 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 369 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
370 dsaf_set_dev_bit(dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S, 1);
371 }
372
373 /* waitint for all sbm enable finished */
13ac695e 374 for (i = 0; i < HNS_DSAF_SBM_NUM(dsaf_dev); i++) {
511e6bc0 375 read_cnt = 0;
376 reg = DSAF_SBM_CFG_REG_0_REG + 0x80 * i;
377 do {
378 udelay(1);
379 sbm_cfg_mib_en = dsaf_get_dev_bit(
380 dsaf_dev, reg, DSAF_SBM_CFG_MIB_EN_S);
381 read_cnt++;
382 } while (sbm_cfg_mib_en == 0 &&
383 read_cnt < DSAF_CFG_READ_CNT);
384
385 if (sbm_cfg_mib_en == 0) {
386 dev_err(dsaf_dev->dev,
387 "sbm_cfg_mib_en fail,%s,sbm_num=%d\n",
388 dsaf_dev->ae_dev.name, i);
389 return -ENODEV;
390 }
391 }
392
393 return 0;
394}
395
396/**
397 * hns_dsaf_sbm_bp_wl_cfg - config sbm
398 * @dsaf_id: dsa fabric id
399 */
400static void hns_dsaf_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
401{
13ac695e 402 u32 o_sbm_bp_cfg;
511e6bc0 403 u32 reg;
404 u32 i;
405
406 /* XGE */
407 for (i = 0; i < DSAF_XGE_NUM; i++) {
408 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
13ac695e
S		 409 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
410 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_COM_MAX_BUF_NUM_M,
511e6bc0 411 DSAF_SBM_CFG0_COM_MAX_BUF_NUM_S, 512);
13ac695e 412 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_M,
511e6bc0 413 DSAF_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
13ac695e 414 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_M,
511e6bc0 415 DSAF_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
13ac695e 416 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 417
418 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
13ac695e
S		 419 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
420 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_M,
511e6bc0 421 DSAF_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
13ac695e 422 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_M,
511e6bc0 423 DSAF_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
13ac695e 424 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 425
426 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
13ac695e
S		 427 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
428 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 429 DSAF_SBM_CFG2_SET_BUF_NUM_S, 104);
13ac695e 430 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 431 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 128);
13ac695e 432 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 433
434 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
13ac695e
S		 435 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
436 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 437 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
438 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
13ac695e 439 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 440 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
441 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
13ac695e 442 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 443
444 /* for no enable pfc mode */
445 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
13ac695e
S		 446 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
447 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 448 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
449 DSAF_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 128);
13ac695e 450 dsaf_set_field(o_sbm_bp_cfg,
511e6bc0 451 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
452 DSAF_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 192);
13ac695e 453 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 454 }
455
456 /* PPE */
457 for (i = 0; i < DSAF_COMM_CHN; i++) {
458 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
13ac695e
S		 459 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
460 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 461 DSAF_SBM_CFG2_SET_BUF_NUM_S, 10);
13ac695e 462 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 463 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 12);
13ac695e 464 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 465 }
466
467 /* RoCEE */
468 for (i = 0; i < DSAF_COMM_CHN; i++) {
469 reg = DSAF_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
13ac695e
S		 470 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
471 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_SET_BUF_NUM_M,
511e6bc0 472 DSAF_SBM_CFG2_SET_BUF_NUM_S, 2);
13ac695e 473 dsaf_set_field(o_sbm_bp_cfg, DSAF_SBM_CFG2_RESET_BUF_NUM_M,
511e6bc0 474 DSAF_SBM_CFG2_RESET_BUF_NUM_S, 4);
13ac695e
S		 475 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
476 }
477}
478
479static void hns_dsafv2_sbm_bp_wl_cfg(struct dsaf_device *dsaf_dev)
480{
481 u32 o_sbm_bp_cfg;
482 u32 reg;
483 u32 i;
484
485 /* XGE */
486 for (i = 0; i < DSAFV2_SBM_XGE_CHN; i++) {
487 reg = DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + 0x80 * i;
488 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
489 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_M,
490 DSAFV2_SBM_CFG0_COM_MAX_BUF_NUM_S, 256);
491 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_M,
492 DSAFV2_SBM_CFG0_VC0_MAX_BUF_NUM_S, 0);
493 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_M,
494 DSAFV2_SBM_CFG0_VC1_MAX_BUF_NUM_S, 0);
495 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
496
497 reg = DSAF_SBM_BP_CFG_1_REG_0_REG + 0x80 * i;
498 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
499 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_M,
500 DSAFV2_SBM_CFG1_TC4_MAX_BUF_NUM_S, 0);
501 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_M,
502 DSAFV2_SBM_CFG1_TC0_MAX_BUF_NUM_S, 0);
503 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
504
505 reg = DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + 0x80 * i;
506 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
507 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
508 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 104);
509 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
510 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 128);
511 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
512
513 reg = DSAF_SBM_BP_CFG_3_REG_0_REG + 0x80 * i;
514 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
515 dsaf_set_field(o_sbm_bp_cfg,
516 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_M,
517 DSAFV2_SBM_CFG3_SET_BUF_NUM_NO_PFC_S, 110);
518 dsaf_set_field(o_sbm_bp_cfg,
519 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_M,
520 DSAFV2_SBM_CFG3_RESET_BUF_NUM_NO_PFC_S, 160);
521 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
522
523 /* for no enable pfc mode */
524 reg = DSAF_SBM_BP_CFG_4_REG_0_REG + 0x80 * i;
525 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
526 dsaf_set_field(o_sbm_bp_cfg,
527 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_M,
528 DSAFV2_SBM_CFG4_SET_BUF_NUM_NO_PFC_S, 128);
529 dsaf_set_field(o_sbm_bp_cfg,
530 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_M,
531 DSAFV2_SBM_CFG4_RESET_BUF_NUM_NO_PFC_S, 192);
532 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
533 }
534
535 /* PPE */
536 reg = DSAF_SBM_BP_CFG_2_PPE_REG_0_REG + 0x80 * i;
537 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
538 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
539 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 10);
540 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
541 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 12);
542 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
543 /* RoCEE */
544 for (i = 0; i < DASFV2_ROCEE_CRD_NUM; i++) {
545 reg = DSAFV2_SBM_BP_CFG_2_ROCEE_REG_0_REG + 0x80 * i;
546 o_sbm_bp_cfg = dsaf_read_dev(dsaf_dev, reg);
547 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_SET_BUF_NUM_M,
548 DSAFV2_SBM_CFG2_SET_BUF_NUM_S, 2);
549 dsaf_set_field(o_sbm_bp_cfg, DSAFV2_SBM_CFG2_RESET_BUF_NUM_M,
550 DSAFV2_SBM_CFG2_RESET_BUF_NUM_S, 4);
551 dsaf_write_dev(dsaf_dev, reg, o_sbm_bp_cfg);
511e6bc0 552 }
553}
554
555/**
556 * hns_dsaf_voq_bp_all_thrd_cfg - voq
557 * @dsaf_id: dsa fabric id
558 */
559static void hns_dsaf_voq_bp_all_thrd_cfg(struct dsaf_device *dsaf_dev)
560{
561 u32 voq_bp_all_thrd;
562 u32 i;
563
564 for (i = 0; i < DSAF_VOQ_NUM; i++) {
565 voq_bp_all_thrd = dsaf_read_dev(
566 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i);
567 if (i < DSAF_XGE_NUM) {
568 dsaf_set_field(voq_bp_all_thrd,
569 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
570 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 930);
571 dsaf_set_field(voq_bp_all_thrd,
572 DSAF_VOQ_BP_ALL_UPTHRD_M,
573 DSAF_VOQ_BP_ALL_UPTHRD_S, 950);
574 } else {
575 dsaf_set_field(voq_bp_all_thrd,
576 DSAF_VOQ_BP_ALL_DOWNTHRD_M,
577 DSAF_VOQ_BP_ALL_DOWNTHRD_S, 220);
578 dsaf_set_field(voq_bp_all_thrd,
579 DSAF_VOQ_BP_ALL_UPTHRD_M,
580 DSAF_VOQ_BP_ALL_UPTHRD_S, 230);
581 }
582 dsaf_write_dev(
583 dsaf_dev, DSAF_VOQ_BP_ALL_THRD_0_REG + 0x40 * i,
584 voq_bp_all_thrd);
585 }
586}
587
588/**
589 * hns_dsaf_tbl_tcam_data_cfg - tbl
590 * @dsaf_id: dsa fabric id
591 * @ptbl_tcam_data: addr
592 */
593static void hns_dsaf_tbl_tcam_data_cfg(
594 struct dsaf_device *dsaf_dev,
595 struct dsaf_tbl_tcam_data *ptbl_tcam_data)
596{
597 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_LOW_0_REG,
598 ptbl_tcam_data->tbl_tcam_data_low);
599 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_HIGH_0_REG,
600 ptbl_tcam_data->tbl_tcam_data_high);
601}
602
603/**
604 * dsaf_tbl_tcam_mcast_cfg - tbl
605 * @dsaf_id: dsa fabric id
606 * @ptbl_tcam_mcast: addr
607 */
608static void hns_dsaf_tbl_tcam_mcast_cfg(
609 struct dsaf_device *dsaf_dev,
610 struct dsaf_tbl_tcam_mcast_cfg *mcast)
611{
612 u32 mcast_cfg4;
613
614 mcast_cfg4 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
615 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S,
616 mcast->tbl_mcast_item_vld);
617 dsaf_set_bit(mcast_cfg4, DSAF_TBL_MCAST_CFG4_OLD_EN_S,
618 mcast->tbl_mcast_old_en);
619 dsaf_set_field(mcast_cfg4, DSAF_TBL_MCAST_CFG4_VM128_112_M,
620 DSAF_TBL_MCAST_CFG4_VM128_112_S,
621 mcast->tbl_mcast_port_msk[4]);
622 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, mcast_cfg4);
623
624 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG,
625 mcast->tbl_mcast_port_msk[3]);
626
627 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG,
628 mcast->tbl_mcast_port_msk[2]);
629
630 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG,
631 mcast->tbl_mcast_port_msk[1]);
632
633 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG,
634 mcast->tbl_mcast_port_msk[0]);
635}
636
637/**
638 * hns_dsaf_tbl_tcam_ucast_cfg - tbl
639 * @dsaf_id: dsa fabric id
640 * @ptbl_tcam_ucast: addr
641 */
642static void hns_dsaf_tbl_tcam_ucast_cfg(
643 struct dsaf_device *dsaf_dev,
644 struct dsaf_tbl_tcam_ucast_cfg *tbl_tcam_ucast)
645{
646 u32 ucast_cfg1;
647
648 ucast_cfg1 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
649 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S,
650 tbl_tcam_ucast->tbl_ucast_mac_discard);
651 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_ITEM_VLD_S,
652 tbl_tcam_ucast->tbl_ucast_item_vld);
653 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OLD_EN_S,
654 tbl_tcam_ucast->tbl_ucast_old_en);
655 dsaf_set_bit(ucast_cfg1, DSAF_TBL_UCAST_CFG1_DVC_S,
656 tbl_tcam_ucast->tbl_ucast_dvc);
657 dsaf_set_field(ucast_cfg1, DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
658 DSAF_TBL_UCAST_CFG1_OUT_PORT_S,
659 tbl_tcam_ucast->tbl_ucast_out_port);
660 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_UCAST_CFG_0_REG, ucast_cfg1);
661}
662
663/**
664 * hns_dsaf_tbl_line_cfg - tbl
665 * @dsaf_id: dsa fabric id
666 * @ptbl_lin: addr
667 */
668static void hns_dsaf_tbl_line_cfg(struct dsaf_device *dsaf_dev,
669 struct dsaf_tbl_line_cfg *tbl_lin)
670{
671 u32 tbl_line;
672
673 tbl_line = dsaf_read_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG);
674 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_MAC_DISCARD_S,
675 tbl_lin->tbl_line_mac_discard);
676 dsaf_set_bit(tbl_line, DSAF_TBL_LINE_CFG_DVC_S,
677 tbl_lin->tbl_line_dvc);
678 dsaf_set_field(tbl_line, DSAF_TBL_LINE_CFG_OUT_PORT_M,
679 DSAF_TBL_LINE_CFG_OUT_PORT_S,
680 tbl_lin->tbl_line_out_port);
681 dsaf_write_dev(dsaf_dev, DSAF_TBL_LIN_CFG_0_REG, tbl_line);
682}
683
684/**
685 * hns_dsaf_tbl_tcam_mcast_pul - tbl
686 * @dsaf_id: dsa fabric id
687 */
688static void hns_dsaf_tbl_tcam_mcast_pul(struct dsaf_device *dsaf_dev)
689{
690 u32 o_tbl_pul;
691
692 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
693 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
694 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
695 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
696 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
697}
698
699/**
700 * hns_dsaf_tbl_line_pul - tbl
701 * @dsaf_id: dsa fabric id
702 */
703static void hns_dsaf_tbl_line_pul(struct dsaf_device *dsaf_dev)
704{
705 u32 tbl_pul;
706
707 tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
708 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 1);
709 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
710 dsaf_set_bit(tbl_pul, DSAF_TBL_PUL_LINE_VLD_S, 0);
711 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, tbl_pul);
712}
713
714/**
715 * hns_dsaf_tbl_tcam_data_mcast_pul - tbl
716 * @dsaf_id: dsa fabric id
717 */
718static void hns_dsaf_tbl_tcam_data_mcast_pul(
719 struct dsaf_device *dsaf_dev)
720{
721 u32 o_tbl_pul;
722
723 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
724 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
725 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 1);
726 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
727 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
728 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_MCAST_VLD_S, 0);
729 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
730}
731
732/**
733 * hns_dsaf_tbl_tcam_data_ucast_pul - tbl
734 * @dsaf_id: dsa fabric id
735 */
736static void hns_dsaf_tbl_tcam_data_ucast_pul(
737 struct dsaf_device *dsaf_dev)
738{
739 u32 o_tbl_pul;
740
741 o_tbl_pul = dsaf_read_dev(dsaf_dev, DSAF_TBL_PUL_0_REG);
742 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 1);
743 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 1);
744 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
745 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_TCAM_DATA_VLD_S, 0);
746 dsaf_set_bit(o_tbl_pul, DSAF_TBL_PUL_UCAST_VLD_S, 0);
747 dsaf_write_dev(dsaf_dev, DSAF_TBL_PUL_0_REG, o_tbl_pul);
748}
749
4568637f 750void hns_dsaf_set_promisc_mode(struct dsaf_device *dsaf_dev, u32 en)
751{
89a44093
YZZ		 752 if (!HNS_DSAF_IS_DEBUG(dsaf_dev))
753 dsaf_set_dev_bit(dsaf_dev, DSAF_CFG_0_REG,
754 DSAF_CFG_MIX_MODE_S, !!en);
4568637f 755}
756
68c222a6 757void hns_dsaf_set_inner_lb(struct dsaf_device *dsaf_dev, u32 mac_id, u32 en)
758{
759 if (AE_IS_VER1(dsaf_dev->dsaf_ver) ||
831d828b 760 dsaf_dev->mac_cb[mac_id]->mac_type == HNAE_PORT_DEBUG)
68c222a6 761 return;
762
763 dsaf_set_dev_bit(dsaf_dev, DSAFV2_SERDES_LBK_0_REG + 4 * mac_id,
764 DSAFV2_SERDES_LBK_EN_B, !!en);
765}
766
511e6bc0 767/**
768 * hns_dsaf_tbl_stat_en - tbl
769 * @dsaf_id: dsa fabric id
770 * @ptbl_stat_en: addr
771 */
772static void hns_dsaf_tbl_stat_en(struct dsaf_device *dsaf_dev)
773{
774 u32 o_tbl_ctrl;
775
776 o_tbl_ctrl = dsaf_read_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG);
777 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_LINE_LKUP_NUM_EN_S, 1);
778 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_UC_LKUP_NUM_EN_S, 1);
779 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_MC_LKUP_NUM_EN_S, 1);
780 dsaf_set_bit(o_tbl_ctrl, DSAF_TBL_DFX_BC_LKUP_NUM_EN_S, 1);
781 dsaf_write_dev(dsaf_dev, DSAF_TBL_DFX_CTRL_0_REG, o_tbl_ctrl);
782}
783
784/**
785 * hns_dsaf_rocee_bp_en - rocee back press enable
786 * @dsaf_id: dsa fabric id
787 */
788static void hns_dsaf_rocee_bp_en(struct dsaf_device *dsaf_dev)
789{
6f80563c
QX		 790 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
791 dsaf_set_dev_bit(dsaf_dev, DSAF_XGE_CTRL_SIG_CFG_0_REG,
792 DSAF_FC_XGE_TX_PAUSE_S, 1);
511e6bc0 793}
794
795/* set msk for dsaf exception irq*/
796static void hns_dsaf_int_xge_msk_set(struct dsaf_device *dsaf_dev,
797 u32 chnn_num, u32 mask_set)
798{
799 dsaf_write_dev(dsaf_dev,
800 DSAF_XGE_INT_MSK_0_REG + 0x4 * chnn_num, mask_set);
801}
802
803static void hns_dsaf_int_ppe_msk_set(struct dsaf_device *dsaf_dev,
804 u32 chnn_num, u32 msk_set)
805{
806 dsaf_write_dev(dsaf_dev,
807 DSAF_PPE_INT_MSK_0_REG + 0x4 * chnn_num, msk_set);
808}
809
810static void hns_dsaf_int_rocee_msk_set(struct dsaf_device *dsaf_dev,
811 u32 chnn, u32 msk_set)
812{
813 dsaf_write_dev(dsaf_dev,
814 DSAF_ROCEE_INT_MSK_0_REG + 0x4 * chnn, msk_set);
815}
816
817static void
818hns_dsaf_int_tbl_msk_set(struct dsaf_device *dsaf_dev, u32 msk_set)
819{
820 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_MSK_0_REG, msk_set);
821}
822
823/* clr dsaf exception irq*/
824static void hns_dsaf_int_xge_src_clr(struct dsaf_device *dsaf_dev,
825 u32 chnn_num, u32 int_src)
826{
827 dsaf_write_dev(dsaf_dev,
828 DSAF_XGE_INT_SRC_0_REG + 0x4 * chnn_num, int_src);
829}
830
831static void hns_dsaf_int_ppe_src_clr(struct dsaf_device *dsaf_dev,
832 u32 chnn, u32 int_src)
833{
834 dsaf_write_dev(dsaf_dev,
835 DSAF_PPE_INT_SRC_0_REG + 0x4 * chnn, int_src);
836}
837
838static void hns_dsaf_int_rocee_src_clr(struct dsaf_device *dsaf_dev,
839 u32 chnn, u32 int_src)
840{
841 dsaf_write_dev(dsaf_dev,
842 DSAF_ROCEE_INT_SRC_0_REG + 0x4 * chnn, int_src);
843}
844
845static void hns_dsaf_int_tbl_src_clr(struct dsaf_device *dsaf_dev,
846 u32 int_src)
847{
848 dsaf_write_dev(dsaf_dev, DSAF_TBL_INT_SRC_0_REG, int_src);
849}
850
851/**
852 * hns_dsaf_single_line_tbl_cfg - INT
853 * @dsaf_id: dsa fabric id
854 * @address:
855 * @ptbl_line:
856 */
857static void hns_dsaf_single_line_tbl_cfg(
858 struct dsaf_device *dsaf_dev,
859 u32 address, struct dsaf_tbl_line_cfg *ptbl_line)
860{
861 /*Write Addr*/
862 hns_dsaf_tbl_line_addr_cfg(dsaf_dev, address);
863
864 /*Write Line*/
865 hns_dsaf_tbl_line_cfg(dsaf_dev, ptbl_line);
866
867 /*Write Plus*/
868 hns_dsaf_tbl_line_pul(dsaf_dev);
869}
870
871/**
872 * hns_dsaf_tcam_uc_cfg - INT
873 * @dsaf_id: dsa fabric id
874 * @address,
875 * @ptbl_tcam_data,
876 */
877static void hns_dsaf_tcam_uc_cfg(
878 struct dsaf_device *dsaf_dev, u32 address,
879 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
880 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
881{
882 /*Write Addr*/
883 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
884 /*Write Tcam Data*/
885 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
886 /*Write Tcam Ucast*/
887 hns_dsaf_tbl_tcam_ucast_cfg(dsaf_dev, ptbl_tcam_ucast);
888 /*Write Plus*/
889 hns_dsaf_tbl_tcam_data_ucast_pul(dsaf_dev);
890}
891
892/**
893 * hns_dsaf_tcam_mc_cfg - INT
894 * @dsaf_id: dsa fabric id
895 * @address,
896 * @ptbl_tcam_data,
897 * @ptbl_tcam_mcast,
898 */
899static void hns_dsaf_tcam_mc_cfg(
900 struct dsaf_device *dsaf_dev, u32 address,
901 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
902 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
903{
904 /*Write Addr*/
905 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
906 /*Write Tcam Data*/
907 hns_dsaf_tbl_tcam_data_cfg(dsaf_dev, ptbl_tcam_data);
908 /*Write Tcam Mcast*/
909 hns_dsaf_tbl_tcam_mcast_cfg(dsaf_dev, ptbl_tcam_mcast);
910 /*Write Plus*/
911 hns_dsaf_tbl_tcam_data_mcast_pul(dsaf_dev);
912}
913
914/**
915 * hns_dsaf_tcam_mc_invld - INT
916 * @dsaf_id: dsa fabric id
917 * @address
918 */
919static void hns_dsaf_tcam_mc_invld(struct dsaf_device *dsaf_dev, u32 address)
920{
921 /*Write Addr*/
922 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
923
924 /*write tcam mcast*/
925 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG, 0);
926 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG, 0);
927 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG, 0);
928 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG, 0);
929 dsaf_write_dev(dsaf_dev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG, 0);
930
931 /*Write Plus*/
932 hns_dsaf_tbl_tcam_mcast_pul(dsaf_dev);
933}
934
935/**
936 * hns_dsaf_tcam_uc_get - INT
937 * @dsaf_id: dsa fabric id
938 * @address
939 * @ptbl_tcam_data
940 * @ptbl_tcam_ucast
941 */
942static void hns_dsaf_tcam_uc_get(
943 struct dsaf_device *dsaf_dev, u32 address,
944 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
945 struct dsaf_tbl_tcam_ucast_cfg *ptbl_tcam_ucast)
946{
947 u32 tcam_read_data0;
948 u32 tcam_read_data4;
949
950 /*Write Addr*/
951 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
952
953 /*read tcam item puls*/
954 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
955
956 /*read tcam data*/
957 ptbl_tcam_data->tbl_tcam_data_high
958 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
959 ptbl_tcam_data->tbl_tcam_data_low
960 = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
961
962 /*read tcam mcast*/
963 tcam_read_data0 = dsaf_read_dev(dsaf_dev,
964 DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
965 tcam_read_data4 = dsaf_read_dev(dsaf_dev,
966 DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
967
968 ptbl_tcam_ucast->tbl_ucast_item_vld
969 = dsaf_get_bit(tcam_read_data4,
970 DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
971 ptbl_tcam_ucast->tbl_ucast_old_en
972 = dsaf_get_bit(tcam_read_data4, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
973 ptbl_tcam_ucast->tbl_ucast_mac_discard
974 = dsaf_get_bit(tcam_read_data0,
975 DSAF_TBL_UCAST_CFG1_MAC_DISCARD_S);
976 ptbl_tcam_ucast->tbl_ucast_out_port
977 = dsaf_get_field(tcam_read_data0,
978 DSAF_TBL_UCAST_CFG1_OUT_PORT_M,
979 DSAF_TBL_UCAST_CFG1_OUT_PORT_S);
980 ptbl_tcam_ucast->tbl_ucast_dvc
981 = dsaf_get_bit(tcam_read_data0, DSAF_TBL_UCAST_CFG1_DVC_S);
982}
983
984/**
985 * hns_dsaf_tcam_mc_get - INT
986 * @dsaf_id: dsa fabric id
987 * @address
988 * @ptbl_tcam_data
989 * @ptbl_tcam_ucast
990 */
991static void hns_dsaf_tcam_mc_get(
992 struct dsaf_device *dsaf_dev, u32 address,
993 struct dsaf_tbl_tcam_data *ptbl_tcam_data,
994 struct dsaf_tbl_tcam_mcast_cfg *ptbl_tcam_mcast)
995{
996 u32 data_tmp;
997
998 /*Write Addr*/
999 hns_dsaf_tbl_tcam_addr_cfg(dsaf_dev, address);
1000
1001 /*read tcam item puls*/
1002 hns_dsaf_tbl_tcam_load_pul(dsaf_dev);
1003
1004 /*read tcam data*/
1005 ptbl_tcam_data->tbl_tcam_data_high =
1006 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
1007 ptbl_tcam_data->tbl_tcam_data_low =
1008 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
1009
1010 /*read tcam mcast*/
1011 ptbl_tcam_mcast->tbl_mcast_port_msk[0] =
1012 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
1013 ptbl_tcam_mcast->tbl_mcast_port_msk[1] =
1014 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
1015 ptbl_tcam_mcast->tbl_mcast_port_msk[2] =
1016 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
1017 ptbl_tcam_mcast->tbl_mcast_port_msk[3] =
1018 dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
1019
1020 data_tmp = dsaf_read_dev(dsaf_dev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
1021 ptbl_tcam_mcast->tbl_mcast_item_vld =
1022 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_ITEM_VLD_S);
1023 ptbl_tcam_mcast->tbl_mcast_old_en =
1024 dsaf_get_bit(data_tmp, DSAF_TBL_MCAST_CFG4_OLD_EN_S);
1025 ptbl_tcam_mcast->tbl_mcast_port_msk[4] =
1026 dsaf_get_field(data_tmp, DSAF_TBL_MCAST_CFG4_VM128_112_M,
1027 DSAF_TBL_MCAST_CFG4_VM128_112_S);
1028}
1029
1030/**
1031 * hns_dsaf_tbl_line_init - INT
1032 * @dsaf_id: dsa fabric id
1033 */
1034static void hns_dsaf_tbl_line_init(struct dsaf_device *dsaf_dev)
1035{
1036 u32 i;
1037 /* defaultly set all lineal mac table entry resulting discard */
1038 struct dsaf_tbl_line_cfg tbl_line[] = {{1, 0, 0} };
1039
1040 for (i = 0; i < DSAF_LINE_SUM; i++)
1041 hns_dsaf_single_line_tbl_cfg(dsaf_dev, i, tbl_line);
1042}
1043
1044/**
1045 * hns_dsaf_tbl_tcam_init - INT
1046 * @dsaf_id: dsa fabric id
1047 */
1048static void hns_dsaf_tbl_tcam_init(struct dsaf_device *dsaf_dev)
1049{
1050 u32 i;
1051 struct dsaf_tbl_tcam_data tcam_data[] = {{0, 0} };
1052 struct dsaf_tbl_tcam_ucast_cfg tcam_ucast[] = {{0, 0, 0, 0, 0} };
1053
1054 /*tcam tbl*/
1055 for (i = 0; i < DSAF_TCAM_SUM; i++)
1056 hns_dsaf_tcam_uc_cfg(dsaf_dev, i, tcam_data, tcam_ucast);
1057}
1058
1059/**
1060 * hns_dsaf_pfc_en_cfg - dsaf pfc pause cfg
1061 * @mac_cb: mac contrl block
1062 */
1063static void hns_dsaf_pfc_en_cfg(struct dsaf_device *dsaf_dev,
5ada37b5 1064 int mac_id, int tc_en)
511e6bc0 1065{
5ada37b5
L		 1066 dsaf_write_dev(dsaf_dev, DSAF_PFC_EN_0_REG + mac_id * 4, tc_en);
1067}
1068
1069static void hns_dsaf_set_pfc_pause(struct dsaf_device *dsaf_dev,
1070 int mac_id, int tx_en, int rx_en)
1071{
1072 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1073 if (!tx_en || !rx_en)
1074 dev_err(dsaf_dev->dev, "dsaf v1 can not close pfc!\n");
1075
1076 return;
1077 }
1078
1079 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1080 DSAF_PFC_PAUSE_RX_EN_B, !!rx_en);
1081 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1082 DSAF_PFC_PAUSE_TX_EN_B, !!tx_en);
1083}
1084
1085int hns_dsaf_set_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1086 u32 en)
1087{
1088 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1089 if (!en)
1090 dev_err(dsaf_dev->dev, "dsafv1 can't close rx_pause!\n");
1091
1092 return -EINVAL;
1093 }
1094
1095 dsaf_set_dev_bit(dsaf_dev, DSAF_PAUSE_CFG_REG + mac_id * 4,
1096 DSAF_MAC_PAUSE_RX_EN_B, !!en);
1097
1098 return 0;
1099}
1100
1101void hns_dsaf_get_rx_mac_pause_en(struct dsaf_device *dsaf_dev, int mac_id,
1102 u32 *en)
1103{
1104 if (AE_IS_VER1(dsaf_dev->dsaf_ver))
1105 *en = 1;
511e6bc0 1106 else
5ada37b5
L		 1107 *en = dsaf_get_dev_bit(dsaf_dev,
1108 DSAF_PAUSE_CFG_REG + mac_id * 4,
1109 DSAF_MAC_PAUSE_RX_EN_B);
511e6bc0 1110}
1111
1112/**
1113 * hns_dsaf_tbl_tcam_init - INT
1114 * @dsaf_id: dsa fabric id
1115 * @dsaf_mode
1116 */
1117static void hns_dsaf_comm_init(struct dsaf_device *dsaf_dev)
1118{
1119 u32 i;
1120 u32 o_dsaf_cfg;
5ada37b5 1121 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
511e6bc0 1122
1123 o_dsaf_cfg = dsaf_read_dev(dsaf_dev, DSAF_CFG_0_REG);
1124 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_EN_S, dsaf_dev->dsaf_en);
1125 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_TC_MODE_S, dsaf_dev->dsaf_tc_mode);
1126 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_CRC_EN_S, 0);
1127 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_MIX_MODE_S, 0);
1128 dsaf_set_bit(o_dsaf_cfg, DSAF_CFG_LOCA_ADDR_EN_S, 0);
1129 dsaf_write_dev(dsaf_dev, DSAF_CFG_0_REG, o_dsaf_cfg);
1130
1131 hns_dsaf_reg_cnt_clr_ce(dsaf_dev, 1);
1132 hns_dsaf_stp_port_type_cfg(dsaf_dev, DSAF_STP_PORT_TYPE_FORWARD);
1133
1134 /* set 22 queue per tx ppe engine, only used in switch mode */
1135 hns_dsaf_ppe_qid_cfg(dsaf_dev, DSAF_DEFAUTL_QUEUE_NUM_PER_PPE);
1136
4568637f 1137 /* set promisc def queue id */
1138 hns_dsaf_mix_def_qid_cfg(dsaf_dev);
1139
68c222a6 1140 /* set inner loopback queue id */
1141 hns_dsaf_inner_qid_cfg(dsaf_dev);
1142
511e6bc0 1143 /* in non switch mode, set all port to access mode */
1144 hns_dsaf_sw_port_type_cfg(dsaf_dev, DSAF_SW_PORT_TYPE_NON_VLAN);
1145
1146 /*set dsaf pfc to 0 for parseing rx pause*/
5ada37b5 1147 for (i = 0; i < DSAF_COMM_CHN; i++) {
511e6bc0 1148 hns_dsaf_pfc_en_cfg(dsaf_dev, i, 0);
5ada37b5
L		 1149 hns_dsaf_set_pfc_pause(dsaf_dev, i, is_ver1, is_ver1);
1150 }
511e6bc0 1151
1152 /*msk and clr exception irqs */
1153 for (i = 0; i < DSAF_COMM_CHN; i++) {
1154 hns_dsaf_int_xge_src_clr(dsaf_dev, i, 0xfffffffful);
1155 hns_dsaf_int_ppe_src_clr(dsaf_dev, i, 0xfffffffful);
1156 hns_dsaf_int_rocee_src_clr(dsaf_dev, i, 0xfffffffful);
1157
1158 hns_dsaf_int_xge_msk_set(dsaf_dev, i, 0xfffffffful);
1159 hns_dsaf_int_ppe_msk_set(dsaf_dev, i, 0xfffffffful);
1160 hns_dsaf_int_rocee_msk_set(dsaf_dev, i, 0xfffffffful);
1161 }
1162 hns_dsaf_int_tbl_src_clr(dsaf_dev, 0xfffffffful);
1163 hns_dsaf_int_tbl_msk_set(dsaf_dev, 0xfffffffful);
1164}
1165
1166/**
1167 * hns_dsaf_inode_init - INT
1168 * @dsaf_id: dsa fabric id
1169 */
1170static void hns_dsaf_inode_init(struct dsaf_device *dsaf_dev)
1171{
1172 u32 reg;
1173 u32 tc_cfg;
1174 u32 i;
1175
1176 if (dsaf_dev->dsaf_tc_mode == HRD_DSAF_4TC_MODE)
1177 tc_cfg = HNS_DSAF_I4TC_CFG;
1178 else
1179 tc_cfg = HNS_DSAF_I8TC_CFG;
1180
13ac695e
S		 1181 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1182 for (i = 0; i < DSAF_INODE_NUM; i++) {
1183 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1184 dsaf_set_dev_field(dsaf_dev, reg,
1185 DSAF_INODE_IN_PORT_NUM_M,
1186 DSAF_INODE_IN_PORT_NUM_S,
1187 i % DSAF_XGE_NUM);
1188 }
1189 } else {
1190 for (i = 0; i < DSAF_PORT_TYPE_NUM; i++) {
1191 reg = DSAF_INODE_IN_PORT_NUM_0_REG + 0x80 * i;
1192 dsaf_set_dev_field(dsaf_dev, reg,
1193 DSAF_INODE_IN_PORT_NUM_M,
1194 DSAF_INODE_IN_PORT_NUM_S, 0);
1195 dsaf_set_dev_field(dsaf_dev, reg,
1196 DSAFV2_INODE_IN_PORT1_NUM_M,
1197 DSAFV2_INODE_IN_PORT1_NUM_S, 1);
1198 dsaf_set_dev_field(dsaf_dev, reg,
1199 DSAFV2_INODE_IN_PORT2_NUM_M,
1200 DSAFV2_INODE_IN_PORT2_NUM_S, 2);
1201 dsaf_set_dev_field(dsaf_dev, reg,
1202 DSAFV2_INODE_IN_PORT3_NUM_M,
1203 DSAFV2_INODE_IN_PORT3_NUM_S, 3);
1204 dsaf_set_dev_field(dsaf_dev, reg,
1205 DSAFV2_INODE_IN_PORT4_NUM_M,
1206 DSAFV2_INODE_IN_PORT4_NUM_S, 4);
1207 dsaf_set_dev_field(dsaf_dev, reg,
1208 DSAFV2_INODE_IN_PORT5_NUM_M,
1209 DSAFV2_INODE_IN_PORT5_NUM_S, 5);
1210 }
1211 }
511e6bc0 1212 for (i = 0; i < DSAF_INODE_NUM; i++) {
511e6bc0 1213 reg = DSAF_INODE_PRI_TC_CFG_0_REG + 0x80 * i;
1214 dsaf_write_dev(dsaf_dev, reg, tc_cfg);
1215 }
1216}
1217
1218/**
1219 * hns_dsaf_sbm_init - INT
1220 * @dsaf_id: dsa fabric id
1221 */
1222static int hns_dsaf_sbm_init(struct dsaf_device *dsaf_dev)
1223{
1224 u32 flag;
13ac695e 1225 u32 finish_msk;
511e6bc0 1226 u32 cnt = 0;
1227 int ret;
1228
13ac695e
S		 1229 if (AE_IS_VER1(dsaf_dev->dsaf_ver)) {
1230 hns_dsaf_sbm_bp_wl_cfg(dsaf_dev);
1231 finish_msk = DSAF_SRAM_INIT_OVER_M;
1232 } else {
1233 hns_dsafv2_sbm_bp_wl_cfg(dsaf_dev);
1234 finish_msk = DSAFV2_SRAM_INIT_OVER_M;
1235 }
511e6bc0 1236
1237 /* enable sbm chanel, disable sbm chanel shcut function*/
1238 hns_dsaf_sbm_cfg(dsaf_dev);
1239
1240 /* enable sbm mib */
1241 ret = hns_dsaf_sbm_cfg_mib_en(dsaf_dev);
1242 if (ret) {
1243 dev_err(dsaf_dev->dev,
1244 "hns_dsaf_sbm_cfg_mib_en fail,%s, ret=%d\n",
1245 dsaf_dev->ae_dev.name, ret);
1246 return ret;
1247 }
1248
1249 /* enable sbm initial link sram */
1250 hns_dsaf_sbm_link_sram_init_en(dsaf_dev);
1251
1252 do {
1253 usleep_range(200, 210);/*udelay(200);*/
13ac695e
S		 1254 flag = dsaf_get_dev_field(dsaf_dev, DSAF_SRAM_INIT_OVER_0_REG,
1255 finish_msk, DSAF_SRAM_INIT_OVER_S);
511e6bc0 1256 cnt++;
13ac695e
S		 1257 } while (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S) &&
1258 cnt < DSAF_CFG_READ_CNT);
511e6bc0 1259
13ac695e 1260 if (flag != (finish_msk >> DSAF_SRAM_INIT_OVER_S)) {
511e6bc0 1261 dev_err(dsaf_dev->dev,
1262 "hns_dsaf_sbm_init fail %s, flag=%d, cnt=%d\n",
1263 dsaf_dev->ae_dev.name, flag, cnt);
1264 return -ENODEV;
1265 }
1266
1267 hns_dsaf_rocee_bp_en(dsaf_dev);
1268
1269 return 0;
1270}
1271
1272/**
1273 * hns_dsaf_tbl_init - INT
1274 * @dsaf_id: dsa fabric id
1275 */
1276static void hns_dsaf_tbl_init(struct dsaf_device *dsaf_dev)
1277{
1278 hns_dsaf_tbl_stat_en(dsaf_dev);
1279
1280 hns_dsaf_tbl_tcam_init(dsaf_dev);
1281 hns_dsaf_tbl_line_init(dsaf_dev);
1282}
1283
1284/**
1285 * hns_dsaf_voq_init - INT
1286 * @dsaf_id: dsa fabric id
1287 */
1288static void hns_dsaf_voq_init(struct dsaf_device *dsaf_dev)
1289{
1290 hns_dsaf_voq_bp_all_thrd_cfg(dsaf_dev);
1291}
1292
1293/**
1294 * hns_dsaf_init_hw - init dsa fabric hardware
1295 * @dsaf_dev: dsa fabric device struct pointer
1296 */
1297static int hns_dsaf_init_hw(struct dsaf_device *dsaf_dev)
1298{
1299 int ret;
1300
1301 dev_dbg(dsaf_dev->dev,
1302 "hns_dsaf_init_hw begin %s !\n", dsaf_dev->ae_dev.name);
1303
a24274aa 1304 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
511e6bc0 1305 mdelay(10);
a24274aa 1306 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 1);
511e6bc0 1307
1308 hns_dsaf_comm_init(dsaf_dev);
1309
1310 /*init XBAR_INODE*/
1311 hns_dsaf_inode_init(dsaf_dev);
1312
1313 /*init SBM*/
1314 ret = hns_dsaf_sbm_init(dsaf_dev);
1315 if (ret)
1316 return ret;
1317
1318 /*init TBL*/
1319 hns_dsaf_tbl_init(dsaf_dev);
1320
1321 /*init VOQ*/
1322 hns_dsaf_voq_init(dsaf_dev);
1323
1324 return 0;
1325}
1326
1327/**
1328 * hns_dsaf_remove_hw - uninit dsa fabric hardware
1329 * @dsaf_dev: dsa fabric device struct pointer
1330 */
1331static void hns_dsaf_remove_hw(struct dsaf_device *dsaf_dev)
1332{
1333 /*reset*/
a24274aa 1334 dsaf_dev->misc_op->dsaf_reset(dsaf_dev, 0);
511e6bc0 1335}
1336
1337/**
1338 * hns_dsaf_init - init dsa fabric
1339 * @dsaf_dev: dsa fabric device struct pointer
1340 * retuen 0 - success , negative --fail
1341 */
1342static int hns_dsaf_init(struct dsaf_device *dsaf_dev)
1343{
1344 struct dsaf_drv_priv *priv =
1345 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1346 u32 i;
1347 int ret;
1348
89a44093
YZZ		 1349 if (HNS_DSAF_IS_DEBUG(dsaf_dev))
1350 return 0;
1351
511e6bc0 1352 ret = hns_dsaf_init_hw(dsaf_dev);
1353 if (ret)
1354 return ret;
1355
1356 /* malloc mem for tcam mac key(vlan+mac) */
1357 priv->soft_mac_tbl = vzalloc(sizeof(*priv->soft_mac_tbl)
1358 * DSAF_TCAM_SUM);
1359 if (!priv->soft_mac_tbl) {
1360 ret = -ENOMEM;
1361 goto remove_hw;
1362 }
1363
1364 /*all entry invall */
1365 for (i = 0; i < DSAF_TCAM_SUM; i++)
1366 (priv->soft_mac_tbl + i)->index = DSAF_INVALID_ENTRY_IDX;
1367
1368 return 0;
1369
1370remove_hw:
1371 hns_dsaf_remove_hw(dsaf_dev);
1372 return ret;
1373}
1374
1375/**
1376 * hns_dsaf_free - free dsa fabric
1377 * @dsaf_dev: dsa fabric device struct pointer
1378 */
1379static void hns_dsaf_free(struct dsaf_device *dsaf_dev)
1380{
1381 struct dsaf_drv_priv *priv =
1382 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1383
1384 hns_dsaf_remove_hw(dsaf_dev);
1385
1386 /* free all mac mem */
1387 vfree(priv->soft_mac_tbl);
1388 priv->soft_mac_tbl = NULL;
1389}
1390
1391/**
1392 * hns_dsaf_find_soft_mac_entry - find dsa fabric soft entry
1393 * @dsaf_dev: dsa fabric device struct pointer
1394 * @mac_key: mac entry struct pointer
1395 */
1396static u16 hns_dsaf_find_soft_mac_entry(
1397 struct dsaf_device *dsaf_dev,
1398 struct dsaf_drv_tbl_tcam_key *mac_key)
1399{
1400 struct dsaf_drv_priv *priv =
1401 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1402 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1403 u32 i;
1404
1405 soft_mac_entry = priv->soft_mac_tbl;
1406 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1407 /* invall tab entry */
1408 if ((soft_mac_entry->index != DSAF_INVALID_ENTRY_IDX) &&
1409 (soft_mac_entry->tcam_key.high.val == mac_key->high.val) &&
1410 (soft_mac_entry->tcam_key.low.val == mac_key->low.val))
1411 /* return find result --soft index */
1412 return soft_mac_entry->index;
1413
1414 soft_mac_entry++;
1415 }
1416 return DSAF_INVALID_ENTRY_IDX;
1417}
1418
1419/**
1420 * hns_dsaf_find_empty_mac_entry - search dsa fabric soft empty-entry
1421 * @dsaf_dev: dsa fabric device struct pointer
1422 */
1423static u16 hns_dsaf_find_empty_mac_entry(struct dsaf_device *dsaf_dev)
1424{
1425 struct dsaf_drv_priv *priv =
1426 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1427 struct dsaf_drv_soft_mac_tbl *soft_mac_entry;
1428 u32 i;
1429
1430 soft_mac_entry = priv->soft_mac_tbl;
1431 for (i = 0; i < DSAF_TCAM_SUM; i++) {
1432 /* inv all entry */
1433 if (soft_mac_entry->index == DSAF_INVALID_ENTRY_IDX)
1434 /* return find result --soft index */
1435 return i;
1436
1437 soft_mac_entry++;
1438 }
1439 return DSAF_INVALID_ENTRY_IDX;
1440}
1441
1442/**
1443 * hns_dsaf_set_mac_key - set mac key
1444 * @dsaf_dev: dsa fabric device struct pointer
1445 * @mac_key: tcam key pointer
1446 * @vlan_id: vlan id
1447 * @in_port_num: input port num
1448 * @addr: mac addr
1449 */
1450static void hns_dsaf_set_mac_key(
1451 struct dsaf_device *dsaf_dev,
1452 struct dsaf_drv_tbl_tcam_key *mac_key, u16 vlan_id, u8 in_port_num,
1453 u8 *addr)
1454{
1455 u8 port;
1456
1457 if (dsaf_dev->dsaf_mode <= DSAF_MODE_ENABLE)
1458 /*DSAF mode : in port id fixed 0*/
1459 port = 0;
1460 else
1461 /*non-dsaf mode*/
1462 port = in_port_num;
1463
1464 mac_key->high.bits.mac_0 = addr[0];
1465 mac_key->high.bits.mac_1 = addr[1];
1466 mac_key->high.bits.mac_2 = addr[2];
1467 mac_key->high.bits.mac_3 = addr[3];
1468 mac_key->low.bits.mac_4 = addr[4];
1469 mac_key->low.bits.mac_5 = addr[5];
1470 mac_key->low.bits.vlan = vlan_id;
1471 mac_key->low.bits.port = port;
1472}
1473
1474/**
1475 * hns_dsaf_set_mac_uc_entry - set mac uc-entry
1476 * @dsaf_dev: dsa fabric device struct pointer
1477 * @mac_entry: uc-mac entry
1478 */
1479int hns_dsaf_set_mac_uc_entry(
1480 struct dsaf_device *dsaf_dev,
1481 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1482{
1483 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1484 struct dsaf_drv_tbl_tcam_key mac_key;
1485 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1486 struct dsaf_drv_priv *priv =
1487 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1488 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1489
1490 /* mac addr check */
1491 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1492 MAC_IS_BROADCAST(mac_entry->addr) ||
1493 MAC_IS_MULTICAST(mac_entry->addr)) {
98900a80
AS		 1494 dev_err(dsaf_dev->dev, "set_uc %s Mac %pM err!\n",
1495 dsaf_dev->ae_dev.name, mac_entry->addr);
511e6bc0 1496 return -EINVAL;
1497 }
1498
1499 /* config key */
1500 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1501 mac_entry->in_port_num, mac_entry->addr);
1502
1503 /* entry ie exist? */
1504 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1505 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1506 /*if has not inv entry,find a empty entry */
1507 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1508 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1509 /* has not empty,return error */
1510 dev_err(dsaf_dev->dev,
1511 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1512 dsaf_dev->ae_dev.name,
1513 mac_key.high.val, mac_key.low.val);
1514 return -EINVAL;
1515 }
1516 }
1517
1518 dev_dbg(dsaf_dev->dev,
1519 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1520 dsaf_dev->ae_dev.name, mac_key.high.val,
1521 mac_key.low.val, entry_index);
1522
1523 /* config hardware entry */
1524 mac_data.tbl_ucast_item_vld = 1;
1525 mac_data.tbl_ucast_mac_discard = 0;
1526 mac_data.tbl_ucast_old_en = 0;
1527 /* default config dvc to 0 */
1528 mac_data.tbl_ucast_dvc = 0;
1529 mac_data.tbl_ucast_out_port = mac_entry->port_num;
1530 hns_dsaf_tcam_uc_cfg(
1531 dsaf_dev, entry_index,
1532 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1533
1534 /* config software entry */
1535 soft_mac_entry += entry_index;
1536 soft_mac_entry->index = entry_index;
1537 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1538 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1539
1540 return 0;
1541}
1542
1543/**
1544 * hns_dsaf_set_mac_mc_entry - set mac mc-entry
1545 * @dsaf_dev: dsa fabric device struct pointer
1546 * @mac_entry: mc-mac entry
1547 */
1548int hns_dsaf_set_mac_mc_entry(
1549 struct dsaf_device *dsaf_dev,
1550 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1551{
1552 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1553 struct dsaf_drv_tbl_tcam_key mac_key;
1554 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1555 struct dsaf_drv_priv *priv =
1556 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1557 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1558 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1559
1560 /* mac addr check */
1561 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1562 dev_err(dsaf_dev->dev, "set uc %s Mac %pM err!\n",
1563 dsaf_dev->ae_dev.name, mac_entry->addr);
511e6bc0 1564 return -EINVAL;
1565 }
1566
1567 /*config key */
1568 hns_dsaf_set_mac_key(dsaf_dev, &mac_key,
1569 mac_entry->in_vlan_id,
1570 mac_entry->in_port_num, mac_entry->addr);
1571
1572 /* entry ie exist? */
1573 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1574 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1575 /*if hasnot, find enpty entry*/
1576 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1577 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1578 /*if hasnot empty, error*/
1579 dev_err(dsaf_dev->dev,
1580 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1581 dsaf_dev->ae_dev.name,
1582 mac_key.high.val, mac_key.low.val);
1583 return -EINVAL;
1584 }
1585
1586 /* config hardware entry */
1587 memset(mac_data.tbl_mcast_port_msk,
1588 0, sizeof(mac_data.tbl_mcast_port_msk));
1589 } else {
1590 /* config hardware entry */
1591 hns_dsaf_tcam_mc_get(
1592 dsaf_dev, entry_index,
1593 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1594 }
1595 mac_data.tbl_mcast_old_en = 0;
1596 mac_data.tbl_mcast_item_vld = 1;
1597 dsaf_set_field(mac_data.tbl_mcast_port_msk[0],
1598 0x3F, 0, mac_entry->port_mask[0]);
1599
1600 dev_dbg(dsaf_dev->dev,
1601 "set_uc_entry, %s key(%#x:%#x) entry_index%d\n",
1602 dsaf_dev->ae_dev.name, mac_key.high.val,
1603 mac_key.low.val, entry_index);
1604
1605 hns_dsaf_tcam_mc_cfg(
1606 dsaf_dev, entry_index,
1607 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1608
1609 /* config software entry */
1610 soft_mac_entry += entry_index;
1611 soft_mac_entry->index = entry_index;
1612 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1613 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1614
1615 return 0;
1616}
1617
1618/**
1619 * hns_dsaf_add_mac_mc_port - add mac mc-port
1620 * @dsaf_dev: dsa fabric device struct pointer
1621 * @mac_entry: mc-mac entry
1622 */
1623int hns_dsaf_add_mac_mc_port(struct dsaf_device *dsaf_dev,
1624 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1625{
1626 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1627 struct dsaf_drv_tbl_tcam_key mac_key;
1628 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1629 struct dsaf_drv_priv *priv =
1630 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1631 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1632 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1633 int mskid;
1634
1635 /*chechk mac addr */
1636 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1637 dev_err(dsaf_dev->dev, "set_entry failed,addr %pM!\n",
1638 mac_entry->addr);
511e6bc0 1639 return -EINVAL;
1640 }
1641
1642 /*config key */
1643 hns_dsaf_set_mac_key(
1644 dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1645 mac_entry->in_port_num, mac_entry->addr);
1646
1647 memset(&mac_data, 0, sizeof(struct dsaf_tbl_tcam_mcast_cfg));
1648
1649 /*check exist? */
1650 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1651 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1652 /*if hasnot , find a empty*/
1653 entry_index = hns_dsaf_find_empty_mac_entry(dsaf_dev);
1654 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1655 /*if hasnot empty, error*/
1656 dev_err(dsaf_dev->dev,
1657 "set_uc_entry failed, %s Mac key(%#x:%#x)\n",
1658 dsaf_dev->ae_dev.name, mac_key.high.val,
1659 mac_key.low.val);
1660 return -EINVAL;
1661 }
1662 } else {
1663 /*if exist, add in */
1664 hns_dsaf_tcam_mc_get(
1665 dsaf_dev, entry_index,
1666 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1667 }
1668 /* config hardware entry */
1669 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1670 mskid = mac_entry->port_num;
1671 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1672 mskid = mac_entry->port_num -
1673 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1674 } else {
1675 dev_err(dsaf_dev->dev,
1676 "%s,pnum(%d)error,key(%#x:%#x)\n",
1677 dsaf_dev->ae_dev.name, mac_entry->port_num,
1678 mac_key.high.val, mac_key.low.val);
1679 return -EINVAL;
1680 }
1681 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 1);
1682 mac_data.tbl_mcast_old_en = 0;
1683 mac_data.tbl_mcast_item_vld = 1;
1684
1685 dev_dbg(dsaf_dev->dev,
1686 "set_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1687 dsaf_dev->ae_dev.name, mac_key.high.val,
1688 mac_key.low.val, entry_index);
1689
1690 hns_dsaf_tcam_mc_cfg(
1691 dsaf_dev, entry_index,
1692 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1693
1694 /*config software entry */
1695 soft_mac_entry += entry_index;
1696 soft_mac_entry->index = entry_index;
1697 soft_mac_entry->tcam_key.high.val = mac_key.high.val;
1698 soft_mac_entry->tcam_key.low.val = mac_key.low.val;
1699
1700 return 0;
1701}
1702
1703/**
1704 * hns_dsaf_del_mac_entry - del mac mc-port
1705 * @dsaf_dev: dsa fabric device struct pointer
1706 * @vlan_id: vlian id
1707 * @in_port_num: input port num
1708 * @addr : mac addr
1709 */
1710int hns_dsaf_del_mac_entry(struct dsaf_device *dsaf_dev, u16 vlan_id,
1711 u8 in_port_num, u8 *addr)
1712{
1713 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1714 struct dsaf_drv_tbl_tcam_key mac_key;
1715 struct dsaf_drv_priv *priv =
1716 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1717 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1718
1719 /*check mac addr */
1720 if (MAC_IS_ALL_ZEROS(addr) || MAC_IS_BROADCAST(addr)) {
98900a80
AS		 1721 dev_err(dsaf_dev->dev, "del_entry failed,addr %pM!\n",
1722 addr);
511e6bc0 1723 return -EINVAL;
1724 }
1725
1726 /*config key */
1727 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num, addr);
1728
1729 /*exist ?*/
1730 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1731 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1732 /*not exist, error */
1733 dev_err(dsaf_dev->dev,
1734 "del_mac_entry failed, %s Mac key(%#x:%#x)\n",
1735 dsaf_dev->ae_dev.name,
1736 mac_key.high.val, mac_key.low.val);
1737 return -EINVAL;
1738 }
1739 dev_dbg(dsaf_dev->dev,
1740 "del_mac_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1741 dsaf_dev->ae_dev.name, mac_key.high.val,
1742 mac_key.low.val, entry_index);
1743
1744 /*do del opt*/
1745 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1746
1747 /*del soft emtry */
1748 soft_mac_entry += entry_index;
1749 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1750
1751 return 0;
1752}
1753
1754/**
1755 * hns_dsaf_del_mac_mc_port - del mac mc- port
1756 * @dsaf_dev: dsa fabric device struct pointer
1757 * @mac_entry: mac entry
1758 */
1759int hns_dsaf_del_mac_mc_port(struct dsaf_device *dsaf_dev,
1760 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1761{
1762 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1763 struct dsaf_drv_tbl_tcam_key mac_key;
1764 struct dsaf_drv_priv *priv =
1765 (struct dsaf_drv_priv *)hns_dsaf_dev_priv(dsaf_dev);
1766 struct dsaf_drv_soft_mac_tbl *soft_mac_entry = priv->soft_mac_tbl;
1767 u16 vlan_id;
1768 u8 in_port_num;
1769 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1770 struct dsaf_drv_tbl_tcam_key tmp_mac_key;
1771 int mskid;
1772 const u8 empty_msk[sizeof(mac_data.tbl_mcast_port_msk)] = {0};
1773
1774 if (!(void *)mac_entry) {
1775 dev_err(dsaf_dev->dev,
1776 "hns_dsaf_del_mac_mc_port mac_entry is NULL\n");
1777 return -EINVAL;
1778 }
1779
1780 /*get key info*/
1781 vlan_id = mac_entry->in_vlan_id;
1782 in_port_num = mac_entry->in_port_num;
1783
1784 /*check mac addr */
1785 if (MAC_IS_ALL_ZEROS(mac_entry->addr)) {
98900a80
AS		 1786 dev_err(dsaf_dev->dev, "del_port failed, addr %pM!\n",
1787 mac_entry->addr);
511e6bc0 1788 return -EINVAL;
1789 }
1790
1791 /*config key */
1792 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, vlan_id, in_port_num,
1793 mac_entry->addr);
1794
1795 /*check is exist? */
1796 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1797 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1798 /*find none */
1799 dev_err(dsaf_dev->dev,
1800 "find_soft_mac_entry failed, %s Mac key(%#x:%#x)\n",
1801 dsaf_dev->ae_dev.name,
1802 mac_key.high.val, mac_key.low.val);
1803 return -EINVAL;
1804 }
1805
1806 dev_dbg(dsaf_dev->dev,
1807 "del_mac_mc_port, %s key(%#x:%#x) index%d\n",
1808 dsaf_dev->ae_dev.name, mac_key.high.val,
1809 mac_key.low.val, entry_index);
1810
1811 /*read entry*/
1812 hns_dsaf_tcam_mc_get(
1813 dsaf_dev, entry_index,
1814 (struct dsaf_tbl_tcam_data *)(&tmp_mac_key), &mac_data);
1815
1816 /*del the port*/
1817 if (mac_entry->port_num < DSAF_SERVICE_NW_NUM) {
1818 mskid = mac_entry->port_num;
1819 } else if (mac_entry->port_num >= DSAF_BASE_INNER_PORT_NUM) {
1820 mskid = mac_entry->port_num -
1821 DSAF_BASE_INNER_PORT_NUM + DSAF_SERVICE_NW_NUM;
1822 } else {
1823 dev_err(dsaf_dev->dev,
1824 "%s,pnum(%d)error,key(%#x:%#x)\n",
1825 dsaf_dev->ae_dev.name, mac_entry->port_num,
1826 mac_key.high.val, mac_key.low.val);
1827 return -EINVAL;
1828 }
1829 dsaf_set_bit(mac_data.tbl_mcast_port_msk[mskid / 32], mskid % 32, 0);
1830
1831 /*check non port, do del entry */
1832 if (!memcmp(mac_data.tbl_mcast_port_msk, empty_msk,
1833 sizeof(mac_data.tbl_mcast_port_msk))) {
1834 hns_dsaf_tcam_mc_invld(dsaf_dev, entry_index);
1835
1836 /* del soft entry */
1837 soft_mac_entry += entry_index;
1838 soft_mac_entry->index = DSAF_INVALID_ENTRY_IDX;
1839 } else { /* not zer, just del port, updata*/
1840 hns_dsaf_tcam_mc_cfg(
1841 dsaf_dev, entry_index,
1842 (struct dsaf_tbl_tcam_data *)(&mac_key), &mac_data);
1843 }
1844
1845 return 0;
1846}
1847
1848/**
1849 * hns_dsaf_get_mac_uc_entry - get mac uc entry
1850 * @dsaf_dev: dsa fabric device struct pointer
1851 * @mac_entry: mac entry
1852 */
1853int hns_dsaf_get_mac_uc_entry(struct dsaf_device *dsaf_dev,
1854 struct dsaf_drv_mac_single_dest_entry *mac_entry)
1855{
1856 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1857 struct dsaf_drv_tbl_tcam_key mac_key;
1858
1859 struct dsaf_tbl_tcam_ucast_cfg mac_data;
1860
1861 /* check macaddr */
1862 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1863 MAC_IS_BROADCAST(mac_entry->addr)) {
98900a80
AS		 1864 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1865 mac_entry->addr);
511e6bc0 1866 return -EINVAL;
1867 }
1868
1869 /*config key */
1870 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1871 mac_entry->in_port_num, mac_entry->addr);
1872
1873 /*check exist? */
1874 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1875 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1876 /*find none, error */
1877 dev_err(dsaf_dev->dev,
1878 "get_uc_entry failed, %s Mac key(%#x:%#x)\n",
1879 dsaf_dev->ae_dev.name,
1880 mac_key.high.val, mac_key.low.val);
1881 return -EINVAL;
1882 }
1883 dev_dbg(dsaf_dev->dev,
1884 "get_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1885 dsaf_dev->ae_dev.name, mac_key.high.val,
1886 mac_key.low.val, entry_index);
1887
1888 /*read entry*/
1889 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1890 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1891 mac_entry->port_num = mac_data.tbl_ucast_out_port;
1892
1893 return 0;
1894}
1895
1896/**
1897 * hns_dsaf_get_mac_mc_entry - get mac mc entry
1898 * @dsaf_dev: dsa fabric device struct pointer
1899 * @mac_entry: mac entry
1900 */
1901int hns_dsaf_get_mac_mc_entry(struct dsaf_device *dsaf_dev,
1902 struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1903{
1904 u16 entry_index = DSAF_INVALID_ENTRY_IDX;
1905 struct dsaf_drv_tbl_tcam_key mac_key;
1906
1907 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1908
1909 /*check mac addr */
1910 if (MAC_IS_ALL_ZEROS(mac_entry->addr) ||
1911 MAC_IS_BROADCAST(mac_entry->addr)) {
98900a80
AS		 1912 dev_err(dsaf_dev->dev, "get_entry failed,addr %pM\n",
1913 mac_entry->addr);
511e6bc0 1914 return -EINVAL;
1915 }
1916
1917 /*config key */
1918 hns_dsaf_set_mac_key(dsaf_dev, &mac_key, mac_entry->in_vlan_id,
1919 mac_entry->in_port_num, mac_entry->addr);
1920
1921 /*check exist? */
1922 entry_index = hns_dsaf_find_soft_mac_entry(dsaf_dev, &mac_key);
1923 if (entry_index == DSAF_INVALID_ENTRY_IDX) {
1924 /* find none, error */
1925 dev_err(dsaf_dev->dev,
1926 "get_mac_uc_entry failed, %s Mac key(%#x:%#x)\n",
1927 dsaf_dev->ae_dev.name, mac_key.high.val,
1928 mac_key.low.val);
1929 return -EINVAL;
1930 }
1931 dev_dbg(dsaf_dev->dev,
1932 "get_mac_uc_entry, %s Mac key(%#x:%#x) entry_index%d\n",
1933 dsaf_dev->ae_dev.name, mac_key.high.val,
1934 mac_key.low.val, entry_index);
1935
1936 /*read entry */
1937 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1938 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1939
1940 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1941 return 0;
1942}
1943
1944/**
1945 * hns_dsaf_get_mac_entry_by_index - get mac entry by tab index
1946 * @dsaf_dev: dsa fabric device struct pointer
1947 * @entry_index: tab entry index
1948 * @mac_entry: mac entry
1949 */
1950int hns_dsaf_get_mac_entry_by_index(
1951 struct dsaf_device *dsaf_dev,
1952 u16 entry_index, struct dsaf_drv_mac_multi_dest_entry *mac_entry)
1953{
1954 struct dsaf_drv_tbl_tcam_key mac_key;
1955
1956 struct dsaf_tbl_tcam_mcast_cfg mac_data;
1957 struct dsaf_tbl_tcam_ucast_cfg mac_uc_data;
1958 char mac_addr[MAC_NUM_OCTETS_PER_ADDR] = {0};
1959
1960 if (entry_index >= DSAF_TCAM_SUM) {
1961 /* find none, del error */
1962 dev_err(dsaf_dev->dev, "get_uc_entry failed, %s\n",
1963 dsaf_dev->ae_dev.name);
1964 return -EINVAL;
1965 }
1966
1967 /* mc entry, do read opt */
1968 hns_dsaf_tcam_mc_get(dsaf_dev, entry_index,
1969 (struct dsaf_tbl_tcam_data *)&mac_key, &mac_data);
1970
1971 mac_entry->port_mask[0] = mac_data.tbl_mcast_port_msk[0] & 0x3F;
1972
1973 /***get mac addr*/
1974 mac_addr[0] = mac_key.high.bits.mac_0;
1975 mac_addr[1] = mac_key.high.bits.mac_1;
1976 mac_addr[2] = mac_key.high.bits.mac_2;
1977 mac_addr[3] = mac_key.high.bits.mac_3;
1978 mac_addr[4] = mac_key.low.bits.mac_4;
1979 mac_addr[5] = mac_key.low.bits.mac_5;
1980 /**is mc or uc*/
1981 if (MAC_IS_MULTICAST((u8 *)mac_addr) ||
1982 MAC_IS_L3_MULTICAST((u8 *)mac_addr)) {
1983 /**mc donot do*/
1984 } else {
1985 /*is not mc, just uc... */
1986 hns_dsaf_tcam_uc_get(dsaf_dev, entry_index,
1987 (struct dsaf_tbl_tcam_data *)&mac_key,
1988 &mac_uc_data);
1989 mac_entry->port_mask[0] = (1 << mac_uc_data.tbl_ucast_out_port);
1990 }
1991
1992 return 0;
1993}
1994
1995static struct dsaf_device *hns_dsaf_alloc_dev(struct device *dev,
1996 size_t sizeof_priv)
1997{
1998 struct dsaf_device *dsaf_dev;
1999
2000 dsaf_dev = devm_kzalloc(dev,
2001 sizeof(*dsaf_dev) + sizeof_priv, GFP_KERNEL);
2002 if (unlikely(!dsaf_dev)) {
2003 dsaf_dev = ERR_PTR(-ENOMEM);
2004 } else {
2005 dsaf_dev->dev = dev;
2006 dev_set_drvdata(dev, dsaf_dev);
2007 }
2008
2009 return dsaf_dev;
2010}
2011
2012/**
2013 * hns_dsaf_free_dev - free dev mem
2014 * @dev: struct device pointer
2015 */
2016static void hns_dsaf_free_dev(struct dsaf_device *dsaf_dev)
2017{
2018 (void)dev_set_drvdata(dsaf_dev->dev, NULL);
2019}
2020
2021/**
2022 * dsaf_pfc_unit_cnt - set pfc unit count
2023 * @dsaf_id: dsa fabric id
2024 * @pport_rate: value array
2025 * @pdsaf_pfc_unit_cnt: value array
2026 */
2027static void hns_dsaf_pfc_unit_cnt(struct dsaf_device *dsaf_dev, int mac_id,
2028 enum dsaf_port_rate_mode rate)
2029{
2030 u32 unit_cnt;
2031
2032 switch (rate) {
2033 case DSAF_PORT_RATE_10000:
2034 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2035 break;
2036 case DSAF_PORT_RATE_1000:
2037 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2038 break;
2039 case DSAF_PORT_RATE_2500:
2040 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_GE_1000;
2041 break;
2042 default:
2043 unit_cnt = HNS_DSAF_PFC_UNIT_CNT_FOR_XGE;
2044 }
2045
2046 dsaf_set_dev_field(dsaf_dev,
2047 (DSAF_PFC_UNIT_CNT_0_REG + 0x4 * (u64)mac_id),
2048 DSAF_PFC_UNINT_CNT_M, DSAF_PFC_UNINT_CNT_S,
2049 unit_cnt);
2050}
2051
2052/**
2053 * dsaf_port_work_rate_cfg - fifo
2054 * @dsaf_id: dsa fabric id
2055 * @xge_ge_work_mode
2056 */
2057void hns_dsaf_port_work_rate_cfg(struct dsaf_device *dsaf_dev, int mac_id,
2058 enum dsaf_port_rate_mode rate_mode)
2059{
2060 u32 port_work_mode;
2061
2062 port_work_mode = dsaf_read_dev(
2063 dsaf_dev, DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id);
2064
2065 if (rate_mode == DSAF_PORT_RATE_10000)
2066 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 1);
2067 else
2068 dsaf_set_bit(port_work_mode, DSAF_XGE_GE_WORK_MODE_S, 0);
2069
2070 dsaf_write_dev(dsaf_dev,
2071 DSAF_XGE_GE_WORK_MODE_0_REG + 0x4 * (u64)mac_id,
2072 port_work_mode);
2073
2074 hns_dsaf_pfc_unit_cnt(dsaf_dev, mac_id, rate_mode);
2075}
2076
2077/**
2078 * hns_dsaf_fix_mac_mode - dsaf modify mac mode
2079 * @mac_cb: mac contrl block
2080 */
2081void hns_dsaf_fix_mac_mode(struct hns_mac_cb *mac_cb)
2082{
2083 enum dsaf_port_rate_mode mode;
2084 struct dsaf_device *dsaf_dev = mac_cb->dsaf_dev;
2085 int mac_id = mac_cb->mac_id;
2086
2087 if (mac_cb->mac_type != HNAE_PORT_SERVICE)
2088 return;
2089 if (mac_cb->phy_if == PHY_INTERFACE_MODE_XGMII)
2090 mode = DSAF_PORT_RATE_10000;
2091 else
2092 mode = DSAF_PORT_RATE_1000;
2093
2094 hns_dsaf_port_work_rate_cfg(dsaf_dev, mac_id, mode);
2095}
2096
2097void hns_dsaf_update_stats(struct dsaf_device *dsaf_dev, u32 node_num)
2098{
2099 struct dsaf_hw_stats *hw_stats
2100 = &dsaf_dev->hw_stats[node_num];
5ada37b5
L		 2101 bool is_ver1 = AE_IS_VER1(dsaf_dev->dsaf_ver);
2102 u32 reg_tmp;
511e6bc0 2103
2104 hw_stats->pad_drop += dsaf_read_dev(dsaf_dev,
2105 DSAF_INODE_PAD_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2106 hw_stats->man_pkts += dsaf_read_dev(dsaf_dev,
2107 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + 0x80 * (u64)node_num);
2108 hw_stats->rx_pkts += dsaf_read_dev(dsaf_dev,
2109 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + 0x80 * (u64)node_num);
2110 hw_stats->rx_pkt_id += dsaf_read_dev(dsaf_dev,
2111 DSAF_INODE_SBM_PID_NUM_0_REG + 0x80 * (u64)node_num);
5ada37b5
L		 2112
2113 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2114 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2115 hw_stats->rx_pause_frame +=
2116 dsaf_read_dev(dsaf_dev, reg_tmp + 0x80 * (u64)node_num);
2117
511e6bc0 2118 hw_stats->release_buf_num += dsaf_read_dev(dsaf_dev,
2119 DSAF_INODE_SBM_RELS_NUM_0_REG + 0x80 * (u64)node_num);
2120 hw_stats->sbm_drop += dsaf_read_dev(dsaf_dev,
2121 DSAF_INODE_SBM_DROP_NUM_0_REG + 0x80 * (u64)node_num);
2122 hw_stats->crc_false += dsaf_read_dev(dsaf_dev,
2123 DSAF_INODE_CRC_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2124 hw_stats->bp_drop += dsaf_read_dev(dsaf_dev,
2125 DSAF_INODE_BP_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2126 hw_stats->rslt_drop += dsaf_read_dev(dsaf_dev,
2127 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + 0x80 * (u64)node_num);
2128 hw_stats->local_addr_false += dsaf_read_dev(dsaf_dev,
2129 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + 0x80 * (u64)node_num);
2130
2131 hw_stats->vlan_drop += dsaf_read_dev(dsaf_dev,
2132 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + 0x80 * (u64)node_num);
2133 hw_stats->stp_drop += dsaf_read_dev(dsaf_dev,
2134 DSAF_INODE_IN_DATA_STP_DISC_0_REG + 0x80 * (u64)node_num);
2135
2136 hw_stats->tx_pkts += dsaf_read_dev(dsaf_dev,
2137 DSAF_XOD_RCVPKT_CNT_0_REG + 0x90 * (u64)node_num);
2138}
2139
2140/**
2141 *hns_dsaf_get_regs - dump dsaf regs
2142 *@dsaf_dev: dsaf device
2143 *@data:data for value of regs
2144 */
2145void hns_dsaf_get_regs(struct dsaf_device *ddev, u32 port, void *data)
2146{
2147 u32 i = 0;
2148 u32 j;
2149 u32 *p = data;
5ada37b5
L		 2150 u32 reg_tmp;
2151 bool is_ver1 = AE_IS_VER1(ddev->dsaf_ver);
511e6bc0 2152
2153 /* dsaf common registers */
2154 p[0] = dsaf_read_dev(ddev, DSAF_SRAM_INIT_OVER_0_REG);
2155 p[1] = dsaf_read_dev(ddev, DSAF_CFG_0_REG);
2156 p[2] = dsaf_read_dev(ddev, DSAF_ECC_ERR_INVERT_0_REG);
2157 p[3] = dsaf_read_dev(ddev, DSAF_ABNORMAL_TIMEOUT_0_REG);
2158 p[4] = dsaf_read_dev(ddev, DSAF_FSM_TIMEOUT_0_REG);
2159 p[5] = dsaf_read_dev(ddev, DSAF_DSA_REG_CNT_CLR_CE_REG);
2160 p[6] = dsaf_read_dev(ddev, DSAF_DSA_SBM_INF_FIFO_THRD_REG);
2161 p[7] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_SEL_REG);
2162 p[8] = dsaf_read_dev(ddev, DSAF_DSA_SRAM_1BIT_ECC_CNT_REG);
2163
2164 p[9] = dsaf_read_dev(ddev, DSAF_PFC_EN_0_REG + port * 4);
2165 p[10] = dsaf_read_dev(ddev, DSAF_PFC_UNIT_CNT_0_REG + port * 4);
2166 p[11] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2167 p[12] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2168 p[13] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2169 p[14] = dsaf_read_dev(ddev, DSAF_XGE_INT_MSK_0_REG + port * 4);
2170 p[15] = dsaf_read_dev(ddev, DSAF_PPE_INT_MSK_0_REG + port * 4);
2171 p[16] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_MSK_0_REG + port * 4);
2172 p[17] = dsaf_read_dev(ddev, DSAF_XGE_INT_SRC_0_REG + port * 4);
2173 p[18] = dsaf_read_dev(ddev, DSAF_PPE_INT_SRC_0_REG + port * 4);
2174 p[19] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_SRC_0_REG + port * 4);
2175 p[20] = dsaf_read_dev(ddev, DSAF_XGE_INT_STS_0_REG + port * 4);
2176 p[21] = dsaf_read_dev(ddev, DSAF_PPE_INT_STS_0_REG + port * 4);
2177 p[22] = dsaf_read_dev(ddev, DSAF_ROCEE_INT_STS_0_REG + port * 4);
2178 p[23] = dsaf_read_dev(ddev, DSAF_PPE_QID_CFG_0_REG + port * 4);
2179
2180 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2181 p[24 + i] = dsaf_read_dev(ddev,
2182 DSAF_SW_PORT_TYPE_0_REG + i * 4);
2183
2184 p[32] = dsaf_read_dev(ddev, DSAF_MIX_DEF_QID_0_REG + port * 4);
2185
2186 for (i = 0; i < DSAF_SW_PORT_NUM; i++)
2187 p[33 + i] = dsaf_read_dev(ddev,
2188 DSAF_PORT_DEF_VLAN_0_REG + i * 4);
2189
2190 for (i = 0; i < DSAF_TOTAL_QUEUE_NUM; i++)
2191 p[41 + i] = dsaf_read_dev(ddev,
2192 DSAF_VM_DEF_VLAN_0_REG + i * 4);
2193
2194 /* dsaf inode registers */
2195 p[170] = dsaf_read_dev(ddev, DSAF_INODE_CUT_THROUGH_CFG_0_REG);
2196
2197 p[171] = dsaf_read_dev(ddev,
2198 DSAF_INODE_ECC_ERR_ADDR_0_REG + port * 0x80);
2199
2200 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2201 j = i * DSAF_COMM_CHN + port;
2202 p[172 + i] = dsaf_read_dev(ddev,
2203 DSAF_INODE_IN_PORT_NUM_0_REG + j * 0x80);
2204 p[175 + i] = dsaf_read_dev(ddev,
2205 DSAF_INODE_PRI_TC_CFG_0_REG + j * 0x80);
2206 p[178 + i] = dsaf_read_dev(ddev,
2207 DSAF_INODE_BP_STATUS_0_REG + j * 0x80);
2208 p[181 + i] = dsaf_read_dev(ddev,
2209 DSAF_INODE_PAD_DISCARD_NUM_0_REG + j * 0x80);
2210 p[184 + i] = dsaf_read_dev(ddev,
2211 DSAF_INODE_FINAL_IN_MAN_NUM_0_REG + j * 0x80);
2212 p[187 + i] = dsaf_read_dev(ddev,
2213 DSAF_INODE_FINAL_IN_PKT_NUM_0_REG + j * 0x80);
2214 p[190 + i] = dsaf_read_dev(ddev,
2215 DSAF_INODE_SBM_PID_NUM_0_REG + j * 0x80);
5ada37b5
L		 2216 reg_tmp = is_ver1 ? DSAF_INODE_FINAL_IN_PAUSE_NUM_0_REG :
2217 DSAFV2_INODE_FINAL_IN_PAUSE_NUM_0_REG;
2218 p[193 + i] = dsaf_read_dev(ddev, reg_tmp + j * 0x80);
511e6bc0 2219 p[196 + i] = dsaf_read_dev(ddev,
2220 DSAF_INODE_SBM_RELS_NUM_0_REG + j * 0x80);
2221 p[199 + i] = dsaf_read_dev(ddev,
2222 DSAF_INODE_SBM_DROP_NUM_0_REG + j * 0x80);
2223 p[202 + i] = dsaf_read_dev(ddev,
2224 DSAF_INODE_CRC_FALSE_NUM_0_REG + j * 0x80);
2225 p[205 + i] = dsaf_read_dev(ddev,
2226 DSAF_INODE_BP_DISCARD_NUM_0_REG + j * 0x80);
2227 p[208 + i] = dsaf_read_dev(ddev,
2228 DSAF_INODE_RSLT_DISCARD_NUM_0_REG + j * 0x80);
2229 p[211 + i] = dsaf_read_dev(ddev,
2230 DSAF_INODE_LOCAL_ADDR_FALSE_NUM_0_REG + j * 0x80);
2231 p[214 + i] = dsaf_read_dev(ddev,
2232 DSAF_INODE_VOQ_OVER_NUM_0_REG + j * 0x80);
2233 p[217 + i] = dsaf_read_dev(ddev,
2234 DSAF_INODE_BD_SAVE_STATUS_0_REG + j * 4);
2235 p[220 + i] = dsaf_read_dev(ddev,
2236 DSAF_INODE_BD_ORDER_STATUS_0_REG + j * 4);
2237 p[223 + i] = dsaf_read_dev(ddev,
2238 DSAF_INODE_SW_VLAN_TAG_DISC_0_REG + j * 4);
2239 p[224 + i] = dsaf_read_dev(ddev,
2240 DSAF_INODE_IN_DATA_STP_DISC_0_REG + j * 4);
2241 }
2242
2243 p[227] = dsaf_read_dev(ddev, DSAF_INODE_GE_FC_EN_0_REG + port * 4);
2244
2245 for (i = 0; i < DSAF_INODE_NUM / DSAF_COMM_CHN; i++) {
2246 j = i * DSAF_COMM_CHN + port;
2247 p[228 + i] = dsaf_read_dev(ddev,
2248 DSAF_INODE_VC0_IN_PKT_NUM_0_REG + j * 4);
2249 }
2250
2251 p[231] = dsaf_read_dev(ddev,
2252 DSAF_INODE_VC1_IN_PKT_NUM_0_REG + port * 4);
2253
2254 /* dsaf inode registers */
13ac695e 2255 for (i = 0; i < HNS_DSAF_SBM_NUM(ddev) / DSAF_COMM_CHN; i++) {
511e6bc0 2256 j = i * DSAF_COMM_CHN + port;
2257 p[232 + i] = dsaf_read_dev(ddev,
2258 DSAF_SBM_CFG_REG_0_REG + j * 0x80);
2259 p[235 + i] = dsaf_read_dev(ddev,
2260 DSAF_SBM_BP_CFG_0_XGE_REG_0_REG + j * 0x80);
2261 p[238 + i] = dsaf_read_dev(ddev,
2262 DSAF_SBM_BP_CFG_1_REG_0_REG + j * 0x80);
2263 p[241 + i] = dsaf_read_dev(ddev,
2264 DSAF_SBM_BP_CFG_2_XGE_REG_0_REG + j * 0x80);
2265 p[244 + i] = dsaf_read_dev(ddev,
2266 DSAF_SBM_FREE_CNT_0_0_REG + j * 0x80);
2267 p[245 + i] = dsaf_read_dev(ddev,
2268 DSAF_SBM_FREE_CNT_1_0_REG + j * 0x80);
2269 p[248 + i] = dsaf_read_dev(ddev,
2270 DSAF_SBM_BP_CNT_0_0_REG + j * 0x80);
2271 p[251 + i] = dsaf_read_dev(ddev,
2272 DSAF_SBM_BP_CNT_1_0_REG + j * 0x80);
2273 p[254 + i] = dsaf_read_dev(ddev,
2274 DSAF_SBM_BP_CNT_2_0_REG + j * 0x80);
2275 p[257 + i] = dsaf_read_dev(ddev,
2276 DSAF_SBM_BP_CNT_3_0_REG + j * 0x80);
2277 p[260 + i] = dsaf_read_dev(ddev,
2278 DSAF_SBM_INER_ST_0_REG + j * 0x80);
2279 p[263 + i] = dsaf_read_dev(ddev,
2280 DSAF_SBM_MIB_REQ_FAILED_TC_0_REG + j * 0x80);
2281 p[266 + i] = dsaf_read_dev(ddev,
2282 DSAF_SBM_LNK_INPORT_CNT_0_REG + j * 0x80);
2283 p[269 + i] = dsaf_read_dev(ddev,
2284 DSAF_SBM_LNK_DROP_CNT_0_REG + j * 0x80);
2285 p[272 + i] = dsaf_read_dev(ddev,
2286 DSAF_SBM_INF_OUTPORT_CNT_0_REG + j * 0x80);
2287 p[275 + i] = dsaf_read_dev(ddev,
2288 DSAF_SBM_LNK_INPORT_TC0_CNT_0_REG + j * 0x80);
2289 p[278 + i] = dsaf_read_dev(ddev,
2290 DSAF_SBM_LNK_INPORT_TC1_CNT_0_REG + j * 0x80);
2291 p[281 + i] = dsaf_read_dev(ddev,
2292 DSAF_SBM_LNK_INPORT_TC2_CNT_0_REG + j * 0x80);
2293 p[284 + i] = dsaf_read_dev(ddev,
2294 DSAF_SBM_LNK_INPORT_TC3_CNT_0_REG + j * 0x80);
2295 p[287 + i] = dsaf_read_dev(ddev,
2296 DSAF_SBM_LNK_INPORT_TC4_CNT_0_REG + j * 0x80);
2297 p[290 + i] = dsaf_read_dev(ddev,
2298 DSAF_SBM_LNK_INPORT_TC5_CNT_0_REG + j * 0x80);
2299 p[293 + i] = dsaf_read_dev(ddev,
2300 DSAF_SBM_LNK_INPORT_TC6_CNT_0_REG + j * 0x80);
2301 p[296 + i] = dsaf_read_dev(ddev,
2302 DSAF_SBM_LNK_INPORT_TC7_CNT_0_REG + j * 0x80);
2303 p[299 + i] = dsaf_read_dev(ddev,
2304 DSAF_SBM_LNK_REQ_CNT_0_REG + j * 0x80);
2305 p[302 + i] = dsaf_read_dev(ddev,
2306 DSAF_SBM_LNK_RELS_CNT_0_REG + j * 0x80);
2307 p[305 + i] = dsaf_read_dev(ddev,
2308 DSAF_SBM_BP_CFG_3_REG_0_REG + j * 0x80);
2309 p[308 + i] = dsaf_read_dev(ddev,
2310 DSAF_SBM_BP_CFG_4_REG_0_REG + j * 0x80);
2311 }
2312
2313 /* dsaf onode registers */
2314 for (i = 0; i < DSAF_XOD_NUM; i++) {
2315 p[311 + i] = dsaf_read_dev(ddev,
52613126 2316 DSAF_XOD_ETS_TSA_TC0_TC3_CFG_0_REG + i * 0x90);
511e6bc0 2317 p[319 + i] = dsaf_read_dev(ddev,
52613126 2318 DSAF_XOD_ETS_TSA_TC4_TC7_CFG_0_REG + i * 0x90);
511e6bc0 2319 p[327 + i] = dsaf_read_dev(ddev,
52613126 2320 DSAF_XOD_ETS_BW_TC0_TC3_CFG_0_REG + i * 0x90);
511e6bc0 2321 p[335 + i] = dsaf_read_dev(ddev,
52613126 2322 DSAF_XOD_ETS_BW_TC4_TC7_CFG_0_REG + i * 0x90);
511e6bc0 2323 p[343 + i] = dsaf_read_dev(ddev,
52613126 2324 DSAF_XOD_ETS_BW_OFFSET_CFG_0_REG + i * 0x90);
511e6bc0 2325 p[351 + i] = dsaf_read_dev(ddev,
52613126 2326 DSAF_XOD_ETS_TOKEN_CFG_0_REG + i * 0x90);
511e6bc0 2327 }
2328
2329 p[359] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_0_0_REG + port * 0x90);
2330 p[360] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_1_0_REG + port * 0x90);
2331 p[361] = dsaf_read_dev(ddev, DSAF_XOD_PFS_CFG_2_0_REG + port * 0x90);
2332
2333 for (i = 0; i < DSAF_XOD_BIG_NUM / DSAF_COMM_CHN; i++) {
2334 j = i * DSAF_COMM_CHN + port;
2335 p[362 + i] = dsaf_read_dev(ddev,
2336 DSAF_XOD_GNT_L_0_REG + j * 0x90);
2337 p[365 + i] = dsaf_read_dev(ddev,
2338 DSAF_XOD_GNT_H_0_REG + j * 0x90);
2339 p[368 + i] = dsaf_read_dev(ddev,
2340 DSAF_XOD_CONNECT_STATE_0_REG + j * 0x90);
2341 p[371 + i] = dsaf_read_dev(ddev,
2342 DSAF_XOD_RCVPKT_CNT_0_REG + j * 0x90);
2343 p[374 + i] = dsaf_read_dev(ddev,
2344 DSAF_XOD_RCVTC0_CNT_0_REG + j * 0x90);
2345 p[377 + i] = dsaf_read_dev(ddev,
2346 DSAF_XOD_RCVTC1_CNT_0_REG + j * 0x90);
2347 p[380 + i] = dsaf_read_dev(ddev,
2348 DSAF_XOD_RCVTC2_CNT_0_REG + j * 0x90);
2349 p[383 + i] = dsaf_read_dev(ddev,
2350 DSAF_XOD_RCVTC3_CNT_0_REG + j * 0x90);
2351 p[386 + i] = dsaf_read_dev(ddev,
2352 DSAF_XOD_RCVVC0_CNT_0_REG + j * 0x90);
2353 p[389 + i] = dsaf_read_dev(ddev,
2354 DSAF_XOD_RCVVC1_CNT_0_REG + j * 0x90);
2355 }
2356
2357 p[392] = dsaf_read_dev(ddev,
2358 DSAF_XOD_XGE_RCVIN0_CNT_0_REG + port * 0x90);
2359 p[393] = dsaf_read_dev(ddev,
2360 DSAF_XOD_XGE_RCVIN1_CNT_0_REG + port * 0x90);
2361 p[394] = dsaf_read_dev(ddev,
2362 DSAF_XOD_XGE_RCVIN2_CNT_0_REG + port * 0x90);
2363 p[395] = dsaf_read_dev(ddev,
2364 DSAF_XOD_XGE_RCVIN3_CNT_0_REG + port * 0x90);
2365 p[396] = dsaf_read_dev(ddev,
2366 DSAF_XOD_XGE_RCVIN4_CNT_0_REG + port * 0x90);
2367 p[397] = dsaf_read_dev(ddev,
2368 DSAF_XOD_XGE_RCVIN5_CNT_0_REG + port * 0x90);
2369 p[398] = dsaf_read_dev(ddev,
2370 DSAF_XOD_XGE_RCVIN6_CNT_0_REG + port * 0x90);
2371 p[399] = dsaf_read_dev(ddev,
2372 DSAF_XOD_XGE_RCVIN7_CNT_0_REG + port * 0x90);
2373 p[400] = dsaf_read_dev(ddev,
2374 DSAF_XOD_PPE_RCVIN0_CNT_0_REG + port * 0x90);
2375 p[401] = dsaf_read_dev(ddev,
2376 DSAF_XOD_PPE_RCVIN1_CNT_0_REG + port * 0x90);
2377 p[402] = dsaf_read_dev(ddev,
2378 DSAF_XOD_ROCEE_RCVIN0_CNT_0_REG + port * 0x90);
2379 p[403] = dsaf_read_dev(ddev,
2380 DSAF_XOD_ROCEE_RCVIN1_CNT_0_REG + port * 0x90);
2381 p[404] = dsaf_read_dev(ddev,
2382 DSAF_XOD_FIFO_STATUS_0_REG + port * 0x90);
2383
2384 /* dsaf voq registers */
2385 for (i = 0; i < DSAF_VOQ_NUM / DSAF_COMM_CHN; i++) {
2386 j = (i * DSAF_COMM_CHN + port) * 0x90;
2387 p[405 + i] = dsaf_read_dev(ddev,
2388 DSAF_VOQ_ECC_INVERT_EN_0_REG + j);
2389 p[408 + i] = dsaf_read_dev(ddev,
2390 DSAF_VOQ_SRAM_PKT_NUM_0_REG + j);
2391 p[411 + i] = dsaf_read_dev(ddev, DSAF_VOQ_IN_PKT_NUM_0_REG + j);
2392 p[414 + i] = dsaf_read_dev(ddev,
2393 DSAF_VOQ_OUT_PKT_NUM_0_REG + j);
2394 p[417 + i] = dsaf_read_dev(ddev,
2395 DSAF_VOQ_ECC_ERR_ADDR_0_REG + j);
2396 p[420 + i] = dsaf_read_dev(ddev, DSAF_VOQ_BP_STATUS_0_REG + j);
2397 p[423 + i] = dsaf_read_dev(ddev, DSAF_VOQ_SPUP_IDLE_0_REG + j);
2398 p[426 + i] = dsaf_read_dev(ddev,
2399 DSAF_VOQ_XGE_XOD_REQ_0_0_REG + j);
2400 p[429 + i] = dsaf_read_dev(ddev,
2401 DSAF_VOQ_XGE_XOD_REQ_1_0_REG + j);
2402 p[432 + i] = dsaf_read_dev(ddev,
2403 DSAF_VOQ_PPE_XOD_REQ_0_REG + j);
2404 p[435 + i] = dsaf_read_dev(ddev,
2405 DSAF_VOQ_ROCEE_XOD_REQ_0_REG + j);
2406 p[438 + i] = dsaf_read_dev(ddev,
2407 DSAF_VOQ_BP_ALL_THRD_0_REG + j);
2408 }
2409
2410 /* dsaf tbl registers */
2411 p[441] = dsaf_read_dev(ddev, DSAF_TBL_CTRL_0_REG);
2412 p[442] = dsaf_read_dev(ddev, DSAF_TBL_INT_MSK_0_REG);
2413 p[443] = dsaf_read_dev(ddev, DSAF_TBL_INT_SRC_0_REG);
2414 p[444] = dsaf_read_dev(ddev, DSAF_TBL_INT_STS_0_REG);
2415 p[445] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_ADDR_0_REG);
2416 p[446] = dsaf_read_dev(ddev, DSAF_TBL_LINE_ADDR_0_REG);
2417 p[447] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_HIGH_0_REG);
2418 p[448] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_LOW_0_REG);
2419 p[449] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_4_0_REG);
2420 p[450] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_3_0_REG);
2421 p[451] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_2_0_REG);
2422 p[452] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_1_0_REG);
2423 p[453] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_MCAST_CFG_0_0_REG);
2424 p[454] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_UCAST_CFG_0_REG);
2425 p[455] = dsaf_read_dev(ddev, DSAF_TBL_LIN_CFG_0_REG);
2426 p[456] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_HIGH_0_REG);
2427 p[457] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RDATA_LOW_0_REG);
2428 p[458] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA4_0_REG);
2429 p[459] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA3_0_REG);
2430 p[460] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA2_0_REG);
2431 p[461] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA1_0_REG);
2432 p[462] = dsaf_read_dev(ddev, DSAF_TBL_TCAM_RAM_RDATA0_0_REG);
2433 p[463] = dsaf_read_dev(ddev, DSAF_TBL_LIN_RDATA_0_REG);
2434
2435 for (i = 0; i < DSAF_SW_PORT_NUM; i++) {
2436 j = i * 0x8;
2437 p[464 + 2 * i] = dsaf_read_dev(ddev,
2438 DSAF_TBL_DA0_MIS_INFO1_0_REG + j);
2439 p[465 + 2 * i] = dsaf_read_dev(ddev,
2440 DSAF_TBL_DA0_MIS_INFO0_0_REG + j);
2441 }
2442
2443 p[480] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO2_0_REG);
2444 p[481] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO1_0_REG);
2445 p[482] = dsaf_read_dev(ddev, DSAF_TBL_SA_MIS_INFO0_0_REG);
2446 p[483] = dsaf_read_dev(ddev, DSAF_TBL_PUL_0_REG);
2447 p[484] = dsaf_read_dev(ddev, DSAF_TBL_OLD_RSLT_0_REG);
2448 p[485] = dsaf_read_dev(ddev, DSAF_TBL_OLD_SCAN_VAL_0_REG);
2449 p[486] = dsaf_read_dev(ddev, DSAF_TBL_DFX_CTRL_0_REG);
2450 p[487] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_0_REG);
2451 p[488] = dsaf_read_dev(ddev, DSAF_TBL_DFX_STAT_2_0_REG);
2452 p[489] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_I_0_REG);
2453 p[490] = dsaf_read_dev(ddev, DSAF_TBL_LKUP_NUM_O_0_REG);
2454 p[491] = dsaf_read_dev(ddev, DSAF_TBL_UCAST_BCAST_MIS_INFO_0_0_REG);
2455
2456 /* dsaf other registers */
2457 p[492] = dsaf_read_dev(ddev, DSAF_INODE_FIFO_WL_0_REG + port * 0x4);
2458 p[493] = dsaf_read_dev(ddev, DSAF_ONODE_FIFO_WL_0_REG + port * 0x4);
2459 p[494] = dsaf_read_dev(ddev, DSAF_XGE_GE_WORK_MODE_0_REG + port * 0x4);
2460 p[495] = dsaf_read_dev(ddev,
2461 DSAF_XGE_APP_RX_LINK_UP_0_REG + port * 0x4);
2462 p[496] = dsaf_read_dev(ddev, DSAF_NETPORT_CTRL_SIG_0_REG + port * 0x4);
2463 p[497] = dsaf_read_dev(ddev, DSAF_XGE_CTRL_SIG_CFG_0_REG + port * 0x4);
2464
5ada37b5
L		 2465 if (!is_ver1)
2466 p[498] = dsaf_read_dev(ddev, DSAF_PAUSE_CFG_REG + port * 0x4);
2467
511e6bc0 2468 /* mark end of dsaf regs */
5ada37b5 2469 for (i = 499; i < 504; i++)
511e6bc0 2470 p[i] = 0xdddddddd;
2471}
2472
2473static char *hns_dsaf_get_node_stats_strings(char *data, int node)
2474{
2475 char *buff = data;
2476
2477 snprintf(buff, ETH_GSTRING_LEN, "innod%d_pad_drop_pkts", node);
2478 buff = buff + ETH_GSTRING_LEN;
2479 snprintf(buff, ETH_GSTRING_LEN, "innod%d_manage_pkts", node);
2480 buff = buff + ETH_GSTRING_LEN;
2481 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkts", node);
2482 buff = buff + ETH_GSTRING_LEN;
2483 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pkt_id", node);
2484 buff = buff + ETH_GSTRING_LEN;
2485 snprintf(buff, ETH_GSTRING_LEN, "innod%d_rx_pause_frame", node);
2486 buff = buff + ETH_GSTRING_LEN;
2487 snprintf(buff, ETH_GSTRING_LEN, "innod%d_release_buf_num", node);
2488 buff = buff + ETH_GSTRING_LEN;
2489 snprintf(buff, ETH_GSTRING_LEN, "innod%d_sbm_drop_pkts", node);
2490 buff = buff + ETH_GSTRING_LEN;
2491 snprintf(buff, ETH_GSTRING_LEN, "innod%d_crc_false_pkts", node);
2492 buff = buff + ETH_GSTRING_LEN;
2493 snprintf(buff, ETH_GSTRING_LEN, "innod%d_bp_drop_pkts", node);
2494 buff = buff + ETH_GSTRING_LEN;
2495 snprintf(buff, ETH_GSTRING_LEN, "innod%d_lookup_rslt_drop_pkts", node);
2496 buff = buff + ETH_GSTRING_LEN;
2497 snprintf(buff, ETH_GSTRING_LEN, "innod%d_local_rslt_fail_pkts", node);
2498 buff = buff + ETH_GSTRING_LEN;
2499 snprintf(buff, ETH_GSTRING_LEN, "innod%d_vlan_drop_pkts", node);
2500 buff = buff + ETH_GSTRING_LEN;
2501 snprintf(buff, ETH_GSTRING_LEN, "innod%d_stp_drop_pkts", node);
2502 buff = buff + ETH_GSTRING_LEN;
2503 snprintf(buff, ETH_GSTRING_LEN, "onnod%d_tx_pkts", node);
2504 buff = buff + ETH_GSTRING_LEN;
2505
2506 return buff;
2507}
2508
2509static u64 *hns_dsaf_get_node_stats(struct dsaf_device *ddev, u64 *data,
2510 int node_num)
2511{
2512 u64 *p = data;
2513 struct dsaf_hw_stats *hw_stats = &ddev->hw_stats[node_num];
2514
2515 p[0] = hw_stats->pad_drop;
2516 p[1] = hw_stats->man_pkts;
2517 p[2] = hw_stats->rx_pkts;
2518 p[3] = hw_stats->rx_pkt_id;
2519 p[4] = hw_stats->rx_pause_frame;
2520 p[5] = hw_stats->release_buf_num;
2521 p[6] = hw_stats->sbm_drop;
2522 p[7] = hw_stats->crc_false;
2523 p[8] = hw_stats->bp_drop;
2524 p[9] = hw_stats->rslt_drop;
2525 p[10] = hw_stats->local_addr_false;
2526 p[11] = hw_stats->vlan_drop;
2527 p[12] = hw_stats->stp_drop;
2528 p[13] = hw_stats->tx_pkts;
2529
2530 return &p[14];
2531}
2532
2533/**
2534 *hns_dsaf_get_stats - get dsaf statistic
2535 *@ddev: dsaf device
2536 *@data:statistic value
2537 *@port: port num
2538 */
2539void hns_dsaf_get_stats(struct dsaf_device *ddev, u64 *data, int port)
2540{
2541 u64 *p = data;
2542 int node_num = port;
2543
2544 /* for ge/xge node info */
2545 p = hns_dsaf_get_node_stats(ddev, p, node_num);
2546
2547 /* for ppe node info */
2548 node_num = port + DSAF_PPE_INODE_BASE;
2549 (void)hns_dsaf_get_node_stats(ddev, p, node_num);
2550}
2551
2552/**
2553 *hns_dsaf_get_sset_count - get dsaf string set count
2554 *@stringset: type of values in data
2555 *return dsaf string name count
2556 */
2557int hns_dsaf_get_sset_count(int stringset)
2558{
2559 if (stringset == ETH_SS_STATS)
2560 return DSAF_STATIC_NUM;
2561
2562 return 0;
2563}
2564
2565/**
2566 *hns_dsaf_get_strings - get dsaf string set
2567 *@stringset:srting set index
2568 *@data:strings name value
2569 *@port:port index
2570 */
2571void hns_dsaf_get_strings(int stringset, u8 *data, int port)
2572{
2573 char *buff = (char *)data;
2574 int node = port;
2575
2576 if (stringset != ETH_SS_STATS)
2577 return;
2578
2579 /* for ge/xge node info */
2580 buff = hns_dsaf_get_node_stats_strings(buff, node);
2581
2582 /* for ppe node info */
2583 node = port + DSAF_PPE_INODE_BASE;
2584 (void)hns_dsaf_get_node_stats_strings(buff, node);
2585}
2586
2587/**
2588 *hns_dsaf_get_sset_count - get dsaf regs count
2589 *return dsaf regs count
2590 */
2591int hns_dsaf_get_regs_count(void)
2592{
2593 return DSAF_DUMP_REGS_NUM;
2594}
2595
2596/**
2597 * dsaf_probe - probo dsaf dev
2598 * @pdev: dasf platform device
2599 * retuen 0 - success , negative --fail
2600 */
2601static int hns_dsaf_probe(struct platform_device *pdev)
2602{
2603 struct dsaf_device *dsaf_dev;
2604 int ret;
2605
2606 dsaf_dev = hns_dsaf_alloc_dev(&pdev->dev, sizeof(struct dsaf_drv_priv));
2607 if (IS_ERR(dsaf_dev)) {
2608 ret = PTR_ERR(dsaf_dev);
2609 dev_err(&pdev->dev,
2610 "dsaf_probe dsaf_alloc_dev failed, ret = %#x!\n", ret);
2611 return ret;
2612 }
2613
2614 ret = hns_dsaf_get_cfg(dsaf_dev);
2615 if (ret)
2616 goto free_dev;
2617
2618 ret = hns_dsaf_init(dsaf_dev);
2619 if (ret)
2620 goto free_cfg;
2621
2622 ret = hns_mac_init(dsaf_dev);
2623 if (ret)
2624 goto uninit_dsaf;
2625
2626 ret = hns_ppe_init(dsaf_dev);
2627 if (ret)
2628 goto uninit_mac;
2629
2630 ret = hns_dsaf_ae_init(dsaf_dev);
2631 if (ret)
2632 goto uninit_ppe;
2633
2634 return 0;
2635
2636uninit_ppe:
2637 hns_ppe_uninit(dsaf_dev);
2638
2639uninit_mac:
2640 hns_mac_uninit(dsaf_dev);
2641
2642uninit_dsaf:
2643 hns_dsaf_free(dsaf_dev);
2644
2645free_cfg:
2646 hns_dsaf_free_cfg(dsaf_dev);
2647
2648free_dev:
2649 hns_dsaf_free_dev(dsaf_dev);
2650
2651 return ret;
2652}
2653
2654/**
2655 * dsaf_remove - remove dsaf dev
2656 * @pdev: dasf platform device
2657 */
2658static int hns_dsaf_remove(struct platform_device *pdev)
2659{
2660 struct dsaf_device *dsaf_dev = dev_get_drvdata(&pdev->dev);
2661
2662 hns_dsaf_ae_uninit(dsaf_dev);
2663
2664 hns_ppe_uninit(dsaf_dev);
2665
2666 hns_mac_uninit(dsaf_dev);
2667
2668 hns_dsaf_free(dsaf_dev);
2669
2670 hns_dsaf_free_cfg(dsaf_dev);
2671
2672 hns_dsaf_free_dev(dsaf_dev);
2673
2674 return 0;
2675}
2676
2677static const struct of_device_id g_dsaf_match[] = {
2678 {.compatible = "hisilicon,hns-dsaf-v1"},
2679 {.compatible = "hisilicon,hns-dsaf-v2"},
2680 {}
2681};
2682
2683static struct platform_driver g_dsaf_driver = {
2684 .probe = hns_dsaf_probe,
2685 .remove = hns_dsaf_remove,
2686 .driver = {
2687 .name = DSAF_DRV_NAME,
2688 .of_match_table = g_dsaf_match,
2689 },
2690};
2691
2692module_platform_driver(g_dsaf_driver);
2693
2694MODULE_LICENSE("GPL");
2695MODULE_AUTHOR("Huawei Tech. Co., Ltd.");
2696MODULE_DESCRIPTION("HNS DSAF driver");
2697MODULE_VERSION(DSAF_MOD_VERSION);
Linux kernel - Deliverables
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