[deliverable/linux.git] / drivers / net / ethernet / hisilicon / hns / hns_dsaf_rcb.h

/*
 * Copyright (c) 2014-2015 Hisilicon Limited.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 */

#ifndef _HNS_DSAF_RCB_H
#define _HNS_DSAF_RCB_H

#include <linux/netdevice.h>
#include <linux/platform_device.h>

#include "hnae.h"
#include "hns_dsaf_main.h"

struct rcb_common_cb;

#define HNS_RCB_IRQ_NUM_PER_QUEUE		2
#define HNS_RCB_IRQ_IDX_TX			0
#define HNS_RCB_IRQ_IDX_RX			1
#define HNS_RCB_TX_REG_OFFSET			0x40

#define HNS_RCB_SERVICE_NW_ENGINE_NUM		DSAF_COMM_CHN
#define HNS_RCB_DEBUG_NW_ENGINE_NUM		1
#define HNS_RCB_RING_MAX_BD_PER_PKT		3
#define HNS_RCB_RING_MAX_TXBD_PER_PKT		3
#define HNS_RCBV2_RING_MAX_TXBD_PER_PKT		8
#define HNS_RCB_MAX_PKT_SIZE MAC_MAX_MTU

#define HNS_RCB_RING_MAX_PENDING_BD		1024
#define HNS_RCB_RING_MIN_PENDING_BD		16

#define HNS_RCB_REG_OFFSET			0x10000

#define HNS_RCB_MAX_COALESCED_FRAMES		1023
#define HNS_RCB_MIN_COALESCED_FRAMES		1
#define HNS_RCB_DEF_COALESCED_FRAMES		50
#define HNS_RCB_MAX_TIME_OUT			0x500

#define HNS_RCB_COMMON_ENDIAN			1

#define HNS_BD_SIZE_512_TYPE			0
#define HNS_BD_SIZE_1024_TYPE			1
#define HNS_BD_SIZE_2048_TYPE			2
#define HNS_BD_SIZE_4096_TYPE			3

#define HNS_RCB_COMMON_DUMP_REG_NUM 80
#define HNS_RCB_RING_DUMP_REG_NUM 40
#define HNS_RING_STATIC_REG_NUM 28

#define HNS_DUMP_REG_NUM			500
#define HNS_STATIC_REG_NUM			12

#define HNS_TSO_MODE_8BD_32K			1
#define HNS_TSO_MDOE_4BD_16K			0

enum rcb_int_flag {
	RCB_INT_FLAG_TX = 0x1,
	RCB_INT_FLAG_RX = (0x1 << 1),
	RCB_INT_FLAG_MAX = (0x1 << 2),	/*must be the last element */
};

struct hns_ring_hw_stats {
	u64 tx_pkts;
	u64 ppe_tx_ok_pkts;
	u64 ppe_tx_drop_pkts;
	u64 rx_pkts;
	u64 ppe_rx_ok_pkts;
	u64 ppe_rx_drop_pkts;
};

struct ring_pair_cb {
	struct rcb_common_cb *rcb_common;	/*  ring belongs to */
	struct device *dev;	/*device for DMA mapping */
	struct hnae_queue q;

	u16 index;	/* global index in a rcb common device */
	u16 buf_size;

	int virq[HNS_RCB_IRQ_NUM_PER_QUEUE];

	u8 port_id_in_dsa;
	u8 used_by_vf;

	struct hns_ring_hw_stats hw_stats;
};

struct rcb_common_cb {
	u8 __iomem *io_base;
	phys_addr_t phy_base;
	struct dsaf_device *dsaf_dev;
	u16 max_vfn;
	u16 max_q_per_vf;

	u8 comm_index;
	u32 ring_num;
	u32 coalesced_frames; /* frames  threshold of  rx interrupt   */
	u32 timeout; /* time threshold of  rx interrupt  */
	u32 desc_num; /*  desc num per queue*/

	struct ring_pair_cb ring_pair_cb[0];
};

int hns_rcb_buf_size2type(u32 buf_size);

int hns_rcb_common_get_cfg(struct dsaf_device *dsaf_dev, int comm_index);
void hns_rcb_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index);
int hns_rcb_common_init_hw(struct rcb_common_cb *rcb_common);
void hns_rcb_start(struct hnae_queue *q, u32 val);
void hns_rcb_get_cfg(struct rcb_common_cb *rcb_common);
void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode, int comm_index,
			    u16 *max_vfn, u16 *max_q_per_vf);

void hns_rcb_common_init_commit_hw(struct rcb_common_cb *rcb_common);

void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val);
void hns_rcb_int_clr_hw(struct hnae_queue *q, u32 flag);
void hns_rcb_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 enable);
void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask);
void hns_rcbv2_int_clr_hw(struct hnae_queue *q, u32 flag);

void hns_rcb_init_hw(struct ring_pair_cb *ring);
void hns_rcb_reset_ring_hw(struct hnae_queue *q);
void hns_rcb_wait_fbd_clean(struct hnae_queue **qs, int q_num, u32 flag);

u32 hns_rcb_get_coalesced_frames(struct dsaf_device *dsaf_dev, int comm_index);
u32 hns_rcb_get_coalesce_usecs(struct dsaf_device *dsaf_dev, int comm_index);
void hns_rcb_set_coalesce_usecs(struct dsaf_device *dsaf_dev,
				int comm_index, u32 timeout);
int hns_rcb_set_coalesced_frames(struct dsaf_device *dsaf_dev,
				 int comm_index, u32 coalesce_frames);
void hns_rcb_update_stats(struct hnae_queue *queue);

void hns_rcb_get_stats(struct hnae_queue *queue, u64 *data);

void hns_rcb_get_common_regs(struct rcb_common_cb *rcb_common, void *data);

int hns_rcb_get_ring_sset_count(int stringset);
int hns_rcb_get_common_regs_count(void);
int hns_rcb_get_ring_regs_count(void);

void hns_rcb_get_ring_regs(struct hnae_queue *queue, void *data);

void hns_rcb_get_strings(int stringset, u8 *data, int index);
#endif /* _HNS_DSAF_RCB_H */
Commit	Line	Data
511e6bc0	1	/*
	2	* Copyright (c) 2014-2015 Hisilicon Limited.
	3	*
	4	* This program is free software; you can redistribute it and/or modify
	5	* it under the terms of the GNU General Public License as published by
	6	* the Free Software Foundation; either version 2 of the License, or
	7	* (at your option) any later version.
	8	*/
	9
	10	#ifndef _HNS_DSAF_RCB_H
	11	#define _HNS_DSAF_RCB_H
	12
	13	#include <linux/netdevice.h>
	14	#include <linux/platform_device.h>
	15
	16	#include "hnae.h"
	17	#include "hns_dsaf_main.h"
	18
	19	struct rcb_common_cb;
	20
	21	#define HNS_RCB_IRQ_NUM_PER_QUEUE 2
	22	#define HNS_RCB_IRQ_IDX_TX 0
	23	#define HNS_RCB_IRQ_IDX_RX 1
	24	#define HNS_RCB_TX_REG_OFFSET 0x40
	25
	26	#define HNS_RCB_SERVICE_NW_ENGINE_NUM DSAF_COMM_CHN
	27	#define HNS_RCB_DEBUG_NW_ENGINE_NUM 1
	28	#define HNS_RCB_RING_MAX_BD_PER_PKT 3
13ac695e S	29	#define HNS_RCB_RING_MAX_TXBD_PER_PKT 3
13ac695e S	30	#define HNS_RCBV2_RING_MAX_TXBD_PER_PKT 8
511e6bc0	31	#define HNS_RCB_MAX_PKT_SIZE MAC_MAX_MTU
	32
	33	#define HNS_RCB_RING_MAX_PENDING_BD 1024
	34	#define HNS_RCB_RING_MIN_PENDING_BD 16
	35
	36	#define HNS_RCB_REG_OFFSET 0x10000
	37
	38	#define HNS_RCB_MAX_COALESCED_FRAMES 1023
	39	#define HNS_RCB_MIN_COALESCED_FRAMES 1
	40	#define HNS_RCB_DEF_COALESCED_FRAMES 50
	41	#define HNS_RCB_MAX_TIME_OUT 0x500
	42
	43	#define HNS_RCB_COMMON_ENDIAN 1
	44
	45	#define HNS_BD_SIZE_512_TYPE 0
	46	#define HNS_BD_SIZE_1024_TYPE 1
	47	#define HNS_BD_SIZE_2048_TYPE 2
	48	#define HNS_BD_SIZE_4096_TYPE 3
	49
	50	#define HNS_RCB_COMMON_DUMP_REG_NUM 80
	51	#define HNS_RCB_RING_DUMP_REG_NUM 40
	52	#define HNS_RING_STATIC_REG_NUM 28
	53
	54	#define HNS_DUMP_REG_NUM 500
	55	#define HNS_STATIC_REG_NUM 12
	56
918f618f	57	#define HNS_TSO_MODE_8BD_32K 1
	58	#define HNS_TSO_MDOE_4BD_16K 0
	59
511e6bc0	60	enum rcb_int_flag {
	61	RCB_INT_FLAG_TX = 0x1,
	62	RCB_INT_FLAG_RX = (0x1 << 1),
	63	RCB_INT_FLAG_MAX = (0x1 << 2), /must be the last element /
	64	};
	65
	66	struct hns_ring_hw_stats {
	67	u64 tx_pkts;
	68	u64 ppe_tx_ok_pkts;
	69	u64 ppe_tx_drop_pkts;
	70	u64 rx_pkts;
	71	u64 ppe_rx_ok_pkts;
	72	u64 ppe_rx_drop_pkts;
	73	};
	74
	75	struct ring_pair_cb {
	76	struct rcb_common_cb rcb_common; / ring belongs to */
	77	struct device dev; /device for DMA mapping */
	78	struct hnae_queue q;
	79
	80	u16 index; /* global index in a rcb common device */
	81	u16 buf_size;
	82
	83	int virq[HNS_RCB_IRQ_NUM_PER_QUEUE];
	84
	85	u8 port_id_in_dsa;
	86	u8 used_by_vf;
	87
	88	struct hns_ring_hw_stats hw_stats;
	89	};
	90
	91	struct rcb_common_cb {
	92	u8 __iomem *io_base;
	93	phys_addr_t phy_base;
	94	struct dsaf_device *dsaf_dev;
	95	u16 max_vfn;
	96	u16 max_q_per_vf;
	97
	98	u8 comm_index;
	99	u32 ring_num;
	100	u32 coalesced_frames; /* frames threshold of rx interrupt */
	101	u32 timeout; /* time threshold of rx interrupt */
	102	u32 desc_num; /* desc num per queue*/
	103
	104	struct ring_pair_cb ring_pair_cb[0];
	105	};
	106
	107	int hns_rcb_buf_size2type(u32 buf_size);
	108
	109	int hns_rcb_common_get_cfg(struct dsaf_device *dsaf_dev, int comm_index);
	110	void hns_rcb_common_free_cfg(struct dsaf_device *dsaf_dev, u32 comm_index);
	111	int hns_rcb_common_init_hw(struct rcb_common_cb *rcb_common);
	112	void hns_rcb_start(struct hnae_queue *q, u32 val);
	113	void hns_rcb_get_cfg(struct rcb_common_cb *rcb_common);
4568637f	114	void hns_rcb_get_queue_mode(enum dsaf_mode dsaf_mode, int comm_index,
4568637f	115	u16 max_vfn, u16 max_q_per_vf);
511e6bc0	116
13ac695e S	117	void hns_rcb_common_init_commit_hw(struct rcb_common_cb *rcb_common);
13ac695e S	118
511e6bc0	119	void hns_rcb_ring_enable_hw(struct hnae_queue *q, u32 val);
	120	void hns_rcb_int_clr_hw(struct hnae_queue *q, u32 flag);
	121	void hns_rcb_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 enable);
13ac695e S	122	void hns_rcbv2_int_ctrl_hw(struct hnae_queue *q, u32 flag, u32 mask);
	123	void hns_rcbv2_int_clr_hw(struct hnae_queue *q, u32 flag);
	124
511e6bc0	125	void hns_rcb_init_hw(struct ring_pair_cb *ring);
	126	void hns_rcb_reset_ring_hw(struct hnae_queue *q);
	127	void hns_rcb_wait_fbd_clean(struct hnae_queue **qs, int q_num, u32 flag);
	128
	129	u32 hns_rcb_get_coalesced_frames(struct dsaf_device *dsaf_dev, int comm_index);
	130	u32 hns_rcb_get_coalesce_usecs(struct dsaf_device *dsaf_dev, int comm_index);
	131	void hns_rcb_set_coalesce_usecs(struct dsaf_device *dsaf_dev,
	132	int comm_index, u32 timeout);
	133	int hns_rcb_set_coalesced_frames(struct dsaf_device *dsaf_dev,
	134	int comm_index, u32 coalesce_frames);
	135	void hns_rcb_update_stats(struct hnae_queue *queue);
	136
	137	void hns_rcb_get_stats(struct hnae_queue queue, u64 data);
	138
	139	void hns_rcb_get_common_regs(struct rcb_common_cb rcb_common, void data);
	140
	141	int hns_rcb_get_ring_sset_count(int stringset);
	142	int hns_rcb_get_common_regs_count(void);
	143	int hns_rcb_get_ring_regs_count(void);
	144
	145	void hns_rcb_get_ring_regs(struct hnae_queue queue, void data);
	146
	147	void hns_rcb_get_strings(int stringset, u8 *data, int index);
	148	#endif /* _HNS_DSAF_RCB_H */