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ethernet/intel: Use napi_alloc_skb
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
9baa3c34 49static const struct pci_device_id e1000_pci_tbl[] = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 108 struct e1000_rx_ring *rx_ring);
109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 116static int e1000_sw_init(struct e1000_adapter *adapter);
117static int e1000_open(struct net_device *netdev);
118static int e1000_close(struct net_device *netdev);
119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *tx_ring);
126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 137static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 138static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
139 struct e1000_tx_ring *tx_ring);
bea3348e 140static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 141static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
edbbb3ca
JB		 144static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
145 struct e1000_rx_ring *rx_ring,
146 int *work_done, int work_to_do);
581d708e 147static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 148 struct e1000_rx_ring *rx_ring,
72d64a43 149 int cleaned_count);
edbbb3ca
JB		 150static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring,
152 int cleaned_count);
1da177e4
LT		 153static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
154static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
155 int cmd);
1da177e4
LT		 156static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
157static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
158static void e1000_tx_timeout(struct net_device *dev);
65f27f38 159static void e1000_reset_task(struct work_struct *work);
1da177e4 160static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 161static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
162 struct sk_buff *skb);
1da177e4 163
5622e404 164static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 165static void e1000_vlan_mode(struct net_device *netdev,
166 netdev_features_t features);
52f5509f
JP		 167static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
168 bool filter_on);
80d5c368
PM		 169static int e1000_vlan_rx_add_vid(struct net_device *netdev,
170 __be16 proto, u16 vid);
171static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
172 __be16 proto, u16 vid);
1da177e4
LT		 173static void e1000_restore_vlan(struct e1000_adapter *adapter);
174
6fdfef16 175#ifdef CONFIG_PM
b43fcd7d 176static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 177static int e1000_resume(struct pci_dev *pdev);
178#endif
c653e635 179static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 180
181#ifdef CONFIG_NET_POLL_CONTROLLER
182/* for netdump / net console */
183static void e1000_netpoll (struct net_device *netdev);
184#endif
185
1f753861
JB		 186#define COPYBREAK_DEFAULT 256
187static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
188module_param(copybreak, uint, 0644);
189MODULE_PARM_DESC(copybreak,
190 "Maximum size of packet that is copied to a new buffer on receive");
191
9026729b
AK		 192static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
193 pci_channel_state_t state);
194static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
195static void e1000_io_resume(struct pci_dev *pdev);
196
3646f0e5 197static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 198 .error_detected = e1000_io_error_detected,
199 .slot_reset = e1000_io_slot_reset,
200 .resume = e1000_io_resume,
201};
24025e4e 202
1da177e4
LT		 203static struct pci_driver e1000_driver = {
204 .name = e1000_driver_name,
205 .id_table = e1000_pci_tbl,
206 .probe = e1000_probe,
9f9a12f8 207 .remove = e1000_remove,
c4e24f01 208#ifdef CONFIG_PM
25985edc 209 /* Power Management Hooks */
1da177e4 210 .suspend = e1000_suspend,
c653e635 211 .resume = e1000_resume,
1da177e4 212#endif
9026729b
AK		 213 .shutdown = e1000_shutdown,
214 .err_handler = &e1000_err_handler
1da177e4
LT		 215};
216
217MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
218MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
219MODULE_LICENSE("GPL");
220MODULE_VERSION(DRV_VERSION);
221
b3f4d599 222#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
223static int debug = -1;
1da177e4
LT		 224module_param(debug, int, 0);
225MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
226
675ad473
ET		 227/**
228 * e1000_get_hw_dev - return device
229 * used by hardware layer to print debugging information
230 *
231 **/
232struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
233{
234 struct e1000_adapter *adapter = hw->back;
235 return adapter->netdev;
236}
237
1da177e4
LT		 238/**
239 * e1000_init_module - Driver Registration Routine
240 *
241 * e1000_init_module is the first routine called when the driver is
242 * loaded. All it does is register with the PCI subsystem.
243 **/
64798845 244static int __init e1000_init_module(void)
1da177e4
LT		 245{
246 int ret;
675ad473 247 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 248
675ad473 249 pr_info("%s\n", e1000_copyright);
1da177e4 250
29917620 251 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 252 if (copybreak != COPYBREAK_DEFAULT) {
253 if (copybreak == 0)
675ad473 254 pr_info("copybreak disabled\n");
1f753861 255 else
675ad473
ET		 256 pr_info("copybreak enabled for "
257 "packets <= %u bytes\n", copybreak);
1f753861 258 }
1da177e4
LT		 259 return ret;
260}
261
262module_init(e1000_init_module);
263
264/**
265 * e1000_exit_module - Driver Exit Cleanup Routine
266 *
267 * e1000_exit_module is called just before the driver is removed
268 * from memory.
269 **/
64798845 270static void __exit e1000_exit_module(void)
1da177e4 271{
1da177e4
LT		 272 pci_unregister_driver(&e1000_driver);
273}
274
275module_exit(e1000_exit_module);
276
2db10a08
AK		 277static int e1000_request_irq(struct e1000_adapter *adapter)
278{
279 struct net_device *netdev = adapter->netdev;
3e18826c 280 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 281 int irq_flags = IRQF_SHARED;
282 int err;
2db10a08 283
e94bd23f
AK		 284 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
285 netdev);
286 if (err) {
feb8f478 287 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 288 }
2db10a08
AK		 289
290 return err;
291}
292
293static void e1000_free_irq(struct e1000_adapter *adapter)
294{
295 struct net_device *netdev = adapter->netdev;
296
297 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 298}
299
1da177e4
LT		 300/**
301 * e1000_irq_disable - Mask off interrupt generation on the NIC
302 * @adapter: board private structure
303 **/
64798845 304static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 305{
1dc32918
JP		 306 struct e1000_hw *hw = &adapter->hw;
307
308 ew32(IMC, ~0);
309 E1000_WRITE_FLUSH();
1da177e4
LT		 310 synchronize_irq(adapter->pdev->irq);
311}
312
313/**
314 * e1000_irq_enable - Enable default interrupt generation settings
315 * @adapter: board private structure
316 **/
64798845 317static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 318{
1dc32918
JP		 319 struct e1000_hw *hw = &adapter->hw;
320
321 ew32(IMS, IMS_ENABLE_MASK);
322 E1000_WRITE_FLUSH();
1da177e4 323}
3ad2cc67 324
64798845 325static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 326{
1dc32918 327 struct e1000_hw *hw = &adapter->hw;
2d7edb92 328 struct net_device *netdev = adapter->netdev;
1dc32918 329 u16 vid = hw->mng_cookie.vlan_id;
406874a7 330 u16 old_vid = adapter->mng_vlan_id;
96838a40 331
5622e404
JP		 332 if (!e1000_vlan_used(adapter))
333 return;
334
335 if (!test_bit(vid, adapter->active_vlans)) {
336 if (hw->mng_cookie.status &
337 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
80d5c368 338 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
c5f226fe 339 adapter->mng_vlan_id = vid;
5622e404
JP		 340 } else {
341 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
342 }
343 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
344 (vid != old_vid) &&
345 !test_bit(old_vid, adapter->active_vlans))
80d5c368
PM		 346 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
347 old_vid);
5622e404
JP		 348 } else {
349 adapter->mng_vlan_id = vid;
2d7edb92
MC		 350 }
351}
b55ccb35 352
64798845 353static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 354{
1dc32918
JP		 355 struct e1000_hw *hw = &adapter->hw;
356
0fccd0e9 357 if (adapter->en_mng_pt) {
1dc32918 358 u32 manc = er32(MANC);
0fccd0e9
JG		 359
360 /* disable hardware interception of ARP */
361 manc &= ~(E1000_MANC_ARP_EN);
362
1dc32918 363 ew32(MANC, manc);
0fccd0e9
JG		 364 }
365}
366
64798845 367static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 368{
1dc32918
JP		 369 struct e1000_hw *hw = &adapter->hw;
370
0fccd0e9 371 if (adapter->en_mng_pt) {
1dc32918 372 u32 manc = er32(MANC);
0fccd0e9
JG		 373
374 /* re-enable hardware interception of ARP */
375 manc |= E1000_MANC_ARP_EN;
376
1dc32918 377 ew32(MANC, manc);
0fccd0e9
JG		 378 }
379}
380
e0aac5a2
AK		 381/**
382 * e1000_configure - configure the hardware for RX and TX
383 * @adapter = private board structure
384 **/
385static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 386{
387 struct net_device *netdev = adapter->netdev;
2db10a08 388 int i;
1da177e4 389
db0ce50d 390 e1000_set_rx_mode(netdev);
1da177e4
LT		 391
392 e1000_restore_vlan(adapter);
0fccd0e9 393 e1000_init_manageability(adapter);
1da177e4
LT		 394
395 e1000_configure_tx(adapter);
396 e1000_setup_rctl(adapter);
397 e1000_configure_rx(adapter);
72d64a43
JK		 398 /* call E1000_DESC_UNUSED which always leaves
399 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 400 * next_to_use != next_to_clean
401 */
f56799ea 402 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 403 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 404 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 405 E1000_DESC_UNUSED(ring));
f56799ea 406 }
e0aac5a2
AK		 407}
408
409int e1000_up(struct e1000_adapter *adapter)
410{
1dc32918
JP		 411 struct e1000_hw *hw = &adapter->hw;
412
e0aac5a2
AK		 413 /* hardware has been reset, we need to reload some things */
414 e1000_configure(adapter);
415
416 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 417
bea3348e 418 napi_enable(&adapter->napi);
c3570acb 419
5de55624
MC		 420 e1000_irq_enable(adapter);
421
4cb9be7a
JB		 422 netif_wake_queue(adapter->netdev);
423
79f3d399 424 /* fire a link change interrupt to start the watchdog */
1dc32918 425 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 426 return 0;
427}
428
79f05bf0
AK		 429/**
430 * e1000_power_up_phy - restore link in case the phy was powered down
431 * @adapter: address of board private structure
432 *
433 * The phy may be powered down to save power and turn off link when the
434 * driver is unloaded and wake on lan is not enabled (among others)
435 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 436 **/
d658266e 437void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 438{
1dc32918 439 struct e1000_hw *hw = &adapter->hw;
406874a7 440 u16 mii_reg = 0;
79f05bf0
AK		 441
442 /* Just clear the power down bit to wake the phy back up */
1dc32918 443 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 444 /* according to the manual, the phy will retain its
6cfbd97b
JK		 445 * settings across a power-down/up cycle
446 */
1dc32918 447 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 448 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 449 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 450 }
451}
452
453static void e1000_power_down_phy(struct e1000_adapter *adapter)
454{
1dc32918
JP		 455 struct e1000_hw *hw = &adapter->hw;
456
61c2505f 457 /* Power down the PHY so no link is implied when interface is down *
c3033b01 458 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 459 * (a) WoL is enabled
460 * (b) AMT is active
6cfbd97b
JK		 461 * (c) SoL/IDER session is active
462 */
1dc32918
JP		 463 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
464 hw->media_type == e1000_media_type_copper) {
406874a7 465 u16 mii_reg = 0;
61c2505f 466
1dc32918 467 switch (hw->mac_type) {
61c2505f
BA		 468 case e1000_82540:
469 case e1000_82545:
470 case e1000_82545_rev_3:
471 case e1000_82546:
5377a416 472 case e1000_ce4100:
61c2505f
BA		 473 case e1000_82546_rev_3:
474 case e1000_82541:
475 case e1000_82541_rev_2:
476 case e1000_82547:
477 case e1000_82547_rev_2:
1dc32918 478 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 479 goto out;
480 break;
61c2505f
BA		 481 default:
482 goto out;
483 }
1dc32918 484 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 485 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 486 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 487 msleep(1);
79f05bf0 488 }
61c2505f
BA		 489out:
490 return;
79f05bf0
AK		 491}
492
a4010afe
JB		 493static void e1000_down_and_stop(struct e1000_adapter *adapter)
494{
495 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f 496
a4010afe 497 cancel_delayed_work_sync(&adapter->watchdog_task);
74a1b1ea
VD		 498
499 /*
500 * Since the watchdog task can reschedule other tasks, we should cancel
501 * it first, otherwise we can run into the situation when a work is
502 * still running after the adapter has been turned down.
503 */
504
a4010afe
JB		 505 cancel_delayed_work_sync(&adapter->phy_info_task);
506 cancel_delayed_work_sync(&adapter->fifo_stall_task);
74a1b1ea
VD		 507
508 /* Only kill reset task if adapter is not resetting */
509 if (!test_bit(__E1000_RESETTING, &adapter->flags))
510 cancel_work_sync(&adapter->reset_task);
a4010afe
JB		 511}
512
64798845 513void e1000_down(struct e1000_adapter *adapter)
1da177e4 514{
a6c42322 515 struct e1000_hw *hw = &adapter->hw;
1da177e4 516 struct net_device *netdev = adapter->netdev;
a6c42322 517 u32 rctl, tctl;
1da177e4 518
1314bbf3 519
a6c42322
JB		 520 /* disable receives in the hardware */
521 rctl = er32(RCTL);
522 ew32(RCTL, rctl & ~E1000_RCTL_EN);
523 /* flush and sleep below */
524
51851073 525 netif_tx_disable(netdev);
a6c42322
JB		 526
527 /* disable transmits in the hardware */
528 tctl = er32(TCTL);
529 tctl &= ~E1000_TCTL_EN;
530 ew32(TCTL, tctl);
531 /* flush both disables and wait for them to finish */
532 E1000_WRITE_FLUSH();
533 msleep(10);
534
bea3348e 535 napi_disable(&adapter->napi);
c3570acb 536
1da177e4 537 e1000_irq_disable(adapter);
c1605eb3 538
6cfbd97b 539 /* Setting DOWN must be after irq_disable to prevent
ab08853f 540 * a screaming interrupt. Setting DOWN also prevents
a4010afe 541 * tasks from rescheduling.
ab08853f 542 */
a4010afe 543 e1000_down_and_stop(adapter);
1da177e4 544
1da177e4
LT		 545 adapter->link_speed = 0;
546 adapter->link_duplex = 0;
547 netif_carrier_off(netdev);
1da177e4
LT		 548
549 e1000_reset(adapter);
581d708e
MC		 550 e1000_clean_all_tx_rings(adapter);
551 e1000_clean_all_rx_rings(adapter);
1da177e4 552}
1da177e4 553
64798845 554void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 555{
556 WARN_ON(in_interrupt());
557 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
558 msleep(1);
559 e1000_down(adapter);
560 e1000_up(adapter);
561 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 562}
563
64798845 564void e1000_reset(struct e1000_adapter *adapter)
1da177e4 565{
1dc32918 566 struct e1000_hw *hw = &adapter->hw;
406874a7 567 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 568 bool legacy_pba_adjust = false;
b7cb8c2c 569 u16 hwm;
1da177e4
LT		 570
571 /* Repartition Pba for greater than 9k mtu
572 * To take effect CTRL.RST is required.
573 */
574
1dc32918 575 switch (hw->mac_type) {
018ea44e
BA		 576 case e1000_82542_rev2_0:
577 case e1000_82542_rev2_1:
578 case e1000_82543:
579 case e1000_82544:
580 case e1000_82540:
581 case e1000_82541:
582 case e1000_82541_rev_2:
c3033b01 583 legacy_pba_adjust = true;
018ea44e
BA		 584 pba = E1000_PBA_48K;
585 break;
586 case e1000_82545:
587 case e1000_82545_rev_3:
588 case e1000_82546:
5377a416 589 case e1000_ce4100:
018ea44e
BA		 590 case e1000_82546_rev_3:
591 pba = E1000_PBA_48K;
592 break;
2d7edb92 593 case e1000_82547:
0e6ef3e0 594 case e1000_82547_rev_2:
c3033b01 595 legacy_pba_adjust = true;
2d7edb92
MC		 596 pba = E1000_PBA_30K;
597 break;
018ea44e
BA		 598 case e1000_undefined:
599 case e1000_num_macs:
2d7edb92
MC		 600 break;
601 }
602
c3033b01 603 if (legacy_pba_adjust) {
b7cb8c2c 604 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 605 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 606
1dc32918 607 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 608 adapter->tx_fifo_head = 0;
609 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
610 adapter->tx_fifo_size =
611 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
612 atomic_set(&adapter->tx_fifo_stall, 0);
613 }
b7cb8c2c 614 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 615 /* adjust PBA for jumbo frames */
1dc32918 616 ew32(PBA, pba);
018ea44e
BA		 617
618 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 619 * large enough to accommodate two full transmit packets,
018ea44e 620 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 621 * the Rx FIFO should be large enough to accommodate at least
018ea44e 622 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 623 * expressed in KB.
624 */
1dc32918 625 pba = er32(PBA);
018ea44e
BA		 626 /* upper 16 bits has Tx packet buffer allocation size in KB */
627 tx_space = pba >> 16;
628 /* lower 16 bits has Rx packet buffer allocation size in KB */
629 pba &= 0xffff;
6cfbd97b 630 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 631 * but don't include ethernet FCS because hardware appends it
632 */
633 min_tx_space = (hw->max_frame_size +
634 sizeof(struct e1000_tx_desc) -
635 ETH_FCS_LEN) * 2;
9099cfb9 636 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 637 min_tx_space >>= 10;
b7cb8c2c
JB		 638 /* software strips receive CRC, so leave room for it */
639 min_rx_space = hw->max_frame_size;
9099cfb9 640 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 641 min_rx_space >>= 10;
642
643 /* If current Tx allocation is less than the min Tx FIFO size,
644 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 645 * allocation, take space away from current Rx allocation
646 */
018ea44e
BA		 647 if (tx_space < min_tx_space &&
648 ((min_tx_space - tx_space) < pba)) {
649 pba = pba - (min_tx_space - tx_space);
650
651 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 652 switch (hw->mac_type) {
018ea44e
BA		 653 case e1000_82545 ... e1000_82546_rev_3:
654 pba &= ~(E1000_PBA_8K - 1);
655 break;
656 default:
657 break;
658 }
659
6cfbd97b
JK		 660 /* if short on Rx space, Rx wins and must trump Tx
661 * adjustment or use Early Receive if available
662 */
1532ecea
JB		 663 if (pba < min_rx_space)
664 pba = min_rx_space;
018ea44e 665 }
1da177e4 666 }
2d7edb92 667
1dc32918 668 ew32(PBA, pba);
1da177e4 669
6cfbd97b 670 /* flow control settings:
b7cb8c2c
JB		 671 * The high water mark must be low enough to fit one full frame
672 * (or the size used for early receive) above it in the Rx FIFO.
673 * Set it to the lower of:
674 * - 90% of the Rx FIFO size, and
675 * - the full Rx FIFO size minus the early receive size (for parts
676 * with ERT support assuming ERT set to E1000_ERT_2048), or
677 * - the full Rx FIFO size minus one full frame
678 */
679 hwm = min(((pba << 10) * 9 / 10),
680 ((pba << 10) - hw->max_frame_size));
681
682 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
683 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 684 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 685 hw->fc_send_xon = 1;
686 hw->fc = hw->original_fc;
1da177e4 687
2d7edb92 688 /* Allow time for pending master requests to run */
1dc32918
JP		 689 e1000_reset_hw(hw);
690 if (hw->mac_type >= e1000_82544)
691 ew32(WUC, 0);
09ae3e88 692
1dc32918 693 if (e1000_init_hw(hw))
feb8f478 694 e_dev_err("Hardware Error\n");
2d7edb92 695 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 696
697 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 698 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 699 hw->autoneg == 1 &&
700 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
701 u32 ctrl = er32(CTRL);
3d5460a0
JB		 702 /* clear phy power management bit if we are in gig only mode,
703 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 704 * can cause a loss of link at power off or driver unload
705 */
3d5460a0 706 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 707 ew32(CTRL, ctrl);
3d5460a0
JB		 708 }
709
1da177e4 710 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 711 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 712
1dc32918
JP		 713 e1000_reset_adaptive(hw);
714 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 715
0fccd0e9 716 e1000_release_manageability(adapter);
1da177e4
LT		 717}
718
1aa8b471 719/* Dump the eeprom for users having checksum issues */
b4ea895d 720static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 721{
722 struct net_device *netdev = adapter->netdev;
723 struct ethtool_eeprom eeprom;
724 const struct ethtool_ops *ops = netdev->ethtool_ops;
725 u8 *data;
726 int i;
727 u16 csum_old, csum_new = 0;
728
729 eeprom.len = ops->get_eeprom_len(netdev);
730 eeprom.offset = 0;
731
732 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 733 if (!data)
67b3c27c 734 return;
67b3c27c
AK		 735
736 ops->get_eeprom(netdev, &eeprom, data);
737
738 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
739 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
740 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
741 csum_new += data[i] + (data[i + 1] << 8);
742 csum_new = EEPROM_SUM - csum_new;
743
675ad473
ET		 744 pr_err("/*********************/\n");
745 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
746 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 747
675ad473
ET		 748 pr_err("Offset Values\n");
749 pr_err("======== ======\n");
67b3c27c
AK		 750 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
751
675ad473
ET		 752 pr_err("Include this output when contacting your support provider.\n");
753 pr_err("This is not a software error! Something bad happened to\n");
754 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
755 pr_err("result in further problems, possibly loss of data,\n");
756 pr_err("corruption or system hangs!\n");
757 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
758 pr_err("which is invalid and requires you to set the proper MAC\n");
759 pr_err("address manually before continuing to enable this network\n");
760 pr_err("device. Please inspect the EEPROM dump and report the\n");
761 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
762 pr_err("/*********************/\n");
67b3c27c
AK		 763
764 kfree(data);
765}
766
81250297
TI		 767/**
768 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
769 * @pdev: PCI device information struct
770 *
771 * Return true if an adapter needs ioport resources
772 **/
773static int e1000_is_need_ioport(struct pci_dev *pdev)
774{
775 switch (pdev->device) {
776 case E1000_DEV_ID_82540EM:
777 case E1000_DEV_ID_82540EM_LOM:
778 case E1000_DEV_ID_82540EP:
779 case E1000_DEV_ID_82540EP_LOM:
780 case E1000_DEV_ID_82540EP_LP:
781 case E1000_DEV_ID_82541EI:
782 case E1000_DEV_ID_82541EI_MOBILE:
783 case E1000_DEV_ID_82541ER:
784 case E1000_DEV_ID_82541ER_LOM:
785 case E1000_DEV_ID_82541GI:
786 case E1000_DEV_ID_82541GI_LF:
787 case E1000_DEV_ID_82541GI_MOBILE:
788 case E1000_DEV_ID_82544EI_COPPER:
789 case E1000_DEV_ID_82544EI_FIBER:
790 case E1000_DEV_ID_82544GC_COPPER:
791 case E1000_DEV_ID_82544GC_LOM:
792 case E1000_DEV_ID_82545EM_COPPER:
793 case E1000_DEV_ID_82545EM_FIBER:
794 case E1000_DEV_ID_82546EB_COPPER:
795 case E1000_DEV_ID_82546EB_FIBER:
796 case E1000_DEV_ID_82546EB_QUAD_COPPER:
797 return true;
798 default:
799 return false;
800 }
801}
802
c8f44aff
MM		 803static netdev_features_t e1000_fix_features(struct net_device *netdev,
804 netdev_features_t features)
5622e404 805{
6cfbd97b
JK		 806 /* Since there is no support for separate Rx/Tx vlan accel
807 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 808 */
f646968f
PM		 809 if (features & NETIF_F_HW_VLAN_CTAG_RX)
810 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 811 else
f646968f 812 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 813
814 return features;
815}
816
c8f44aff
MM		 817static int e1000_set_features(struct net_device *netdev,
818 netdev_features_t features)
e97d3207
MM		 819{
820 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 821 netdev_features_t changed = features ^ netdev->features;
e97d3207 822
f646968f 823 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 824 e1000_vlan_mode(netdev, features);
825
e825b731 826 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 827 return 0;
828
e825b731 829 netdev->features = features;
e97d3207
MM		 830 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
831
832 if (netif_running(netdev))
833 e1000_reinit_locked(adapter);
834 else
835 e1000_reset(adapter);
836
837 return 0;
838}
839
0e7614bc
SH		 840static const struct net_device_ops e1000_netdev_ops = {
841 .ndo_open = e1000_open,
842 .ndo_stop = e1000_close,
00829823 843 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 844 .ndo_get_stats = e1000_get_stats,
845 .ndo_set_rx_mode = e1000_set_rx_mode,
846 .ndo_set_mac_address = e1000_set_mac,
5622e404 847 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 848 .ndo_change_mtu = e1000_change_mtu,
849 .ndo_do_ioctl = e1000_ioctl,
850 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 851 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
852 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
853#ifdef CONFIG_NET_POLL_CONTROLLER
854 .ndo_poll_controller = e1000_netpoll,
855#endif
5622e404
JP		 856 .ndo_fix_features = e1000_fix_features,
857 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 858};
859
e508be17
JB		 860/**
861 * e1000_init_hw_struct - initialize members of hw struct
862 * @adapter: board private struct
863 * @hw: structure used by e1000_hw.c
864 *
865 * Factors out initialization of the e1000_hw struct to its own function
866 * that can be called very early at init (just after struct allocation).
867 * Fields are initialized based on PCI device information and
868 * OS network device settings (MTU size).
869 * Returns negative error codes if MAC type setup fails.
870 */
871static int e1000_init_hw_struct(struct e1000_adapter *adapter,
872 struct e1000_hw *hw)
873{
874 struct pci_dev *pdev = adapter->pdev;
875
876 /* PCI config space info */
877 hw->vendor_id = pdev->vendor;
878 hw->device_id = pdev->device;
879 hw->subsystem_vendor_id = pdev->subsystem_vendor;
880 hw->subsystem_id = pdev->subsystem_device;
881 hw->revision_id = pdev->revision;
882
883 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
884
885 hw->max_frame_size = adapter->netdev->mtu +
886 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
887 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
888
889 /* identify the MAC */
890 if (e1000_set_mac_type(hw)) {
891 e_err(probe, "Unknown MAC Type\n");
892 return -EIO;
893 }
894
895 switch (hw->mac_type) {
896 default:
897 break;
898 case e1000_82541:
899 case e1000_82547:
900 case e1000_82541_rev_2:
901 case e1000_82547_rev_2:
902 hw->phy_init_script = 1;
903 break;
904 }
905
906 e1000_set_media_type(hw);
907 e1000_get_bus_info(hw);
908
909 hw->wait_autoneg_complete = false;
910 hw->tbi_compatibility_en = true;
911 hw->adaptive_ifs = true;
912
913 /* Copper options */
914
915 if (hw->media_type == e1000_media_type_copper) {
916 hw->mdix = AUTO_ALL_MODES;
917 hw->disable_polarity_correction = false;
918 hw->master_slave = E1000_MASTER_SLAVE;
919 }
920
921 return 0;
922}
923
1da177e4
LT		 924/**
925 * e1000_probe - Device Initialization Routine
926 * @pdev: PCI device information struct
927 * @ent: entry in e1000_pci_tbl
928 *
929 * Returns 0 on success, negative on failure
930 *
931 * e1000_probe initializes an adapter identified by a pci_dev structure.
932 * The OS initialization, configuring of the adapter private structure,
933 * and a hardware reset occur.
934 **/
1dd06ae8 935static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 936{
937 struct net_device *netdev;
938 struct e1000_adapter *adapter;
1dc32918 939 struct e1000_hw *hw;
2d7edb92 940
1da177e4 941 static int cards_found = 0;
120cd576 942 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 943 int i, err, pci_using_dac;
406874a7 944 u16 eeprom_data = 0;
5377a416 945 u16 tmp = 0;
406874a7 946 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 947 int bars, need_ioport;
0795af57 948
81250297
TI		 949 /* do not allocate ioport bars when not needed */
950 need_ioport = e1000_is_need_ioport(pdev);
951 if (need_ioport) {
952 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
953 err = pci_enable_device(pdev);
954 } else {
955 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 956 err = pci_enable_device_mem(pdev);
81250297 957 }
c7be73bc 958 if (err)
1da177e4
LT		 959 return err;
960
81250297 961 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 962 if (err)
6dd62ab0 963 goto err_pci_reg;
1da177e4
LT		 964
965 pci_set_master(pdev);
dbb5aaeb
NN		 966 err = pci_save_state(pdev);
967 if (err)
968 goto err_alloc_etherdev;
1da177e4 969
6dd62ab0 970 err = -ENOMEM;
1da177e4 971 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 972 if (!netdev)
1da177e4 973 goto err_alloc_etherdev;
1da177e4 974
1da177e4
LT		 975 SET_NETDEV_DEV(netdev, &pdev->dev);
976
977 pci_set_drvdata(pdev, netdev);
60490fe0 978 adapter = netdev_priv(netdev);
1da177e4
LT		 979 adapter->netdev = netdev;
980 adapter->pdev = pdev;
b3f4d599 981 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 982 adapter->bars = bars;
983 adapter->need_ioport = need_ioport;
1da177e4 984
1dc32918
JP		 985 hw = &adapter->hw;
986 hw->back = adapter;
987
6dd62ab0 988 err = -EIO;
275f165f 989 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 990 if (!hw->hw_addr)
1da177e4 991 goto err_ioremap;
1da177e4 992
81250297
TI		 993 if (adapter->need_ioport) {
994 for (i = BAR_1; i <= BAR_5; i++) {
995 if (pci_resource_len(pdev, i) == 0)
996 continue;
997 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
998 hw->io_base = pci_resource_start(pdev, i);
999 break;
1000 }
1da177e4
LT		 1001 }
1002 }
1003
e508be17
JB		 1004 /* make ready for any if (hw->...) below */
1005 err = e1000_init_hw_struct(adapter, hw);
1006 if (err)
1007 goto err_sw_init;
1008
6cfbd97b 1009 /* there is a workaround being applied below that limits
e508be17
JB		 1010 * 64-bit DMA addresses to 64-bit hardware. There are some
1011 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1012 */
1013 pci_using_dac = 0;
1014 if ((hw->bus_type == e1000_bus_type_pcix) &&
9931a26e 1015 !dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64))) {
e508be17 1016 pci_using_dac = 1;
e508be17 1017 } else {
9931a26e 1018 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
19a0b67a
DN		 1019 if (err) {
1020 pr_err("No usable DMA config, aborting\n");
1021 goto err_dma;
1022 }
e508be17
JB		 1023 }
1024
0e7614bc 1025 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1026 e1000_set_ethtool_ops(netdev);
1da177e4 1027 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1028 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1029
0eb5a34c 1030 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1031
1da177e4
LT		 1032 adapter->bd_number = cards_found;
1033
1034 /* setup the private structure */
1035
c7be73bc
JP		 1036 err = e1000_sw_init(adapter);
1037 if (err)
1da177e4
LT		 1038 goto err_sw_init;
1039
6dd62ab0 1040 err = -EIO;
5377a416 1041 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1042 hw->ce4100_gbe_mdio_base_virt =
1043 ioremap(pci_resource_start(pdev, BAR_1),
5377a416
DB		 1044 pci_resource_len(pdev, BAR_1));
1045
13acde8f 1046 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1047 goto err_mdio_ioremap;
1048 }
2d7edb92 1049
1dc32918 1050 if (hw->mac_type >= e1000_82543) {
e97d3207 1051 netdev->hw_features = NETIF_F_SG |
5622e404 1052 NETIF_F_HW_CSUM |
f646968f
PM		 1053 NETIF_F_HW_VLAN_CTAG_RX;
1054 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1055 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1056 }
1057
1dc32918
JP		 1058 if ((hw->mac_type >= e1000_82544) &&
1059 (hw->mac_type != e1000_82547))
e97d3207
MM		 1060 netdev->hw_features |= NETIF_F_TSO;
1061
11a78dcf
BG		 1062 netdev->priv_flags |= IFF_SUPP_NOFCS;
1063
e97d3207 1064 netdev->features |= netdev->hw_features;
7500673b
TD		 1065 netdev->hw_features |= (NETIF_F_RXCSUM |
1066 NETIF_F_RXALL |
1067 NETIF_F_RXFCS);
2d7edb92 1068
7b872a55 1069 if (pci_using_dac) {
1da177e4 1070 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1071 netdev->vlan_features |= NETIF_F_HIGHDMA;
1072 }
1da177e4 1073
7500673b
TD		 1074 netdev->vlan_features |= (NETIF_F_TSO |
1075 NETIF_F_HW_CSUM |
1076 NETIF_F_SG);
20501a69 1077
a22bb0b9
FR		 1078 /* Do not set IFF_UNICAST_FLT for VMWare's 82545EM */
1079 if (hw->device_id != E1000_DEV_ID_82545EM_COPPER ||
1080 hw->subsystem_vendor_id != PCI_VENDOR_ID_VMWARE)
1081 netdev->priv_flags |= IFF_UNICAST_FLT;
01789349 1082
1dc32918 1083 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1084
cd94dd0b 1085 /* initialize eeprom parameters */
1dc32918 1086 if (e1000_init_eeprom_params(hw)) {
feb8f478 1087 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1088 goto err_eeprom;
cd94dd0b
AK		 1089 }
1090
96838a40 1091 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1092 * put the device in a known good starting state
1093 */
96838a40 1094
1dc32918 1095 e1000_reset_hw(hw);
1da177e4
LT		 1096
1097 /* make sure the EEPROM is good */
1dc32918 1098 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1099 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1100 e1000_dump_eeprom(adapter);
6cfbd97b 1101 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1102 * disable this device for the user. This blocks regular
1103 * traffic while still permitting ethtool ioctls from reaching
1104 * the hardware as well as allowing the user to run the
1105 * interface after manually setting a hw addr using
1106 * `ip set address`
1107 */
1dc32918 1108 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1109 } else {
1110 /* copy the MAC address out of the EEPROM */
1dc32918 1111 if (e1000_read_mac_addr(hw))
feb8f478 1112 e_err(probe, "EEPROM Read Error\n");
1da177e4 1113 }
67b3c27c 1114 /* don't block initalization here due to bad MAC address */
1dc32918 1115 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1116
aaeb6cdf 1117 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1118 e_err(probe, "Invalid MAC Address\n");
1da177e4 1119
1da177e4 1120
a4010afe
JB		 1121 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1122 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1123 e1000_82547_tx_fifo_stall_task);
1124 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1125 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1126
1da177e4
LT		 1127 e1000_check_options(adapter);
1128
1129 /* Initial Wake on LAN setting
1130 * If APM wake is enabled in the EEPROM,
1131 * enable the ACPI Magic Packet filter
1132 */
1133
1dc32918 1134 switch (hw->mac_type) {
1da177e4
LT		 1135 case e1000_82542_rev2_0:
1136 case e1000_82542_rev2_1:
1137 case e1000_82543:
1138 break;
1139 case e1000_82544:
1dc32918 1140 e1000_read_eeprom(hw,
1da177e4
LT		 1141 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1142 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1143 break;
1144 case e1000_82546:
1145 case e1000_82546_rev_3:
1dc32918
JP		 1146 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1147 e1000_read_eeprom(hw,
1da177e4
LT		 1148 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1149 break;
1150 }
1151 /* Fall Through */
1152 default:
1dc32918 1153 e1000_read_eeprom(hw,
1da177e4
LT		 1154 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1155 break;
1156 }
96838a40 1157 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1158 adapter->eeprom_wol |= E1000_WUFC_MAG;
1159
1160 /* now that we have the eeprom settings, apply the special cases
1161 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1162 * wake on lan on a particular port
1163 */
120cd576
JB		 1164 switch (pdev->device) {
1165 case E1000_DEV_ID_82546GB_PCIE:
1166 adapter->eeprom_wol = 0;
1167 break;
1168 case E1000_DEV_ID_82546EB_FIBER:
1169 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1170 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1171 * regardless of eeprom setting
1172 */
1dc32918 1173 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1174 adapter->eeprom_wol = 0;
1175 break;
1176 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1177 /* if quad port adapter, disable WoL on all but port A */
1178 if (global_quad_port_a != 0)
1179 adapter->eeprom_wol = 0;
1180 else
3db1cd5c 1181 adapter->quad_port_a = true;
120cd576
JB		 1182 /* Reset for multiple quad port adapters */
1183 if (++global_quad_port_a == 4)
1184 global_quad_port_a = 0;
1185 break;
1186 }
1187
1188 /* initialize the wol settings based on the eeprom settings */
1189 adapter->wol = adapter->eeprom_wol;
de126489 1190 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1191
5377a416
DB		 1192 /* Auto detect PHY address */
1193 if (hw->mac_type == e1000_ce4100) {
1194 for (i = 0; i < 32; i++) {
1195 hw->phy_addr = i;
1196 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1197 if (tmp == 0 || tmp == 0xFF) {
1198 if (i == 31)
1199 goto err_eeprom;
1200 continue;
1201 } else
1202 break;
1203 }
1204 }
1205
675ad473
ET		 1206 /* reset the hardware with the new settings */
1207 e1000_reset(adapter);
1208
1209 strcpy(netdev->name, "eth%d");
1210 err = register_netdev(netdev);
1211 if (err)
1212 goto err_register;
1213
52f5509f 1214 e1000_vlan_filter_on_off(adapter, false);
5622e404 1215
fb3d47d4 1216 /* print bus type/speed/width info */
feb8f478 1217 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1218 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1219 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1220 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1221 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1222 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1223 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1224 netdev->dev_addr);
1314bbf3 1225
eb62efd2
JB		 1226 /* carrier off reporting is important to ethtool even BEFORE open */
1227 netif_carrier_off(netdev);
1228
feb8f478 1229 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1230
1231 cards_found++;
1232 return 0;
1233
1234err_register:
6dd62ab0 1235err_eeprom:
1532ecea 1236 e1000_phy_hw_reset(hw);
6dd62ab0 1237
1dc32918
JP		 1238 if (hw->flash_address)
1239 iounmap(hw->flash_address);
6dd62ab0
VA		 1240 kfree(adapter->tx_ring);
1241 kfree(adapter->rx_ring);
e508be17 1242err_dma:
1da177e4 1243err_sw_init:
5377a416 1244err_mdio_ioremap:
13acde8f 1245 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1246 iounmap(hw->hw_addr);
1da177e4
LT		 1247err_ioremap:
1248 free_netdev(netdev);
1249err_alloc_etherdev:
81250297 1250 pci_release_selected_regions(pdev, bars);
6dd62ab0 1251err_pci_reg:
6dd62ab0 1252 pci_disable_device(pdev);
1da177e4
LT		 1253 return err;
1254}
1255
1256/**
1257 * e1000_remove - Device Removal Routine
1258 * @pdev: PCI device information struct
1259 *
1260 * e1000_remove is called by the PCI subsystem to alert the driver
1261 * that it should release a PCI device. The could be caused by a
1262 * Hot-Plug event, or because the driver is going to be removed from
1263 * memory.
1264 **/
9f9a12f8 1265static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1266{
1267 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1268 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1269 struct e1000_hw *hw = &adapter->hw;
1da177e4 1270
a4010afe 1271 e1000_down_and_stop(adapter);
0fccd0e9 1272 e1000_release_manageability(adapter);
1da177e4 1273
bea3348e
SH		 1274 unregister_netdev(netdev);
1275
1532ecea 1276 e1000_phy_hw_reset(hw);
1da177e4 1277
24025e4e
MC		 1278 kfree(adapter->tx_ring);
1279 kfree(adapter->rx_ring);
24025e4e 1280
1c26750c 1281 if (hw->mac_type == e1000_ce4100)
13acde8f 1282 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1283 iounmap(hw->hw_addr);
1284 if (hw->flash_address)
1285 iounmap(hw->flash_address);
81250297 1286 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1287
1288 free_netdev(netdev);
1289
1290 pci_disable_device(pdev);
1291}
1292
1293/**
1294 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1295 * @adapter: board private structure to initialize
1296 *
1297 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1298 * e1000_init_hw_struct MUST be called before this function
1da177e4 1299 **/
9f9a12f8 1300static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1301{
eb0f8054 1302 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1303
f56799ea
JK		 1304 adapter->num_tx_queues = 1;
1305 adapter->num_rx_queues = 1;
581d708e
MC		 1306
1307 if (e1000_alloc_queues(adapter)) {
feb8f478 1308 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1309 return -ENOMEM;
1310 }
1311
47313054 1312 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1313 e1000_irq_disable(adapter);
1314
1da177e4 1315 spin_lock_init(&adapter->stats_lock);
1da177e4 1316
1314bbf3
AK		 1317 set_bit(__E1000_DOWN, &adapter->flags);
1318
1da177e4
LT		 1319 return 0;
1320}
1321
581d708e
MC		 1322/**
1323 * e1000_alloc_queues - Allocate memory for all rings
1324 * @adapter: board private structure to initialize
1325 *
1326 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1327 * number of queues at compile-time.
581d708e 1328 **/
9f9a12f8 1329static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1330{
1c7e5b12
YB		 1331 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1332 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1333 if (!adapter->tx_ring)
1334 return -ENOMEM;
581d708e 1335
1c7e5b12
YB		 1336 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1337 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1338 if (!adapter->rx_ring) {
1339 kfree(adapter->tx_ring);
1340 return -ENOMEM;
1341 }
581d708e 1342
581d708e
MC		 1343 return E1000_SUCCESS;
1344}
1345
1da177e4
LT		 1346/**
1347 * e1000_open - Called when a network interface is made active
1348 * @netdev: network interface device structure
1349 *
1350 * Returns 0 on success, negative value on failure
1351 *
1352 * The open entry point is called when a network interface is made
1353 * active by the system (IFF_UP). At this point all resources needed
1354 * for transmit and receive operations are allocated, the interrupt
a4010afe 1355 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1356 * and the stack is notified that the interface is ready.
1357 **/
64798845 1358static int e1000_open(struct net_device *netdev)
1da177e4 1359{
60490fe0 1360 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1361 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1362 int err;
1363
2db10a08 1364 /* disallow open during test */
1314bbf3 1365 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1366 return -EBUSY;
1367
eb62efd2
JB		 1368 netif_carrier_off(netdev);
1369
1da177e4 1370 /* allocate transmit descriptors */
e0aac5a2
AK		 1371 err = e1000_setup_all_tx_resources(adapter);
1372 if (err)
1da177e4
LT		 1373 goto err_setup_tx;
1374
1375 /* allocate receive descriptors */
e0aac5a2 1376 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1377 if (err)
e0aac5a2 1378 goto err_setup_rx;
b5bf28cd 1379
79f05bf0
AK		 1380 e1000_power_up_phy(adapter);
1381
2d7edb92 1382 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1383 if ((hw->mng_cookie.status &
2d7edb92
MC		 1384 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1385 e1000_update_mng_vlan(adapter);
1386 }
1da177e4 1387
e0aac5a2
AK		 1388 /* before we allocate an interrupt, we must be ready to handle it.
1389 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1390 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1391 * clean_rx handler before we do so.
1392 */
e0aac5a2
AK		 1393 e1000_configure(adapter);
1394
1395 err = e1000_request_irq(adapter);
1396 if (err)
1397 goto err_req_irq;
1398
1399 /* From here on the code is the same as e1000_up() */
1400 clear_bit(__E1000_DOWN, &adapter->flags);
1401
bea3348e 1402 napi_enable(&adapter->napi);
47313054 1403
e0aac5a2
AK		 1404 e1000_irq_enable(adapter);
1405
076152d5
BH		 1406 netif_start_queue(netdev);
1407
e0aac5a2 1408 /* fire a link status change interrupt to start the watchdog */
1dc32918 1409 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1410
1da177e4
LT		 1411 return E1000_SUCCESS;
1412
b5bf28cd 1413err_req_irq:
e0aac5a2 1414 e1000_power_down_phy(adapter);
581d708e 1415 e1000_free_all_rx_resources(adapter);
1da177e4 1416err_setup_rx:
581d708e 1417 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1418err_setup_tx:
1419 e1000_reset(adapter);
1420
1421 return err;
1422}
1423
1424/**
1425 * e1000_close - Disables a network interface
1426 * @netdev: network interface device structure
1427 *
1428 * Returns 0, this is not allowed to fail
1429 *
1430 * The close entry point is called when an interface is de-activated
1431 * by the OS. The hardware is still under the drivers control, but
1432 * needs to be disabled. A global MAC reset is issued to stop the
1433 * hardware, and all transmit and receive resources are freed.
1434 **/
64798845 1435static int e1000_close(struct net_device *netdev)
1da177e4 1436{
60490fe0 1437 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1438 struct e1000_hw *hw = &adapter->hw;
6a7d64e3 1439 int count = E1000_CHECK_RESET_COUNT;
1440
1441 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
1442 usleep_range(10000, 20000);
1da177e4 1443
2db10a08 1444 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1445 e1000_down(adapter);
79f05bf0 1446 e1000_power_down_phy(adapter);
2db10a08 1447 e1000_free_irq(adapter);
1da177e4 1448
581d708e
MC		 1449 e1000_free_all_tx_resources(adapter);
1450 e1000_free_all_rx_resources(adapter);
1da177e4 1451
4666560a 1452 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1453 * the same ID is registered on the host OS (let 8021q kill it)
1454 */
1dc32918 1455 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1456 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1457 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
80d5c368
PM		 1458 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
1459 adapter->mng_vlan_id);
2d7edb92 1460 }
b55ccb35 1461
1da177e4
LT		 1462 return 0;
1463}
1464
1465/**
1466 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1467 * @adapter: address of board private structure
2d7edb92
MC		 1468 * @start: address of beginning of memory
1469 * @len: length of memory
1da177e4 1470 **/
64798845
JP		 1471static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1472 unsigned long len)
1da177e4 1473{
1dc32918 1474 struct e1000_hw *hw = &adapter->hw;
e982f17c 1475 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1476 unsigned long end = begin + len;
1477
2648345f 1478 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1479 * write location to cross 64k boundary due to errata 23
1480 */
1dc32918 1481 if (hw->mac_type == e1000_82545 ||
5377a416 1482 hw->mac_type == e1000_ce4100 ||
1dc32918 1483 hw->mac_type == e1000_82546) {
c3033b01 1484 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1485 }
1486
c3033b01 1487 return true;
1da177e4
LT		 1488}
1489
1490/**
1491 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1492 * @adapter: board private structure
581d708e 1493 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1494 *
1495 * Return 0 on success, negative on failure
1496 **/
64798845
JP		 1497static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1498 struct e1000_tx_ring *txdr)
1da177e4 1499{
1da177e4
LT		 1500 struct pci_dev *pdev = adapter->pdev;
1501 int size;
1502
580f321d 1503 size = sizeof(struct e1000_tx_buffer) * txdr->count;
89bf67f1 1504 txdr->buffer_info = vzalloc(size);
14f8dc49 1505 if (!txdr->buffer_info)
1da177e4 1506 return -ENOMEM;
1da177e4
LT		 1507
1508 /* round up to nearest 4K */
1509
1510 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1511 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1512
b16f53be
NN		 1513 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1514 GFP_KERNEL);
96838a40 1515 if (!txdr->desc) {
1da177e4 1516setup_tx_desc_die:
1da177e4
LT		 1517 vfree(txdr->buffer_info);
1518 return -ENOMEM;
1519 }
1520
2648345f 1521 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1522 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1523 void *olddesc = txdr->desc;
1524 dma_addr_t olddma = txdr->dma;
feb8f478 1525 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1526 txdr->size, txdr->desc);
2648345f 1527 /* Try again, without freeing the previous */
b16f53be
NN		 1528 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1529 &txdr->dma, GFP_KERNEL);
2648345f 1530 /* Failed allocation, critical failure */
96838a40 1531 if (!txdr->desc) {
b16f53be
NN		 1532 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1533 olddma);
1da177e4
LT		 1534 goto setup_tx_desc_die;
1535 }
1536
1537 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1538 /* give up */
b16f53be
NN		 1539 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1540 txdr->dma);
1541 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1542 olddma);
feb8f478 1543 e_err(probe, "Unable to allocate aligned memory "
675ad473 1544 "for the transmit descriptor ring\n");
1da177e4
LT		 1545 vfree(txdr->buffer_info);
1546 return -ENOMEM;
1547 } else {
2648345f 1548 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1549 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1550 olddma);
1da177e4
LT		 1551 }
1552 }
1553 memset(txdr->desc, 0, txdr->size);
1554
1555 txdr->next_to_use = 0;
1556 txdr->next_to_clean = 0;
1557
1558 return 0;
1559}
1560
581d708e
MC		 1561/**
1562 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1563 * (Descriptors) for all queues
1564 * @adapter: board private structure
1565 *
581d708e
MC		 1566 * Return 0 on success, negative on failure
1567 **/
64798845 1568int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1569{
1570 int i, err = 0;
1571
f56799ea 1572 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1573 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1574 if (err) {
feb8f478 1575 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1576 for (i-- ; i >= 0; i--)
1577 e1000_free_tx_resources(adapter,
1578 &adapter->tx_ring[i]);
581d708e
MC		 1579 break;
1580 }
1581 }
1582
1583 return err;
1584}
1585
1da177e4
LT		 1586/**
1587 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1588 * @adapter: board private structure
1589 *
1590 * Configure the Tx unit of the MAC after a reset.
1591 **/
64798845 1592static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1593{
406874a7 1594 u64 tdba;
581d708e 1595 struct e1000_hw *hw = &adapter->hw;
1532ecea 1596 u32 tdlen, tctl, tipg;
406874a7 1597 u32 ipgr1, ipgr2;
1da177e4
LT		 1598
1599 /* Setup the HW Tx Head and Tail descriptor pointers */
1600
f56799ea 1601 switch (adapter->num_tx_queues) {
24025e4e
MC		 1602 case 1:
1603 default:
581d708e
MC		 1604 tdba = adapter->tx_ring[0].dma;
1605 tdlen = adapter->tx_ring[0].count *
1606 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1607 ew32(TDLEN, tdlen);
1608 ew32(TDBAH, (tdba >> 32));
1609 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1610 ew32(TDT, 0);
1611 ew32(TDH, 0);
6cfbd97b
JK		 1612 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1613 E1000_TDH : E1000_82542_TDH);
1614 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1615 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1616 break;
1617 }
1da177e4
LT		 1618
1619 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1620 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1621 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1622 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1623 else
1624 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1625
581d708e 1626 switch (hw->mac_type) {
1da177e4
LT		 1627 case e1000_82542_rev2_0:
1628 case e1000_82542_rev2_1:
1629 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1630 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1631 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1632 break;
1633 default:
0fadb059
JK		 1634 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1635 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1636 break;
1da177e4 1637 }
0fadb059
JK		 1638 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1639 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1640 ew32(TIPG, tipg);
1da177e4
LT		 1641
1642 /* Set the Tx Interrupt Delay register */
1643
1dc32918 1644 ew32(TIDV, adapter->tx_int_delay);
581d708e 1645 if (hw->mac_type >= e1000_82540)
1dc32918 1646 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1647
1648 /* Program the Transmit Control Register */
1649
1dc32918 1650 tctl = er32(TCTL);
1da177e4 1651 tctl &= ~E1000_TCTL_CT;
7e6c9861 1652 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1653 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1654
581d708e 1655 e1000_config_collision_dist(hw);
1da177e4
LT		 1656
1657 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1658 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1659
1660 /* only set IDE if we are delaying interrupts using the timers */
1661 if (adapter->tx_int_delay)
1662 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1663
581d708e 1664 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1665 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1666 else
1667 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1668
1669 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1670 * need this to apply a workaround later in the send path.
1671 */
581d708e
MC		 1672 if (hw->mac_type == e1000_82544 &&
1673 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1674 adapter->pcix_82544 = true;
7e6c9861 1675
1dc32918 1676 ew32(TCTL, tctl);
7e6c9861 1677
1da177e4
LT		 1678}
1679
1680/**
1681 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1682 * @adapter: board private structure
581d708e 1683 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1684 *
1685 * Returns 0 on success, negative on failure
1686 **/
64798845
JP		 1687static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1688 struct e1000_rx_ring *rxdr)
1da177e4 1689{
1da177e4 1690 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1691 int size, desc_len;
1da177e4 1692
93f0afe9 1693 size = sizeof(struct e1000_rx_buffer) * rxdr->count;
89bf67f1 1694 rxdr->buffer_info = vzalloc(size);
14f8dc49 1695 if (!rxdr->buffer_info)
1da177e4 1696 return -ENOMEM;
1da177e4 1697
1532ecea 1698 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1699
1da177e4
LT		 1700 /* Round up to nearest 4K */
1701
2d7edb92 1702 rxdr->size = rxdr->count * desc_len;
9099cfb9 1703 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1704
b16f53be
NN		 1705 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1706 GFP_KERNEL);
581d708e 1707 if (!rxdr->desc) {
1da177e4 1708setup_rx_desc_die:
1da177e4
LT		 1709 vfree(rxdr->buffer_info);
1710 return -ENOMEM;
1711 }
1712
2648345f 1713 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1714 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1715 void *olddesc = rxdr->desc;
1716 dma_addr_t olddma = rxdr->dma;
feb8f478 1717 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1718 rxdr->size, rxdr->desc);
2648345f 1719 /* Try again, without freeing the previous */
b16f53be
NN		 1720 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1721 &rxdr->dma, GFP_KERNEL);
2648345f 1722 /* Failed allocation, critical failure */
581d708e 1723 if (!rxdr->desc) {
b16f53be
NN		 1724 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1725 olddma);
1da177e4
LT		 1726 goto setup_rx_desc_die;
1727 }
1728
1729 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1730 /* give up */
b16f53be
NN		 1731 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1732 rxdr->dma);
1733 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1734 olddma);
feb8f478
ET		 1735 e_err(probe, "Unable to allocate aligned memory for "
1736 "the Rx descriptor ring\n");
581d708e 1737 goto setup_rx_desc_die;
1da177e4 1738 } else {
2648345f 1739 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1740 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1741 olddma);
1da177e4
LT		 1742 }
1743 }
1744 memset(rxdr->desc, 0, rxdr->size);
1745
1746 rxdr->next_to_clean = 0;
1747 rxdr->next_to_use = 0;
edbbb3ca 1748 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1749
1750 return 0;
1751}
1752
581d708e
MC		 1753/**
1754 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1755 * (Descriptors) for all queues
1756 * @adapter: board private structure
1757 *
581d708e
MC		 1758 * Return 0 on success, negative on failure
1759 **/
64798845 1760int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1761{
1762 int i, err = 0;
1763
f56799ea 1764 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1765 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1766 if (err) {
feb8f478 1767 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1768 for (i-- ; i >= 0; i--)
1769 e1000_free_rx_resources(adapter,
1770 &adapter->rx_ring[i]);
581d708e
MC		 1771 break;
1772 }
1773 }
1774
1775 return err;
1776}
1777
1da177e4 1778/**
2648345f 1779 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1780 * @adapter: Board private structure
1781 **/
64798845 1782static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1783{
1dc32918 1784 struct e1000_hw *hw = &adapter->hw;
630b25cd 1785 u32 rctl;
1da177e4 1786
1dc32918 1787 rctl = er32(RCTL);
1da177e4
LT		 1788
1789 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1790
d5bc77a2
DN		 1791 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1792 E1000_RCTL_RDMTS_HALF |
1dc32918 1793 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1794
1dc32918 1795 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1796 rctl |= E1000_RCTL_SBP;
1797 else
1798 rctl &= ~E1000_RCTL_SBP;
1799
2d7edb92
MC		 1800 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1801 rctl &= ~E1000_RCTL_LPE;
1802 else
1803 rctl |= E1000_RCTL_LPE;
1804
1da177e4 1805 /* Setup buffer sizes */
9e2feace
AK		 1806 rctl &= ~E1000_RCTL_SZ_4096;
1807 rctl |= E1000_RCTL_BSEX;
1808 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1809 case E1000_RXBUFFER_2048:
1810 default:
1811 rctl |= E1000_RCTL_SZ_2048;
1812 rctl &= ~E1000_RCTL_BSEX;
1813 break;
1814 case E1000_RXBUFFER_4096:
1815 rctl |= E1000_RCTL_SZ_4096;
1816 break;
1817 case E1000_RXBUFFER_8192:
1818 rctl |= E1000_RCTL_SZ_8192;
1819 break;
1820 case E1000_RXBUFFER_16384:
1821 rctl |= E1000_RCTL_SZ_16384;
1822 break;
2d7edb92
MC		 1823 }
1824
e825b731
BG		 1825 /* This is useful for sniffing bad packets. */
1826 if (adapter->netdev->features & NETIF_F_RXALL) {
1827 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1828 * in e1000e_set_rx_mode
1829 */
e825b731
BG		 1830 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1831 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1832 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1833
1834 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1835 E1000_RCTL_DPF | /* Allow filtered pause */
1836 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1837 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1838 * and that breaks VLANs.
1839 */
1840 }
1841
1dc32918 1842 ew32(RCTL, rctl);
1da177e4
LT		 1843}
1844
1845/**
1846 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1847 * @adapter: board private structure
1848 *
1849 * Configure the Rx unit of the MAC after a reset.
1850 **/
64798845 1851static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1852{
406874a7 1853 u64 rdba;
581d708e 1854 struct e1000_hw *hw = &adapter->hw;
1532ecea 1855 u32 rdlen, rctl, rxcsum;
2d7edb92 1856
edbbb3ca
JB		 1857 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1858 rdlen = adapter->rx_ring[0].count *
1859 sizeof(struct e1000_rx_desc);
1860 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1861 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1862 } else {
1863 rdlen = adapter->rx_ring[0].count *
1864 sizeof(struct e1000_rx_desc);
1865 adapter->clean_rx = e1000_clean_rx_irq;
1866 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1867 }
1da177e4
LT		 1868
1869 /* disable receives while setting up the descriptors */
1dc32918
JP		 1870 rctl = er32(RCTL);
1871 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1872
1873 /* set the Receive Delay Timer Register */
1dc32918 1874 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1875
581d708e 1876 if (hw->mac_type >= e1000_82540) {
1dc32918 1877 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1878 if (adapter->itr_setting != 0)
1dc32918 1879 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1880 }
1881
581d708e 1882 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1883 * the Base and Length of the Rx Descriptor Ring
1884 */
f56799ea 1885 switch (adapter->num_rx_queues) {
24025e4e
MC		 1886 case 1:
1887 default:
581d708e 1888 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1889 ew32(RDLEN, rdlen);
1890 ew32(RDBAH, (rdba >> 32));
1891 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1892 ew32(RDT, 0);
1893 ew32(RDH, 0);
6cfbd97b
JK		 1894 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1895 E1000_RDH : E1000_82542_RDH);
1896 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1897 E1000_RDT : E1000_82542_RDT);
581d708e 1898 break;
24025e4e
MC		 1899 }
1900
1da177e4 1901 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1902 if (hw->mac_type >= e1000_82543) {
1dc32918 1903 rxcsum = er32(RXCSUM);
630b25cd 1904 if (adapter->rx_csum)
2d7edb92 1905 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1906 else
2d7edb92 1907 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1908 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1909 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1910 }
1911
1912 /* Enable Receives */
d5bc77a2 1913 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1914}
1915
1916/**
581d708e 1917 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1918 * @adapter: board private structure
581d708e 1919 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1920 *
1921 * Free all transmit software resources
1922 **/
64798845
JP		 1923static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1924 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1925{
1926 struct pci_dev *pdev = adapter->pdev;
1927
581d708e 1928 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1929
581d708e
MC		 1930 vfree(tx_ring->buffer_info);
1931 tx_ring->buffer_info = NULL;
1da177e4 1932
b16f53be
NN		 1933 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1934 tx_ring->dma);
1da177e4 1935
581d708e
MC		 1936 tx_ring->desc = NULL;
1937}
1938
1939/**
1940 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1941 * @adapter: board private structure
1942 *
1943 * Free all transmit software resources
1944 **/
64798845 1945void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1946{
1947 int i;
1948
f56799ea 1949 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1950 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1951}
1952
580f321d
FW		 1953static void
1954e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1955 struct e1000_tx_buffer *buffer_info)
1da177e4 1956{
602c0554
AD		 1957 if (buffer_info->dma) {
1958 if (buffer_info->mapped_as_page)
b16f53be
NN		 1959 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1960 buffer_info->length, DMA_TO_DEVICE);
602c0554 1961 else
b16f53be 1962 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1963 buffer_info->length,
b16f53be 1964 DMA_TO_DEVICE);
602c0554
AD		 1965 buffer_info->dma = 0;
1966 }
a9ebadd6 1967 if (buffer_info->skb) {
1da177e4 1968 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1969 buffer_info->skb = NULL;
1970 }
37e73df8 1971 buffer_info->time_stamp = 0;
a9ebadd6 1972 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1973}
1974
1975/**
1976 * e1000_clean_tx_ring - Free Tx Buffers
1977 * @adapter: board private structure
581d708e 1978 * @tx_ring: ring to be cleaned
1da177e4 1979 **/
64798845
JP		 1980static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1981 struct e1000_tx_ring *tx_ring)
1da177e4 1982{
1dc32918 1983 struct e1000_hw *hw = &adapter->hw;
580f321d 1984 struct e1000_tx_buffer *buffer_info;
1da177e4
LT		 1985 unsigned long size;
1986 unsigned int i;
1987
1988 /* Free all the Tx ring sk_buffs */
1989
96838a40 1990 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1991 buffer_info = &tx_ring->buffer_info[i];
1992 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1993 }
1994
2f66fd36 1995 netdev_reset_queue(adapter->netdev);
580f321d 1996 size = sizeof(struct e1000_tx_buffer) * tx_ring->count;
1da177e4
LT		 1997 memset(tx_ring->buffer_info, 0, size);
1998
1999 /* Zero out the descriptor ring */
2000
2001 memset(tx_ring->desc, 0, tx_ring->size);
2002
2003 tx_ring->next_to_use = 0;
2004 tx_ring->next_to_clean = 0;
3db1cd5c 2005 tx_ring->last_tx_tso = false;
1da177e4 2006
1dc32918
JP		 2007 writel(0, hw->hw_addr + tx_ring->tdh);
2008 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2009}
2010
2011/**
2012 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2013 * @adapter: board private structure
2014 **/
64798845 2015static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2016{
2017 int i;
2018
f56799ea 2019 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2020 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2021}
2022
2023/**
2024 * e1000_free_rx_resources - Free Rx Resources
2025 * @adapter: board private structure
581d708e 2026 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2027 *
2028 * Free all receive software resources
2029 **/
64798845
JP		 2030static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2031 struct e1000_rx_ring *rx_ring)
1da177e4 2032{
1da177e4
LT		 2033 struct pci_dev *pdev = adapter->pdev;
2034
581d708e 2035 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2036
2037 vfree(rx_ring->buffer_info);
2038 rx_ring->buffer_info = NULL;
2039
b16f53be
NN		 2040 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2041 rx_ring->dma);
1da177e4
LT		 2042
2043 rx_ring->desc = NULL;
2044}
2045
2046/**
581d708e 2047 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2048 * @adapter: board private structure
581d708e
MC		 2049 *
2050 * Free all receive software resources
2051 **/
64798845 2052void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2053{
2054 int i;
2055
f56799ea 2056 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2057 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2058}
2059
13809609
FW		 2060#define E1000_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN)
2061static unsigned int e1000_frag_len(const struct e1000_adapter *a)
2062{
2063 return SKB_DATA_ALIGN(a->rx_buffer_len + E1000_HEADROOM) +
2064 SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
2065}
2066
2067static void *e1000_alloc_frag(const struct e1000_adapter *a)
2068{
2069 unsigned int len = e1000_frag_len(a);
2070 u8 *data = netdev_alloc_frag(len);
2071
2072 if (likely(data))
2073 data += E1000_HEADROOM;
2074 return data;
2075}
2076
2077static void e1000_free_frag(const void *data)
2078{
2079 put_page(virt_to_head_page(data));
2080}
2081
581d708e
MC		 2082/**
2083 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2084 * @adapter: board private structure
2085 * @rx_ring: ring to free buffers from
1da177e4 2086 **/
64798845
JP		 2087static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2088 struct e1000_rx_ring *rx_ring)
1da177e4 2089{
1dc32918 2090 struct e1000_hw *hw = &adapter->hw;
93f0afe9 2091 struct e1000_rx_buffer *buffer_info;
1da177e4
LT		 2092 struct pci_dev *pdev = adapter->pdev;
2093 unsigned long size;
630b25cd 2094 unsigned int i;
1da177e4 2095
13809609 2096 /* Free all the Rx netfrags */
96838a40 2097 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2098 buffer_info = &rx_ring->buffer_info[i];
13809609
FW		 2099 if (adapter->clean_rx == e1000_clean_rx_irq) {
2100 if (buffer_info->dma)
2101 dma_unmap_single(&pdev->dev, buffer_info->dma,
2102 adapter->rx_buffer_len,
2103 DMA_FROM_DEVICE);
2104 if (buffer_info->rxbuf.data) {
2105 e1000_free_frag(buffer_info->rxbuf.data);
2106 buffer_info->rxbuf.data = NULL;
2107 }
2108 } else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
2109 if (buffer_info->dma)
2110 dma_unmap_page(&pdev->dev, buffer_info->dma,
2111 adapter->rx_buffer_len,
2112 DMA_FROM_DEVICE);
2113 if (buffer_info->rxbuf.page) {
2114 put_page(buffer_info->rxbuf.page);
2115 buffer_info->rxbuf.page = NULL;
2116 }
679be3ba 2117 }
1da177e4 2118
679be3ba 2119 buffer_info->dma = 0;
1da177e4
LT		 2120 }
2121
edbbb3ca 2122 /* there also may be some cached data from a chained receive */
de591c78
FW		 2123 napi_free_frags(&adapter->napi);
2124 rx_ring->rx_skb_top = NULL;
edbbb3ca 2125
93f0afe9 2126 size = sizeof(struct e1000_rx_buffer) * rx_ring->count;
1da177e4
LT		 2127 memset(rx_ring->buffer_info, 0, size);
2128
2129 /* Zero out the descriptor ring */
1da177e4
LT		 2130 memset(rx_ring->desc, 0, rx_ring->size);
2131
2132 rx_ring->next_to_clean = 0;
2133 rx_ring->next_to_use = 0;
2134
1dc32918
JP		 2135 writel(0, hw->hw_addr + rx_ring->rdh);
2136 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2137}
2138
2139/**
2140 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2141 * @adapter: board private structure
2142 **/
64798845 2143static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2144{
2145 int i;
2146
f56799ea 2147 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2148 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2149}
2150
2151/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2152 * and memory write and invalidate disabled for certain operations
2153 */
64798845 2154static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2155{
1dc32918 2156 struct e1000_hw *hw = &adapter->hw;
1da177e4 2157 struct net_device *netdev = adapter->netdev;
406874a7 2158 u32 rctl;
1da177e4 2159
1dc32918 2160 e1000_pci_clear_mwi(hw);
1da177e4 2161
1dc32918 2162 rctl = er32(RCTL);
1da177e4 2163 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2164 ew32(RCTL, rctl);
2165 E1000_WRITE_FLUSH();
1da177e4
LT		 2166 mdelay(5);
2167
96838a40 2168 if (netif_running(netdev))
581d708e 2169 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2170}
2171
64798845 2172static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2173{
1dc32918 2174 struct e1000_hw *hw = &adapter->hw;
1da177e4 2175 struct net_device *netdev = adapter->netdev;
406874a7 2176 u32 rctl;
1da177e4 2177
1dc32918 2178 rctl = er32(RCTL);
1da177e4 2179 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2180 ew32(RCTL, rctl);
2181 E1000_WRITE_FLUSH();
1da177e4
LT		 2182 mdelay(5);
2183
1dc32918
JP		 2184 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2185 e1000_pci_set_mwi(hw);
1da177e4 2186
96838a40 2187 if (netif_running(netdev)) {
72d64a43
JK		 2188 /* No need to loop, because 82542 supports only 1 queue */
2189 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2190 e1000_configure_rx(adapter);
72d64a43 2191 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2192 }
2193}
2194
2195/**
2196 * e1000_set_mac - Change the Ethernet Address of the NIC
2197 * @netdev: network interface device structure
2198 * @p: pointer to an address structure
2199 *
2200 * Returns 0 on success, negative on failure
2201 **/
64798845 2202static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2203{
60490fe0 2204 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2205 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2206 struct sockaddr *addr = p;
2207
96838a40 2208 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2209 return -EADDRNOTAVAIL;
2210
2211 /* 82542 2.0 needs to be in reset to write receive address registers */
2212
1dc32918 2213 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2214 e1000_enter_82542_rst(adapter);
2215
2216 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2217 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2218
1dc32918 2219 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2220
1dc32918 2221 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2222 e1000_leave_82542_rst(adapter);
2223
2224 return 0;
2225}
2226
2227/**
db0ce50d 2228 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2229 * @netdev: network interface device structure
2230 *
db0ce50d
PM		 2231 * The set_rx_mode entry point is called whenever the unicast or multicast
2232 * address lists or the network interface flags are updated. This routine is
2233 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2234 * promiscuous mode, and all-multi behavior.
2235 **/
64798845 2236static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2237{
60490fe0 2238 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2239 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2240 struct netdev_hw_addr *ha;
2241 bool use_uc = false;
406874a7
JP		 2242 u32 rctl;
2243 u32 hash_value;
868d5309 2244 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2245 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2246 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2247
14f8dc49 2248 if (!mcarray)
81c52285 2249 return;
cd94dd0b 2250
2648345f
MC		 2251 /* Check for Promiscuous and All Multicast modes */
2252
1dc32918 2253 rctl = er32(RCTL);
1da177e4 2254
96838a40 2255 if (netdev->flags & IFF_PROMISC) {
1da177e4 2256 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2257 rctl &= ~E1000_RCTL_VFE;
1da177e4 2258 } else {
1532ecea 2259 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2260 rctl |= E1000_RCTL_MPE;
1532ecea 2261 else
746b9f02 2262 rctl &= ~E1000_RCTL_MPE;
1532ecea 2263 /* Enable VLAN filter if there is a VLAN */
5622e404 2264 if (e1000_vlan_used(adapter))
1532ecea 2265 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2266 }
2267
32e7bfc4 2268 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2269 rctl |= E1000_RCTL_UPE;
2270 } else if (!(netdev->flags & IFF_PROMISC)) {
2271 rctl &= ~E1000_RCTL_UPE;
ccffad25 2272 use_uc = true;
1da177e4
LT		 2273 }
2274
1dc32918 2275 ew32(RCTL, rctl);
1da177e4
LT		 2276
2277 /* 82542 2.0 needs to be in reset to write receive address registers */
2278
96838a40 2279 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2280 e1000_enter_82542_rst(adapter);
2281
db0ce50d
PM		 2282 /* load the first 14 addresses into the exact filters 1-14. Unicast
2283 * addresses take precedence to avoid disabling unicast filtering
2284 * when possible.
2285 *
b595076a 2286 * RAR 0 is used for the station MAC address
1da177e4
LT		 2287 * if there are not 14 addresses, go ahead and clear the filters
2288 */
ccffad25
JP		 2289 i = 1;
2290 if (use_uc)
32e7bfc4 2291 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2292 if (i == rar_entries)
2293 break;
2294 e1000_rar_set(hw, ha->addr, i++);
2295 }
2296
22bedad3 2297 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2298 if (i == rar_entries) {
2299 /* load any remaining addresses into the hash table */
2300 u32 hash_reg, hash_bit, mta;
22bedad3 2301 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2302 hash_reg = (hash_value >> 5) & 0x7F;
2303 hash_bit = hash_value & 0x1F;
2304 mta = (1 << hash_bit);
2305 mcarray[hash_reg] |= mta;
10886af5 2306 } else {
22bedad3 2307 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2308 }
2309 }
2310
7a81e9f3
JP		 2311 for (; i < rar_entries; i++) {
2312 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2313 E1000_WRITE_FLUSH();
2314 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2315 E1000_WRITE_FLUSH();
1da177e4
LT		 2316 }
2317
81c52285 2318 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2319 * both stupid write combining chipsets, and flushing each write
2320 */
81c52285 2321 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2322 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2323 * offsets overwrites the previous even offset, but writing
2324 * backwards over the range solves the issue by always
2325 * writing the odd offset first
2326 */
2327 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2328 }
2329 E1000_WRITE_FLUSH();
2330
96838a40 2331 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2332 e1000_leave_82542_rst(adapter);
81c52285
JB		 2333
2334 kfree(mcarray);
1da177e4
LT		 2335}
2336
a4010afe
JB		 2337/**
2338 * e1000_update_phy_info_task - get phy info
2339 * @work: work struct contained inside adapter struct
2340 *
2341 * Need to wait a few seconds after link up to get diagnostic information from
2342 * the phy
2343 */
5cf42fcd
JB		 2344static void e1000_update_phy_info_task(struct work_struct *work)
2345{
2346 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2347 struct e1000_adapter,
2348 phy_info_task.work);
b2f963bf 2349
a4010afe 2350 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
1da177e4
LT		 2351}
2352
5cf42fcd
JB		 2353/**
2354 * e1000_82547_tx_fifo_stall_task - task to complete work
2355 * @work: work struct contained inside adapter struct
2356 **/
2357static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2358{
2359 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2360 struct e1000_adapter,
2361 fifo_stall_task.work);
1dc32918 2362 struct e1000_hw *hw = &adapter->hw;
1da177e4 2363 struct net_device *netdev = adapter->netdev;
406874a7 2364 u32 tctl;
1da177e4 2365
96838a40 2366 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2367 if ((er32(TDT) == er32(TDH)) &&
2368 (er32(TDFT) == er32(TDFH)) &&
2369 (er32(TDFTS) == er32(TDFHS))) {
2370 tctl = er32(TCTL);
2371 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2372 ew32(TDFT, adapter->tx_head_addr);
2373 ew32(TDFH, adapter->tx_head_addr);
2374 ew32(TDFTS, adapter->tx_head_addr);
2375 ew32(TDFHS, adapter->tx_head_addr);
2376 ew32(TCTL, tctl);
2377 E1000_WRITE_FLUSH();
1da177e4
LT		 2378
2379 adapter->tx_fifo_head = 0;
2380 atomic_set(&adapter->tx_fifo_stall, 0);
2381 netif_wake_queue(netdev);
baa34745 2382 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2383 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2384 }
2385 }
2386}
2387
b548192a 2388bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2389{
2390 struct e1000_hw *hw = &adapter->hw;
2391 bool link_active = false;
be0f0719 2392
6d9e5130
NS		 2393 /* get_link_status is set on LSC (link status) interrupt or rx
2394 * sequence error interrupt (except on intel ce4100).
2395 * get_link_status will stay false until the
2396 * e1000_check_for_link establishes link for copper adapters
2397 * ONLY
be0f0719
JB		 2398 */
2399 switch (hw->media_type) {
2400 case e1000_media_type_copper:
6d9e5130
NS		 2401 if (hw->mac_type == e1000_ce4100)
2402 hw->get_link_status = 1;
be0f0719 2403 if (hw->get_link_status) {
120a5d0d 2404 e1000_check_for_link(hw);
be0f0719
JB		 2405 link_active = !hw->get_link_status;
2406 } else {
2407 link_active = true;
2408 }
2409 break;
2410 case e1000_media_type_fiber:
120a5d0d 2411 e1000_check_for_link(hw);
be0f0719
JB		 2412 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2413 break;
2414 case e1000_media_type_internal_serdes:
120a5d0d 2415 e1000_check_for_link(hw);
be0f0719
JB		 2416 link_active = hw->serdes_has_link;
2417 break;
2418 default:
2419 break;
2420 }
2421
2422 return link_active;
2423}
2424
1da177e4 2425/**
a4010afe
JB		 2426 * e1000_watchdog - work function
2427 * @work: work struct contained inside adapter struct
1da177e4 2428 **/
a4010afe 2429static void e1000_watchdog(struct work_struct *work)
1da177e4 2430{
a4010afe
JB		 2431 struct e1000_adapter *adapter = container_of(work,
2432 struct e1000_adapter,
2433 watchdog_task.work);
1dc32918 2434 struct e1000_hw *hw = &adapter->hw;
1da177e4 2435 struct net_device *netdev = adapter->netdev;
545c67c0 2436 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2437 u32 link, tctl;
90fb5135 2438
be0f0719
JB		 2439 link = e1000_has_link(adapter);
2440 if ((netif_carrier_ok(netdev)) && link)
2441 goto link_up;
1da177e4 2442
96838a40
JB		 2443 if (link) {
2444 if (!netif_carrier_ok(netdev)) {
406874a7 2445 u32 ctrl;
c3033b01 2446 bool txb2b = true;
be0f0719 2447 /* update snapshot of PHY registers on LSC */
1dc32918 2448 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2449 &adapter->link_speed,
2450 &adapter->link_duplex);
1da177e4 2451
1dc32918 2452 ctrl = er32(CTRL);
675ad473
ET		 2453 pr_info("%s NIC Link is Up %d Mbps %s, "
2454 "Flow Control: %s\n",
2455 netdev->name,
2456 adapter->link_speed,
2457 adapter->link_duplex == FULL_DUPLEX ?
2458 "Full Duplex" : "Half Duplex",
2459 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2460 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2461 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2462 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2463
39ca5f03 2464 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2465 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2466 switch (adapter->link_speed) {
2467 case SPEED_10:
c3033b01 2468 txb2b = false;
be0f0719 2469 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2470 break;
2471 case SPEED_100:
c3033b01 2472 txb2b = false;
7e6c9861
JK		 2473 /* maybe add some timeout factor ? */
2474 break;
2475 }
2476
1532ecea 2477 /* enable transmits in the hardware */
1dc32918 2478 tctl = er32(TCTL);
7e6c9861 2479 tctl |= E1000_TCTL_EN;
1dc32918 2480 ew32(TCTL, tctl);
66a2b0a3 2481
1da177e4 2482 netif_carrier_on(netdev);
baa34745 2483 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2484 schedule_delayed_work(&adapter->phy_info_task,
2485 2 * HZ);
1da177e4
LT		 2486 adapter->smartspeed = 0;
2487 }
2488 } else {
96838a40 2489 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2490 adapter->link_speed = 0;
2491 adapter->link_duplex = 0;
675ad473
ET		 2492 pr_info("%s NIC Link is Down\n",
2493 netdev->name);
1da177e4 2494 netif_carrier_off(netdev);
baa34745
JB		 2495
2496 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2497 schedule_delayed_work(&adapter->phy_info_task,
2498 2 * HZ);
1da177e4
LT		 2499 }
2500
2501 e1000_smartspeed(adapter);
2502 }
2503
be0f0719 2504link_up:
1da177e4
LT		 2505 e1000_update_stats(adapter);
2506
1dc32918 2507 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2508 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2509 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2510 adapter->colc_old = adapter->stats.colc;
2511
2512 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2513 adapter->gorcl_old = adapter->stats.gorcl;
2514 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2515 adapter->gotcl_old = adapter->stats.gotcl;
2516
1dc32918 2517 e1000_update_adaptive(hw);
1da177e4 2518
f56799ea 2519 if (!netif_carrier_ok(netdev)) {
581d708e 2520 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2521 /* We've lost link, so the controller stops DMA,
2522 * but we've got queued Tx work that's never going
2523 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2524 * (Do the reset outside of interrupt context).
2525 */
87041639
JK		 2526 adapter->tx_timeout_count++;
2527 schedule_work(&adapter->reset_task);
0ef4eedc 2528 /* exit immediately since reset is imminent */
b2f963bf 2529 return;
1da177e4
LT		 2530 }
2531 }
2532
eab2abf5
JB		 2533 /* Simple mode for Interrupt Throttle Rate (ITR) */
2534 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2535 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2536 * Total asymmetrical Tx or Rx gets ITR=8000;
2537 * everyone else is between 2000-8000.
2538 */
2539 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2540 u32 dif = (adapter->gotcl > adapter->gorcl ?
2541 adapter->gotcl - adapter->gorcl :
2542 adapter->gorcl - adapter->gotcl) / 10000;
2543 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2544
2545 ew32(ITR, 1000000000 / (itr * 256));
2546 }
2547
1da177e4 2548 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2549 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2550
2648345f 2551 /* Force detection of hung controller every watchdog period */
c3033b01 2552 adapter->detect_tx_hung = true;
1da177e4 2553
a4010afe 2554 /* Reschedule the task */
baa34745 2555 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2556 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
1da177e4
LT		 2557}
2558
835bb129
JB		 2559enum latency_range {
2560 lowest_latency = 0,
2561 low_latency = 1,
2562 bulk_latency = 2,
2563 latency_invalid = 255
2564};
2565
2566/**
2567 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2568 * @adapter: pointer to adapter
2569 * @itr_setting: current adapter->itr
2570 * @packets: the number of packets during this measurement interval
2571 * @bytes: the number of bytes during this measurement interval
2572 *
835bb129
JB		 2573 * Stores a new ITR value based on packets and byte
2574 * counts during the last interrupt. The advantage of per interrupt
2575 * computation is faster updates and more accurate ITR for the current
2576 * traffic pattern. Constants in this function were computed
2577 * based on theoretical maximum wire speed and thresholds were set based
2578 * on testing data as well as attempting to minimize response time
2579 * while increasing bulk throughput.
2580 * this functionality is controlled by the InterruptThrottleRate module
2581 * parameter (see e1000_param.c)
835bb129
JB		 2582 **/
2583static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2584 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2585{
2586 unsigned int retval = itr_setting;
2587 struct e1000_hw *hw = &adapter->hw;
2588
2589 if (unlikely(hw->mac_type < e1000_82540))
2590 goto update_itr_done;
2591
2592 if (packets == 0)
2593 goto update_itr_done;
2594
835bb129
JB		 2595 switch (itr_setting) {
2596 case lowest_latency:
2b65326e
JB		 2597 /* jumbo frames get bulk treatment*/
2598 if (bytes/packets > 8000)
2599 retval = bulk_latency;
2600 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2601 retval = low_latency;
2602 break;
2603 case low_latency: /* 50 usec aka 20000 ints/s */
2604 if (bytes > 10000) {
2b65326e
JB		 2605 /* jumbo frames need bulk latency setting */
2606 if (bytes/packets > 8000)
2607 retval = bulk_latency;
2608 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2609 retval = bulk_latency;
2610 else if ((packets > 35))
2611 retval = lowest_latency;
2b65326e
JB		 2612 } else if (bytes/packets > 2000)
2613 retval = bulk_latency;
2614 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2615 retval = lowest_latency;
2616 break;
2617 case bulk_latency: /* 250 usec aka 4000 ints/s */
2618 if (bytes > 25000) {
2619 if (packets > 35)
2620 retval = low_latency;
2b65326e
JB		 2621 } else if (bytes < 6000) {
2622 retval = low_latency;
835bb129
JB		 2623 }
2624 break;
2625 }
2626
2627update_itr_done:
2628 return retval;
2629}
2630
2631static void e1000_set_itr(struct e1000_adapter *adapter)
2632{
2633 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2634 u16 current_itr;
2635 u32 new_itr = adapter->itr;
835bb129
JB		 2636
2637 if (unlikely(hw->mac_type < e1000_82540))
2638 return;
2639
2640 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2641 if (unlikely(adapter->link_speed != SPEED_1000)) {
2642 current_itr = 0;
2643 new_itr = 4000;
2644 goto set_itr_now;
2645 }
2646
6cfbd97b
JK		 2647 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2648 adapter->total_tx_packets,
2649 adapter->total_tx_bytes);
2b65326e
JB		 2650 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2651 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2652 adapter->tx_itr = low_latency;
2653
6cfbd97b
JK		 2654 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2655 adapter->total_rx_packets,
2656 adapter->total_rx_bytes);
2b65326e
JB		 2657 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2658 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2659 adapter->rx_itr = low_latency;
835bb129
JB		 2660
2661 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2662
835bb129
JB		 2663 switch (current_itr) {
2664 /* counts and packets in update_itr are dependent on these numbers */
2665 case lowest_latency:
2666 new_itr = 70000;
2667 break;
2668 case low_latency:
2669 new_itr = 20000; /* aka hwitr = ~200 */
2670 break;
2671 case bulk_latency:
2672 new_itr = 4000;
2673 break;
2674 default:
2675 break;
2676 }
2677
2678set_itr_now:
2679 if (new_itr != adapter->itr) {
2680 /* this attempts to bias the interrupt rate towards Bulk
2681 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2682 * increasing
2683 */
835bb129 2684 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2685 min(adapter->itr + (new_itr >> 2), new_itr) :
2686 new_itr;
835bb129 2687 adapter->itr = new_itr;
1dc32918 2688 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2689 }
835bb129
JB		 2690}
2691
1da177e4
LT		 2692#define E1000_TX_FLAGS_CSUM 0x00000001
2693#define E1000_TX_FLAGS_VLAN 0x00000002
2694#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2695#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2696#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2697#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2698#define E1000_TX_FLAGS_VLAN_SHIFT 16
2699
64798845 2700static int e1000_tso(struct e1000_adapter *adapter,
06f4d033
VY		 2701 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2702 __be16 protocol)
1da177e4 2703{
1da177e4 2704 struct e1000_context_desc *context_desc;
580f321d 2705 struct e1000_tx_buffer *buffer_info;
1da177e4 2706 unsigned int i;
406874a7
JP		 2707 u32 cmd_length = 0;
2708 u16 ipcse = 0, tucse, mss;
2709 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4 2710
89114afd 2711 if (skb_is_gso(skb)) {
4a54b1e5
FR		 2712 int err;
2713
2714 err = skb_cow_head(skb, 0);
2715 if (err < 0)
2716 return err;
1da177e4 2717
ab6a5bb6 2718 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2719 mss = skb_shinfo(skb)->gso_size;
06f4d033 2720 if (protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2721 struct iphdr *iph = ip_hdr(skb);
2722 iph->tot_len = 0;
2723 iph->check = 0;
aa8223c7
ACM		 2724 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2725 iph->daddr, 0,
2726 IPPROTO_TCP,
2727 0);
2d7edb92 2728 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2729 ipcse = skb_transport_offset(skb) - 1;
06f4d033 2730 } else if (skb_is_gso_v6(skb)) {
0660e03f 2731 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2732 tcp_hdr(skb)->check =
0660e03f
ACM		 2733 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2734 &ipv6_hdr(skb)->daddr,
2735 0, IPPROTO_TCP, 0);
2d7edb92 2736 ipcse = 0;
2d7edb92 2737 }
bbe735e4 2738 ipcss = skb_network_offset(skb);
eddc9ec5 2739 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2740 tucss = skb_transport_offset(skb);
aa8223c7 2741 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2742 tucse = 0;
2743
2744 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2745 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2746
581d708e
MC		 2747 i = tx_ring->next_to_use;
2748 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2749 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2750
2751 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2752 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2753 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2754 context_desc->upper_setup.tcp_fields.tucss = tucss;
2755 context_desc->upper_setup.tcp_fields.tucso = tucso;
2756 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2757 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2758 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2759 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2760
545c67c0 2761 buffer_info->time_stamp = jiffies;
a9ebadd6 2762 buffer_info->next_to_watch = i;
545c67c0 2763
581d708e
MC		 2764 if (++i == tx_ring->count) i = 0;
2765 tx_ring->next_to_use = i;
1da177e4 2766
c3033b01 2767 return true;
1da177e4 2768 }
c3033b01 2769 return false;
1da177e4
LT		 2770}
2771
64798845 2772static bool e1000_tx_csum(struct e1000_adapter *adapter,
06f4d033
VY		 2773 struct e1000_tx_ring *tx_ring, struct sk_buff *skb,
2774 __be16 protocol)
1da177e4
LT		 2775{
2776 struct e1000_context_desc *context_desc;
580f321d 2777 struct e1000_tx_buffer *buffer_info;
1da177e4 2778 unsigned int i;
406874a7 2779 u8 css;
3ed30676 2780 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2781
3ed30676
DG		 2782 if (skb->ip_summed != CHECKSUM_PARTIAL)
2783 return false;
1da177e4 2784
06f4d033 2785 switch (protocol) {
09640e63 2786 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2787 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2788 cmd_len |= E1000_TXD_CMD_TCP;
2789 break;
09640e63 2790 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2791 /* XXX not handling all IPV6 headers */
2792 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2793 cmd_len |= E1000_TXD_CMD_TCP;
2794 break;
2795 default:
2796 if (unlikely(net_ratelimit()))
feb8f478
ET		 2797 e_warn(drv, "checksum_partial proto=%x!\n",
2798 skb->protocol);
3ed30676
DG		 2799 break;
2800 }
1da177e4 2801
0d0b1672 2802 css = skb_checksum_start_offset(skb);
1da177e4 2803
3ed30676
DG		 2804 i = tx_ring->next_to_use;
2805 buffer_info = &tx_ring->buffer_info[i];
2806 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2807
3ed30676
DG		 2808 context_desc->lower_setup.ip_config = 0;
2809 context_desc->upper_setup.tcp_fields.tucss = css;
2810 context_desc->upper_setup.tcp_fields.tucso =
2811 css + skb->csum_offset;
2812 context_desc->upper_setup.tcp_fields.tucse = 0;
2813 context_desc->tcp_seg_setup.data = 0;
2814 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2815
3ed30676
DG		 2816 buffer_info->time_stamp = jiffies;
2817 buffer_info->next_to_watch = i;
1da177e4 2818
3ed30676
DG		 2819 if (unlikely(++i == tx_ring->count)) i = 0;
2820 tx_ring->next_to_use = i;
2821
2822 return true;
1da177e4
LT		 2823}
2824
2825#define E1000_MAX_TXD_PWR 12
2826#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2827
64798845
JP		 2828static int e1000_tx_map(struct e1000_adapter *adapter,
2829 struct e1000_tx_ring *tx_ring,
2830 struct sk_buff *skb, unsigned int first,
2831 unsigned int max_per_txd, unsigned int nr_frags,
2832 unsigned int mss)
1da177e4 2833{
1dc32918 2834 struct e1000_hw *hw = &adapter->hw;
602c0554 2835 struct pci_dev *pdev = adapter->pdev;
580f321d 2836 struct e1000_tx_buffer *buffer_info;
d20b606c 2837 unsigned int len = skb_headlen(skb);
602c0554 2838 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2839 unsigned int f, bytecount, segs;
1da177e4
LT		 2840
2841 i = tx_ring->next_to_use;
2842
96838a40 2843 while (len) {
37e73df8 2844 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2845 size = min(len, max_per_txd);
fd803241
JK		 2846 /* Workaround for Controller erratum --
2847 * descriptor for non-tso packet in a linear SKB that follows a
2848 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2849 * DMA'd to the controller
2850 */
fd803241 2851 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2852 !skb_is_gso(skb)) {
3db1cd5c 2853 tx_ring->last_tx_tso = false;
fd803241
JK		 2854 size -= 4;
2855 }
2856
1da177e4 2857 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2858 * in TSO mode. Append 4-byte sentinel desc
2859 */
96838a40 2860 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2861 size -= 4;
97338bde
MC		 2862 /* work-around for errata 10 and it applies
2863 * to all controllers in PCI-X mode
2864 * The fix is to make sure that the first descriptor of a
2865 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2866 */
1dc32918 2867 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2868 (size > 2015) && count == 0))
2869 size = 2015;
96838a40 2870
1da177e4 2871 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2872 * terminating buffers within evenly-aligned dwords.
2873 */
96838a40 2874 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2875 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2876 size > 4))
2877 size -= 4;
2878
2879 buffer_info->length = size;
cdd7549e 2880 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2881 buffer_info->time_stamp = jiffies;
602c0554 2882 buffer_info->mapped_as_page = false;
b16f53be
NN		 2883 buffer_info->dma = dma_map_single(&pdev->dev,
2884 skb->data + offset,
6cfbd97b 2885 size, DMA_TO_DEVICE);
b16f53be 2886 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2887 goto dma_error;
a9ebadd6 2888 buffer_info->next_to_watch = i;
1da177e4
LT		 2889
2890 len -= size;
2891 offset += size;
2892 count++;
37e73df8
AD		 2893 if (len) {
2894 i++;
2895 if (unlikely(i == tx_ring->count))
2896 i = 0;
2897 }
1da177e4
LT		 2898 }
2899
96838a40 2900 for (f = 0; f < nr_frags; f++) {
9e903e08 2901 const struct skb_frag_struct *frag;
1da177e4
LT		 2902
2903 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2904 len = skb_frag_size(frag);
877749bf 2905 offset = 0;
1da177e4 2906
96838a40 2907 while (len) {
877749bf 2908 unsigned long bufend;
37e73df8
AD		 2909 i++;
2910 if (unlikely(i == tx_ring->count))
2911 i = 0;
2912
1da177e4
LT		 2913 buffer_info = &tx_ring->buffer_info[i];
2914 size = min(len, max_per_txd);
1da177e4 2915 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2916 * in TSO mode. Append 4-byte sentinel desc
2917 */
2918 if (unlikely(mss && f == (nr_frags-1) &&
2919 size == len && size > 8))
1da177e4 2920 size -= 4;
1da177e4
LT		 2921 /* Workaround for potential 82544 hang in PCI-X.
2922 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2923 * dwords.
2924 */
877749bf
IC		 2925 bufend = (unsigned long)
2926 page_to_phys(skb_frag_page(frag));
2927 bufend += offset + size - 1;
96838a40 2928 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2929 !(bufend & 4) &&
2930 size > 4))
1da177e4
LT		 2931 size -= 4;
2932
2933 buffer_info->length = size;
1da177e4 2934 buffer_info->time_stamp = jiffies;
602c0554 2935 buffer_info->mapped_as_page = true;
877749bf
IC		 2936 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2937 offset, size, DMA_TO_DEVICE);
b16f53be 2938 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2939 goto dma_error;
a9ebadd6 2940 buffer_info->next_to_watch = i;
1da177e4
LT		 2941
2942 len -= size;
2943 offset += size;
2944 count++;
1da177e4
LT		 2945 }
2946 }
2947
31c15a2f
DN		 2948 segs = skb_shinfo(skb)->gso_segs ?: 1;
2949 /* multiply data chunks by size of headers */
2950 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2951
1da177e4 2952 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2953 tx_ring->buffer_info[i].segs = segs;
2954 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2955 tx_ring->buffer_info[first].next_to_watch = i;
2956
2957 return count;
602c0554
AD		 2958
2959dma_error:
2960 dev_err(&pdev->dev, "TX DMA map failed\n");
2961 buffer_info->dma = 0;
c1fa347f 2962 if (count)
602c0554 2963 count--;
c1fa347f
RK		 2964
2965 while (count--) {
2966 if (i==0)
602c0554 2967 i += tx_ring->count;
c1fa347f 2968 i--;
602c0554
AD		 2969 buffer_info = &tx_ring->buffer_info[i];
2970 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2971 }
2972
2973 return 0;
1da177e4
LT		 2974}
2975
64798845
JP		 2976static void e1000_tx_queue(struct e1000_adapter *adapter,
2977 struct e1000_tx_ring *tx_ring, int tx_flags,
2978 int count)
1da177e4 2979{
1dc32918 2980 struct e1000_hw *hw = &adapter->hw;
1da177e4 2981 struct e1000_tx_desc *tx_desc = NULL;
580f321d 2982 struct e1000_tx_buffer *buffer_info;
406874a7 2983 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2984 unsigned int i;
2985
96838a40 2986 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2987 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2988 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2989 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2990
96838a40 2991 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2992 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2993 }
2994
96838a40 2995 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2996 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2997 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2998 }
2999
96838a40 3000 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3001 txd_lower |= E1000_TXD_CMD_VLE;
3002 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3003 }
3004
11a78dcf
BG		 3005 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3006 txd_lower &= ~(E1000_TXD_CMD_IFCS);
3007
1da177e4
LT		 3008 i = tx_ring->next_to_use;
3009
96838a40 3010 while (count--) {
1da177e4
LT		 3011 buffer_info = &tx_ring->buffer_info[i];
3012 tx_desc = E1000_TX_DESC(*tx_ring, i);
3013 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3014 tx_desc->lower.data =
3015 cpu_to_le32(txd_lower | buffer_info->length);
3016 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3017 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3018 }
3019
3020 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3021
11a78dcf
BG		 3022 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3023 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3024 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3025
1da177e4
LT		 3026 /* Force memory writes to complete before letting h/w
3027 * know there are new descriptors to fetch. (Only
3028 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3029 * such as IA-64).
3030 */
1da177e4
LT		 3031 wmb();
3032
3033 tx_ring->next_to_use = i;
1dc32918 3034 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f 3035 /* we need this if more than one processor can write to our tail
6cfbd97b
JK		 3036 * at a time, it synchronizes IO on IA64/Altix systems
3037 */
2ce9047f 3038 mmiowb();
1da177e4
LT		 3039}
3040
1aa8b471 3041/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3042 * The workaround is to avoid queuing a large packet that would span
3043 * the internal Tx FIFO ring boundary by notifying the stack to resend
3044 * the packet at a later time. This gives the Tx FIFO an opportunity to
3045 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3046 * to the beginning of the Tx FIFO.
1aa8b471 3047 */
1da177e4
LT		 3048
3049#define E1000_FIFO_HDR 0x10
3050#define E1000_82547_PAD_LEN 0x3E0
3051
64798845
JP		 3052static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3053 struct sk_buff *skb)
1da177e4 3054{
406874a7
JP		 3055 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3056 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3057
9099cfb9 3058 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3059
96838a40 3060 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3061 goto no_fifo_stall_required;
3062
96838a40 3063 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3064 return 1;
3065
96838a40 3066 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3067 atomic_set(&adapter->tx_fifo_stall, 1);
3068 return 1;
3069 }
3070
3071no_fifo_stall_required:
3072 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3073 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3074 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3075 return 0;
3076}
3077
65c7973f
JB		 3078static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3079{
3080 struct e1000_adapter *adapter = netdev_priv(netdev);
3081 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3082
3083 netif_stop_queue(netdev);
3084 /* Herbert's original patch had:
3085 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3086 * but since that doesn't exist yet, just open code it.
3087 */
65c7973f
JB		 3088 smp_mb();
3089
3090 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3091 * made room available.
3092 */
65c7973f
JB		 3093 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3094 return -EBUSY;
3095
3096 /* A reprieve! */
3097 netif_start_queue(netdev);
fcfb1224 3098 ++adapter->restart_queue;
65c7973f
JB		 3099 return 0;
3100}
3101
3102static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3103 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3104{
3105 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3106 return 0;
3107 return __e1000_maybe_stop_tx(netdev, size);
3108}
3109
1da177e4 3110#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3111static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3112 struct net_device *netdev)
1da177e4 3113{
60490fe0 3114 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3115 struct e1000_hw *hw = &adapter->hw;
581d708e 3116 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3117 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3118 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3119 unsigned int tx_flags = 0;
e743d313 3120 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3121 unsigned int nr_frags;
3122 unsigned int mss;
1da177e4 3123 int count = 0;
76c224bc 3124 int tso;
1da177e4 3125 unsigned int f;
06f4d033 3126 __be16 protocol = vlan_get_protocol(skb);
1da177e4 3127
6cfbd97b 3128 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3129 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3130 * if using multiple Tx queues. If the stack breaks away from a
3131 * single qdisc implementation, we can look at this again.
3132 */
581d708e 3133 tx_ring = adapter->tx_ring;
24025e4e 3134
59d86c76
TD		 3135 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3136 * packets may get corrupted during padding by HW.
3137 * To WA this issue, pad all small packets manually.
3138 */
a94d9e22
AD		 3139 if (eth_skb_pad(skb))
3140 return NETDEV_TX_OK;
59d86c76 3141
7967168c 3142 mss = skb_shinfo(skb)->gso_size;
76c224bc 3143 /* The controller does a simple calculation to
1da177e4
LT		 3144 * make sure there is enough room in the FIFO before
3145 * initiating the DMA for each buffer. The calc is:
3146 * 4 = ceil(buffer len/mss). To make sure we don't
3147 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3148 * drops.
3149 */
96838a40 3150 if (mss) {
406874a7 3151 u8 hdr_len;
1da177e4
LT		 3152 max_per_txd = min(mss << 2, max_per_txd);
3153 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3154
ab6a5bb6 3155 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3156 if (skb->data_len && hdr_len == len) {
1dc32918 3157 switch (hw->mac_type) {
9f687888 3158 unsigned int pull_size;
683a2aa3
HX		 3159 case e1000_82544:
3160 /* Make sure we have room to chop off 4 bytes,
3161 * and that the end alignment will work out to
3162 * this hardware's requirements
3163 * NOTE: this is a TSO only workaround
3164 * if end byte alignment not correct move us
6cfbd97b
JK		 3165 * into the next dword
3166 */
3167 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3168 & 4)
683a2aa3
HX		 3169 break;
3170 /* fall through */
9f687888
JK		 3171 pull_size = min((unsigned int)4, skb->data_len);
3172 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3173 e_err(drv, "__pskb_pull_tail "
3174 "failed.\n");
9f687888 3175 dev_kfree_skb_any(skb);
749dfc70 3176 return NETDEV_TX_OK;
9f687888 3177 }
e743d313 3178 len = skb_headlen(skb);
9f687888
JK		 3179 break;
3180 default:
3181 /* do nothing */
3182 break;
d74bbd3b 3183 }
9a3056da 3184 }
1da177e4
LT		 3185 }
3186
9a3056da 3187 /* reserve a descriptor for the offload context */
84fa7933 3188 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3189 count++;
2648345f 3190 count++;
fd803241 3191
fd803241 3192 /* Controller Erratum workaround */
89114afd 3193 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3194 count++;
fd803241 3195
1da177e4
LT		 3196 count += TXD_USE_COUNT(len, max_txd_pwr);
3197
96838a40 3198 if (adapter->pcix_82544)
1da177e4
LT		 3199 count++;
3200
96838a40 3201 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3202 * in PCI-X mode, so add one more descriptor to the count
3203 */
1dc32918 3204 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3205 (len > 2015)))
3206 count++;
3207
1da177e4 3208 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3209 for (f = 0; f < nr_frags; f++)
9e903e08 3210 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3211 max_txd_pwr);
96838a40 3212 if (adapter->pcix_82544)
1da177e4
LT		 3213 count += nr_frags;
3214
1da177e4 3215 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3216 * head, otherwise try next time
3217 */
8017943e 3218 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3219 return NETDEV_TX_BUSY;
1da177e4 3220
a4010afe
JB		 3221 if (unlikely((hw->mac_type == e1000_82547) &&
3222 (e1000_82547_fifo_workaround(adapter, skb)))) {
3223 netif_stop_queue(netdev);
3224 if (!test_bit(__E1000_DOWN, &adapter->flags))
3225 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3226 return NETDEV_TX_BUSY;
1da177e4
LT		 3227 }
3228
5622e404 3229 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3230 tx_flags |= E1000_TX_FLAGS_VLAN;
3231 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3232 }
3233
581d708e 3234 first = tx_ring->next_to_use;
96838a40 3235
06f4d033 3236 tso = e1000_tso(adapter, tx_ring, skb, protocol);
1da177e4
LT		 3237 if (tso < 0) {
3238 dev_kfree_skb_any(skb);
3239 return NETDEV_TX_OK;
3240 }
3241
fd803241 3242 if (likely(tso)) {
8fce4731 3243 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3244 tx_ring->last_tx_tso = true;
1da177e4 3245 tx_flags |= E1000_TX_FLAGS_TSO;
06f4d033 3246 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb, protocol)))
1da177e4
LT		 3247 tx_flags |= E1000_TX_FLAGS_CSUM;
3248
06f4d033 3249 if (protocol == htons(ETH_P_IP))
2d7edb92
MC		 3250 tx_flags |= E1000_TX_FLAGS_IPV4;
3251
11a78dcf
BG		 3252 if (unlikely(skb->no_fcs))
3253 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3254
37e73df8 3255 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3256 nr_frags, mss);
1da177e4 3257
37e73df8 3258 if (count) {
2f66fd36 3259 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3260 skb_tx_timestamp(skb);
3261
37e73df8 3262 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3263 /* Make sure there is space in the ring for the next send. */
3264 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3265
37e73df8
AD		 3266 } else {
3267 dev_kfree_skb_any(skb);
3268 tx_ring->buffer_info[first].time_stamp = 0;
3269 tx_ring->next_to_use = first;
3270 }
1da177e4 3271
1da177e4
LT		 3272 return NETDEV_TX_OK;
3273}
3274
b04e36ba
TD		 3275#define NUM_REGS 38 /* 1 based count */
3276static void e1000_regdump(struct e1000_adapter *adapter)
3277{
3278 struct e1000_hw *hw = &adapter->hw;
3279 u32 regs[NUM_REGS];
3280 u32 *regs_buff = regs;
3281 int i = 0;
3282
e29b5d8f
TD		 3283 static const char * const reg_name[] = {
3284 "CTRL", "STATUS",
3285 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3286 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3287 "TIDV", "TXDCTL", "TADV", "TARC0",
3288 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3289 "TXDCTL1", "TARC1",
3290 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3291 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3292 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3293 };
3294
3295 regs_buff[0] = er32(CTRL);
3296 regs_buff[1] = er32(STATUS);
3297
3298 regs_buff[2] = er32(RCTL);
3299 regs_buff[3] = er32(RDLEN);
3300 regs_buff[4] = er32(RDH);
3301 regs_buff[5] = er32(RDT);
3302 regs_buff[6] = er32(RDTR);
3303
3304 regs_buff[7] = er32(TCTL);
3305 regs_buff[8] = er32(TDBAL);
3306 regs_buff[9] = er32(TDBAH);
3307 regs_buff[10] = er32(TDLEN);
3308 regs_buff[11] = er32(TDH);
3309 regs_buff[12] = er32(TDT);
3310 regs_buff[13] = er32(TIDV);
3311 regs_buff[14] = er32(TXDCTL);
3312 regs_buff[15] = er32(TADV);
3313 regs_buff[16] = er32(TARC0);
3314
3315 regs_buff[17] = er32(TDBAL1);
3316 regs_buff[18] = er32(TDBAH1);
3317 regs_buff[19] = er32(TDLEN1);
3318 regs_buff[20] = er32(TDH1);
3319 regs_buff[21] = er32(TDT1);
3320 regs_buff[22] = er32(TXDCTL1);
3321 regs_buff[23] = er32(TARC1);
3322 regs_buff[24] = er32(CTRL_EXT);
3323 regs_buff[25] = er32(ERT);
3324 regs_buff[26] = er32(RDBAL0);
3325 regs_buff[27] = er32(RDBAH0);
3326 regs_buff[28] = er32(TDFH);
3327 regs_buff[29] = er32(TDFT);
3328 regs_buff[30] = er32(TDFHS);
3329 regs_buff[31] = er32(TDFTS);
3330 regs_buff[32] = er32(TDFPC);
3331 regs_buff[33] = er32(RDFH);
3332 regs_buff[34] = er32(RDFT);
3333 regs_buff[35] = er32(RDFHS);
3334 regs_buff[36] = er32(RDFTS);
3335 regs_buff[37] = er32(RDFPC);
3336
3337 pr_info("Register dump\n");
e29b5d8f
TD		 3338 for (i = 0; i < NUM_REGS; i++)
3339 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3340}
3341
3342/*
3343 * e1000_dump: Print registers, tx ring and rx ring
3344 */
3345static void e1000_dump(struct e1000_adapter *adapter)
3346{
3347 /* this code doesn't handle multiple rings */
3348 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3349 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3350 int i;
3351
3352 if (!netif_msg_hw(adapter))
3353 return;
3354
3355 /* Print Registers */
3356 e1000_regdump(adapter);
3357
6cfbd97b 3358 /* transmit dump */
b04e36ba
TD		 3359 pr_info("TX Desc ring0 dump\n");
3360
3361 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3362 *
3363 * Legacy Transmit Descriptor
3364 * +--------------------------------------------------------------+
3365 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3366 * +--------------------------------------------------------------+
3367 * 8 | Special | CSS | Status | CMD | CSO | Length |
3368 * +--------------------------------------------------------------+
3369 * 63 48 47 36 35 32 31 24 23 16 15 0
3370 *
3371 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3372 * 63 48 47 40 39 32 31 16 15 8 7 0
3373 * +----------------------------------------------------------------+
3374 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3375 * +----------------------------------------------------------------+
3376 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3377 * +----------------------------------------------------------------+
3378 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3379 *
3380 * Extended Data Descriptor (DTYP=0x1)
3381 * +----------------------------------------------------------------+
3382 * 0 | Buffer Address [63:0] |
3383 * +----------------------------------------------------------------+
3384 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3385 * +----------------------------------------------------------------+
3386 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3387 */
e29b5d8f
TD		 3388 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3389 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3390
3391 if (!netif_msg_tx_done(adapter))
3392 goto rx_ring_summary;
3393
3394 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3395 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
580f321d 3396 struct e1000_tx_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3397 struct my_u { __le64 a; __le64 b; };
b04e36ba 3398 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3399 const char *type;
3400
b04e36ba 3401 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3402 type = "NTC/U";
b04e36ba 3403 else if (i == tx_ring->next_to_use)
e29b5d8f 3404 type = "NTU";
b04e36ba 3405 else if (i == tx_ring->next_to_clean)
e29b5d8f 3406 type = "NTC";
b04e36ba 3407 else
e29b5d8f 3408 type = "";
b04e36ba 3409
e29b5d8f
TD		 3410 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3411 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3412 le64_to_cpu(u->a), le64_to_cpu(u->b),
3413 (u64)buffer_info->dma, buffer_info->length,
3414 buffer_info->next_to_watch,
3415 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3416 }
3417
3418rx_ring_summary:
6cfbd97b 3419 /* receive dump */
b04e36ba
TD		 3420 pr_info("\nRX Desc ring dump\n");
3421
3422 /* Legacy Receive Descriptor Format
3423 *
3424 * +-----------------------------------------------------+
3425 * | Buffer Address [63:0] |
3426 * +-----------------------------------------------------+
3427 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3428 * +-----------------------------------------------------+
3429 * 63 48 47 40 39 32 31 16 15 0
3430 */
e29b5d8f 3431 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3432
3433 if (!netif_msg_rx_status(adapter))
3434 goto exit;
3435
3436 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3437 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
93f0afe9 3438 struct e1000_rx_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3439 struct my_u { __le64 a; __le64 b; };
b04e36ba 3440 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3441 const char *type;
3442
b04e36ba 3443 if (i == rx_ring->next_to_use)
e29b5d8f 3444 type = "NTU";
b04e36ba 3445 else if (i == rx_ring->next_to_clean)
e29b5d8f 3446 type = "NTC";
b04e36ba 3447 else
e29b5d8f 3448 type = "";
b04e36ba 3449
e29b5d8f
TD		 3450 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3451 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
13809609 3452 (u64)buffer_info->dma, buffer_info->rxbuf.data, type);
b04e36ba
TD		 3453 } /* for */
3454
3455 /* dump the descriptor caches */
3456 /* rx */
e29b5d8f 3457 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3458 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3459 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3460 i,
3461 readl(adapter->hw.hw_addr + i+4),
3462 readl(adapter->hw.hw_addr + i),
3463 readl(adapter->hw.hw_addr + i+12),
3464 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3465 }
3466 /* tx */
e29b5d8f 3467 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3468 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3469 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3470 i,
3471 readl(adapter->hw.hw_addr + i+4),
3472 readl(adapter->hw.hw_addr + i),
3473 readl(adapter->hw.hw_addr + i+12),
3474 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3475 }
3476exit:
3477 return;
3478}
3479
1da177e4
LT		 3480/**
3481 * e1000_tx_timeout - Respond to a Tx Hang
3482 * @netdev: network interface device structure
3483 **/
64798845 3484static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3485{
60490fe0 3486 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3487
3488 /* Do the reset outside of interrupt context */
87041639
JK		 3489 adapter->tx_timeout_count++;
3490 schedule_work(&adapter->reset_task);
1da177e4
LT		 3491}
3492
64798845 3493static void e1000_reset_task(struct work_struct *work)
1da177e4 3494{
65f27f38
DH		 3495 struct e1000_adapter *adapter =
3496 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3497
b04e36ba 3498 e_err(drv, "Reset adapter\n");
b2f963bf 3499 e1000_reinit_locked(adapter);
1da177e4
LT		 3500}
3501
3502/**
3503 * e1000_get_stats - Get System Network Statistics
3504 * @netdev: network interface device structure
3505 *
3506 * Returns the address of the device statistics structure.
a4010afe 3507 * The statistics are actually updated from the watchdog.
1da177e4 3508 **/
64798845 3509static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3510{
6b7660cd 3511 /* only return the current stats */
5fe31def 3512 return &netdev->stats;
1da177e4
LT		 3513}
3514
3515/**
3516 * e1000_change_mtu - Change the Maximum Transfer Unit
3517 * @netdev: network interface device structure
3518 * @new_mtu: new value for maximum frame size
3519 *
3520 * Returns 0 on success, negative on failure
3521 **/
64798845 3522static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3523{
60490fe0 3524 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3525 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3526 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3527
96838a40
JB		 3528 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3529 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3530 e_err(probe, "Invalid MTU setting\n");
1da177e4 3531 return -EINVAL;
2d7edb92 3532 }
1da177e4 3533
997f5cbd 3534 /* Adapter-specific max frame size limits. */
1dc32918 3535 switch (hw->mac_type) {
9e2feace 3536 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3537 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3538 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3539 return -EINVAL;
2d7edb92 3540 }
997f5cbd 3541 break;
997f5cbd
JK		 3542 default:
3543 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3544 break;
1da177e4
LT		 3545 }
3546
3d6114e7
JB		 3547 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3548 msleep(1);
3549 /* e1000_down has a dependency on max_frame_size */
3550 hw->max_frame_size = max_frame;
3551 if (netif_running(netdev))
3552 e1000_down(adapter);
3553
87f5032e 3554 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3555 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3556 * larger slab size.
3557 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3558 * however with the new *_jumbo_rx* routines, jumbo receives will use
3559 * fragmented skbs
3560 */
9e2feace 3561
9926146b 3562 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3563 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3564 else
3565#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3566 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3567#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3568 adapter->rx_buffer_len = PAGE_SIZE;
3569#endif
9e2feace
AK		 3570
3571 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3572 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3573 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3574 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3575 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3576
675ad473
ET		 3577 pr_info("%s changing MTU from %d to %d\n",
3578 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3579 netdev->mtu = new_mtu;
3580
2db10a08 3581 if (netif_running(netdev))
3d6114e7
JB		 3582 e1000_up(adapter);
3583 else
3584 e1000_reset(adapter);
3585
3586 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3587
1da177e4
LT		 3588 return 0;
3589}
3590
3591/**
3592 * e1000_update_stats - Update the board statistics counters
3593 * @adapter: board private structure
3594 **/
64798845 3595void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3596{
5fe31def 3597 struct net_device *netdev = adapter->netdev;
1da177e4 3598 struct e1000_hw *hw = &adapter->hw;
282f33c9 3599 struct pci_dev *pdev = adapter->pdev;
1da177e4 3600 unsigned long flags;
406874a7 3601 u16 phy_tmp;
1da177e4
LT		 3602
3603#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3604
6cfbd97b 3605 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3606 * connection is down.
3607 */
9026729b 3608 if (adapter->link_speed == 0)
282f33c9 3609 return;
81b1955e 3610 if (pci_channel_offline(pdev))
9026729b
AK		 3611 return;
3612
1da177e4
LT		 3613 spin_lock_irqsave(&adapter->stats_lock, flags);
3614
828d055f 3615 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3616 * called from the interrupt context, so they must only
3617 * be written while holding adapter->stats_lock
3618 */
3619
1dc32918
JP		 3620 adapter->stats.crcerrs += er32(CRCERRS);
3621 adapter->stats.gprc += er32(GPRC);
3622 adapter->stats.gorcl += er32(GORCL);
3623 adapter->stats.gorch += er32(GORCH);
3624 adapter->stats.bprc += er32(BPRC);
3625 adapter->stats.mprc += er32(MPRC);
3626 adapter->stats.roc += er32(ROC);
3627
1532ecea
JB		 3628 adapter->stats.prc64 += er32(PRC64);
3629 adapter->stats.prc127 += er32(PRC127);
3630 adapter->stats.prc255 += er32(PRC255);
3631 adapter->stats.prc511 += er32(PRC511);
3632 adapter->stats.prc1023 += er32(PRC1023);
3633 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3634
3635 adapter->stats.symerrs += er32(SYMERRS);
3636 adapter->stats.mpc += er32(MPC);
3637 adapter->stats.scc += er32(SCC);
3638 adapter->stats.ecol += er32(ECOL);
3639 adapter->stats.mcc += er32(MCC);
3640 adapter->stats.latecol += er32(LATECOL);
3641 adapter->stats.dc += er32(DC);
3642 adapter->stats.sec += er32(SEC);
3643 adapter->stats.rlec += er32(RLEC);
3644 adapter->stats.xonrxc += er32(XONRXC);
3645 adapter->stats.xontxc += er32(XONTXC);
3646 adapter->stats.xoffrxc += er32(XOFFRXC);
3647 adapter->stats.xofftxc += er32(XOFFTXC);
3648 adapter->stats.fcruc += er32(FCRUC);
3649 adapter->stats.gptc += er32(GPTC);
3650 adapter->stats.gotcl += er32(GOTCL);
3651 adapter->stats.gotch += er32(GOTCH);
3652 adapter->stats.rnbc += er32(RNBC);
3653 adapter->stats.ruc += er32(RUC);
3654 adapter->stats.rfc += er32(RFC);
3655 adapter->stats.rjc += er32(RJC);
3656 adapter->stats.torl += er32(TORL);
3657 adapter->stats.torh += er32(TORH);
3658 adapter->stats.totl += er32(TOTL);
3659 adapter->stats.toth += er32(TOTH);
3660 adapter->stats.tpr += er32(TPR);
3661
1532ecea
JB		 3662 adapter->stats.ptc64 += er32(PTC64);
3663 adapter->stats.ptc127 += er32(PTC127);
3664 adapter->stats.ptc255 += er32(PTC255);
3665 adapter->stats.ptc511 += er32(PTC511);
3666 adapter->stats.ptc1023 += er32(PTC1023);
3667 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3668
3669 adapter->stats.mptc += er32(MPTC);
3670 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3671
3672 /* used for adaptive IFS */
3673
1dc32918 3674 hw->tx_packet_delta = er32(TPT);
1da177e4 3675 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3676 hw->collision_delta = er32(COLC);
1da177e4
LT		 3677 adapter->stats.colc += hw->collision_delta;
3678
96838a40 3679 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3680 adapter->stats.algnerrc += er32(ALGNERRC);
3681 adapter->stats.rxerrc += er32(RXERRC);
3682 adapter->stats.tncrs += er32(TNCRS);
3683 adapter->stats.cexterr += er32(CEXTERR);
3684 adapter->stats.tsctc += er32(TSCTC);
3685 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3686 }
3687
3688 /* Fill out the OS statistics structure */
5fe31def
AK		 3689 netdev->stats.multicast = adapter->stats.mprc;
3690 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3691
3692 /* Rx Errors */
3693
87041639 3694 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3695 * our own version based on RUC and ROC
3696 */
5fe31def 3697 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3698 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3699 adapter->stats.ruc + adapter->stats.roc +
3700 adapter->stats.cexterr;
49559854 3701 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3702 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3703 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3704 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3705 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3706
3707 /* Tx Errors */
49559854 3708 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3709 netdev->stats.tx_errors = adapter->stats.txerrc;
3710 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3711 netdev->stats.tx_window_errors = adapter->stats.latecol;
3712 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3713 if (hw->bad_tx_carr_stats_fd &&
167fb284 3714 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3715 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3716 adapter->stats.tncrs = 0;
3717 }
1da177e4
LT		 3718
3719 /* Tx Dropped needs to be maintained elsewhere */
3720
3721 /* Phy Stats */
96838a40
JB		 3722 if (hw->media_type == e1000_media_type_copper) {
3723 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3724 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3725 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3726 adapter->phy_stats.idle_errors += phy_tmp;
3727 }
3728
96838a40 3729 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3730 (hw->phy_type == e1000_phy_m88) &&
3731 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3732 adapter->phy_stats.receive_errors += phy_tmp;
3733 }
3734
15e376b4 3735 /* Management Stats */
1dc32918
JP		 3736 if (hw->has_smbus) {
3737 adapter->stats.mgptc += er32(MGTPTC);
3738 adapter->stats.mgprc += er32(MGTPRC);
3739 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3740 }
3741
1da177e4
LT		 3742 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3743}
9ac98284 3744
1da177e4
LT		 3745/**
3746 * e1000_intr - Interrupt Handler
3747 * @irq: interrupt number
3748 * @data: pointer to a network interface device structure
1da177e4 3749 **/
64798845 3750static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3751{
3752 struct net_device *netdev = data;
60490fe0 3753 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3754 struct e1000_hw *hw = &adapter->hw;
1532ecea 3755 u32 icr = er32(ICR);
c3570acb 3756
4c11b8ad 3757 if (unlikely((!icr)))
835bb129
JB		 3758 return IRQ_NONE; /* Not our interrupt */
3759
6cfbd97b 3760 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3761 * read cleared it, and just in case the driver is
3762 * down there is nothing to do so return handled
3763 */
3764 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3765 return IRQ_HANDLED;
3766
96838a40 3767 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3768 hw->get_link_status = 1;
1314bbf3
AK		 3769 /* guard against interrupt when we're going down */
3770 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3771 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3772 }
3773
1532ecea
JB		 3774 /* disable interrupts, without the synchronize_irq bit */
3775 ew32(IMC, ~0);
3776 E1000_WRITE_FLUSH();
3777
288379f0 3778 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3779 adapter->total_tx_bytes = 0;
3780 adapter->total_tx_packets = 0;
3781 adapter->total_rx_bytes = 0;
3782 adapter->total_rx_packets = 0;
288379f0 3783 __napi_schedule(&adapter->napi);
a6c42322 3784 } else {
90fb5135 3785 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3786 * bug, but not a hard error, so enable ints and continue
3787 */
a6c42322
JB		 3788 if (!test_bit(__E1000_DOWN, &adapter->flags))
3789 e1000_irq_enable(adapter);
3790 }
1da177e4 3791
1da177e4
LT		 3792 return IRQ_HANDLED;
3793}
3794
1da177e4
LT		 3795/**
3796 * e1000_clean - NAPI Rx polling callback
3797 * @adapter: board private structure
3798 **/
64798845 3799static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3800{
6cfbd97b
JK		 3801 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3802 napi);
650b5a5c 3803 int tx_clean_complete = 0, work_done = 0;
581d708e 3804
650b5a5c 3805 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3806
650b5a5c 3807 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3808
650b5a5c 3809 if (!tx_clean_complete)
d2c7ddd6
DM		 3810 work_done = budget;
3811
53e52c72
DM		 3812 /* If budget not fully consumed, exit the polling mode */
3813 if (work_done < budget) {
835bb129
JB		 3814 if (likely(adapter->itr_setting & 3))
3815 e1000_set_itr(adapter);
288379f0 3816 napi_complete(napi);
a6c42322
JB		 3817 if (!test_bit(__E1000_DOWN, &adapter->flags))
3818 e1000_irq_enable(adapter);
1da177e4
LT		 3819 }
3820
bea3348e 3821 return work_done;
1da177e4
LT		 3822}
3823
1da177e4
LT		 3824/**
3825 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3826 * @adapter: board private structure
3827 **/
64798845
JP		 3828static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3829 struct e1000_tx_ring *tx_ring)
1da177e4 3830{
1dc32918 3831 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3832 struct net_device *netdev = adapter->netdev;
3833 struct e1000_tx_desc *tx_desc, *eop_desc;
580f321d 3834 struct e1000_tx_buffer *buffer_info;
1da177e4 3835 unsigned int i, eop;
2a1af5d7 3836 unsigned int count = 0;
835bb129 3837 unsigned int total_tx_bytes=0, total_tx_packets=0;
2f66fd36 3838 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3839
3840 i = tx_ring->next_to_clean;
3841 eop = tx_ring->buffer_info[i].next_to_watch;
3842 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3843
ccfb342c
AD		 3844 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3845 (count < tx_ring->count)) {
843f4267 3846 bool cleaned = false;
2d0bb1c1 3847 rmb(); /* read buffer_info after eop_desc */
843f4267 3848 for ( ; !cleaned; count++) {
1da177e4
LT		 3849 tx_desc = E1000_TX_DESC(*tx_ring, i);
3850 buffer_info = &tx_ring->buffer_info[i];
3851 cleaned = (i == eop);
3852
835bb129 3853 if (cleaned) {
31c15a2f
DN		 3854 total_tx_packets += buffer_info->segs;
3855 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3856 if (buffer_info->skb) {
3857 bytes_compl += buffer_info->skb->len;
3858 pkts_compl++;
3859 }
3860
835bb129 3861 }
fd803241 3862 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3863 tx_desc->upper.data = 0;
1da177e4 3864
96838a40 3865 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3866 }
581d708e 3867
1da177e4
LT		 3868 eop = tx_ring->buffer_info[i].next_to_watch;
3869 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3870 }
3871
3872 tx_ring->next_to_clean = i;
3873
2f66fd36
OESC		 3874 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3875
77b2aad5 3876#define TX_WAKE_THRESHOLD 32
843f4267 3877 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3878 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3879 /* Make sure that anybody stopping the queue after this
3880 * sees the new next_to_clean.
3881 */
3882 smp_mb();
cdd7549e
JB		 3883
3884 if (netif_queue_stopped(netdev) &&
3885 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3886 netif_wake_queue(netdev);
fcfb1224
JB		 3887 ++adapter->restart_queue;
3888 }
77b2aad5 3889 }
2648345f 3890
581d708e 3891 if (adapter->detect_tx_hung) {
2648345f 3892 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3893 * check with the clearing of time_stamp and movement of i
3894 */
c3033b01 3895 adapter->detect_tx_hung = false;
cdd7549e
JB		 3896 if (tx_ring->buffer_info[eop].time_stamp &&
3897 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3898 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3899 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3900
3901 /* detected Tx unit hang */
feb8f478 3902 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3903 " Tx Queue <%lu>\n"
3904 " TDH <%x>\n"
3905 " TDT <%x>\n"
3906 " next_to_use <%x>\n"
3907 " next_to_clean <%x>\n"
3908 "buffer_info[next_to_clean]\n"
3909 " time_stamp <%lx>\n"
3910 " next_to_watch <%x>\n"
3911 " jiffies <%lx>\n"
3912 " next_to_watch.status <%x>\n",
49a45a06 3913 (unsigned long)(tx_ring - adapter->tx_ring),
1dc32918
JP		 3914 readl(hw->hw_addr + tx_ring->tdh),
3915 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3916 tx_ring->next_to_use,
392137fa 3917 tx_ring->next_to_clean,
cdd7549e 3918 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3919 eop,
3920 jiffies,
3921 eop_desc->upper.fields.status);
b04e36ba 3922 e1000_dump(adapter);
1da177e4 3923 netif_stop_queue(netdev);
70b8f1e1 3924 }
1da177e4 3925 }
835bb129
JB		 3926 adapter->total_tx_bytes += total_tx_bytes;
3927 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3928 netdev->stats.tx_bytes += total_tx_bytes;
3929 netdev->stats.tx_packets += total_tx_packets;
807540ba 3930 return count < tx_ring->count;
1da177e4
LT		 3931}
3932
3933/**
3934 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3935 * @adapter: board private structure
3936 * @status_err: receive descriptor status and error fields
3937 * @csum: receive descriptor csum field
3938 * @sk_buff: socket buffer with received data
1da177e4 3939 **/
64798845
JP		 3940static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3941 u32 csum, struct sk_buff *skb)
1da177e4 3942{
1dc32918 3943 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3944 u16 status = (u16)status_err;
3945 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3946
3947 skb_checksum_none_assert(skb);
2d7edb92 3948
1da177e4 3949 /* 82543 or newer only */
1dc32918 3950 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3951 /* Ignore Checksum bit is set */
96838a40 3952 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3953 /* TCP/UDP checksum error bit is set */
96838a40 3954 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3955 /* let the stack verify checksum errors */
1da177e4 3956 adapter->hw_csum_err++;
2d7edb92
MC		 3957 return;
3958 }
3959 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3960 if (!(status & E1000_RXD_STAT_TCPCS))
3961 return;
3962
2d7edb92
MC		 3963 /* It must be a TCP or UDP packet with a valid checksum */
3964 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3965 /* TCP checksum is good */
3966 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3967 }
2d7edb92 3968 adapter->hw_csum_good++;
1da177e4
LT		 3969}
3970
edbbb3ca 3971/**
13809609 3972 * e1000_consume_page - helper function for jumbo Rx path
edbbb3ca 3973 **/
93f0afe9 3974static void e1000_consume_page(struct e1000_rx_buffer *bi, struct sk_buff *skb,
6cfbd97b 3975 u16 length)
edbbb3ca 3976{
13809609 3977 bi->rxbuf.page = NULL;
edbbb3ca
JB		 3978 skb->len += length;
3979 skb->data_len += length;
ed64b3cc 3980 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3981}
3982
3983/**
3984 * e1000_receive_skb - helper function to handle rx indications
3985 * @adapter: board private structure
3986 * @status: descriptor status field as written by hardware
3987 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3988 * @skb: pointer to sk_buff to be indicated to stack
3989 */
3990static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3991 __le16 vlan, struct sk_buff *skb)
3992{
6a08d194
JB		 3993 skb->protocol = eth_type_trans(skb, adapter->netdev);
3994
5622e404
JP		 3995 if (status & E1000_RXD_STAT_VP) {
3996 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
3997
86a9bad3 3998 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
5622e404
JP		 3999 }
4000 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4001}
4002
4f0aeb1e
FW		 4003/**
4004 * e1000_tbi_adjust_stats
4005 * @hw: Struct containing variables accessed by shared code
4006 * @frame_len: The length of the frame in question
4007 * @mac_addr: The Ethernet destination address of the frame in question
4008 *
4009 * Adjusts the statistic counters when a frame is accepted by TBI_ACCEPT
4010 */
4011static void e1000_tbi_adjust_stats(struct e1000_hw *hw,
4012 struct e1000_hw_stats *stats,
4013 u32 frame_len, const u8 *mac_addr)
4014{
4015 u64 carry_bit;
4016
4017 /* First adjust the frame length. */
4018 frame_len--;
4019 /* We need to adjust the statistics counters, since the hardware
4020 * counters overcount this packet as a CRC error and undercount
4021 * the packet as a good packet
4022 */
4023 /* This packet should not be counted as a CRC error. */
4024 stats->crcerrs--;
4025 /* This packet does count as a Good Packet Received. */
4026 stats->gprc++;
4027
4028 /* Adjust the Good Octets received counters */
4029 carry_bit = 0x80000000 & stats->gorcl;
4030 stats->gorcl += frame_len;
4031 /* If the high bit of Gorcl (the low 32 bits of the Good Octets
4032 * Received Count) was one before the addition,
4033 * AND it is zero after, then we lost the carry out,
4034 * need to add one to Gorch (Good Octets Received Count High).
4035 * This could be simplified if all environments supported
4036 * 64-bit integers.
4037 */
4038 if (carry_bit && ((stats->gorcl & 0x80000000) == 0))
4039 stats->gorch++;
4040 /* Is this a broadcast or multicast? Check broadcast first,
4041 * since the test for a multicast frame will test positive on
4042 * a broadcast frame.
4043 */
4044 if (is_broadcast_ether_addr(mac_addr))
4045 stats->bprc++;
4046 else if (is_multicast_ether_addr(mac_addr))
4047 stats->mprc++;
4048
4049 if (frame_len == hw->max_frame_size) {
4050 /* In this case, the hardware has overcounted the number of
4051 * oversize frames.
4052 */
4053 if (stats->roc > 0)
4054 stats->roc--;
4055 }
4056
4057 /* Adjust the bin counters when the extra byte put the frame in the
4058 * wrong bin. Remember that the frame_len was adjusted above.
4059 */
4060 if (frame_len == 64) {
4061 stats->prc64++;
4062 stats->prc127--;
4063 } else if (frame_len == 127) {
4064 stats->prc127++;
4065 stats->prc255--;
4066 } else if (frame_len == 255) {
4067 stats->prc255++;
4068 stats->prc511--;
4069 } else if (frame_len == 511) {
4070 stats->prc511++;
4071 stats->prc1023--;
4072 } else if (frame_len == 1023) {
4073 stats->prc1023++;
4074 stats->prc1522--;
4075 } else if (frame_len == 1522) {
4076 stats->prc1522++;
4077 }
4078}
4079
2037110c
FW		 4080static bool e1000_tbi_should_accept(struct e1000_adapter *adapter,
4081 u8 status, u8 errors,
4082 u32 length, const u8 *data)
4083{
4084 struct e1000_hw *hw = &adapter->hw;
4085 u8 last_byte = *(data + length - 1);
4086
4087 if (TBI_ACCEPT(hw, status, errors, length, last_byte)) {
4088 unsigned long irq_flags;
4089
4090 spin_lock_irqsave(&adapter->stats_lock, irq_flags);
4091 e1000_tbi_adjust_stats(hw, &adapter->stats, length, data);
4092 spin_unlock_irqrestore(&adapter->stats_lock, irq_flags);
4093
4094 return true;
4095 }
4096
4097 return false;
4098}
4099
2b294b18
FW		 4100static struct sk_buff *e1000_alloc_rx_skb(struct e1000_adapter *adapter,
4101 unsigned int bufsz)
4102{
67fd893e 4103 struct sk_buff *skb = napi_alloc_skb(&adapter->napi, bufsz);
2b294b18
FW		 4104
4105 if (unlikely(!skb))
4106 adapter->alloc_rx_buff_failed++;
4107 return skb;
4108}
4109
edbbb3ca
JB		 4110/**
4111 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4112 * @adapter: board private structure
4113 * @rx_ring: ring to clean
4114 * @work_done: amount of napi work completed this call
4115 * @work_to_do: max amount of work allowed for this call to do
4116 *
4117 * the return value indicates whether actual cleaning was done, there
4118 * is no guarantee that everything was cleaned
4119 */
4120static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4121 struct e1000_rx_ring *rx_ring,
4122 int *work_done, int work_to_do)
4123{
edbbb3ca
JB		 4124 struct net_device *netdev = adapter->netdev;
4125 struct pci_dev *pdev = adapter->pdev;
4126 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4127 struct e1000_rx_buffer *buffer_info, *next_buffer;
edbbb3ca
JB		 4128 u32 length;
4129 unsigned int i;
4130 int cleaned_count = 0;
4131 bool cleaned = false;
4132 unsigned int total_rx_bytes=0, total_rx_packets=0;
4133
4134 i = rx_ring->next_to_clean;
4135 rx_desc = E1000_RX_DESC(*rx_ring, i);
4136 buffer_info = &rx_ring->buffer_info[i];
4137
4138 while (rx_desc->status & E1000_RXD_STAT_DD) {
4139 struct sk_buff *skb;
4140 u8 status;
4141
4142 if (*work_done >= work_to_do)
4143 break;
4144 (*work_done)++;
2d0bb1c1 4145 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4146
4147 status = rx_desc->status;
edbbb3ca
JB		 4148
4149 if (++i == rx_ring->count) i = 0;
4150 next_rxd = E1000_RX_DESC(*rx_ring, i);
4151 prefetch(next_rxd);
4152
4153 next_buffer = &rx_ring->buffer_info[i];
4154
4155 cleaned = true;
4156 cleaned_count++;
b16f53be 4157 dma_unmap_page(&pdev->dev, buffer_info->dma,
93f0afe9 4158 adapter->rx_buffer_len, DMA_FROM_DEVICE);
edbbb3ca
JB		 4159 buffer_info->dma = 0;
4160
4161 length = le16_to_cpu(rx_desc->length);
4162
4163 /* errors is only valid for DD + EOP descriptors */
4164 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4165 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
13809609 4166 u8 *mapped = page_address(buffer_info->rxbuf.page);
2037110c
FW		 4167
4168 if (e1000_tbi_should_accept(adapter, status,
4169 rx_desc->errors,
4170 length, mapped)) {
edbbb3ca 4171 length--;
2037110c
FW		 4172 } else if (netdev->features & NETIF_F_RXALL) {
4173 goto process_skb;
edbbb3ca 4174 } else {
edbbb3ca 4175 /* an error means any chain goes out the window
6cfbd97b
JK		 4176 * too
4177 */
edbbb3ca
JB		 4178 if (rx_ring->rx_skb_top)
4179 dev_kfree_skb(rx_ring->rx_skb_top);
4180 rx_ring->rx_skb_top = NULL;
4181 goto next_desc;
4182 }
4183 }
4184
4185#define rxtop rx_ring->rx_skb_top
e825b731 4186process_skb:
edbbb3ca
JB		 4187 if (!(status & E1000_RXD_STAT_EOP)) {
4188 /* this descriptor is only the beginning (or middle) */
4189 if (!rxtop) {
4190 /* this is the beginning of a chain */
de591c78 4191 rxtop = napi_get_frags(&adapter->napi);
13809609
FW		 4192 if (!rxtop)
4193 break;
4194
4195 skb_fill_page_desc(rxtop, 0,
4196 buffer_info->rxbuf.page,
6cfbd97b 4197 0, length);
edbbb3ca
JB		 4198 } else {
4199 /* this is the middle of a chain */
4200 skb_fill_page_desc(rxtop,
4201 skb_shinfo(rxtop)->nr_frags,
13809609 4202 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4203 }
4204 e1000_consume_page(buffer_info, rxtop, length);
4205 goto next_desc;
4206 } else {
4207 if (rxtop) {
4208 /* end of the chain */
4209 skb_fill_page_desc(rxtop,
4210 skb_shinfo(rxtop)->nr_frags,
13809609 4211 buffer_info->rxbuf.page, 0, length);
edbbb3ca
JB		 4212 skb = rxtop;
4213 rxtop = NULL;
4214 e1000_consume_page(buffer_info, skb, length);
4215 } else {
13809609 4216 struct page *p;
edbbb3ca 4217 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4218 * copybreak to save the put_page/alloc_page
4219 */
13809609 4220 p = buffer_info->rxbuf.page;
de591c78 4221 if (length <= copybreak) {
edbbb3ca 4222 u8 *vaddr;
13809609 4223
de591c78
FW		 4224 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4225 length -= 4;
4226 skb = e1000_alloc_rx_skb(adapter,
4227 length);
4228 if (!skb)
4229 break;
4230
13809609 4231 vaddr = kmap_atomic(p);
6cfbd97b
JK		 4232 memcpy(skb_tail_pointer(skb), vaddr,
4233 length);
4679026d 4234 kunmap_atomic(vaddr);
edbbb3ca 4235 /* re-use the page, so don't erase
13809609 4236 * buffer_info->rxbuf.page
6cfbd97b 4237 */
edbbb3ca 4238 skb_put(skb, length);
de591c78
FW		 4239 e1000_rx_checksum(adapter,
4240 status | rx_desc->errors << 24,
4241 le16_to_cpu(rx_desc->csum), skb);
4242
4243 total_rx_bytes += skb->len;
4244 total_rx_packets++;
4245
4246 e1000_receive_skb(adapter, status,
4247 rx_desc->special, skb);
4248 goto next_desc;
edbbb3ca 4249 } else {
de591c78
FW		 4250 skb = napi_get_frags(&adapter->napi);
4251 if (!skb) {
4252 adapter->alloc_rx_buff_failed++;
4253 break;
4254 }
13809609 4255 skb_fill_page_desc(skb, 0, p, 0,
6cfbd97b 4256 length);
edbbb3ca 4257 e1000_consume_page(buffer_info, skb,
6cfbd97b 4258 length);
edbbb3ca
JB		 4259 }
4260 }
4261 }
4262
4263 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4264 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4265 (u32)(status) |
4266 ((u32)(rx_desc->errors) << 24),
4267 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4268
b0d1562c
BG		 4269 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4270 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4271 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4272 total_rx_packets++;
4273
de591c78
FW		 4274 if (status & E1000_RXD_STAT_VP) {
4275 __le16 vlan = rx_desc->special;
4276 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4277
4278 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
edbbb3ca
JB		 4279 }
4280
de591c78 4281 napi_gro_frags(&adapter->napi);
edbbb3ca
JB		 4282
4283next_desc:
4284 rx_desc->status = 0;
4285
4286 /* return some buffers to hardware, one at a time is too slow */
4287 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4288 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4289 cleaned_count = 0;
4290 }
4291
4292 /* use prefetched values */
4293 rx_desc = next_rxd;
4294 buffer_info = next_buffer;
4295 }
4296 rx_ring->next_to_clean = i;
4297
4298 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4299 if (cleaned_count)
4300 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4301
4302 adapter->total_rx_packets += total_rx_packets;
4303 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4304 netdev->stats.rx_bytes += total_rx_bytes;
4305 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4306 return cleaned;
4307}
4308
6cfbd97b 4309/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4310 * of reassembly being done in the stack
4311 */
2b294b18 4312static struct sk_buff *e1000_copybreak(struct e1000_adapter *adapter,
93f0afe9 4313 struct e1000_rx_buffer *buffer_info,
2b294b18 4314 u32 length, const void *data)
57bf6eef 4315{
2b294b18 4316 struct sk_buff *skb;
57bf6eef
JP		 4317
4318 if (length > copybreak)
2b294b18 4319 return NULL;
57bf6eef 4320
2b294b18
FW		 4321 skb = e1000_alloc_rx_skb(adapter, length);
4322 if (!skb)
4323 return NULL;
4324
4325 dma_sync_single_for_cpu(&adapter->pdev->dev, buffer_info->dma,
4326 length, DMA_FROM_DEVICE);
4327
4328 memcpy(skb_put(skb, length), data, length);
57bf6eef 4329
2b294b18 4330 return skb;
57bf6eef
JP		 4331}
4332
1da177e4 4333/**
2d7edb92 4334 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4335 * @adapter: board private structure
edbbb3ca
JB		 4336 * @rx_ring: ring to clean
4337 * @work_done: amount of napi work completed this call
4338 * @work_to_do: max amount of work allowed for this call to do
4339 */
64798845
JP		 4340static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4341 struct e1000_rx_ring *rx_ring,
4342 int *work_done, int work_to_do)
1da177e4 4343{
1da177e4
LT		 4344 struct net_device *netdev = adapter->netdev;
4345 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4346 struct e1000_rx_desc *rx_desc, *next_rxd;
93f0afe9 4347 struct e1000_rx_buffer *buffer_info, *next_buffer;
406874a7 4348 u32 length;
1da177e4 4349 unsigned int i;
72d64a43 4350 int cleaned_count = 0;
c3033b01 4351 bool cleaned = false;
835bb129 4352 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4353
4354 i = rx_ring->next_to_clean;
4355 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4356 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4357
b92ff8ee 4358 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4359 struct sk_buff *skb;
13809609 4360 u8 *data;
a292ca6e 4361 u8 status;
90fb5135 4362
96838a40 4363 if (*work_done >= work_to_do)
1da177e4
LT		 4364 break;
4365 (*work_done)++;
2d0bb1c1 4366 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4367
a292ca6e 4368 status = rx_desc->status;
2b294b18 4369 length = le16_to_cpu(rx_desc->length);
86c3d59f 4370
13809609
FW		 4371 data = buffer_info->rxbuf.data;
4372 prefetch(data);
4373 skb = e1000_copybreak(adapter, buffer_info, length, data);
2b294b18 4374 if (!skb) {
13809609
FW		 4375 unsigned int frag_len = e1000_frag_len(adapter);
4376
4377 skb = build_skb(data - E1000_HEADROOM, frag_len);
4378 if (!skb) {
4379 adapter->alloc_rx_buff_failed++;
4380 break;
4381 }
4382
4383 skb_reserve(skb, E1000_HEADROOM);
2b294b18 4384 dma_unmap_single(&pdev->dev, buffer_info->dma,
93f0afe9
FW		 4385 adapter->rx_buffer_len,
4386 DMA_FROM_DEVICE);
2b294b18 4387 buffer_info->dma = 0;
13809609 4388 buffer_info->rxbuf.data = NULL;
2b294b18 4389 }
30320be8 4390
86c3d59f
JB		 4391 if (++i == rx_ring->count) i = 0;
4392 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4393 prefetch(next_rxd);
4394
86c3d59f 4395 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4396
c3033b01 4397 cleaned = true;
72d64a43 4398 cleaned_count++;
1da177e4 4399
ea30e119 4400 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4401 * packet, if thats the case we need to toss it. In fact, we
4402 * to toss every packet with the EOP bit clear and the next
4403 * frame that _does_ have the EOP bit set, as it is by
4404 * definition only a frame fragment
4405 */
4406 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4407 adapter->discarding = true;
4408
4409 if (adapter->discarding) {
a1415ee6 4410 /* All receives must fit into a single buffer */
2037110c 4411 netdev_dbg(netdev, "Receive packet consumed multiple buffers\n");
2b294b18 4412 dev_kfree_skb(skb);
40a14dea
JB		 4413 if (status & E1000_RXD_STAT_EOP)
4414 adapter->discarding = false;
1da177e4
LT		 4415 goto next_desc;
4416 }
4417
96838a40 4418 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
2037110c
FW		 4419 if (e1000_tbi_should_accept(adapter, status,
4420 rx_desc->errors,
13809609 4421 length, data)) {
1da177e4 4422 length--;
2037110c
FW		 4423 } else if (netdev->features & NETIF_F_RXALL) {
4424 goto process_skb;
1da177e4 4425 } else {
2b294b18 4426 dev_kfree_skb(skb);
1da177e4
LT		 4427 goto next_desc;
4428 }
1cb5821f 4429 }
1da177e4 4430
e825b731 4431process_skb:
b0d1562c 4432 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4433 total_rx_packets++;
4434
b0d1562c
BG		 4435 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4436 /* adjust length to remove Ethernet CRC, this must be
4437 * done after the TBI_ACCEPT workaround above
4438 */
4439 length -= 4;
4440
13809609 4441 if (buffer_info->rxbuf.data == NULL)
2b294b18
FW		 4442 skb_put(skb, length);
4443 else /* copybreak skb */
4444 skb_trim(skb, length);
1da177e4
LT		 4445
4446 /* Receive Checksum Offload */
a292ca6e 4447 e1000_rx_checksum(adapter,
406874a7
JP		 4448 (u32)(status) |
4449 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4450 le16_to_cpu(rx_desc->csum), skb);
96838a40 4451
edbbb3ca 4452 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4453
1da177e4
LT		 4454next_desc:
4455 rx_desc->status = 0;
1da177e4 4456
72d64a43
JK		 4457 /* return some buffers to hardware, one at a time is too slow */
4458 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4459 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4460 cleaned_count = 0;
4461 }
4462
30320be8 4463 /* use prefetched values */
86c3d59f
JB		 4464 rx_desc = next_rxd;
4465 buffer_info = next_buffer;
1da177e4 4466 }
1da177e4 4467 rx_ring->next_to_clean = i;
72d64a43
JK		 4468
4469 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4470 if (cleaned_count)
4471 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4472
835bb129
JB		 4473 adapter->total_rx_packets += total_rx_packets;
4474 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4475 netdev->stats.rx_bytes += total_rx_bytes;
4476 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4477 return cleaned;
4478}
4479
edbbb3ca
JB		 4480/**
4481 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4482 * @adapter: address of board private structure
4483 * @rx_ring: pointer to receive ring structure
4484 * @cleaned_count: number of buffers to allocate this pass
4485 **/
edbbb3ca
JB		 4486static void
4487e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4488 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca 4489{
edbbb3ca
JB		 4490 struct pci_dev *pdev = adapter->pdev;
4491 struct e1000_rx_desc *rx_desc;
93f0afe9 4492 struct e1000_rx_buffer *buffer_info;
edbbb3ca 4493 unsigned int i;
edbbb3ca
JB		 4494
4495 i = rx_ring->next_to_use;
4496 buffer_info = &rx_ring->buffer_info[i];
4497
4498 while (cleaned_count--) {
edbbb3ca 4499 /* allocate a new page if necessary */
13809609
FW		 4500 if (!buffer_info->rxbuf.page) {
4501 buffer_info->rxbuf.page = alloc_page(GFP_ATOMIC);
4502 if (unlikely(!buffer_info->rxbuf.page)) {
edbbb3ca
JB		 4503 adapter->alloc_rx_buff_failed++;
4504 break;
4505 }
4506 }
4507
b5abb028 4508 if (!buffer_info->dma) {
b16f53be 4509 buffer_info->dma = dma_map_page(&pdev->dev,
13809609
FW		 4510 buffer_info->rxbuf.page, 0,
4511 adapter->rx_buffer_len,
b16f53be
NN		 4512 DMA_FROM_DEVICE);
4513 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
13809609
FW		 4514 put_page(buffer_info->rxbuf.page);
4515 buffer_info->rxbuf.page = NULL;
b5abb028
AB		 4516 buffer_info->dma = 0;
4517 adapter->alloc_rx_buff_failed++;
13809609 4518 break;
b5abb028
AB		 4519 }
4520 }
edbbb3ca
JB		 4521
4522 rx_desc = E1000_RX_DESC(*rx_ring, i);
4523 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4524
4525 if (unlikely(++i == rx_ring->count))
4526 i = 0;
4527 buffer_info = &rx_ring->buffer_info[i];
4528 }
4529
4530 if (likely(rx_ring->next_to_use != i)) {
4531 rx_ring->next_to_use = i;
4532 if (unlikely(i-- == 0))
4533 i = (rx_ring->count - 1);
4534
4535 /* Force memory writes to complete before letting h/w
4536 * know there are new descriptors to fetch. (Only
4537 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4538 * such as IA-64).
4539 */
edbbb3ca
JB		 4540 wmb();
4541 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4542 }
4543}
4544
1da177e4 4545/**
2d7edb92 4546 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4547 * @adapter: address of board private structure
4548 **/
64798845
JP		 4549static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4550 struct e1000_rx_ring *rx_ring,
4551 int cleaned_count)
1da177e4 4552{
1dc32918 4553 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4554 struct pci_dev *pdev = adapter->pdev;
4555 struct e1000_rx_desc *rx_desc;
93f0afe9 4556 struct e1000_rx_buffer *buffer_info;
2648345f 4557 unsigned int i;
89d71a66 4558 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4559
4560 i = rx_ring->next_to_use;
4561 buffer_info = &rx_ring->buffer_info[i];
4562
a292ca6e 4563 while (cleaned_count--) {
13809609
FW		 4564 void *data;
4565
4566 if (buffer_info->rxbuf.data)
2b294b18 4567 goto skip;
a292ca6e 4568
13809609
FW		 4569 data = e1000_alloc_frag(adapter);
4570 if (!data) {
1da177e4 4571 /* Better luck next round */
72d64a43 4572 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4573 break;
4574 }
4575
2648345f 4576 /* Fix for errata 23, can't cross 64kB boundary */
13809609
FW		 4577 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
4578 void *olddata = data;
feb8f478 4579 e_err(rx_err, "skb align check failed: %u bytes at "
13809609 4580 "%p\n", bufsz, data);
2648345f 4581 /* Try again, without freeing the previous */
13809609 4582 data = e1000_alloc_frag(adapter);
2648345f 4583 /* Failed allocation, critical failure */
13809609
FW		 4584 if (!data) {
4585 e1000_free_frag(olddata);
edbbb3ca 4586 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4587 break;
4588 }
2648345f 4589
13809609 4590 if (!e1000_check_64k_bound(adapter, data, bufsz)) {
1da177e4 4591 /* give up */
13809609
FW		 4592 e1000_free_frag(data);
4593 e1000_free_frag(olddata);
edbbb3ca 4594 adapter->alloc_rx_buff_failed++;
13809609 4595 break;
1da177e4 4596 }
ca6f7224
CH		 4597
4598 /* Use new allocation */
13809609 4599 e1000_free_frag(olddata);
1da177e4 4600 }
b16f53be 4601 buffer_info->dma = dma_map_single(&pdev->dev,
13809609 4602 data,
93f0afe9 4603 adapter->rx_buffer_len,
b16f53be
NN		 4604 DMA_FROM_DEVICE);
4605 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
13809609 4606 e1000_free_frag(data);
b5abb028
AB		 4607 buffer_info->dma = 0;
4608 adapter->alloc_rx_buff_failed++;
13809609 4609 break;
b5abb028 4610 }
1da177e4 4611
6cfbd97b 4612 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4613 * boundary crossing
4614 */
4615
2648345f
MC		 4616 /* Fix for errata 23, can't cross 64kB boundary */
4617 if (!e1000_check_64k_bound(adapter,
4618 (void *)(unsigned long)buffer_info->dma,
4619 adapter->rx_buffer_len)) {
feb8f478
ET		 4620 e_err(rx_err, "dma align check failed: %u bytes at "
4621 "%p\n", adapter->rx_buffer_len,
675ad473 4622 (void *)(unsigned long)buffer_info->dma);
1da177e4 4623
b16f53be 4624 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4625 adapter->rx_buffer_len,
b16f53be 4626 DMA_FROM_DEVICE);
13809609
FW		 4627
4628 e1000_free_frag(data);
4629 buffer_info->rxbuf.data = NULL;
679be3ba 4630 buffer_info->dma = 0;
1da177e4 4631
edbbb3ca 4632 adapter->alloc_rx_buff_failed++;
13809609 4633 break;
1da177e4 4634 }
13809609
FW		 4635 buffer_info->rxbuf.data = data;
4636 skip:
1da177e4
LT		 4637 rx_desc = E1000_RX_DESC(*rx_ring, i);
4638 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4639
96838a40
JB		 4640 if (unlikely(++i == rx_ring->count))
4641 i = 0;
1da177e4
LT		 4642 buffer_info = &rx_ring->buffer_info[i];
4643 }
4644
b92ff8ee
JB		 4645 if (likely(rx_ring->next_to_use != i)) {
4646 rx_ring->next_to_use = i;
4647 if (unlikely(i-- == 0))
4648 i = (rx_ring->count - 1);
4649
4650 /* Force memory writes to complete before letting h/w
4651 * know there are new descriptors to fetch. (Only
4652 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4653 * such as IA-64).
4654 */
b92ff8ee 4655 wmb();
1dc32918 4656 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4657 }
1da177e4
LT		 4658}
4659
4660/**
4661 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4662 * @adapter:
4663 **/
64798845 4664static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4665{
1dc32918 4666 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4667 u16 phy_status;
4668 u16 phy_ctrl;
1da177e4 4669
1dc32918
JP		 4670 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4671 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4672 return;
4673
96838a40 4674 if (adapter->smartspeed == 0) {
1da177e4 4675 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4676 * we assume back-to-back
4677 */
1dc32918 4678 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4679 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4680 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4681 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4682 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4683 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4684 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4685 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4686 phy_ctrl);
4687 adapter->smartspeed++;
1dc32918
JP		 4688 if (!e1000_phy_setup_autoneg(hw) &&
4689 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4690 &phy_ctrl)) {
1da177e4
LT		 4691 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4692 MII_CR_RESTART_AUTO_NEG);
1dc32918 4693 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4694 phy_ctrl);
4695 }
4696 }
4697 return;
96838a40 4698 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4699 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4700 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4701 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4702 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4703 if (!e1000_phy_setup_autoneg(hw) &&
4704 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4705 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4706 MII_CR_RESTART_AUTO_NEG);
1dc32918 4707 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4708 }
4709 }
4710 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4711 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4712 adapter->smartspeed = 0;
4713}
4714
4715/**
4716 * e1000_ioctl -
4717 * @netdev:
4718 * @ifreq:
4719 * @cmd:
4720 **/
64798845 4721static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4722{
4723 switch (cmd) {
4724 case SIOCGMIIPHY:
4725 case SIOCGMIIREG:
4726 case SIOCSMIIREG:
4727 return e1000_mii_ioctl(netdev, ifr, cmd);
4728 default:
4729 return -EOPNOTSUPP;
4730 }
4731}
4732
4733/**
4734 * e1000_mii_ioctl -
4735 * @netdev:
4736 * @ifreq:
4737 * @cmd:
4738 **/
64798845
JP		 4739static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4740 int cmd)
1da177e4 4741{
60490fe0 4742 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4743 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4744 struct mii_ioctl_data *data = if_mii(ifr);
4745 int retval;
406874a7 4746 u16 mii_reg;
97876fc6 4747 unsigned long flags;
1da177e4 4748
1dc32918 4749 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4750 return -EOPNOTSUPP;
4751
4752 switch (cmd) {
4753 case SIOCGMIIPHY:
1dc32918 4754 data->phy_id = hw->phy_addr;
1da177e4
LT		 4755 break;
4756 case SIOCGMIIREG:
97876fc6 4757 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4758 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4759 &data->val_out)) {
4760 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4761 return -EIO;
97876fc6
MC		 4762 }
4763 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4764 break;
4765 case SIOCSMIIREG:
96838a40 4766 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4767 return -EFAULT;
4768 mii_reg = data->val_in;
97876fc6 4769 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4770 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4771 mii_reg)) {
4772 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4773 return -EIO;
97876fc6 4774 }
f0163ac4 4775 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4776 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4777 switch (data->reg_num) {
4778 case PHY_CTRL:
96838a40 4779 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4780 break;
96838a40 4781 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4782 hw->autoneg = 1;
4783 hw->autoneg_advertised = 0x2F;
1da177e4 4784 } else {
14ad2513 4785 u32 speed;
1da177e4 4786 if (mii_reg & 0x40)
14ad2513 4787 speed = SPEED_1000;
1da177e4 4788 else if (mii_reg & 0x2000)
14ad2513 4789 speed = SPEED_100;
1da177e4 4790 else
14ad2513
DD		 4791 speed = SPEED_10;
4792 retval = e1000_set_spd_dplx(
4793 adapter, speed,
4794 ((mii_reg & 0x100)
4795 ? DUPLEX_FULL :
4796 DUPLEX_HALF));
f0163ac4 4797 if (retval)
1da177e4
LT		 4798 return retval;
4799 }
2db10a08
AK		 4800 if (netif_running(adapter->netdev))
4801 e1000_reinit_locked(adapter);
4802 else
1da177e4
LT		 4803 e1000_reset(adapter);
4804 break;
4805 case M88E1000_PHY_SPEC_CTRL:
4806 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4807 if (e1000_phy_reset(hw))
1da177e4
LT		 4808 return -EIO;
4809 break;
4810 }
4811 } else {
4812 switch (data->reg_num) {
4813 case PHY_CTRL:
96838a40 4814 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4815 break;
2db10a08
AK		 4816 if (netif_running(adapter->netdev))
4817 e1000_reinit_locked(adapter);
4818 else
1da177e4
LT		 4819 e1000_reset(adapter);
4820 break;
4821 }
4822 }
4823 break;
4824 default:
4825 return -EOPNOTSUPP;
4826 }
4827 return E1000_SUCCESS;
4828}
4829
64798845 4830void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4831{
4832 struct e1000_adapter *adapter = hw->back;
2648345f 4833 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4834
96838a40 4835 if (ret_val)
feb8f478 4836 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4837}
4838
64798845 4839void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4840{
4841 struct e1000_adapter *adapter = hw->back;
4842
4843 pci_clear_mwi(adapter->pdev);
4844}
4845
64798845 4846int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4847{
4848 struct e1000_adapter *adapter = hw->back;
4849 return pcix_get_mmrbc(adapter->pdev);
4850}
4851
64798845 4852void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4853{
4854 struct e1000_adapter *adapter = hw->back;
4855 pcix_set_mmrbc(adapter->pdev, mmrbc);
4856}
4857
64798845 4858void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4859{
4860 outl(value, port);
4861}
4862
5622e404
JP		 4863static bool e1000_vlan_used(struct e1000_adapter *adapter)
4864{
4865 u16 vid;
4866
4867 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4868 return true;
4869 return false;
4870}
4871
52f5509f
JP		 4872static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4873 netdev_features_t features)
4874{
4875 struct e1000_hw *hw = &adapter->hw;
4876 u32 ctrl;
4877
4878 ctrl = er32(CTRL);
f646968f 4879 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4880 /* enable VLAN tag insert/strip */
4881 ctrl |= E1000_CTRL_VME;
4882 } else {
4883 /* disable VLAN tag insert/strip */
4884 ctrl &= ~E1000_CTRL_VME;
4885 }
4886 ew32(CTRL, ctrl);
4887}
5622e404
JP		 4888static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4889 bool filter_on)
1da177e4 4890{
1dc32918 4891 struct e1000_hw *hw = &adapter->hw;
5622e404 4892 u32 rctl;
1da177e4 4893
9150b76a
JB		 4894 if (!test_bit(__E1000_DOWN, &adapter->flags))
4895 e1000_irq_disable(adapter);
1da177e4 4896
52f5509f 4897 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4898 if (filter_on) {
1532ecea
JB		 4899 /* enable VLAN receive filtering */
4900 rctl = er32(RCTL);
4901 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4902 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4903 rctl |= E1000_RCTL_VFE;
4904 ew32(RCTL, rctl);
4905 e1000_update_mng_vlan(adapter);
1da177e4 4906 } else {
1532ecea
JB		 4907 /* disable VLAN receive filtering */
4908 rctl = er32(RCTL);
4909 rctl &= ~E1000_RCTL_VFE;
4910 ew32(RCTL, rctl);
5622e404 4911 }
fd38d7a0 4912
5622e404
JP		 4913 if (!test_bit(__E1000_DOWN, &adapter->flags))
4914 e1000_irq_enable(adapter);
4915}
4916
c8f44aff 4917static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4918 netdev_features_t features)
5622e404
JP		 4919{
4920 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4921
4922 if (!test_bit(__E1000_DOWN, &adapter->flags))
4923 e1000_irq_disable(adapter);
4924
52f5509f 4925 __e1000_vlan_mode(adapter, features);
1da177e4 4926
9150b76a
JB		 4927 if (!test_bit(__E1000_DOWN, &adapter->flags))
4928 e1000_irq_enable(adapter);
1da177e4
LT		 4929}
4930
80d5c368
PM		 4931static int e1000_vlan_rx_add_vid(struct net_device *netdev,
4932 __be16 proto, u16 vid)
1da177e4 4933{
60490fe0 4934 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4935 struct e1000_hw *hw = &adapter->hw;
406874a7 4936 u32 vfta, index;
96838a40 4937
1dc32918 4938 if ((hw->mng_cookie.status &
96838a40
JB		 4939 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4940 (vid == adapter->mng_vlan_id))
8e586137 4941 return 0;
5622e404
JP		 4942
4943 if (!e1000_vlan_used(adapter))
4944 e1000_vlan_filter_on_off(adapter, true);
4945
1da177e4
LT		 4946 /* add VID to filter table */
4947 index = (vid >> 5) & 0x7F;
1dc32918 4948 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4949 vfta |= (1 << (vid & 0x1F));
1dc32918 4950 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4951
4952 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4953
4954 return 0;
1da177e4
LT		 4955}
4956
80d5c368
PM		 4957static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
4958 __be16 proto, u16 vid)
1da177e4 4959{
60490fe0 4960 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4961 struct e1000_hw *hw = &adapter->hw;
406874a7 4962 u32 vfta, index;
1da177e4 4963
9150b76a
JB		 4964 if (!test_bit(__E1000_DOWN, &adapter->flags))
4965 e1000_irq_disable(adapter);
9150b76a
JB		 4966 if (!test_bit(__E1000_DOWN, &adapter->flags))
4967 e1000_irq_enable(adapter);
1da177e4
LT		 4968
4969 /* remove VID from filter table */
4970 index = (vid >> 5) & 0x7F;
1dc32918 4971 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4972 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4973 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4974
4975 clear_bit(vid, adapter->active_vlans);
4976
4977 if (!e1000_vlan_used(adapter))
4978 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4979
4980 return 0;
1da177e4
LT		 4981}
4982
64798845 4983static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4984{
5622e404 4985 u16 vid;
1da177e4 4986
5622e404
JP		 4987 if (!e1000_vlan_used(adapter))
4988 return;
4989
4990 e1000_vlan_filter_on_off(adapter, true);
4991 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
80d5c368 4992 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
1da177e4
LT		 4993}
4994
14ad2513 4995int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4996{
1dc32918
JP		 4997 struct e1000_hw *hw = &adapter->hw;
4998
4999 hw->autoneg = 0;
1da177e4 5000
14ad2513 5001 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 5002 * for the switch() below to work
5003 */
14ad2513
DD		 5004 if ((spd & 1) || (dplx & ~1))
5005 goto err_inval;
5006
6921368f 5007 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 5008 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 5009 spd != SPEED_1000 &&
5010 dplx != DUPLEX_FULL)
5011 goto err_inval;
6921368f 5012
14ad2513 5013 switch (spd + dplx) {
1da177e4 5014 case SPEED_10 + DUPLEX_HALF:
1dc32918 5015 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 5016 break;
5017 case SPEED_10 + DUPLEX_FULL:
1dc32918 5018 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 5019 break;
5020 case SPEED_100 + DUPLEX_HALF:
1dc32918 5021 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 5022 break;
5023 case SPEED_100 + DUPLEX_FULL:
1dc32918 5024 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 5025 break;
5026 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 5027 hw->autoneg = 1;
5028 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 5029 break;
5030 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5031 default:
14ad2513 5032 goto err_inval;
1da177e4 5033 }
c819bbd5
JB		 5034
5035 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
5036 hw->mdix = AUTO_ALL_MODES;
5037
1da177e4 5038 return 0;
14ad2513
DD		 5039
5040err_inval:
5041 e_err(probe, "Unsupported Speed/Duplex configuration\n");
5042 return -EINVAL;
1da177e4
LT		 5043}
5044
b43fcd7d 5045static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 5046{
5047 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5048 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5049 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 5050 u32 ctrl, ctrl_ext, rctl, status;
5051 u32 wufc = adapter->wol;
6fdfef16 5052#ifdef CONFIG_PM
240b1710 5053 int retval = 0;
6fdfef16 5054#endif
1da177e4
LT		 5055
5056 netif_device_detach(netdev);
5057
2db10a08 5058 if (netif_running(netdev)) {
6a7d64e3 5059 int count = E1000_CHECK_RESET_COUNT;
5060
5061 while (test_bit(__E1000_RESETTING, &adapter->flags) && count--)
5062 usleep_range(10000, 20000);
5063
2db10a08 5064 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5065 e1000_down(adapter);
2db10a08 5066 }
1da177e4 5067
2f82665f 5068#ifdef CONFIG_PM
1d33e9c6 5069 retval = pci_save_state(pdev);
3a3847e0 5070 if (retval)
2f82665f
JB		 5071 return retval;
5072#endif
5073
1dc32918 5074 status = er32(STATUS);
96838a40 5075 if (status & E1000_STATUS_LU)
1da177e4
LT		 5076 wufc &= ~E1000_WUFC_LNKC;
5077
96838a40 5078 if (wufc) {
1da177e4 5079 e1000_setup_rctl(adapter);
db0ce50d 5080 e1000_set_rx_mode(netdev);
1da177e4 5081
b868179c
DN		 5082 rctl = er32(RCTL);
5083
1da177e4 5084 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 5085 if (wufc & E1000_WUFC_MC)
1da177e4 5086 rctl |= E1000_RCTL_MPE;
b868179c
DN		 5087
5088 /* enable receives in the hardware */
5089 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 5090
1dc32918
JP		 5091 if (hw->mac_type >= e1000_82540) {
5092 ctrl = er32(CTRL);
1da177e4
LT		 5093 /* advertise wake from D3Cold */
5094 #define E1000_CTRL_ADVD3WUC 0x00100000
5095 /* phy power management enable */
5096 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5097 ctrl |= E1000_CTRL_ADVD3WUC |
5098 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5099 ew32(CTRL, ctrl);
1da177e4
LT		 5100 }
5101
1dc32918 5102 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5103 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5104 /* keep the laser running in D3 */
1dc32918 5105 ctrl_ext = er32(CTRL_EXT);
1da177e4 5106 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5107 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5108 }
5109
1dc32918
JP		 5110 ew32(WUC, E1000_WUC_PME_EN);
5111 ew32(WUFC, wufc);
1da177e4 5112 } else {
1dc32918
JP		 5113 ew32(WUC, 0);
5114 ew32(WUFC, 0);
1da177e4
LT		 5115 }
5116
0fccd0e9
JG		 5117 e1000_release_manageability(adapter);
5118
b43fcd7d
RW		 5119 *enable_wake = !!wufc;
5120
0fccd0e9 5121 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5122 if (adapter->en_mng_pt)
5123 *enable_wake = true;
1da177e4 5124
edd106fc
AK		 5125 if (netif_running(netdev))
5126 e1000_free_irq(adapter);
5127
1da177e4 5128 pci_disable_device(pdev);
240b1710 5129
1da177e4
LT		 5130 return 0;
5131}
5132
2f82665f 5133#ifdef CONFIG_PM
b43fcd7d
RW		 5134static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5135{
5136 int retval;
5137 bool wake;
5138
5139 retval = __e1000_shutdown(pdev, &wake);
5140 if (retval)
5141 return retval;
5142
5143 if (wake) {
5144 pci_prepare_to_sleep(pdev);
5145 } else {
5146 pci_wake_from_d3(pdev, false);
5147 pci_set_power_state(pdev, PCI_D3hot);
5148 }
5149
5150 return 0;
5151}
5152
64798845 5153static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5154{
5155 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5156 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5157 struct e1000_hw *hw = &adapter->hw;
406874a7 5158 u32 err;
1da177e4 5159
d0e027db 5160 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5161 pci_restore_state(pdev);
dbb5aaeb 5162 pci_save_state(pdev);
81250297
TI		 5163
5164 if (adapter->need_ioport)
5165 err = pci_enable_device(pdev);
5166 else
5167 err = pci_enable_device_mem(pdev);
c7be73bc 5168 if (err) {
675ad473 5169 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5170 return err;
5171 }
a4cb847d 5172 pci_set_master(pdev);
1da177e4 5173
d0e027db
AK		 5174 pci_enable_wake(pdev, PCI_D3hot, 0);
5175 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5176
c7be73bc
JP		 5177 if (netif_running(netdev)) {
5178 err = e1000_request_irq(adapter);
5179 if (err)
5180 return err;
5181 }
edd106fc
AK		 5182
5183 e1000_power_up_phy(adapter);
1da177e4 5184 e1000_reset(adapter);
1dc32918 5185 ew32(WUS, ~0);
1da177e4 5186
0fccd0e9
JG		 5187 e1000_init_manageability(adapter);
5188
96838a40 5189 if (netif_running(netdev))
1da177e4
LT		 5190 e1000_up(adapter);
5191
5192 netif_device_attach(netdev);
5193
1da177e4
LT		 5194 return 0;
5195}
5196#endif
c653e635
AK		 5197
5198static void e1000_shutdown(struct pci_dev *pdev)
5199{
b43fcd7d
RW		 5200 bool wake;
5201
5202 __e1000_shutdown(pdev, &wake);
5203
5204 if (system_state == SYSTEM_POWER_OFF) {
5205 pci_wake_from_d3(pdev, wake);
5206 pci_set_power_state(pdev, PCI_D3hot);
5207 }
c653e635
AK		 5208}
5209
1da177e4 5210#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5211/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5212 * without having to re-enable interrupts. It's not called while
5213 * the interrupt routine is executing.
5214 */
64798845 5215static void e1000_netpoll(struct net_device *netdev)
1da177e4 5216{
60490fe0 5217 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5218
1da177e4 5219 disable_irq(adapter->pdev->irq);
7d12e780 5220 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5221 enable_irq(adapter->pdev->irq);
5222}
5223#endif
5224
9026729b
AK		 5225/**
5226 * e1000_io_error_detected - called when PCI error is detected
5227 * @pdev: Pointer to PCI device
120a5d0d 5228 * @state: The current pci connection state
9026729b
AK		 5229 *
5230 * This function is called after a PCI bus error affecting
5231 * this device has been detected.
5232 */
64798845
JP		 5233static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5234 pci_channel_state_t state)
9026729b
AK		 5235{
5236 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5237 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5238
5239 netif_device_detach(netdev);
5240
eab63302
AD		 5241 if (state == pci_channel_io_perm_failure)
5242 return PCI_ERS_RESULT_DISCONNECT;
5243
9026729b
AK		 5244 if (netif_running(netdev))
5245 e1000_down(adapter);
72e8d6bb 5246 pci_disable_device(pdev);
9026729b
AK		 5247
5248 /* Request a slot slot reset. */
5249 return PCI_ERS_RESULT_NEED_RESET;
5250}
5251
5252/**
5253 * e1000_io_slot_reset - called after the pci bus has been reset.
5254 * @pdev: Pointer to PCI device
5255 *
5256 * Restart the card from scratch, as if from a cold-boot. Implementation
5257 * resembles the first-half of the e1000_resume routine.
5258 */
5259static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5260{
5261 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5262 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5263 struct e1000_hw *hw = &adapter->hw;
81250297 5264 int err;
9026729b 5265
81250297
TI		 5266 if (adapter->need_ioport)
5267 err = pci_enable_device(pdev);
5268 else
5269 err = pci_enable_device_mem(pdev);
5270 if (err) {
675ad473 5271 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5272 return PCI_ERS_RESULT_DISCONNECT;
5273 }
5274 pci_set_master(pdev);
5275
dbf38c94
LV		 5276 pci_enable_wake(pdev, PCI_D3hot, 0);
5277 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5278
9026729b 5279 e1000_reset(adapter);
1dc32918 5280 ew32(WUS, ~0);
9026729b
AK		 5281
5282 return PCI_ERS_RESULT_RECOVERED;
5283}
5284
5285/**
5286 * e1000_io_resume - called when traffic can start flowing again.
5287 * @pdev: Pointer to PCI device
5288 *
5289 * This callback is called when the error recovery driver tells us that
5290 * its OK to resume normal operation. Implementation resembles the
5291 * second-half of the e1000_resume routine.
5292 */
5293static void e1000_io_resume(struct pci_dev *pdev)
5294{
5295 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5296 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5297
5298 e1000_init_manageability(adapter);
9026729b
AK		 5299
5300 if (netif_running(netdev)) {
5301 if (e1000_up(adapter)) {
675ad473 5302 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5303 return;
5304 }
5305 }
5306
5307 netif_device_attach(netdev);
9026729b
AK		 5308}
5309
1da177e4 5310/* e1000_main.c */
Linux kernel - Deliverables
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