projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
net: vlan: rename NETIF_F_HW_VLAN_* feature flags to NETIF_F_HW_VLAN_CTAG_*
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
5377a416 31#include <linux/io.h>
70c71606 32#include <linux/prefetch.h>
5622e404
JP		 33#include <linux/bitops.h>
34#include <linux/if_vlan.h>
5377a416 35
1da177e4 36char e1000_driver_name[] = "e1000";
3ad2cc67 37static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
ab08853f 38#define DRV_VERSION "7.3.21-k8-NAPI"
abec42a4
SH		 39const char e1000_driver_version[] = DRV_VERSION;
40static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 41
42/* e1000_pci_tbl - PCI Device ID Table
43 *
44 * Last entry must be all 0s
45 *
46 * Macro expands to...
47 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
48 */
a3aa1884 49static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
1da177e4
LT		 50 INTEL_E1000_ETHERNET_DEVICE(0x1000),
51 INTEL_E1000_ETHERNET_DEVICE(0x1001),
52 INTEL_E1000_ETHERNET_DEVICE(0x1004),
53 INTEL_E1000_ETHERNET_DEVICE(0x1008),
54 INTEL_E1000_ETHERNET_DEVICE(0x1009),
55 INTEL_E1000_ETHERNET_DEVICE(0x100C),
56 INTEL_E1000_ETHERNET_DEVICE(0x100D),
57 INTEL_E1000_ETHERNET_DEVICE(0x100E),
58 INTEL_E1000_ETHERNET_DEVICE(0x100F),
59 INTEL_E1000_ETHERNET_DEVICE(0x1010),
60 INTEL_E1000_ETHERNET_DEVICE(0x1011),
61 INTEL_E1000_ETHERNET_DEVICE(0x1012),
62 INTEL_E1000_ETHERNET_DEVICE(0x1013),
63 INTEL_E1000_ETHERNET_DEVICE(0x1014),
64 INTEL_E1000_ETHERNET_DEVICE(0x1015),
65 INTEL_E1000_ETHERNET_DEVICE(0x1016),
66 INTEL_E1000_ETHERNET_DEVICE(0x1017),
67 INTEL_E1000_ETHERNET_DEVICE(0x1018),
68 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 69 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 70 INTEL_E1000_ETHERNET_DEVICE(0x101D),
71 INTEL_E1000_ETHERNET_DEVICE(0x101E),
72 INTEL_E1000_ETHERNET_DEVICE(0x1026),
73 INTEL_E1000_ETHERNET_DEVICE(0x1027),
74 INTEL_E1000_ETHERNET_DEVICE(0x1028),
75 INTEL_E1000_ETHERNET_DEVICE(0x1075),
76 INTEL_E1000_ETHERNET_DEVICE(0x1076),
77 INTEL_E1000_ETHERNET_DEVICE(0x1077),
78 INTEL_E1000_ETHERNET_DEVICE(0x1078),
79 INTEL_E1000_ETHERNET_DEVICE(0x1079),
80 INTEL_E1000_ETHERNET_DEVICE(0x107A),
81 INTEL_E1000_ETHERNET_DEVICE(0x107B),
82 INTEL_E1000_ETHERNET_DEVICE(0x107C),
83 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 84 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 85 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
5377a416 86 INTEL_E1000_ETHERNET_DEVICE(0x2E6E),
1da177e4
LT		 87 /* required last entry */
88 {0,}
89};
90
91MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
92
35574764
NN		 93int e1000_up(struct e1000_adapter *adapter);
94void e1000_down(struct e1000_adapter *adapter);
95void e1000_reinit_locked(struct e1000_adapter *adapter);
96void e1000_reset(struct e1000_adapter *adapter);
35574764
NN		 97int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
98int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
99void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
100void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 101static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *txdr);
3ad2cc67 103static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 104 struct e1000_rx_ring *rxdr);
3ad2cc67 105static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 106 struct e1000_tx_ring *tx_ring);
3ad2cc67 107static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 108 struct e1000_rx_ring *rx_ring);
109void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 110
111static int e1000_init_module(void);
112static void e1000_exit_module(void);
113static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
9f9a12f8 114static void e1000_remove(struct pci_dev *pdev);
581d708e 115static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 116static int e1000_sw_init(struct e1000_adapter *adapter);
117static int e1000_open(struct net_device *netdev);
118static int e1000_close(struct net_device *netdev);
119static void e1000_configure_tx(struct e1000_adapter *adapter);
120static void e1000_configure_rx(struct e1000_adapter *adapter);
121static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 122static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
124static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
125 struct e1000_tx_ring *tx_ring);
126static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
127 struct e1000_rx_ring *rx_ring);
db0ce50d 128static void e1000_set_rx_mode(struct net_device *netdev);
5cf42fcd 129static void e1000_update_phy_info_task(struct work_struct *work);
a4010afe 130static void e1000_watchdog(struct work_struct *work);
5cf42fcd 131static void e1000_82547_tx_fifo_stall_task(struct work_struct *work);
3b29a56d
SH		 132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
133 struct net_device *netdev);
1da177e4
LT		 134static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
135static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
136static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 137static irqreturn_t e1000_intr(int irq, void *data);
c3033b01
JP		 138static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
139 struct e1000_tx_ring *tx_ring);
bea3348e 140static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 141static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
142 struct e1000_rx_ring *rx_ring,
143 int *work_done, int work_to_do);
edbbb3ca
JB		 144static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
145 struct e1000_rx_ring *rx_ring,
146 int *work_done, int work_to_do);
581d708e 147static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
edbbb3ca 148 struct e1000_rx_ring *rx_ring,
72d64a43 149 int cleaned_count);
edbbb3ca
JB		 150static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
151 struct e1000_rx_ring *rx_ring,
152 int cleaned_count);
1da177e4
LT		 153static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
154static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
155 int cmd);
1da177e4
LT		 156static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
157static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
158static void e1000_tx_timeout(struct net_device *dev);
65f27f38 159static void e1000_reset_task(struct work_struct *work);
1da177e4 160static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 161static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
162 struct sk_buff *skb);
1da177e4 163
5622e404 164static bool e1000_vlan_used(struct e1000_adapter *adapter);
c8f44aff
MM		 165static void e1000_vlan_mode(struct net_device *netdev,
166 netdev_features_t features);
52f5509f
JP		 167static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
168 bool filter_on);
8e586137
JP		 169static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
170static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 171static void e1000_restore_vlan(struct e1000_adapter *adapter);
172
6fdfef16 173#ifdef CONFIG_PM
b43fcd7d 174static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 175static int e1000_resume(struct pci_dev *pdev);
176#endif
c653e635 177static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 178
179#ifdef CONFIG_NET_POLL_CONTROLLER
180/* for netdump / net console */
181static void e1000_netpoll (struct net_device *netdev);
182#endif
183
1f753861
JB		 184#define COPYBREAK_DEFAULT 256
185static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
186module_param(copybreak, uint, 0644);
187MODULE_PARM_DESC(copybreak,
188 "Maximum size of packet that is copied to a new buffer on receive");
189
9026729b
AK		 190static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
191 pci_channel_state_t state);
192static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
193static void e1000_io_resume(struct pci_dev *pdev);
194
3646f0e5 195static const struct pci_error_handlers e1000_err_handler = {
9026729b
AK		 196 .error_detected = e1000_io_error_detected,
197 .slot_reset = e1000_io_slot_reset,
198 .resume = e1000_io_resume,
199};
24025e4e 200
1da177e4
LT		 201static struct pci_driver e1000_driver = {
202 .name = e1000_driver_name,
203 .id_table = e1000_pci_tbl,
204 .probe = e1000_probe,
9f9a12f8 205 .remove = e1000_remove,
c4e24f01 206#ifdef CONFIG_PM
25985edc 207 /* Power Management Hooks */
1da177e4 208 .suspend = e1000_suspend,
c653e635 209 .resume = e1000_resume,
1da177e4 210#endif
9026729b
AK		 211 .shutdown = e1000_shutdown,
212 .err_handler = &e1000_err_handler
1da177e4
LT		 213};
214
215MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
216MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
217MODULE_LICENSE("GPL");
218MODULE_VERSION(DRV_VERSION);
219
b3f4d599 220#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
221static int debug = -1;
1da177e4
LT		 222module_param(debug, int, 0);
223MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
224
675ad473
ET		 225/**
226 * e1000_get_hw_dev - return device
227 * used by hardware layer to print debugging information
228 *
229 **/
230struct net_device *e1000_get_hw_dev(struct e1000_hw *hw)
231{
232 struct e1000_adapter *adapter = hw->back;
233 return adapter->netdev;
234}
235
1da177e4
LT		 236/**
237 * e1000_init_module - Driver Registration Routine
238 *
239 * e1000_init_module is the first routine called when the driver is
240 * loaded. All it does is register with the PCI subsystem.
241 **/
64798845 242static int __init e1000_init_module(void)
1da177e4
LT		 243{
244 int ret;
675ad473 245 pr_info("%s - version %s\n", e1000_driver_string, e1000_driver_version);
1da177e4 246
675ad473 247 pr_info("%s\n", e1000_copyright);
1da177e4 248
29917620 249 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 250 if (copybreak != COPYBREAK_DEFAULT) {
251 if (copybreak == 0)
675ad473 252 pr_info("copybreak disabled\n");
1f753861 253 else
675ad473
ET		 254 pr_info("copybreak enabled for "
255 "packets <= %u bytes\n", copybreak);
1f753861 256 }
1da177e4
LT		 257 return ret;
258}
259
260module_init(e1000_init_module);
261
262/**
263 * e1000_exit_module - Driver Exit Cleanup Routine
264 *
265 * e1000_exit_module is called just before the driver is removed
266 * from memory.
267 **/
64798845 268static void __exit e1000_exit_module(void)
1da177e4 269{
1da177e4
LT		 270 pci_unregister_driver(&e1000_driver);
271}
272
273module_exit(e1000_exit_module);
274
2db10a08
AK		 275static int e1000_request_irq(struct e1000_adapter *adapter)
276{
277 struct net_device *netdev = adapter->netdev;
3e18826c 278 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 279 int irq_flags = IRQF_SHARED;
280 int err;
2db10a08 281
e94bd23f
AK		 282 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
283 netdev);
284 if (err) {
feb8f478 285 e_err(probe, "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 286 }
2db10a08
AK		 287
288 return err;
289}
290
291static void e1000_free_irq(struct e1000_adapter *adapter)
292{
293 struct net_device *netdev = adapter->netdev;
294
295 free_irq(adapter->pdev->irq, netdev);
2db10a08
AK		 296}
297
1da177e4
LT		 298/**
299 * e1000_irq_disable - Mask off interrupt generation on the NIC
300 * @adapter: board private structure
301 **/
64798845 302static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 303{
1dc32918
JP		 304 struct e1000_hw *hw = &adapter->hw;
305
306 ew32(IMC, ~0);
307 E1000_WRITE_FLUSH();
1da177e4
LT		 308 synchronize_irq(adapter->pdev->irq);
309}
310
311/**
312 * e1000_irq_enable - Enable default interrupt generation settings
313 * @adapter: board private structure
314 **/
64798845 315static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 316{
1dc32918
JP		 317 struct e1000_hw *hw = &adapter->hw;
318
319 ew32(IMS, IMS_ENABLE_MASK);
320 E1000_WRITE_FLUSH();
1da177e4 321}
3ad2cc67 322
64798845 323static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 324{
1dc32918 325 struct e1000_hw *hw = &adapter->hw;
2d7edb92 326 struct net_device *netdev = adapter->netdev;
1dc32918 327 u16 vid = hw->mng_cookie.vlan_id;
406874a7 328 u16 old_vid = adapter->mng_vlan_id;
96838a40 329
5622e404
JP		 330 if (!e1000_vlan_used(adapter))
331 return;
332
333 if (!test_bit(vid, adapter->active_vlans)) {
334 if (hw->mng_cookie.status &
335 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
336 e1000_vlan_rx_add_vid(netdev, vid);
c5f226fe 337 adapter->mng_vlan_id = vid;
5622e404
JP		 338 } else {
339 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
340 }
341 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
342 (vid != old_vid) &&
343 !test_bit(old_vid, adapter->active_vlans))
344 e1000_vlan_rx_kill_vid(netdev, old_vid);
345 } else {
346 adapter->mng_vlan_id = vid;
2d7edb92
MC		 347 }
348}
b55ccb35 349
64798845 350static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 351{
1dc32918
JP		 352 struct e1000_hw *hw = &adapter->hw;
353
0fccd0e9 354 if (adapter->en_mng_pt) {
1dc32918 355 u32 manc = er32(MANC);
0fccd0e9
JG		 356
357 /* disable hardware interception of ARP */
358 manc &= ~(E1000_MANC_ARP_EN);
359
1dc32918 360 ew32(MANC, manc);
0fccd0e9
JG		 361 }
362}
363
64798845 364static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 365{
1dc32918
JP		 366 struct e1000_hw *hw = &adapter->hw;
367
0fccd0e9 368 if (adapter->en_mng_pt) {
1dc32918 369 u32 manc = er32(MANC);
0fccd0e9
JG		 370
371 /* re-enable hardware interception of ARP */
372 manc |= E1000_MANC_ARP_EN;
373
1dc32918 374 ew32(MANC, manc);
0fccd0e9
JG		 375 }
376}
377
e0aac5a2
AK		 378/**
379 * e1000_configure - configure the hardware for RX and TX
380 * @adapter = private board structure
381 **/
382static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 383{
384 struct net_device *netdev = adapter->netdev;
2db10a08 385 int i;
1da177e4 386
db0ce50d 387 e1000_set_rx_mode(netdev);
1da177e4
LT		 388
389 e1000_restore_vlan(adapter);
0fccd0e9 390 e1000_init_manageability(adapter);
1da177e4
LT		 391
392 e1000_configure_tx(adapter);
393 e1000_setup_rctl(adapter);
394 e1000_configure_rx(adapter);
72d64a43
JK		 395 /* call E1000_DESC_UNUSED which always leaves
396 * at least 1 descriptor unused to make sure
6cfbd97b
JK		 397 * next_to_use != next_to_clean
398 */
f56799ea 399 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 400 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e 401 adapter->alloc_rx_buf(adapter, ring,
6cfbd97b 402 E1000_DESC_UNUSED(ring));
f56799ea 403 }
e0aac5a2
AK		 404}
405
406int e1000_up(struct e1000_adapter *adapter)
407{
1dc32918
JP		 408 struct e1000_hw *hw = &adapter->hw;
409
e0aac5a2
AK		 410 /* hardware has been reset, we need to reload some things */
411 e1000_configure(adapter);
412
413 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 414
bea3348e 415 napi_enable(&adapter->napi);
c3570acb 416
5de55624
MC		 417 e1000_irq_enable(adapter);
418
4cb9be7a
JB		 419 netif_wake_queue(adapter->netdev);
420
79f3d399 421 /* fire a link change interrupt to start the watchdog */
1dc32918 422 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 423 return 0;
424}
425
79f05bf0
AK		 426/**
427 * e1000_power_up_phy - restore link in case the phy was powered down
428 * @adapter: address of board private structure
429 *
430 * The phy may be powered down to save power and turn off link when the
431 * driver is unloaded and wake on lan is not enabled (among others)
432 * *** this routine MUST be followed by a call to e1000_reset ***
79f05bf0 433 **/
d658266e 434void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 435{
1dc32918 436 struct e1000_hw *hw = &adapter->hw;
406874a7 437 u16 mii_reg = 0;
79f05bf0
AK		 438
439 /* Just clear the power down bit to wake the phy back up */
1dc32918 440 if (hw->media_type == e1000_media_type_copper) {
79f05bf0 441 /* according to the manual, the phy will retain its
6cfbd97b
JK		 442 * settings across a power-down/up cycle
443 */
1dc32918 444 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 445 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 446 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 447 }
448}
449
450static void e1000_power_down_phy(struct e1000_adapter *adapter)
451{
1dc32918
JP		 452 struct e1000_hw *hw = &adapter->hw;
453
61c2505f 454 /* Power down the PHY so no link is implied when interface is down *
c3033b01 455 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 456 * (a) WoL is enabled
457 * (b) AMT is active
6cfbd97b
JK		 458 * (c) SoL/IDER session is active
459 */
1dc32918
JP		 460 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
461 hw->media_type == e1000_media_type_copper) {
406874a7 462 u16 mii_reg = 0;
61c2505f 463
1dc32918 464 switch (hw->mac_type) {
61c2505f
BA		 465 case e1000_82540:
466 case e1000_82545:
467 case e1000_82545_rev_3:
468 case e1000_82546:
5377a416 469 case e1000_ce4100:
61c2505f
BA		 470 case e1000_82546_rev_3:
471 case e1000_82541:
472 case e1000_82541_rev_2:
473 case e1000_82547:
474 case e1000_82547_rev_2:
1dc32918 475 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 476 goto out;
477 break;
61c2505f
BA		 478 default:
479 goto out;
480 }
1dc32918 481 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 482 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 483 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
4e0d8f7d 484 msleep(1);
79f05bf0 485 }
61c2505f
BA		 486out:
487 return;
79f05bf0
AK		 488}
489
a4010afe
JB		 490static void e1000_down_and_stop(struct e1000_adapter *adapter)
491{
492 set_bit(__E1000_DOWN, &adapter->flags);
8ce6909f
TD		 493
494 /* Only kill reset task if adapter is not resetting */
495 if (!test_bit(__E1000_RESETTING, &adapter->flags))
496 cancel_work_sync(&adapter->reset_task);
497
a4010afe
JB		 498 cancel_delayed_work_sync(&adapter->watchdog_task);
499 cancel_delayed_work_sync(&adapter->phy_info_task);
500 cancel_delayed_work_sync(&adapter->fifo_stall_task);
501}
502
64798845 503void e1000_down(struct e1000_adapter *adapter)
1da177e4 504{
a6c42322 505 struct e1000_hw *hw = &adapter->hw;
1da177e4 506 struct net_device *netdev = adapter->netdev;
a6c42322 507 u32 rctl, tctl;
1da177e4 508
1314bbf3 509
a6c42322
JB		 510 /* disable receives in the hardware */
511 rctl = er32(RCTL);
512 ew32(RCTL, rctl & ~E1000_RCTL_EN);
513 /* flush and sleep below */
514
51851073 515 netif_tx_disable(netdev);
a6c42322
JB		 516
517 /* disable transmits in the hardware */
518 tctl = er32(TCTL);
519 tctl &= ~E1000_TCTL_EN;
520 ew32(TCTL, tctl);
521 /* flush both disables and wait for them to finish */
522 E1000_WRITE_FLUSH();
523 msleep(10);
524
bea3348e 525 napi_disable(&adapter->napi);
c3570acb 526
1da177e4 527 e1000_irq_disable(adapter);
c1605eb3 528
6cfbd97b 529 /* Setting DOWN must be after irq_disable to prevent
ab08853f 530 * a screaming interrupt. Setting DOWN also prevents
a4010afe 531 * tasks from rescheduling.
ab08853f 532 */
a4010afe 533 e1000_down_and_stop(adapter);
1da177e4 534
1da177e4
LT		 535 adapter->link_speed = 0;
536 adapter->link_duplex = 0;
537 netif_carrier_off(netdev);
1da177e4
LT		 538
539 e1000_reset(adapter);
581d708e
MC		 540 e1000_clean_all_tx_rings(adapter);
541 e1000_clean_all_rx_rings(adapter);
1da177e4 542}
1da177e4 543
38df7a39 544static void e1000_reinit_safe(struct e1000_adapter *adapter)
338c15e4
JB		 545{
546 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
547 msleep(1);
0ef4eedc 548 mutex_lock(&adapter->mutex);
338c15e4
JB		 549 e1000_down(adapter);
550 e1000_up(adapter);
0ef4eedc 551 mutex_unlock(&adapter->mutex);
338c15e4
JB		 552 clear_bit(__E1000_RESETTING, &adapter->flags);
553}
554
64798845 555void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08 556{
338c15e4
JB		 557 /* if rtnl_lock is not held the call path is bogus */
558 ASSERT_RTNL();
2db10a08
AK		 559 WARN_ON(in_interrupt());
560 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
561 msleep(1);
562 e1000_down(adapter);
563 e1000_up(adapter);
564 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 565}
566
64798845 567void e1000_reset(struct e1000_adapter *adapter)
1da177e4 568{
1dc32918 569 struct e1000_hw *hw = &adapter->hw;
406874a7 570 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
c3033b01 571 bool legacy_pba_adjust = false;
b7cb8c2c 572 u16 hwm;
1da177e4
LT		 573
574 /* Repartition Pba for greater than 9k mtu
575 * To take effect CTRL.RST is required.
576 */
577
1dc32918 578 switch (hw->mac_type) {
018ea44e
BA		 579 case e1000_82542_rev2_0:
580 case e1000_82542_rev2_1:
581 case e1000_82543:
582 case e1000_82544:
583 case e1000_82540:
584 case e1000_82541:
585 case e1000_82541_rev_2:
c3033b01 586 legacy_pba_adjust = true;
018ea44e
BA		 587 pba = E1000_PBA_48K;
588 break;
589 case e1000_82545:
590 case e1000_82545_rev_3:
591 case e1000_82546:
5377a416 592 case e1000_ce4100:
018ea44e
BA		 593 case e1000_82546_rev_3:
594 pba = E1000_PBA_48K;
595 break;
2d7edb92 596 case e1000_82547:
0e6ef3e0 597 case e1000_82547_rev_2:
c3033b01 598 legacy_pba_adjust = true;
2d7edb92
MC		 599 pba = E1000_PBA_30K;
600 break;
018ea44e
BA		 601 case e1000_undefined:
602 case e1000_num_macs:
2d7edb92
MC		 603 break;
604 }
605
c3033b01 606 if (legacy_pba_adjust) {
b7cb8c2c 607 if (hw->max_frame_size > E1000_RXBUFFER_8192)
018ea44e 608 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 609
1dc32918 610 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 611 adapter->tx_fifo_head = 0;
612 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
613 adapter->tx_fifo_size =
614 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
615 atomic_set(&adapter->tx_fifo_stall, 0);
616 }
b7cb8c2c 617 } else if (hw->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
018ea44e 618 /* adjust PBA for jumbo frames */
1dc32918 619 ew32(PBA, pba);
018ea44e
BA		 620
621 /* To maintain wire speed transmits, the Tx FIFO should be
b7cb8c2c 622 * large enough to accommodate two full transmit packets,
018ea44e 623 * rounded up to the next 1KB and expressed in KB. Likewise,
b7cb8c2c 624 * the Rx FIFO should be large enough to accommodate at least
018ea44e 625 * one full receive packet and is similarly rounded up and
6cfbd97b
JK		 626 * expressed in KB.
627 */
1dc32918 628 pba = er32(PBA);
018ea44e
BA		 629 /* upper 16 bits has Tx packet buffer allocation size in KB */
630 tx_space = pba >> 16;
631 /* lower 16 bits has Rx packet buffer allocation size in KB */
632 pba &= 0xffff;
6cfbd97b 633 /* the Tx fifo also stores 16 bytes of information about the Tx
b7cb8c2c
JB		 634 * but don't include ethernet FCS because hardware appends it
635 */
636 min_tx_space = (hw->max_frame_size +
637 sizeof(struct e1000_tx_desc) -
638 ETH_FCS_LEN) * 2;
9099cfb9 639 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 640 min_tx_space >>= 10;
b7cb8c2c
JB		 641 /* software strips receive CRC, so leave room for it */
642 min_rx_space = hw->max_frame_size;
9099cfb9 643 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 644 min_rx_space >>= 10;
645
646 /* If current Tx allocation is less than the min Tx FIFO size,
647 * and the min Tx FIFO size is less than the current Rx FIFO
6cfbd97b
JK		 648 * allocation, take space away from current Rx allocation
649 */
018ea44e
BA		 650 if (tx_space < min_tx_space &&
651 ((min_tx_space - tx_space) < pba)) {
652 pba = pba - (min_tx_space - tx_space);
653
654 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 655 switch (hw->mac_type) {
018ea44e
BA		 656 case e1000_82545 ... e1000_82546_rev_3:
657 pba &= ~(E1000_PBA_8K - 1);
658 break;
659 default:
660 break;
661 }
662
6cfbd97b
JK		 663 /* if short on Rx space, Rx wins and must trump Tx
664 * adjustment or use Early Receive if available
665 */
1532ecea
JB		 666 if (pba < min_rx_space)
667 pba = min_rx_space;
018ea44e 668 }
1da177e4 669 }
2d7edb92 670
1dc32918 671 ew32(PBA, pba);
1da177e4 672
6cfbd97b 673 /* flow control settings:
b7cb8c2c
JB		 674 * The high water mark must be low enough to fit one full frame
675 * (or the size used for early receive) above it in the Rx FIFO.
676 * Set it to the lower of:
677 * - 90% of the Rx FIFO size, and
678 * - the full Rx FIFO size minus the early receive size (for parts
679 * with ERT support assuming ERT set to E1000_ERT_2048), or
680 * - the full Rx FIFO size minus one full frame
681 */
682 hwm = min(((pba << 10) * 9 / 10),
683 ((pba << 10) - hw->max_frame_size));
684
685 hw->fc_high_water = hwm & 0xFFF8; /* 8-byte granularity */
686 hw->fc_low_water = hw->fc_high_water - 8;
edbbb3ca 687 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
1dc32918
JP		 688 hw->fc_send_xon = 1;
689 hw->fc = hw->original_fc;
1da177e4 690
2d7edb92 691 /* Allow time for pending master requests to run */
1dc32918
JP		 692 e1000_reset_hw(hw);
693 if (hw->mac_type >= e1000_82544)
694 ew32(WUC, 0);
09ae3e88 695
1dc32918 696 if (e1000_init_hw(hw))
feb8f478 697 e_dev_err("Hardware Error\n");
2d7edb92 698 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 699
700 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918 701 if (hw->mac_type >= e1000_82544 &&
1dc32918
JP		 702 hw->autoneg == 1 &&
703 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
704 u32 ctrl = er32(CTRL);
3d5460a0
JB		 705 /* clear phy power management bit if we are in gig only mode,
706 * which if enabled will attempt negotiation to 100Mb, which
6cfbd97b
JK		 707 * can cause a loss of link at power off or driver unload
708 */
3d5460a0 709 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 710 ew32(CTRL, ctrl);
3d5460a0
JB		 711 }
712
1da177e4 713 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 714 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 715
1dc32918
JP		 716 e1000_reset_adaptive(hw);
717 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202 718
0fccd0e9 719 e1000_release_manageability(adapter);
1da177e4
LT		 720}
721
1aa8b471 722/* Dump the eeprom for users having checksum issues */
b4ea895d 723static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 724{
725 struct net_device *netdev = adapter->netdev;
726 struct ethtool_eeprom eeprom;
727 const struct ethtool_ops *ops = netdev->ethtool_ops;
728 u8 *data;
729 int i;
730 u16 csum_old, csum_new = 0;
731
732 eeprom.len = ops->get_eeprom_len(netdev);
733 eeprom.offset = 0;
734
735 data = kmalloc(eeprom.len, GFP_KERNEL);
e404decb 736 if (!data)
67b3c27c 737 return;
67b3c27c
AK		 738
739 ops->get_eeprom(netdev, &eeprom, data);
740
741 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
742 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
743 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
744 csum_new += data[i] + (data[i + 1] << 8);
745 csum_new = EEPROM_SUM - csum_new;
746
675ad473
ET		 747 pr_err("/*********************/\n");
748 pr_err("Current EEPROM Checksum : 0x%04x\n", csum_old);
749 pr_err("Calculated : 0x%04x\n", csum_new);
67b3c27c 750
675ad473
ET		 751 pr_err("Offset Values\n");
752 pr_err("======== ======\n");
67b3c27c
AK		 753 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
754
675ad473
ET		 755 pr_err("Include this output when contacting your support provider.\n");
756 pr_err("This is not a software error! Something bad happened to\n");
757 pr_err("your hardware or EEPROM image. Ignoring this problem could\n");
758 pr_err("result in further problems, possibly loss of data,\n");
759 pr_err("corruption or system hangs!\n");
760 pr_err("The MAC Address will be reset to 00:00:00:00:00:00,\n");
761 pr_err("which is invalid and requires you to set the proper MAC\n");
762 pr_err("address manually before continuing to enable this network\n");
763 pr_err("device. Please inspect the EEPROM dump and report the\n");
764 pr_err("issue to your hardware vendor or Intel Customer Support.\n");
765 pr_err("/*********************/\n");
67b3c27c
AK		 766
767 kfree(data);
768}
769
81250297
TI		 770/**
771 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
772 * @pdev: PCI device information struct
773 *
774 * Return true if an adapter needs ioport resources
775 **/
776static int e1000_is_need_ioport(struct pci_dev *pdev)
777{
778 switch (pdev->device) {
779 case E1000_DEV_ID_82540EM:
780 case E1000_DEV_ID_82540EM_LOM:
781 case E1000_DEV_ID_82540EP:
782 case E1000_DEV_ID_82540EP_LOM:
783 case E1000_DEV_ID_82540EP_LP:
784 case E1000_DEV_ID_82541EI:
785 case E1000_DEV_ID_82541EI_MOBILE:
786 case E1000_DEV_ID_82541ER:
787 case E1000_DEV_ID_82541ER_LOM:
788 case E1000_DEV_ID_82541GI:
789 case E1000_DEV_ID_82541GI_LF:
790 case E1000_DEV_ID_82541GI_MOBILE:
791 case E1000_DEV_ID_82544EI_COPPER:
792 case E1000_DEV_ID_82544EI_FIBER:
793 case E1000_DEV_ID_82544GC_COPPER:
794 case E1000_DEV_ID_82544GC_LOM:
795 case E1000_DEV_ID_82545EM_COPPER:
796 case E1000_DEV_ID_82545EM_FIBER:
797 case E1000_DEV_ID_82546EB_COPPER:
798 case E1000_DEV_ID_82546EB_FIBER:
799 case E1000_DEV_ID_82546EB_QUAD_COPPER:
800 return true;
801 default:
802 return false;
803 }
804}
805
c8f44aff
MM		 806static netdev_features_t e1000_fix_features(struct net_device *netdev,
807 netdev_features_t features)
5622e404 808{
6cfbd97b
JK		 809 /* Since there is no support for separate Rx/Tx vlan accel
810 * enable/disable make sure Tx flag is always in same state as Rx.
5622e404 811 */
f646968f
PM		 812 if (features & NETIF_F_HW_VLAN_CTAG_RX)
813 features |= NETIF_F_HW_VLAN_CTAG_TX;
5622e404 814 else
f646968f 815 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
5622e404
JP		 816
817 return features;
818}
819
c8f44aff
MM		 820static int e1000_set_features(struct net_device *netdev,
821 netdev_features_t features)
e97d3207
MM		 822{
823 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 824 netdev_features_t changed = features ^ netdev->features;
e97d3207 825
f646968f 826 if (changed & NETIF_F_HW_VLAN_CTAG_RX)
5622e404
JP		 827 e1000_vlan_mode(netdev, features);
828
e825b731 829 if (!(changed & (NETIF_F_RXCSUM | NETIF_F_RXALL)))
e97d3207
MM		 830 return 0;
831
e825b731 832 netdev->features = features;
e97d3207
MM		 833 adapter->rx_csum = !!(features & NETIF_F_RXCSUM);
834
835 if (netif_running(netdev))
836 e1000_reinit_locked(adapter);
837 else
838 e1000_reset(adapter);
839
840 return 0;
841}
842
0e7614bc
SH		 843static const struct net_device_ops e1000_netdev_ops = {
844 .ndo_open = e1000_open,
845 .ndo_stop = e1000_close,
00829823 846 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 847 .ndo_get_stats = e1000_get_stats,
848 .ndo_set_rx_mode = e1000_set_rx_mode,
849 .ndo_set_mac_address = e1000_set_mac,
5622e404 850 .ndo_tx_timeout = e1000_tx_timeout,
0e7614bc
SH		 851 .ndo_change_mtu = e1000_change_mtu,
852 .ndo_do_ioctl = e1000_ioctl,
853 .ndo_validate_addr = eth_validate_addr,
0e7614bc
SH		 854 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
855 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
856#ifdef CONFIG_NET_POLL_CONTROLLER
857 .ndo_poll_controller = e1000_netpoll,
858#endif
5622e404
JP		 859 .ndo_fix_features = e1000_fix_features,
860 .ndo_set_features = e1000_set_features,
0e7614bc
SH		 861};
862
e508be17
JB		 863/**
864 * e1000_init_hw_struct - initialize members of hw struct
865 * @adapter: board private struct
866 * @hw: structure used by e1000_hw.c
867 *
868 * Factors out initialization of the e1000_hw struct to its own function
869 * that can be called very early at init (just after struct allocation).
870 * Fields are initialized based on PCI device information and
871 * OS network device settings (MTU size).
872 * Returns negative error codes if MAC type setup fails.
873 */
874static int e1000_init_hw_struct(struct e1000_adapter *adapter,
875 struct e1000_hw *hw)
876{
877 struct pci_dev *pdev = adapter->pdev;
878
879 /* PCI config space info */
880 hw->vendor_id = pdev->vendor;
881 hw->device_id = pdev->device;
882 hw->subsystem_vendor_id = pdev->subsystem_vendor;
883 hw->subsystem_id = pdev->subsystem_device;
884 hw->revision_id = pdev->revision;
885
886 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
887
888 hw->max_frame_size = adapter->netdev->mtu +
889 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
890 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
891
892 /* identify the MAC */
893 if (e1000_set_mac_type(hw)) {
894 e_err(probe, "Unknown MAC Type\n");
895 return -EIO;
896 }
897
898 switch (hw->mac_type) {
899 default:
900 break;
901 case e1000_82541:
902 case e1000_82547:
903 case e1000_82541_rev_2:
904 case e1000_82547_rev_2:
905 hw->phy_init_script = 1;
906 break;
907 }
908
909 e1000_set_media_type(hw);
910 e1000_get_bus_info(hw);
911
912 hw->wait_autoneg_complete = false;
913 hw->tbi_compatibility_en = true;
914 hw->adaptive_ifs = true;
915
916 /* Copper options */
917
918 if (hw->media_type == e1000_media_type_copper) {
919 hw->mdix = AUTO_ALL_MODES;
920 hw->disable_polarity_correction = false;
921 hw->master_slave = E1000_MASTER_SLAVE;
922 }
923
924 return 0;
925}
926
1da177e4
LT		 927/**
928 * e1000_probe - Device Initialization Routine
929 * @pdev: PCI device information struct
930 * @ent: entry in e1000_pci_tbl
931 *
932 * Returns 0 on success, negative on failure
933 *
934 * e1000_probe initializes an adapter identified by a pci_dev structure.
935 * The OS initialization, configuring of the adapter private structure,
936 * and a hardware reset occur.
937 **/
1dd06ae8 938static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT		 939{
940 struct net_device *netdev;
941 struct e1000_adapter *adapter;
1dc32918 942 struct e1000_hw *hw;
2d7edb92 943
1da177e4 944 static int cards_found = 0;
120cd576 945 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 946 int i, err, pci_using_dac;
406874a7 947 u16 eeprom_data = 0;
5377a416 948 u16 tmp = 0;
406874a7 949 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 950 int bars, need_ioport;
0795af57 951
81250297
TI		 952 /* do not allocate ioport bars when not needed */
953 need_ioport = e1000_is_need_ioport(pdev);
954 if (need_ioport) {
955 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
956 err = pci_enable_device(pdev);
957 } else {
958 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 959 err = pci_enable_device_mem(pdev);
81250297 960 }
c7be73bc 961 if (err)
1da177e4
LT		 962 return err;
963
81250297 964 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 965 if (err)
6dd62ab0 966 goto err_pci_reg;
1da177e4
LT		 967
968 pci_set_master(pdev);
dbb5aaeb
NN		 969 err = pci_save_state(pdev);
970 if (err)
971 goto err_alloc_etherdev;
1da177e4 972
6dd62ab0 973 err = -ENOMEM;
1da177e4 974 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 975 if (!netdev)
1da177e4 976 goto err_alloc_etherdev;
1da177e4 977
1da177e4
LT		 978 SET_NETDEV_DEV(netdev, &pdev->dev);
979
980 pci_set_drvdata(pdev, netdev);
60490fe0 981 adapter = netdev_priv(netdev);
1da177e4
LT		 982 adapter->netdev = netdev;
983 adapter->pdev = pdev;
b3f4d599 984 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
81250297
TI		 985 adapter->bars = bars;
986 adapter->need_ioport = need_ioport;
1da177e4 987
1dc32918
JP		 988 hw = &adapter->hw;
989 hw->back = adapter;
990
6dd62ab0 991 err = -EIO;
275f165f 992 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 993 if (!hw->hw_addr)
1da177e4 994 goto err_ioremap;
1da177e4 995
81250297
TI		 996 if (adapter->need_ioport) {
997 for (i = BAR_1; i <= BAR_5; i++) {
998 if (pci_resource_len(pdev, i) == 0)
999 continue;
1000 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1001 hw->io_base = pci_resource_start(pdev, i);
1002 break;
1003 }
1da177e4
LT		 1004 }
1005 }
1006
e508be17
JB		 1007 /* make ready for any if (hw->...) below */
1008 err = e1000_init_hw_struct(adapter, hw);
1009 if (err)
1010 goto err_sw_init;
1011
6cfbd97b 1012 /* there is a workaround being applied below that limits
e508be17
JB		 1013 * 64-bit DMA addresses to 64-bit hardware. There are some
1014 * 32-bit adapters that Tx hang when given 64-bit DMA addresses
1015 */
1016 pci_using_dac = 0;
1017 if ((hw->bus_type == e1000_bus_type_pcix) &&
1018 !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) {
6cfbd97b 1019 /* according to DMA-API-HOWTO, coherent calls will always
e508be17
JB		 1020 * succeed if the set call did
1021 */
1022 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
1023 pci_using_dac = 1;
e508be17 1024 } else {
19a0b67a
DN		 1025 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1026 if (err) {
1027 pr_err("No usable DMA config, aborting\n");
1028 goto err_dma;
1029 }
1030 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
e508be17
JB		 1031 }
1032
0e7614bc 1033 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1034 e1000_set_ethtool_ops(netdev);
1da177e4 1035 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1036 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1037
0eb5a34c 1038 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1039
1da177e4
LT		 1040 adapter->bd_number = cards_found;
1041
1042 /* setup the private structure */
1043
c7be73bc
JP		 1044 err = e1000_sw_init(adapter);
1045 if (err)
1da177e4
LT		 1046 goto err_sw_init;
1047
6dd62ab0 1048 err = -EIO;
5377a416 1049 if (hw->mac_type == e1000_ce4100) {
13acde8f
FF		 1050 hw->ce4100_gbe_mdio_base_virt =
1051 ioremap(pci_resource_start(pdev, BAR_1),
5377a416
DB		 1052 pci_resource_len(pdev, BAR_1));
1053
13acde8f 1054 if (!hw->ce4100_gbe_mdio_base_virt)
5377a416
DB		 1055 goto err_mdio_ioremap;
1056 }
2d7edb92 1057
1dc32918 1058 if (hw->mac_type >= e1000_82543) {
e97d3207 1059 netdev->hw_features = NETIF_F_SG |
5622e404 1060 NETIF_F_HW_CSUM |
f646968f
PM		 1061 NETIF_F_HW_VLAN_CTAG_RX;
1062 netdev->features = NETIF_F_HW_VLAN_CTAG_TX |
1063 NETIF_F_HW_VLAN_CTAG_FILTER;
1da177e4
LT		 1064 }
1065
1dc32918
JP		 1066 if ((hw->mac_type >= e1000_82544) &&
1067 (hw->mac_type != e1000_82547))
e97d3207
MM		 1068 netdev->hw_features |= NETIF_F_TSO;
1069
11a78dcf
BG		 1070 netdev->priv_flags |= IFF_SUPP_NOFCS;
1071
e97d3207 1072 netdev->features |= netdev->hw_features;
7500673b
TD		 1073 netdev->hw_features |= (NETIF_F_RXCSUM |
1074 NETIF_F_RXALL |
1075 NETIF_F_RXFCS);
2d7edb92 1076
7b872a55 1077 if (pci_using_dac) {
1da177e4 1078 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 1079 netdev->vlan_features |= NETIF_F_HIGHDMA;
1080 }
1da177e4 1081
7500673b
TD		 1082 netdev->vlan_features |= (NETIF_F_TSO |
1083 NETIF_F_HW_CSUM |
1084 NETIF_F_SG);
20501a69 1085
01789349
JP		 1086 netdev->priv_flags |= IFF_UNICAST_FLT;
1087
1dc32918 1088 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1089
cd94dd0b 1090 /* initialize eeprom parameters */
1dc32918 1091 if (e1000_init_eeprom_params(hw)) {
feb8f478 1092 e_err(probe, "EEPROM initialization failed\n");
6dd62ab0 1093 goto err_eeprom;
cd94dd0b
AK		 1094 }
1095
96838a40 1096 /* before reading the EEPROM, reset the controller to
6cfbd97b
JK		 1097 * put the device in a known good starting state
1098 */
96838a40 1099
1dc32918 1100 e1000_reset_hw(hw);
1da177e4
LT		 1101
1102 /* make sure the EEPROM is good */
1dc32918 1103 if (e1000_validate_eeprom_checksum(hw) < 0) {
feb8f478 1104 e_err(probe, "The EEPROM Checksum Is Not Valid\n");
67b3c27c 1105 e1000_dump_eeprom(adapter);
6cfbd97b 1106 /* set MAC address to all zeroes to invalidate and temporary
67b3c27c
AK		 1107 * disable this device for the user. This blocks regular
1108 * traffic while still permitting ethtool ioctls from reaching
1109 * the hardware as well as allowing the user to run the
1110 * interface after manually setting a hw addr using
1111 * `ip set address`
1112 */
1dc32918 1113 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1114 } else {
1115 /* copy the MAC address out of the EEPROM */
1dc32918 1116 if (e1000_read_mac_addr(hw))
feb8f478 1117 e_err(probe, "EEPROM Read Error\n");
1da177e4 1118 }
67b3c27c 1119 /* don't block initalization here due to bad MAC address */
1dc32918 1120 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1121
aaeb6cdf 1122 if (!is_valid_ether_addr(netdev->dev_addr))
feb8f478 1123 e_err(probe, "Invalid MAC Address\n");
1da177e4 1124
1da177e4 1125
a4010afe
JB		 1126 INIT_DELAYED_WORK(&adapter->watchdog_task, e1000_watchdog);
1127 INIT_DELAYED_WORK(&adapter->fifo_stall_task,
1128 e1000_82547_tx_fifo_stall_task);
1129 INIT_DELAYED_WORK(&adapter->phy_info_task, e1000_update_phy_info_task);
65f27f38 1130 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1131
1da177e4
LT		 1132 e1000_check_options(adapter);
1133
1134 /* Initial Wake on LAN setting
1135 * If APM wake is enabled in the EEPROM,
1136 * enable the ACPI Magic Packet filter
1137 */
1138
1dc32918 1139 switch (hw->mac_type) {
1da177e4
LT		 1140 case e1000_82542_rev2_0:
1141 case e1000_82542_rev2_1:
1142 case e1000_82543:
1143 break;
1144 case e1000_82544:
1dc32918 1145 e1000_read_eeprom(hw,
1da177e4
LT		 1146 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1147 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1148 break;
1149 case e1000_82546:
1150 case e1000_82546_rev_3:
1dc32918
JP		 1151 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1152 e1000_read_eeprom(hw,
1da177e4
LT		 1153 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1154 break;
1155 }
1156 /* Fall Through */
1157 default:
1dc32918 1158 e1000_read_eeprom(hw,
1da177e4
LT		 1159 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1160 break;
1161 }
96838a40 1162 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1163 adapter->eeprom_wol |= E1000_WUFC_MAG;
1164
1165 /* now that we have the eeprom settings, apply the special cases
1166 * where the eeprom may be wrong or the board simply won't support
6cfbd97b
JK		 1167 * wake on lan on a particular port
1168 */
120cd576
JB		 1169 switch (pdev->device) {
1170 case E1000_DEV_ID_82546GB_PCIE:
1171 adapter->eeprom_wol = 0;
1172 break;
1173 case E1000_DEV_ID_82546EB_FIBER:
1174 case E1000_DEV_ID_82546GB_FIBER:
120cd576 1175 /* Wake events only supported on port A for dual fiber
6cfbd97b
JK		 1176 * regardless of eeprom setting
1177 */
1dc32918 1178 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1179 adapter->eeprom_wol = 0;
1180 break;
1181 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1182 /* if quad port adapter, disable WoL on all but port A */
1183 if (global_quad_port_a != 0)
1184 adapter->eeprom_wol = 0;
1185 else
3db1cd5c 1186 adapter->quad_port_a = true;
120cd576
JB		 1187 /* Reset for multiple quad port adapters */
1188 if (++global_quad_port_a == 4)
1189 global_quad_port_a = 0;
1190 break;
1191 }
1192
1193 /* initialize the wol settings based on the eeprom settings */
1194 adapter->wol = adapter->eeprom_wol;
de126489 1195 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1196
5377a416
DB		 1197 /* Auto detect PHY address */
1198 if (hw->mac_type == e1000_ce4100) {
1199 for (i = 0; i < 32; i++) {
1200 hw->phy_addr = i;
1201 e1000_read_phy_reg(hw, PHY_ID2, &tmp);
1202 if (tmp == 0 || tmp == 0xFF) {
1203 if (i == 31)
1204 goto err_eeprom;
1205 continue;
1206 } else
1207 break;
1208 }
1209 }
1210
675ad473
ET		 1211 /* reset the hardware with the new settings */
1212 e1000_reset(adapter);
1213
1214 strcpy(netdev->name, "eth%d");
1215 err = register_netdev(netdev);
1216 if (err)
1217 goto err_register;
1218
52f5509f 1219 e1000_vlan_filter_on_off(adapter, false);
5622e404 1220
fb3d47d4 1221 /* print bus type/speed/width info */
feb8f478 1222 e_info(probe, "(PCI%s:%dMHz:%d-bit) %pM\n",
7837e58c
JP		 1223 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" : ""),
1224 ((hw->bus_speed == e1000_bus_speed_133) ? 133 :
1225 (hw->bus_speed == e1000_bus_speed_120) ? 120 :
1226 (hw->bus_speed == e1000_bus_speed_100) ? 100 :
1227 (hw->bus_speed == e1000_bus_speed_66) ? 66 : 33),
1228 ((hw->bus_width == e1000_bus_width_64) ? 64 : 32),
1229 netdev->dev_addr);
1314bbf3 1230
eb62efd2
JB		 1231 /* carrier off reporting is important to ethtool even BEFORE open */
1232 netif_carrier_off(netdev);
1233
feb8f478 1234 e_info(probe, "Intel(R) PRO/1000 Network Connection\n");
1da177e4
LT		 1235
1236 cards_found++;
1237 return 0;
1238
1239err_register:
6dd62ab0 1240err_eeprom:
1532ecea 1241 e1000_phy_hw_reset(hw);
6dd62ab0 1242
1dc32918
JP		 1243 if (hw->flash_address)
1244 iounmap(hw->flash_address);
6dd62ab0
VA		 1245 kfree(adapter->tx_ring);
1246 kfree(adapter->rx_ring);
e508be17 1247err_dma:
1da177e4 1248err_sw_init:
5377a416 1249err_mdio_ioremap:
13acde8f 1250 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918 1251 iounmap(hw->hw_addr);
1da177e4
LT		 1252err_ioremap:
1253 free_netdev(netdev);
1254err_alloc_etherdev:
81250297 1255 pci_release_selected_regions(pdev, bars);
6dd62ab0 1256err_pci_reg:
6dd62ab0 1257 pci_disable_device(pdev);
1da177e4
LT		 1258 return err;
1259}
1260
1261/**
1262 * e1000_remove - Device Removal Routine
1263 * @pdev: PCI device information struct
1264 *
1265 * e1000_remove is called by the PCI subsystem to alert the driver
1266 * that it should release a PCI device. The could be caused by a
1267 * Hot-Plug event, or because the driver is going to be removed from
1268 * memory.
1269 **/
9f9a12f8 1270static void e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1271{
1272 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1273 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1274 struct e1000_hw *hw = &adapter->hw;
1da177e4 1275
a4010afe 1276 e1000_down_and_stop(adapter);
0fccd0e9 1277 e1000_release_manageability(adapter);
1da177e4 1278
bea3348e
SH		 1279 unregister_netdev(netdev);
1280
1532ecea 1281 e1000_phy_hw_reset(hw);
1da177e4 1282
24025e4e
MC		 1283 kfree(adapter->tx_ring);
1284 kfree(adapter->rx_ring);
24025e4e 1285
1c26750c 1286 if (hw->mac_type == e1000_ce4100)
13acde8f 1287 iounmap(hw->ce4100_gbe_mdio_base_virt);
1dc32918
JP		 1288 iounmap(hw->hw_addr);
1289 if (hw->flash_address)
1290 iounmap(hw->flash_address);
81250297 1291 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1292
1293 free_netdev(netdev);
1294
1295 pci_disable_device(pdev);
1296}
1297
1298/**
1299 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1300 * @adapter: board private structure to initialize
1301 *
1302 * e1000_sw_init initializes the Adapter private data structure.
e508be17 1303 * e1000_init_hw_struct MUST be called before this function
1da177e4 1304 **/
9f9a12f8 1305static int e1000_sw_init(struct e1000_adapter *adapter)
1da177e4 1306{
eb0f8054 1307 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4 1308
f56799ea
JK		 1309 adapter->num_tx_queues = 1;
1310 adapter->num_rx_queues = 1;
581d708e
MC		 1311
1312 if (e1000_alloc_queues(adapter)) {
feb8f478 1313 e_err(probe, "Unable to allocate memory for queues\n");
581d708e
MC		 1314 return -ENOMEM;
1315 }
1316
47313054 1317 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1318 e1000_irq_disable(adapter);
1319
1da177e4 1320 spin_lock_init(&adapter->stats_lock);
0ef4eedc 1321 mutex_init(&adapter->mutex);
1da177e4 1322
1314bbf3
AK		 1323 set_bit(__E1000_DOWN, &adapter->flags);
1324
1da177e4
LT		 1325 return 0;
1326}
1327
581d708e
MC		 1328/**
1329 * e1000_alloc_queues - Allocate memory for all rings
1330 * @adapter: board private structure to initialize
1331 *
1332 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1333 * number of queues at compile-time.
581d708e 1334 **/
9f9a12f8 1335static int e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1336{
1c7e5b12
YB		 1337 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1338 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1339 if (!adapter->tx_ring)
1340 return -ENOMEM;
581d708e 1341
1c7e5b12
YB		 1342 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1343 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1344 if (!adapter->rx_ring) {
1345 kfree(adapter->tx_ring);
1346 return -ENOMEM;
1347 }
581d708e 1348
581d708e
MC		 1349 return E1000_SUCCESS;
1350}
1351
1da177e4
LT		 1352/**
1353 * e1000_open - Called when a network interface is made active
1354 * @netdev: network interface device structure
1355 *
1356 * Returns 0 on success, negative value on failure
1357 *
1358 * The open entry point is called when a network interface is made
1359 * active by the system (IFF_UP). At this point all resources needed
1360 * for transmit and receive operations are allocated, the interrupt
a4010afe 1361 * handler is registered with the OS, the watchdog task is started,
1da177e4
LT		 1362 * and the stack is notified that the interface is ready.
1363 **/
64798845 1364static int e1000_open(struct net_device *netdev)
1da177e4 1365{
60490fe0 1366 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1367 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1368 int err;
1369
2db10a08 1370 /* disallow open during test */
1314bbf3 1371 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1372 return -EBUSY;
1373
eb62efd2
JB		 1374 netif_carrier_off(netdev);
1375
1da177e4 1376 /* allocate transmit descriptors */
e0aac5a2
AK		 1377 err = e1000_setup_all_tx_resources(adapter);
1378 if (err)
1da177e4
LT		 1379 goto err_setup_tx;
1380
1381 /* allocate receive descriptors */
e0aac5a2 1382 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1383 if (err)
e0aac5a2 1384 goto err_setup_rx;
b5bf28cd 1385
79f05bf0
AK		 1386 e1000_power_up_phy(adapter);
1387
2d7edb92 1388 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1389 if ((hw->mng_cookie.status &
2d7edb92
MC		 1390 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1391 e1000_update_mng_vlan(adapter);
1392 }
1da177e4 1393
e0aac5a2
AK		 1394 /* before we allocate an interrupt, we must be ready to handle it.
1395 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1396 * as soon as we call pci_request_irq, so we have to setup our
6cfbd97b
JK		 1397 * clean_rx handler before we do so.
1398 */
e0aac5a2
AK		 1399 e1000_configure(adapter);
1400
1401 err = e1000_request_irq(adapter);
1402 if (err)
1403 goto err_req_irq;
1404
1405 /* From here on the code is the same as e1000_up() */
1406 clear_bit(__E1000_DOWN, &adapter->flags);
1407
bea3348e 1408 napi_enable(&adapter->napi);
47313054 1409
e0aac5a2
AK		 1410 e1000_irq_enable(adapter);
1411
076152d5
BH		 1412 netif_start_queue(netdev);
1413
e0aac5a2 1414 /* fire a link status change interrupt to start the watchdog */
1dc32918 1415 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1416
1da177e4
LT		 1417 return E1000_SUCCESS;
1418
b5bf28cd 1419err_req_irq:
e0aac5a2 1420 e1000_power_down_phy(adapter);
581d708e 1421 e1000_free_all_rx_resources(adapter);
1da177e4 1422err_setup_rx:
581d708e 1423 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1424err_setup_tx:
1425 e1000_reset(adapter);
1426
1427 return err;
1428}
1429
1430/**
1431 * e1000_close - Disables a network interface
1432 * @netdev: network interface device structure
1433 *
1434 * Returns 0, this is not allowed to fail
1435 *
1436 * The close entry point is called when an interface is de-activated
1437 * by the OS. The hardware is still under the drivers control, but
1438 * needs to be disabled. A global MAC reset is issued to stop the
1439 * hardware, and all transmit and receive resources are freed.
1440 **/
64798845 1441static int e1000_close(struct net_device *netdev)
1da177e4 1442{
60490fe0 1443 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1444 struct e1000_hw *hw = &adapter->hw;
1da177e4 1445
2db10a08 1446 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1447 e1000_down(adapter);
79f05bf0 1448 e1000_power_down_phy(adapter);
2db10a08 1449 e1000_free_irq(adapter);
1da177e4 1450
581d708e
MC		 1451 e1000_free_all_tx_resources(adapter);
1452 e1000_free_all_rx_resources(adapter);
1da177e4 1453
4666560a 1454 /* kill manageability vlan ID if supported, but not if a vlan with
6cfbd97b
JK		 1455 * the same ID is registered on the host OS (let 8021q kill it)
1456 */
1dc32918 1457 if ((hw->mng_cookie.status &
6cfbd97b
JK		 1458 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1459 !test_bit(adapter->mng_vlan_id, adapter->active_vlans)) {
2d7edb92
MC		 1460 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1461 }
b55ccb35 1462
1da177e4
LT		 1463 return 0;
1464}
1465
1466/**
1467 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1468 * @adapter: address of board private structure
2d7edb92
MC		 1469 * @start: address of beginning of memory
1470 * @len: length of memory
1da177e4 1471 **/
64798845
JP		 1472static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1473 unsigned long len)
1da177e4 1474{
1dc32918 1475 struct e1000_hw *hw = &adapter->hw;
e982f17c 1476 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1477 unsigned long end = begin + len;
1478
2648345f 1479 /* First rev 82545 and 82546 need to not allow any memory
6cfbd97b
JK		 1480 * write location to cross 64k boundary due to errata 23
1481 */
1dc32918 1482 if (hw->mac_type == e1000_82545 ||
5377a416 1483 hw->mac_type == e1000_ce4100 ||
1dc32918 1484 hw->mac_type == e1000_82546) {
c3033b01 1485 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1486 }
1487
c3033b01 1488 return true;
1da177e4
LT		 1489}
1490
1491/**
1492 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1493 * @adapter: board private structure
581d708e 1494 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1495 *
1496 * Return 0 on success, negative on failure
1497 **/
64798845
JP		 1498static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1499 struct e1000_tx_ring *txdr)
1da177e4 1500{
1da177e4
LT		 1501 struct pci_dev *pdev = adapter->pdev;
1502 int size;
1503
1504 size = sizeof(struct e1000_buffer) * txdr->count;
89bf67f1 1505 txdr->buffer_info = vzalloc(size);
14f8dc49 1506 if (!txdr->buffer_info)
1da177e4 1507 return -ENOMEM;
1da177e4
LT		 1508
1509 /* round up to nearest 4K */
1510
1511 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1512 txdr->size = ALIGN(txdr->size, 4096);
1da177e4 1513
b16f53be
NN		 1514 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
1515 GFP_KERNEL);
96838a40 1516 if (!txdr->desc) {
1da177e4 1517setup_tx_desc_die:
1da177e4
LT		 1518 vfree(txdr->buffer_info);
1519 return -ENOMEM;
1520 }
1521
2648345f 1522 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1523 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1524 void *olddesc = txdr->desc;
1525 dma_addr_t olddma = txdr->dma;
feb8f478 1526 e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
675ad473 1527 txdr->size, txdr->desc);
2648345f 1528 /* Try again, without freeing the previous */
b16f53be
NN		 1529 txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
1530 &txdr->dma, GFP_KERNEL);
2648345f 1531 /* Failed allocation, critical failure */
96838a40 1532 if (!txdr->desc) {
b16f53be
NN		 1533 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1534 olddma);
1da177e4
LT		 1535 goto setup_tx_desc_die;
1536 }
1537
1538 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1539 /* give up */
b16f53be
NN		 1540 dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
1541 txdr->dma);
1542 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1543 olddma);
feb8f478 1544 e_err(probe, "Unable to allocate aligned memory "
675ad473 1545 "for the transmit descriptor ring\n");
1da177e4
LT		 1546 vfree(txdr->buffer_info);
1547 return -ENOMEM;
1548 } else {
2648345f 1549 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1550 dma_free_coherent(&pdev->dev, txdr->size, olddesc,
1551 olddma);
1da177e4
LT		 1552 }
1553 }
1554 memset(txdr->desc, 0, txdr->size);
1555
1556 txdr->next_to_use = 0;
1557 txdr->next_to_clean = 0;
1558
1559 return 0;
1560}
1561
581d708e
MC		 1562/**
1563 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1564 * (Descriptors) for all queues
1565 * @adapter: board private structure
1566 *
581d708e
MC		 1567 * Return 0 on success, negative on failure
1568 **/
64798845 1569int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1570{
1571 int i, err = 0;
1572
f56799ea 1573 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1574 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1575 if (err) {
feb8f478 1576 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1577 for (i-- ; i >= 0; i--)
1578 e1000_free_tx_resources(adapter,
1579 &adapter->tx_ring[i]);
581d708e
MC		 1580 break;
1581 }
1582 }
1583
1584 return err;
1585}
1586
1da177e4
LT		 1587/**
1588 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1589 * @adapter: board private structure
1590 *
1591 * Configure the Tx unit of the MAC after a reset.
1592 **/
64798845 1593static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1594{
406874a7 1595 u64 tdba;
581d708e 1596 struct e1000_hw *hw = &adapter->hw;
1532ecea 1597 u32 tdlen, tctl, tipg;
406874a7 1598 u32 ipgr1, ipgr2;
1da177e4
LT		 1599
1600 /* Setup the HW Tx Head and Tail descriptor pointers */
1601
f56799ea 1602 switch (adapter->num_tx_queues) {
24025e4e
MC		 1603 case 1:
1604 default:
581d708e
MC		 1605 tdba = adapter->tx_ring[0].dma;
1606 tdlen = adapter->tx_ring[0].count *
1607 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1608 ew32(TDLEN, tdlen);
1609 ew32(TDBAH, (tdba >> 32));
1610 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1611 ew32(TDT, 0);
1612 ew32(TDH, 0);
6cfbd97b
JK		 1613 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ?
1614 E1000_TDH : E1000_82542_TDH);
1615 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ?
1616 E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1617 break;
1618 }
1da177e4
LT		 1619
1620 /* Set the default values for the Tx Inter Packet Gap timer */
1532ecea 1621 if ((hw->media_type == e1000_media_type_fiber ||
d89b6c67 1622 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1623 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1624 else
1625 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1626
581d708e 1627 switch (hw->mac_type) {
1da177e4
LT		 1628 case e1000_82542_rev2_0:
1629 case e1000_82542_rev2_1:
1630 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1631 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1632 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4
LT		 1633 break;
1634 default:
0fadb059
JK		 1635 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1636 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1637 break;
1da177e4 1638 }
0fadb059
JK		 1639 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1640 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1641 ew32(TIPG, tipg);
1da177e4
LT		 1642
1643 /* Set the Tx Interrupt Delay register */
1644
1dc32918 1645 ew32(TIDV, adapter->tx_int_delay);
581d708e 1646 if (hw->mac_type >= e1000_82540)
1dc32918 1647 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1648
1649 /* Program the Transmit Control Register */
1650
1dc32918 1651 tctl = er32(TCTL);
1da177e4 1652 tctl &= ~E1000_TCTL_CT;
7e6c9861 1653 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1654 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1655
581d708e 1656 e1000_config_collision_dist(hw);
1da177e4
LT		 1657
1658 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1659 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1660
1661 /* only set IDE if we are delaying interrupts using the timers */
1662 if (adapter->tx_int_delay)
1663 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1664
581d708e 1665 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1666 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1667 else
1668 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1669
1670 /* Cache if we're 82544 running in PCI-X because we'll
6cfbd97b
JK		 1671 * need this to apply a workaround later in the send path.
1672 */
581d708e
MC		 1673 if (hw->mac_type == e1000_82544 &&
1674 hw->bus_type == e1000_bus_type_pcix)
3db1cd5c 1675 adapter->pcix_82544 = true;
7e6c9861 1676
1dc32918 1677 ew32(TCTL, tctl);
7e6c9861 1678
1da177e4
LT		 1679}
1680
1681/**
1682 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1683 * @adapter: board private structure
581d708e 1684 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1685 *
1686 * Returns 0 on success, negative on failure
1687 **/
64798845
JP		 1688static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1689 struct e1000_rx_ring *rxdr)
1da177e4 1690{
1da177e4 1691 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1692 int size, desc_len;
1da177e4
LT		 1693
1694 size = sizeof(struct e1000_buffer) * rxdr->count;
89bf67f1 1695 rxdr->buffer_info = vzalloc(size);
14f8dc49 1696 if (!rxdr->buffer_info)
1da177e4 1697 return -ENOMEM;
1da177e4 1698
1532ecea 1699 desc_len = sizeof(struct e1000_rx_desc);
2d7edb92 1700
1da177e4
LT		 1701 /* Round up to nearest 4K */
1702
2d7edb92 1703 rxdr->size = rxdr->count * desc_len;
9099cfb9 1704 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4 1705
b16f53be
NN		 1706 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size, &rxdr->dma,
1707 GFP_KERNEL);
581d708e 1708 if (!rxdr->desc) {
1da177e4 1709setup_rx_desc_die:
1da177e4
LT		 1710 vfree(rxdr->buffer_info);
1711 return -ENOMEM;
1712 }
1713
2648345f 1714 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1715 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1716 void *olddesc = rxdr->desc;
1717 dma_addr_t olddma = rxdr->dma;
feb8f478 1718 e_err(rx_err, "rxdr align check failed: %u bytes at %p\n",
675ad473 1719 rxdr->size, rxdr->desc);
2648345f 1720 /* Try again, without freeing the previous */
b16f53be
NN		 1721 rxdr->desc = dma_alloc_coherent(&pdev->dev, rxdr->size,
1722 &rxdr->dma, GFP_KERNEL);
2648345f 1723 /* Failed allocation, critical failure */
581d708e 1724 if (!rxdr->desc) {
b16f53be
NN		 1725 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1726 olddma);
1da177e4
LT		 1727 goto setup_rx_desc_die;
1728 }
1729
1730 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1731 /* give up */
b16f53be
NN		 1732 dma_free_coherent(&pdev->dev, rxdr->size, rxdr->desc,
1733 rxdr->dma);
1734 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1735 olddma);
feb8f478
ET		 1736 e_err(probe, "Unable to allocate aligned memory for "
1737 "the Rx descriptor ring\n");
581d708e 1738 goto setup_rx_desc_die;
1da177e4 1739 } else {
2648345f 1740 /* Free old allocation, new allocation was successful */
b16f53be
NN		 1741 dma_free_coherent(&pdev->dev, rxdr->size, olddesc,
1742 olddma);
1da177e4
LT		 1743 }
1744 }
1745 memset(rxdr->desc, 0, rxdr->size);
1746
1747 rxdr->next_to_clean = 0;
1748 rxdr->next_to_use = 0;
edbbb3ca 1749 rxdr->rx_skb_top = NULL;
1da177e4
LT		 1750
1751 return 0;
1752}
1753
581d708e
MC		 1754/**
1755 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1756 * (Descriptors) for all queues
1757 * @adapter: board private structure
1758 *
581d708e
MC		 1759 * Return 0 on success, negative on failure
1760 **/
64798845 1761int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1762{
1763 int i, err = 0;
1764
f56799ea 1765 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1766 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1767 if (err) {
feb8f478 1768 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1769 for (i-- ; i >= 0; i--)
1770 e1000_free_rx_resources(adapter,
1771 &adapter->rx_ring[i]);
581d708e
MC		 1772 break;
1773 }
1774 }
1775
1776 return err;
1777}
1778
1da177e4 1779/**
2648345f 1780 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1781 * @adapter: Board private structure
1782 **/
64798845 1783static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1784{
1dc32918 1785 struct e1000_hw *hw = &adapter->hw;
630b25cd 1786 u32 rctl;
1da177e4 1787
1dc32918 1788 rctl = er32(RCTL);
1da177e4
LT		 1789
1790 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1791
d5bc77a2
DN		 1792 rctl |= E1000_RCTL_BAM | E1000_RCTL_LBM_NO |
1793 E1000_RCTL_RDMTS_HALF |
1dc32918 1794 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1795
1dc32918 1796 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1797 rctl |= E1000_RCTL_SBP;
1798 else
1799 rctl &= ~E1000_RCTL_SBP;
1800
2d7edb92
MC		 1801 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1802 rctl &= ~E1000_RCTL_LPE;
1803 else
1804 rctl |= E1000_RCTL_LPE;
1805
1da177e4 1806 /* Setup buffer sizes */
9e2feace
AK		 1807 rctl &= ~E1000_RCTL_SZ_4096;
1808 rctl |= E1000_RCTL_BSEX;
1809 switch (adapter->rx_buffer_len) {
a1415ee6
JK		 1810 case E1000_RXBUFFER_2048:
1811 default:
1812 rctl |= E1000_RCTL_SZ_2048;
1813 rctl &= ~E1000_RCTL_BSEX;
1814 break;
1815 case E1000_RXBUFFER_4096:
1816 rctl |= E1000_RCTL_SZ_4096;
1817 break;
1818 case E1000_RXBUFFER_8192:
1819 rctl |= E1000_RCTL_SZ_8192;
1820 break;
1821 case E1000_RXBUFFER_16384:
1822 rctl |= E1000_RCTL_SZ_16384;
1823 break;
2d7edb92
MC		 1824 }
1825
e825b731
BG		 1826 /* This is useful for sniffing bad packets. */
1827 if (adapter->netdev->features & NETIF_F_RXALL) {
1828 /* UPE and MPE will be handled by normal PROMISC logic
6cfbd97b
JK		 1829 * in e1000e_set_rx_mode
1830 */
e825b731
BG		 1831 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
1832 E1000_RCTL_BAM | /* RX All Bcast Pkts */
1833 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
1834
1835 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
1836 E1000_RCTL_DPF | /* Allow filtered pause */
1837 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
1838 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
1839 * and that breaks VLANs.
1840 */
1841 }
1842
1dc32918 1843 ew32(RCTL, rctl);
1da177e4
LT		 1844}
1845
1846/**
1847 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1848 * @adapter: board private structure
1849 *
1850 * Configure the Rx unit of the MAC after a reset.
1851 **/
64798845 1852static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1853{
406874a7 1854 u64 rdba;
581d708e 1855 struct e1000_hw *hw = &adapter->hw;
1532ecea 1856 u32 rdlen, rctl, rxcsum;
2d7edb92 1857
edbbb3ca
JB		 1858 if (adapter->netdev->mtu > ETH_DATA_LEN) {
1859 rdlen = adapter->rx_ring[0].count *
1860 sizeof(struct e1000_rx_desc);
1861 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
1862 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
1863 } else {
1864 rdlen = adapter->rx_ring[0].count *
1865 sizeof(struct e1000_rx_desc);
1866 adapter->clean_rx = e1000_clean_rx_irq;
1867 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1868 }
1da177e4
LT		 1869
1870 /* disable receives while setting up the descriptors */
1dc32918
JP		 1871 rctl = er32(RCTL);
1872 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1873
1874 /* set the Receive Delay Timer Register */
1dc32918 1875 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1876
581d708e 1877 if (hw->mac_type >= e1000_82540) {
1dc32918 1878 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1879 if (adapter->itr_setting != 0)
1dc32918 1880 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1881 }
1882
581d708e 1883 /* Setup the HW Rx Head and Tail Descriptor Pointers and
6cfbd97b
JK		 1884 * the Base and Length of the Rx Descriptor Ring
1885 */
f56799ea 1886 switch (adapter->num_rx_queues) {
24025e4e
MC		 1887 case 1:
1888 default:
581d708e 1889 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 1890 ew32(RDLEN, rdlen);
1891 ew32(RDBAH, (rdba >> 32));
1892 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
1893 ew32(RDT, 0);
1894 ew32(RDH, 0);
6cfbd97b
JK		 1895 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ?
1896 E1000_RDH : E1000_82542_RDH);
1897 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ?
1898 E1000_RDT : E1000_82542_RDT);
581d708e 1899 break;
24025e4e
MC		 1900 }
1901
1da177e4 1902 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 1903 if (hw->mac_type >= e1000_82543) {
1dc32918 1904 rxcsum = er32(RXCSUM);
630b25cd 1905 if (adapter->rx_csum)
2d7edb92 1906 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 1907 else
2d7edb92 1908 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 1909 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 1910 ew32(RXCSUM, rxcsum);
1da177e4
LT		 1911 }
1912
1913 /* Enable Receives */
d5bc77a2 1914 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4
LT		 1915}
1916
1917/**
581d708e 1918 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1919 * @adapter: board private structure
581d708e 1920 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1921 *
1922 * Free all transmit software resources
1923 **/
64798845
JP		 1924static void e1000_free_tx_resources(struct e1000_adapter *adapter,
1925 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1926{
1927 struct pci_dev *pdev = adapter->pdev;
1928
581d708e 1929 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1930
581d708e
MC		 1931 vfree(tx_ring->buffer_info);
1932 tx_ring->buffer_info = NULL;
1da177e4 1933
b16f53be
NN		 1934 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1935 tx_ring->dma);
1da177e4 1936
581d708e
MC		 1937 tx_ring->desc = NULL;
1938}
1939
1940/**
1941 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1942 * @adapter: board private structure
1943 *
1944 * Free all transmit software resources
1945 **/
64798845 1946void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1947{
1948 int i;
1949
f56799ea 1950 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1951 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1952}
1953
64798845
JP		 1954static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1955 struct e1000_buffer *buffer_info)
1da177e4 1956{
602c0554
AD		 1957 if (buffer_info->dma) {
1958 if (buffer_info->mapped_as_page)
b16f53be
NN		 1959 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1960 buffer_info->length, DMA_TO_DEVICE);
602c0554 1961 else
b16f53be 1962 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
602c0554 1963 buffer_info->length,
b16f53be 1964 DMA_TO_DEVICE);
602c0554
AD		 1965 buffer_info->dma = 0;
1966 }
a9ebadd6 1967 if (buffer_info->skb) {
1da177e4 1968 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 1969 buffer_info->skb = NULL;
1970 }
37e73df8 1971 buffer_info->time_stamp = 0;
a9ebadd6 1972 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 1973}
1974
1975/**
1976 * e1000_clean_tx_ring - Free Tx Buffers
1977 * @adapter: board private structure
581d708e 1978 * @tx_ring: ring to be cleaned
1da177e4 1979 **/
64798845
JP		 1980static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
1981 struct e1000_tx_ring *tx_ring)
1da177e4 1982{
1dc32918 1983 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1984 struct e1000_buffer *buffer_info;
1985 unsigned long size;
1986 unsigned int i;
1987
1988 /* Free all the Tx ring sk_buffs */
1989
96838a40 1990 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1991 buffer_info = &tx_ring->buffer_info[i];
1992 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1993 }
1994
2f66fd36 1995 netdev_reset_queue(adapter->netdev);
1da177e4
LT		 1996 size = sizeof(struct e1000_buffer) * tx_ring->count;
1997 memset(tx_ring->buffer_info, 0, size);
1998
1999 /* Zero out the descriptor ring */
2000
2001 memset(tx_ring->desc, 0, tx_ring->size);
2002
2003 tx_ring->next_to_use = 0;
2004 tx_ring->next_to_clean = 0;
3db1cd5c 2005 tx_ring->last_tx_tso = false;
1da177e4 2006
1dc32918
JP		 2007 writel(0, hw->hw_addr + tx_ring->tdh);
2008 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2009}
2010
2011/**
2012 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2013 * @adapter: board private structure
2014 **/
64798845 2015static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2016{
2017 int i;
2018
f56799ea 2019 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2020 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2021}
2022
2023/**
2024 * e1000_free_rx_resources - Free Rx Resources
2025 * @adapter: board private structure
581d708e 2026 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2027 *
2028 * Free all receive software resources
2029 **/
64798845
JP		 2030static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2031 struct e1000_rx_ring *rx_ring)
1da177e4 2032{
1da177e4
LT		 2033 struct pci_dev *pdev = adapter->pdev;
2034
581d708e 2035 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2036
2037 vfree(rx_ring->buffer_info);
2038 rx_ring->buffer_info = NULL;
2039
b16f53be
NN		 2040 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2041 rx_ring->dma);
1da177e4
LT		 2042
2043 rx_ring->desc = NULL;
2044}
2045
2046/**
581d708e 2047 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2048 * @adapter: board private structure
581d708e
MC		 2049 *
2050 * Free all receive software resources
2051 **/
64798845 2052void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2053{
2054 int i;
2055
f56799ea 2056 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2057 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2058}
2059
2060/**
2061 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2062 * @adapter: board private structure
2063 * @rx_ring: ring to free buffers from
1da177e4 2064 **/
64798845
JP		 2065static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2066 struct e1000_rx_ring *rx_ring)
1da177e4 2067{
1dc32918 2068 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2069 struct e1000_buffer *buffer_info;
2070 struct pci_dev *pdev = adapter->pdev;
2071 unsigned long size;
630b25cd 2072 unsigned int i;
1da177e4
LT		 2073
2074 /* Free all the Rx ring sk_buffs */
96838a40 2075 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2076 buffer_info = &rx_ring->buffer_info[i];
edbbb3ca
JB		 2077 if (buffer_info->dma &&
2078 adapter->clean_rx == e1000_clean_rx_irq) {
b16f53be 2079 dma_unmap_single(&pdev->dev, buffer_info->dma,
edbbb3ca 2080 buffer_info->length,
b16f53be 2081 DMA_FROM_DEVICE);
edbbb3ca
JB		 2082 } else if (buffer_info->dma &&
2083 adapter->clean_rx == e1000_clean_jumbo_rx_irq) {
b16f53be
NN		 2084 dma_unmap_page(&pdev->dev, buffer_info->dma,
2085 buffer_info->length,
2086 DMA_FROM_DEVICE);
679be3ba 2087 }
1da177e4 2088
679be3ba 2089 buffer_info->dma = 0;
edbbb3ca
JB		 2090 if (buffer_info->page) {
2091 put_page(buffer_info->page);
2092 buffer_info->page = NULL;
2093 }
679be3ba 2094 if (buffer_info->skb) {
1da177e4
LT		 2095 dev_kfree_skb(buffer_info->skb);
2096 buffer_info->skb = NULL;
997f5cbd 2097 }
1da177e4
LT		 2098 }
2099
edbbb3ca
JB		 2100 /* there also may be some cached data from a chained receive */
2101 if (rx_ring->rx_skb_top) {
2102 dev_kfree_skb(rx_ring->rx_skb_top);
2103 rx_ring->rx_skb_top = NULL;
2104 }
2105
1da177e4
LT		 2106 size = sizeof(struct e1000_buffer) * rx_ring->count;
2107 memset(rx_ring->buffer_info, 0, size);
2108
2109 /* Zero out the descriptor ring */
1da177e4
LT		 2110 memset(rx_ring->desc, 0, rx_ring->size);
2111
2112 rx_ring->next_to_clean = 0;
2113 rx_ring->next_to_use = 0;
2114
1dc32918
JP		 2115 writel(0, hw->hw_addr + rx_ring->rdh);
2116 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2117}
2118
2119/**
2120 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2121 * @adapter: board private structure
2122 **/
64798845 2123static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2124{
2125 int i;
2126
f56799ea 2127 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2128 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2129}
2130
2131/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2132 * and memory write and invalidate disabled for certain operations
2133 */
64798845 2134static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2135{
1dc32918 2136 struct e1000_hw *hw = &adapter->hw;
1da177e4 2137 struct net_device *netdev = adapter->netdev;
406874a7 2138 u32 rctl;
1da177e4 2139
1dc32918 2140 e1000_pci_clear_mwi(hw);
1da177e4 2141
1dc32918 2142 rctl = er32(RCTL);
1da177e4 2143 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2144 ew32(RCTL, rctl);
2145 E1000_WRITE_FLUSH();
1da177e4
LT		 2146 mdelay(5);
2147
96838a40 2148 if (netif_running(netdev))
581d708e 2149 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2150}
2151
64798845 2152static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2153{
1dc32918 2154 struct e1000_hw *hw = &adapter->hw;
1da177e4 2155 struct net_device *netdev = adapter->netdev;
406874a7 2156 u32 rctl;
1da177e4 2157
1dc32918 2158 rctl = er32(RCTL);
1da177e4 2159 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2160 ew32(RCTL, rctl);
2161 E1000_WRITE_FLUSH();
1da177e4
LT		 2162 mdelay(5);
2163
1dc32918
JP		 2164 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2165 e1000_pci_set_mwi(hw);
1da177e4 2166
96838a40 2167 if (netif_running(netdev)) {
72d64a43
JK		 2168 /* No need to loop, because 82542 supports only 1 queue */
2169 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2170 e1000_configure_rx(adapter);
72d64a43 2171 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2172 }
2173}
2174
2175/**
2176 * e1000_set_mac - Change the Ethernet Address of the NIC
2177 * @netdev: network interface device structure
2178 * @p: pointer to an address structure
2179 *
2180 * Returns 0 on success, negative on failure
2181 **/
64798845 2182static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2183{
60490fe0 2184 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2185 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2186 struct sockaddr *addr = p;
2187
96838a40 2188 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2189 return -EADDRNOTAVAIL;
2190
2191 /* 82542 2.0 needs to be in reset to write receive address registers */
2192
1dc32918 2193 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2194 e1000_enter_82542_rst(adapter);
2195
2196 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2197 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2198
1dc32918 2199 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2200
1dc32918 2201 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2202 e1000_leave_82542_rst(adapter);
2203
2204 return 0;
2205}
2206
2207/**
db0ce50d 2208 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2209 * @netdev: network interface device structure
2210 *
db0ce50d
PM		 2211 * The set_rx_mode entry point is called whenever the unicast or multicast
2212 * address lists or the network interface flags are updated. This routine is
2213 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2214 * promiscuous mode, and all-multi behavior.
2215 **/
64798845 2216static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2217{
60490fe0 2218 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2219 struct e1000_hw *hw = &adapter->hw;
ccffad25
JP		 2220 struct netdev_hw_addr *ha;
2221 bool use_uc = false;
406874a7
JP		 2222 u32 rctl;
2223 u32 hash_value;
868d5309 2224 int i, rar_entries = E1000_RAR_ENTRIES;
1532ecea 2225 int mta_reg_count = E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2226 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2227
14f8dc49 2228 if (!mcarray)
81c52285 2229 return;
cd94dd0b 2230
2648345f
MC		 2231 /* Check for Promiscuous and All Multicast modes */
2232
1dc32918 2233 rctl = er32(RCTL);
1da177e4 2234
96838a40 2235 if (netdev->flags & IFF_PROMISC) {
1da177e4 2236 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2237 rctl &= ~E1000_RCTL_VFE;
1da177e4 2238 } else {
1532ecea 2239 if (netdev->flags & IFF_ALLMULTI)
746b9f02 2240 rctl |= E1000_RCTL_MPE;
1532ecea 2241 else
746b9f02 2242 rctl &= ~E1000_RCTL_MPE;
1532ecea 2243 /* Enable VLAN filter if there is a VLAN */
5622e404 2244 if (e1000_vlan_used(adapter))
1532ecea 2245 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2246 }
2247
32e7bfc4 2248 if (netdev_uc_count(netdev) > rar_entries - 1) {
db0ce50d
PM		 2249 rctl |= E1000_RCTL_UPE;
2250 } else if (!(netdev->flags & IFF_PROMISC)) {
2251 rctl &= ~E1000_RCTL_UPE;
ccffad25 2252 use_uc = true;
1da177e4
LT		 2253 }
2254
1dc32918 2255 ew32(RCTL, rctl);
1da177e4
LT		 2256
2257 /* 82542 2.0 needs to be in reset to write receive address registers */
2258
96838a40 2259 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2260 e1000_enter_82542_rst(adapter);
2261
db0ce50d
PM		 2262 /* load the first 14 addresses into the exact filters 1-14. Unicast
2263 * addresses take precedence to avoid disabling unicast filtering
2264 * when possible.
2265 *
b595076a 2266 * RAR 0 is used for the station MAC address
1da177e4
LT		 2267 * if there are not 14 addresses, go ahead and clear the filters
2268 */
ccffad25
JP		 2269 i = 1;
2270 if (use_uc)
32e7bfc4 2271 netdev_for_each_uc_addr(ha, netdev) {
ccffad25
JP		 2272 if (i == rar_entries)
2273 break;
2274 e1000_rar_set(hw, ha->addr, i++);
2275 }
2276
22bedad3 2277 netdev_for_each_mc_addr(ha, netdev) {
7a81e9f3
JP		 2278 if (i == rar_entries) {
2279 /* load any remaining addresses into the hash table */
2280 u32 hash_reg, hash_bit, mta;
22bedad3 2281 hash_value = e1000_hash_mc_addr(hw, ha->addr);
7a81e9f3
JP		 2282 hash_reg = (hash_value >> 5) & 0x7F;
2283 hash_bit = hash_value & 0x1F;
2284 mta = (1 << hash_bit);
2285 mcarray[hash_reg] |= mta;
10886af5 2286 } else {
22bedad3 2287 e1000_rar_set(hw, ha->addr, i++);
1da177e4
LT		 2288 }
2289 }
2290
7a81e9f3
JP		 2291 for (; i < rar_entries; i++) {
2292 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2293 E1000_WRITE_FLUSH();
2294 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2295 E1000_WRITE_FLUSH();
1da177e4
LT		 2296 }
2297
81c52285 2298 /* write the hash table completely, write from bottom to avoid
6cfbd97b
JK		 2299 * both stupid write combining chipsets, and flushing each write
2300 */
81c52285 2301 for (i = mta_reg_count - 1; i >= 0 ; i--) {
6cfbd97b 2302 /* If we are on an 82544 has an errata where writing odd
81c52285
JB		 2303 * offsets overwrites the previous even offset, but writing
2304 * backwards over the range solves the issue by always
2305 * writing the odd offset first
2306 */
2307 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2308 }
2309 E1000_WRITE_FLUSH();
2310
96838a40 2311 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2312 e1000_leave_82542_rst(adapter);
81c52285
JB		 2313
2314 kfree(mcarray);
1da177e4
LT		 2315}
2316
a4010afe
JB		 2317/**
2318 * e1000_update_phy_info_task - get phy info
2319 * @work: work struct contained inside adapter struct
2320 *
2321 * Need to wait a few seconds after link up to get diagnostic information from
2322 * the phy
2323 */
5cf42fcd
JB		 2324static void e1000_update_phy_info_task(struct work_struct *work)
2325{
2326 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2327 struct e1000_adapter,
2328 phy_info_task.work);
0ef4eedc
JB		 2329 if (test_bit(__E1000_DOWN, &adapter->flags))
2330 return;
2331 mutex_lock(&adapter->mutex);
a4010afe 2332 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
0ef4eedc 2333 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2334}
2335
5cf42fcd
JB		 2336/**
2337 * e1000_82547_tx_fifo_stall_task - task to complete work
2338 * @work: work struct contained inside adapter struct
2339 **/
2340static void e1000_82547_tx_fifo_stall_task(struct work_struct *work)
2341{
2342 struct e1000_adapter *adapter = container_of(work,
a4010afe
JB		 2343 struct e1000_adapter,
2344 fifo_stall_task.work);
1dc32918 2345 struct e1000_hw *hw = &adapter->hw;
1da177e4 2346 struct net_device *netdev = adapter->netdev;
406874a7 2347 u32 tctl;
1da177e4 2348
0ef4eedc
JB		 2349 if (test_bit(__E1000_DOWN, &adapter->flags))
2350 return;
2351 mutex_lock(&adapter->mutex);
96838a40 2352 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2353 if ((er32(TDT) == er32(TDH)) &&
2354 (er32(TDFT) == er32(TDFH)) &&
2355 (er32(TDFTS) == er32(TDFHS))) {
2356 tctl = er32(TCTL);
2357 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2358 ew32(TDFT, adapter->tx_head_addr);
2359 ew32(TDFH, adapter->tx_head_addr);
2360 ew32(TDFTS, adapter->tx_head_addr);
2361 ew32(TDFHS, adapter->tx_head_addr);
2362 ew32(TCTL, tctl);
2363 E1000_WRITE_FLUSH();
1da177e4
LT		 2364
2365 adapter->tx_fifo_head = 0;
2366 atomic_set(&adapter->tx_fifo_stall, 0);
2367 netif_wake_queue(netdev);
baa34745 2368 } else if (!test_bit(__E1000_DOWN, &adapter->flags)) {
a4010afe 2369 schedule_delayed_work(&adapter->fifo_stall_task, 1);
1da177e4
LT		 2370 }
2371 }
0ef4eedc 2372 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2373}
2374
b548192a 2375bool e1000_has_link(struct e1000_adapter *adapter)
be0f0719
JB		 2376{
2377 struct e1000_hw *hw = &adapter->hw;
2378 bool link_active = false;
be0f0719 2379
6d9e5130
NS		 2380 /* get_link_status is set on LSC (link status) interrupt or rx
2381 * sequence error interrupt (except on intel ce4100).
2382 * get_link_status will stay false until the
2383 * e1000_check_for_link establishes link for copper adapters
2384 * ONLY
be0f0719
JB		 2385 */
2386 switch (hw->media_type) {
2387 case e1000_media_type_copper:
6d9e5130
NS		 2388 if (hw->mac_type == e1000_ce4100)
2389 hw->get_link_status = 1;
be0f0719 2390 if (hw->get_link_status) {
120a5d0d 2391 e1000_check_for_link(hw);
be0f0719
JB		 2392 link_active = !hw->get_link_status;
2393 } else {
2394 link_active = true;
2395 }
2396 break;
2397 case e1000_media_type_fiber:
120a5d0d 2398 e1000_check_for_link(hw);
be0f0719
JB		 2399 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
2400 break;
2401 case e1000_media_type_internal_serdes:
120a5d0d 2402 e1000_check_for_link(hw);
be0f0719
JB		 2403 link_active = hw->serdes_has_link;
2404 break;
2405 default:
2406 break;
2407 }
2408
2409 return link_active;
2410}
2411
1da177e4 2412/**
a4010afe
JB		 2413 * e1000_watchdog - work function
2414 * @work: work struct contained inside adapter struct
1da177e4 2415 **/
a4010afe 2416static void e1000_watchdog(struct work_struct *work)
1da177e4 2417{
a4010afe
JB		 2418 struct e1000_adapter *adapter = container_of(work,
2419 struct e1000_adapter,
2420 watchdog_task.work);
1dc32918 2421 struct e1000_hw *hw = &adapter->hw;
1da177e4 2422 struct net_device *netdev = adapter->netdev;
545c67c0 2423 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7 2424 u32 link, tctl;
90fb5135 2425
0ef4eedc
JB		 2426 if (test_bit(__E1000_DOWN, &adapter->flags))
2427 return;
2428
2429 mutex_lock(&adapter->mutex);
be0f0719
JB		 2430 link = e1000_has_link(adapter);
2431 if ((netif_carrier_ok(netdev)) && link)
2432 goto link_up;
1da177e4 2433
96838a40
JB		 2434 if (link) {
2435 if (!netif_carrier_ok(netdev)) {
406874a7 2436 u32 ctrl;
c3033b01 2437 bool txb2b = true;
be0f0719 2438 /* update snapshot of PHY registers on LSC */
1dc32918 2439 e1000_get_speed_and_duplex(hw,
6cfbd97b
JK		 2440 &adapter->link_speed,
2441 &adapter->link_duplex);
1da177e4 2442
1dc32918 2443 ctrl = er32(CTRL);
675ad473
ET		 2444 pr_info("%s NIC Link is Up %d Mbps %s, "
2445 "Flow Control: %s\n",
2446 netdev->name,
2447 adapter->link_speed,
2448 adapter->link_duplex == FULL_DUPLEX ?
2449 "Full Duplex" : "Half Duplex",
2450 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2451 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2452 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2453 E1000_CTRL_TFCE) ? "TX" : "None")));
1da177e4 2454
39ca5f03 2455 /* adjust timeout factor according to speed/duplex */
66a2b0a3 2456 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2457 switch (adapter->link_speed) {
2458 case SPEED_10:
c3033b01 2459 txb2b = false;
be0f0719 2460 adapter->tx_timeout_factor = 16;
7e6c9861
JK		 2461 break;
2462 case SPEED_100:
c3033b01 2463 txb2b = false;
7e6c9861
JK		 2464 /* maybe add some timeout factor ? */
2465 break;
2466 }
2467
1532ecea 2468 /* enable transmits in the hardware */
1dc32918 2469 tctl = er32(TCTL);
7e6c9861 2470 tctl |= E1000_TCTL_EN;
1dc32918 2471 ew32(TCTL, tctl);
66a2b0a3 2472
1da177e4 2473 netif_carrier_on(netdev);
baa34745 2474 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2475 schedule_delayed_work(&adapter->phy_info_task,
2476 2 * HZ);
1da177e4
LT		 2477 adapter->smartspeed = 0;
2478 }
2479 } else {
96838a40 2480 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2481 adapter->link_speed = 0;
2482 adapter->link_duplex = 0;
675ad473
ET		 2483 pr_info("%s NIC Link is Down\n",
2484 netdev->name);
1da177e4 2485 netif_carrier_off(netdev);
baa34745
JB		 2486
2487 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe
JB		 2488 schedule_delayed_work(&adapter->phy_info_task,
2489 2 * HZ);
1da177e4
LT		 2490 }
2491
2492 e1000_smartspeed(adapter);
2493 }
2494
be0f0719 2495link_up:
1da177e4
LT		 2496 e1000_update_stats(adapter);
2497
1dc32918 2498 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2499 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2500 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2501 adapter->colc_old = adapter->stats.colc;
2502
2503 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2504 adapter->gorcl_old = adapter->stats.gorcl;
2505 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2506 adapter->gotcl_old = adapter->stats.gotcl;
2507
1dc32918 2508 e1000_update_adaptive(hw);
1da177e4 2509
f56799ea 2510 if (!netif_carrier_ok(netdev)) {
581d708e 2511 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2512 /* We've lost link, so the controller stops DMA,
2513 * but we've got queued Tx work that's never going
2514 * to get done, so reset controller to flush Tx.
6cfbd97b
JK		 2515 * (Do the reset outside of interrupt context).
2516 */
87041639
JK		 2517 adapter->tx_timeout_count++;
2518 schedule_work(&adapter->reset_task);
0ef4eedc
JB		 2519 /* exit immediately since reset is imminent */
2520 goto unlock;
1da177e4
LT		 2521 }
2522 }
2523
eab2abf5
JB		 2524 /* Simple mode for Interrupt Throttle Rate (ITR) */
2525 if (hw->mac_type >= e1000_82540 && adapter->itr_setting == 4) {
6cfbd97b 2526 /* Symmetric Tx/Rx gets a reduced ITR=2000;
eab2abf5
JB		 2527 * Total asymmetrical Tx or Rx gets ITR=8000;
2528 * everyone else is between 2000-8000.
2529 */
2530 u32 goc = (adapter->gotcl + adapter->gorcl) / 10000;
2531 u32 dif = (adapter->gotcl > adapter->gorcl ?
2532 adapter->gotcl - adapter->gorcl :
2533 adapter->gorcl - adapter->gotcl) / 10000;
2534 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2535
2536 ew32(ITR, 1000000000 / (itr * 256));
2537 }
2538
1da177e4 2539 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2540 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2541
2648345f 2542 /* Force detection of hung controller every watchdog period */
c3033b01 2543 adapter->detect_tx_hung = true;
1da177e4 2544
a4010afe 2545 /* Reschedule the task */
baa34745 2546 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 2547 schedule_delayed_work(&adapter->watchdog_task, 2 * HZ);
0ef4eedc
JB		 2548
2549unlock:
2550 mutex_unlock(&adapter->mutex);
1da177e4
LT		 2551}
2552
835bb129
JB		 2553enum latency_range {
2554 lowest_latency = 0,
2555 low_latency = 1,
2556 bulk_latency = 2,
2557 latency_invalid = 255
2558};
2559
2560/**
2561 * e1000_update_itr - update the dynamic ITR value based on statistics
8fce4731
JB		 2562 * @adapter: pointer to adapter
2563 * @itr_setting: current adapter->itr
2564 * @packets: the number of packets during this measurement interval
2565 * @bytes: the number of bytes during this measurement interval
2566 *
835bb129
JB		 2567 * Stores a new ITR value based on packets and byte
2568 * counts during the last interrupt. The advantage of per interrupt
2569 * computation is faster updates and more accurate ITR for the current
2570 * traffic pattern. Constants in this function were computed
2571 * based on theoretical maximum wire speed and thresholds were set based
2572 * on testing data as well as attempting to minimize response time
2573 * while increasing bulk throughput.
2574 * this functionality is controlled by the InterruptThrottleRate module
2575 * parameter (see e1000_param.c)
835bb129
JB		 2576 **/
2577static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2578 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2579{
2580 unsigned int retval = itr_setting;
2581 struct e1000_hw *hw = &adapter->hw;
2582
2583 if (unlikely(hw->mac_type < e1000_82540))
2584 goto update_itr_done;
2585
2586 if (packets == 0)
2587 goto update_itr_done;
2588
835bb129
JB		 2589 switch (itr_setting) {
2590 case lowest_latency:
2b65326e
JB		 2591 /* jumbo frames get bulk treatment*/
2592 if (bytes/packets > 8000)
2593 retval = bulk_latency;
2594 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2595 retval = low_latency;
2596 break;
2597 case low_latency: /* 50 usec aka 20000 ints/s */
2598 if (bytes > 10000) {
2b65326e
JB		 2599 /* jumbo frames need bulk latency setting */
2600 if (bytes/packets > 8000)
2601 retval = bulk_latency;
2602 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2603 retval = bulk_latency;
2604 else if ((packets > 35))
2605 retval = lowest_latency;
2b65326e
JB		 2606 } else if (bytes/packets > 2000)
2607 retval = bulk_latency;
2608 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2609 retval = lowest_latency;
2610 break;
2611 case bulk_latency: /* 250 usec aka 4000 ints/s */
2612 if (bytes > 25000) {
2613 if (packets > 35)
2614 retval = low_latency;
2b65326e
JB		 2615 } else if (bytes < 6000) {
2616 retval = low_latency;
835bb129
JB		 2617 }
2618 break;
2619 }
2620
2621update_itr_done:
2622 return retval;
2623}
2624
2625static void e1000_set_itr(struct e1000_adapter *adapter)
2626{
2627 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2628 u16 current_itr;
2629 u32 new_itr = adapter->itr;
835bb129
JB		 2630
2631 if (unlikely(hw->mac_type < e1000_82540))
2632 return;
2633
2634 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2635 if (unlikely(adapter->link_speed != SPEED_1000)) {
2636 current_itr = 0;
2637 new_itr = 4000;
2638 goto set_itr_now;
2639 }
2640
6cfbd97b
JK		 2641 adapter->tx_itr = e1000_update_itr(adapter, adapter->tx_itr,
2642 adapter->total_tx_packets,
2643 adapter->total_tx_bytes);
2b65326e
JB		 2644 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2645 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2646 adapter->tx_itr = low_latency;
2647
6cfbd97b
JK		 2648 adapter->rx_itr = e1000_update_itr(adapter, adapter->rx_itr,
2649 adapter->total_rx_packets,
2650 adapter->total_rx_bytes);
2b65326e
JB		 2651 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2652 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2653 adapter->rx_itr = low_latency;
835bb129
JB		 2654
2655 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2656
835bb129
JB		 2657 switch (current_itr) {
2658 /* counts and packets in update_itr are dependent on these numbers */
2659 case lowest_latency:
2660 new_itr = 70000;
2661 break;
2662 case low_latency:
2663 new_itr = 20000; /* aka hwitr = ~200 */
2664 break;
2665 case bulk_latency:
2666 new_itr = 4000;
2667 break;
2668 default:
2669 break;
2670 }
2671
2672set_itr_now:
2673 if (new_itr != adapter->itr) {
2674 /* this attempts to bias the interrupt rate towards Bulk
2675 * by adding intermediate steps when interrupt rate is
6cfbd97b
JK		 2676 * increasing
2677 */
835bb129 2678 new_itr = new_itr > adapter->itr ?
6cfbd97b
JK		 2679 min(adapter->itr + (new_itr >> 2), new_itr) :
2680 new_itr;
835bb129 2681 adapter->itr = new_itr;
1dc32918 2682 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129 2683 }
835bb129
JB		 2684}
2685
1da177e4
LT		 2686#define E1000_TX_FLAGS_CSUM 0x00000001
2687#define E1000_TX_FLAGS_VLAN 0x00000002
2688#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2689#define E1000_TX_FLAGS_IPV4 0x00000008
11a78dcf 2690#define E1000_TX_FLAGS_NO_FCS 0x00000010
1da177e4
LT		 2691#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2692#define E1000_TX_FLAGS_VLAN_SHIFT 16
2693
64798845
JP		 2694static int e1000_tso(struct e1000_adapter *adapter,
2695 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2696{
1da177e4 2697 struct e1000_context_desc *context_desc;
545c67c0 2698 struct e1000_buffer *buffer_info;
1da177e4 2699 unsigned int i;
406874a7
JP		 2700 u32 cmd_length = 0;
2701 u16 ipcse = 0, tucse, mss;
2702 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2703 int err;
2704
89114afd 2705 if (skb_is_gso(skb)) {
1da177e4
LT		 2706 if (skb_header_cloned(skb)) {
2707 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2708 if (err)
2709 return err;
2710 }
2711
ab6a5bb6 2712 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2713 mss = skb_shinfo(skb)->gso_size;
60828236 2714 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2715 struct iphdr *iph = ip_hdr(skb);
2716 iph->tot_len = 0;
2717 iph->check = 0;
aa8223c7
ACM		 2718 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2719 iph->daddr, 0,
2720 IPPROTO_TCP,
2721 0);
2d7edb92 2722 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2723 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2724 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2725 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2726 tcp_hdr(skb)->check =
0660e03f
ACM		 2727 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2728 &ipv6_hdr(skb)->daddr,
2729 0, IPPROTO_TCP, 0);
2d7edb92 2730 ipcse = 0;
2d7edb92 2731 }
bbe735e4 2732 ipcss = skb_network_offset(skb);
eddc9ec5 2733 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2734 tucss = skb_transport_offset(skb);
aa8223c7 2735 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2736 tucse = 0;
2737
2738 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2739 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2740
581d708e
MC		 2741 i = tx_ring->next_to_use;
2742 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2743 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2744
2745 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2746 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2747 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2748 context_desc->upper_setup.tcp_fields.tucss = tucss;
2749 context_desc->upper_setup.tcp_fields.tucso = tucso;
2750 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2751 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2752 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2753 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2754
545c67c0 2755 buffer_info->time_stamp = jiffies;
a9ebadd6 2756 buffer_info->next_to_watch = i;
545c67c0 2757
581d708e
MC		 2758 if (++i == tx_ring->count) i = 0;
2759 tx_ring->next_to_use = i;
1da177e4 2760
c3033b01 2761 return true;
1da177e4 2762 }
c3033b01 2763 return false;
1da177e4
LT		 2764}
2765
64798845
JP		 2766static bool e1000_tx_csum(struct e1000_adapter *adapter,
2767 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2768{
2769 struct e1000_context_desc *context_desc;
545c67c0 2770 struct e1000_buffer *buffer_info;
1da177e4 2771 unsigned int i;
406874a7 2772 u8 css;
3ed30676 2773 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2774
3ed30676
DG		 2775 if (skb->ip_summed != CHECKSUM_PARTIAL)
2776 return false;
1da177e4 2777
3ed30676 2778 switch (skb->protocol) {
09640e63 2779 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2780 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2781 cmd_len |= E1000_TXD_CMD_TCP;
2782 break;
09640e63 2783 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2784 /* XXX not handling all IPV6 headers */
2785 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2786 cmd_len |= E1000_TXD_CMD_TCP;
2787 break;
2788 default:
2789 if (unlikely(net_ratelimit()))
feb8f478
ET		 2790 e_warn(drv, "checksum_partial proto=%x!\n",
2791 skb->protocol);
3ed30676
DG		 2792 break;
2793 }
1da177e4 2794
0d0b1672 2795 css = skb_checksum_start_offset(skb);
1da177e4 2796
3ed30676
DG		 2797 i = tx_ring->next_to_use;
2798 buffer_info = &tx_ring->buffer_info[i];
2799 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2800
3ed30676
DG		 2801 context_desc->lower_setup.ip_config = 0;
2802 context_desc->upper_setup.tcp_fields.tucss = css;
2803 context_desc->upper_setup.tcp_fields.tucso =
2804 css + skb->csum_offset;
2805 context_desc->upper_setup.tcp_fields.tucse = 0;
2806 context_desc->tcp_seg_setup.data = 0;
2807 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2808
3ed30676
DG		 2809 buffer_info->time_stamp = jiffies;
2810 buffer_info->next_to_watch = i;
1da177e4 2811
3ed30676
DG		 2812 if (unlikely(++i == tx_ring->count)) i = 0;
2813 tx_ring->next_to_use = i;
2814
2815 return true;
1da177e4
LT		 2816}
2817
2818#define E1000_MAX_TXD_PWR 12
2819#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2820
64798845
JP		 2821static int e1000_tx_map(struct e1000_adapter *adapter,
2822 struct e1000_tx_ring *tx_ring,
2823 struct sk_buff *skb, unsigned int first,
2824 unsigned int max_per_txd, unsigned int nr_frags,
2825 unsigned int mss)
1da177e4 2826{
1dc32918 2827 struct e1000_hw *hw = &adapter->hw;
602c0554 2828 struct pci_dev *pdev = adapter->pdev;
37e73df8 2829 struct e1000_buffer *buffer_info;
d20b606c 2830 unsigned int len = skb_headlen(skb);
602c0554 2831 unsigned int offset = 0, size, count = 0, i;
31c15a2f 2832 unsigned int f, bytecount, segs;
1da177e4
LT		 2833
2834 i = tx_ring->next_to_use;
2835
96838a40 2836 while (len) {
37e73df8 2837 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2838 size = min(len, max_per_txd);
fd803241
JK		 2839 /* Workaround for Controller erratum --
2840 * descriptor for non-tso packet in a linear SKB that follows a
2841 * tso gets written back prematurely before the data is fully
6cfbd97b
JK		 2842 * DMA'd to the controller
2843 */
fd803241 2844 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2845 !skb_is_gso(skb)) {
3db1cd5c 2846 tx_ring->last_tx_tso = false;
fd803241
JK		 2847 size -= 4;
2848 }
2849
1da177e4 2850 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2851 * in TSO mode. Append 4-byte sentinel desc
2852 */
96838a40 2853 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2854 size -= 4;
97338bde
MC		 2855 /* work-around for errata 10 and it applies
2856 * to all controllers in PCI-X mode
2857 * The fix is to make sure that the first descriptor of a
2858 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2859 */
1dc32918 2860 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2861 (size > 2015) && count == 0))
2862 size = 2015;
96838a40 2863
1da177e4 2864 /* Workaround for potential 82544 hang in PCI-X. Avoid
6cfbd97b
JK		 2865 * terminating buffers within evenly-aligned dwords.
2866 */
96838a40 2867 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2868 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2869 size > 4))
2870 size -= 4;
2871
2872 buffer_info->length = size;
cdd7549e 2873 /* set time_stamp *before* dma to help avoid a possible race */
1da177e4 2874 buffer_info->time_stamp = jiffies;
602c0554 2875 buffer_info->mapped_as_page = false;
b16f53be
NN		 2876 buffer_info->dma = dma_map_single(&pdev->dev,
2877 skb->data + offset,
6cfbd97b 2878 size, DMA_TO_DEVICE);
b16f53be 2879 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2880 goto dma_error;
a9ebadd6 2881 buffer_info->next_to_watch = i;
1da177e4
LT		 2882
2883 len -= size;
2884 offset += size;
2885 count++;
37e73df8
AD		 2886 if (len) {
2887 i++;
2888 if (unlikely(i == tx_ring->count))
2889 i = 0;
2890 }
1da177e4
LT		 2891 }
2892
96838a40 2893 for (f = 0; f < nr_frags; f++) {
9e903e08 2894 const struct skb_frag_struct *frag;
1da177e4
LT		 2895
2896 frag = &skb_shinfo(skb)->frags[f];
9e903e08 2897 len = skb_frag_size(frag);
877749bf 2898 offset = 0;
1da177e4 2899
96838a40 2900 while (len) {
877749bf 2901 unsigned long bufend;
37e73df8
AD		 2902 i++;
2903 if (unlikely(i == tx_ring->count))
2904 i = 0;
2905
1da177e4
LT		 2906 buffer_info = &tx_ring->buffer_info[i];
2907 size = min(len, max_per_txd);
1da177e4 2908 /* Workaround for premature desc write-backs
6cfbd97b
JK		 2909 * in TSO mode. Append 4-byte sentinel desc
2910 */
2911 if (unlikely(mss && f == (nr_frags-1) &&
2912 size == len && size > 8))
1da177e4 2913 size -= 4;
1da177e4
LT		 2914 /* Workaround for potential 82544 hang in PCI-X.
2915 * Avoid terminating buffers within evenly-aligned
6cfbd97b
JK		 2916 * dwords.
2917 */
877749bf
IC		 2918 bufend = (unsigned long)
2919 page_to_phys(skb_frag_page(frag));
2920 bufend += offset + size - 1;
96838a40 2921 if (unlikely(adapter->pcix_82544 &&
877749bf
IC		 2922 !(bufend & 4) &&
2923 size > 4))
1da177e4
LT		 2924 size -= 4;
2925
2926 buffer_info->length = size;
1da177e4 2927 buffer_info->time_stamp = jiffies;
602c0554 2928 buffer_info->mapped_as_page = true;
877749bf
IC		 2929 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
2930 offset, size, DMA_TO_DEVICE);
b16f53be 2931 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
602c0554 2932 goto dma_error;
a9ebadd6 2933 buffer_info->next_to_watch = i;
1da177e4
LT		 2934
2935 len -= size;
2936 offset += size;
2937 count++;
1da177e4
LT		 2938 }
2939 }
2940
31c15a2f
DN		 2941 segs = skb_shinfo(skb)->gso_segs ?: 1;
2942 /* multiply data chunks by size of headers */
2943 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
2944
1da177e4 2945 tx_ring->buffer_info[i].skb = skb;
31c15a2f
DN		 2946 tx_ring->buffer_info[i].segs = segs;
2947 tx_ring->buffer_info[i].bytecount = bytecount;
1da177e4
LT		 2948 tx_ring->buffer_info[first].next_to_watch = i;
2949
2950 return count;
602c0554
AD		 2951
2952dma_error:
2953 dev_err(&pdev->dev, "TX DMA map failed\n");
2954 buffer_info->dma = 0;
c1fa347f 2955 if (count)
602c0554 2956 count--;
c1fa347f
RK		 2957
2958 while (count--) {
2959 if (i==0)
602c0554 2960 i += tx_ring->count;
c1fa347f 2961 i--;
602c0554
AD		 2962 buffer_info = &tx_ring->buffer_info[i];
2963 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2964 }
2965
2966 return 0;
1da177e4
LT		 2967}
2968
64798845
JP		 2969static void e1000_tx_queue(struct e1000_adapter *adapter,
2970 struct e1000_tx_ring *tx_ring, int tx_flags,
2971 int count)
1da177e4 2972{
1dc32918 2973 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2974 struct e1000_tx_desc *tx_desc = NULL;
2975 struct e1000_buffer *buffer_info;
406874a7 2976 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 2977 unsigned int i;
2978
96838a40 2979 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4 2980 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
6cfbd97b 2981 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2982 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2983
96838a40 2984 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2985 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2986 }
2987
96838a40 2988 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2989 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2990 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2991 }
2992
96838a40 2993 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2994 txd_lower |= E1000_TXD_CMD_VLE;
2995 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2996 }
2997
11a78dcf
BG		 2998 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
2999 txd_lower &= ~(E1000_TXD_CMD_IFCS);
3000
1da177e4
LT		 3001 i = tx_ring->next_to_use;
3002
96838a40 3003 while (count--) {
1da177e4
LT		 3004 buffer_info = &tx_ring->buffer_info[i];
3005 tx_desc = E1000_TX_DESC(*tx_ring, i);
3006 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3007 tx_desc->lower.data =
3008 cpu_to_le32(txd_lower | buffer_info->length);
3009 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3010 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3011 }
3012
3013 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3014
11a78dcf
BG		 3015 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
3016 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
3017 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
3018
1da177e4
LT		 3019 /* Force memory writes to complete before letting h/w
3020 * know there are new descriptors to fetch. (Only
3021 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 3022 * such as IA-64).
3023 */
1da177e4
LT		 3024 wmb();
3025
3026 tx_ring->next_to_use = i;
1dc32918 3027 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f 3028 /* we need this if more than one processor can write to our tail
6cfbd97b
JK		 3029 * at a time, it synchronizes IO on IA64/Altix systems
3030 */
2ce9047f 3031 mmiowb();
1da177e4
LT		 3032}
3033
1aa8b471 3034/* 82547 workaround to avoid controller hang in half-duplex environment.
1da177e4
LT		 3035 * The workaround is to avoid queuing a large packet that would span
3036 * the internal Tx FIFO ring boundary by notifying the stack to resend
3037 * the packet at a later time. This gives the Tx FIFO an opportunity to
3038 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3039 * to the beginning of the Tx FIFO.
1aa8b471 3040 */
1da177e4
LT		 3041
3042#define E1000_FIFO_HDR 0x10
3043#define E1000_82547_PAD_LEN 0x3E0
3044
64798845
JP		 3045static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3046 struct sk_buff *skb)
1da177e4 3047{
406874a7
JP		 3048 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3049 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3050
9099cfb9 3051 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3052
96838a40 3053 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3054 goto no_fifo_stall_required;
3055
96838a40 3056 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3057 return 1;
3058
96838a40 3059 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3060 atomic_set(&adapter->tx_fifo_stall, 1);
3061 return 1;
3062 }
3063
3064no_fifo_stall_required:
3065 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3066 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3067 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3068 return 0;
3069}
3070
65c7973f
JB		 3071static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3072{
3073 struct e1000_adapter *adapter = netdev_priv(netdev);
3074 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3075
3076 netif_stop_queue(netdev);
3077 /* Herbert's original patch had:
3078 * smp_mb__after_netif_stop_queue();
6cfbd97b
JK		 3079 * but since that doesn't exist yet, just open code it.
3080 */
65c7973f
JB		 3081 smp_mb();
3082
3083 /* We need to check again in a case another CPU has just
6cfbd97b
JK		 3084 * made room available.
3085 */
65c7973f
JB		 3086 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3087 return -EBUSY;
3088
3089 /* A reprieve! */
3090 netif_start_queue(netdev);
fcfb1224 3091 ++adapter->restart_queue;
65c7973f
JB		 3092 return 0;
3093}
3094
3095static int e1000_maybe_stop_tx(struct net_device *netdev,
6cfbd97b 3096 struct e1000_tx_ring *tx_ring, int size)
65c7973f
JB		 3097{
3098 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3099 return 0;
3100 return __e1000_maybe_stop_tx(netdev, size);
3101}
3102
1da177e4 3103#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 3104static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
3105 struct net_device *netdev)
1da177e4 3106{
60490fe0 3107 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3108 struct e1000_hw *hw = &adapter->hw;
581d708e 3109 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3110 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3111 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3112 unsigned int tx_flags = 0;
e743d313 3113 unsigned int len = skb_headlen(skb);
6d1e3aa7
KK		 3114 unsigned int nr_frags;
3115 unsigned int mss;
1da177e4 3116 int count = 0;
76c224bc 3117 int tso;
1da177e4 3118 unsigned int f;
1da177e4 3119
6cfbd97b 3120 /* This goes back to the question of how to logically map a Tx queue
65c7973f 3121 * to a flow. Right now, performance is impacted slightly negatively
6cfbd97b
JK		 3122 * if using multiple Tx queues. If the stack breaks away from a
3123 * single qdisc implementation, we can look at this again.
3124 */
581d708e 3125 tx_ring = adapter->tx_ring;
24025e4e 3126
581d708e 3127 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3128 dev_kfree_skb_any(skb);
3129 return NETDEV_TX_OK;
3130 }
3131
59d86c76
TD		 3132 /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
3133 * packets may get corrupted during padding by HW.
3134 * To WA this issue, pad all small packets manually.
3135 */
3136 if (skb->len < ETH_ZLEN) {
3137 if (skb_pad(skb, ETH_ZLEN - skb->len))
3138 return NETDEV_TX_OK;
3139 skb->len = ETH_ZLEN;
3140 skb_set_tail_pointer(skb, ETH_ZLEN);
3141 }
3142
7967168c 3143 mss = skb_shinfo(skb)->gso_size;
76c224bc 3144 /* The controller does a simple calculation to
1da177e4
LT		 3145 * make sure there is enough room in the FIFO before
3146 * initiating the DMA for each buffer. The calc is:
3147 * 4 = ceil(buffer len/mss). To make sure we don't
3148 * overrun the FIFO, adjust the max buffer len if mss
6cfbd97b
JK		 3149 * drops.
3150 */
96838a40 3151 if (mss) {
406874a7 3152 u8 hdr_len;
1da177e4
LT		 3153 max_per_txd = min(mss << 2, max_per_txd);
3154 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3155
ab6a5bb6 3156 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3157 if (skb->data_len && hdr_len == len) {
1dc32918 3158 switch (hw->mac_type) {
9f687888 3159 unsigned int pull_size;
683a2aa3
HX		 3160 case e1000_82544:
3161 /* Make sure we have room to chop off 4 bytes,
3162 * and that the end alignment will work out to
3163 * this hardware's requirements
3164 * NOTE: this is a TSO only workaround
3165 * if end byte alignment not correct move us
6cfbd97b
JK		 3166 * into the next dword
3167 */
3168 if ((unsigned long)(skb_tail_pointer(skb) - 1)
3169 & 4)
683a2aa3
HX		 3170 break;
3171 /* fall through */
9f687888
JK		 3172 pull_size = min((unsigned int)4, skb->data_len);
3173 if (!__pskb_pull_tail(skb, pull_size)) {
feb8f478
ET		 3174 e_err(drv, "__pskb_pull_tail "
3175 "failed.\n");
9f687888 3176 dev_kfree_skb_any(skb);
749dfc70 3177 return NETDEV_TX_OK;
9f687888 3178 }
e743d313 3179 len = skb_headlen(skb);
9f687888
JK		 3180 break;
3181 default:
3182 /* do nothing */
3183 break;
d74bbd3b 3184 }
9a3056da 3185 }
1da177e4
LT		 3186 }
3187
9a3056da 3188 /* reserve a descriptor for the offload context */
84fa7933 3189 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3190 count++;
2648345f 3191 count++;
fd803241 3192
fd803241 3193 /* Controller Erratum workaround */
89114afd 3194 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3195 count++;
fd803241 3196
1da177e4
LT		 3197 count += TXD_USE_COUNT(len, max_txd_pwr);
3198
96838a40 3199 if (adapter->pcix_82544)
1da177e4
LT		 3200 count++;
3201
96838a40 3202 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3203 * in PCI-X mode, so add one more descriptor to the count
3204 */
1dc32918 3205 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3206 (len > 2015)))
3207 count++;
3208
1da177e4 3209 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3210 for (f = 0; f < nr_frags; f++)
9e903e08 3211 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
1da177e4 3212 max_txd_pwr);
96838a40 3213 if (adapter->pcix_82544)
1da177e4
LT		 3214 count += nr_frags;
3215
1da177e4 3216 /* need: count + 2 desc gap to keep tail from touching
6cfbd97b
JK		 3217 * head, otherwise try next time
3218 */
8017943e 3219 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3220 return NETDEV_TX_BUSY;
1da177e4 3221
a4010afe
JB		 3222 if (unlikely((hw->mac_type == e1000_82547) &&
3223 (e1000_82547_fifo_workaround(adapter, skb)))) {
3224 netif_stop_queue(netdev);
3225 if (!test_bit(__E1000_DOWN, &adapter->flags))
3226 schedule_delayed_work(&adapter->fifo_stall_task, 1);
3227 return NETDEV_TX_BUSY;
1da177e4
LT		 3228 }
3229
5622e404 3230 if (vlan_tx_tag_present(skb)) {
1da177e4
LT		 3231 tx_flags |= E1000_TX_FLAGS_VLAN;
3232 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3233 }
3234
581d708e 3235 first = tx_ring->next_to_use;
96838a40 3236
581d708e 3237 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3238 if (tso < 0) {
3239 dev_kfree_skb_any(skb);
3240 return NETDEV_TX_OK;
3241 }
3242
fd803241 3243 if (likely(tso)) {
8fce4731 3244 if (likely(hw->mac_type != e1000_82544))
3db1cd5c 3245 tx_ring->last_tx_tso = true;
1da177e4 3246 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3247 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3248 tx_flags |= E1000_TX_FLAGS_CSUM;
3249
60828236 3250 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3251 tx_flags |= E1000_TX_FLAGS_IPV4;
3252
11a78dcf
BG		 3253 if (unlikely(skb->no_fcs))
3254 tx_flags |= E1000_TX_FLAGS_NO_FCS;
3255
37e73df8 3256 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
6cfbd97b 3257 nr_frags, mss);
1da177e4 3258
37e73df8 3259 if (count) {
2f66fd36 3260 netdev_sent_queue(netdev, skb->len);
eab467f5
WB		 3261 skb_tx_timestamp(skb);
3262
37e73df8 3263 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3264 /* Make sure there is space in the ring for the next send. */
3265 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3266
37e73df8
AD		 3267 } else {
3268 dev_kfree_skb_any(skb);
3269 tx_ring->buffer_info[first].time_stamp = 0;
3270 tx_ring->next_to_use = first;
3271 }
1da177e4 3272
1da177e4
LT		 3273 return NETDEV_TX_OK;
3274}
3275
b04e36ba
TD		 3276#define NUM_REGS 38 /* 1 based count */
3277static void e1000_regdump(struct e1000_adapter *adapter)
3278{
3279 struct e1000_hw *hw = &adapter->hw;
3280 u32 regs[NUM_REGS];
3281 u32 *regs_buff = regs;
3282 int i = 0;
3283
e29b5d8f
TD		 3284 static const char * const reg_name[] = {
3285 "CTRL", "STATUS",
3286 "RCTL", "RDLEN", "RDH", "RDT", "RDTR",
3287 "TCTL", "TDBAL", "TDBAH", "TDLEN", "TDH", "TDT",
3288 "TIDV", "TXDCTL", "TADV", "TARC0",
3289 "TDBAL1", "TDBAH1", "TDLEN1", "TDH1", "TDT1",
3290 "TXDCTL1", "TARC1",
3291 "CTRL_EXT", "ERT", "RDBAL", "RDBAH",
3292 "TDFH", "TDFT", "TDFHS", "TDFTS", "TDFPC",
3293 "RDFH", "RDFT", "RDFHS", "RDFTS", "RDFPC"
b04e36ba
TD		 3294 };
3295
3296 regs_buff[0] = er32(CTRL);
3297 regs_buff[1] = er32(STATUS);
3298
3299 regs_buff[2] = er32(RCTL);
3300 regs_buff[3] = er32(RDLEN);
3301 regs_buff[4] = er32(RDH);
3302 regs_buff[5] = er32(RDT);
3303 regs_buff[6] = er32(RDTR);
3304
3305 regs_buff[7] = er32(TCTL);
3306 regs_buff[8] = er32(TDBAL);
3307 regs_buff[9] = er32(TDBAH);
3308 regs_buff[10] = er32(TDLEN);
3309 regs_buff[11] = er32(TDH);
3310 regs_buff[12] = er32(TDT);
3311 regs_buff[13] = er32(TIDV);
3312 regs_buff[14] = er32(TXDCTL);
3313 regs_buff[15] = er32(TADV);
3314 regs_buff[16] = er32(TARC0);
3315
3316 regs_buff[17] = er32(TDBAL1);
3317 regs_buff[18] = er32(TDBAH1);
3318 regs_buff[19] = er32(TDLEN1);
3319 regs_buff[20] = er32(TDH1);
3320 regs_buff[21] = er32(TDT1);
3321 regs_buff[22] = er32(TXDCTL1);
3322 regs_buff[23] = er32(TARC1);
3323 regs_buff[24] = er32(CTRL_EXT);
3324 regs_buff[25] = er32(ERT);
3325 regs_buff[26] = er32(RDBAL0);
3326 regs_buff[27] = er32(RDBAH0);
3327 regs_buff[28] = er32(TDFH);
3328 regs_buff[29] = er32(TDFT);
3329 regs_buff[30] = er32(TDFHS);
3330 regs_buff[31] = er32(TDFTS);
3331 regs_buff[32] = er32(TDFPC);
3332 regs_buff[33] = er32(RDFH);
3333 regs_buff[34] = er32(RDFT);
3334 regs_buff[35] = er32(RDFHS);
3335 regs_buff[36] = er32(RDFTS);
3336 regs_buff[37] = er32(RDFPC);
3337
3338 pr_info("Register dump\n");
e29b5d8f
TD		 3339 for (i = 0; i < NUM_REGS; i++)
3340 pr_info("%-15s %08x\n", reg_name[i], regs_buff[i]);
b04e36ba
TD		 3341}
3342
3343/*
3344 * e1000_dump: Print registers, tx ring and rx ring
3345 */
3346static void e1000_dump(struct e1000_adapter *adapter)
3347{
3348 /* this code doesn't handle multiple rings */
3349 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3350 struct e1000_rx_ring *rx_ring = adapter->rx_ring;
3351 int i;
3352
3353 if (!netif_msg_hw(adapter))
3354 return;
3355
3356 /* Print Registers */
3357 e1000_regdump(adapter);
3358
6cfbd97b 3359 /* transmit dump */
b04e36ba
TD		 3360 pr_info("TX Desc ring0 dump\n");
3361
3362 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
3363 *
3364 * Legacy Transmit Descriptor
3365 * +--------------------------------------------------------------+
3366 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
3367 * +--------------------------------------------------------------+
3368 * 8 | Special | CSS | Status | CMD | CSO | Length |
3369 * +--------------------------------------------------------------+
3370 * 63 48 47 36 35 32 31 24 23 16 15 0
3371 *
3372 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
3373 * 63 48 47 40 39 32 31 16 15 8 7 0
3374 * +----------------------------------------------------------------+
3375 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
3376 * +----------------------------------------------------------------+
3377 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
3378 * +----------------------------------------------------------------+
3379 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3380 *
3381 * Extended Data Descriptor (DTYP=0x1)
3382 * +----------------------------------------------------------------+
3383 * 0 | Buffer Address [63:0] |
3384 * +----------------------------------------------------------------+
3385 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
3386 * +----------------------------------------------------------------+
3387 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
3388 */
e29b5d8f
TD		 3389 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestmp bi->skb\n");
3390 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestmp bi->skb\n");
b04e36ba
TD		 3391
3392 if (!netif_msg_tx_done(adapter))
3393 goto rx_ring_summary;
3394
3395 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
3396 struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*tx_ring, i);
3397 struct e1000_buffer *buffer_info = &tx_ring->buffer_info[i];
dd7f5c9e 3398 struct my_u { __le64 a; __le64 b; };
b04e36ba 3399 struct my_u *u = (struct my_u *)tx_desc;
e29b5d8f
TD		 3400 const char *type;
3401
b04e36ba 3402 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
e29b5d8f 3403 type = "NTC/U";
b04e36ba 3404 else if (i == tx_ring->next_to_use)
e29b5d8f 3405 type = "NTU";
b04e36ba 3406 else if (i == tx_ring->next_to_clean)
e29b5d8f 3407 type = "NTC";
b04e36ba 3408 else
e29b5d8f 3409 type = "";
b04e36ba 3410
e29b5d8f
TD		 3411 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p %s\n",
3412 ((le64_to_cpu(u->b) & (1<<20)) ? 'd' : 'c'), i,
3413 le64_to_cpu(u->a), le64_to_cpu(u->b),
3414 (u64)buffer_info->dma, buffer_info->length,
3415 buffer_info->next_to_watch,
3416 (u64)buffer_info->time_stamp, buffer_info->skb, type);
b04e36ba
TD		 3417 }
3418
3419rx_ring_summary:
6cfbd97b 3420 /* receive dump */
b04e36ba
TD		 3421 pr_info("\nRX Desc ring dump\n");
3422
3423 /* Legacy Receive Descriptor Format
3424 *
3425 * +-----------------------------------------------------+
3426 * | Buffer Address [63:0] |
3427 * +-----------------------------------------------------+
3428 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
3429 * +-----------------------------------------------------+
3430 * 63 48 47 40 39 32 31 16 15 0
3431 */
e29b5d8f 3432 pr_info("R[desc] [address 63:0 ] [vl er S cks ln] [bi->dma ] [bi->skb]\n");
b04e36ba
TD		 3433
3434 if (!netif_msg_rx_status(adapter))
3435 goto exit;
3436
3437 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
3438 struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rx_ring, i);
3439 struct e1000_buffer *buffer_info = &rx_ring->buffer_info[i];
dd7f5c9e 3440 struct my_u { __le64 a; __le64 b; };
b04e36ba 3441 struct my_u *u = (struct my_u *)rx_desc;
e29b5d8f
TD		 3442 const char *type;
3443
b04e36ba 3444 if (i == rx_ring->next_to_use)
e29b5d8f 3445 type = "NTU";
b04e36ba 3446 else if (i == rx_ring->next_to_clean)
e29b5d8f 3447 type = "NTC";
b04e36ba 3448 else
e29b5d8f 3449 type = "";
b04e36ba 3450
e29b5d8f
TD		 3451 pr_info("R[0x%03X] %016llX %016llX %016llX %p %s\n",
3452 i, le64_to_cpu(u->a), le64_to_cpu(u->b),
3453 (u64)buffer_info->dma, buffer_info->skb, type);
b04e36ba
TD		 3454 } /* for */
3455
3456 /* dump the descriptor caches */
3457 /* rx */
e29b5d8f 3458 pr_info("Rx descriptor cache in 64bit format\n");
b04e36ba 3459 for (i = 0x6000; i <= 0x63FF ; i += 0x10) {
e29b5d8f
TD		 3460 pr_info("R%04X: %08X|%08X %08X|%08X\n",
3461 i,
3462 readl(adapter->hw.hw_addr + i+4),
3463 readl(adapter->hw.hw_addr + i),
3464 readl(adapter->hw.hw_addr + i+12),
3465 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3466 }
3467 /* tx */
e29b5d8f 3468 pr_info("Tx descriptor cache in 64bit format\n");
b04e36ba 3469 for (i = 0x7000; i <= 0x73FF ; i += 0x10) {
e29b5d8f
TD		 3470 pr_info("T%04X: %08X|%08X %08X|%08X\n",
3471 i,
3472 readl(adapter->hw.hw_addr + i+4),
3473 readl(adapter->hw.hw_addr + i),
3474 readl(adapter->hw.hw_addr + i+12),
3475 readl(adapter->hw.hw_addr + i+8));
b04e36ba
TD		 3476 }
3477exit:
3478 return;
3479}
3480
1da177e4
LT		 3481/**
3482 * e1000_tx_timeout - Respond to a Tx Hang
3483 * @netdev: network interface device structure
3484 **/
64798845 3485static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3486{
60490fe0 3487 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3488
3489 /* Do the reset outside of interrupt context */
87041639
JK		 3490 adapter->tx_timeout_count++;
3491 schedule_work(&adapter->reset_task);
1da177e4
LT		 3492}
3493
64798845 3494static void e1000_reset_task(struct work_struct *work)
1da177e4 3495{
65f27f38
DH		 3496 struct e1000_adapter *adapter =
3497 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3498
0ef4eedc
JB		 3499 if (test_bit(__E1000_DOWN, &adapter->flags))
3500 return;
b04e36ba 3501 e_err(drv, "Reset adapter\n");
338c15e4 3502 e1000_reinit_safe(adapter);
1da177e4
LT		 3503}
3504
3505/**
3506 * e1000_get_stats - Get System Network Statistics
3507 * @netdev: network interface device structure
3508 *
3509 * Returns the address of the device statistics structure.
a4010afe 3510 * The statistics are actually updated from the watchdog.
1da177e4 3511 **/
64798845 3512static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3513{
6b7660cd 3514 /* only return the current stats */
5fe31def 3515 return &netdev->stats;
1da177e4
LT		 3516}
3517
3518/**
3519 * e1000_change_mtu - Change the Maximum Transfer Unit
3520 * @netdev: network interface device structure
3521 * @new_mtu: new value for maximum frame size
3522 *
3523 * Returns 0 on success, negative on failure
3524 **/
64798845 3525static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3526{
60490fe0 3527 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3528 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3529 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3530
96838a40
JB		 3531 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3532 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
feb8f478 3533 e_err(probe, "Invalid MTU setting\n");
1da177e4 3534 return -EINVAL;
2d7edb92 3535 }
1da177e4 3536
997f5cbd 3537 /* Adapter-specific max frame size limits. */
1dc32918 3538 switch (hw->mac_type) {
9e2feace 3539 case e1000_undefined ... e1000_82542_rev2_1:
b7cb8c2c 3540 if (max_frame > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
feb8f478 3541 e_err(probe, "Jumbo Frames not supported.\n");
2d7edb92 3542 return -EINVAL;
2d7edb92 3543 }
997f5cbd 3544 break;
997f5cbd
JK		 3545 default:
3546 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3547 break;
1da177e4
LT		 3548 }
3549
3d6114e7
JB		 3550 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
3551 msleep(1);
3552 /* e1000_down has a dependency on max_frame_size */
3553 hw->max_frame_size = max_frame;
3554 if (netif_running(netdev))
3555 e1000_down(adapter);
3556
87f5032e 3557 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace 3558 * means we reserve 2 more, this pushes us to allocate from the next
edbbb3ca
JB		 3559 * larger slab size.
3560 * i.e. RXBUFFER_2048 --> size-4096 slab
6cfbd97b
JK		 3561 * however with the new *_jumbo_rx* routines, jumbo receives will use
3562 * fragmented skbs
3563 */
9e2feace 3564
9926146b 3565 if (max_frame <= E1000_RXBUFFER_2048)
9e2feace 3566 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
edbbb3ca
JB		 3567 else
3568#if (PAGE_SIZE >= E1000_RXBUFFER_16384)
9e2feace 3569 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
edbbb3ca
JB		 3570#elif (PAGE_SIZE >= E1000_RXBUFFER_4096)
3571 adapter->rx_buffer_len = PAGE_SIZE;
3572#endif
9e2feace
AK		 3573
3574 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3575 if (!hw->tbi_compatibility_on &&
b7cb8c2c 3576 ((max_frame == (ETH_FRAME_LEN + ETH_FCS_LEN)) ||
9e2feace
AK		 3577 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3578 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3579
675ad473
ET		 3580 pr_info("%s changing MTU from %d to %d\n",
3581 netdev->name, netdev->mtu, new_mtu);
2d7edb92
MC		 3582 netdev->mtu = new_mtu;
3583
2db10a08 3584 if (netif_running(netdev))
3d6114e7
JB		 3585 e1000_up(adapter);
3586 else
3587 e1000_reset(adapter);
3588
3589 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4 3590
1da177e4
LT		 3591 return 0;
3592}
3593
3594/**
3595 * e1000_update_stats - Update the board statistics counters
3596 * @adapter: board private structure
3597 **/
64798845 3598void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4 3599{
5fe31def 3600 struct net_device *netdev = adapter->netdev;
1da177e4 3601 struct e1000_hw *hw = &adapter->hw;
282f33c9 3602 struct pci_dev *pdev = adapter->pdev;
1da177e4 3603 unsigned long flags;
406874a7 3604 u16 phy_tmp;
1da177e4
LT		 3605
3606#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3607
6cfbd97b 3608 /* Prevent stats update while adapter is being reset, or if the pci
282f33c9
LV		 3609 * connection is down.
3610 */
9026729b 3611 if (adapter->link_speed == 0)
282f33c9 3612 return;
81b1955e 3613 if (pci_channel_offline(pdev))
9026729b
AK		 3614 return;
3615
1da177e4
LT		 3616 spin_lock_irqsave(&adapter->stats_lock, flags);
3617
828d055f 3618 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3619 * called from the interrupt context, so they must only
3620 * be written while holding adapter->stats_lock
3621 */
3622
1dc32918
JP		 3623 adapter->stats.crcerrs += er32(CRCERRS);
3624 adapter->stats.gprc += er32(GPRC);
3625 adapter->stats.gorcl += er32(GORCL);
3626 adapter->stats.gorch += er32(GORCH);
3627 adapter->stats.bprc += er32(BPRC);
3628 adapter->stats.mprc += er32(MPRC);
3629 adapter->stats.roc += er32(ROC);
3630
1532ecea
JB		 3631 adapter->stats.prc64 += er32(PRC64);
3632 adapter->stats.prc127 += er32(PRC127);
3633 adapter->stats.prc255 += er32(PRC255);
3634 adapter->stats.prc511 += er32(PRC511);
3635 adapter->stats.prc1023 += er32(PRC1023);
3636 adapter->stats.prc1522 += er32(PRC1522);
1dc32918
JP		 3637
3638 adapter->stats.symerrs += er32(SYMERRS);
3639 adapter->stats.mpc += er32(MPC);
3640 adapter->stats.scc += er32(SCC);
3641 adapter->stats.ecol += er32(ECOL);
3642 adapter->stats.mcc += er32(MCC);
3643 adapter->stats.latecol += er32(LATECOL);
3644 adapter->stats.dc += er32(DC);
3645 adapter->stats.sec += er32(SEC);
3646 adapter->stats.rlec += er32(RLEC);
3647 adapter->stats.xonrxc += er32(XONRXC);
3648 adapter->stats.xontxc += er32(XONTXC);
3649 adapter->stats.xoffrxc += er32(XOFFRXC);
3650 adapter->stats.xofftxc += er32(XOFFTXC);
3651 adapter->stats.fcruc += er32(FCRUC);
3652 adapter->stats.gptc += er32(GPTC);
3653 adapter->stats.gotcl += er32(GOTCL);
3654 adapter->stats.gotch += er32(GOTCH);
3655 adapter->stats.rnbc += er32(RNBC);
3656 adapter->stats.ruc += er32(RUC);
3657 adapter->stats.rfc += er32(RFC);
3658 adapter->stats.rjc += er32(RJC);
3659 adapter->stats.torl += er32(TORL);
3660 adapter->stats.torh += er32(TORH);
3661 adapter->stats.totl += er32(TOTL);
3662 adapter->stats.toth += er32(TOTH);
3663 adapter->stats.tpr += er32(TPR);
3664
1532ecea
JB		 3665 adapter->stats.ptc64 += er32(PTC64);
3666 adapter->stats.ptc127 += er32(PTC127);
3667 adapter->stats.ptc255 += er32(PTC255);
3668 adapter->stats.ptc511 += er32(PTC511);
3669 adapter->stats.ptc1023 += er32(PTC1023);
3670 adapter->stats.ptc1522 += er32(PTC1522);
1dc32918
JP		 3671
3672 adapter->stats.mptc += er32(MPTC);
3673 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3674
3675 /* used for adaptive IFS */
3676
1dc32918 3677 hw->tx_packet_delta = er32(TPT);
1da177e4 3678 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3679 hw->collision_delta = er32(COLC);
1da177e4
LT		 3680 adapter->stats.colc += hw->collision_delta;
3681
96838a40 3682 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3683 adapter->stats.algnerrc += er32(ALGNERRC);
3684 adapter->stats.rxerrc += er32(RXERRC);
3685 adapter->stats.tncrs += er32(TNCRS);
3686 adapter->stats.cexterr += er32(CEXTERR);
3687 adapter->stats.tsctc += er32(TSCTC);
3688 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4
LT		 3689 }
3690
3691 /* Fill out the OS statistics structure */
5fe31def
AK		 3692 netdev->stats.multicast = adapter->stats.mprc;
3693 netdev->stats.collisions = adapter->stats.colc;
1da177e4
LT		 3694
3695 /* Rx Errors */
3696
87041639 3697 /* RLEC on some newer hardware can be incorrect so build
6cfbd97b
JK		 3698 * our own version based on RUC and ROC
3699 */
5fe31def 3700 netdev->stats.rx_errors = adapter->stats.rxerrc +
1da177e4 3701 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3702 adapter->stats.ruc + adapter->stats.roc +
3703 adapter->stats.cexterr;
49559854 3704 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
5fe31def
AK		 3705 netdev->stats.rx_length_errors = adapter->stats.rlerrc;
3706 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3707 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3708 netdev->stats.rx_missed_errors = adapter->stats.mpc;
1da177e4
LT		 3709
3710 /* Tx Errors */
49559854 3711 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
5fe31def
AK		 3712 netdev->stats.tx_errors = adapter->stats.txerrc;
3713 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3714 netdev->stats.tx_window_errors = adapter->stats.latecol;
3715 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3716 if (hw->bad_tx_carr_stats_fd &&
167fb284 3717 adapter->link_duplex == FULL_DUPLEX) {
5fe31def 3718 netdev->stats.tx_carrier_errors = 0;
167fb284
JG		 3719 adapter->stats.tncrs = 0;
3720 }
1da177e4
LT		 3721
3722 /* Tx Dropped needs to be maintained elsewhere */
3723
3724 /* Phy Stats */
96838a40
JB		 3725 if (hw->media_type == e1000_media_type_copper) {
3726 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3727 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3728 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3729 adapter->phy_stats.idle_errors += phy_tmp;
3730 }
3731
96838a40 3732 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3733 (hw->phy_type == e1000_phy_m88) &&
3734 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3735 adapter->phy_stats.receive_errors += phy_tmp;
3736 }
3737
15e376b4 3738 /* Management Stats */
1dc32918
JP		 3739 if (hw->has_smbus) {
3740 adapter->stats.mgptc += er32(MGTPTC);
3741 adapter->stats.mgprc += er32(MGTPRC);
3742 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3743 }
3744
1da177e4
LT		 3745 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3746}
9ac98284 3747
1da177e4
LT		 3748/**
3749 * e1000_intr - Interrupt Handler
3750 * @irq: interrupt number
3751 * @data: pointer to a network interface device structure
1da177e4 3752 **/
64798845 3753static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3754{
3755 struct net_device *netdev = data;
60490fe0 3756 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3757 struct e1000_hw *hw = &adapter->hw;
1532ecea 3758 u32 icr = er32(ICR);
c3570acb 3759
4c11b8ad 3760 if (unlikely((!icr)))
835bb129
JB		 3761 return IRQ_NONE; /* Not our interrupt */
3762
6cfbd97b 3763 /* we might have caused the interrupt, but the above
4c11b8ad
JB		 3764 * read cleared it, and just in case the driver is
3765 * down there is nothing to do so return handled
3766 */
3767 if (unlikely(test_bit(__E1000_DOWN, &adapter->flags)))
3768 return IRQ_HANDLED;
3769
96838a40 3770 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3771 hw->get_link_status = 1;
1314bbf3
AK		 3772 /* guard against interrupt when we're going down */
3773 if (!test_bit(__E1000_DOWN, &adapter->flags))
a4010afe 3774 schedule_delayed_work(&adapter->watchdog_task, 1);
1da177e4
LT		 3775 }
3776
1532ecea
JB		 3777 /* disable interrupts, without the synchronize_irq bit */
3778 ew32(IMC, ~0);
3779 E1000_WRITE_FLUSH();
3780
288379f0 3781 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3782 adapter->total_tx_bytes = 0;
3783 adapter->total_tx_packets = 0;
3784 adapter->total_rx_bytes = 0;
3785 adapter->total_rx_packets = 0;
288379f0 3786 __napi_schedule(&adapter->napi);
a6c42322 3787 } else {
90fb5135 3788 /* this really should not happen! if it does it is basically a
6cfbd97b
JK		 3789 * bug, but not a hard error, so enable ints and continue
3790 */
a6c42322
JB		 3791 if (!test_bit(__E1000_DOWN, &adapter->flags))
3792 e1000_irq_enable(adapter);
3793 }
1da177e4 3794
1da177e4
LT		 3795 return IRQ_HANDLED;
3796}
3797
1da177e4
LT		 3798/**
3799 * e1000_clean - NAPI Rx polling callback
3800 * @adapter: board private structure
3801 **/
64798845 3802static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3803{
6cfbd97b
JK		 3804 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
3805 napi);
650b5a5c 3806 int tx_clean_complete = 0, work_done = 0;
581d708e 3807
650b5a5c 3808 tx_clean_complete = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3809
650b5a5c 3810 adapter->clean_rx(adapter, &adapter->rx_ring[0], &work_done, budget);
581d708e 3811
650b5a5c 3812 if (!tx_clean_complete)
d2c7ddd6
DM		 3813 work_done = budget;
3814
53e52c72
DM		 3815 /* If budget not fully consumed, exit the polling mode */
3816 if (work_done < budget) {
835bb129
JB		 3817 if (likely(adapter->itr_setting & 3))
3818 e1000_set_itr(adapter);
288379f0 3819 napi_complete(napi);
a6c42322
JB		 3820 if (!test_bit(__E1000_DOWN, &adapter->flags))
3821 e1000_irq_enable(adapter);
1da177e4
LT		 3822 }
3823
bea3348e 3824 return work_done;
1da177e4
LT		 3825}
3826
1da177e4
LT		 3827/**
3828 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3829 * @adapter: board private structure
3830 **/
64798845
JP		 3831static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3832 struct e1000_tx_ring *tx_ring)
1da177e4 3833{
1dc32918 3834 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3835 struct net_device *netdev = adapter->netdev;
3836 struct e1000_tx_desc *tx_desc, *eop_desc;
3837 struct e1000_buffer *buffer_info;
3838 unsigned int i, eop;
2a1af5d7 3839 unsigned int count = 0;
835bb129 3840 unsigned int total_tx_bytes=0, total_tx_packets=0;
2f66fd36 3841 unsigned int bytes_compl = 0, pkts_compl = 0;
1da177e4
LT		 3842
3843 i = tx_ring->next_to_clean;
3844 eop = tx_ring->buffer_info[i].next_to_watch;
3845 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3846
ccfb342c
AD		 3847 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3848 (count < tx_ring->count)) {
843f4267 3849 bool cleaned = false;
2d0bb1c1 3850 rmb(); /* read buffer_info after eop_desc */
843f4267 3851 for ( ; !cleaned; count++) {
1da177e4
LT		 3852 tx_desc = E1000_TX_DESC(*tx_ring, i);
3853 buffer_info = &tx_ring->buffer_info[i];
3854 cleaned = (i == eop);
3855
835bb129 3856 if (cleaned) {
31c15a2f
DN		 3857 total_tx_packets += buffer_info->segs;
3858 total_tx_bytes += buffer_info->bytecount;
2f66fd36
OESC		 3859 if (buffer_info->skb) {
3860 bytes_compl += buffer_info->skb->len;
3861 pkts_compl++;
3862 }
3863
835bb129 3864 }
fd803241 3865 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3866 tx_desc->upper.data = 0;
1da177e4 3867
96838a40 3868 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3869 }
581d708e 3870
1da177e4
LT		 3871 eop = tx_ring->buffer_info[i].next_to_watch;
3872 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3873 }
3874
3875 tx_ring->next_to_clean = i;
3876
2f66fd36
OESC		 3877 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
3878
77b2aad5 3879#define TX_WAKE_THRESHOLD 32
843f4267 3880 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3881 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3882 /* Make sure that anybody stopping the queue after this
3883 * sees the new next_to_clean.
3884 */
3885 smp_mb();
cdd7549e
JB		 3886
3887 if (netif_queue_stopped(netdev) &&
3888 !(test_bit(__E1000_DOWN, &adapter->flags))) {
77b2aad5 3889 netif_wake_queue(netdev);
fcfb1224
JB		 3890 ++adapter->restart_queue;
3891 }
77b2aad5 3892 }
2648345f 3893
581d708e 3894 if (adapter->detect_tx_hung) {
2648345f 3895 /* Detect a transmit hang in hardware, this serializes the
6cfbd97b
JK		 3896 * check with the clearing of time_stamp and movement of i
3897 */
c3033b01 3898 adapter->detect_tx_hung = false;
cdd7549e
JB		 3899 if (tx_ring->buffer_info[eop].time_stamp &&
3900 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
6cfbd97b 3901 (adapter->tx_timeout_factor * HZ)) &&
8e95a202 3902 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3903
3904 /* detected Tx unit hang */
feb8f478 3905 e_err(drv, "Detected Tx Unit Hang\n"
675ad473
ET		 3906 " Tx Queue <%lu>\n"
3907 " TDH <%x>\n"
3908 " TDT <%x>\n"
3909 " next_to_use <%x>\n"
3910 " next_to_clean <%x>\n"
3911 "buffer_info[next_to_clean]\n"
3912 " time_stamp <%lx>\n"
3913 " next_to_watch <%x>\n"
3914 " jiffies <%lx>\n"
3915 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3916 (unsigned long)((tx_ring - adapter->tx_ring) /
3917 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3918 readl(hw->hw_addr + tx_ring->tdh),
3919 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3920 tx_ring->next_to_use,
392137fa 3921 tx_ring->next_to_clean,
cdd7549e 3922 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3923 eop,
3924 jiffies,
3925 eop_desc->upper.fields.status);
b04e36ba 3926 e1000_dump(adapter);
1da177e4 3927 netif_stop_queue(netdev);
70b8f1e1 3928 }
1da177e4 3929 }
835bb129
JB		 3930 adapter->total_tx_bytes += total_tx_bytes;
3931 adapter->total_tx_packets += total_tx_packets;
5fe31def
AK		 3932 netdev->stats.tx_bytes += total_tx_bytes;
3933 netdev->stats.tx_packets += total_tx_packets;
807540ba 3934 return count < tx_ring->count;
1da177e4
LT		 3935}
3936
3937/**
3938 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3939 * @adapter: board private structure
3940 * @status_err: receive descriptor status and error fields
3941 * @csum: receive descriptor csum field
3942 * @sk_buff: socket buffer with received data
1da177e4 3943 **/
64798845
JP		 3944static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3945 u32 csum, struct sk_buff *skb)
1da177e4 3946{
1dc32918 3947 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3948 u16 status = (u16)status_err;
3949 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 3950
3951 skb_checksum_none_assert(skb);
2d7edb92 3952
1da177e4 3953 /* 82543 or newer only */
1dc32918 3954 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3955 /* Ignore Checksum bit is set */
96838a40 3956 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3957 /* TCP/UDP checksum error bit is set */
96838a40 3958 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3959 /* let the stack verify checksum errors */
1da177e4 3960 adapter->hw_csum_err++;
2d7edb92
MC		 3961 return;
3962 }
3963 /* TCP/UDP Checksum has not been calculated */
1532ecea
JB		 3964 if (!(status & E1000_RXD_STAT_TCPCS))
3965 return;
3966
2d7edb92
MC		 3967 /* It must be a TCP or UDP packet with a valid checksum */
3968 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3969 /* TCP checksum is good */
3970 skb->ip_summed = CHECKSUM_UNNECESSARY;
1da177e4 3971 }
2d7edb92 3972 adapter->hw_csum_good++;
1da177e4
LT		 3973}
3974
edbbb3ca
JB		 3975/**
3976 * e1000_consume_page - helper function
3977 **/
3978static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
6cfbd97b 3979 u16 length)
edbbb3ca
JB		 3980{
3981 bi->page = NULL;
3982 skb->len += length;
3983 skb->data_len += length;
ed64b3cc 3984 skb->truesize += PAGE_SIZE;
edbbb3ca
JB		 3985}
3986
3987/**
3988 * e1000_receive_skb - helper function to handle rx indications
3989 * @adapter: board private structure
3990 * @status: descriptor status field as written by hardware
3991 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
3992 * @skb: pointer to sk_buff to be indicated to stack
3993 */
3994static void e1000_receive_skb(struct e1000_adapter *adapter, u8 status,
3995 __le16 vlan, struct sk_buff *skb)
3996{
6a08d194
JB		 3997 skb->protocol = eth_type_trans(skb, adapter->netdev);
3998
5622e404
JP		 3999 if (status & E1000_RXD_STAT_VP) {
4000 u16 vid = le16_to_cpu(vlan) & E1000_RXD_SPC_VLAN_MASK;
4001
4002 __vlan_hwaccel_put_tag(skb, vid);
4003 }
4004 napi_gro_receive(&adapter->napi, skb);
edbbb3ca
JB		 4005}
4006
4007/**
4008 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
4009 * @adapter: board private structure
4010 * @rx_ring: ring to clean
4011 * @work_done: amount of napi work completed this call
4012 * @work_to_do: max amount of work allowed for this call to do
4013 *
4014 * the return value indicates whether actual cleaning was done, there
4015 * is no guarantee that everything was cleaned
4016 */
4017static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
4018 struct e1000_rx_ring *rx_ring,
4019 int *work_done, int work_to_do)
4020{
4021 struct e1000_hw *hw = &adapter->hw;
4022 struct net_device *netdev = adapter->netdev;
4023 struct pci_dev *pdev = adapter->pdev;
4024 struct e1000_rx_desc *rx_desc, *next_rxd;
4025 struct e1000_buffer *buffer_info, *next_buffer;
4026 unsigned long irq_flags;
4027 u32 length;
4028 unsigned int i;
4029 int cleaned_count = 0;
4030 bool cleaned = false;
4031 unsigned int total_rx_bytes=0, total_rx_packets=0;
4032
4033 i = rx_ring->next_to_clean;
4034 rx_desc = E1000_RX_DESC(*rx_ring, i);
4035 buffer_info = &rx_ring->buffer_info[i];
4036
4037 while (rx_desc->status & E1000_RXD_STAT_DD) {
4038 struct sk_buff *skb;
4039 u8 status;
4040
4041 if (*work_done >= work_to_do)
4042 break;
4043 (*work_done)++;
2d0bb1c1 4044 rmb(); /* read descriptor and rx_buffer_info after status DD */
edbbb3ca
JB		 4045
4046 status = rx_desc->status;
4047 skb = buffer_info->skb;
4048 buffer_info->skb = NULL;
4049
4050 if (++i == rx_ring->count) i = 0;
4051 next_rxd = E1000_RX_DESC(*rx_ring, i);
4052 prefetch(next_rxd);
4053
4054 next_buffer = &rx_ring->buffer_info[i];
4055
4056 cleaned = true;
4057 cleaned_count++;
b16f53be
NN		 4058 dma_unmap_page(&pdev->dev, buffer_info->dma,
4059 buffer_info->length, DMA_FROM_DEVICE);
edbbb3ca
JB		 4060 buffer_info->dma = 0;
4061
4062 length = le16_to_cpu(rx_desc->length);
4063
4064 /* errors is only valid for DD + EOP descriptors */
4065 if (unlikely((status & E1000_RXD_STAT_EOP) &&
4066 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
a3060858
SAS		 4067 u8 *mapped;
4068 u8 last_byte;
4069
4070 mapped = page_address(buffer_info->page);
4071 last_byte = *(mapped + length - 1);
edbbb3ca
JB		 4072 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4073 last_byte)) {
4074 spin_lock_irqsave(&adapter->stats_lock,
6cfbd97b 4075 irq_flags);
edbbb3ca 4076 e1000_tbi_adjust_stats(hw, &adapter->stats,
281a8f24 4077 length, mapped);
edbbb3ca 4078 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4079 irq_flags);
edbbb3ca
JB		 4080 length--;
4081 } else {
e825b731
BG		 4082 if (netdev->features & NETIF_F_RXALL)
4083 goto process_skb;
edbbb3ca
JB		 4084 /* recycle both page and skb */
4085 buffer_info->skb = skb;
4086 /* an error means any chain goes out the window
6cfbd97b
JK		 4087 * too
4088 */
edbbb3ca
JB		 4089 if (rx_ring->rx_skb_top)
4090 dev_kfree_skb(rx_ring->rx_skb_top);
4091 rx_ring->rx_skb_top = NULL;
4092 goto next_desc;
4093 }
4094 }
4095
4096#define rxtop rx_ring->rx_skb_top
e825b731 4097process_skb:
edbbb3ca
JB		 4098 if (!(status & E1000_RXD_STAT_EOP)) {
4099 /* this descriptor is only the beginning (or middle) */
4100 if (!rxtop) {
4101 /* this is the beginning of a chain */
4102 rxtop = skb;
4103 skb_fill_page_desc(rxtop, 0, buffer_info->page,
6cfbd97b 4104 0, length);
edbbb3ca
JB		 4105 } else {
4106 /* this is the middle of a chain */
4107 skb_fill_page_desc(rxtop,
4108 skb_shinfo(rxtop)->nr_frags,
4109 buffer_info->page, 0, length);
4110 /* re-use the skb, only consumed the page */
4111 buffer_info->skb = skb;
4112 }
4113 e1000_consume_page(buffer_info, rxtop, length);
4114 goto next_desc;
4115 } else {
4116 if (rxtop) {
4117 /* end of the chain */
4118 skb_fill_page_desc(rxtop,
4119 skb_shinfo(rxtop)->nr_frags,
4120 buffer_info->page, 0, length);
4121 /* re-use the current skb, we only consumed the
6cfbd97b
JK		 4122 * page
4123 */
edbbb3ca
JB		 4124 buffer_info->skb = skb;
4125 skb = rxtop;
4126 rxtop = NULL;
4127 e1000_consume_page(buffer_info, skb, length);
4128 } else {
4129 /* no chain, got EOP, this buf is the packet
6cfbd97b
JK		 4130 * copybreak to save the put_page/alloc_page
4131 */
edbbb3ca
JB		 4132 if (length <= copybreak &&
4133 skb_tailroom(skb) >= length) {
4134 u8 *vaddr;
4679026d 4135 vaddr = kmap_atomic(buffer_info->page);
6cfbd97b
JK		 4136 memcpy(skb_tail_pointer(skb), vaddr,
4137 length);
4679026d 4138 kunmap_atomic(vaddr);
edbbb3ca 4139 /* re-use the page, so don't erase
6cfbd97b
JK		 4140 * buffer_info->page
4141 */
edbbb3ca
JB		 4142 skb_put(skb, length);
4143 } else {
4144 skb_fill_page_desc(skb, 0,
6cfbd97b
JK		 4145 buffer_info->page, 0,
4146 length);
edbbb3ca 4147 e1000_consume_page(buffer_info, skb,
6cfbd97b 4148 length);
edbbb3ca
JB		 4149 }
4150 }
4151 }
4152
4153 /* Receive Checksum Offload XXX recompute due to CRC strip? */
4154 e1000_rx_checksum(adapter,
6cfbd97b
JK		 4155 (u32)(status) |
4156 ((u32)(rx_desc->errors) << 24),
4157 le16_to_cpu(rx_desc->csum), skb);
edbbb3ca 4158
b0d1562c
BG		 4159 total_rx_bytes += (skb->len - 4); /* don't count FCS */
4160 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4161 pskb_trim(skb, skb->len - 4);
edbbb3ca
JB		 4162 total_rx_packets++;
4163
4164 /* eth type trans needs skb->data to point to something */
4165 if (!pskb_may_pull(skb, ETH_HLEN)) {
feb8f478 4166 e_err(drv, "pskb_may_pull failed.\n");
edbbb3ca
JB		 4167 dev_kfree_skb(skb);
4168 goto next_desc;
4169 }
4170
edbbb3ca
JB		 4171 e1000_receive_skb(adapter, status, rx_desc->special, skb);
4172
4173next_desc:
4174 rx_desc->status = 0;
4175
4176 /* return some buffers to hardware, one at a time is too slow */
4177 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4178 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4179 cleaned_count = 0;
4180 }
4181
4182 /* use prefetched values */
4183 rx_desc = next_rxd;
4184 buffer_info = next_buffer;
4185 }
4186 rx_ring->next_to_clean = i;
4187
4188 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4189 if (cleaned_count)
4190 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4191
4192 adapter->total_rx_packets += total_rx_packets;
4193 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4194 netdev->stats.rx_bytes += total_rx_bytes;
4195 netdev->stats.rx_packets += total_rx_packets;
edbbb3ca
JB		 4196 return cleaned;
4197}
4198
6cfbd97b 4199/* this should improve performance for small packets with large amounts
57bf6eef
JP		 4200 * of reassembly being done in the stack
4201 */
4202static void e1000_check_copybreak(struct net_device *netdev,
4203 struct e1000_buffer *buffer_info,
4204 u32 length, struct sk_buff **skb)
4205{
4206 struct sk_buff *new_skb;
4207
4208 if (length > copybreak)
4209 return;
4210
4211 new_skb = netdev_alloc_skb_ip_align(netdev, length);
4212 if (!new_skb)
4213 return;
4214
4215 skb_copy_to_linear_data_offset(new_skb, -NET_IP_ALIGN,
4216 (*skb)->data - NET_IP_ALIGN,
4217 length + NET_IP_ALIGN);
4218 /* save the skb in buffer_info as good */
4219 buffer_info->skb = *skb;
4220 *skb = new_skb;
4221}
4222
1da177e4 4223/**
2d7edb92 4224 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4 4225 * @adapter: board private structure
edbbb3ca
JB		 4226 * @rx_ring: ring to clean
4227 * @work_done: amount of napi work completed this call
4228 * @work_to_do: max amount of work allowed for this call to do
4229 */
64798845
JP		 4230static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
4231 struct e1000_rx_ring *rx_ring,
4232 int *work_done, int work_to_do)
1da177e4 4233{
1dc32918 4234 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4235 struct net_device *netdev = adapter->netdev;
4236 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4237 struct e1000_rx_desc *rx_desc, *next_rxd;
4238 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 4239 unsigned long flags;
406874a7 4240 u32 length;
1da177e4 4241 unsigned int i;
72d64a43 4242 int cleaned_count = 0;
c3033b01 4243 bool cleaned = false;
835bb129 4244 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4245
4246 i = rx_ring->next_to_clean;
4247 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4248 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4249
b92ff8ee 4250 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4251 struct sk_buff *skb;
a292ca6e 4252 u8 status;
90fb5135 4253
96838a40 4254 if (*work_done >= work_to_do)
1da177e4
LT		 4255 break;
4256 (*work_done)++;
2d0bb1c1 4257 rmb(); /* read descriptor and rx_buffer_info after status DD */
c3570acb 4258
a292ca6e 4259 status = rx_desc->status;
b92ff8ee 4260 skb = buffer_info->skb;
86c3d59f
JB		 4261 buffer_info->skb = NULL;
4262
30320be8
JK		 4263 prefetch(skb->data - NET_IP_ALIGN);
4264
86c3d59f
JB		 4265 if (++i == rx_ring->count) i = 0;
4266 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4267 prefetch(next_rxd);
4268
86c3d59f 4269 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4270
c3033b01 4271 cleaned = true;
72d64a43 4272 cleaned_count++;
b16f53be
NN		 4273 dma_unmap_single(&pdev->dev, buffer_info->dma,
4274 buffer_info->length, DMA_FROM_DEVICE);
679be3ba 4275 buffer_info->dma = 0;
1da177e4 4276
1da177e4 4277 length = le16_to_cpu(rx_desc->length);
ea30e119 4278 /* !EOP means multiple descriptors were used to store a single
40a14dea
JB		 4279 * packet, if thats the case we need to toss it. In fact, we
4280 * to toss every packet with the EOP bit clear and the next
4281 * frame that _does_ have the EOP bit set, as it is by
4282 * definition only a frame fragment
4283 */
4284 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
4285 adapter->discarding = true;
4286
4287 if (adapter->discarding) {
a1415ee6 4288 /* All receives must fit into a single buffer */
feb8f478 4289 e_dbg("Receive packet consumed multiple buffers\n");
864c4e45 4290 /* recycle */
8fc897b0 4291 buffer_info->skb = skb;
40a14dea
JB		 4292 if (status & E1000_RXD_STAT_EOP)
4293 adapter->discarding = false;
1da177e4
LT		 4294 goto next_desc;
4295 }
4296
96838a40 4297 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
edbbb3ca 4298 u8 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4299 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4300 last_byte)) {
1da177e4 4301 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4302 e1000_tbi_adjust_stats(hw, &adapter->stats,
6cfbd97b 4303 length, skb->data);
1da177e4 4304 spin_unlock_irqrestore(&adapter->stats_lock,
6cfbd97b 4305 flags);
1da177e4
LT		 4306 length--;
4307 } else {
e825b731
BG		 4308 if (netdev->features & NETIF_F_RXALL)
4309 goto process_skb;
9e2feace
AK		 4310 /* recycle */
4311 buffer_info->skb = skb;
1da177e4
LT		 4312 goto next_desc;
4313 }
1cb5821f 4314 }
1da177e4 4315
e825b731 4316process_skb:
b0d1562c 4317 total_rx_bytes += (length - 4); /* don't count FCS */
835bb129
JB		 4318 total_rx_packets++;
4319
b0d1562c
BG		 4320 if (likely(!(netdev->features & NETIF_F_RXFCS)))
4321 /* adjust length to remove Ethernet CRC, this must be
4322 * done after the TBI_ACCEPT workaround above
4323 */
4324 length -= 4;
4325
57bf6eef
JP		 4326 e1000_check_copybreak(netdev, buffer_info, length, &skb);
4327
996695de 4328 skb_put(skb, length);
1da177e4
LT		 4329
4330 /* Receive Checksum Offload */
a292ca6e 4331 e1000_rx_checksum(adapter,
406874a7
JP		 4332 (u32)(status) |
4333 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4334 le16_to_cpu(rx_desc->csum), skb);
96838a40 4335
edbbb3ca 4336 e1000_receive_skb(adapter, status, rx_desc->special, skb);
c3570acb 4337
1da177e4
LT		 4338next_desc:
4339 rx_desc->status = 0;
1da177e4 4340
72d64a43
JK		 4341 /* return some buffers to hardware, one at a time is too slow */
4342 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4343 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4344 cleaned_count = 0;
4345 }
4346
30320be8 4347 /* use prefetched values */
86c3d59f
JB		 4348 rx_desc = next_rxd;
4349 buffer_info = next_buffer;
1da177e4 4350 }
1da177e4 4351 rx_ring->next_to_clean = i;
72d64a43
JK		 4352
4353 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4354 if (cleaned_count)
4355 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4356
835bb129
JB		 4357 adapter->total_rx_packets += total_rx_packets;
4358 adapter->total_rx_bytes += total_rx_bytes;
5fe31def
AK		 4359 netdev->stats.rx_bytes += total_rx_bytes;
4360 netdev->stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4361 return cleaned;
4362}
4363
edbbb3ca
JB		 4364/**
4365 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
4366 * @adapter: address of board private structure
4367 * @rx_ring: pointer to receive ring structure
4368 * @cleaned_count: number of buffers to allocate this pass
4369 **/
edbbb3ca
JB		 4370static void
4371e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
6cfbd97b 4372 struct e1000_rx_ring *rx_ring, int cleaned_count)
edbbb3ca
JB		 4373{
4374 struct net_device *netdev = adapter->netdev;
4375 struct pci_dev *pdev = adapter->pdev;
4376 struct e1000_rx_desc *rx_desc;
4377 struct e1000_buffer *buffer_info;
4378 struct sk_buff *skb;
4379 unsigned int i;
89d71a66 4380 unsigned int bufsz = 256 - 16 /*for skb_reserve */ ;
edbbb3ca
JB		 4381
4382 i = rx_ring->next_to_use;
4383 buffer_info = &rx_ring->buffer_info[i];
4384
4385 while (cleaned_count--) {
4386 skb = buffer_info->skb;
4387 if (skb) {
4388 skb_trim(skb, 0);
4389 goto check_page;
4390 }
4391
89d71a66 4392 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
edbbb3ca
JB		 4393 if (unlikely(!skb)) {
4394 /* Better luck next round */
4395 adapter->alloc_rx_buff_failed++;
4396 break;
4397 }
4398
edbbb3ca
JB		 4399 buffer_info->skb = skb;
4400 buffer_info->length = adapter->rx_buffer_len;
4401check_page:
4402 /* allocate a new page if necessary */
4403 if (!buffer_info->page) {
4404 buffer_info->page = alloc_page(GFP_ATOMIC);
4405 if (unlikely(!buffer_info->page)) {
4406 adapter->alloc_rx_buff_failed++;
4407 break;
4408 }
4409 }
4410
b5abb028 4411 if (!buffer_info->dma) {
b16f53be 4412 buffer_info->dma = dma_map_page(&pdev->dev,
6cfbd97b 4413 buffer_info->page, 0,
b16f53be
NN		 4414 buffer_info->length,
4415 DMA_FROM_DEVICE);
4416 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4417 put_page(buffer_info->page);
4418 dev_kfree_skb(skb);
4419 buffer_info->page = NULL;
4420 buffer_info->skb = NULL;
4421 buffer_info->dma = 0;
4422 adapter->alloc_rx_buff_failed++;
4423 break; /* while !buffer_info->skb */
4424 }
4425 }
edbbb3ca
JB		 4426
4427 rx_desc = E1000_RX_DESC(*rx_ring, i);
4428 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4429
4430 if (unlikely(++i == rx_ring->count))
4431 i = 0;
4432 buffer_info = &rx_ring->buffer_info[i];
4433 }
4434
4435 if (likely(rx_ring->next_to_use != i)) {
4436 rx_ring->next_to_use = i;
4437 if (unlikely(i-- == 0))
4438 i = (rx_ring->count - 1);
4439
4440 /* Force memory writes to complete before letting h/w
4441 * know there are new descriptors to fetch. (Only
4442 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4443 * such as IA-64).
4444 */
edbbb3ca
JB		 4445 wmb();
4446 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4447 }
4448}
4449
1da177e4 4450/**
2d7edb92 4451 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4452 * @adapter: address of board private structure
4453 **/
64798845
JP		 4454static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4455 struct e1000_rx_ring *rx_ring,
4456 int cleaned_count)
1da177e4 4457{
1dc32918 4458 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4459 struct net_device *netdev = adapter->netdev;
4460 struct pci_dev *pdev = adapter->pdev;
4461 struct e1000_rx_desc *rx_desc;
4462 struct e1000_buffer *buffer_info;
4463 struct sk_buff *skb;
2648345f 4464 unsigned int i;
89d71a66 4465 unsigned int bufsz = adapter->rx_buffer_len;
1da177e4
LT		 4466
4467 i = rx_ring->next_to_use;
4468 buffer_info = &rx_ring->buffer_info[i];
4469
a292ca6e 4470 while (cleaned_count--) {
ca6f7224
CH		 4471 skb = buffer_info->skb;
4472 if (skb) {
a292ca6e
JK		 4473 skb_trim(skb, 0);
4474 goto map_skb;
4475 }
4476
89d71a66 4477 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
96838a40 4478 if (unlikely(!skb)) {
1da177e4 4479 /* Better luck next round */
72d64a43 4480 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4481 break;
4482 }
4483
2648345f 4484 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4485 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4486 struct sk_buff *oldskb = skb;
feb8f478
ET		 4487 e_err(rx_err, "skb align check failed: %u bytes at "
4488 "%p\n", bufsz, skb->data);
2648345f 4489 /* Try again, without freeing the previous */
89d71a66 4490 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
2648345f 4491 /* Failed allocation, critical failure */
1da177e4
LT		 4492 if (!skb) {
4493 dev_kfree_skb(oldskb);
edbbb3ca 4494 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4495 break;
4496 }
2648345f 4497
1da177e4
LT		 4498 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4499 /* give up */
4500 dev_kfree_skb(skb);
4501 dev_kfree_skb(oldskb);
edbbb3ca 4502 adapter->alloc_rx_buff_failed++;
1da177e4 4503 break; /* while !buffer_info->skb */
1da177e4 4504 }
ca6f7224
CH		 4505
4506 /* Use new allocation */
4507 dev_kfree_skb(oldskb);
1da177e4 4508 }
1da177e4
LT		 4509 buffer_info->skb = skb;
4510 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4511map_skb:
b16f53be 4512 buffer_info->dma = dma_map_single(&pdev->dev,
1da177e4 4513 skb->data,
edbbb3ca 4514 buffer_info->length,
b16f53be
NN		 4515 DMA_FROM_DEVICE);
4516 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
b5abb028
AB		 4517 dev_kfree_skb(skb);
4518 buffer_info->skb = NULL;
4519 buffer_info->dma = 0;
4520 adapter->alloc_rx_buff_failed++;
4521 break; /* while !buffer_info->skb */
4522 }
1da177e4 4523
6cfbd97b 4524 /* XXX if it was allocated cleanly it will never map to a
edbbb3ca
JB		 4525 * boundary crossing
4526 */
4527
2648345f
MC		 4528 /* Fix for errata 23, can't cross 64kB boundary */
4529 if (!e1000_check_64k_bound(adapter,
4530 (void *)(unsigned long)buffer_info->dma,
4531 adapter->rx_buffer_len)) {
feb8f478
ET		 4532 e_err(rx_err, "dma align check failed: %u bytes at "
4533 "%p\n", adapter->rx_buffer_len,
675ad473 4534 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4535 dev_kfree_skb(skb);
4536 buffer_info->skb = NULL;
4537
b16f53be 4538 dma_unmap_single(&pdev->dev, buffer_info->dma,
1da177e4 4539 adapter->rx_buffer_len,
b16f53be 4540 DMA_FROM_DEVICE);
679be3ba 4541 buffer_info->dma = 0;
1da177e4 4542
edbbb3ca 4543 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4544 break; /* while !buffer_info->skb */
4545 }
1da177e4
LT		 4546 rx_desc = E1000_RX_DESC(*rx_ring, i);
4547 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4548
96838a40
JB		 4549 if (unlikely(++i == rx_ring->count))
4550 i = 0;
1da177e4
LT		 4551 buffer_info = &rx_ring->buffer_info[i];
4552 }
4553
b92ff8ee
JB		 4554 if (likely(rx_ring->next_to_use != i)) {
4555 rx_ring->next_to_use = i;
4556 if (unlikely(i-- == 0))
4557 i = (rx_ring->count - 1);
4558
4559 /* Force memory writes to complete before letting h/w
4560 * know there are new descriptors to fetch. (Only
4561 * applicable for weak-ordered memory model archs,
6cfbd97b
JK		 4562 * such as IA-64).
4563 */
b92ff8ee 4564 wmb();
1dc32918 4565 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4566 }
1da177e4
LT		 4567}
4568
4569/**
4570 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4571 * @adapter:
4572 **/
64798845 4573static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4574{
1dc32918 4575 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4576 u16 phy_status;
4577 u16 phy_ctrl;
1da177e4 4578
1dc32918
JP		 4579 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4580 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4581 return;
4582
96838a40 4583 if (adapter->smartspeed == 0) {
1da177e4 4584 /* If Master/Slave config fault is asserted twice,
6cfbd97b
JK		 4585 * we assume back-to-back
4586 */
1dc32918 4587 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4588 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4589 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4590 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4591 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4592 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4593 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4594 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4595 phy_ctrl);
4596 adapter->smartspeed++;
1dc32918
JP		 4597 if (!e1000_phy_setup_autoneg(hw) &&
4598 !e1000_read_phy_reg(hw, PHY_CTRL,
6cfbd97b 4599 &phy_ctrl)) {
1da177e4
LT		 4600 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4601 MII_CR_RESTART_AUTO_NEG);
1dc32918 4602 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4603 phy_ctrl);
4604 }
4605 }
4606 return;
96838a40 4607 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4608 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4609 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4610 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4611 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4612 if (!e1000_phy_setup_autoneg(hw) &&
4613 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4614 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4615 MII_CR_RESTART_AUTO_NEG);
1dc32918 4616 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4617 }
4618 }
4619 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4620 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4621 adapter->smartspeed = 0;
4622}
4623
4624/**
4625 * e1000_ioctl -
4626 * @netdev:
4627 * @ifreq:
4628 * @cmd:
4629 **/
64798845 4630static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4631{
4632 switch (cmd) {
4633 case SIOCGMIIPHY:
4634 case SIOCGMIIREG:
4635 case SIOCSMIIREG:
4636 return e1000_mii_ioctl(netdev, ifr, cmd);
4637 default:
4638 return -EOPNOTSUPP;
4639 }
4640}
4641
4642/**
4643 * e1000_mii_ioctl -
4644 * @netdev:
4645 * @ifreq:
4646 * @cmd:
4647 **/
64798845
JP		 4648static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4649 int cmd)
1da177e4 4650{
60490fe0 4651 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4652 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4653 struct mii_ioctl_data *data = if_mii(ifr);
4654 int retval;
406874a7 4655 u16 mii_reg;
97876fc6 4656 unsigned long flags;
1da177e4 4657
1dc32918 4658 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4659 return -EOPNOTSUPP;
4660
4661 switch (cmd) {
4662 case SIOCGMIIPHY:
1dc32918 4663 data->phy_id = hw->phy_addr;
1da177e4
LT		 4664 break;
4665 case SIOCGMIIREG:
97876fc6 4666 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4667 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4668 &data->val_out)) {
4669 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4670 return -EIO;
97876fc6
MC		 4671 }
4672 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4673 break;
4674 case SIOCSMIIREG:
96838a40 4675 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4676 return -EFAULT;
4677 mii_reg = data->val_in;
97876fc6 4678 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4679 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4680 mii_reg)) {
4681 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4682 return -EIO;
97876fc6 4683 }
f0163ac4 4684 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4685 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4686 switch (data->reg_num) {
4687 case PHY_CTRL:
96838a40 4688 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4689 break;
96838a40 4690 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4691 hw->autoneg = 1;
4692 hw->autoneg_advertised = 0x2F;
1da177e4 4693 } else {
14ad2513 4694 u32 speed;
1da177e4 4695 if (mii_reg & 0x40)
14ad2513 4696 speed = SPEED_1000;
1da177e4 4697 else if (mii_reg & 0x2000)
14ad2513 4698 speed = SPEED_100;
1da177e4 4699 else
14ad2513
DD		 4700 speed = SPEED_10;
4701 retval = e1000_set_spd_dplx(
4702 adapter, speed,
4703 ((mii_reg & 0x100)
4704 ? DUPLEX_FULL :
4705 DUPLEX_HALF));
f0163ac4 4706 if (retval)
1da177e4
LT		 4707 return retval;
4708 }
2db10a08
AK		 4709 if (netif_running(adapter->netdev))
4710 e1000_reinit_locked(adapter);
4711 else
1da177e4
LT		 4712 e1000_reset(adapter);
4713 break;
4714 case M88E1000_PHY_SPEC_CTRL:
4715 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4716 if (e1000_phy_reset(hw))
1da177e4
LT		 4717 return -EIO;
4718 break;
4719 }
4720 } else {
4721 switch (data->reg_num) {
4722 case PHY_CTRL:
96838a40 4723 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4724 break;
2db10a08
AK		 4725 if (netif_running(adapter->netdev))
4726 e1000_reinit_locked(adapter);
4727 else
1da177e4
LT		 4728 e1000_reset(adapter);
4729 break;
4730 }
4731 }
4732 break;
4733 default:
4734 return -EOPNOTSUPP;
4735 }
4736 return E1000_SUCCESS;
4737}
4738
64798845 4739void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4740{
4741 struct e1000_adapter *adapter = hw->back;
2648345f 4742 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4743
96838a40 4744 if (ret_val)
feb8f478 4745 e_err(probe, "Error in setting MWI\n");
1da177e4
LT		 4746}
4747
64798845 4748void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4749{
4750 struct e1000_adapter *adapter = hw->back;
4751
4752 pci_clear_mwi(adapter->pdev);
4753}
4754
64798845 4755int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4756{
4757 struct e1000_adapter *adapter = hw->back;
4758 return pcix_get_mmrbc(adapter->pdev);
4759}
4760
64798845 4761void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4762{
4763 struct e1000_adapter *adapter = hw->back;
4764 pcix_set_mmrbc(adapter->pdev, mmrbc);
4765}
4766
64798845 4767void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4768{
4769 outl(value, port);
4770}
4771
5622e404
JP		 4772static bool e1000_vlan_used(struct e1000_adapter *adapter)
4773{
4774 u16 vid;
4775
4776 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4777 return true;
4778 return false;
4779}
4780
52f5509f
JP		 4781static void __e1000_vlan_mode(struct e1000_adapter *adapter,
4782 netdev_features_t features)
4783{
4784 struct e1000_hw *hw = &adapter->hw;
4785 u32 ctrl;
4786
4787 ctrl = er32(CTRL);
f646968f 4788 if (features & NETIF_F_HW_VLAN_CTAG_RX) {
52f5509f
JP		 4789 /* enable VLAN tag insert/strip */
4790 ctrl |= E1000_CTRL_VME;
4791 } else {
4792 /* disable VLAN tag insert/strip */
4793 ctrl &= ~E1000_CTRL_VME;
4794 }
4795 ew32(CTRL, ctrl);
4796}
5622e404
JP		 4797static void e1000_vlan_filter_on_off(struct e1000_adapter *adapter,
4798 bool filter_on)
1da177e4 4799{
1dc32918 4800 struct e1000_hw *hw = &adapter->hw;
5622e404 4801 u32 rctl;
1da177e4 4802
9150b76a
JB		 4803 if (!test_bit(__E1000_DOWN, &adapter->flags))
4804 e1000_irq_disable(adapter);
1da177e4 4805
52f5509f 4806 __e1000_vlan_mode(adapter, adapter->netdev->features);
5622e404 4807 if (filter_on) {
1532ecea
JB		 4808 /* enable VLAN receive filtering */
4809 rctl = er32(RCTL);
4810 rctl &= ~E1000_RCTL_CFIEN;
5622e404 4811 if (!(adapter->netdev->flags & IFF_PROMISC))
1532ecea
JB		 4812 rctl |= E1000_RCTL_VFE;
4813 ew32(RCTL, rctl);
4814 e1000_update_mng_vlan(adapter);
1da177e4 4815 } else {
1532ecea
JB		 4816 /* disable VLAN receive filtering */
4817 rctl = er32(RCTL);
4818 rctl &= ~E1000_RCTL_VFE;
4819 ew32(RCTL, rctl);
5622e404 4820 }
fd38d7a0 4821
5622e404
JP		 4822 if (!test_bit(__E1000_DOWN, &adapter->flags))
4823 e1000_irq_enable(adapter);
4824}
4825
c8f44aff 4826static void e1000_vlan_mode(struct net_device *netdev,
52f5509f 4827 netdev_features_t features)
5622e404
JP		 4828{
4829 struct e1000_adapter *adapter = netdev_priv(netdev);
5622e404
JP		 4830
4831 if (!test_bit(__E1000_DOWN, &adapter->flags))
4832 e1000_irq_disable(adapter);
4833
52f5509f 4834 __e1000_vlan_mode(adapter, features);
1da177e4 4835
9150b76a
JB		 4836 if (!test_bit(__E1000_DOWN, &adapter->flags))
4837 e1000_irq_enable(adapter);
1da177e4
LT		 4838}
4839
8e586137 4840static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4841{
60490fe0 4842 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4843 struct e1000_hw *hw = &adapter->hw;
406874a7 4844 u32 vfta, index;
96838a40 4845
1dc32918 4846 if ((hw->mng_cookie.status &
96838a40
JB		 4847 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4848 (vid == adapter->mng_vlan_id))
8e586137 4849 return 0;
5622e404
JP		 4850
4851 if (!e1000_vlan_used(adapter))
4852 e1000_vlan_filter_on_off(adapter, true);
4853
1da177e4
LT		 4854 /* add VID to filter table */
4855 index = (vid >> 5) & 0x7F;
1dc32918 4856 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4857 vfta |= (1 << (vid & 0x1F));
1dc32918 4858 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4859
4860 set_bit(vid, adapter->active_vlans);
8e586137
JP		 4861
4862 return 0;
1da177e4
LT		 4863}
4864
8e586137 4865static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4866{
60490fe0 4867 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4868 struct e1000_hw *hw = &adapter->hw;
406874a7 4869 u32 vfta, index;
1da177e4 4870
9150b76a
JB		 4871 if (!test_bit(__E1000_DOWN, &adapter->flags))
4872 e1000_irq_disable(adapter);
9150b76a
JB		 4873 if (!test_bit(__E1000_DOWN, &adapter->flags))
4874 e1000_irq_enable(adapter);
1da177e4
LT		 4875
4876 /* remove VID from filter table */
4877 index = (vid >> 5) & 0x7F;
1dc32918 4878 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4879 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4880 e1000_write_vfta(hw, index, vfta);
5622e404
JP		 4881
4882 clear_bit(vid, adapter->active_vlans);
4883
4884 if (!e1000_vlan_used(adapter))
4885 e1000_vlan_filter_on_off(adapter, false);
8e586137
JP		 4886
4887 return 0;
1da177e4
LT		 4888}
4889
64798845 4890static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4 4891{
5622e404 4892 u16 vid;
1da177e4 4893
5622e404
JP		 4894 if (!e1000_vlan_used(adapter))
4895 return;
4896
4897 e1000_vlan_filter_on_off(adapter, true);
4898 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
4899 e1000_vlan_rx_add_vid(adapter->netdev, vid);
1da177e4
LT		 4900}
4901
14ad2513 4902int e1000_set_spd_dplx(struct e1000_adapter *adapter, u32 spd, u8 dplx)
1da177e4 4903{
1dc32918
JP		 4904 struct e1000_hw *hw = &adapter->hw;
4905
4906 hw->autoneg = 0;
1da177e4 4907
14ad2513 4908 /* Make sure dplx is at most 1 bit and lsb of speed is not set
6cfbd97b
JK		 4909 * for the switch() below to work
4910 */
14ad2513
DD		 4911 if ((spd & 1) || (dplx & ~1))
4912 goto err_inval;
4913
6921368f 4914 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4915 if ((hw->media_type == e1000_media_type_fiber) &&
14ad2513
DD		 4916 spd != SPEED_1000 &&
4917 dplx != DUPLEX_FULL)
4918 goto err_inval;
6921368f 4919
14ad2513 4920 switch (spd + dplx) {
1da177e4 4921 case SPEED_10 + DUPLEX_HALF:
1dc32918 4922 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4923 break;
4924 case SPEED_10 + DUPLEX_FULL:
1dc32918 4925 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4926 break;
4927 case SPEED_100 + DUPLEX_HALF:
1dc32918 4928 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4929 break;
4930 case SPEED_100 + DUPLEX_FULL:
1dc32918 4931 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4932 break;
4933 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4934 hw->autoneg = 1;
4935 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4936 break;
4937 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4938 default:
14ad2513 4939 goto err_inval;
1da177e4 4940 }
c819bbd5
JB		 4941
4942 /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
4943 hw->mdix = AUTO_ALL_MODES;
4944
1da177e4 4945 return 0;
14ad2513
DD		 4946
4947err_inval:
4948 e_err(probe, "Unsupported Speed/Duplex configuration\n");
4949 return -EINVAL;
1da177e4
LT		 4950}
4951
b43fcd7d 4952static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4953{
4954 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4955 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4956 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4957 u32 ctrl, ctrl_ext, rctl, status;
4958 u32 wufc = adapter->wol;
6fdfef16 4959#ifdef CONFIG_PM
240b1710 4960 int retval = 0;
6fdfef16 4961#endif
1da177e4
LT		 4962
4963 netif_device_detach(netdev);
4964
2db10a08
AK		 4965 if (netif_running(netdev)) {
4966 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4967 e1000_down(adapter);
2db10a08 4968 }
1da177e4 4969
2f82665f 4970#ifdef CONFIG_PM
1d33e9c6 4971 retval = pci_save_state(pdev);
3a3847e0 4972 if (retval)
2f82665f
JB		 4973 return retval;
4974#endif
4975
1dc32918 4976 status = er32(STATUS);
96838a40 4977 if (status & E1000_STATUS_LU)
1da177e4
LT		 4978 wufc &= ~E1000_WUFC_LNKC;
4979
96838a40 4980 if (wufc) {
1da177e4 4981 e1000_setup_rctl(adapter);
db0ce50d 4982 e1000_set_rx_mode(netdev);
1da177e4 4983
b868179c
DN		 4984 rctl = er32(RCTL);
4985
1da177e4 4986 /* turn on all-multi mode if wake on multicast is enabled */
b868179c 4987 if (wufc & E1000_WUFC_MC)
1da177e4 4988 rctl |= E1000_RCTL_MPE;
b868179c
DN		 4989
4990 /* enable receives in the hardware */
4991 ew32(RCTL, rctl | E1000_RCTL_EN);
1da177e4 4992
1dc32918
JP		 4993 if (hw->mac_type >= e1000_82540) {
4994 ctrl = er32(CTRL);
1da177e4
LT		 4995 /* advertise wake from D3Cold */
4996 #define E1000_CTRL_ADVD3WUC 0x00100000
4997 /* phy power management enable */
4998 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4999 ctrl |= E1000_CTRL_ADVD3WUC |
5000 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 5001 ew32(CTRL, ctrl);
1da177e4
LT		 5002 }
5003
1dc32918 5004 if (hw->media_type == e1000_media_type_fiber ||
1532ecea 5005 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 5006 /* keep the laser running in D3 */
1dc32918 5007 ctrl_ext = er32(CTRL_EXT);
1da177e4 5008 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 5009 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 5010 }
5011
1dc32918
JP		 5012 ew32(WUC, E1000_WUC_PME_EN);
5013 ew32(WUFC, wufc);
1da177e4 5014 } else {
1dc32918
JP		 5015 ew32(WUC, 0);
5016 ew32(WUFC, 0);
1da177e4
LT		 5017 }
5018
0fccd0e9
JG		 5019 e1000_release_manageability(adapter);
5020
b43fcd7d
RW		 5021 *enable_wake = !!wufc;
5022
0fccd0e9 5023 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 5024 if (adapter->en_mng_pt)
5025 *enable_wake = true;
1da177e4 5026
edd106fc
AK		 5027 if (netif_running(netdev))
5028 e1000_free_irq(adapter);
5029
1da177e4 5030 pci_disable_device(pdev);
240b1710 5031
1da177e4
LT		 5032 return 0;
5033}
5034
2f82665f 5035#ifdef CONFIG_PM
b43fcd7d
RW		 5036static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5037{
5038 int retval;
5039 bool wake;
5040
5041 retval = __e1000_shutdown(pdev, &wake);
5042 if (retval)
5043 return retval;
5044
5045 if (wake) {
5046 pci_prepare_to_sleep(pdev);
5047 } else {
5048 pci_wake_from_d3(pdev, false);
5049 pci_set_power_state(pdev, PCI_D3hot);
5050 }
5051
5052 return 0;
5053}
5054
64798845 5055static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 5056{
5057 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5058 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5059 struct e1000_hw *hw = &adapter->hw;
406874a7 5060 u32 err;
1da177e4 5061
d0e027db 5062 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5063 pci_restore_state(pdev);
dbb5aaeb 5064 pci_save_state(pdev);
81250297
TI		 5065
5066 if (adapter->need_ioport)
5067 err = pci_enable_device(pdev);
5068 else
5069 err = pci_enable_device_mem(pdev);
c7be73bc 5070 if (err) {
675ad473 5071 pr_err("Cannot enable PCI device from suspend\n");
3d1dd8cb
AK		 5072 return err;
5073 }
a4cb847d 5074 pci_set_master(pdev);
1da177e4 5075
d0e027db
AK		 5076 pci_enable_wake(pdev, PCI_D3hot, 0);
5077 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5078
c7be73bc
JP		 5079 if (netif_running(netdev)) {
5080 err = e1000_request_irq(adapter);
5081 if (err)
5082 return err;
5083 }
edd106fc
AK		 5084
5085 e1000_power_up_phy(adapter);
1da177e4 5086 e1000_reset(adapter);
1dc32918 5087 ew32(WUS, ~0);
1da177e4 5088
0fccd0e9
JG		 5089 e1000_init_manageability(adapter);
5090
96838a40 5091 if (netif_running(netdev))
1da177e4
LT		 5092 e1000_up(adapter);
5093
5094 netif_device_attach(netdev);
5095
1da177e4
LT		 5096 return 0;
5097}
5098#endif
c653e635
AK		 5099
5100static void e1000_shutdown(struct pci_dev *pdev)
5101{
b43fcd7d
RW		 5102 bool wake;
5103
5104 __e1000_shutdown(pdev, &wake);
5105
5106 if (system_state == SYSTEM_POWER_OFF) {
5107 pci_wake_from_d3(pdev, wake);
5108 pci_set_power_state(pdev, PCI_D3hot);
5109 }
c653e635
AK		 5110}
5111
1da177e4 5112#ifdef CONFIG_NET_POLL_CONTROLLER
6cfbd97b 5113/* Polling 'interrupt' - used by things like netconsole to send skbs
1da177e4
LT		 5114 * without having to re-enable interrupts. It's not called while
5115 * the interrupt routine is executing.
5116 */
64798845 5117static void e1000_netpoll(struct net_device *netdev)
1da177e4 5118{
60490fe0 5119 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5120
1da177e4 5121 disable_irq(adapter->pdev->irq);
7d12e780 5122 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 5123 enable_irq(adapter->pdev->irq);
5124}
5125#endif
5126
9026729b
AK		 5127/**
5128 * e1000_io_error_detected - called when PCI error is detected
5129 * @pdev: Pointer to PCI device
120a5d0d 5130 * @state: The current pci connection state
9026729b
AK		 5131 *
5132 * This function is called after a PCI bus error affecting
5133 * this device has been detected.
5134 */
64798845
JP		 5135static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5136 pci_channel_state_t state)
9026729b
AK		 5137{
5138 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5139 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 5140
5141 netif_device_detach(netdev);
5142
eab63302
AD		 5143 if (state == pci_channel_io_perm_failure)
5144 return PCI_ERS_RESULT_DISCONNECT;
5145
9026729b
AK		 5146 if (netif_running(netdev))
5147 e1000_down(adapter);
72e8d6bb 5148 pci_disable_device(pdev);
9026729b
AK		 5149
5150 /* Request a slot slot reset. */
5151 return PCI_ERS_RESULT_NEED_RESET;
5152}
5153
5154/**
5155 * e1000_io_slot_reset - called after the pci bus has been reset.
5156 * @pdev: Pointer to PCI device
5157 *
5158 * Restart the card from scratch, as if from a cold-boot. Implementation
5159 * resembles the first-half of the e1000_resume routine.
5160 */
5161static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5162{
5163 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5164 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 5165 struct e1000_hw *hw = &adapter->hw;
81250297 5166 int err;
9026729b 5167
81250297
TI		 5168 if (adapter->need_ioport)
5169 err = pci_enable_device(pdev);
5170 else
5171 err = pci_enable_device_mem(pdev);
5172 if (err) {
675ad473 5173 pr_err("Cannot re-enable PCI device after reset.\n");
9026729b
AK		 5174 return PCI_ERS_RESULT_DISCONNECT;
5175 }
5176 pci_set_master(pdev);
5177
dbf38c94
LV		 5178 pci_enable_wake(pdev, PCI_D3hot, 0);
5179 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5180
9026729b 5181 e1000_reset(adapter);
1dc32918 5182 ew32(WUS, ~0);
9026729b
AK		 5183
5184 return PCI_ERS_RESULT_RECOVERED;
5185}
5186
5187/**
5188 * e1000_io_resume - called when traffic can start flowing again.
5189 * @pdev: Pointer to PCI device
5190 *
5191 * This callback is called when the error recovery driver tells us that
5192 * its OK to resume normal operation. Implementation resembles the
5193 * second-half of the e1000_resume routine.
5194 */
5195static void e1000_io_resume(struct pci_dev *pdev)
5196{
5197 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 5198 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9
JG		 5199
5200 e1000_init_manageability(adapter);
9026729b
AK		 5201
5202 if (netif_running(netdev)) {
5203 if (e1000_up(adapter)) {
675ad473 5204 pr_info("can't bring device back up after reset\n");
9026729b
AK		 5205 return;
5206 }
5207 }
5208
5209 netif_device_attach(netdev);
9026729b
AK		 5210}
5211
1da177e4 5212/* e1000_main.c */
Linux kernel - Deliverables
This page took 1.529322 seconds and 5 git commands to generate.