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e1000e: Resolve intermittent negotiation issue on 82574/82583.
[deliverable/linux.git] / drivers / net / ethernet / intel / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
f5e261e6 4 Copyright(c) 1999 - 2012 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
9fb7a5f7 39#include <linux/interrupt.h>
bc7f75fa
AK		 40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
bc7f75fa
AK		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/mii.h>
46#include <linux/ethtool.h>
47#include <linux/if_vlan.h>
48#include <linux/cpu.h>
49#include <linux/smp.h>
e8db0be1 50#include <linux/pm_qos.h>
23606cf5 51#include <linux/pm_runtime.h>
111b9dc5 52#include <linux/aer.h>
70c71606 53#include <linux/prefetch.h>
bc7f75fa
AK		 54
55#include "e1000.h"
56
b3ccf267 57#define DRV_EXTRAVERSION "-k"
c14c643b 58
fad59b0d 59#define DRV_VERSION "1.10.6" DRV_EXTRAVERSION
bc7f75fa
AK		 60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION;
62
b3f4d599 63#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
64static int debug = -1;
65module_param(debug, int, 0);
66MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
67
78cd29d5
BA		 68static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
69
bc7f75fa
AK		 70static const struct e1000_info *e1000_info_tbl[] = {
71 [board_82571] = &e1000_82571_info,
72 [board_82572] = &e1000_82572_info,
73 [board_82573] = &e1000_82573_info,
4662e82b 74 [board_82574] = &e1000_82574_info,
8c81c9c3 75 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 76 [board_80003es2lan] = &e1000_es2_info,
77 [board_ich8lan] = &e1000_ich8_info,
78 [board_ich9lan] = &e1000_ich9_info,
f4187b56 79 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 80 [board_pchlan] = &e1000_pch_info,
d3738bb8 81 [board_pch2lan] = &e1000_pch2_info,
bc7f75fa
AK		 82};
83
84f4ee90
TI		 84struct e1000_reg_info {
85 u32 ofs;
86 char *name;
87};
88
af667a29
BA		 89#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
90#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
91#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
92#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
93#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
94
95#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
96#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
97#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
98#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
99#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
84f4ee90
TI		 100
101static const struct e1000_reg_info e1000_reg_info_tbl[] = {
102
103 /* General Registers */
104 {E1000_CTRL, "CTRL"},
105 {E1000_STATUS, "STATUS"},
106 {E1000_CTRL_EXT, "CTRL_EXT"},
107
108 /* Interrupt Registers */
109 {E1000_ICR, "ICR"},
110
af667a29 111 /* Rx Registers */
84f4ee90 112 {E1000_RCTL, "RCTL"},
1e36052e
BA		 113 {E1000_RDLEN(0), "RDLEN"},
114 {E1000_RDH(0), "RDH"},
115 {E1000_RDT(0), "RDT"},
84f4ee90
TI		 116 {E1000_RDTR, "RDTR"},
117 {E1000_RXDCTL(0), "RXDCTL"},
118 {E1000_ERT, "ERT"},
1e36052e
BA		 119 {E1000_RDBAL(0), "RDBAL"},
120 {E1000_RDBAH(0), "RDBAH"},
84f4ee90
TI		 121 {E1000_RDFH, "RDFH"},
122 {E1000_RDFT, "RDFT"},
123 {E1000_RDFHS, "RDFHS"},
124 {E1000_RDFTS, "RDFTS"},
125 {E1000_RDFPC, "RDFPC"},
126
af667a29 127 /* Tx Registers */
84f4ee90 128 {E1000_TCTL, "TCTL"},
1e36052e
BA		 129 {E1000_TDBAL(0), "TDBAL"},
130 {E1000_TDBAH(0), "TDBAH"},
131 {E1000_TDLEN(0), "TDLEN"},
132 {E1000_TDH(0), "TDH"},
133 {E1000_TDT(0), "TDT"},
84f4ee90
TI		 134 {E1000_TIDV, "TIDV"},
135 {E1000_TXDCTL(0), "TXDCTL"},
136 {E1000_TADV, "TADV"},
137 {E1000_TARC(0), "TARC"},
138 {E1000_TDFH, "TDFH"},
139 {E1000_TDFT, "TDFT"},
140 {E1000_TDFHS, "TDFHS"},
141 {E1000_TDFTS, "TDFTS"},
142 {E1000_TDFPC, "TDFPC"},
143
144 /* List Terminator */
f36bb6ca 145 {0, NULL}
84f4ee90
TI		 146};
147
148/*
149 * e1000_regdump - register printout routine
150 */
151static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
152{
153 int n = 0;
154 char rname[16];
155 u32 regs[8];
156
157 switch (reginfo->ofs) {
158 case E1000_RXDCTL(0):
159 for (n = 0; n < 2; n++)
160 regs[n] = __er32(hw, E1000_RXDCTL(n));
161 break;
162 case E1000_TXDCTL(0):
163 for (n = 0; n < 2; n++)
164 regs[n] = __er32(hw, E1000_TXDCTL(n));
165 break;
166 case E1000_TARC(0):
167 for (n = 0; n < 2; n++)
168 regs[n] = __er32(hw, E1000_TARC(n));
169 break;
170 default:
ef456f85
JK		 171 pr_info("%-15s %08x\n",
172 reginfo->name, __er32(hw, reginfo->ofs));
84f4ee90
TI		 173 return;
174 }
175
176 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
ef456f85 177 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
84f4ee90
TI		 178}
179
84f4ee90 180/*
af667a29 181 * e1000e_dump - Print registers, Tx-ring and Rx-ring
84f4ee90
TI		 182 */
183static void e1000e_dump(struct e1000_adapter *adapter)
184{
185 struct net_device *netdev = adapter->netdev;
186 struct e1000_hw *hw = &adapter->hw;
187 struct e1000_reg_info *reginfo;
188 struct e1000_ring *tx_ring = adapter->tx_ring;
189 struct e1000_tx_desc *tx_desc;
af667a29 190 struct my_u0 {
e885d762
BA		 191 __le64 a;
192 __le64 b;
af667a29 193 } *u0;
84f4ee90
TI		 194 struct e1000_buffer *buffer_info;
195 struct e1000_ring *rx_ring = adapter->rx_ring;
196 union e1000_rx_desc_packet_split *rx_desc_ps;
5f450212 197 union e1000_rx_desc_extended *rx_desc;
af667a29 198 struct my_u1 {
e885d762
BA		 199 __le64 a;
200 __le64 b;
201 __le64 c;
202 __le64 d;
af667a29 203 } *u1;
84f4ee90
TI		 204 u32 staterr;
205 int i = 0;
206
207 if (!netif_msg_hw(adapter))
208 return;
209
210 /* Print netdevice Info */
211 if (netdev) {
212 dev_info(&adapter->pdev->dev, "Net device Info\n");
ef456f85
JK		 213 pr_info("Device Name state trans_start last_rx\n");
214 pr_info("%-15s %016lX %016lX %016lX\n",
215 netdev->name, netdev->state, netdev->trans_start,
216 netdev->last_rx);
84f4ee90
TI		 217 }
218
219 /* Print Registers */
220 dev_info(&adapter->pdev->dev, "Register Dump\n");
ef456f85 221 pr_info(" Register Name Value\n");
84f4ee90
TI		 222 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
223 reginfo->name; reginfo++) {
224 e1000_regdump(hw, reginfo);
225 }
226
af667a29 227 /* Print Tx Ring Summary */
84f4ee90 228 if (!netdev || !netif_running(netdev))
fe1e980f 229 return;
84f4ee90 230
af667a29 231 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
ef456f85 232 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
84f4ee90 233 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
ef456f85
JK		 234 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
235 0, tx_ring->next_to_use, tx_ring->next_to_clean,
236 (unsigned long long)buffer_info->dma,
237 buffer_info->length,
238 buffer_info->next_to_watch,
239 (unsigned long long)buffer_info->time_stamp);
84f4ee90 240
af667a29 241 /* Print Tx Ring */
84f4ee90
TI		 242 if (!netif_msg_tx_done(adapter))
243 goto rx_ring_summary;
244
af667a29 245 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
84f4ee90
TI		 246
247 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
248 *
249 * Legacy Transmit Descriptor
250 * +--------------------------------------------------------------+
251 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
252 * +--------------------------------------------------------------+
253 * 8 | Special | CSS | Status | CMD | CSO | Length |
254 * +--------------------------------------------------------------+
255 * 63 48 47 36 35 32 31 24 23 16 15 0
256 *
257 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
258 * 63 48 47 40 39 32 31 16 15 8 7 0
259 * +----------------------------------------------------------------+
260 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
261 * +----------------------------------------------------------------+
262 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
263 * +----------------------------------------------------------------+
264 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
265 *
266 * Extended Data Descriptor (DTYP=0x1)
267 * +----------------------------------------------------------------+
268 * 0 | Buffer Address [63:0] |
269 * +----------------------------------------------------------------+
270 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
271 * +----------------------------------------------------------------+
272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
273 */
ef456f85
JK		 274 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
275 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
276 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
84f4ee90 277 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
ef456f85 278 const char *next_desc;
84f4ee90
TI		 279 tx_desc = E1000_TX_DESC(*tx_ring, i);
280 buffer_info = &tx_ring->buffer_info[i];
281 u0 = (struct my_u0 *)tx_desc;
84f4ee90 282 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
ef456f85 283 next_desc = " NTC/U";
84f4ee90 284 else if (i == tx_ring->next_to_use)
ef456f85 285 next_desc = " NTU";
84f4ee90 286 else if (i == tx_ring->next_to_clean)
ef456f85 287 next_desc = " NTC";
84f4ee90 288 else
ef456f85
JK		 289 next_desc = "";
290 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
291 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
292 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
293 i,
294 (unsigned long long)le64_to_cpu(u0->a),
295 (unsigned long long)le64_to_cpu(u0->b),
296 (unsigned long long)buffer_info->dma,
297 buffer_info->length, buffer_info->next_to_watch,
298 (unsigned long long)buffer_info->time_stamp,
299 buffer_info->skb, next_desc);
84f4ee90
TI		 300
301 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
302 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
af667a29
BA		 303 16, 1, phys_to_virt(buffer_info->dma),
304 buffer_info->length, true);
84f4ee90
TI		 305 }
306
af667a29 307 /* Print Rx Ring Summary */
84f4ee90 308rx_ring_summary:
af667a29 309 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
ef456f85
JK		 310 pr_info("Queue [NTU] [NTC]\n");
311 pr_info(" %5d %5X %5X\n",
312 0, rx_ring->next_to_use, rx_ring->next_to_clean);
84f4ee90 313
af667a29 314 /* Print Rx Ring */
84f4ee90 315 if (!netif_msg_rx_status(adapter))
fe1e980f 316 return;
84f4ee90 317
af667a29 318 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
84f4ee90
TI		 319 switch (adapter->rx_ps_pages) {
320 case 1:
321 case 2:
322 case 3:
323 /* [Extended] Packet Split Receive Descriptor Format
324 *
325 * +-----------------------------------------------------+
326 * 0 | Buffer Address 0 [63:0] |
327 * +-----------------------------------------------------+
328 * 8 | Buffer Address 1 [63:0] |
329 * +-----------------------------------------------------+
330 * 16 | Buffer Address 2 [63:0] |
331 * +-----------------------------------------------------+
332 * 24 | Buffer Address 3 [63:0] |
333 * +-----------------------------------------------------+
334 */
ef456f85 335 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
84f4ee90
TI		 336 /* [Extended] Receive Descriptor (Write-Back) Format
337 *
338 * 63 48 47 32 31 13 12 8 7 4 3 0
339 * +------------------------------------------------------+
340 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
341 * | Checksum | Ident | | Queue | | Type |
342 * +------------------------------------------------------+
343 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
344 * +------------------------------------------------------+
345 * 63 48 47 32 31 20 19 0
346 */
ef456f85 347 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
84f4ee90 348 for (i = 0; i < rx_ring->count; i++) {
ef456f85 349 const char *next_desc;
84f4ee90
TI		 350 buffer_info = &rx_ring->buffer_info[i];
351 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
352 u1 = (struct my_u1 *)rx_desc_ps;
353 staterr =
af667a29 354 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
ef456f85
JK		 355
356 if (i == rx_ring->next_to_use)
357 next_desc = " NTU";
358 else if (i == rx_ring->next_to_clean)
359 next_desc = " NTC";
360 else
361 next_desc = "";
362
84f4ee90
TI		 363 if (staterr & E1000_RXD_STAT_DD) {
364 /* Descriptor Done */
ef456f85
JK		 365 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
366 "RWB", i,
367 (unsigned long long)le64_to_cpu(u1->a),
368 (unsigned long long)le64_to_cpu(u1->b),
369 (unsigned long long)le64_to_cpu(u1->c),
370 (unsigned long long)le64_to_cpu(u1->d),
371 buffer_info->skb, next_desc);
84f4ee90 372 } else {
ef456f85
JK		 373 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
374 "R ", i,
375 (unsigned long long)le64_to_cpu(u1->a),
376 (unsigned long long)le64_to_cpu(u1->b),
377 (unsigned long long)le64_to_cpu(u1->c),
378 (unsigned long long)le64_to_cpu(u1->d),
379 (unsigned long long)buffer_info->dma,
380 buffer_info->skb, next_desc);
84f4ee90
TI		 381
382 if (netif_msg_pktdata(adapter))
383 print_hex_dump(KERN_INFO, "",
384 DUMP_PREFIX_ADDRESS, 16, 1,
385 phys_to_virt(buffer_info->dma),
386 adapter->rx_ps_bsize0, true);
387 }
84f4ee90
TI		 388 }
389 break;
390 default:
391 case 0:
5f450212 392 /* Extended Receive Descriptor (Read) Format
84f4ee90 393 *
5f450212
BA		 394 * +-----------------------------------------------------+
395 * 0 | Buffer Address [63:0] |
396 * +-----------------------------------------------------+
397 * 8 | Reserved |
398 * +-----------------------------------------------------+
84f4ee90 399 */
ef456f85 400 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
5f450212
BA		 401 /* Extended Receive Descriptor (Write-Back) Format
402 *
403 * 63 48 47 32 31 24 23 4 3 0
404 * +------------------------------------------------------+
405 * | RSS Hash | | | |
406 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
407 * | Packet | IP | | | Type |
408 * | Checksum | Ident | | | |
409 * +------------------------------------------------------+
410 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
411 * +------------------------------------------------------+
412 * 63 48 47 32 31 20 19 0
413 */
ef456f85 414 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
5f450212
BA		 415
416 for (i = 0; i < rx_ring->count; i++) {
ef456f85
JK		 417 const char *next_desc;
418
84f4ee90 419 buffer_info = &rx_ring->buffer_info[i];
5f450212
BA		 420 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
421 u1 = (struct my_u1 *)rx_desc;
422 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
ef456f85
JK		 423
424 if (i == rx_ring->next_to_use)
425 next_desc = " NTU";
426 else if (i == rx_ring->next_to_clean)
427 next_desc = " NTC";
428 else
429 next_desc = "";
430
5f450212
BA		 431 if (staterr & E1000_RXD_STAT_DD) {
432 /* Descriptor Done */
ef456f85
JK		 433 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
434 "RWB", i,
435 (unsigned long long)le64_to_cpu(u1->a),
436 (unsigned long long)le64_to_cpu(u1->b),
437 buffer_info->skb, next_desc);
5f450212 438 } else {
ef456f85
JK		 439 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
440 "R ", i,
441 (unsigned long long)le64_to_cpu(u1->a),
442 (unsigned long long)le64_to_cpu(u1->b),
443 (unsigned long long)buffer_info->dma,
444 buffer_info->skb, next_desc);
5f450212
BA		 445
446 if (netif_msg_pktdata(adapter))
447 print_hex_dump(KERN_INFO, "",
448 DUMP_PREFIX_ADDRESS, 16,
449 1,
450 phys_to_virt
451 (buffer_info->dma),
452 adapter->rx_buffer_len,
453 true);
454 }
84f4ee90
TI		 455 }
456 }
84f4ee90
TI		 457}
458
bc7f75fa
AK		 459/**
460 * e1000_desc_unused - calculate if we have unused descriptors
461 **/
462static int e1000_desc_unused(struct e1000_ring *ring)
463{
464 if (ring->next_to_clean > ring->next_to_use)
465 return ring->next_to_clean - ring->next_to_use - 1;
466
467 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
468}
469
470/**
ad68076e 471 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 472 * @adapter: board private structure
473 * @status: descriptor status field as written by hardware
474 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
475 * @skb: pointer to sk_buff to be indicated to stack
476 **/
477static void e1000_receive_skb(struct e1000_adapter *adapter,
af667a29 478 struct net_device *netdev, struct sk_buff *skb,
a39fe742 479 u8 status, __le16 vlan)
bc7f75fa 480{
86d70e53 481 u16 tag = le16_to_cpu(vlan);
bc7f75fa
AK		 482 skb->protocol = eth_type_trans(skb, netdev);
483
86d70e53
JK		 484 if (status & E1000_RXD_STAT_VP)
485 __vlan_hwaccel_put_tag(skb, tag);
486
487 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 488}
489
490/**
af667a29 491 * e1000_rx_checksum - Receive Checksum Offload
afd12939
BA		 492 * @adapter: board private structure
493 * @status_err: receive descriptor status and error fields
494 * @csum: receive descriptor csum field
495 * @sk_buff: socket buffer with received data
bc7f75fa
AK		 496 **/
497static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
afd12939 498 __le16 csum, struct sk_buff *skb)
bc7f75fa
AK		 499{
500 u16 status = (u16)status_err;
501 u8 errors = (u8)(status_err >> 24);
bc8acf2c
ED		 502
503 skb_checksum_none_assert(skb);
bc7f75fa 504
afd12939
BA		 505 /* Rx checksum disabled */
506 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
507 return;
508
bc7f75fa
AK		 509 /* Ignore Checksum bit is set */
510 if (status & E1000_RXD_STAT_IXSM)
511 return;
afd12939 512
bc7f75fa
AK		 513 /* TCP/UDP checksum error bit is set */
514 if (errors & E1000_RXD_ERR_TCPE) {
515 /* let the stack verify checksum errors */
516 adapter->hw_csum_err++;
517 return;
518 }
519
520 /* TCP/UDP Checksum has not been calculated */
521 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
522 return;
523
524 /* It must be a TCP or UDP packet with a valid checksum */
525 if (status & E1000_RXD_STAT_TCPCS) {
526 /* TCP checksum is good */
527 skb->ip_summed = CHECKSUM_UNNECESSARY;
528 } else {
ad68076e
BA		 529 /*
530 * IP fragment with UDP payload
531 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 532 * and then put the value in host order for further stack use.
533 */
afd12939 534 __sum16 sum = (__force __sum16)swab16((__force u16)csum);
a39fe742 535 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 536 skb->ip_summed = CHECKSUM_COMPLETE;
537 }
538 adapter->hw_csum_good++;
539}
540
55aa6985 541static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
c6e7f51e 542{
55aa6985 543 struct e1000_adapter *adapter = rx_ring->adapter;
c6e7f51e 544 struct e1000_hw *hw = &adapter->hw;
bdc125f7
BA		 545 s32 ret_val = __ew32_prepare(hw);
546
547 writel(i, rx_ring->tail);
c6e7f51e 548
bdc125f7 549 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
c6e7f51e
BA		 550 u32 rctl = er32(RCTL);
551 ew32(RCTL, rctl & ~E1000_RCTL_EN);
552 e_err("ME firmware caused invalid RDT - resetting\n");
553 schedule_work(&adapter->reset_task);
554 }
555}
556
55aa6985 557static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
c6e7f51e 558{
55aa6985 559 struct e1000_adapter *adapter = tx_ring->adapter;
c6e7f51e 560 struct e1000_hw *hw = &adapter->hw;
bdc125f7 561 s32 ret_val = __ew32_prepare(hw);
c6e7f51e 562
bdc125f7
BA		 563 writel(i, tx_ring->tail);
564
565 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
c6e7f51e
BA		 566 u32 tctl = er32(TCTL);
567 ew32(TCTL, tctl & ~E1000_TCTL_EN);
568 e_err("ME firmware caused invalid TDT - resetting\n");
569 schedule_work(&adapter->reset_task);
570 }
571}
572
bc7f75fa 573/**
5f450212 574 * e1000_alloc_rx_buffers - Replace used receive buffers
55aa6985 575 * @rx_ring: Rx descriptor ring
bc7f75fa 576 **/
55aa6985 577static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
c2fed996 578 int cleaned_count, gfp_t gfp)
bc7f75fa 579{
55aa6985 580 struct e1000_adapter *adapter = rx_ring->adapter;
bc7f75fa
AK		 581 struct net_device *netdev = adapter->netdev;
582 struct pci_dev *pdev = adapter->pdev;
5f450212 583 union e1000_rx_desc_extended *rx_desc;
bc7f75fa
AK		 584 struct e1000_buffer *buffer_info;
585 struct sk_buff *skb;
586 unsigned int i;
89d71a66 587 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 588
589 i = rx_ring->next_to_use;
590 buffer_info = &rx_ring->buffer_info[i];
591
592 while (cleaned_count--) {
593 skb = buffer_info->skb;
594 if (skb) {
595 skb_trim(skb, 0);
596 goto map_skb;
597 }
598
c2fed996 599 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
bc7f75fa
AK		 600 if (!skb) {
601 /* Better luck next round */
602 adapter->alloc_rx_buff_failed++;
603 break;
604 }
605
bc7f75fa
AK		 606 buffer_info->skb = skb;
607map_skb:
0be3f55f 608 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 609 adapter->rx_buffer_len,
0be3f55f
NN		 610 DMA_FROM_DEVICE);
611 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 612 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 613 adapter->rx_dma_failed++;
614 break;
615 }
616
5f450212
BA		 617 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
618 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
bc7f75fa 619
50849d79
TH		 620 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
621 /*
622 * Force memory writes to complete before letting h/w
623 * know there are new descriptors to fetch. (Only
624 * applicable for weak-ordered memory model archs,
625 * such as IA-64).
626 */
627 wmb();
c6e7f51e 628 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
55aa6985 629 e1000e_update_rdt_wa(rx_ring, i);
c6e7f51e 630 else
c5083cf6 631 writel(i, rx_ring->tail);
50849d79 632 }
bc7f75fa
AK		 633 i++;
634 if (i == rx_ring->count)
635 i = 0;
636 buffer_info = &rx_ring->buffer_info[i];
637 }
638
50849d79 639 rx_ring->next_to_use = i;
bc7f75fa
AK		 640}
641
642/**
643 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
55aa6985 644 * @rx_ring: Rx descriptor ring
bc7f75fa 645 **/
55aa6985 646static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
c2fed996 647 int cleaned_count, gfp_t gfp)
bc7f75fa 648{
55aa6985 649 struct e1000_adapter *adapter = rx_ring->adapter;
bc7f75fa
AK		 650 struct net_device *netdev = adapter->netdev;
651 struct pci_dev *pdev = adapter->pdev;
652 union e1000_rx_desc_packet_split *rx_desc;
bc7f75fa
AK		 653 struct e1000_buffer *buffer_info;
654 struct e1000_ps_page *ps_page;
655 struct sk_buff *skb;
656 unsigned int i, j;
657
658 i = rx_ring->next_to_use;
659 buffer_info = &rx_ring->buffer_info[i];
660
661 while (cleaned_count--) {
662 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
663
664 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 665 ps_page = &buffer_info->ps_pages[j];
666 if (j >= adapter->rx_ps_pages) {
667 /* all unused desc entries get hw null ptr */
af667a29
BA		 668 rx_desc->read.buffer_addr[j + 1] =
669 ~cpu_to_le64(0);
47f44e40
AK		 670 continue;
671 }
672 if (!ps_page->page) {
c2fed996 673 ps_page->page = alloc_page(gfp);
bc7f75fa 674 if (!ps_page->page) {
47f44e40
AK		 675 adapter->alloc_rx_buff_failed++;
676 goto no_buffers;
677 }
0be3f55f
NN		 678 ps_page->dma = dma_map_page(&pdev->dev,
679 ps_page->page,
680 0, PAGE_SIZE,
681 DMA_FROM_DEVICE);
682 if (dma_mapping_error(&pdev->dev,
683 ps_page->dma)) {
47f44e40 684 dev_err(&adapter->pdev->dev,
af667a29 685 "Rx DMA page map failed\n");
47f44e40
AK		 686 adapter->rx_dma_failed++;
687 goto no_buffers;
bc7f75fa 688 }
bc7f75fa 689 }
47f44e40
AK		 690 /*
691 * Refresh the desc even if buffer_addrs
692 * didn't change because each write-back
693 * erases this info.
694 */
af667a29
BA		 695 rx_desc->read.buffer_addr[j + 1] =
696 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 697 }
698
c2fed996
JK		 699 skb = __netdev_alloc_skb_ip_align(netdev,
700 adapter->rx_ps_bsize0,
701 gfp);
bc7f75fa
AK		 702
703 if (!skb) {
704 adapter->alloc_rx_buff_failed++;
705 break;
706 }
707
bc7f75fa 708 buffer_info->skb = skb;
0be3f55f 709 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 710 adapter->rx_ps_bsize0,
0be3f55f
NN		 711 DMA_FROM_DEVICE);
712 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
af667a29 713 dev_err(&pdev->dev, "Rx DMA map failed\n");
bc7f75fa
AK		 714 adapter->rx_dma_failed++;
715 /* cleanup skb */
716 dev_kfree_skb_any(skb);
717 buffer_info->skb = NULL;
718 break;
719 }
720
721 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
722
50849d79
TH		 723 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
724 /*
725 * Force memory writes to complete before letting h/w
726 * know there are new descriptors to fetch. (Only
727 * applicable for weak-ordered memory model archs,
728 * such as IA-64).
729 */
730 wmb();
c6e7f51e 731 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
55aa6985 732 e1000e_update_rdt_wa(rx_ring, i << 1);
c6e7f51e 733 else
c5083cf6 734 writel(i << 1, rx_ring->tail);
50849d79
TH		 735 }
736
bc7f75fa
AK		 737 i++;
738 if (i == rx_ring->count)
739 i = 0;
740 buffer_info = &rx_ring->buffer_info[i];
741 }
742
743no_buffers:
50849d79 744 rx_ring->next_to_use = i;
bc7f75fa
AK		 745}
746
97ac8cae
BA		 747/**
748 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
55aa6985 749 * @rx_ring: Rx descriptor ring
97ac8cae
BA		 750 * @cleaned_count: number of buffers to allocate this pass
751 **/
752
55aa6985 753static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
c2fed996 754 int cleaned_count, gfp_t gfp)
97ac8cae 755{
55aa6985 756 struct e1000_adapter *adapter = rx_ring->adapter;
97ac8cae
BA		 757 struct net_device *netdev = adapter->netdev;
758 struct pci_dev *pdev = adapter->pdev;
5f450212 759 union e1000_rx_desc_extended *rx_desc;
97ac8cae
BA		 760 struct e1000_buffer *buffer_info;
761 struct sk_buff *skb;
762 unsigned int i;
89d71a66 763 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 764
765 i = rx_ring->next_to_use;
766 buffer_info = &rx_ring->buffer_info[i];
767
768 while (cleaned_count--) {
769 skb = buffer_info->skb;
770 if (skb) {
771 skb_trim(skb, 0);
772 goto check_page;
773 }
774
c2fed996 775 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
97ac8cae
BA		 776 if (unlikely(!skb)) {
777 /* Better luck next round */
778 adapter->alloc_rx_buff_failed++;
779 break;
780 }
781
97ac8cae
BA		 782 buffer_info->skb = skb;
783check_page:
784 /* allocate a new page if necessary */
785 if (!buffer_info->page) {
c2fed996 786 buffer_info->page = alloc_page(gfp);
97ac8cae
BA		 787 if (unlikely(!buffer_info->page)) {
788 adapter->alloc_rx_buff_failed++;
789 break;
790 }
791 }
792
793 if (!buffer_info->dma)
0be3f55f 794 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA		 795 buffer_info->page, 0,
796 PAGE_SIZE,
0be3f55f 797 DMA_FROM_DEVICE);
97ac8cae 798
5f450212
BA		 799 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
800 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
97ac8cae
BA		 801
802 if (unlikely(++i == rx_ring->count))
803 i = 0;
804 buffer_info = &rx_ring->buffer_info[i];
805 }
806
807 if (likely(rx_ring->next_to_use != i)) {
808 rx_ring->next_to_use = i;
809 if (unlikely(i-- == 0))
810 i = (rx_ring->count - 1);
811
812 /* Force memory writes to complete before letting h/w
813 * know there are new descriptors to fetch. (Only
814 * applicable for weak-ordered memory model archs,
815 * such as IA-64). */
816 wmb();
c6e7f51e 817 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
55aa6985 818 e1000e_update_rdt_wa(rx_ring, i);
c6e7f51e 819 else
c5083cf6 820 writel(i, rx_ring->tail);
97ac8cae
BA		 821 }
822}
823
70495a50
BA		 824static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
825 struct sk_buff *skb)
826{
827 if (netdev->features & NETIF_F_RXHASH)
828 skb->rxhash = le32_to_cpu(rss);
829}
830
bc7f75fa 831/**
55aa6985
BA		 832 * e1000_clean_rx_irq - Send received data up the network stack
833 * @rx_ring: Rx descriptor ring
bc7f75fa
AK		 834 *
835 * the return value indicates whether actual cleaning was done, there
836 * is no guarantee that everything was cleaned
837 **/
55aa6985
BA		 838static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
839 int work_to_do)
bc7f75fa 840{
55aa6985 841 struct e1000_adapter *adapter = rx_ring->adapter;
bc7f75fa
AK		 842 struct net_device *netdev = adapter->netdev;
843 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 844 struct e1000_hw *hw = &adapter->hw;
5f450212 845 union e1000_rx_desc_extended *rx_desc, *next_rxd;
bc7f75fa 846 struct e1000_buffer *buffer_info, *next_buffer;
5f450212 847 u32 length, staterr;
bc7f75fa
AK		 848 unsigned int i;
849 int cleaned_count = 0;
3db1cd5c 850 bool cleaned = false;
bc7f75fa
AK		 851 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
852
853 i = rx_ring->next_to_clean;
5f450212
BA		 854 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
855 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
bc7f75fa
AK		 856 buffer_info = &rx_ring->buffer_info[i];
857
5f450212 858 while (staterr & E1000_RXD_STAT_DD) {
bc7f75fa 859 struct sk_buff *skb;
bc7f75fa
AK		 860
861 if (*work_done >= work_to_do)
862 break;
863 (*work_done)++;
2d0bb1c1 864 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa 865
bc7f75fa
AK		 866 skb = buffer_info->skb;
867 buffer_info->skb = NULL;
868
869 prefetch(skb->data - NET_IP_ALIGN);
870
871 i++;
872 if (i == rx_ring->count)
873 i = 0;
5f450212 874 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
bc7f75fa
AK		 875 prefetch(next_rxd);
876
877 next_buffer = &rx_ring->buffer_info[i];
878
3db1cd5c 879 cleaned = true;
bc7f75fa 880 cleaned_count++;
0be3f55f 881 dma_unmap_single(&pdev->dev,
bc7f75fa
AK		 882 buffer_info->dma,
883 adapter->rx_buffer_len,
0be3f55f 884 DMA_FROM_DEVICE);
bc7f75fa
AK		 885 buffer_info->dma = 0;
886
5f450212 887 length = le16_to_cpu(rx_desc->wb.upper.length);
bc7f75fa 888
b94b5028
JB		 889 /*
890 * !EOP means multiple descriptors were used to store a single
891 * packet, if that's the case we need to toss it. In fact, we
892 * need to toss every packet with the EOP bit clear and the
893 * next frame that _does_ have the EOP bit set, as it is by
894 * definition only a frame fragment
895 */
5f450212 896 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
b94b5028
JB		 897 adapter->flags2 |= FLAG2_IS_DISCARDING;
898
899 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 900 /* All receives must fit into a single buffer */
3bb99fe2 901 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 902 /* recycle */
903 buffer_info->skb = skb;
5f450212 904 if (staterr & E1000_RXD_STAT_EOP)
b94b5028 905 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 906 goto next_desc;
907 }
908
cf955e6c
BG		 909 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
910 !(netdev->features & NETIF_F_RXALL))) {
bc7f75fa
AK		 911 /* recycle */
912 buffer_info->skb = skb;
913 goto next_desc;
914 }
915
eb7c3adb 916 /* adjust length to remove Ethernet CRC */
0184039a
BG		 917 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
918 /* If configured to store CRC, don't subtract FCS,
919 * but keep the FCS bytes out of the total_rx_bytes
920 * counter
921 */
922 if (netdev->features & NETIF_F_RXFCS)
923 total_rx_bytes -= 4;
924 else
925 length -= 4;
926 }
eb7c3adb 927
bc7f75fa
AK		 928 total_rx_bytes += length;
929 total_rx_packets++;
930
ad68076e
BA		 931 /*
932 * code added for copybreak, this should improve
bc7f75fa 933 * performance for small packets with large amounts
ad68076e
BA		 934 * of reassembly being done in the stack
935 */
bc7f75fa
AK		 936 if (length < copybreak) {
937 struct sk_buff *new_skb =
89d71a66 938 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 939 if (new_skb) {
808ff676
BA		 940 skb_copy_to_linear_data_offset(new_skb,
941 -NET_IP_ALIGN,
942 (skb->data -
943 NET_IP_ALIGN),
944 (length +
945 NET_IP_ALIGN));
bc7f75fa
AK		 946 /* save the skb in buffer_info as good */
947 buffer_info->skb = skb;
948 skb = new_skb;
949 }
950 /* else just continue with the old one */
951 }
952 /* end copybreak code */
953 skb_put(skb, length);
954
955 /* Receive Checksum Offload */
5f450212 956 e1000_rx_checksum(adapter, staterr,
afd12939 957 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
bc7f75fa 958
70495a50
BA		 959 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
960
5f450212
BA		 961 e1000_receive_skb(adapter, netdev, skb, staterr,
962 rx_desc->wb.upper.vlan);
bc7f75fa
AK		 963
964next_desc:
5f450212 965 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
bc7f75fa
AK		 966
967 /* return some buffers to hardware, one at a time is too slow */
968 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
55aa6985 969 adapter->alloc_rx_buf(rx_ring, cleaned_count,
c2fed996 970 GFP_ATOMIC);
bc7f75fa
AK		 971 cleaned_count = 0;
972 }
973
974 /* use prefetched values */
975 rx_desc = next_rxd;
976 buffer_info = next_buffer;
5f450212
BA		 977
978 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
bc7f75fa
AK		 979 }
980 rx_ring->next_to_clean = i;
981
982 cleaned_count = e1000_desc_unused(rx_ring);
983 if (cleaned_count)
55aa6985 984 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
bc7f75fa 985
bc7f75fa 986 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 987 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 988 return cleaned;
989}
990
55aa6985
BA		 991static void e1000_put_txbuf(struct e1000_ring *tx_ring,
992 struct e1000_buffer *buffer_info)
bc7f75fa 993{
55aa6985
BA		 994 struct e1000_adapter *adapter = tx_ring->adapter;
995
03b1320d
AD		 996 if (buffer_info->dma) {
997 if (buffer_info->mapped_as_page)
0be3f55f
NN		 998 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
999 buffer_info->length, DMA_TO_DEVICE);
03b1320d 1000 else
0be3f55f
NN		 1001 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1002 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD		 1003 buffer_info->dma = 0;
1004 }
bc7f75fa
AK		 1005 if (buffer_info->skb) {
1006 dev_kfree_skb_any(buffer_info->skb);
1007 buffer_info->skb = NULL;
1008 }
1b7719c4 1009 buffer_info->time_stamp = 0;
bc7f75fa
AK		 1010}
1011
41cec6f1 1012static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 1013{
41cec6f1
BA		 1014 struct e1000_adapter *adapter = container_of(work,
1015 struct e1000_adapter,
1016 print_hang_task);
09357b00 1017 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1018 struct e1000_ring *tx_ring = adapter->tx_ring;
1019 unsigned int i = tx_ring->next_to_clean;
1020 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1021 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 1022 struct e1000_hw *hw = &adapter->hw;
1023 u16 phy_status, phy_1000t_status, phy_ext_status;
1024 u16 pci_status;
1025
615b32af
JB		 1026 if (test_bit(__E1000_DOWN, &adapter->state))
1027 return;
1028
09357b00
JK		 1029 if (!adapter->tx_hang_recheck &&
1030 (adapter->flags2 & FLAG2_DMA_BURST)) {
397c020a
MV		 1031 /*
1032 * May be block on write-back, flush and detect again
09357b00
JK		 1033 * flush pending descriptor writebacks to memory
1034 */
1035 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1036 /* execute the writes immediately */
1037 e1e_flush();
bf03085f
MV		 1038 /*
1039 * Due to rare timing issues, write to TIDV again to ensure
1040 * the write is successful
1041 */
1042 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1043 /* execute the writes immediately */
1044 e1e_flush();
09357b00
JK		 1045 adapter->tx_hang_recheck = true;
1046 return;
1047 }
1048 /* Real hang detected */
1049 adapter->tx_hang_recheck = false;
1050 netif_stop_queue(netdev);
1051
41cec6f1
BA		 1052 e1e_rphy(hw, PHY_STATUS, &phy_status);
1053 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
1054 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 1055
41cec6f1
BA		 1056 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1057
1058 /* detected Hardware unit hang */
1059 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 1060 " TDH <%x>\n"
1061 " TDT <%x>\n"
1062 " next_to_use <%x>\n"
1063 " next_to_clean <%x>\n"
1064 "buffer_info[next_to_clean]:\n"
1065 " time_stamp <%lx>\n"
1066 " next_to_watch <%x>\n"
1067 " jiffies <%lx>\n"
41cec6f1
BA		 1068 " next_to_watch.status <%x>\n"
1069 "MAC Status <%x>\n"
1070 "PHY Status <%x>\n"
1071 "PHY 1000BASE-T Status <%x>\n"
1072 "PHY Extended Status <%x>\n"
1073 "PCI Status <%x>\n",
c5083cf6
BA		 1074 readl(tx_ring->head),
1075 readl(tx_ring->tail),
44defeb3
JK		 1076 tx_ring->next_to_use,
1077 tx_ring->next_to_clean,
1078 tx_ring->buffer_info[eop].time_stamp,
1079 eop,
1080 jiffies,
41cec6f1
BA		 1081 eop_desc->upper.fields.status,
1082 er32(STATUS),
1083 phy_status,
1084 phy_1000t_status,
1085 phy_ext_status,
1086 pci_status);
7c0427ee
BA		 1087
1088 /* Suggest workaround for known h/w issue */
1089 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1090 e_err("Try turning off Tx pause (flow control) via ethtool\n");
bc7f75fa
AK		 1091}
1092
1093/**
1094 * e1000_clean_tx_irq - Reclaim resources after transmit completes
55aa6985 1095 * @tx_ring: Tx descriptor ring
bc7f75fa
AK		 1096 *
1097 * the return value indicates whether actual cleaning was done, there
1098 * is no guarantee that everything was cleaned
1099 **/
55aa6985 1100static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
bc7f75fa 1101{
55aa6985 1102 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa
AK		 1103 struct net_device *netdev = adapter->netdev;
1104 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1105 struct e1000_tx_desc *tx_desc, *eop_desc;
1106 struct e1000_buffer *buffer_info;
1107 unsigned int i, eop;
1108 unsigned int count = 0;
bc7f75fa 1109 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
3f0cfa3b 1110 unsigned int bytes_compl = 0, pkts_compl = 0;
bc7f75fa
AK		 1111
1112 i = tx_ring->next_to_clean;
1113 eop = tx_ring->buffer_info[i].next_to_watch;
1114 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1115
12d04a3c
AD		 1116 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1117 (count < tx_ring->count)) {
a86043c2 1118 bool cleaned = false;
2d0bb1c1 1119 rmb(); /* read buffer_info after eop_desc */
a86043c2 1120 for (; !cleaned; count++) {
bc7f75fa
AK		 1121 tx_desc = E1000_TX_DESC(*tx_ring, i);
1122 buffer_info = &tx_ring->buffer_info[i];
1123 cleaned = (i == eop);
1124
1125 if (cleaned) {
9ed318d5
TH		 1126 total_tx_packets += buffer_info->segs;
1127 total_tx_bytes += buffer_info->bytecount;
3f0cfa3b
TH		 1128 if (buffer_info->skb) {
1129 bytes_compl += buffer_info->skb->len;
1130 pkts_compl++;
1131 }
bc7f75fa
AK		 1132 }
1133
55aa6985 1134 e1000_put_txbuf(tx_ring, buffer_info);
bc7f75fa
AK		 1135 tx_desc->upper.data = 0;
1136
1137 i++;
1138 if (i == tx_ring->count)
1139 i = 0;
1140 }
1141
dac87619
TL		 1142 if (i == tx_ring->next_to_use)
1143 break;
bc7f75fa
AK		 1144 eop = tx_ring->buffer_info[i].next_to_watch;
1145 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 1146 }
1147
1148 tx_ring->next_to_clean = i;
1149
3f0cfa3b
TH		 1150 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1151
bc7f75fa 1152#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 1153 if (count && netif_carrier_ok(netdev) &&
1154 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 1155 /* Make sure that anybody stopping the queue after this
1156 * sees the new next_to_clean.
1157 */
1158 smp_mb();
1159
1160 if (netif_queue_stopped(netdev) &&
1161 !(test_bit(__E1000_DOWN, &adapter->state))) {
1162 netif_wake_queue(netdev);
1163 ++adapter->restart_queue;
1164 }
1165 }
1166
1167 if (adapter->detect_tx_hung) {
41cec6f1
BA		 1168 /*
1169 * Detect a transmit hang in hardware, this serializes the
1170 * check with the clearing of time_stamp and movement of i
1171 */
3db1cd5c 1172 adapter->detect_tx_hung = false;
12d04a3c
AD		 1173 if (tx_ring->buffer_info[i].time_stamp &&
1174 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202 1175 + (adapter->tx_timeout_factor * HZ)) &&
09357b00 1176 !(er32(STATUS) & E1000_STATUS_TXOFF))
41cec6f1 1177 schedule_work(&adapter->print_hang_task);
09357b00
JK		 1178 else
1179 adapter->tx_hang_recheck = false;
bc7f75fa
AK		 1180 }
1181 adapter->total_tx_bytes += total_tx_bytes;
1182 adapter->total_tx_packets += total_tx_packets;
807540ba 1183 return count < tx_ring->count;
bc7f75fa
AK		 1184}
1185
bc7f75fa
AK		 1186/**
1187 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
55aa6985 1188 * @rx_ring: Rx descriptor ring
bc7f75fa
AK		 1189 *
1190 * the return value indicates whether actual cleaning was done, there
1191 * is no guarantee that everything was cleaned
1192 **/
55aa6985
BA		 1193static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1194 int work_to_do)
bc7f75fa 1195{
55aa6985 1196 struct e1000_adapter *adapter = rx_ring->adapter;
3bb99fe2 1197 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 1198 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1199 struct net_device *netdev = adapter->netdev;
1200 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1201 struct e1000_buffer *buffer_info, *next_buffer;
1202 struct e1000_ps_page *ps_page;
1203 struct sk_buff *skb;
1204 unsigned int i, j;
1205 u32 length, staterr;
1206 int cleaned_count = 0;
3db1cd5c 1207 bool cleaned = false;
bc7f75fa
AK		 1208 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1209
1210 i = rx_ring->next_to_clean;
1211 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1212 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1213 buffer_info = &rx_ring->buffer_info[i];
1214
1215 while (staterr & E1000_RXD_STAT_DD) {
1216 if (*work_done >= work_to_do)
1217 break;
1218 (*work_done)++;
1219 skb = buffer_info->skb;
2d0bb1c1 1220 rmb(); /* read descriptor and rx_buffer_info after status DD */
bc7f75fa
AK		 1221
1222 /* in the packet split case this is header only */
1223 prefetch(skb->data - NET_IP_ALIGN);
1224
1225 i++;
1226 if (i == rx_ring->count)
1227 i = 0;
1228 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1229 prefetch(next_rxd);
1230
1231 next_buffer = &rx_ring->buffer_info[i];
1232
3db1cd5c 1233 cleaned = true;
bc7f75fa 1234 cleaned_count++;
0be3f55f 1235 dma_unmap_single(&pdev->dev, buffer_info->dma,
af667a29 1236 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
bc7f75fa
AK		 1237 buffer_info->dma = 0;
1238
af667a29 1239 /* see !EOP comment in other Rx routine */
b94b5028
JB		 1240 if (!(staterr & E1000_RXD_STAT_EOP))
1241 adapter->flags2 |= FLAG2_IS_DISCARDING;
1242
1243 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
ef456f85 1244 e_dbg("Packet Split buffers didn't pick up the full packet\n");
bc7f75fa 1245 dev_kfree_skb_irq(skb);
b94b5028
JB		 1246 if (staterr & E1000_RXD_STAT_EOP)
1247 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1248 goto next_desc;
1249 }
1250
cf955e6c
BG		 1251 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1252 !(netdev->features & NETIF_F_RXALL))) {
bc7f75fa
AK		 1253 dev_kfree_skb_irq(skb);
1254 goto next_desc;
1255 }
1256
1257 length = le16_to_cpu(rx_desc->wb.middle.length0);
1258
1259 if (!length) {
ef456f85 1260 e_dbg("Last part of the packet spanning multiple descriptors\n");
bc7f75fa
AK		 1261 dev_kfree_skb_irq(skb);
1262 goto next_desc;
1263 }
1264
1265 /* Good Receive */
1266 skb_put(skb, length);
1267
1268 {
0e15df49
BA		 1269 /*
1270 * this looks ugly, but it seems compiler issues make
1271 * it more efficient than reusing j
1272 */
1273 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
bc7f75fa 1274
ad68076e 1275 /*
0e15df49
BA		 1276 * page alloc/put takes too long and effects small
1277 * packet throughput, so unsplit small packets and
1278 * save the alloc/put only valid in softirq (napi)
1279 * context to call kmap_*
ad68076e 1280 */
0e15df49
BA		 1281 if (l1 && (l1 <= copybreak) &&
1282 ((length + l1) <= adapter->rx_ps_bsize0)) {
1283 u8 *vaddr;
1284
1285 ps_page = &buffer_info->ps_pages[0];
1286
1287 /*
1288 * there is no documentation about how to call
1289 * kmap_atomic, so we can't hold the mapping
1290 * very long
1291 */
1292 dma_sync_single_for_cpu(&pdev->dev,
1293 ps_page->dma,
1294 PAGE_SIZE,
1295 DMA_FROM_DEVICE);
9f393834 1296 vaddr = kmap_atomic(ps_page->page);
0e15df49 1297 memcpy(skb_tail_pointer(skb), vaddr, l1);
9f393834 1298 kunmap_atomic(vaddr);
0e15df49
BA		 1299 dma_sync_single_for_device(&pdev->dev,
1300 ps_page->dma,
1301 PAGE_SIZE,
1302 DMA_FROM_DEVICE);
1303
1304 /* remove the CRC */
0184039a
BG		 1305 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1306 if (!(netdev->features & NETIF_F_RXFCS))
1307 l1 -= 4;
1308 }
0e15df49
BA		 1309
1310 skb_put(skb, l1);
1311 goto copydone;
1312 } /* if */
bc7f75fa
AK		 1313 }
1314
1315 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1316 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1317 if (!length)
1318 break;
1319
47f44e40 1320 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN		 1321 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1322 DMA_FROM_DEVICE);
bc7f75fa
AK		 1323 ps_page->dma = 0;
1324 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1325 ps_page->page = NULL;
1326 skb->len += length;
1327 skb->data_len += length;
98a045d7 1328 skb->truesize += PAGE_SIZE;
bc7f75fa
AK		 1329 }
1330
eb7c3adb
JK		 1331 /* strip the ethernet crc, problem is we're using pages now so
1332 * this whole operation can get a little cpu intensive
1333 */
0184039a
BG		 1334 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1335 if (!(netdev->features & NETIF_F_RXFCS))
1336 pskb_trim(skb, skb->len - 4);
1337 }
eb7c3adb 1338
bc7f75fa
AK		 1339copydone:
1340 total_rx_bytes += skb->len;
1341 total_rx_packets++;
1342
afd12939
BA		 1343 e1000_rx_checksum(adapter, staterr,
1344 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
bc7f75fa 1345
70495a50
BA		 1346 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1347
bc7f75fa
AK		 1348 if (rx_desc->wb.upper.header_status &
1349 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1350 adapter->rx_hdr_split++;
1351
1352 e1000_receive_skb(adapter, netdev, skb,
1353 staterr, rx_desc->wb.middle.vlan);
1354
1355next_desc:
1356 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1357 buffer_info->skb = NULL;
1358
1359 /* return some buffers to hardware, one at a time is too slow */
1360 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
55aa6985 1361 adapter->alloc_rx_buf(rx_ring, cleaned_count,
c2fed996 1362 GFP_ATOMIC);
bc7f75fa
AK		 1363 cleaned_count = 0;
1364 }
1365
1366 /* use prefetched values */
1367 rx_desc = next_rxd;
1368 buffer_info = next_buffer;
1369
1370 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1371 }
1372 rx_ring->next_to_clean = i;
1373
1374 cleaned_count = e1000_desc_unused(rx_ring);
1375 if (cleaned_count)
55aa6985 1376 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
bc7f75fa 1377
bc7f75fa 1378 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1379 adapter->total_rx_packets += total_rx_packets;
bc7f75fa
AK		 1380 return cleaned;
1381}
1382
97ac8cae
BA		 1383/**
1384 * e1000_consume_page - helper function
1385 **/
1386static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1387 u16 length)
1388{
1389 bi->page = NULL;
1390 skb->len += length;
1391 skb->data_len += length;
98a045d7 1392 skb->truesize += PAGE_SIZE;
97ac8cae
BA		 1393}
1394
1395/**
1396 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1397 * @adapter: board private structure
1398 *
1399 * the return value indicates whether actual cleaning was done, there
1400 * is no guarantee that everything was cleaned
1401 **/
55aa6985
BA		 1402static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1403 int work_to_do)
97ac8cae 1404{
55aa6985 1405 struct e1000_adapter *adapter = rx_ring->adapter;
97ac8cae
BA		 1406 struct net_device *netdev = adapter->netdev;
1407 struct pci_dev *pdev = adapter->pdev;
5f450212 1408 union e1000_rx_desc_extended *rx_desc, *next_rxd;
97ac8cae 1409 struct e1000_buffer *buffer_info, *next_buffer;
5f450212 1410 u32 length, staterr;
97ac8cae
BA		 1411 unsigned int i;
1412 int cleaned_count = 0;
1413 bool cleaned = false;
1414 unsigned int total_rx_bytes=0, total_rx_packets=0;
1415
1416 i = rx_ring->next_to_clean;
5f450212
BA		 1417 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1418 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
97ac8cae
BA		 1419 buffer_info = &rx_ring->buffer_info[i];
1420
5f450212 1421 while (staterr & E1000_RXD_STAT_DD) {
97ac8cae 1422 struct sk_buff *skb;
97ac8cae
BA		 1423
1424 if (*work_done >= work_to_do)
1425 break;
1426 (*work_done)++;
2d0bb1c1 1427 rmb(); /* read descriptor and rx_buffer_info after status DD */
97ac8cae 1428
97ac8cae
BA		 1429 skb = buffer_info->skb;
1430 buffer_info->skb = NULL;
1431
1432 ++i;
1433 if (i == rx_ring->count)
1434 i = 0;
5f450212 1435 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
97ac8cae
BA		 1436 prefetch(next_rxd);
1437
1438 next_buffer = &rx_ring->buffer_info[i];
1439
1440 cleaned = true;
1441 cleaned_count++;
0be3f55f
NN		 1442 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1443 DMA_FROM_DEVICE);
97ac8cae
BA		 1444 buffer_info->dma = 0;
1445
5f450212 1446 length = le16_to_cpu(rx_desc->wb.upper.length);
97ac8cae
BA		 1447
1448 /* errors is only valid for DD + EOP descriptors */
5f450212 1449 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
cf955e6c
BG		 1450 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1451 !(netdev->features & NETIF_F_RXALL)))) {
5f450212
BA		 1452 /* recycle both page and skb */
1453 buffer_info->skb = skb;
1454 /* an error means any chain goes out the window too */
1455 if (rx_ring->rx_skb_top)
1456 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1457 rx_ring->rx_skb_top = NULL;
1458 goto next_desc;
97ac8cae
BA		 1459 }
1460
f0f1a172 1461#define rxtop (rx_ring->rx_skb_top)
5f450212 1462 if (!(staterr & E1000_RXD_STAT_EOP)) {
97ac8cae
BA		 1463 /* this descriptor is only the beginning (or middle) */
1464 if (!rxtop) {
1465 /* this is the beginning of a chain */
1466 rxtop = skb;
1467 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1468 0, length);
1469 } else {
1470 /* this is the middle of a chain */
1471 skb_fill_page_desc(rxtop,
1472 skb_shinfo(rxtop)->nr_frags,
1473 buffer_info->page, 0, length);
1474 /* re-use the skb, only consumed the page */
1475 buffer_info->skb = skb;
1476 }
1477 e1000_consume_page(buffer_info, rxtop, length);
1478 goto next_desc;
1479 } else {
1480 if (rxtop) {
1481 /* end of the chain */
1482 skb_fill_page_desc(rxtop,
1483 skb_shinfo(rxtop)->nr_frags,
1484 buffer_info->page, 0, length);
1485 /* re-use the current skb, we only consumed the
1486 * page */
1487 buffer_info->skb = skb;
1488 skb = rxtop;
1489 rxtop = NULL;
1490 e1000_consume_page(buffer_info, skb, length);
1491 } else {
1492 /* no chain, got EOP, this buf is the packet
1493 * copybreak to save the put_page/alloc_page */
1494 if (length <= copybreak &&
1495 skb_tailroom(skb) >= length) {
1496 u8 *vaddr;
4679026d 1497 vaddr = kmap_atomic(buffer_info->page);
97ac8cae
BA		 1498 memcpy(skb_tail_pointer(skb), vaddr,
1499 length);
4679026d 1500 kunmap_atomic(vaddr);
97ac8cae
BA		 1501 /* re-use the page, so don't erase
1502 * buffer_info->page */
1503 skb_put(skb, length);
1504 } else {
1505 skb_fill_page_desc(skb, 0,
1506 buffer_info->page, 0,
1507 length);
1508 e1000_consume_page(buffer_info, skb,
1509 length);
1510 }
1511 }
1512 }
1513
1514 /* Receive Checksum Offload XXX recompute due to CRC strip? */
5f450212 1515 e1000_rx_checksum(adapter, staterr,
afd12939 1516 rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
97ac8cae 1517
70495a50
BA		 1518 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1519
97ac8cae
BA		 1520 /* probably a little skewed due to removing CRC */
1521 total_rx_bytes += skb->len;
1522 total_rx_packets++;
1523
1524 /* eth type trans needs skb->data to point to something */
1525 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1526 e_err("pskb_may_pull failed.\n");
ef5ab89c 1527 dev_kfree_skb_irq(skb);
97ac8cae
BA		 1528 goto next_desc;
1529 }
1530
5f450212
BA		 1531 e1000_receive_skb(adapter, netdev, skb, staterr,
1532 rx_desc->wb.upper.vlan);
97ac8cae
BA		 1533
1534next_desc:
5f450212 1535 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
97ac8cae
BA		 1536
1537 /* return some buffers to hardware, one at a time is too slow */
1538 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
55aa6985 1539 adapter->alloc_rx_buf(rx_ring, cleaned_count,
c2fed996 1540 GFP_ATOMIC);
97ac8cae
BA		 1541 cleaned_count = 0;
1542 }
1543
1544 /* use prefetched values */
1545 rx_desc = next_rxd;
1546 buffer_info = next_buffer;
5f450212
BA		 1547
1548 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
97ac8cae
BA		 1549 }
1550 rx_ring->next_to_clean = i;
1551
1552 cleaned_count = e1000_desc_unused(rx_ring);
1553 if (cleaned_count)
55aa6985 1554 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
97ac8cae
BA		 1555
1556 adapter->total_rx_bytes += total_rx_bytes;
1557 adapter->total_rx_packets += total_rx_packets;
97ac8cae
BA		 1558 return cleaned;
1559}
1560
bc7f75fa
AK		 1561/**
1562 * e1000_clean_rx_ring - Free Rx Buffers per Queue
55aa6985 1563 * @rx_ring: Rx descriptor ring
bc7f75fa 1564 **/
55aa6985 1565static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
bc7f75fa 1566{
55aa6985 1567 struct e1000_adapter *adapter = rx_ring->adapter;
bc7f75fa
AK		 1568 struct e1000_buffer *buffer_info;
1569 struct e1000_ps_page *ps_page;
1570 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1571 unsigned int i, j;
1572
1573 /* Free all the Rx ring sk_buffs */
1574 for (i = 0; i < rx_ring->count; i++) {
1575 buffer_info = &rx_ring->buffer_info[i];
1576 if (buffer_info->dma) {
1577 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1578 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1579 adapter->rx_buffer_len,
0be3f55f 1580 DMA_FROM_DEVICE);
97ac8cae 1581 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1582 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1583 PAGE_SIZE,
0be3f55f 1584 DMA_FROM_DEVICE);
bc7f75fa 1585 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1586 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1587 adapter->rx_ps_bsize0,
0be3f55f 1588 DMA_FROM_DEVICE);
bc7f75fa
AK		 1589 buffer_info->dma = 0;
1590 }
1591
97ac8cae
BA		 1592 if (buffer_info->page) {
1593 put_page(buffer_info->page);
1594 buffer_info->page = NULL;
1595 }
1596
bc7f75fa
AK		 1597 if (buffer_info->skb) {
1598 dev_kfree_skb(buffer_info->skb);
1599 buffer_info->skb = NULL;
1600 }
1601
1602 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1603 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1604 if (!ps_page->page)
1605 break;
0be3f55f
NN		 1606 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1607 DMA_FROM_DEVICE);
bc7f75fa
AK		 1608 ps_page->dma = 0;
1609 put_page(ps_page->page);
1610 ps_page->page = NULL;
1611 }
1612 }
1613
1614 /* there also may be some cached data from a chained receive */
1615 if (rx_ring->rx_skb_top) {
1616 dev_kfree_skb(rx_ring->rx_skb_top);
1617 rx_ring->rx_skb_top = NULL;
1618 }
1619
bc7f75fa
AK		 1620 /* Zero out the descriptor ring */
1621 memset(rx_ring->desc, 0, rx_ring->size);
1622
1623 rx_ring->next_to_clean = 0;
1624 rx_ring->next_to_use = 0;
b94b5028 1625 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa 1626
c5083cf6 1627 writel(0, rx_ring->head);
bdc125f7
BA		 1628 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1629 e1000e_update_rdt_wa(rx_ring, 0);
1630 else
1631 writel(0, rx_ring->tail);
bc7f75fa
AK		 1632}
1633
a8f88ff5
JB		 1634static void e1000e_downshift_workaround(struct work_struct *work)
1635{
1636 struct e1000_adapter *adapter = container_of(work,
1637 struct e1000_adapter, downshift_task);
1638
615b32af
JB		 1639 if (test_bit(__E1000_DOWN, &adapter->state))
1640 return;
1641
a8f88ff5
JB		 1642 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1643}
1644
bc7f75fa
AK		 1645/**
1646 * e1000_intr_msi - Interrupt Handler
1647 * @irq: interrupt number
1648 * @data: pointer to a network interface device structure
1649 **/
1650static irqreturn_t e1000_intr_msi(int irq, void *data)
1651{
1652 struct net_device *netdev = data;
1653 struct e1000_adapter *adapter = netdev_priv(netdev);
1654 struct e1000_hw *hw = &adapter->hw;
1655 u32 icr = er32(ICR);
1656
ad68076e
BA		 1657 /*
1658 * read ICR disables interrupts using IAM
1659 */
bc7f75fa 1660
573cca8c 1661 if (icr & E1000_ICR_LSC) {
f92518dd 1662 hw->mac.get_link_status = true;
ad68076e
BA		 1663 /*
1664 * ICH8 workaround-- Call gig speed drop workaround on cable
1665 * disconnect (LSC) before accessing any PHY registers
1666 */
bc7f75fa
AK		 1667 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1668 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1669 schedule_work(&adapter->downshift_task);
bc7f75fa 1670
ad68076e
BA		 1671 /*
1672 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1673 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1674 * adapter in watchdog
1675 */
bc7f75fa
AK		 1676 if (netif_carrier_ok(netdev) &&
1677 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1678 /* disable receives */
1679 u32 rctl = er32(RCTL);
1680 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1681 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1682 }
1683 /* guard against interrupt when we're going down */
1684 if (!test_bit(__E1000_DOWN, &adapter->state))
1685 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1686 }
1687
288379f0 1688 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1689 adapter->total_tx_bytes = 0;
1690 adapter->total_tx_packets = 0;
1691 adapter->total_rx_bytes = 0;
1692 adapter->total_rx_packets = 0;
288379f0 1693 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1694 }
1695
1696 return IRQ_HANDLED;
1697}
1698
1699/**
1700 * e1000_intr - Interrupt Handler
1701 * @irq: interrupt number
1702 * @data: pointer to a network interface device structure
1703 **/
1704static irqreturn_t e1000_intr(int irq, void *data)
1705{
1706 struct net_device *netdev = data;
1707 struct e1000_adapter *adapter = netdev_priv(netdev);
1708 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1709 u32 rctl, icr = er32(ICR);
4662e82b 1710
a68ea775 1711 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1712 return IRQ_NONE; /* Not our interrupt */
1713
ad68076e
BA		 1714 /*
1715 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1716 * not set, then the adapter didn't send an interrupt
1717 */
bc7f75fa
AK		 1718 if (!(icr & E1000_ICR_INT_ASSERTED))
1719 return IRQ_NONE;
1720
ad68076e
BA		 1721 /*
1722 * Interrupt Auto-Mask...upon reading ICR,
1723 * interrupts are masked. No need for the
1724 * IMC write
1725 */
bc7f75fa 1726
573cca8c 1727 if (icr & E1000_ICR_LSC) {
f92518dd 1728 hw->mac.get_link_status = true;
ad68076e
BA		 1729 /*
1730 * ICH8 workaround-- Call gig speed drop workaround on cable
1731 * disconnect (LSC) before accessing any PHY registers
1732 */
bc7f75fa
AK		 1733 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1734 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1735 schedule_work(&adapter->downshift_task);
bc7f75fa 1736
ad68076e
BA		 1737 /*
1738 * 80003ES2LAN workaround--
bc7f75fa
AK		 1739 * For packet buffer work-around on link down event;
1740 * disable receives here in the ISR and
1741 * reset adapter in watchdog
1742 */
1743 if (netif_carrier_ok(netdev) &&
1744 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1745 /* disable receives */
1746 rctl = er32(RCTL);
1747 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1748 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1749 }
1750 /* guard against interrupt when we're going down */
1751 if (!test_bit(__E1000_DOWN, &adapter->state))
1752 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1753 }
1754
288379f0 1755 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1756 adapter->total_tx_bytes = 0;
1757 adapter->total_tx_packets = 0;
1758 adapter->total_rx_bytes = 0;
1759 adapter->total_rx_packets = 0;
288379f0 1760 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1761 }
1762
1763 return IRQ_HANDLED;
1764}
1765
4662e82b
BA		 1766static irqreturn_t e1000_msix_other(int irq, void *data)
1767{
1768 struct net_device *netdev = data;
1769 struct e1000_adapter *adapter = netdev_priv(netdev);
1770 struct e1000_hw *hw = &adapter->hw;
1771 u32 icr = er32(ICR);
1772
1773 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1774 if (!test_bit(__E1000_DOWN, &adapter->state))
1775 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1776 return IRQ_NONE;
1777 }
1778
1779 if (icr & adapter->eiac_mask)
1780 ew32(ICS, (icr & adapter->eiac_mask));
1781
1782 if (icr & E1000_ICR_OTHER) {
1783 if (!(icr & E1000_ICR_LSC))
1784 goto no_link_interrupt;
f92518dd 1785 hw->mac.get_link_status = true;
4662e82b
BA		 1786 /* guard against interrupt when we're going down */
1787 if (!test_bit(__E1000_DOWN, &adapter->state))
1788 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1789 }
1790
1791no_link_interrupt:
a3c69fef
JB		 1792 if (!test_bit(__E1000_DOWN, &adapter->state))
1793 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1794
1795 return IRQ_HANDLED;
1796}
1797
1798
1799static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1800{
1801 struct net_device *netdev = data;
1802 struct e1000_adapter *adapter = netdev_priv(netdev);
1803 struct e1000_hw *hw = &adapter->hw;
1804 struct e1000_ring *tx_ring = adapter->tx_ring;
1805
1806
1807 adapter->total_tx_bytes = 0;
1808 adapter->total_tx_packets = 0;
1809
55aa6985 1810 if (!e1000_clean_tx_irq(tx_ring))
4662e82b
BA		 1811 /* Ring was not completely cleaned, so fire another interrupt */
1812 ew32(ICS, tx_ring->ims_val);
1813
1814 return IRQ_HANDLED;
1815}
1816
1817static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1818{
1819 struct net_device *netdev = data;
1820 struct e1000_adapter *adapter = netdev_priv(netdev);
55aa6985 1821 struct e1000_ring *rx_ring = adapter->rx_ring;
4662e82b
BA		 1822
1823 /* Write the ITR value calculated at the end of the
1824 * previous interrupt.
1825 */
55aa6985
BA		 1826 if (rx_ring->set_itr) {
1827 writel(1000000000 / (rx_ring->itr_val * 256),
1828 rx_ring->itr_register);
1829 rx_ring->set_itr = 0;
4662e82b
BA		 1830 }
1831
288379f0 1832 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1833 adapter->total_rx_bytes = 0;
1834 adapter->total_rx_packets = 0;
288379f0 1835 __napi_schedule(&adapter->napi);
4662e82b
BA		 1836 }
1837 return IRQ_HANDLED;
1838}
1839
1840/**
1841 * e1000_configure_msix - Configure MSI-X hardware
1842 *
1843 * e1000_configure_msix sets up the hardware to properly
1844 * generate MSI-X interrupts.
1845 **/
1846static void e1000_configure_msix(struct e1000_adapter *adapter)
1847{
1848 struct e1000_hw *hw = &adapter->hw;
1849 struct e1000_ring *rx_ring = adapter->rx_ring;
1850 struct e1000_ring *tx_ring = adapter->tx_ring;
1851 int vector = 0;
1852 u32 ctrl_ext, ivar = 0;
1853
1854 adapter->eiac_mask = 0;
1855
1856 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1857 if (hw->mac.type == e1000_82574) {
1858 u32 rfctl = er32(RFCTL);
1859 rfctl |= E1000_RFCTL_ACK_DIS;
1860 ew32(RFCTL, rfctl);
1861 }
1862
1863#define E1000_IVAR_INT_ALLOC_VALID 0x8
1864 /* Configure Rx vector */
1865 rx_ring->ims_val = E1000_IMS_RXQ0;
1866 adapter->eiac_mask |= rx_ring->ims_val;
1867 if (rx_ring->itr_val)
1868 writel(1000000000 / (rx_ring->itr_val * 256),
c5083cf6 1869 rx_ring->itr_register);
4662e82b 1870 else
c5083cf6 1871 writel(1, rx_ring->itr_register);
4662e82b
BA		 1872 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1873
1874 /* Configure Tx vector */
1875 tx_ring->ims_val = E1000_IMS_TXQ0;
1876 vector++;
1877 if (tx_ring->itr_val)
1878 writel(1000000000 / (tx_ring->itr_val * 256),
c5083cf6 1879 tx_ring->itr_register);
4662e82b 1880 else
c5083cf6 1881 writel(1, tx_ring->itr_register);
4662e82b
BA		 1882 adapter->eiac_mask |= tx_ring->ims_val;
1883 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1884
1885 /* set vector for Other Causes, e.g. link changes */
1886 vector++;
1887 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1888 if (rx_ring->itr_val)
1889 writel(1000000000 / (rx_ring->itr_val * 256),
1890 hw->hw_addr + E1000_EITR_82574(vector));
1891 else
1892 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1893
1894 /* Cause Tx interrupts on every write back */
1895 ivar |= (1 << 31);
1896
1897 ew32(IVAR, ivar);
1898
1899 /* enable MSI-X PBA support */
1900 ctrl_ext = er32(CTRL_EXT);
1901 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1902
1903 /* Auto-Mask Other interrupts upon ICR read */
1904#define E1000_EIAC_MASK_82574 0x01F00000
1905 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1906 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1907 ew32(CTRL_EXT, ctrl_ext);
1908 e1e_flush();
1909}
1910
1911void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1912{
1913 if (adapter->msix_entries) {
1914 pci_disable_msix(adapter->pdev);
1915 kfree(adapter->msix_entries);
1916 adapter->msix_entries = NULL;
1917 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1918 pci_disable_msi(adapter->pdev);
1919 adapter->flags &= ~FLAG_MSI_ENABLED;
1920 }
4662e82b
BA		 1921}
1922
1923/**
1924 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1925 *
1926 * Attempt to configure interrupts using the best available
1927 * capabilities of the hardware and kernel.
1928 **/
1929void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1930{
1931 int err;
8e86acd7 1932 int i;
4662e82b
BA		 1933
1934 switch (adapter->int_mode) {
1935 case E1000E_INT_MODE_MSIX:
1936 if (adapter->flags & FLAG_HAS_MSIX) {
8e86acd7
JK		 1937 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1938 adapter->msix_entries = kcalloc(adapter->num_vectors,
4662e82b
BA		 1939 sizeof(struct msix_entry),
1940 GFP_KERNEL);
1941 if (adapter->msix_entries) {
8e86acd7 1942 for (i = 0; i < adapter->num_vectors; i++)
4662e82b
BA		 1943 adapter->msix_entries[i].entry = i;
1944
1945 err = pci_enable_msix(adapter->pdev,
1946 adapter->msix_entries,
8e86acd7 1947 adapter->num_vectors);
b1cdfead 1948 if (err == 0)
4662e82b
BA		 1949 return;
1950 }
1951 /* MSI-X failed, so fall through and try MSI */
ef456f85 1952 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
4662e82b
BA		 1953 e1000e_reset_interrupt_capability(adapter);
1954 }
1955 adapter->int_mode = E1000E_INT_MODE_MSI;
1956 /* Fall through */
1957 case E1000E_INT_MODE_MSI:
1958 if (!pci_enable_msi(adapter->pdev)) {
1959 adapter->flags |= FLAG_MSI_ENABLED;
1960 } else {
1961 adapter->int_mode = E1000E_INT_MODE_LEGACY;
ef456f85 1962 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
4662e82b
BA		 1963 }
1964 /* Fall through */
1965 case E1000E_INT_MODE_LEGACY:
1966 /* Don't do anything; this is the system default */
1967 break;
1968 }
8e86acd7
JK		 1969
1970 /* store the number of vectors being used */
1971 adapter->num_vectors = 1;
4662e82b
BA		 1972}
1973
1974/**
1975 * e1000_request_msix - Initialize MSI-X interrupts
1976 *
1977 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1978 * kernel.
1979 **/
1980static int e1000_request_msix(struct e1000_adapter *adapter)
1981{
1982 struct net_device *netdev = adapter->netdev;
1983 int err = 0, vector = 0;
1984
1985 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 1986 snprintf(adapter->rx_ring->name,
1987 sizeof(adapter->rx_ring->name) - 1,
1988 "%s-rx-0", netdev->name);
4662e82b
BA		 1989 else
1990 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1991 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1992 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1993 netdev);
1994 if (err)
5015e53a 1995 return err;
c5083cf6
BA		 1996 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
1997 E1000_EITR_82574(vector);
4662e82b
BA		 1998 adapter->rx_ring->itr_val = adapter->itr;
1999 vector++;
2000
2001 if (strlen(netdev->name) < (IFNAMSIZ - 5))
79f5e840
BA		 2002 snprintf(adapter->tx_ring->name,
2003 sizeof(adapter->tx_ring->name) - 1,
2004 "%s-tx-0", netdev->name);
4662e82b
BA		 2005 else
2006 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2007 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 2008 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 2009 netdev);
2010 if (err)
5015e53a 2011 return err;
c5083cf6
BA		 2012 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2013 E1000_EITR_82574(vector);
4662e82b
BA		 2014 adapter->tx_ring->itr_val = adapter->itr;
2015 vector++;
2016
2017 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 2018 e1000_msix_other, 0, netdev->name, netdev);
4662e82b 2019 if (err)
5015e53a 2020 return err;
4662e82b
BA		 2021
2022 e1000_configure_msix(adapter);
5015e53a 2023
4662e82b 2024 return 0;
4662e82b
BA		 2025}
2026
f8d59f78
BA		 2027/**
2028 * e1000_request_irq - initialize interrupts
2029 *
2030 * Attempts to configure interrupts using the best available
2031 * capabilities of the hardware and kernel.
2032 **/
bc7f75fa
AK		 2033static int e1000_request_irq(struct e1000_adapter *adapter)
2034{
2035 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 2036 int err;
2037
4662e82b
BA		 2038 if (adapter->msix_entries) {
2039 err = e1000_request_msix(adapter);
2040 if (!err)
2041 return err;
2042 /* fall back to MSI */
2043 e1000e_reset_interrupt_capability(adapter);
2044 adapter->int_mode = E1000E_INT_MODE_MSI;
2045 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2046 }
4662e82b 2047 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 2048 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 2049 netdev->name, netdev);
2050 if (!err)
2051 return err;
bc7f75fa 2052
4662e82b
BA		 2053 /* fall back to legacy interrupt */
2054 e1000e_reset_interrupt_capability(adapter);
2055 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 2056 }
2057
a0607fd3 2058 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 2059 netdev->name, netdev);
2060 if (err)
2061 e_err("Unable to allocate interrupt, Error: %d\n", err);
2062
bc7f75fa
AK		 2063 return err;
2064}
2065
2066static void e1000_free_irq(struct e1000_adapter *adapter)
2067{
2068 struct net_device *netdev = adapter->netdev;
2069
4662e82b
BA		 2070 if (adapter->msix_entries) {
2071 int vector = 0;
2072
2073 free_irq(adapter->msix_entries[vector].vector, netdev);
2074 vector++;
2075
2076 free_irq(adapter->msix_entries[vector].vector, netdev);
2077 vector++;
2078
2079 /* Other Causes interrupt vector */
2080 free_irq(adapter->msix_entries[vector].vector, netdev);
2081 return;
bc7f75fa 2082 }
4662e82b
BA		 2083
2084 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 2085}
2086
2087/**
2088 * e1000_irq_disable - Mask off interrupt generation on the NIC
2089 **/
2090static void e1000_irq_disable(struct e1000_adapter *adapter)
2091{
2092 struct e1000_hw *hw = &adapter->hw;
2093
bc7f75fa 2094 ew32(IMC, ~0);
4662e82b
BA		 2095 if (adapter->msix_entries)
2096 ew32(EIAC_82574, 0);
bc7f75fa 2097 e1e_flush();
8e86acd7
JK		 2098
2099 if (adapter->msix_entries) {
2100 int i;
2101 for (i = 0; i < adapter->num_vectors; i++)
2102 synchronize_irq(adapter->msix_entries[i].vector);
2103 } else {
2104 synchronize_irq(adapter->pdev->irq);
2105 }
bc7f75fa
AK		 2106}
2107
2108/**
2109 * e1000_irq_enable - Enable default interrupt generation settings
2110 **/
2111static void e1000_irq_enable(struct e1000_adapter *adapter)
2112{
2113 struct e1000_hw *hw = &adapter->hw;
2114
4662e82b
BA		 2115 if (adapter->msix_entries) {
2116 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2117 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2118 } else {
2119 ew32(IMS, IMS_ENABLE_MASK);
2120 }
74ef9c39 2121 e1e_flush();
bc7f75fa
AK		 2122}
2123
2124/**
31dbe5b4 2125 * e1000e_get_hw_control - get control of the h/w from f/w
bc7f75fa
AK		 2126 * @adapter: address of board private structure
2127 *
31dbe5b4 2128 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2129 * For ASF and Pass Through versions of f/w this means that
2130 * the driver is loaded. For AMT version (only with 82573)
2131 * of the f/w this means that the network i/f is open.
2132 **/
31dbe5b4 2133void e1000e_get_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2134{
2135 struct e1000_hw *hw = &adapter->hw;
2136 u32 ctrl_ext;
2137 u32 swsm;
2138
2139 /* Let firmware know the driver has taken over */
2140 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2141 swsm = er32(SWSM);
2142 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2143 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2144 ctrl_ext = er32(CTRL_EXT);
ad68076e 2145 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2146 }
2147}
2148
2149/**
31dbe5b4 2150 * e1000e_release_hw_control - release control of the h/w to f/w
bc7f75fa
AK		 2151 * @adapter: address of board private structure
2152 *
31dbe5b4 2153 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 2154 * For ASF and Pass Through versions of f/w this means that the
2155 * driver is no longer loaded. For AMT version (only with 82573) i
2156 * of the f/w this means that the network i/f is closed.
2157 *
2158 **/
31dbe5b4 2159void e1000e_release_hw_control(struct e1000_adapter *adapter)
bc7f75fa
AK		 2160{
2161 struct e1000_hw *hw = &adapter->hw;
2162 u32 ctrl_ext;
2163 u32 swsm;
2164
2165 /* Let firmware taken over control of h/w */
2166 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2167 swsm = er32(SWSM);
2168 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2169 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2170 ctrl_ext = er32(CTRL_EXT);
ad68076e 2171 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 2172 }
2173}
2174
bc7f75fa
AK		 2175/**
2176 * @e1000_alloc_ring - allocate memory for a ring structure
2177 **/
2178static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2179 struct e1000_ring *ring)
2180{
2181 struct pci_dev *pdev = adapter->pdev;
2182
2183 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2184 GFP_KERNEL);
2185 if (!ring->desc)
2186 return -ENOMEM;
2187
2188 return 0;
2189}
2190
2191/**
2192 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
55aa6985 2193 * @tx_ring: Tx descriptor ring
bc7f75fa
AK		 2194 *
2195 * Return 0 on success, negative on failure
2196 **/
55aa6985 2197int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
bc7f75fa 2198{
55aa6985 2199 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa
AK		 2200 int err = -ENOMEM, size;
2201
2202 size = sizeof(struct e1000_buffer) * tx_ring->count;
89bf67f1 2203 tx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2204 if (!tx_ring->buffer_info)
2205 goto err;
bc7f75fa
AK		 2206
2207 /* round up to nearest 4K */
2208 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2209 tx_ring->size = ALIGN(tx_ring->size, 4096);
2210
2211 err = e1000_alloc_ring_dma(adapter, tx_ring);
2212 if (err)
2213 goto err;
2214
2215 tx_ring->next_to_use = 0;
2216 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 2217
2218 return 0;
2219err:
2220 vfree(tx_ring->buffer_info);
44defeb3 2221 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 2222 return err;
2223}
2224
2225/**
2226 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
55aa6985 2227 * @rx_ring: Rx descriptor ring
bc7f75fa
AK		 2228 *
2229 * Returns 0 on success, negative on failure
2230 **/
55aa6985 2231int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
bc7f75fa 2232{
55aa6985 2233 struct e1000_adapter *adapter = rx_ring->adapter;
47f44e40
AK		 2234 struct e1000_buffer *buffer_info;
2235 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 2236
2237 size = sizeof(struct e1000_buffer) * rx_ring->count;
89bf67f1 2238 rx_ring->buffer_info = vzalloc(size);
bc7f75fa
AK		 2239 if (!rx_ring->buffer_info)
2240 goto err;
bc7f75fa 2241
47f44e40
AK		 2242 for (i = 0; i < rx_ring->count; i++) {
2243 buffer_info = &rx_ring->buffer_info[i];
2244 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2245 sizeof(struct e1000_ps_page),
2246 GFP_KERNEL);
2247 if (!buffer_info->ps_pages)
2248 goto err_pages;
2249 }
bc7f75fa
AK		 2250
2251 desc_len = sizeof(union e1000_rx_desc_packet_split);
2252
2253 /* Round up to nearest 4K */
2254 rx_ring->size = rx_ring->count * desc_len;
2255 rx_ring->size = ALIGN(rx_ring->size, 4096);
2256
2257 err = e1000_alloc_ring_dma(adapter, rx_ring);
2258 if (err)
47f44e40 2259 goto err_pages;
bc7f75fa
AK		 2260
2261 rx_ring->next_to_clean = 0;
2262 rx_ring->next_to_use = 0;
2263 rx_ring->rx_skb_top = NULL;
2264
2265 return 0;
47f44e40
AK		 2266
2267err_pages:
2268 for (i = 0; i < rx_ring->count; i++) {
2269 buffer_info = &rx_ring->buffer_info[i];
2270 kfree(buffer_info->ps_pages);
2271 }
bc7f75fa
AK		 2272err:
2273 vfree(rx_ring->buffer_info);
e9262447 2274 e_err("Unable to allocate memory for the receive descriptor ring\n");
bc7f75fa
AK		 2275 return err;
2276}
2277
2278/**
2279 * e1000_clean_tx_ring - Free Tx Buffers
55aa6985 2280 * @tx_ring: Tx descriptor ring
bc7f75fa 2281 **/
55aa6985 2282static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
bc7f75fa 2283{
55aa6985 2284 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa
AK		 2285 struct e1000_buffer *buffer_info;
2286 unsigned long size;
2287 unsigned int i;
2288
2289 for (i = 0; i < tx_ring->count; i++) {
2290 buffer_info = &tx_ring->buffer_info[i];
55aa6985 2291 e1000_put_txbuf(tx_ring, buffer_info);
bc7f75fa
AK		 2292 }
2293
3f0cfa3b 2294 netdev_reset_queue(adapter->netdev);
bc7f75fa
AK		 2295 size = sizeof(struct e1000_buffer) * tx_ring->count;
2296 memset(tx_ring->buffer_info, 0, size);
2297
2298 memset(tx_ring->desc, 0, tx_ring->size);
2299
2300 tx_ring->next_to_use = 0;
2301 tx_ring->next_to_clean = 0;
2302
c5083cf6 2303 writel(0, tx_ring->head);
bdc125f7
BA		 2304 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2305 e1000e_update_tdt_wa(tx_ring, 0);
2306 else
2307 writel(0, tx_ring->tail);
bc7f75fa
AK		 2308}
2309
2310/**
2311 * e1000e_free_tx_resources - Free Tx Resources per Queue
55aa6985 2312 * @tx_ring: Tx descriptor ring
bc7f75fa
AK		 2313 *
2314 * Free all transmit software resources
2315 **/
55aa6985 2316void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
bc7f75fa 2317{
55aa6985 2318 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa 2319 struct pci_dev *pdev = adapter->pdev;
bc7f75fa 2320
55aa6985 2321 e1000_clean_tx_ring(tx_ring);
bc7f75fa
AK		 2322
2323 vfree(tx_ring->buffer_info);
2324 tx_ring->buffer_info = NULL;
2325
2326 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2327 tx_ring->dma);
2328 tx_ring->desc = NULL;
2329}
2330
2331/**
2332 * e1000e_free_rx_resources - Free Rx Resources
55aa6985 2333 * @rx_ring: Rx descriptor ring
bc7f75fa
AK		 2334 *
2335 * Free all receive software resources
2336 **/
55aa6985 2337void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
bc7f75fa 2338{
55aa6985 2339 struct e1000_adapter *adapter = rx_ring->adapter;
bc7f75fa 2340 struct pci_dev *pdev = adapter->pdev;
47f44e40 2341 int i;
bc7f75fa 2342
55aa6985 2343 e1000_clean_rx_ring(rx_ring);
bc7f75fa 2344
b1cdfead 2345 for (i = 0; i < rx_ring->count; i++)
47f44e40 2346 kfree(rx_ring->buffer_info[i].ps_pages);
47f44e40 2347
bc7f75fa
AK		 2348 vfree(rx_ring->buffer_info);
2349 rx_ring->buffer_info = NULL;
2350
bc7f75fa
AK		 2351 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2352 rx_ring->dma);
2353 rx_ring->desc = NULL;
2354}
2355
2356/**
2357 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 2358 * @adapter: pointer to adapter
2359 * @itr_setting: current adapter->itr
2360 * @packets: the number of packets during this measurement interval
2361 * @bytes: the number of bytes during this measurement interval
2362 *
bc7f75fa
AK		 2363 * Stores a new ITR value based on packets and byte
2364 * counts during the last interrupt. The advantage of per interrupt
2365 * computation is faster updates and more accurate ITR for the current
2366 * traffic pattern. Constants in this function were computed
2367 * based on theoretical maximum wire speed and thresholds were set based
2368 * on testing data as well as attempting to minimize response time
4662e82b
BA		 2369 * while increasing bulk throughput. This functionality is controlled
2370 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 2371 **/
2372static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2373 u16 itr_setting, int packets,
2374 int bytes)
2375{
2376 unsigned int retval = itr_setting;
2377
2378 if (packets == 0)
5015e53a 2379 return itr_setting;
bc7f75fa
AK		 2380
2381 switch (itr_setting) {
2382 case lowest_latency:
2383 /* handle TSO and jumbo frames */
2384 if (bytes/packets > 8000)
2385 retval = bulk_latency;
b1cdfead 2386 else if ((packets < 5) && (bytes > 512))
bc7f75fa 2387 retval = low_latency;
bc7f75fa
AK		 2388 break;
2389 case low_latency: /* 50 usec aka 20000 ints/s */
2390 if (bytes > 10000) {
2391 /* this if handles the TSO accounting */
b1cdfead 2392 if (bytes/packets > 8000)
bc7f75fa 2393 retval = bulk_latency;
b1cdfead 2394 else if ((packets < 10) || ((bytes/packets) > 1200))
bc7f75fa 2395 retval = bulk_latency;
b1cdfead 2396 else if ((packets > 35))
bc7f75fa 2397 retval = lowest_latency;
bc7f75fa
AK		 2398 } else if (bytes/packets > 2000) {
2399 retval = bulk_latency;
2400 } else if (packets <= 2 && bytes < 512) {
2401 retval = lowest_latency;
2402 }
2403 break;
2404 case bulk_latency: /* 250 usec aka 4000 ints/s */
2405 if (bytes > 25000) {
b1cdfead 2406 if (packets > 35)
bc7f75fa 2407 retval = low_latency;
bc7f75fa
AK		 2408 } else if (bytes < 6000) {
2409 retval = low_latency;
2410 }
2411 break;
2412 }
2413
bc7f75fa
AK		 2414 return retval;
2415}
2416
2417static void e1000_set_itr(struct e1000_adapter *adapter)
2418{
2419 struct e1000_hw *hw = &adapter->hw;
2420 u16 current_itr;
2421 u32 new_itr = adapter->itr;
2422
2423 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2424 if (adapter->link_speed != SPEED_1000) {
2425 current_itr = 0;
2426 new_itr = 4000;
2427 goto set_itr_now;
2428 }
2429
828bac87
BA		 2430 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2431 new_itr = 0;
2432 goto set_itr_now;
2433 }
2434
bc7f75fa
AK		 2435 adapter->tx_itr = e1000_update_itr(adapter,
2436 adapter->tx_itr,
2437 adapter->total_tx_packets,
2438 adapter->total_tx_bytes);
2439 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2440 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2441 adapter->tx_itr = low_latency;
2442
2443 adapter->rx_itr = e1000_update_itr(adapter,
2444 adapter->rx_itr,
2445 adapter->total_rx_packets,
2446 adapter->total_rx_bytes);
2447 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2448 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2449 adapter->rx_itr = low_latency;
2450
2451 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2452
2453 switch (current_itr) {
2454 /* counts and packets in update_itr are dependent on these numbers */
2455 case lowest_latency:
2456 new_itr = 70000;
2457 break;
2458 case low_latency:
2459 new_itr = 20000; /* aka hwitr = ~200 */
2460 break;
2461 case bulk_latency:
2462 new_itr = 4000;
2463 break;
2464 default:
2465 break;
2466 }
2467
2468set_itr_now:
2469 if (new_itr != adapter->itr) {
ad68076e
BA		 2470 /*
2471 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2472 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 2473 * increasing
2474 */
bc7f75fa
AK		 2475 new_itr = new_itr > adapter->itr ?
2476 min(adapter->itr + (new_itr >> 2), new_itr) :
2477 new_itr;
2478 adapter->itr = new_itr;
4662e82b
BA		 2479 adapter->rx_ring->itr_val = new_itr;
2480 if (adapter->msix_entries)
2481 adapter->rx_ring->set_itr = 1;
2482 else
828bac87
BA		 2483 if (new_itr)
2484 ew32(ITR, 1000000000 / (new_itr * 256));
2485 else
2486 ew32(ITR, 0);
bc7f75fa
AK		 2487 }
2488}
2489
4662e82b
BA		 2490/**
2491 * e1000_alloc_queues - Allocate memory for all rings
2492 * @adapter: board private structure to initialize
2493 **/
2494static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2495{
55aa6985
BA		 2496 int size = sizeof(struct e1000_ring);
2497
2498 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
4662e82b
BA		 2499 if (!adapter->tx_ring)
2500 goto err;
55aa6985
BA		 2501 adapter->tx_ring->count = adapter->tx_ring_count;
2502 adapter->tx_ring->adapter = adapter;
4662e82b 2503
55aa6985 2504 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
4662e82b
BA		 2505 if (!adapter->rx_ring)
2506 goto err;
55aa6985
BA		 2507 adapter->rx_ring->count = adapter->rx_ring_count;
2508 adapter->rx_ring->adapter = adapter;
4662e82b
BA		 2509
2510 return 0;
2511err:
2512 e_err("Unable to allocate memory for queues\n");
2513 kfree(adapter->rx_ring);
2514 kfree(adapter->tx_ring);
2515 return -ENOMEM;
2516}
2517
bc7f75fa 2518/**
c58c8a78 2519 * e1000e_poll - NAPI Rx polling callback
ad68076e 2520 * @napi: struct associated with this polling callback
c58c8a78 2521 * @weight: number of packets driver is allowed to process this poll
bc7f75fa 2522 **/
c58c8a78 2523static int e1000e_poll(struct napi_struct *napi, int weight)
bc7f75fa 2524{
c58c8a78
BA		 2525 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2526 napi);
4662e82b 2527 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2528 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2529 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2530
4cf1653a 2531 adapter = netdev_priv(poll_dev);
bc7f75fa 2532
c58c8a78
BA		 2533 if (!adapter->msix_entries ||
2534 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2535 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
4662e82b 2536
c58c8a78 2537 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
d2c7ddd6 2538
12d04a3c 2539 if (!tx_cleaned)
c58c8a78 2540 work_done = weight;
bc7f75fa 2541
c58c8a78
BA		 2542 /* If weight not fully consumed, exit the polling mode */
2543 if (work_done < weight) {
bc7f75fa
AK		 2544 if (adapter->itr_setting & 3)
2545 e1000_set_itr(adapter);
288379f0 2546 napi_complete(napi);
a3c69fef
JB		 2547 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2548 if (adapter->msix_entries)
2549 ew32(IMS, adapter->rx_ring->ims_val);
2550 else
2551 e1000_irq_enable(adapter);
2552 }
bc7f75fa
AK		 2553 }
2554
2555 return work_done;
2556}
2557
8e586137 2558static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
bc7f75fa
AK		 2559{
2560 struct e1000_adapter *adapter = netdev_priv(netdev);
2561 struct e1000_hw *hw = &adapter->hw;
2562 u32 vfta, index;
2563
2564 /* don't update vlan cookie if already programmed */
2565 if ((adapter->hw.mng_cookie.status &
2566 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2567 (vid == adapter->mng_vlan_id))
8e586137 2568 return 0;
caaddaf8 2569
bc7f75fa 2570 /* add VID to filter table */
caaddaf8
BA		 2571 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2572 index = (vid >> 5) & 0x7F;
2573 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2574 vfta |= (1 << (vid & 0x1F));
2575 hw->mac.ops.write_vfta(hw, index, vfta);
2576 }
86d70e53
JK		 2577
2578 set_bit(vid, adapter->active_vlans);
8e586137
JP		 2579
2580 return 0;
bc7f75fa
AK		 2581}
2582
8e586137 2583static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
bc7f75fa
AK		 2584{
2585 struct e1000_adapter *adapter = netdev_priv(netdev);
2586 struct e1000_hw *hw = &adapter->hw;
2587 u32 vfta, index;
2588
bc7f75fa
AK		 2589 if ((adapter->hw.mng_cookie.status &
2590 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2591 (vid == adapter->mng_vlan_id)) {
2592 /* release control to f/w */
31dbe5b4 2593 e1000e_release_hw_control(adapter);
8e586137 2594 return 0;
bc7f75fa
AK		 2595 }
2596
2597 /* remove VID from filter table */
caaddaf8
BA		 2598 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2599 index = (vid >> 5) & 0x7F;
2600 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2601 vfta &= ~(1 << (vid & 0x1F));
2602 hw->mac.ops.write_vfta(hw, index, vfta);
2603 }
86d70e53
JK		 2604
2605 clear_bit(vid, adapter->active_vlans);
8e586137
JP		 2606
2607 return 0;
bc7f75fa
AK		 2608}
2609
86d70e53
JK		 2610/**
2611 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2612 * @adapter: board private structure to initialize
2613 **/
2614static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
bc7f75fa
AK		 2615{
2616 struct net_device *netdev = adapter->netdev;
86d70e53
JK		 2617 struct e1000_hw *hw = &adapter->hw;
2618 u32 rctl;
bc7f75fa 2619
86d70e53
JK		 2620 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2621 /* disable VLAN receive filtering */
2622 rctl = er32(RCTL);
2623 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2624 ew32(RCTL, rctl);
2625
2626 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2627 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2628 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
bc7f75fa 2629 }
bc7f75fa
AK		 2630 }
2631}
2632
86d70e53
JK		 2633/**
2634 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2635 * @adapter: board private structure to initialize
2636 **/
2637static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2638{
2639 struct e1000_hw *hw = &adapter->hw;
2640 u32 rctl;
2641
2642 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2643 /* enable VLAN receive filtering */
2644 rctl = er32(RCTL);
2645 rctl |= E1000_RCTL_VFE;
2646 rctl &= ~E1000_RCTL_CFIEN;
2647 ew32(RCTL, rctl);
2648 }
2649}
bc7f75fa 2650
86d70e53
JK		 2651/**
2652 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2653 * @adapter: board private structure to initialize
2654 **/
2655static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
bc7f75fa 2656{
bc7f75fa 2657 struct e1000_hw *hw = &adapter->hw;
86d70e53 2658 u32 ctrl;
bc7f75fa 2659
86d70e53
JK		 2660 /* disable VLAN tag insert/strip */
2661 ctrl = er32(CTRL);
2662 ctrl &= ~E1000_CTRL_VME;
2663 ew32(CTRL, ctrl);
2664}
bc7f75fa 2665
86d70e53
JK		 2666/**
2667 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2668 * @adapter: board private structure to initialize
2669 **/
2670static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2671{
2672 struct e1000_hw *hw = &adapter->hw;
2673 u32 ctrl;
bc7f75fa 2674
86d70e53
JK		 2675 /* enable VLAN tag insert/strip */
2676 ctrl = er32(CTRL);
2677 ctrl |= E1000_CTRL_VME;
2678 ew32(CTRL, ctrl);
2679}
bc7f75fa 2680
86d70e53
JK		 2681static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2682{
2683 struct net_device *netdev = adapter->netdev;
2684 u16 vid = adapter->hw.mng_cookie.vlan_id;
2685 u16 old_vid = adapter->mng_vlan_id;
2686
2687 if (adapter->hw.mng_cookie.status &
2688 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2689 e1000_vlan_rx_add_vid(netdev, vid);
2690 adapter->mng_vlan_id = vid;
bc7f75fa
AK		 2691 }
2692
86d70e53
JK		 2693 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2694 e1000_vlan_rx_kill_vid(netdev, old_vid);
bc7f75fa
AK		 2695}
2696
2697static void e1000_restore_vlan(struct e1000_adapter *adapter)
2698{
2699 u16 vid;
2700
86d70e53 2701 e1000_vlan_rx_add_vid(adapter->netdev, 0);
bc7f75fa 2702
86d70e53 2703 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
bc7f75fa 2704 e1000_vlan_rx_add_vid(adapter->netdev, vid);
bc7f75fa
AK		 2705}
2706
cd791618 2707static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
bc7f75fa
AK		 2708{
2709 struct e1000_hw *hw = &adapter->hw;
cd791618 2710 u32 manc, manc2h, mdef, i, j;
bc7f75fa
AK		 2711
2712 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2713 return;
2714
2715 manc = er32(MANC);
2716
ad68076e
BA		 2717 /*
2718 * enable receiving management packets to the host. this will probably
bc7f75fa 2719 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2720 * the packets will be handled on SMBUS
2721 */
bc7f75fa
AK		 2722 manc |= E1000_MANC_EN_MNG2HOST;
2723 manc2h = er32(MANC2H);
cd791618
BA		 2724
2725 switch (hw->mac.type) {
2726 default:
2727 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2728 break;
2729 case e1000_82574:
2730 case e1000_82583:
2731 /*
2732 * Check if IPMI pass-through decision filter already exists;
2733 * if so, enable it.
2734 */
2735 for (i = 0, j = 0; i < 8; i++) {
2736 mdef = er32(MDEF(i));
2737
2738 /* Ignore filters with anything other than IPMI ports */
3b21b508 2739 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
cd791618
BA		 2740 continue;
2741
2742 /* Enable this decision filter in MANC2H */
2743 if (mdef)
2744 manc2h |= (1 << i);
2745
2746 j |= mdef;
2747 }
2748
2749 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2750 break;
2751
2752 /* Create new decision filter in an empty filter */
2753 for (i = 0, j = 0; i < 8; i++)
2754 if (er32(MDEF(i)) == 0) {
2755 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2756 E1000_MDEF_PORT_664));
2757 manc2h |= (1 << 1);
2758 j++;
2759 break;
2760 }
2761
2762 if (!j)
2763 e_warn("Unable to create IPMI pass-through filter\n");
2764 break;
2765 }
2766
bc7f75fa
AK		 2767 ew32(MANC2H, manc2h);
2768 ew32(MANC, manc);
2769}
2770
2771/**
af667a29 2772 * e1000_configure_tx - Configure Transmit Unit after Reset
bc7f75fa
AK		 2773 * @adapter: board private structure
2774 *
2775 * Configure the Tx unit of the MAC after a reset.
2776 **/
2777static void e1000_configure_tx(struct e1000_adapter *adapter)
2778{
2779 struct e1000_hw *hw = &adapter->hw;
2780 struct e1000_ring *tx_ring = adapter->tx_ring;
2781 u64 tdba;
c550b121 2782 u32 tdlen, tarc;
bc7f75fa
AK		 2783
2784 /* Setup the HW Tx Head and Tail descriptor pointers */
2785 tdba = tx_ring->dma;
2786 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
1e36052e
BA		 2787 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2788 ew32(TDBAH(0), (tdba >> 32));
2789 ew32(TDLEN(0), tdlen);
2790 ew32(TDH(0), 0);
2791 ew32(TDT(0), 0);
2792 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2793 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
bc7f75fa 2794
bc7f75fa
AK		 2795 /* Set the Tx Interrupt Delay register */
2796 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2797 /* Tx irq moderation */
bc7f75fa
AK		 2798 ew32(TADV, adapter->tx_abs_int_delay);
2799
3a3b7586
JB		 2800 if (adapter->flags2 & FLAG2_DMA_BURST) {
2801 u32 txdctl = er32(TXDCTL(0));
2802 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2803 E1000_TXDCTL_WTHRESH);
2804 /*
2805 * set up some performance related parameters to encourage the
2806 * hardware to use the bus more efficiently in bursts, depends
2807 * on the tx_int_delay to be enabled,
2808 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2809 * hthresh = 1 ==> prefetch when one or more available
2810 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2811 * BEWARE: this seems to work but should be considered first if
af667a29 2812 * there are Tx hangs or other Tx related bugs
3a3b7586
JB		 2813 */
2814 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2815 ew32(TXDCTL(0), txdctl);
3a3b7586 2816 }
56032be7
BA		 2817 /* erratum work around: set txdctl the same for both queues */
2818 ew32(TXDCTL(1), er32(TXDCTL(0)));
3a3b7586 2819
bc7f75fa 2820 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2821 tarc = er32(TARC(0));
ad68076e
BA		 2822 /*
2823 * set the speed mode bit, we'll clear it if we're not at
2824 * gigabit link later
2825 */
bc7f75fa
AK		 2826#define SPEED_MODE_BIT (1 << 21)
2827 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2828 ew32(TARC(0), tarc);
bc7f75fa
AK		 2829 }
2830
2831 /* errata: program both queues to unweighted RR */
2832 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2833 tarc = er32(TARC(0));
bc7f75fa 2834 tarc |= 1;
e9ec2c0f
JK		 2835 ew32(TARC(0), tarc);
2836 tarc = er32(TARC(1));
bc7f75fa 2837 tarc |= 1;
e9ec2c0f 2838 ew32(TARC(1), tarc);
bc7f75fa
AK		 2839 }
2840
bc7f75fa
AK		 2841 /* Setup Transmit Descriptor Settings for eop descriptor */
2842 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2843
2844 /* only set IDE if we are delaying interrupts using the timers */
2845 if (adapter->tx_int_delay)
2846 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2847
2848 /* enable Report Status bit */
2849 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2850
57cde763 2851 hw->mac.ops.config_collision_dist(hw);
bc7f75fa
AK		 2852}
2853
2854/**
2855 * e1000_setup_rctl - configure the receive control registers
2856 * @adapter: Board private structure
2857 **/
2858#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2859 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2860static void e1000_setup_rctl(struct e1000_adapter *adapter)
2861{
2862 struct e1000_hw *hw = &adapter->hw;
2863 u32 rctl, rfctl;
bc7f75fa
AK		 2864 u32 pages = 0;
2865
a1ce6473
BA		 2866 /* Workaround Si errata on 82579 - configure jumbo frame flow */
2867 if (hw->mac.type == e1000_pch2lan) {
2868 s32 ret_val;
2869
2870 if (adapter->netdev->mtu > ETH_DATA_LEN)
2871 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2872 else
2873 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
dd93f95e
BA		 2874
2875 if (ret_val)
2876 e_dbg("failed to enable jumbo frame workaround mode\n");
a1ce6473
BA		 2877 }
2878
bc7f75fa
AK		 2879 /* Program MC offset vector base */
2880 rctl = er32(RCTL);
2881 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2882 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2883 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2884 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2885
2886 /* Do not Store bad packets */
2887 rctl &= ~E1000_RCTL_SBP;
2888
2889 /* Enable Long Packet receive */
2890 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2891 rctl &= ~E1000_RCTL_LPE;
2892 else
2893 rctl |= E1000_RCTL_LPE;
2894
eb7c3adb
JK		 2895 /* Some systems expect that the CRC is included in SMBUS traffic. The
2896 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2897 * host memory when this is enabled
2898 */
2899 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2900 rctl |= E1000_RCTL_SECRC;
5918bd88 2901
a4f58f54
BA		 2902 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2903 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2904 u16 phy_data;
2905
2906 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2907 phy_data &= 0xfff8;
2908 phy_data |= (1 << 2);
2909 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2910
2911 e1e_rphy(hw, 22, &phy_data);
2912 phy_data &= 0x0fff;
2913 phy_data |= (1 << 14);
2914 e1e_wphy(hw, 0x10, 0x2823);
2915 e1e_wphy(hw, 0x11, 0x0003);
2916 e1e_wphy(hw, 22, phy_data);
2917 }
2918
bc7f75fa
AK		 2919 /* Setup buffer sizes */
2920 rctl &= ~E1000_RCTL_SZ_4096;
2921 rctl |= E1000_RCTL_BSEX;
2922 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2923 case 2048:
2924 default:
2925 rctl |= E1000_RCTL_SZ_2048;
2926 rctl &= ~E1000_RCTL_BSEX;
2927 break;
2928 case 4096:
2929 rctl |= E1000_RCTL_SZ_4096;
2930 break;
2931 case 8192:
2932 rctl |= E1000_RCTL_SZ_8192;
2933 break;
2934 case 16384:
2935 rctl |= E1000_RCTL_SZ_16384;
2936 break;
2937 }
2938
5f450212
BA		 2939 /* Enable Extended Status in all Receive Descriptors */
2940 rfctl = er32(RFCTL);
2941 rfctl |= E1000_RFCTL_EXTEN;
2942
bc7f75fa
AK		 2943 /*
2944 * 82571 and greater support packet-split where the protocol
2945 * header is placed in skb->data and the packet data is
2946 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2947 * In the case of a non-split, skb->data is linearly filled,
2948 * followed by the page buffers. Therefore, skb->data is
2949 * sized to hold the largest protocol header.
2950 *
2951 * allocations using alloc_page take too long for regular MTU
2952 * so only enable packet split for jumbo frames
2953 *
2954 * Using pages when the page size is greater than 16k wastes
2955 * a lot of memory, since we allocate 3 pages at all times
2956 * per packet.
2957 */
bc7f75fa 2958 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
79d4e908 2959 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2960 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2961 else
2962 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2963
2964 if (adapter->rx_ps_pages) {
90da0669
BA		 2965 u32 psrctl = 0;
2966
ad68076e
BA		 2967 /*
2968 * disable packet split support for IPv6 extension headers,
2969 * because some malformed IPv6 headers can hang the Rx
2970 */
bc7f75fa
AK		 2971 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2972 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2973
140a7480
AK		 2974 /* Enable Packet split descriptors */
2975 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2976
2977 psrctl |= adapter->rx_ps_bsize0 >>
2978 E1000_PSRCTL_BSIZE0_SHIFT;
2979
2980 switch (adapter->rx_ps_pages) {
2981 case 3:
2982 psrctl |= PAGE_SIZE <<
2983 E1000_PSRCTL_BSIZE3_SHIFT;
2984 case 2:
2985 psrctl |= PAGE_SIZE <<
2986 E1000_PSRCTL_BSIZE2_SHIFT;
2987 case 1:
2988 psrctl |= PAGE_SIZE >>
2989 E1000_PSRCTL_BSIZE1_SHIFT;
2990 break;
2991 }
2992
2993 ew32(PSRCTL, psrctl);
2994 }
2995
cf955e6c
BG		 2996 /* This is useful for sniffing bad packets. */
2997 if (adapter->netdev->features & NETIF_F_RXALL) {
2998 /* UPE and MPE will be handled by normal PROMISC logic
2999 * in e1000e_set_rx_mode */
3000 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3001 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3002 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3003
3004 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3005 E1000_RCTL_DPF | /* Allow filtered pause */
3006 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3007 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3008 * and that breaks VLANs.
3009 */
3010 }
3011
5f450212 3012 ew32(RFCTL, rfctl);
bc7f75fa 3013 ew32(RCTL, rctl);
318a94d6
JK		 3014 /* just started the receive unit, no need to restart */
3015 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 3016}
3017
3018/**
3019 * e1000_configure_rx - Configure Receive Unit after Reset
3020 * @adapter: board private structure
3021 *
3022 * Configure the Rx unit of the MAC after a reset.
3023 **/
3024static void e1000_configure_rx(struct e1000_adapter *adapter)
3025{
3026 struct e1000_hw *hw = &adapter->hw;
3027 struct e1000_ring *rx_ring = adapter->rx_ring;
3028 u64 rdba;
3029 u32 rdlen, rctl, rxcsum, ctrl_ext;
3030
3031 if (adapter->rx_ps_pages) {
3032 /* this is a 32 byte descriptor */
3033 rdlen = rx_ring->count *
af667a29 3034 sizeof(union e1000_rx_desc_packet_split);
bc7f75fa
AK		 3035 adapter->clean_rx = e1000_clean_rx_irq_ps;
3036 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae 3037 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
5f450212 3038 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
97ac8cae
BA		 3039 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3040 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 3041 } else {
5f450212 3042 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
bc7f75fa
AK		 3043 adapter->clean_rx = e1000_clean_rx_irq;
3044 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3045 }
3046
3047 /* disable receives while setting up the descriptors */
3048 rctl = er32(RCTL);
7f99ae63
BA		 3049 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3050 ew32(RCTL, rctl & ~E1000_RCTL_EN);
bc7f75fa 3051 e1e_flush();
1bba4386 3052 usleep_range(10000, 20000);
bc7f75fa 3053
3a3b7586
JB		 3054 if (adapter->flags2 & FLAG2_DMA_BURST) {
3055 /*
3056 * set the writeback threshold (only takes effect if the RDTR
3057 * is set). set GRAN=1 and write back up to 0x4 worth, and
af667a29 3058 * enable prefetching of 0x20 Rx descriptors
3a3b7586
JB		 3059 * granularity = 01
3060 * wthresh = 04,
3061 * hthresh = 04,
3062 * pthresh = 0x20
3063 */
3064 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3065 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3066
3067 /*
3068 * override the delay timers for enabling bursting, only if
3069 * the value was not set by the user via module options
3070 */
3071 if (adapter->rx_int_delay == DEFAULT_RDTR)
3072 adapter->rx_int_delay = BURST_RDTR;
3073 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3074 adapter->rx_abs_int_delay = BURST_RADV;
3075 }
3076
bc7f75fa
AK		 3077 /* set the Receive Delay Timer Register */
3078 ew32(RDTR, adapter->rx_int_delay);
3079
3080 /* irq moderation */
3081 ew32(RADV, adapter->rx_abs_int_delay);
828bac87 3082 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
ad68076e 3083 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 3084
3085 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 3086 /* Auto-Mask interrupts upon ICR access */
3087 ctrl_ext |= E1000_CTRL_EXT_IAME;
3088 ew32(IAM, 0xffffffff);
3089 ew32(CTRL_EXT, ctrl_ext);
3090 e1e_flush();
3091
ad68076e
BA		 3092 /*
3093 * Setup the HW Rx Head and Tail Descriptor Pointers and
3094 * the Base and Length of the Rx Descriptor Ring
3095 */
bc7f75fa 3096 rdba = rx_ring->dma;
1e36052e
BA		 3097 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3098 ew32(RDBAH(0), (rdba >> 32));
3099 ew32(RDLEN(0), rdlen);
3100 ew32(RDH(0), 0);
3101 ew32(RDT(0), 0);
3102 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3103 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
bc7f75fa
AK		 3104
3105 /* Enable Receive Checksum Offload for TCP and UDP */
3106 rxcsum = er32(RXCSUM);
dc221294 3107 if (adapter->netdev->features & NETIF_F_RXCSUM) {
bc7f75fa
AK		 3108 rxcsum |= E1000_RXCSUM_TUOFL;
3109
ad68076e
BA		 3110 /*
3111 * IPv4 payload checksum for UDP fragments must be
3112 * used in conjunction with packet-split.
3113 */
bc7f75fa
AK		 3114 if (adapter->rx_ps_pages)
3115 rxcsum |= E1000_RXCSUM_IPPCSE;
3116 } else {
3117 rxcsum &= ~E1000_RXCSUM_TUOFL;
3118 /* no need to clear IPPCSE as it defaults to 0 */
3119 }
3120 ew32(RXCSUM, rxcsum);
3121
79d4e908
BA		 3122 if (adapter->hw.mac.type == e1000_pch2lan) {
3123 /*
3124 * With jumbo frames, excessive C-state transition
3125 * latencies result in dropped transactions.
3126 */
53ec5498
BA		 3127 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3128 u32 rxdctl = er32(RXDCTL(0));
3129 ew32(RXDCTL(0), rxdctl | 0x3);
af667a29 3130 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
53ec5498 3131 } else {
af667a29
BA		 3132 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3133 PM_QOS_DEFAULT_VALUE);
53ec5498 3134 }
97ac8cae 3135 }
bc7f75fa
AK		 3136
3137 /* Enable Receives */
3138 ew32(RCTL, rctl);
3139}
3140
3141/**
ef9b965a
JB		 3142 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3143 * @netdev: network interface device structure
bc7f75fa 3144 *
ef9b965a
JB		 3145 * Writes multicast address list to the MTA hash table.
3146 * Returns: -ENOMEM on failure
3147 * 0 on no addresses written
3148 * X on writing X addresses to MTA
3149 */
3150static int e1000e_write_mc_addr_list(struct net_device *netdev)
3151{
3152 struct e1000_adapter *adapter = netdev_priv(netdev);
3153 struct e1000_hw *hw = &adapter->hw;
3154 struct netdev_hw_addr *ha;
3155 u8 *mta_list;
3156 int i;
3157
3158 if (netdev_mc_empty(netdev)) {
3159 /* nothing to program, so clear mc list */
3160 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3161 return 0;
3162 }
3163
3164 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3165 if (!mta_list)
3166 return -ENOMEM;
3167
3168 /* update_mc_addr_list expects a packed array of only addresses. */
3169 i = 0;
3170 netdev_for_each_mc_addr(ha, netdev)
3171 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3172
3173 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3174 kfree(mta_list);
3175
3176 return netdev_mc_count(netdev);
3177}
3178
3179/**
3180 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3181 * @netdev: network interface device structure
bc7f75fa 3182 *
ef9b965a
JB		 3183 * Writes unicast address list to the RAR table.
3184 * Returns: -ENOMEM on failure/insufficient address space
3185 * 0 on no addresses written
3186 * X on writing X addresses to the RAR table
bc7f75fa 3187 **/
ef9b965a 3188static int e1000e_write_uc_addr_list(struct net_device *netdev)
bc7f75fa 3189{
ef9b965a
JB		 3190 struct e1000_adapter *adapter = netdev_priv(netdev);
3191 struct e1000_hw *hw = &adapter->hw;
3192 unsigned int rar_entries = hw->mac.rar_entry_count;
3193 int count = 0;
3194
3195 /* save a rar entry for our hardware address */
3196 rar_entries--;
3197
3198 /* save a rar entry for the LAA workaround */
3199 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3200 rar_entries--;
3201
3202 /* return ENOMEM indicating insufficient memory for addresses */
3203 if (netdev_uc_count(netdev) > rar_entries)
3204 return -ENOMEM;
3205
3206 if (!netdev_uc_empty(netdev) && rar_entries) {
3207 struct netdev_hw_addr *ha;
3208
3209 /*
3210 * write the addresses in reverse order to avoid write
3211 * combining
3212 */
3213 netdev_for_each_uc_addr(ha, netdev) {
3214 if (!rar_entries)
3215 break;
69e1e019 3216 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
ef9b965a
JB		 3217 count++;
3218 }
3219 }
3220
3221 /* zero out the remaining RAR entries not used above */
3222 for (; rar_entries > 0; rar_entries--) {
3223 ew32(RAH(rar_entries), 0);
3224 ew32(RAL(rar_entries), 0);
3225 }
3226 e1e_flush();
3227
3228 return count;
bc7f75fa
AK		 3229}
3230
3231/**
ef9b965a 3232 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
bc7f75fa
AK		 3233 * @netdev: network interface device structure
3234 *
ef9b965a
JB		 3235 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3236 * address list or the network interface flags are updated. This routine is
3237 * responsible for configuring the hardware for proper unicast, multicast,
bc7f75fa
AK		 3238 * promiscuous mode, and all-multi behavior.
3239 **/
ef9b965a 3240static void e1000e_set_rx_mode(struct net_device *netdev)
bc7f75fa
AK		 3241{
3242 struct e1000_adapter *adapter = netdev_priv(netdev);
3243 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 3244 u32 rctl;
bc7f75fa
AK		 3245
3246 /* Check for Promiscuous and All Multicast modes */
bc7f75fa
AK		 3247 rctl = er32(RCTL);
3248
ef9b965a
JB		 3249 /* clear the affected bits */
3250 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3251
bc7f75fa
AK		 3252 if (netdev->flags & IFF_PROMISC) {
3253 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
86d70e53
JK		 3254 /* Do not hardware filter VLANs in promisc mode */
3255 e1000e_vlan_filter_disable(adapter);
bc7f75fa 3256 } else {
ef9b965a 3257 int count;
3d3a1676 3258
746b9f02
PM		 3259 if (netdev->flags & IFF_ALLMULTI) {
3260 rctl |= E1000_RCTL_MPE;
746b9f02 3261 } else {
ef9b965a
JB		 3262 /*
3263 * Write addresses to the MTA, if the attempt fails
3264 * then we should just turn on promiscuous mode so
3265 * that we can at least receive multicast traffic
3266 */
3267 count = e1000e_write_mc_addr_list(netdev);
3268 if (count < 0)
3269 rctl |= E1000_RCTL_MPE;
746b9f02 3270 }
86d70e53 3271 e1000e_vlan_filter_enable(adapter);
bc7f75fa 3272 /*
ef9b965a
JB		 3273 * Write addresses to available RAR registers, if there is not
3274 * sufficient space to store all the addresses then enable
3275 * unicast promiscuous mode
bc7f75fa 3276 */
ef9b965a
JB		 3277 count = e1000e_write_uc_addr_list(netdev);
3278 if (count < 0)
3279 rctl |= E1000_RCTL_UPE;
bc7f75fa 3280 }
86d70e53 3281
ef9b965a
JB		 3282 ew32(RCTL, rctl);
3283
86d70e53
JK		 3284 if (netdev->features & NETIF_F_HW_VLAN_RX)
3285 e1000e_vlan_strip_enable(adapter);
3286 else
3287 e1000e_vlan_strip_disable(adapter);
bc7f75fa
AK		 3288}
3289
70495a50
BA		 3290static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3291{
3292 struct e1000_hw *hw = &adapter->hw;
3293 u32 mrqc, rxcsum;
3294 int i;
3295 static const u32 rsskey[10] = {
3296 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3297 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3298 };
3299
3300 /* Fill out hash function seed */
3301 for (i = 0; i < 10; i++)
3302 ew32(RSSRK(i), rsskey[i]);
3303
3304 /* Direct all traffic to queue 0 */
3305 for (i = 0; i < 32; i++)
3306 ew32(RETA(i), 0);
3307
3308 /*
3309 * Disable raw packet checksumming so that RSS hash is placed in
3310 * descriptor on writeback.
3311 */
3312 rxcsum = er32(RXCSUM);
3313 rxcsum |= E1000_RXCSUM_PCSD;
3314
3315 ew32(RXCSUM, rxcsum);
3316
3317 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3318 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3319 E1000_MRQC_RSS_FIELD_IPV6 |
3320 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3321 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3322
3323 ew32(MRQC, mrqc);
3324}
3325
bc7f75fa 3326/**
ad68076e 3327 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 3328 * @adapter: private board structure
3329 **/
3330static void e1000_configure(struct e1000_adapter *adapter)
3331{
55aa6985
BA		 3332 struct e1000_ring *rx_ring = adapter->rx_ring;
3333
ef9b965a 3334 e1000e_set_rx_mode(adapter->netdev);
bc7f75fa
AK		 3335
3336 e1000_restore_vlan(adapter);
cd791618 3337 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 3338
3339 e1000_configure_tx(adapter);
70495a50
BA		 3340
3341 if (adapter->netdev->features & NETIF_F_RXHASH)
3342 e1000e_setup_rss_hash(adapter);
bc7f75fa
AK		 3343 e1000_setup_rctl(adapter);
3344 e1000_configure_rx(adapter);
55aa6985 3345 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
bc7f75fa
AK		 3346}
3347
3348/**
3349 * e1000e_power_up_phy - restore link in case the phy was powered down
3350 * @adapter: address of board private structure
3351 *
3352 * The phy may be powered down to save power and turn off link when the
3353 * driver is unloaded and wake on lan is not enabled (among others)
3354 * *** this routine MUST be followed by a call to e1000e_reset ***
3355 **/
3356void e1000e_power_up_phy(struct e1000_adapter *adapter)
3357{
17f208de
BA		 3358 if (adapter->hw.phy.ops.power_up)
3359 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 3360
3361 adapter->hw.mac.ops.setup_link(&adapter->hw);
3362}
3363
3364/**
3365 * e1000_power_down_phy - Power down the PHY
3366 *
17f208de
BA		 3367 * Power down the PHY so no link is implied when interface is down.
3368 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 3369 */
3370static void e1000_power_down_phy(struct e1000_adapter *adapter)
3371{
bc7f75fa 3372 /* WoL is enabled */
23b66e2b 3373 if (adapter->wol)
bc7f75fa
AK		 3374 return;
3375
17f208de
BA		 3376 if (adapter->hw.phy.ops.power_down)
3377 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 3378}
3379
3380/**
3381 * e1000e_reset - bring the hardware into a known good state
3382 *
3383 * This function boots the hardware and enables some settings that
3384 * require a configuration cycle of the hardware - those cannot be
3385 * set/changed during runtime. After reset the device needs to be
ad68076e 3386 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 3387 */
3388void e1000e_reset(struct e1000_adapter *adapter)
3389{
3390 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3391 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 3392 struct e1000_hw *hw = &adapter->hw;
3393 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3394 u32 pba = adapter->pba;
bc7f75fa
AK		 3395 u16 hwm;
3396
ad68076e 3397 /* reset Packet Buffer Allocation to default */
318a94d6 3398 ew32(PBA, pba);
df762464 3399
318a94d6 3400 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 3401 /*
3402 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 3403 * large enough to accommodate two full transmit packets,
3404 * rounded up to the next 1KB and expressed in KB. Likewise,
3405 * the Rx FIFO should be large enough to accommodate at least
3406 * one full receive packet and is similarly rounded up and
ad68076e
BA		 3407 * expressed in KB.
3408 */
df762464 3409 pba = er32(PBA);
bc7f75fa 3410 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3411 tx_space = pba >> 16;
bc7f75fa 3412 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3413 pba &= 0xffff;
ad68076e 3414 /*
af667a29 3415 * the Tx fifo also stores 16 bytes of information about the Tx
ad68076e 3416 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 3417 */
3418 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 3419 sizeof(struct e1000_tx_desc) -
3420 ETH_FCS_LEN) * 2;
3421 min_tx_space = ALIGN(min_tx_space, 1024);
3422 min_tx_space >>= 10;
3423 /* software strips receive CRC, so leave room for it */
318a94d6 3424 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 3425 min_rx_space = ALIGN(min_rx_space, 1024);
3426 min_rx_space >>= 10;
3427
ad68076e
BA		 3428 /*
3429 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3430 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 3431 * allocation, take space away from current Rx allocation
3432 */
df762464
AK		 3433 if ((tx_space < min_tx_space) &&
3434 ((min_tx_space - tx_space) < pba)) {
3435 pba -= min_tx_space - tx_space;
bc7f75fa 3436
ad68076e 3437 /*
af667a29 3438 * if short on Rx space, Rx wins and must trump Tx
ad68076e
BA		 3439 * adjustment or use Early Receive if available
3440 */
79d4e908 3441 if (pba < min_rx_space)
df762464 3442 pba = min_rx_space;
bc7f75fa 3443 }
df762464
AK		 3444
3445 ew32(PBA, pba);
bc7f75fa
AK		 3446 }
3447
ad68076e
BA		 3448 /*
3449 * flow control settings
3450 *
38eb394e 3451 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 3452 * (or the size used for early receive) above it in the Rx FIFO.
3453 * Set it to the lower of:
3454 * - 90% of the Rx FIFO size, and
38eb394e 3455 * - the full Rx FIFO size minus one full frame
ad68076e 3456 */
d3738bb8
BA		 3457 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3458 fc->pause_time = 0xFFFF;
3459 else
3460 fc->pause_time = E1000_FC_PAUSE_TIME;
b20caa80 3461 fc->send_xon = true;
d3738bb8
BA		 3462 fc->current_mode = fc->requested_mode;
3463
3464 switch (hw->mac.type) {
79d4e908
BA		 3465 case e1000_ich9lan:
3466 case e1000_ich10lan:
3467 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3468 pba = 14;
3469 ew32(PBA, pba);
3470 fc->high_water = 0x2800;
3471 fc->low_water = fc->high_water - 8;
3472 break;
3473 }
3474 /* fall-through */
d3738bb8 3475 default:
79d4e908
BA		 3476 hwm = min(((pba << 10) * 9 / 10),
3477 ((pba << 10) - adapter->max_frame_size));
d3738bb8
BA		 3478
3479 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3480 fc->low_water = fc->high_water - 8;
3481 break;
3482 case e1000_pchlan:
38eb394e
BA		 3483 /*
3484 * Workaround PCH LOM adapter hangs with certain network
3485 * loads. If hangs persist, try disabling Tx flow control.
3486 */
3487 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3488 fc->high_water = 0x3500;
3489 fc->low_water = 0x1500;
3490 } else {
3491 fc->high_water = 0x5000;
3492 fc->low_water = 0x3000;
3493 }
a305595b 3494 fc->refresh_time = 0x1000;
d3738bb8
BA		 3495 break;
3496 case e1000_pch2lan:
3497 fc->high_water = 0x05C20;
3498 fc->low_water = 0x05048;
3499 fc->pause_time = 0x0650;
3500 fc->refresh_time = 0x0400;
828bac87
BA		 3501 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3502 pba = 14;
3503 ew32(PBA, pba);
3504 }
d3738bb8 3505 break;
38eb394e 3506 }
bc7f75fa 3507
828bac87
BA		 3508 /*
3509 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
79d4e908 3510 * fit in receive buffer.
828bac87
BA		 3511 */
3512 if (adapter->itr_setting & 0x3) {
79d4e908 3513 if ((adapter->max_frame_size * 2) > (pba << 10)) {
828bac87
BA		 3514 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3515 dev_info(&adapter->pdev->dev,
3516 "Interrupt Throttle Rate turned off\n");
3517 adapter->flags2 |= FLAG2_DISABLE_AIM;
3518 ew32(ITR, 0);
3519 }
3520 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3521 dev_info(&adapter->pdev->dev,
3522 "Interrupt Throttle Rate turned on\n");
3523 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3524 adapter->itr = 20000;
3525 ew32(ITR, 1000000000 / (adapter->itr * 256));
3526 }
3527 }
3528
bc7f75fa
AK		 3529 /* Allow time for pending master requests to run */
3530 mac->ops.reset_hw(hw);
97ac8cae
BA		 3531
3532 /*
3533 * For parts with AMT enabled, let the firmware know
3534 * that the network interface is in control
3535 */
c43bc57e 3536 if (adapter->flags & FLAG_HAS_AMT)
31dbe5b4 3537 e1000e_get_hw_control(adapter);
97ac8cae 3538
bc7f75fa
AK		 3539 ew32(WUC, 0);
3540
3541 if (mac->ops.init_hw(hw))
44defeb3 3542 e_err("Hardware Error\n");
bc7f75fa
AK		 3543
3544 e1000_update_mng_vlan(adapter);
3545
3546 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3547 ew32(VET, ETH_P_8021Q);
3548
3549 e1000e_reset_adaptive(hw);
31dbe5b4
BA		 3550
3551 if (!netif_running(adapter->netdev) &&
3552 !test_bit(__E1000_TESTING, &adapter->state)) {
3553 e1000_power_down_phy(adapter);
3554 return;
3555 }
3556
bc7f75fa
AK		 3557 e1000_get_phy_info(hw);
3558
918d7197
BA		 3559 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3560 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3561 u16 phy_data = 0;
ad68076e
BA		 3562 /*
3563 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3564 * the return value of this function because there is nothing
ad68076e
BA		 3565 * different we would do if it failed
3566 */
bc7f75fa
AK		 3567 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3568 phy_data &= ~IGP02E1000_PM_SPD;
3569 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3570 }
bc7f75fa
AK		 3571}
3572
3573int e1000e_up(struct e1000_adapter *adapter)
3574{
3575 struct e1000_hw *hw = &adapter->hw;
3576
3577 /* hardware has been reset, we need to reload some things */
3578 e1000_configure(adapter);
3579
3580 clear_bit(__E1000_DOWN, &adapter->state);
3581
4662e82b
BA		 3582 if (adapter->msix_entries)
3583 e1000_configure_msix(adapter);
bc7f75fa
AK		 3584 e1000_irq_enable(adapter);
3585
400484fa 3586 netif_start_queue(adapter->netdev);
4cb9be7a 3587
bc7f75fa 3588 /* fire a link change interrupt to start the watchdog */
52a9b231
BA		 3589 if (adapter->msix_entries)
3590 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3591 else
3592 ew32(ICS, E1000_ICS_LSC);
3593
bc7f75fa
AK		 3594 return 0;
3595}
3596
713b3c9e
JB		 3597static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3598{
3599 struct e1000_hw *hw = &adapter->hw;
3600
3601 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3602 return;
3603
3604 /* flush pending descriptor writebacks to memory */
3605 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3606 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3607
3608 /* execute the writes immediately */
3609 e1e_flush();
bf03085f
MV		 3610
3611 /*
3612 * due to rare timing issues, write to TIDV/RDTR again to ensure the
3613 * write is successful
3614 */
3615 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3616 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
713b3c9e
JB		 3617
3618 /* execute the writes immediately */
3619 e1e_flush();
3620}
3621
67fd4fcb
JK		 3622static void e1000e_update_stats(struct e1000_adapter *adapter);
3623
bc7f75fa
AK		 3624void e1000e_down(struct e1000_adapter *adapter)
3625{
3626 struct net_device *netdev = adapter->netdev;
3627 struct e1000_hw *hw = &adapter->hw;
3628 u32 tctl, rctl;
3629
ad68076e
BA		 3630 /*
3631 * signal that we're down so the interrupt handler does not
3632 * reschedule our watchdog timer
3633 */
bc7f75fa
AK		 3634 set_bit(__E1000_DOWN, &adapter->state);
3635
3636 /* disable receives in the hardware */
3637 rctl = er32(RCTL);
7f99ae63
BA		 3638 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3639 ew32(RCTL, rctl & ~E1000_RCTL_EN);
bc7f75fa
AK		 3640 /* flush and sleep below */
3641
4cb9be7a 3642 netif_stop_queue(netdev);
bc7f75fa
AK		 3643
3644 /* disable transmits in the hardware */
3645 tctl = er32(TCTL);
3646 tctl &= ~E1000_TCTL_EN;
3647 ew32(TCTL, tctl);
7f99ae63 3648
bc7f75fa
AK		 3649 /* flush both disables and wait for them to finish */
3650 e1e_flush();
1bba4386 3651 usleep_range(10000, 20000);
bc7f75fa 3652
bc7f75fa
AK		 3653 e1000_irq_disable(adapter);
3654
3655 del_timer_sync(&adapter->watchdog_timer);
3656 del_timer_sync(&adapter->phy_info_timer);
3657
bc7f75fa 3658 netif_carrier_off(netdev);
67fd4fcb
JK		 3659
3660 spin_lock(&adapter->stats64_lock);
3661 e1000e_update_stats(adapter);
3662 spin_unlock(&adapter->stats64_lock);
3663
400484fa 3664 e1000e_flush_descriptors(adapter);
55aa6985
BA		 3665 e1000_clean_tx_ring(adapter->tx_ring);
3666 e1000_clean_rx_ring(adapter->rx_ring);
400484fa 3667
bc7f75fa
AK		 3668 adapter->link_speed = 0;
3669 adapter->link_duplex = 0;
3670
52cc3086
JK		 3671 if (!pci_channel_offline(adapter->pdev))
3672 e1000e_reset(adapter);
713b3c9e 3673
bc7f75fa
AK		 3674 /*
3675 * TODO: for power management, we could drop the link and
3676 * pci_disable_device here.
3677 */
3678}
3679
3680void e1000e_reinit_locked(struct e1000_adapter *adapter)
3681{
3682 might_sleep();
3683 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 3684 usleep_range(1000, 2000);
bc7f75fa
AK		 3685 e1000e_down(adapter);
3686 e1000e_up(adapter);
3687 clear_bit(__E1000_RESETTING, &adapter->state);
3688}
3689
3690/**
3691 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3692 * @adapter: board private structure to initialize
3693 *
3694 * e1000_sw_init initializes the Adapter private data structure.
3695 * Fields are initialized based on PCI device information and
3696 * OS network device settings (MTU size).
3697 **/
3698static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3699{
bc7f75fa
AK		 3700 struct net_device *netdev = adapter->netdev;
3701
3702 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3703 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 3704 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3705 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
55aa6985
BA		 3706 adapter->tx_ring_count = E1000_DEFAULT_TXD;
3707 adapter->rx_ring_count = E1000_DEFAULT_RXD;
bc7f75fa 3708
67fd4fcb
JK		 3709 spin_lock_init(&adapter->stats64_lock);
3710
4662e82b 3711 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3712
4662e82b
BA		 3713 if (e1000_alloc_queues(adapter))
3714 return -ENOMEM;
bc7f75fa 3715
bc7f75fa 3716 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 3717 e1000_irq_disable(adapter);
3718
bc7f75fa
AK		 3719 set_bit(__E1000_DOWN, &adapter->state);
3720 return 0;
bc7f75fa
AK		 3721}
3722
f8d59f78
BA		 3723/**
3724 * e1000_intr_msi_test - Interrupt Handler
3725 * @irq: interrupt number
3726 * @data: pointer to a network interface device structure
3727 **/
3728static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3729{
3730 struct net_device *netdev = data;
3731 struct e1000_adapter *adapter = netdev_priv(netdev);
3732 struct e1000_hw *hw = &adapter->hw;
3733 u32 icr = er32(ICR);
3734
3bb99fe2 3735 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 3736 if (icr & E1000_ICR_RXSEQ) {
3737 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3738 wmb();
3739 }
3740
3741 return IRQ_HANDLED;
3742}
3743
3744/**
3745 * e1000_test_msi_interrupt - Returns 0 for successful test
3746 * @adapter: board private struct
3747 *
3748 * code flow taken from tg3.c
3749 **/
3750static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3751{
3752 struct net_device *netdev = adapter->netdev;
3753 struct e1000_hw *hw = &adapter->hw;
3754 int err;
3755
3756 /* poll_enable hasn't been called yet, so don't need disable */
3757 /* clear any pending events */
3758 er32(ICR);
3759
3760 /* free the real vector and request a test handler */
3761 e1000_free_irq(adapter);
4662e82b 3762 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3763
3764 /* Assume that the test fails, if it succeeds then the test
3765 * MSI irq handler will unset this flag */
3766 adapter->flags |= FLAG_MSI_TEST_FAILED;
3767
3768 err = pci_enable_msi(adapter->pdev);
3769 if (err)
3770 goto msi_test_failed;
3771
a0607fd3 3772 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3773 netdev->name, netdev);
3774 if (err) {
3775 pci_disable_msi(adapter->pdev);
3776 goto msi_test_failed;
3777 }
3778
3779 wmb();
3780
3781 e1000_irq_enable(adapter);
3782
3783 /* fire an unusual interrupt on the test handler */
3784 ew32(ICS, E1000_ICS_RXSEQ);
3785 e1e_flush();
3786 msleep(50);
3787
3788 e1000_irq_disable(adapter);
3789
3790 rmb();
3791
3792 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3793 adapter->int_mode = E1000E_INT_MODE_LEGACY;
068e8a30 3794 e_info("MSI interrupt test failed, using legacy interrupt.\n");
24b706b2 3795 } else {
068e8a30 3796 e_dbg("MSI interrupt test succeeded!\n");
24b706b2 3797 }
f8d59f78
BA		 3798
3799 free_irq(adapter->pdev->irq, netdev);
3800 pci_disable_msi(adapter->pdev);
3801
f8d59f78 3802msi_test_failed:
4662e82b 3803 e1000e_set_interrupt_capability(adapter);
068e8a30 3804 return e1000_request_irq(adapter);
f8d59f78
BA		 3805}
3806
3807/**
3808 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3809 * @adapter: board private struct
3810 *
3811 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3812 **/
3813static int e1000_test_msi(struct e1000_adapter *adapter)
3814{
3815 int err;
3816 u16 pci_cmd;
3817
3818 if (!(adapter->flags & FLAG_MSI_ENABLED))
3819 return 0;
3820
3821 /* disable SERR in case the MSI write causes a master abort */
3822 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
36f2407f
DN		 3823 if (pci_cmd & PCI_COMMAND_SERR)
3824 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3825 pci_cmd & ~PCI_COMMAND_SERR);
f8d59f78
BA		 3826
3827 err = e1000_test_msi_interrupt(adapter);
3828
36f2407f
DN		 3829 /* re-enable SERR */
3830 if (pci_cmd & PCI_COMMAND_SERR) {
3831 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3832 pci_cmd |= PCI_COMMAND_SERR;
3833 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3834 }
f8d59f78 3835
f8d59f78
BA		 3836 return err;
3837}
3838
bc7f75fa
AK		 3839/**
3840 * e1000_open - Called when a network interface is made active
3841 * @netdev: network interface device structure
3842 *
3843 * Returns 0 on success, negative value on failure
3844 *
3845 * The open entry point is called when a network interface is made
3846 * active by the system (IFF_UP). At this point all resources needed
3847 * for transmit and receive operations are allocated, the interrupt
3848 * handler is registered with the OS, the watchdog timer is started,
3849 * and the stack is notified that the interface is ready.
3850 **/
3851static int e1000_open(struct net_device *netdev)
3852{
3853 struct e1000_adapter *adapter = netdev_priv(netdev);
3854 struct e1000_hw *hw = &adapter->hw;
23606cf5 3855 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3856 int err;
3857
3858 /* disallow open during test */
3859 if (test_bit(__E1000_TESTING, &adapter->state))
3860 return -EBUSY;
3861
23606cf5
RW		 3862 pm_runtime_get_sync(&pdev->dev);
3863
9c563d20
JB		 3864 netif_carrier_off(netdev);
3865
bc7f75fa 3866 /* allocate transmit descriptors */
55aa6985 3867 err = e1000e_setup_tx_resources(adapter->tx_ring);
bc7f75fa
AK		 3868 if (err)
3869 goto err_setup_tx;
3870
3871 /* allocate receive descriptors */
55aa6985 3872 err = e1000e_setup_rx_resources(adapter->rx_ring);
bc7f75fa
AK		 3873 if (err)
3874 goto err_setup_rx;
3875
11b08be8
BA		 3876 /*
3877 * If AMT is enabled, let the firmware know that the network
3878 * interface is now open and reset the part to a known state.
3879 */
3880 if (adapter->flags & FLAG_HAS_AMT) {
31dbe5b4 3881 e1000e_get_hw_control(adapter);
11b08be8
BA		 3882 e1000e_reset(adapter);
3883 }
3884
bc7f75fa
AK		 3885 e1000e_power_up_phy(adapter);
3886
3887 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3888 if ((adapter->hw.mng_cookie.status &
3889 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3890 e1000_update_mng_vlan(adapter);
3891
79d4e908
BA		 3892 /* DMA latency requirement to workaround jumbo issue */
3893 if (adapter->hw.mac.type == e1000_pch2lan)
6ba74014
LT		 3894 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3895 PM_QOS_CPU_DMA_LATENCY,
3896 PM_QOS_DEFAULT_VALUE);
c128ec29 3897
ad68076e
BA		 3898 /*
3899 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3900 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3901 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3902 * clean_rx handler before we do so.
3903 */
bc7f75fa
AK		 3904 e1000_configure(adapter);
3905
3906 err = e1000_request_irq(adapter);
3907 if (err)
3908 goto err_req_irq;
3909
f8d59f78
BA		 3910 /*
3911 * Work around PCIe errata with MSI interrupts causing some chipsets to
3912 * ignore e1000e MSI messages, which means we need to test our MSI
3913 * interrupt now
3914 */
4662e82b 3915 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3916 err = e1000_test_msi(adapter);
3917 if (err) {
3918 e_err("Interrupt allocation failed\n");
3919 goto err_req_irq;
3920 }
3921 }
3922
bc7f75fa
AK		 3923 /* From here on the code is the same as e1000e_up() */
3924 clear_bit(__E1000_DOWN, &adapter->state);
3925
3926 napi_enable(&adapter->napi);
3927
3928 e1000_irq_enable(adapter);
3929
09357b00 3930 adapter->tx_hang_recheck = false;
4cb9be7a 3931 netif_start_queue(netdev);
d55b53ff 3932
23606cf5
RW		 3933 adapter->idle_check = true;
3934 pm_runtime_put(&pdev->dev);
3935
bc7f75fa 3936 /* fire a link status change interrupt to start the watchdog */
52a9b231
BA		 3937 if (adapter->msix_entries)
3938 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3939 else
3940 ew32(ICS, E1000_ICS_LSC);
bc7f75fa
AK		 3941
3942 return 0;
3943
3944err_req_irq:
31dbe5b4 3945 e1000e_release_hw_control(adapter);
bc7f75fa 3946 e1000_power_down_phy(adapter);
55aa6985 3947 e1000e_free_rx_resources(adapter->rx_ring);
bc7f75fa 3948err_setup_rx:
55aa6985 3949 e1000e_free_tx_resources(adapter->tx_ring);
bc7f75fa
AK		 3950err_setup_tx:
3951 e1000e_reset(adapter);
23606cf5 3952 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3953
3954 return err;
3955}
3956
3957/**
3958 * e1000_close - Disables a network interface
3959 * @netdev: network interface device structure
3960 *
3961 * Returns 0, this is not allowed to fail
3962 *
3963 * The close entry point is called when an interface is de-activated
3964 * by the OS. The hardware is still under the drivers control, but
3965 * needs to be disabled. A global MAC reset is issued to stop the
3966 * hardware, and all transmit and receive resources are freed.
3967 **/
3968static int e1000_close(struct net_device *netdev)
3969{
3970 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3971 struct pci_dev *pdev = adapter->pdev;
bb9e44d0
BA		 3972 int count = E1000_CHECK_RESET_COUNT;
3973
3974 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
3975 usleep_range(10000, 20000);
bc7f75fa
AK		 3976
3977 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3978
3979 pm_runtime_get_sync(&pdev->dev);
3980
5f4a780d
BA		 3981 napi_disable(&adapter->napi);
3982
23606cf5
RW		 3983 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3984 e1000e_down(adapter);
3985 e1000_free_irq(adapter);
3986 }
bc7f75fa 3987 e1000_power_down_phy(adapter);
bc7f75fa 3988
55aa6985
BA		 3989 e1000e_free_tx_resources(adapter->tx_ring);
3990 e1000e_free_rx_resources(adapter->rx_ring);
bc7f75fa 3991
ad68076e
BA		 3992 /*
3993 * kill manageability vlan ID if supported, but not if a vlan with
3994 * the same ID is registered on the host OS (let 8021q kill it)
3995 */
86d70e53
JK		 3996 if (adapter->hw.mng_cookie.status &
3997 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
bc7f75fa
AK		 3998 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3999
ad68076e
BA		 4000 /*
4001 * If AMT is enabled, let the firmware know that the network
4002 * interface is now closed
4003 */
31dbe5b4
BA		 4004 if ((adapter->flags & FLAG_HAS_AMT) &&
4005 !test_bit(__E1000_TESTING, &adapter->state))
4006 e1000e_release_hw_control(adapter);
bc7f75fa 4007
79d4e908 4008 if (adapter->hw.mac.type == e1000_pch2lan)
6ba74014 4009 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
c128ec29 4010
23606cf5
RW		 4011 pm_runtime_put_sync(&pdev->dev);
4012
bc7f75fa
AK		 4013 return 0;
4014}
4015/**
4016 * e1000_set_mac - Change the Ethernet Address of the NIC
4017 * @netdev: network interface device structure
4018 * @p: pointer to an address structure
4019 *
4020 * Returns 0 on success, negative on failure
4021 **/
4022static int e1000_set_mac(struct net_device *netdev, void *p)
4023{
4024 struct e1000_adapter *adapter = netdev_priv(netdev);
69e1e019 4025 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 4026 struct sockaddr *addr = p;
4027
4028 if (!is_valid_ether_addr(addr->sa_data))
4029 return -EADDRNOTAVAIL;
4030
4031 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4032 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4033
69e1e019 4034 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
bc7f75fa
AK		 4035
4036 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4037 /* activate the work around */
4038 e1000e_set_laa_state_82571(&adapter->hw, 1);
4039
ad68076e
BA		 4040 /*
4041 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 4042 * between the time RAR[0] gets clobbered and the time it
4043 * gets fixed (in e1000_watchdog), the actual LAA is in one
4044 * of the RARs and no incoming packets directed to this port
4045 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 4046 * RAR[14]
4047 */
69e1e019
BA		 4048 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4049 adapter->hw.mac.rar_entry_count - 1);
bc7f75fa
AK		 4050 }
4051
4052 return 0;
4053}
4054
a8f88ff5
JB		 4055/**
4056 * e1000e_update_phy_task - work thread to update phy
4057 * @work: pointer to our work struct
4058 *
4059 * this worker thread exists because we must acquire a
4060 * semaphore to read the phy, which we could msleep while
4061 * waiting for it, and we can't msleep in a timer.
4062 **/
4063static void e1000e_update_phy_task(struct work_struct *work)
4064{
4065 struct e1000_adapter *adapter = container_of(work,
4066 struct e1000_adapter, update_phy_task);
615b32af
JB		 4067
4068 if (test_bit(__E1000_DOWN, &adapter->state))
4069 return;
4070
a8f88ff5
JB		 4071 e1000_get_phy_info(&adapter->hw);
4072}
4073
ad68076e
BA		 4074/*
4075 * Need to wait a few seconds after link up to get diagnostic information from
4076 * the phy
4077 */
bc7f75fa
AK		 4078static void e1000_update_phy_info(unsigned long data)
4079{
4080 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
615b32af
JB		 4081
4082 if (test_bit(__E1000_DOWN, &adapter->state))
4083 return;
4084
a8f88ff5 4085 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 4086}
4087
8c7bbb92
BA		 4088/**
4089 * e1000e_update_phy_stats - Update the PHY statistics counters
4090 * @adapter: board private structure
2b6b168d
BA		 4091 *
4092 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
8c7bbb92
BA		 4093 **/
4094static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4095{
4096 struct e1000_hw *hw = &adapter->hw;
4097 s32 ret_val;
4098 u16 phy_data;
4099
4100 ret_val = hw->phy.ops.acquire(hw);
4101 if (ret_val)
4102 return;
4103
8c7bbb92
BA		 4104 /*
4105 * A page set is expensive so check if already on desired page.
4106 * If not, set to the page with the PHY status registers.
4107 */
2b6b168d 4108 hw->phy.addr = 1;
8c7bbb92
BA		 4109 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4110 &phy_data);
4111 if (ret_val)
4112 goto release;
2b6b168d
BA		 4113 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4114 ret_val = hw->phy.ops.set_page(hw,
4115 HV_STATS_PAGE << IGP_PAGE_SHIFT);
8c7bbb92
BA		 4116 if (ret_val)
4117 goto release;
4118 }
4119
8c7bbb92 4120 /* Single Collision Count */
2b6b168d
BA		 4121 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4122 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
8c7bbb92
BA		 4123 if (!ret_val)
4124 adapter->stats.scc += phy_data;
4125
4126 /* Excessive Collision Count */
2b6b168d
BA		 4127 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4128 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
8c7bbb92
BA		 4129 if (!ret_val)
4130 adapter->stats.ecol += phy_data;
4131
4132 /* Multiple Collision Count */
2b6b168d
BA		 4133 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4134 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
8c7bbb92
BA		 4135 if (!ret_val)
4136 adapter->stats.mcc += phy_data;
4137
4138 /* Late Collision Count */
2b6b168d
BA		 4139 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4140 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
8c7bbb92
BA		 4141 if (!ret_val)
4142 adapter->stats.latecol += phy_data;
4143
4144 /* Collision Count - also used for adaptive IFS */
2b6b168d
BA		 4145 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4146 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
8c7bbb92
BA		 4147 if (!ret_val)
4148 hw->mac.collision_delta = phy_data;
4149
4150 /* Defer Count */
2b6b168d
BA		 4151 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4152 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
8c7bbb92
BA		 4153 if (!ret_val)
4154 adapter->stats.dc += phy_data;
4155
4156 /* Transmit with no CRS */
2b6b168d
BA		 4157 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4158 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
8c7bbb92
BA		 4159 if (!ret_val)
4160 adapter->stats.tncrs += phy_data;
4161
4162release:
4163 hw->phy.ops.release(hw);
4164}
4165
bc7f75fa
AK		 4166/**
4167 * e1000e_update_stats - Update the board statistics counters
4168 * @adapter: board private structure
4169 **/
67fd4fcb 4170static void e1000e_update_stats(struct e1000_adapter *adapter)
bc7f75fa 4171{
7274c20f 4172 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 4173 struct e1000_hw *hw = &adapter->hw;
4174 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 4175
4176 /*
4177 * Prevent stats update while adapter is being reset, or if the pci
4178 * connection is down.
4179 */
4180 if (adapter->link_speed == 0)
4181 return;
4182 if (pci_channel_offline(pdev))
4183 return;
4184
bc7f75fa
AK		 4185 adapter->stats.crcerrs += er32(CRCERRS);
4186 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 4187 adapter->stats.gorc += er32(GORCL);
4188 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 4189 adapter->stats.bprc += er32(BPRC);
4190 adapter->stats.mprc += er32(MPRC);
4191 adapter->stats.roc += er32(ROC);
4192
bc7f75fa 4193 adapter->stats.mpc += er32(MPC);
8c7bbb92
BA		 4194
4195 /* Half-duplex statistics */
4196 if (adapter->link_duplex == HALF_DUPLEX) {
4197 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4198 e1000e_update_phy_stats(adapter);
4199 } else {
4200 adapter->stats.scc += er32(SCC);
4201 adapter->stats.ecol += er32(ECOL);
4202 adapter->stats.mcc += er32(MCC);
4203 adapter->stats.latecol += er32(LATECOL);
4204 adapter->stats.dc += er32(DC);
4205
4206 hw->mac.collision_delta = er32(COLC);
4207
4208 if ((hw->mac.type != e1000_82574) &&
4209 (hw->mac.type != e1000_82583))
4210 adapter->stats.tncrs += er32(TNCRS);
4211 }
4212 adapter->stats.colc += hw->mac.collision_delta;
a4f58f54 4213 }
8c7bbb92 4214
bc7f75fa
AK		 4215 adapter->stats.xonrxc += er32(XONRXC);
4216 adapter->stats.xontxc += er32(XONTXC);
4217 adapter->stats.xoffrxc += er32(XOFFRXC);
4218 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 4219 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 4220 adapter->stats.gotc += er32(GOTCL);
4221 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 4222 adapter->stats.rnbc += er32(RNBC);
4223 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 4224
4225 adapter->stats.mptc += er32(MPTC);
4226 adapter->stats.bptc += er32(BPTC);
4227
4228 /* used for adaptive IFS */
4229
4230 hw->mac.tx_packet_delta = er32(TPT);
4231 adapter->stats.tpt += hw->mac.tx_packet_delta;
bc7f75fa
AK		 4232
4233 adapter->stats.algnerrc += er32(ALGNERRC);
4234 adapter->stats.rxerrc += er32(RXERRC);
bc7f75fa
AK		 4235 adapter->stats.cexterr += er32(CEXTERR);
4236 adapter->stats.tsctc += er32(TSCTC);
4237 adapter->stats.tsctfc += er32(TSCTFC);
4238
bc7f75fa 4239 /* Fill out the OS statistics structure */
7274c20f
AK		 4240 netdev->stats.multicast = adapter->stats.mprc;
4241 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 4242
4243 /* Rx Errors */
4244
ad68076e
BA		 4245 /*
4246 * RLEC on some newer hardware can be incorrect so build
4247 * our own version based on RUC and ROC
4248 */
7274c20f 4249 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 4250 adapter->stats.crcerrs + adapter->stats.algnerrc +
4251 adapter->stats.ruc + adapter->stats.roc +
4252 adapter->stats.cexterr;
7274c20f 4253 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 4254 adapter->stats.roc;
7274c20f
AK		 4255 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4256 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4257 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 4258
4259 /* Tx Errors */
7274c20f 4260 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 4261 adapter->stats.latecol;
7274c20f
AK		 4262 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4263 netdev->stats.tx_window_errors = adapter->stats.latecol;
4264 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 4265
4266 /* Tx Dropped needs to be maintained elsewhere */
4267
bc7f75fa
AK		 4268 /* Management Stats */
4269 adapter->stats.mgptc += er32(MGTPTC);
4270 adapter->stats.mgprc += er32(MGTPRC);
4271 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 4272}
4273
7c25769f
BA		 4274/**
4275 * e1000_phy_read_status - Update the PHY register status snapshot
4276 * @adapter: board private structure
4277 **/
4278static void e1000_phy_read_status(struct e1000_adapter *adapter)
4279{
4280 struct e1000_hw *hw = &adapter->hw;
4281 struct e1000_phy_regs *phy = &adapter->phy_regs;
7c25769f
BA		 4282
4283 if ((er32(STATUS) & E1000_STATUS_LU) &&
4284 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
90da0669
BA		 4285 int ret_val;
4286
7c25769f
BA		 4287 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4288 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4289 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4290 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4291 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4292 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4293 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4294 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4295 if (ret_val)
44defeb3 4296 e_warn("Error reading PHY register\n");
7c25769f
BA		 4297 } else {
4298 /*
4299 * Do not read PHY registers if link is not up
4300 * Set values to typical power-on defaults
4301 */
4302 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4303 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4304 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4305 BMSR_ERCAP);
4306 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4307 ADVERTISE_ALL | ADVERTISE_CSMA);
4308 phy->lpa = 0;
4309 phy->expansion = EXPANSION_ENABLENPAGE;
4310 phy->ctrl1000 = ADVERTISE_1000FULL;
4311 phy->stat1000 = 0;
4312 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4313 }
7c25769f
BA		 4314}
4315
bc7f75fa
AK		 4316static void e1000_print_link_info(struct e1000_adapter *adapter)
4317{
bc7f75fa
AK		 4318 struct e1000_hw *hw = &adapter->hw;
4319 u32 ctrl = er32(CTRL);
4320
8f12fe86 4321 /* Link status message must follow this format for user tools */
ef456f85
JK		 4322 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4323 adapter->netdev->name,
4324 adapter->link_speed,
4325 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4326 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4327 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4328 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
bc7f75fa
AK		 4329}
4330
0c6bdb30 4331static bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 4332{
4333 struct e1000_hw *hw = &adapter->hw;
3db1cd5c 4334 bool link_active = false;
318a94d6
JK		 4335 s32 ret_val = 0;
4336
4337 /*
4338 * get_link_status is set on LSC (link status) interrupt or
4339 * Rx sequence error interrupt. get_link_status will stay
4340 * false until the check_for_link establishes link
4341 * for copper adapters ONLY
4342 */
4343 switch (hw->phy.media_type) {
4344 case e1000_media_type_copper:
4345 if (hw->mac.get_link_status) {
4346 ret_val = hw->mac.ops.check_for_link(hw);
4347 link_active = !hw->mac.get_link_status;
4348 } else {
3db1cd5c 4349 link_active = true;
318a94d6
JK		 4350 }
4351 break;
4352 case e1000_media_type_fiber:
4353 ret_val = hw->mac.ops.check_for_link(hw);
4354 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4355 break;
4356 case e1000_media_type_internal_serdes:
4357 ret_val = hw->mac.ops.check_for_link(hw);
4358 link_active = adapter->hw.mac.serdes_has_link;
4359 break;
4360 default:
4361 case e1000_media_type_unknown:
4362 break;
4363 }
4364
4365 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4366 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4367 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 4368 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 4369 }
4370
4371 return link_active;
4372}
4373
4374static void e1000e_enable_receives(struct e1000_adapter *adapter)
4375{
4376 /* make sure the receive unit is started */
4377 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4378 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4379 struct e1000_hw *hw = &adapter->hw;
4380 u32 rctl = er32(RCTL);
4381 ew32(RCTL, rctl | E1000_RCTL_EN);
4382 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4383 }
4384}
4385
ff10e13c
CW		 4386static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4387{
4388 struct e1000_hw *hw = &adapter->hw;
4389
4390 /*
4391 * With 82574 controllers, PHY needs to be checked periodically
4392 * for hung state and reset, if two calls return true
4393 */
4394 if (e1000_check_phy_82574(hw))
4395 adapter->phy_hang_count++;
4396 else
4397 adapter->phy_hang_count = 0;
4398
4399 if (adapter->phy_hang_count > 1) {
4400 adapter->phy_hang_count = 0;
4401 schedule_work(&adapter->reset_task);
4402 }
4403}
4404
bc7f75fa
AK		 4405/**
4406 * e1000_watchdog - Timer Call-back
4407 * @data: pointer to adapter cast into an unsigned long
4408 **/
4409static void e1000_watchdog(unsigned long data)
4410{
4411 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4412
4413 /* Do the rest outside of interrupt context */
4414 schedule_work(&adapter->watchdog_task);
4415
4416 /* TODO: make this use queue_delayed_work() */
4417}
4418
4419static void e1000_watchdog_task(struct work_struct *work)
4420{
4421 struct e1000_adapter *adapter = container_of(work,
4422 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 4423 struct net_device *netdev = adapter->netdev;
4424 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 4425 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 4426 struct e1000_ring *tx_ring = adapter->tx_ring;
4427 struct e1000_hw *hw = &adapter->hw;
4428 u32 link, tctl;
bc7f75fa 4429
615b32af
JB		 4430 if (test_bit(__E1000_DOWN, &adapter->state))
4431 return;
4432
b405e8df 4433 link = e1000e_has_link(adapter);
318a94d6 4434 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 4435 /* Cancel scheduled suspend requests. */
4436 pm_runtime_resume(netdev->dev.parent);
4437
318a94d6 4438 e1000e_enable_receives(adapter);
bc7f75fa 4439 goto link_up;
bc7f75fa
AK		 4440 }
4441
4442 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4443 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4444 e1000_update_mng_vlan(adapter);
4445
bc7f75fa
AK		 4446 if (link) {
4447 if (!netif_carrier_ok(netdev)) {
3db1cd5c 4448 bool txb2b = true;
23606cf5
RW		 4449
4450 /* Cancel scheduled suspend requests. */
4451 pm_runtime_resume(netdev->dev.parent);
4452
318a94d6 4453 /* update snapshot of PHY registers on LSC */
7c25769f 4454 e1000_phy_read_status(adapter);
bc7f75fa
AK		 4455 mac->ops.get_link_up_info(&adapter->hw,
4456 &adapter->link_speed,
4457 &adapter->link_duplex);
4458 e1000_print_link_info(adapter);
f4187b56
BA		 4459 /*
4460 * On supported PHYs, check for duplex mismatch only
4461 * if link has autonegotiated at 10/100 half
4462 */
4463 if ((hw->phy.type == e1000_phy_igp_3 ||
4464 hw->phy.type == e1000_phy_bm) &&
4465 (hw->mac.autoneg == true) &&
4466 (adapter->link_speed == SPEED_10 ||
4467 adapter->link_speed == SPEED_100) &&
4468 (adapter->link_duplex == HALF_DUPLEX)) {
4469 u16 autoneg_exp;
4470
4471 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4472
4473 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
ef456f85 4474 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
f4187b56
BA		 4475 }
4476
f49c57e1 4477 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK		 4478 adapter->tx_timeout_factor = 1;
4479 switch (adapter->link_speed) {
4480 case SPEED_10:
3db1cd5c 4481 txb2b = false;
10f1b492 4482 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 4483 break;
4484 case SPEED_100:
3db1cd5c 4485 txb2b = false;
4c86e0b9 4486 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 4487 break;
4488 }
4489
ad68076e
BA		 4490 /*
4491 * workaround: re-program speed mode bit after
4492 * link-up event
4493 */
bc7f75fa
AK		 4494 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4495 !txb2b) {
4496 u32 tarc0;
e9ec2c0f 4497 tarc0 = er32(TARC(0));
bc7f75fa 4498 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 4499 ew32(TARC(0), tarc0);
bc7f75fa
AK		 4500 }
4501
ad68076e
BA		 4502 /*
4503 * disable TSO for pcie and 10/100 speeds, to avoid
4504 * some hardware issues
4505 */
bc7f75fa
AK		 4506 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4507 switch (adapter->link_speed) {
4508 case SPEED_10:
4509 case SPEED_100:
44defeb3 4510 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 4511 netdev->features &= ~NETIF_F_TSO;
4512 netdev->features &= ~NETIF_F_TSO6;
4513 break;
4514 case SPEED_1000:
4515 netdev->features |= NETIF_F_TSO;
4516 netdev->features |= NETIF_F_TSO6;
4517 break;
4518 default:
4519 /* oops */
4520 break;
4521 }
4522 }
4523
ad68076e
BA		 4524 /*
4525 * enable transmits in the hardware, need to do this
4526 * after setting TARC(0)
4527 */
bc7f75fa
AK		 4528 tctl = er32(TCTL);
4529 tctl |= E1000_TCTL_EN;
4530 ew32(TCTL, tctl);
4531
75eb0fad
BA		 4532 /*
4533 * Perform any post-link-up configuration before
4534 * reporting link up.
4535 */
4536 if (phy->ops.cfg_on_link_up)
4537 phy->ops.cfg_on_link_up(hw);
4538
bc7f75fa 4539 netif_carrier_on(netdev);
bc7f75fa
AK		 4540
4541 if (!test_bit(__E1000_DOWN, &adapter->state))
4542 mod_timer(&adapter->phy_info_timer,
4543 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 4544 }
4545 } else {
4546 if (netif_carrier_ok(netdev)) {
4547 adapter->link_speed = 0;
4548 adapter->link_duplex = 0;
8f12fe86
BA		 4549 /* Link status message must follow this format */
4550 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4551 adapter->netdev->name);
bc7f75fa 4552 netif_carrier_off(netdev);
bc7f75fa
AK		 4553 if (!test_bit(__E1000_DOWN, &adapter->state))
4554 mod_timer(&adapter->phy_info_timer,
4555 round_jiffies(jiffies + 2 * HZ));
4556
4557 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4558 schedule_work(&adapter->reset_task);
23606cf5
RW		 4559 else
4560 pm_schedule_suspend(netdev->dev.parent,
4561 LINK_TIMEOUT);
bc7f75fa
AK		 4562 }
4563 }
4564
4565link_up:
67fd4fcb 4566 spin_lock(&adapter->stats64_lock);
bc7f75fa
AK		 4567 e1000e_update_stats(adapter);
4568
4569 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4570 adapter->tpt_old = adapter->stats.tpt;
4571 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4572 adapter->colc_old = adapter->stats.colc;
4573
7c25769f
BA		 4574 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4575 adapter->gorc_old = adapter->stats.gorc;
4576 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4577 adapter->gotc_old = adapter->stats.gotc;
2084b114 4578 spin_unlock(&adapter->stats64_lock);
bc7f75fa
AK		 4579
4580 e1000e_update_adaptive(&adapter->hw);
4581
90da0669
BA		 4582 if (!netif_carrier_ok(netdev) &&
4583 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4584 /*
4585 * We've lost link, so the controller stops DMA,
4586 * but we've got queued Tx work that's never going
4587 * to get done, so reset controller to flush Tx.
4588 * (Do the reset outside of interrupt context).
4589 */
90da0669
BA		 4590 schedule_work(&adapter->reset_task);
4591 /* return immediately since reset is imminent */
4592 return;
bc7f75fa
AK		 4593 }
4594
eab2abf5
JB		 4595 /* Simple mode for Interrupt Throttle Rate (ITR) */
4596 if (adapter->itr_setting == 4) {
4597 /*
4598 * Symmetric Tx/Rx gets a reduced ITR=2000;
4599 * Total asymmetrical Tx or Rx gets ITR=8000;
4600 * everyone else is between 2000-8000.
4601 */
4602 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4603 u32 dif = (adapter->gotc > adapter->gorc ?
4604 adapter->gotc - adapter->gorc :
4605 adapter->gorc - adapter->gotc) / 10000;
4606 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4607
4608 ew32(ITR, 1000000000 / (itr * 256));
4609 }
4610
ad68076e 4611 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 4612 if (adapter->msix_entries)
4613 ew32(ICS, adapter->rx_ring->ims_val);
4614 else
4615 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa 4616
713b3c9e
JB		 4617 /* flush pending descriptors to memory before detecting Tx hang */
4618 e1000e_flush_descriptors(adapter);
4619
bc7f75fa 4620 /* Force detection of hung controller every watchdog period */
3db1cd5c 4621 adapter->detect_tx_hung = true;
bc7f75fa 4622
ad68076e
BA		 4623 /*
4624 * With 82571 controllers, LAA may be overwritten due to controller
4625 * reset from the other port. Set the appropriate LAA in RAR[0]
4626 */
bc7f75fa 4627 if (e1000e_get_laa_state_82571(hw))
69e1e019 4628 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
bc7f75fa 4629
ff10e13c
CW		 4630 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4631 e1000e_check_82574_phy_workaround(adapter);
4632
bc7f75fa
AK		 4633 /* Reset the timer */
4634 if (!test_bit(__E1000_DOWN, &adapter->state))
4635 mod_timer(&adapter->watchdog_timer,
4636 round_jiffies(jiffies + 2 * HZ));
4637}
4638
4639#define E1000_TX_FLAGS_CSUM 0x00000001
4640#define E1000_TX_FLAGS_VLAN 0x00000002
4641#define E1000_TX_FLAGS_TSO 0x00000004
4642#define E1000_TX_FLAGS_IPV4 0x00000008
943146de 4643#define E1000_TX_FLAGS_NO_FCS 0x00000010
bc7f75fa
AK		 4644#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4645#define E1000_TX_FLAGS_VLAN_SHIFT 16
4646
55aa6985 4647static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
bc7f75fa 4648{
bc7f75fa
AK		 4649 struct e1000_context_desc *context_desc;
4650 struct e1000_buffer *buffer_info;
4651 unsigned int i;
4652 u32 cmd_length = 0;
4653 u16 ipcse = 0, tucse, mss;
4654 u8 ipcss, ipcso, tucss, tucso, hdr_len;
bc7f75fa 4655
3d5e33c9
BA		 4656 if (!skb_is_gso(skb))
4657 return 0;
bc7f75fa 4658
3d5e33c9 4659 if (skb_header_cloned(skb)) {
90da0669
BA		 4660 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4661
3d5e33c9
BA		 4662 if (err)
4663 return err;
bc7f75fa
AK		 4664 }
4665
3d5e33c9
BA		 4666 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4667 mss = skb_shinfo(skb)->gso_size;
4668 if (skb->protocol == htons(ETH_P_IP)) {
4669 struct iphdr *iph = ip_hdr(skb);
4670 iph->tot_len = 0;
4671 iph->check = 0;
4672 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4673 0, IPPROTO_TCP, 0);
4674 cmd_length = E1000_TXD_CMD_IP;
4675 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4676 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 4677 ipv6_hdr(skb)->payload_len = 0;
4678 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4679 &ipv6_hdr(skb)->daddr,
4680 0, IPPROTO_TCP, 0);
4681 ipcse = 0;
4682 }
4683 ipcss = skb_network_offset(skb);
4684 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4685 tucss = skb_transport_offset(skb);
4686 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4687 tucse = 0;
4688
4689 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4690 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4691
4692 i = tx_ring->next_to_use;
4693 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4694 buffer_info = &tx_ring->buffer_info[i];
4695
4696 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4697 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4698 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4699 context_desc->upper_setup.tcp_fields.tucss = tucss;
4700 context_desc->upper_setup.tcp_fields.tucso = tucso;
4701 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4702 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4703 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4704 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4705
4706 buffer_info->time_stamp = jiffies;
4707 buffer_info->next_to_watch = i;
4708
4709 i++;
4710 if (i == tx_ring->count)
4711 i = 0;
4712 tx_ring->next_to_use = i;
4713
4714 return 1;
bc7f75fa
AK		 4715}
4716
55aa6985 4717static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
bc7f75fa 4718{
55aa6985 4719 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa
AK		 4720 struct e1000_context_desc *context_desc;
4721 struct e1000_buffer *buffer_info;
4722 unsigned int i;
4723 u8 css;
af807c82 4724 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4725 __be16 protocol;
bc7f75fa 4726
af807c82
DG		 4727 if (skb->ip_summed != CHECKSUM_PARTIAL)
4728 return 0;
bc7f75fa 4729
5f66f208
AJ		 4730 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4731 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4732 else
4733 protocol = skb->protocol;
4734
3f518390 4735 switch (protocol) {
09640e63 4736 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 4737 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4738 cmd_len |= E1000_TXD_CMD_TCP;
4739 break;
09640e63 4740 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 4741 /* XXX not handling all IPV6 headers */
4742 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4743 cmd_len |= E1000_TXD_CMD_TCP;
4744 break;
4745 default:
4746 if (unlikely(net_ratelimit()))
5f66f208
AJ		 4747 e_warn("checksum_partial proto=%x!\n",
4748 be16_to_cpu(protocol));
af807c82 4749 break;
bc7f75fa
AK		 4750 }
4751
0d0b1672 4752 css = skb_checksum_start_offset(skb);
af807c82
DG		 4753
4754 i = tx_ring->next_to_use;
4755 buffer_info = &tx_ring->buffer_info[i];
4756 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4757
4758 context_desc->lower_setup.ip_config = 0;
4759 context_desc->upper_setup.tcp_fields.tucss = css;
4760 context_desc->upper_setup.tcp_fields.tucso =
4761 css + skb->csum_offset;
4762 context_desc->upper_setup.tcp_fields.tucse = 0;
4763 context_desc->tcp_seg_setup.data = 0;
4764 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4765
4766 buffer_info->time_stamp = jiffies;
4767 buffer_info->next_to_watch = i;
4768
4769 i++;
4770 if (i == tx_ring->count)
4771 i = 0;
4772 tx_ring->next_to_use = i;
4773
4774 return 1;
bc7f75fa
AK		 4775}
4776
4777#define E1000_MAX_PER_TXD 8192
4778#define E1000_MAX_TXD_PWR 12
4779
55aa6985
BA		 4780static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
4781 unsigned int first, unsigned int max_per_txd,
4782 unsigned int nr_frags, unsigned int mss)
bc7f75fa 4783{
55aa6985 4784 struct e1000_adapter *adapter = tx_ring->adapter;
03b1320d 4785 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4786 struct e1000_buffer *buffer_info;
8ddc951c 4787 unsigned int len = skb_headlen(skb);
03b1320d 4788 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4789 unsigned int f, bytecount, segs;
bc7f75fa
AK		 4790
4791 i = tx_ring->next_to_use;
4792
4793 while (len) {
1b7719c4 4794 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 4795 size = min(len, max_per_txd);
4796
bc7f75fa 4797 buffer_info->length = size;
bc7f75fa 4798 buffer_info->time_stamp = jiffies;
bc7f75fa 4799 buffer_info->next_to_watch = i;
0be3f55f
NN		 4800 buffer_info->dma = dma_map_single(&pdev->dev,
4801 skb->data + offset,
af667a29 4802 size, DMA_TO_DEVICE);
03b1320d 4803 buffer_info->mapped_as_page = false;
0be3f55f 4804 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4805 goto dma_error;
bc7f75fa
AK		 4806
4807 len -= size;
4808 offset += size;
03b1320d 4809 count++;
1b7719c4
AD		 4810
4811 if (len) {
4812 i++;
4813 if (i == tx_ring->count)
4814 i = 0;
4815 }
bc7f75fa
AK		 4816 }
4817
4818 for (f = 0; f < nr_frags; f++) {
9e903e08 4819 const struct skb_frag_struct *frag;
bc7f75fa
AK		 4820
4821 frag = &skb_shinfo(skb)->frags[f];
9e903e08 4822 len = skb_frag_size(frag);
877749bf 4823 offset = 0;
bc7f75fa
AK		 4824
4825 while (len) {
1b7719c4
AD		 4826 i++;
4827 if (i == tx_ring->count)
4828 i = 0;
4829
bc7f75fa
AK		 4830 buffer_info = &tx_ring->buffer_info[i];
4831 size = min(len, max_per_txd);
bc7f75fa
AK		 4832
4833 buffer_info->length = size;
4834 buffer_info->time_stamp = jiffies;
bc7f75fa 4835 buffer_info->next_to_watch = i;
877749bf
IC		 4836 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
4837 offset, size, DMA_TO_DEVICE);
03b1320d 4838 buffer_info->mapped_as_page = true;
0be3f55f 4839 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4840 goto dma_error;
bc7f75fa
AK		 4841
4842 len -= size;
4843 offset += size;
4844 count++;
bc7f75fa
AK		 4845 }
4846 }
4847
af667a29 4848 segs = skb_shinfo(skb)->gso_segs ? : 1;
9ed318d5
TH		 4849 /* multiply data chunks by size of headers */
4850 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4851
bc7f75fa 4852 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH		 4853 tx_ring->buffer_info[i].segs = segs;
4854 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK		 4855 tx_ring->buffer_info[first].next_to_watch = i;
4856
4857 return count;
03b1320d
AD		 4858
4859dma_error:
af667a29 4860 dev_err(&pdev->dev, "Tx DMA map failed\n");
03b1320d 4861 buffer_info->dma = 0;
c1fa347f 4862 if (count)
03b1320d 4863 count--;
c1fa347f
RK		 4864
4865 while (count--) {
af667a29 4866 if (i == 0)
03b1320d 4867 i += tx_ring->count;
c1fa347f 4868 i--;
03b1320d 4869 buffer_info = &tx_ring->buffer_info[i];
55aa6985 4870 e1000_put_txbuf(tx_ring, buffer_info);
03b1320d
AD		 4871 }
4872
4873 return 0;
bc7f75fa
AK		 4874}
4875
55aa6985 4876static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
bc7f75fa 4877{
55aa6985 4878 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa
AK		 4879 struct e1000_tx_desc *tx_desc = NULL;
4880 struct e1000_buffer *buffer_info;
4881 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4882 unsigned int i;
4883
4884 if (tx_flags & E1000_TX_FLAGS_TSO) {
4885 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4886 E1000_TXD_CMD_TSE;
4887 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4888
4889 if (tx_flags & E1000_TX_FLAGS_IPV4)
4890 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4891 }
4892
4893 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4894 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4895 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4896 }
4897
4898 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4899 txd_lower |= E1000_TXD_CMD_VLE;
4900 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4901 }
4902
943146de
BG		 4903 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4904 txd_lower &= ~(E1000_TXD_CMD_IFCS);
4905
bc7f75fa
AK		 4906 i = tx_ring->next_to_use;
4907
36b973df 4908 do {
bc7f75fa
AK		 4909 buffer_info = &tx_ring->buffer_info[i];
4910 tx_desc = E1000_TX_DESC(*tx_ring, i);
4911 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4912 tx_desc->lower.data =
4913 cpu_to_le32(txd_lower | buffer_info->length);
4914 tx_desc->upper.data = cpu_to_le32(txd_upper);
4915
4916 i++;
4917 if (i == tx_ring->count)
4918 i = 0;
36b973df 4919 } while (--count > 0);
bc7f75fa
AK		 4920
4921 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4922
943146de
BG		 4923 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
4924 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4925 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
4926
ad68076e
BA		 4927 /*
4928 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4929 * know there are new descriptors to fetch. (Only
4930 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4931 * such as IA-64).
4932 */
bc7f75fa
AK		 4933 wmb();
4934
4935 tx_ring->next_to_use = i;
c6e7f51e
BA		 4936
4937 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
55aa6985 4938 e1000e_update_tdt_wa(tx_ring, i);
c6e7f51e 4939 else
c5083cf6 4940 writel(i, tx_ring->tail);
c6e7f51e 4941
ad68076e
BA		 4942 /*
4943 * we need this if more than one processor can write to our tail
4944 * at a time, it synchronizes IO on IA64/Altix systems
4945 */
bc7f75fa
AK		 4946 mmiowb();
4947}
4948
4949#define MINIMUM_DHCP_PACKET_SIZE 282
4950static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4951 struct sk_buff *skb)
4952{
4953 struct e1000_hw *hw = &adapter->hw;
4954 u16 length, offset;
4955
4956 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4957 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4958 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4959 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4960 return 0;
4961 }
4962
4963 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4964 return 0;
4965
4966 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4967 return 0;
4968
4969 {
4970 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4971 struct udphdr *udp;
4972
4973 if (ip->protocol != IPPROTO_UDP)
4974 return 0;
4975
4976 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4977 if (ntohs(udp->dest) != 67)
4978 return 0;
4979
4980 offset = (u8 *)udp + 8 - skb->data;
4981 length = skb->len - offset;
4982 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4983 }
4984
4985 return 0;
4986}
4987
55aa6985 4988static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
bc7f75fa 4989{
55aa6985 4990 struct e1000_adapter *adapter = tx_ring->adapter;
bc7f75fa 4991
55aa6985 4992 netif_stop_queue(adapter->netdev);
ad68076e
BA		 4993 /*
4994 * Herbert's original patch had:
bc7f75fa 4995 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4996 * but since that doesn't exist yet, just open code it.
4997 */
bc7f75fa
AK		 4998 smp_mb();
4999
ad68076e
BA		 5000 /*
5001 * We need to check again in a case another CPU has just
5002 * made room available.
5003 */
55aa6985 5004 if (e1000_desc_unused(tx_ring) < size)
bc7f75fa
AK		 5005 return -EBUSY;
5006
5007 /* A reprieve! */
55aa6985 5008 netif_start_queue(adapter->netdev);
bc7f75fa
AK		 5009 ++adapter->restart_queue;
5010 return 0;
5011}
5012
55aa6985 5013static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
bc7f75fa 5014{
55aa6985 5015 if (e1000_desc_unused(tx_ring) >= size)
bc7f75fa 5016 return 0;
55aa6985 5017 return __e1000_maybe_stop_tx(tx_ring, size);
bc7f75fa
AK		 5018}
5019
0e15df49 5020#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1)
3b29a56d
SH		 5021static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5022 struct net_device *netdev)
bc7f75fa
AK		 5023{
5024 struct e1000_adapter *adapter = netdev_priv(netdev);
5025 struct e1000_ring *tx_ring = adapter->tx_ring;
5026 unsigned int first;
5027 unsigned int max_per_txd = E1000_MAX_PER_TXD;
5028 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
5029 unsigned int tx_flags = 0;
e743d313 5030 unsigned int len = skb_headlen(skb);
4e6c709c
AK		 5031 unsigned int nr_frags;
5032 unsigned int mss;
bc7f75fa
AK		 5033 int count = 0;
5034 int tso;
5035 unsigned int f;
bc7f75fa
AK		 5036
5037 if (test_bit(__E1000_DOWN, &adapter->state)) {
5038 dev_kfree_skb_any(skb);
5039 return NETDEV_TX_OK;
5040 }
5041
5042 if (skb->len <= 0) {
5043 dev_kfree_skb_any(skb);
5044 return NETDEV_TX_OK;
5045 }
5046
5047 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 5048 /*
5049 * The controller does a simple calculation to
bc7f75fa
AK		 5050 * make sure there is enough room in the FIFO before
5051 * initiating the DMA for each buffer. The calc is:
5052 * 4 = ceil(buffer len/mss). To make sure we don't
5053 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 5054 * drops.
5055 */
bc7f75fa
AK		 5056 if (mss) {
5057 u8 hdr_len;
5058 max_per_txd = min(mss << 2, max_per_txd);
5059 max_txd_pwr = fls(max_per_txd) - 1;
5060
ad68076e
BA		 5061 /*
5062 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
5063 * points to just header, pull a few bytes of payload from
5064 * frags into skb->data
5065 */
bc7f75fa 5066 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 5067 /*
5068 * we do this workaround for ES2LAN, but it is un-necessary,
5069 * avoiding it could save a lot of cycles
5070 */
4e6c709c 5071 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 5072 unsigned int pull_size;
5073
a2a5b323 5074 pull_size = min_t(unsigned int, 4, skb->data_len);
bc7f75fa 5075 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 5076 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 5077 dev_kfree_skb_any(skb);
5078 return NETDEV_TX_OK;
5079 }
e743d313 5080 len = skb_headlen(skb);
bc7f75fa
AK		 5081 }
5082 }
5083
5084 /* reserve a descriptor for the offload context */
5085 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5086 count++;
5087 count++;
5088
5089 count += TXD_USE_COUNT(len, max_txd_pwr);
5090
5091 nr_frags = skb_shinfo(skb)->nr_frags;
5092 for (f = 0; f < nr_frags; f++)
9e903e08 5093 count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
bc7f75fa
AK		 5094 max_txd_pwr);
5095
5096 if (adapter->hw.mac.tx_pkt_filtering)
5097 e1000_transfer_dhcp_info(adapter, skb);
5098
ad68076e
BA		 5099 /*
5100 * need: count + 2 desc gap to keep tail from touching
5101 * head, otherwise try next time
5102 */
55aa6985 5103 if (e1000_maybe_stop_tx(tx_ring, count + 2))
bc7f75fa 5104 return NETDEV_TX_BUSY;
bc7f75fa 5105
eab6d18d 5106 if (vlan_tx_tag_present(skb)) {
bc7f75fa
AK		 5107 tx_flags |= E1000_TX_FLAGS_VLAN;
5108 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5109 }
5110
5111 first = tx_ring->next_to_use;
5112
55aa6985 5113 tso = e1000_tso(tx_ring, skb);
bc7f75fa
AK		 5114 if (tso < 0) {
5115 dev_kfree_skb_any(skb);
bc7f75fa
AK		 5116 return NETDEV_TX_OK;
5117 }
5118
5119 if (tso)
5120 tx_flags |= E1000_TX_FLAGS_TSO;
55aa6985 5121 else if (e1000_tx_csum(tx_ring, skb))
bc7f75fa
AK		 5122 tx_flags |= E1000_TX_FLAGS_CSUM;
5123
ad68076e
BA		 5124 /*
5125 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 5126 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 5127 * no longer assume, we must.
5128 */
bc7f75fa
AK		 5129 if (skb->protocol == htons(ETH_P_IP))
5130 tx_flags |= E1000_TX_FLAGS_IPV4;
5131
943146de
BG		 5132 if (unlikely(skb->no_fcs))
5133 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5134
25985edc 5135 /* if count is 0 then mapping error has occurred */
55aa6985 5136 count = e1000_tx_map(tx_ring, skb, first, max_per_txd, nr_frags, mss);
1b7719c4 5137 if (count) {
80be3129
WB		 5138 skb_tx_timestamp(skb);
5139
3f0cfa3b 5140 netdev_sent_queue(netdev, skb->len);
55aa6985 5141 e1000_tx_queue(tx_ring, tx_flags, count);
1b7719c4 5142 /* Make sure there is space in the ring for the next send. */
55aa6985 5143 e1000_maybe_stop_tx(tx_ring, MAX_SKB_FRAGS + 2);
1b7719c4
AD		 5144
5145 } else {
bc7f75fa 5146 dev_kfree_skb_any(skb);
1b7719c4
AD		 5147 tx_ring->buffer_info[first].time_stamp = 0;
5148 tx_ring->next_to_use = first;
bc7f75fa
AK		 5149 }
5150
bc7f75fa
AK		 5151 return NETDEV_TX_OK;
5152}
5153
5154/**
5155 * e1000_tx_timeout - Respond to a Tx Hang
5156 * @netdev: network interface device structure
5157 **/
5158static void e1000_tx_timeout(struct net_device *netdev)
5159{
5160 struct e1000_adapter *adapter = netdev_priv(netdev);
5161
5162 /* Do the reset outside of interrupt context */
5163 adapter->tx_timeout_count++;
5164 schedule_work(&adapter->reset_task);
5165}
5166
5167static void e1000_reset_task(struct work_struct *work)
5168{
5169 struct e1000_adapter *adapter;
5170 adapter = container_of(work, struct e1000_adapter, reset_task);
5171
615b32af
JB		 5172 /* don't run the task if already down */
5173 if (test_bit(__E1000_DOWN, &adapter->state))
5174 return;
5175
affa9dfb
CW		 5176 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5177 (adapter->flags & FLAG_RX_RESTART_NOW))) {
5178 e1000e_dump(adapter);
5179 e_err("Reset adapter\n");
5180 }
bc7f75fa
AK		 5181 e1000e_reinit_locked(adapter);
5182}
5183
5184/**
67fd4fcb 5185 * e1000_get_stats64 - Get System Network Statistics
bc7f75fa 5186 * @netdev: network interface device structure
67fd4fcb 5187 * @stats: rtnl_link_stats64 pointer
bc7f75fa
AK		 5188 *
5189 * Returns the address of the device statistics structure.
bc7f75fa 5190 **/
67fd4fcb
JK		 5191struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5192 struct rtnl_link_stats64 *stats)
bc7f75fa 5193{
67fd4fcb
JK		 5194 struct e1000_adapter *adapter = netdev_priv(netdev);
5195
5196 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5197 spin_lock(&adapter->stats64_lock);
5198 e1000e_update_stats(adapter);
5199 /* Fill out the OS statistics structure */
5200 stats->rx_bytes = adapter->stats.gorc;
5201 stats->rx_packets = adapter->stats.gprc;
5202 stats->tx_bytes = adapter->stats.gotc;
5203 stats->tx_packets = adapter->stats.gptc;
5204 stats->multicast = adapter->stats.mprc;
5205 stats->collisions = adapter->stats.colc;
5206
5207 /* Rx Errors */
5208
5209 /*
5210 * RLEC on some newer hardware can be incorrect so build
5211 * our own version based on RUC and ROC
5212 */
5213 stats->rx_errors = adapter->stats.rxerrc +
5214 adapter->stats.crcerrs + adapter->stats.algnerrc +
5215 adapter->stats.ruc + adapter->stats.roc +
5216 adapter->stats.cexterr;
5217 stats->rx_length_errors = adapter->stats.ruc +
5218 adapter->stats.roc;
5219 stats->rx_crc_errors = adapter->stats.crcerrs;
5220 stats->rx_frame_errors = adapter->stats.algnerrc;
5221 stats->rx_missed_errors = adapter->stats.mpc;
5222
5223 /* Tx Errors */
5224 stats->tx_errors = adapter->stats.ecol +
5225 adapter->stats.latecol;
5226 stats->tx_aborted_errors = adapter->stats.ecol;
5227 stats->tx_window_errors = adapter->stats.latecol;
5228 stats->tx_carrier_errors = adapter->stats.tncrs;
5229
5230 /* Tx Dropped needs to be maintained elsewhere */
5231
5232 spin_unlock(&adapter->stats64_lock);
5233 return stats;
bc7f75fa
AK		 5234}
5235
5236/**
5237 * e1000_change_mtu - Change the Maximum Transfer Unit
5238 * @netdev: network interface device structure
5239 * @new_mtu: new value for maximum frame size
5240 *
5241 * Returns 0 on success, negative on failure
5242 **/
5243static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5244{
5245 struct e1000_adapter *adapter = netdev_priv(netdev);
5246 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5247
2adc55c9 5248 /* Jumbo frame support */
70495a50
BA		 5249 if (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) {
5250 if (!(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5251 e_err("Jumbo Frames not supported.\n");
5252 return -EINVAL;
5253 }
5254
5255 /*
5256 * IP payload checksum (enabled with jumbos/packet-split when
5257 * Rx checksum is enabled) and generation of RSS hash is
5258 * mutually exclusive in the hardware.
5259 */
5260 if ((netdev->features & NETIF_F_RXCSUM) &&
5261 (netdev->features & NETIF_F_RXHASH)) {
5262 e_err("Jumbo frames cannot be enabled when both receive checksum offload and receive hashing are enabled. Disable one of the receive offload features before enabling jumbos.\n");
5263 return -EINVAL;
5264 }
bc7f75fa
AK		 5265 }
5266
2adc55c9
BA		 5267 /* Supported frame sizes */
5268 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5269 (max_frame > adapter->max_hw_frame_size)) {
5270 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 5271 return -EINVAL;
5272 }
5273
a1ce6473
BA		 5274 /* Jumbo frame workaround on 82579 requires CRC be stripped */
5275 if ((adapter->hw.mac.type == e1000_pch2lan) &&
5276 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5277 (new_mtu > ETH_DATA_LEN)) {
ef456f85 5278 e_err("Jumbo Frames not supported on 82579 when CRC stripping is disabled.\n");
a1ce6473
BA		 5279 return -EINVAL;
5280 }
5281
6f461f6c
BA		 5282 /* 82573 Errata 17 */
5283 if (((adapter->hw.mac.type == e1000_82573) ||
5284 (adapter->hw.mac.type == e1000_82574)) &&
5285 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
5286 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
5287 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
5288 }
5289
bc7f75fa 5290 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
1bba4386 5291 usleep_range(1000, 2000);
610c9928 5292 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 5293 adapter->max_frame_size = max_frame;
610c9928
BA		 5294 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5295 netdev->mtu = new_mtu;
bc7f75fa
AK		 5296 if (netif_running(netdev))
5297 e1000e_down(adapter);
5298
ad68076e
BA		 5299 /*
5300 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 5301 * means we reserve 2 more, this pushes us to allocate from the next
5302 * larger slab size.
ad68076e 5303 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 5304 * However with the new *_jumbo_rx* routines, jumbo receives will use
5305 * fragmented skbs
ad68076e 5306 */
bc7f75fa 5307
9926146b 5308 if (max_frame <= 2048)
bc7f75fa
AK		 5309 adapter->rx_buffer_len = 2048;
5310 else
5311 adapter->rx_buffer_len = 4096;
5312
5313 /* adjust allocation if LPE protects us, and we aren't using SBP */
5314 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5315 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5316 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 5317 + ETH_FCS_LEN;
bc7f75fa 5318
bc7f75fa
AK		 5319 if (netif_running(netdev))
5320 e1000e_up(adapter);
5321 else
5322 e1000e_reset(adapter);
5323
5324 clear_bit(__E1000_RESETTING, &adapter->state);
5325
5326 return 0;
5327}
5328
5329static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5330 int cmd)
5331{
5332 struct e1000_adapter *adapter = netdev_priv(netdev);
5333 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 5334
318a94d6 5335 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 5336 return -EOPNOTSUPP;
5337
5338 switch (cmd) {
5339 case SIOCGMIIPHY:
5340 data->phy_id = adapter->hw.phy.addr;
5341 break;
5342 case SIOCGMIIREG:
b16a002e
BA		 5343 e1000_phy_read_status(adapter);
5344
7c25769f
BA		 5345 switch (data->reg_num & 0x1F) {
5346 case MII_BMCR:
5347 data->val_out = adapter->phy_regs.bmcr;
5348 break;
5349 case MII_BMSR:
5350 data->val_out = adapter->phy_regs.bmsr;
5351 break;
5352 case MII_PHYSID1:
5353 data->val_out = (adapter->hw.phy.id >> 16);
5354 break;
5355 case MII_PHYSID2:
5356 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5357 break;
5358 case MII_ADVERTISE:
5359 data->val_out = adapter->phy_regs.advertise;
5360 break;
5361 case MII_LPA:
5362 data->val_out = adapter->phy_regs.lpa;
5363 break;
5364 case MII_EXPANSION:
5365 data->val_out = adapter->phy_regs.expansion;
5366 break;
5367 case MII_CTRL1000:
5368 data->val_out = adapter->phy_regs.ctrl1000;
5369 break;
5370 case MII_STAT1000:
5371 data->val_out = adapter->phy_regs.stat1000;
5372 break;
5373 case MII_ESTATUS:
5374 data->val_out = adapter->phy_regs.estatus;
5375 break;
5376 default:
bc7f75fa
AK		 5377 return -EIO;
5378 }
bc7f75fa
AK		 5379 break;
5380 case SIOCSMIIREG:
5381 default:
5382 return -EOPNOTSUPP;
5383 }
5384 return 0;
5385}
5386
5387static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5388{
5389 switch (cmd) {
5390 case SIOCGMIIPHY:
5391 case SIOCGMIIREG:
5392 case SIOCSMIIREG:
5393 return e1000_mii_ioctl(netdev, ifr, cmd);
5394 default:
5395 return -EOPNOTSUPP;
5396 }
5397}
5398
a4f58f54
BA		 5399static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5400{
5401 struct e1000_hw *hw = &adapter->hw;
5402 u32 i, mac_reg;
2b6b168d 5403 u16 phy_reg, wuc_enable;
a4f58f54
BA		 5404 int retval = 0;
5405
5406 /* copy MAC RARs to PHY RARs */
d3738bb8 5407 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
a4f58f54 5408
2b6b168d
BA		 5409 retval = hw->phy.ops.acquire(hw);
5410 if (retval) {
5411 e_err("Could not acquire PHY\n");
5412 return retval;
5413 }
5414
5415 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5416 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5417 if (retval)
75ce1532 5418 goto release;
2b6b168d
BA		 5419
5420 /* copy MAC MTA to PHY MTA - only needed for pchlan */
a4f58f54
BA		 5421 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5422 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
2b6b168d
BA		 5423 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5424 (u16)(mac_reg & 0xFFFF));
5425 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5426 (u16)((mac_reg >> 16) & 0xFFFF));
a4f58f54
BA		 5427 }
5428
5429 /* configure PHY Rx Control register */
2b6b168d 5430 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
a4f58f54
BA		 5431 mac_reg = er32(RCTL);
5432 if (mac_reg & E1000_RCTL_UPE)
5433 phy_reg |= BM_RCTL_UPE;
5434 if (mac_reg & E1000_RCTL_MPE)
5435 phy_reg |= BM_RCTL_MPE;
5436 phy_reg &= ~(BM_RCTL_MO_MASK);
5437 if (mac_reg & E1000_RCTL_MO_3)
5438 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5439 << BM_RCTL_MO_SHIFT);
5440 if (mac_reg & E1000_RCTL_BAM)
5441 phy_reg |= BM_RCTL_BAM;
5442 if (mac_reg & E1000_RCTL_PMCF)
5443 phy_reg |= BM_RCTL_PMCF;
5444 mac_reg = er32(CTRL);
5445 if (mac_reg & E1000_CTRL_RFCE)
5446 phy_reg |= BM_RCTL_RFCE;
2b6b168d 5447 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
a4f58f54
BA		 5448
5449 /* enable PHY wakeup in MAC register */
5450 ew32(WUFC, wufc);
5451 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5452
5453 /* configure and enable PHY wakeup in PHY registers */
2b6b168d
BA		 5454 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5455 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
a4f58f54
BA		 5456
5457 /* activate PHY wakeup */
2b6b168d
BA		 5458 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5459 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
a4f58f54
BA		 5460 if (retval)
5461 e_err("Could not set PHY Host Wakeup bit\n");
75ce1532 5462release:
94d8186a 5463 hw->phy.ops.release(hw);
a4f58f54
BA		 5464
5465 return retval;
5466}
5467
23606cf5
RW		 5468static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5469 bool runtime)
bc7f75fa
AK		 5470{
5471 struct net_device *netdev = pci_get_drvdata(pdev);
5472 struct e1000_adapter *adapter = netdev_priv(netdev);
5473 struct e1000_hw *hw = &adapter->hw;
5474 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 5475 /* Runtime suspend should only enable wakeup for link changes */
5476 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 5477 int retval = 0;
5478
5479 netif_device_detach(netdev);
5480
5481 if (netif_running(netdev)) {
bb9e44d0
BA		 5482 int count = E1000_CHECK_RESET_COUNT;
5483
5484 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5485 usleep_range(10000, 20000);
5486
bc7f75fa
AK		 5487 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5488 e1000e_down(adapter);
5489 e1000_free_irq(adapter);
5490 }
4662e82b 5491 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5492
5493 retval = pci_save_state(pdev);
5494 if (retval)
5495 return retval;
5496
5497 status = er32(STATUS);
5498 if (status & E1000_STATUS_LU)
5499 wufc &= ~E1000_WUFC_LNKC;
5500
5501 if (wufc) {
5502 e1000_setup_rctl(adapter);
ef9b965a 5503 e1000e_set_rx_mode(netdev);
bc7f75fa
AK		 5504
5505 /* turn on all-multi mode if wake on multicast is enabled */
5506 if (wufc & E1000_WUFC_MC) {
5507 rctl = er32(RCTL);
5508 rctl |= E1000_RCTL_MPE;
5509 ew32(RCTL, rctl);
5510 }
5511
5512 ctrl = er32(CTRL);
5513 /* advertise wake from D3Cold */
5514 #define E1000_CTRL_ADVD3WUC 0x00100000
5515 /* phy power management enable */
5516 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 5517 ctrl |= E1000_CTRL_ADVD3WUC;
5518 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5519 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 5520 ew32(CTRL, ctrl);
5521
318a94d6
JK		 5522 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5523 adapter->hw.phy.media_type ==
5524 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 5525 /* keep the laser running in D3 */
5526 ctrl_ext = er32(CTRL_EXT);
93a23f48 5527 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 5528 ew32(CTRL_EXT, ctrl_ext);
5529 }
5530
97ac8cae 5531 if (adapter->flags & FLAG_IS_ICH)
99730e4c 5532 e1000_suspend_workarounds_ich8lan(&adapter->hw);
97ac8cae 5533
bc7f75fa
AK		 5534 /* Allow time for pending master requests to run */
5535 e1000e_disable_pcie_master(&adapter->hw);
5536
82776a4b 5537 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 5538 /* enable wakeup by the PHY */
5539 retval = e1000_init_phy_wakeup(adapter, wufc);
5540 if (retval)
5541 return retval;
5542 } else {
5543 /* enable wakeup by the MAC */
5544 ew32(WUFC, wufc);
5545 ew32(WUC, E1000_WUC_PME_EN);
5546 }
bc7f75fa
AK		 5547 } else {
5548 ew32(WUC, 0);
5549 ew32(WUFC, 0);
bc7f75fa
AK		 5550 }
5551
4f9de721
RW		 5552 *enable_wake = !!wufc;
5553
bc7f75fa 5554 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 5555 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5556 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 5557 *enable_wake = true;
bc7f75fa
AK		 5558
5559 if (adapter->hw.phy.type == e1000_phy_igp_3)
5560 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5561
ad68076e
BA		 5562 /*
5563 * Release control of h/w to f/w. If f/w is AMT enabled, this
5564 * would have already happened in close and is redundant.
5565 */
31dbe5b4 5566 e1000e_release_hw_control(adapter);
bc7f75fa
AK		 5567
5568 pci_disable_device(pdev);
5569
4f9de721
RW		 5570 return 0;
5571}
5572
5573static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5574{
5575 if (sleep && wake) {
5576 pci_prepare_to_sleep(pdev);
5577 return;
5578 }
5579
5580 pci_wake_from_d3(pdev, wake);
5581 pci_set_power_state(pdev, PCI_D3hot);
5582}
5583
5584static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5585 bool wake)
5586{
5587 struct net_device *netdev = pci_get_drvdata(pdev);
5588 struct e1000_adapter *adapter = netdev_priv(netdev);
5589
005cbdfc
AD		 5590 /*
5591 * The pci-e switch on some quad port adapters will report a
5592 * correctable error when the MAC transitions from D0 to D3. To
5593 * prevent this we need to mask off the correctable errors on the
5594 * downstream port of the pci-e switch.
5595 */
5596 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5597 struct pci_dev *us_dev = pdev->bus->self;
353064de 5598 int pos = pci_pcie_cap(us_dev);
005cbdfc
AD		 5599 u16 devctl;
5600
5601 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5602 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5603 (devctl & ~PCI_EXP_DEVCTL_CERE));
5604
4f9de721 5605 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 5606
5607 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5608 } else {
4f9de721 5609 e1000_power_off(pdev, sleep, wake);
005cbdfc 5610 }
bc7f75fa
AK		 5611}
5612
6f461f6c
BA		 5613#ifdef CONFIG_PCIEASPM
5614static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5615{
9f728f53 5616 pci_disable_link_state_locked(pdev, state);
6f461f6c
BA		 5617}
5618#else
5619static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK		 5620{
5621 int pos;
6f461f6c 5622 u16 reg16;
1eae4eb2
AK		 5623
5624 /*
6f461f6c
BA		 5625 * Both device and parent should have the same ASPM setting.
5626 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5627 */
6f461f6c
BA		 5628 pos = pci_pcie_cap(pdev);
5629 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5630 reg16 &= ~state;
5631 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5632
0c75ba22
AB		 5633 if (!pdev->bus->self)
5634 return;
5635
6f461f6c
BA		 5636 pos = pci_pcie_cap(pdev->bus->self);
5637 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5638 reg16 &= ~state;
5639 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5640}
5641#endif
78cd29d5 5642static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6f461f6c
BA		 5643{
5644 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5645 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5646 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5647
5648 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK		 5649}
5650
aa338601 5651#ifdef CONFIG_PM
23606cf5 5652static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4f9de721 5653{
23606cf5 5654 return !!adapter->tx_ring->buffer_info;
4f9de721
RW		 5655}
5656
23606cf5 5657static int __e1000_resume(struct pci_dev *pdev)
bc7f75fa
AK		 5658{
5659 struct net_device *netdev = pci_get_drvdata(pdev);
5660 struct e1000_adapter *adapter = netdev_priv(netdev);
5661 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5662 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 5663 u32 err;
5664
78cd29d5
BA		 5665 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5666 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5667 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5668 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5669 if (aspm_disable_flag)
5670 e1000e_disable_aspm(pdev, aspm_disable_flag);
5671
bc7f75fa
AK		 5672 pci_set_power_state(pdev, PCI_D0);
5673 pci_restore_state(pdev);
28b8f04a 5674 pci_save_state(pdev);
6e4f6f6b 5675
4662e82b 5676 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 5677 if (netif_running(netdev)) {
5678 err = e1000_request_irq(adapter);
5679 if (err)
5680 return err;
5681 }
5682
99730e4c
BA		 5683 if (hw->mac.type == e1000_pch2lan)
5684 e1000_resume_workarounds_pchlan(&adapter->hw);
5685
bc7f75fa 5686 e1000e_power_up_phy(adapter);
a4f58f54
BA		 5687
5688 /* report the system wakeup cause from S3/S4 */
5689 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5690 u16 phy_data;
5691
5692 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5693 if (phy_data) {
5694 e_info("PHY Wakeup cause - %s\n",
5695 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5696 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5697 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5698 phy_data & E1000_WUS_MAG ? "Magic Packet" :
ef456f85
JK		 5699 phy_data & E1000_WUS_LNKC ?
5700 "Link Status Change" : "other");
a4f58f54
BA		 5701 }
5702 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5703 } else {
5704 u32 wus = er32(WUS);
5705 if (wus) {
5706 e_info("MAC Wakeup cause - %s\n",
5707 wus & E1000_WUS_EX ? "Unicast Packet" :
5708 wus & E1000_WUS_MC ? "Multicast Packet" :
5709 wus & E1000_WUS_BC ? "Broadcast Packet" :
5710 wus & E1000_WUS_MAG ? "Magic Packet" :
5711 wus & E1000_WUS_LNKC ? "Link Status Change" :
5712 "other");
5713 }
5714 ew32(WUS, ~0);
5715 }
5716
bc7f75fa 5717 e1000e_reset(adapter);
bc7f75fa 5718
cd791618 5719 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5720
5721 if (netif_running(netdev))
5722 e1000e_up(adapter);
5723
5724 netif_device_attach(netdev);
5725
ad68076e
BA		 5726 /*
5727 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5728 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5729 * under the control of the driver.
5730 */
c43bc57e 5731 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5732 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5733
5734 return 0;
5735}
23606cf5 5736
a0340162
RW		 5737#ifdef CONFIG_PM_SLEEP
5738static int e1000_suspend(struct device *dev)
5739{
5740 struct pci_dev *pdev = to_pci_dev(dev);
5741 int retval;
5742 bool wake;
5743
5744 retval = __e1000_shutdown(pdev, &wake, false);
5745 if (!retval)
5746 e1000_complete_shutdown(pdev, true, wake);
5747
5748 return retval;
5749}
5750
23606cf5
RW		 5751static int e1000_resume(struct device *dev)
5752{
5753 struct pci_dev *pdev = to_pci_dev(dev);
5754 struct net_device *netdev = pci_get_drvdata(pdev);
5755 struct e1000_adapter *adapter = netdev_priv(netdev);
5756
5757 if (e1000e_pm_ready(adapter))
5758 adapter->idle_check = true;
5759
5760 return __e1000_resume(pdev);
5761}
a0340162
RW		 5762#endif /* CONFIG_PM_SLEEP */
5763
5764#ifdef CONFIG_PM_RUNTIME
5765static int e1000_runtime_suspend(struct device *dev)
5766{
5767 struct pci_dev *pdev = to_pci_dev(dev);
5768 struct net_device *netdev = pci_get_drvdata(pdev);
5769 struct e1000_adapter *adapter = netdev_priv(netdev);
5770
5771 if (e1000e_pm_ready(adapter)) {
5772 bool wake;
5773
5774 __e1000_shutdown(pdev, &wake, true);
5775 }
5776
5777 return 0;
5778}
5779
5780static int e1000_idle(struct device *dev)
5781{
5782 struct pci_dev *pdev = to_pci_dev(dev);
5783 struct net_device *netdev = pci_get_drvdata(pdev);
5784 struct e1000_adapter *adapter = netdev_priv(netdev);
5785
5786 if (!e1000e_pm_ready(adapter))
5787 return 0;
5788
5789 if (adapter->idle_check) {
5790 adapter->idle_check = false;
5791 if (!e1000e_has_link(adapter))
5792 pm_schedule_suspend(dev, MSEC_PER_SEC);
5793 }
5794
5795 return -EBUSY;
5796}
23606cf5
RW		 5797
5798static int e1000_runtime_resume(struct device *dev)
5799{
5800 struct pci_dev *pdev = to_pci_dev(dev);
5801 struct net_device *netdev = pci_get_drvdata(pdev);
5802 struct e1000_adapter *adapter = netdev_priv(netdev);
5803
5804 if (!e1000e_pm_ready(adapter))
5805 return 0;
5806
5807 adapter->idle_check = !dev->power.runtime_auto;
5808 return __e1000_resume(pdev);
5809}
a0340162 5810#endif /* CONFIG_PM_RUNTIME */
aa338601 5811#endif /* CONFIG_PM */
bc7f75fa
AK		 5812
5813static void e1000_shutdown(struct pci_dev *pdev)
5814{
4f9de721
RW		 5815 bool wake = false;
5816
23606cf5 5817 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 5818
5819 if (system_state == SYSTEM_POWER_OFF)
5820 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 5821}
5822
5823#ifdef CONFIG_NET_POLL_CONTROLLER
147b2c8c
DD		 5824
5825static irqreturn_t e1000_intr_msix(int irq, void *data)
5826{
5827 struct net_device *netdev = data;
5828 struct e1000_adapter *adapter = netdev_priv(netdev);
147b2c8c
DD		 5829
5830 if (adapter->msix_entries) {
90da0669
BA		 5831 int vector, msix_irq;
5832
147b2c8c
DD		 5833 vector = 0;
5834 msix_irq = adapter->msix_entries[vector].vector;
5835 disable_irq(msix_irq);
5836 e1000_intr_msix_rx(msix_irq, netdev);
5837 enable_irq(msix_irq);
5838
5839 vector++;
5840 msix_irq = adapter->msix_entries[vector].vector;
5841 disable_irq(msix_irq);
5842 e1000_intr_msix_tx(msix_irq, netdev);
5843 enable_irq(msix_irq);
5844
5845 vector++;
5846 msix_irq = adapter->msix_entries[vector].vector;
5847 disable_irq(msix_irq);
5848 e1000_msix_other(msix_irq, netdev);
5849 enable_irq(msix_irq);
5850 }
5851
5852 return IRQ_HANDLED;
5853}
5854
bc7f75fa
AK		 5855/*
5856 * Polling 'interrupt' - used by things like netconsole to send skbs
5857 * without having to re-enable interrupts. It's not called while
5858 * the interrupt routine is executing.
5859 */
5860static void e1000_netpoll(struct net_device *netdev)
5861{
5862 struct e1000_adapter *adapter = netdev_priv(netdev);
5863
147b2c8c
DD		 5864 switch (adapter->int_mode) {
5865 case E1000E_INT_MODE_MSIX:
5866 e1000_intr_msix(adapter->pdev->irq, netdev);
5867 break;
5868 case E1000E_INT_MODE_MSI:
5869 disable_irq(adapter->pdev->irq);
5870 e1000_intr_msi(adapter->pdev->irq, netdev);
5871 enable_irq(adapter->pdev->irq);
5872 break;
5873 default: /* E1000E_INT_MODE_LEGACY */
5874 disable_irq(adapter->pdev->irq);
5875 e1000_intr(adapter->pdev->irq, netdev);
5876 enable_irq(adapter->pdev->irq);
5877 break;
5878 }
bc7f75fa
AK		 5879}
5880#endif
5881
5882/**
5883 * e1000_io_error_detected - called when PCI error is detected
5884 * @pdev: Pointer to PCI device
5885 * @state: The current pci connection state
5886 *
5887 * This function is called after a PCI bus error affecting
5888 * this device has been detected.
5889 */
5890static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5891 pci_channel_state_t state)
5892{
5893 struct net_device *netdev = pci_get_drvdata(pdev);
5894 struct e1000_adapter *adapter = netdev_priv(netdev);
5895
5896 netif_device_detach(netdev);
5897
c93b5a76
MM		 5898 if (state == pci_channel_io_perm_failure)
5899 return PCI_ERS_RESULT_DISCONNECT;
5900
bc7f75fa
AK		 5901 if (netif_running(netdev))
5902 e1000e_down(adapter);
5903 pci_disable_device(pdev);
5904
5905 /* Request a slot slot reset. */
5906 return PCI_ERS_RESULT_NEED_RESET;
5907}
5908
5909/**
5910 * e1000_io_slot_reset - called after the pci bus has been reset.
5911 * @pdev: Pointer to PCI device
5912 *
5913 * Restart the card from scratch, as if from a cold-boot. Implementation
5914 * resembles the first-half of the e1000_resume routine.
5915 */
5916static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5917{
5918 struct net_device *netdev = pci_get_drvdata(pdev);
5919 struct e1000_adapter *adapter = netdev_priv(netdev);
5920 struct e1000_hw *hw = &adapter->hw;
78cd29d5 5921 u16 aspm_disable_flag = 0;
6e4f6f6b 5922 int err;
111b9dc5 5923 pci_ers_result_t result;
bc7f75fa 5924
78cd29d5
BA		 5925 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5926 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 5927 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 5928 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5929 if (aspm_disable_flag)
5930 e1000e_disable_aspm(pdev, aspm_disable_flag);
5931
f0f422e5 5932 err = pci_enable_device_mem(pdev);
6e4f6f6b 5933 if (err) {
bc7f75fa
AK		 5934 dev_err(&pdev->dev,
5935 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 5936 result = PCI_ERS_RESULT_DISCONNECT;
5937 } else {
5938 pci_set_master(pdev);
23606cf5 5939 pdev->state_saved = true;
111b9dc5 5940 pci_restore_state(pdev);
bc7f75fa 5941
111b9dc5
JB		 5942 pci_enable_wake(pdev, PCI_D3hot, 0);
5943 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5944
111b9dc5
JB		 5945 e1000e_reset(adapter);
5946 ew32(WUS, ~0);
5947 result = PCI_ERS_RESULT_RECOVERED;
5948 }
bc7f75fa 5949
111b9dc5
JB		 5950 pci_cleanup_aer_uncorrect_error_status(pdev);
5951
5952 return result;
bc7f75fa
AK		 5953}
5954
5955/**
5956 * e1000_io_resume - called when traffic can start flowing again.
5957 * @pdev: Pointer to PCI device
5958 *
5959 * This callback is called when the error recovery driver tells us that
5960 * its OK to resume normal operation. Implementation resembles the
5961 * second-half of the e1000_resume routine.
5962 */
5963static void e1000_io_resume(struct pci_dev *pdev)
5964{
5965 struct net_device *netdev = pci_get_drvdata(pdev);
5966 struct e1000_adapter *adapter = netdev_priv(netdev);
5967
cd791618 5968 e1000_init_manageability_pt(adapter);
bc7f75fa
AK		 5969
5970 if (netif_running(netdev)) {
5971 if (e1000e_up(adapter)) {
5972 dev_err(&pdev->dev,
5973 "can't bring device back up after reset\n");
5974 return;
5975 }
5976 }
5977
5978 netif_device_attach(netdev);
5979
ad68076e
BA		 5980 /*
5981 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5982 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5983 * under the control of the driver.
5984 */
c43bc57e 5985 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 5986 e1000e_get_hw_control(adapter);
bc7f75fa
AK		 5987
5988}
5989
5990static void e1000_print_device_info(struct e1000_adapter *adapter)
5991{
5992 struct e1000_hw *hw = &adapter->hw;
5993 struct net_device *netdev = adapter->netdev;
073287c0
BA		 5994 u32 ret_val;
5995 u8 pba_str[E1000_PBANUM_LENGTH];
bc7f75fa
AK		 5996
5997 /* print bus type/speed/width info */
a5cc7642 5998 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
44defeb3
JK		 5999 /* bus width */
6000 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6001 "Width x1"),
6002 /* MAC address */
7c510e4b 6003 netdev->dev_addr);
44defeb3
JK		 6004 e_info("Intel(R) PRO/%s Network Connection\n",
6005 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
073287c0
BA		 6006 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6007 E1000_PBANUM_LENGTH);
6008 if (ret_val)
f2315bf1 6009 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
073287c0
BA		 6010 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6011 hw->mac.type, hw->phy.type, pba_str);
bc7f75fa
AK		 6012}
6013
10aa4c04
AK		 6014static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6015{
6016 struct e1000_hw *hw = &adapter->hw;
6017 int ret_val;
6018 u16 buf = 0;
6019
6020 if (hw->mac.type != e1000_82573)
6021 return;
6022
6023 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e885d762
BA		 6024 le16_to_cpus(&buf);
6025 if (!ret_val && (!(buf & (1 << 0)))) {
10aa4c04 6026 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 6027 dev_warn(&adapter->pdev->dev,
6028 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 6029 }
10aa4c04
AK		 6030}
6031
c8f44aff 6032static int e1000_set_features(struct net_device *netdev,
70495a50 6033 netdev_features_t features)
dc221294
BA		 6034{
6035 struct e1000_adapter *adapter = netdev_priv(netdev);
c8f44aff 6036 netdev_features_t changed = features ^ netdev->features;
dc221294
BA		 6037
6038 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6039 adapter->flags |= FLAG_TSO_FORCE;
6040
6041 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX |
cf955e6c
BG		 6042 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6043 NETIF_F_RXALL)))
dc221294
BA		 6044 return 0;
6045
70495a50
BA		 6046 /*
6047 * IP payload checksum (enabled with jumbos/packet-split when Rx
6048 * checksum is enabled) and generation of RSS hash is mutually
6049 * exclusive in the hardware.
6050 */
6051 if (adapter->rx_ps_pages &&
6052 (features & NETIF_F_RXCSUM) && (features & NETIF_F_RXHASH)) {
6053 e_err("Enabling both receive checksum offload and receive hashing is not possible with jumbo frames. Disable jumbos or enable only one of the receive offload features.\n");
6054 return -EINVAL;
6055 }
6056
0184039a
BG		 6057 if (changed & NETIF_F_RXFCS) {
6058 if (features & NETIF_F_RXFCS) {
6059 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6060 } else {
6061 /* We need to take it back to defaults, which might mean
6062 * stripping is still disabled at the adapter level.
6063 */
6064 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6065 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6066 else
6067 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6068 }
6069 }
6070
70495a50
BA		 6071 netdev->features = features;
6072
dc221294
BA		 6073 if (netif_running(netdev))
6074 e1000e_reinit_locked(adapter);
6075 else
6076 e1000e_reset(adapter);
6077
6078 return 0;
6079}
6080
651c2466
SH		 6081static const struct net_device_ops e1000e_netdev_ops = {
6082 .ndo_open = e1000_open,
6083 .ndo_stop = e1000_close,
00829823 6084 .ndo_start_xmit = e1000_xmit_frame,
67fd4fcb 6085 .ndo_get_stats64 = e1000e_get_stats64,
ef9b965a 6086 .ndo_set_rx_mode = e1000e_set_rx_mode,
651c2466
SH		 6087 .ndo_set_mac_address = e1000_set_mac,
6088 .ndo_change_mtu = e1000_change_mtu,
6089 .ndo_do_ioctl = e1000_ioctl,
6090 .ndo_tx_timeout = e1000_tx_timeout,
6091 .ndo_validate_addr = eth_validate_addr,
6092
651c2466
SH		 6093 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6094 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6095#ifdef CONFIG_NET_POLL_CONTROLLER
6096 .ndo_poll_controller = e1000_netpoll,
6097#endif
dc221294 6098 .ndo_set_features = e1000_set_features,
651c2466
SH		 6099};
6100
bc7f75fa
AK		 6101/**
6102 * e1000_probe - Device Initialization Routine
6103 * @pdev: PCI device information struct
6104 * @ent: entry in e1000_pci_tbl
6105 *
6106 * Returns 0 on success, negative on failure
6107 *
6108 * e1000_probe initializes an adapter identified by a pci_dev structure.
6109 * The OS initialization, configuring of the adapter private structure,
6110 * and a hardware reset occur.
6111 **/
6112static int __devinit e1000_probe(struct pci_dev *pdev,
6113 const struct pci_device_id *ent)
6114{
6115 struct net_device *netdev;
6116 struct e1000_adapter *adapter;
6117 struct e1000_hw *hw;
6118 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 6119 resource_size_t mmio_start, mmio_len;
6120 resource_size_t flash_start, flash_len;
bc7f75fa 6121 static int cards_found;
78cd29d5 6122 u16 aspm_disable_flag = 0;
bc7f75fa
AK		 6123 int i, err, pci_using_dac;
6124 u16 eeprom_data = 0;
6125 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6126
78cd29d5
BA		 6127 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6128 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6f461f6c 6129 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
78cd29d5
BA		 6130 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6131 if (aspm_disable_flag)
6132 e1000e_disable_aspm(pdev, aspm_disable_flag);
6e4f6f6b 6133
f0f422e5 6134 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 6135 if (err)
6136 return err;
6137
6138 pci_using_dac = 0;
0be3f55f 6139 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 6140 if (!err) {
0be3f55f 6141 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK		 6142 if (!err)
6143 pci_using_dac = 1;
6144 } else {
0be3f55f 6145 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 6146 if (err) {
0be3f55f
NN		 6147 err = dma_set_coherent_mask(&pdev->dev,
6148 DMA_BIT_MASK(32));
bc7f75fa 6149 if (err) {
ef456f85 6150 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
bc7f75fa
AK		 6151 goto err_dma;
6152 }
6153 }
6154 }
6155
e8de1481 6156 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 6157 pci_select_bars(pdev, IORESOURCE_MEM),
6158 e1000e_driver_name);
bc7f75fa
AK		 6159 if (err)
6160 goto err_pci_reg;
6161
68eac460 6162 /* AER (Advanced Error Reporting) hooks */
19d5afd4 6163 pci_enable_pcie_error_reporting(pdev);
68eac460 6164
bc7f75fa 6165 pci_set_master(pdev);
438b365a
BA		 6166 /* PCI config space info */
6167 err = pci_save_state(pdev);
6168 if (err)
6169 goto err_alloc_etherdev;
bc7f75fa
AK		 6170
6171 err = -ENOMEM;
6172 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6173 if (!netdev)
6174 goto err_alloc_etherdev;
6175
bc7f75fa
AK		 6176 SET_NETDEV_DEV(netdev, &pdev->dev);
6177
f85e4dfa
TH		 6178 netdev->irq = pdev->irq;
6179
bc7f75fa
AK		 6180 pci_set_drvdata(pdev, netdev);
6181 adapter = netdev_priv(netdev);
6182 hw = &adapter->hw;
6183 adapter->netdev = netdev;
6184 adapter->pdev = pdev;
6185 adapter->ei = ei;
6186 adapter->pba = ei->pba;
6187 adapter->flags = ei->flags;
eb7c3adb 6188 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 6189 adapter->hw.adapter = adapter;
6190 adapter->hw.mac.type = ei->mac;
2adc55c9 6191 adapter->max_hw_frame_size = ei->max_hw_frame_size;
b3f4d599 6192 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
bc7f75fa
AK		 6193
6194 mmio_start = pci_resource_start(pdev, 0);
6195 mmio_len = pci_resource_len(pdev, 0);
6196
6197 err = -EIO;
6198 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6199 if (!adapter->hw.hw_addr)
6200 goto err_ioremap;
6201
6202 if ((adapter->flags & FLAG_HAS_FLASH) &&
6203 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6204 flash_start = pci_resource_start(pdev, 1);
6205 flash_len = pci_resource_len(pdev, 1);
6206 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6207 if (!adapter->hw.flash_address)
6208 goto err_flashmap;
6209 }
6210
6211 /* construct the net_device struct */
651c2466 6212 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 6213 e1000e_set_ethtool_ops(netdev);
bc7f75fa 6214 netdev->watchdog_timeo = 5 * HZ;
c58c8a78 6215 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
f2315bf1 6216 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
bc7f75fa
AK		 6217
6218 netdev->mem_start = mmio_start;
6219 netdev->mem_end = mmio_start + mmio_len;
6220
6221 adapter->bd_number = cards_found++;
6222
4662e82b
BA		 6223 e1000e_check_options(adapter);
6224
bc7f75fa
AK		 6225 /* setup adapter struct */
6226 err = e1000_sw_init(adapter);
6227 if (err)
6228 goto err_sw_init;
6229
bc7f75fa
AK		 6230 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6231 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6232 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6233
69e3fd8c 6234 err = ei->get_variants(adapter);
bc7f75fa
AK		 6235 if (err)
6236 goto err_hw_init;
6237
4a770358
BA		 6238 if ((adapter->flags & FLAG_IS_ICH) &&
6239 (adapter->flags & FLAG_READ_ONLY_NVM))
6240 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6241
bc7f75fa
AK		 6242 hw->mac.ops.get_bus_info(&adapter->hw);
6243
318a94d6 6244 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 6245
6246 /* Copper options */
318a94d6 6247 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 6248 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6249 adapter->hw.phy.disable_polarity_correction = 0;
6250 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6251 }
6252
44abd5c1 6253 if (hw->phy.ops.check_reset_block(hw))
44defeb3 6254 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa 6255
dc221294
BA		 6256 /* Set initial default active device features */
6257 netdev->features = (NETIF_F_SG |
6258 NETIF_F_HW_VLAN_RX |
6259 NETIF_F_HW_VLAN_TX |
6260 NETIF_F_TSO |
6261 NETIF_F_TSO6 |
70495a50 6262 NETIF_F_RXHASH |
dc221294
BA		 6263 NETIF_F_RXCSUM |
6264 NETIF_F_HW_CSUM);
6265
6266 /* Set user-changeable features (subset of all device features) */
6267 netdev->hw_features = netdev->features;
0184039a 6268 netdev->hw_features |= NETIF_F_RXFCS;
943146de 6269 netdev->priv_flags |= IFF_SUPP_NOFCS;
cf955e6c 6270 netdev->hw_features |= NETIF_F_RXALL;
bc7f75fa
AK		 6271
6272 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6273 netdev->features |= NETIF_F_HW_VLAN_FILTER;
6274
dc221294
BA		 6275 netdev->vlan_features |= (NETIF_F_SG |
6276 NETIF_F_TSO |
6277 NETIF_F_TSO6 |
6278 NETIF_F_HW_CSUM);
a5136e23 6279
ef9b965a
JB		 6280 netdev->priv_flags |= IFF_UNICAST_FLT;
6281
7b872a55 6282 if (pci_using_dac) {
bc7f75fa 6283 netdev->features |= NETIF_F_HIGHDMA;
7b872a55
YZ		 6284 netdev->vlan_features |= NETIF_F_HIGHDMA;
6285 }
bc7f75fa 6286
bc7f75fa
AK		 6287 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6288 adapter->flags |= FLAG_MNG_PT_ENABLED;
6289
ad68076e
BA		 6290 /*
6291 * before reading the NVM, reset the controller to
6292 * put the device in a known good starting state
6293 */
bc7f75fa
AK		 6294 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6295
6296 /*
6297 * systems with ASPM and others may see the checksum fail on the first
6298 * attempt. Let's give it a few tries
6299 */
6300 for (i = 0;; i++) {
6301 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6302 break;
6303 if (i == 2) {
44defeb3 6304 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 6305 err = -EIO;
6306 goto err_eeprom;
6307 }
6308 }
6309
10aa4c04
AK		 6310 e1000_eeprom_checks(adapter);
6311
608f8a0d 6312 /* copy the MAC address */
bc7f75fa 6313 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 6314 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 6315
6316 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6317 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6318
6319 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 6320 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 6321 err = -EIO;
6322 goto err_eeprom;
6323 }
6324
6325 init_timer(&adapter->watchdog_timer);
c061b18d 6326 adapter->watchdog_timer.function = e1000_watchdog;
bc7f75fa
AK		 6327 adapter->watchdog_timer.data = (unsigned long) adapter;
6328
6329 init_timer(&adapter->phy_info_timer);
c061b18d 6330 adapter->phy_info_timer.function = e1000_update_phy_info;
bc7f75fa
AK		 6331 adapter->phy_info_timer.data = (unsigned long) adapter;
6332
6333 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6334 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 6335 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6336 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 6337 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 6338
bc7f75fa
AK		 6339 /* Initialize link parameters. User can change them with ethtool */
6340 adapter->hw.mac.autoneg = 1;
3db1cd5c 6341 adapter->fc_autoneg = true;
5c48ef3e
BA		 6342 adapter->hw.fc.requested_mode = e1000_fc_default;
6343 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 6344 adapter->hw.phy.autoneg_advertised = 0x2f;
6345
6346 /* ring size defaults */
6347 adapter->rx_ring->count = 256;
6348 adapter->tx_ring->count = 256;
6349
6350 /*
6351 * Initial Wake on LAN setting - If APM wake is enabled in
6352 * the EEPROM, enable the ACPI Magic Packet filter
6353 */
6354 if (adapter->flags & FLAG_APME_IN_WUC) {
6355 /* APME bit in EEPROM is mapped to WUC.APME */
6356 eeprom_data = er32(WUC);
6357 eeprom_apme_mask = E1000_WUC_APME;
4def99bb
BA		 6358 if ((hw->mac.type > e1000_ich10lan) &&
6359 (eeprom_data & E1000_WUC_PHY_WAKE))
a4f58f54 6360 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 6361 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6362 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6363 (adapter->hw.bus.func == 1))
3d3a1676
BA		 6364 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6365 1, &eeprom_data);
bc7f75fa 6366 else
3d3a1676
BA		 6367 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6368 1, &eeprom_data);
bc7f75fa
AK		 6369 }
6370
6371 /* fetch WoL from EEPROM */
6372 if (eeprom_data & eeprom_apme_mask)
6373 adapter->eeprom_wol |= E1000_WUFC_MAG;
6374
6375 /*
6376 * now that we have the eeprom settings, apply the special cases
6377 * where the eeprom may be wrong or the board simply won't support
6378 * wake on lan on a particular port
6379 */
6380 if (!(adapter->flags & FLAG_HAS_WOL))
6381 adapter->eeprom_wol = 0;
6382
6383 /* initialize the wol settings based on the eeprom settings */
6384 adapter->wol = adapter->eeprom_wol;
6ff68026 6385 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 6386
84527590
BA		 6387 /* save off EEPROM version number */
6388 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6389
bc7f75fa
AK		 6390 /* reset the hardware with the new settings */
6391 e1000e_reset(adapter);
6392
ad68076e
BA		 6393 /*
6394 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 6395 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 6396 * under the control of the driver.
6397 */
c43bc57e 6398 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6399 e1000e_get_hw_control(adapter);
bc7f75fa 6400
f2315bf1 6401 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
bc7f75fa
AK		 6402 err = register_netdev(netdev);
6403 if (err)
6404 goto err_register;
6405
9c563d20
JB		 6406 /* carrier off reporting is important to ethtool even BEFORE open */
6407 netif_carrier_off(netdev);
6408
bc7f75fa
AK		 6409 e1000_print_device_info(adapter);
6410
f3ec4f87
AS		 6411 if (pci_dev_run_wake(pdev))
6412 pm_runtime_put_noidle(&pdev->dev);
23606cf5 6413
bc7f75fa
AK		 6414 return 0;
6415
6416err_register:
c43bc57e 6417 if (!(adapter->flags & FLAG_HAS_AMT))
31dbe5b4 6418 e1000e_release_hw_control(adapter);
bc7f75fa 6419err_eeprom:
44abd5c1 6420 if (!hw->phy.ops.check_reset_block(hw))
bc7f75fa 6421 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 6422err_hw_init:
bc7f75fa
AK		 6423 kfree(adapter->tx_ring);
6424 kfree(adapter->rx_ring);
6425err_sw_init:
c43bc57e
JB		 6426 if (adapter->hw.flash_address)
6427 iounmap(adapter->hw.flash_address);
e82f54ba 6428 e1000e_reset_interrupt_capability(adapter);
c43bc57e 6429err_flashmap:
bc7f75fa
AK		 6430 iounmap(adapter->hw.hw_addr);
6431err_ioremap:
6432 free_netdev(netdev);
6433err_alloc_etherdev:
f0f422e5
BA		 6434 pci_release_selected_regions(pdev,
6435 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6436err_pci_reg:
6437err_dma:
6438 pci_disable_device(pdev);
6439 return err;
6440}
6441
6442/**
6443 * e1000_remove - Device Removal Routine
6444 * @pdev: PCI device information struct
6445 *
6446 * e1000_remove is called by the PCI subsystem to alert the driver
6447 * that it should release a PCI device. The could be caused by a
6448 * Hot-Plug event, or because the driver is going to be removed from
6449 * memory.
6450 **/
6451static void __devexit e1000_remove(struct pci_dev *pdev)
6452{
6453 struct net_device *netdev = pci_get_drvdata(pdev);
6454 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 6455 bool down = test_bit(__E1000_DOWN, &adapter->state);
6456
ad68076e 6457 /*
23f333a2
TH		 6458 * The timers may be rescheduled, so explicitly disable them
6459 * from being rescheduled.
ad68076e 6460 */
23606cf5
RW		 6461 if (!down)
6462 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 6463 del_timer_sync(&adapter->watchdog_timer);
6464 del_timer_sync(&adapter->phy_info_timer);
6465
41cec6f1
BA		 6466 cancel_work_sync(&adapter->reset_task);
6467 cancel_work_sync(&adapter->watchdog_task);
6468 cancel_work_sync(&adapter->downshift_task);
6469 cancel_work_sync(&adapter->update_phy_task);
6470 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa 6471
17f208de
BA		 6472 if (!(netdev->flags & IFF_UP))
6473 e1000_power_down_phy(adapter);
6474
23606cf5
RW		 6475 /* Don't lie to e1000_close() down the road. */
6476 if (!down)
6477 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 6478 unregister_netdev(netdev);
6479
f3ec4f87
AS		 6480 if (pci_dev_run_wake(pdev))
6481 pm_runtime_get_noresume(&pdev->dev);
23606cf5 6482
ad68076e
BA		 6483 /*
6484 * Release control of h/w to f/w. If f/w is AMT enabled, this
6485 * would have already happened in close and is redundant.
6486 */
31dbe5b4 6487 e1000e_release_hw_control(adapter);
bc7f75fa 6488
4662e82b 6489 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 6490 kfree(adapter->tx_ring);
6491 kfree(adapter->rx_ring);
6492
6493 iounmap(adapter->hw.hw_addr);
6494 if (adapter->hw.flash_address)
6495 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 6496 pci_release_selected_regions(pdev,
6497 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 6498
6499 free_netdev(netdev);
6500
111b9dc5 6501 /* AER disable */
19d5afd4 6502 pci_disable_pcie_error_reporting(pdev);
111b9dc5 6503
bc7f75fa
AK		 6504 pci_disable_device(pdev);
6505}
6506
6507/* PCI Error Recovery (ERS) */
6508static struct pci_error_handlers e1000_err_handler = {
6509 .error_detected = e1000_io_error_detected,
6510 .slot_reset = e1000_io_slot_reset,
6511 .resume = e1000_io_resume,
6512};
6513
a3aa1884 6514static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6516 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6519 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 6521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6522 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6523 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 6524
bc7f75fa
AK		 6525 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6526 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6527 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6528 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 6529
bc7f75fa
AK		 6530 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6531 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6532 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 6533
4662e82b 6534 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 6535 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 6536 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 6537
bc7f75fa
AK		 6538 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6539 board_80003es2lan },
6540 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6541 board_80003es2lan },
6542 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6543 board_80003es2lan },
6544 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6545 board_80003es2lan },
ad68076e 6546
bc7f75fa
AK		 6547 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6548 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6549 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6550 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6551 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6552 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6553 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 6554 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 6555
bc7f75fa
AK		 6556 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6557 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6558 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 6561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 6562 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6563 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6564 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6565
6566 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6567 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6568 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 6569
f4187b56
BA		 6570 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6571 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
10df0b91 6572 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
f4187b56 6573
a4f58f54
BA		 6574 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6575 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6576 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6577 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6578
d3738bb8
BA		 6579 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6580 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6581
f36bb6ca 6582 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
bc7f75fa
AK		 6583};
6584MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6585
aa338601 6586#ifdef CONFIG_PM
23606cf5 6587static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 6588 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6589 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6590 e1000_runtime_resume, e1000_idle)
23606cf5 6591};
e50208a0 6592#endif
23606cf5 6593
bc7f75fa
AK		 6594/* PCI Device API Driver */
6595static struct pci_driver e1000_driver = {
6596 .name = e1000e_driver_name,
6597 .id_table = e1000_pci_tbl,
6598 .probe = e1000_probe,
6599 .remove = __devexit_p(e1000_remove),
aa338601 6600#ifdef CONFIG_PM
f36bb6ca
BA		 6601 .driver = {
6602 .pm = &e1000_pm_ops,
6603 },
bc7f75fa
AK		 6604#endif
6605 .shutdown = e1000_shutdown,
6606 .err_handler = &e1000_err_handler
6607};
6608
6609/**
6610 * e1000_init_module - Driver Registration Routine
6611 *
6612 * e1000_init_module is the first routine called when the driver is
6613 * loaded. All it does is register with the PCI subsystem.
6614 **/
6615static int __init e1000_init_module(void)
6616{
6617 int ret;
8544b9f7
BA		 6618 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6619 e1000e_driver_version);
f5e261e6 6620 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n");
bc7f75fa 6621 ret = pci_register_driver(&e1000_driver);
53ec5498 6622
bc7f75fa
AK		 6623 return ret;
6624}
6625module_init(e1000_init_module);
6626
6627/**
6628 * e1000_exit_module - Driver Exit Cleanup Routine
6629 *
6630 * e1000_exit_module is called just before the driver is removed
6631 * from memory.
6632 **/
6633static void __exit e1000_exit_module(void)
6634{
6635 pci_unregister_driver(&e1000_driver);
6636}
6637module_exit(e1000_exit_module);
6638
6639
6640MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6641MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6642MODULE_LICENSE("GPL");
6643MODULE_VERSION(DRV_VERSION);
6644
06c24b91 6645/* netdev.c */
Linux kernel - Deliverables
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