[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k.h

/* Intel Ethernet Switch Host Interface Driver
 * Copyright(c) 2013 - 2014 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * The full GNU General Public License is included in this distribution in
 * the file called "COPYING".
 *
 * Contact Information:
 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 */

#ifndef _FM10K_H_
#define _FM10K_H_

#include <linux/types.h>
#include <linux/etherdevice.h>
#include <linux/rtnetlink.h>
#include <linux/if_vlan.h>
#include <linux/pci.h>

#include "fm10k_pf.h"
#include "fm10k_vf.h"

#define FM10K_MAX_JUMBO_FRAME_SIZE	15358	/* Maximum supported size 15K */

#define MAX_QUEUES	FM10K_MAX_QUEUES_PF

#define FM10K_MIN_RXD		 128
#define FM10K_MAX_RXD		4096
#define FM10K_DEFAULT_RXD	 256

#define FM10K_MIN_TXD		 128
#define FM10K_MAX_TXD		4096
#define FM10K_DEFAULT_TXD	 256
#define FM10K_DEFAULT_TX_WORK	 256

#define FM10K_RXBUFFER_256	  256
#define FM10K_RXBUFFER_16384	16384
#define FM10K_RX_HDR_LEN	FM10K_RXBUFFER_256
#if PAGE_SIZE <= FM10K_RXBUFFER_16384
#define FM10K_RX_BUFSZ		(PAGE_SIZE / 2)
#else
#define FM10K_RX_BUFSZ		FM10K_RXBUFFER_16384
#endif

/* How many Rx Buffers do we bundle into one write to the hardware ? */
#define FM10K_RX_BUFFER_WRITE	16	/* Must be power of 2 */

#define FM10K_MAX_STATIONS	63
struct fm10k_l2_accel {
	int size;
	u16 count;
	u16 dglort;
	struct rcu_head rcu;
	struct net_device *macvlan[0];
};

enum fm10k_ring_state_t {
	__FM10K_TX_DETECT_HANG,
	__FM10K_HANG_CHECK_ARMED,
};

#define check_for_tx_hang(ring) \
	test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
#define set_check_for_tx_hang(ring) \
	set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
#define clear_check_for_tx_hang(ring) \
	clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)

struct fm10k_tx_buffer {
	struct fm10k_tx_desc *next_to_watch;
	struct sk_buff *skb;
	unsigned int bytecount;
	u16 gso_segs;
	u16 tx_flags;
	DEFINE_DMA_UNMAP_ADDR(dma);
	DEFINE_DMA_UNMAP_LEN(len);
};

struct fm10k_rx_buffer {
	dma_addr_t dma;
	struct page *page;
	u32 page_offset;
};

struct fm10k_queue_stats {
	u64 packets;
	u64 bytes;
};

struct fm10k_tx_queue_stats {
	u64 restart_queue;
	u64 csum_err;
	u64 tx_busy;
	u64 tx_done_old;
};

struct fm10k_rx_queue_stats {
	u64 alloc_failed;
	u64 csum_err;
	u64 errors;
};

struct fm10k_ring {
	struct fm10k_q_vector *q_vector;/* backpointer to host q_vector */
	struct net_device *netdev;	/* netdev ring belongs to */
	struct device *dev;		/* device for DMA mapping */
	struct fm10k_l2_accel __rcu *l2_accel;	/* L2 acceleration list */
	void *desc;			/* descriptor ring memory */
	union {
		struct fm10k_tx_buffer *tx_buffer;
		struct fm10k_rx_buffer *rx_buffer;
	};
	u32 __iomem *tail;
	unsigned long state;
	dma_addr_t dma;			/* phys. address of descriptor ring */
	unsigned int size;		/* length in bytes */

	u8 queue_index;			/* needed for queue management */
	u8 reg_idx;			/* holds the special value that gets
					 * the hardware register offset
					 * associated with this ring, which is
					 * different for DCB and RSS modes
					 */
	u8 qos_pc;			/* priority class of queue */
	u16 vid;			/* default vlan ID of queue */
	u16 count;			/* amount of descriptors */

	u16 next_to_alloc;
	u16 next_to_use;
	u16 next_to_clean;

	struct fm10k_queue_stats stats;
	struct u64_stats_sync syncp;
	union {
		/* Tx */
		struct fm10k_tx_queue_stats tx_stats;
		/* Rx */
		struct {
			struct fm10k_rx_queue_stats rx_stats;
			struct sk_buff *skb;
		};
	};
} ____cacheline_internodealigned_in_smp;

struct fm10k_ring_container {
	struct fm10k_ring *ring;	/* pointer to linked list of rings */
	unsigned int total_bytes;	/* total bytes processed this int */
	unsigned int total_packets;	/* total packets processed this int */
	u16 work_limit;			/* total work allowed per interrupt */
	u16 itr;			/* interrupt throttle rate value */
	u8 count;			/* total number of rings in vector */
};

#define FM10K_ITR_MAX		0x0FFF	/* maximum value for ITR */
#define FM10K_ITR_10K		100	/* 100us */
#define FM10K_ITR_20K		50	/* 50us */
#define FM10K_ITR_ADAPTIVE	0x8000	/* adaptive interrupt moderation flag */

#define FM10K_ITR_ENABLE	(FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR)

static inline struct netdev_queue *txring_txq(const struct fm10k_ring *ring)
{
	return &ring->netdev->_tx[ring->queue_index];
}

/* iterator for handling rings in ring container */
#define fm10k_for_each_ring(pos, head) \
	for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)

#define MAX_Q_VECTORS 256
#define MIN_Q_VECTORS	1
enum fm10k_non_q_vectors {
	FM10K_MBX_VECTOR,
#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
	NON_Q_VECTORS_PF
};

#define NON_Q_VECTORS(hw)	(((hw)->mac.type == fm10k_mac_pf) ? \
						NON_Q_VECTORS_PF : \
						NON_Q_VECTORS_VF)
#define MIN_MSIX_COUNT(hw)	(MIN_Q_VECTORS + NON_Q_VECTORS(hw))

struct fm10k_q_vector {
	struct fm10k_intfc *interface;
	u32 __iomem *itr;	/* pointer to ITR register for this vector */
	u16 v_idx;		/* index of q_vector within interface array */
	struct fm10k_ring_container rx, tx;

	struct napi_struct napi;
	char name[IFNAMSIZ + 9];

	struct rcu_head rcu;	/* to avoid race with update stats on free */

	/* for dynamic allocation of rings associated with this q_vector */
	struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
};

enum fm10k_ring_f_enum {
	RING_F_RSS,
	RING_F_QOS,
	RING_F_ARRAY_SIZE  /* must be last in enum set */
};

struct fm10k_ring_feature {
	u16 limit;	/* upper limit on feature indices */
	u16 indices;	/* current value of indices */
	u16 mask;	/* Mask used for feature to ring mapping */
	u16 offset;	/* offset to start of feature */
};

struct fm10k_iov_data {
	unsigned int		num_vfs;
	unsigned int		next_vf_mbx;
	struct rcu_head		rcu;
	struct fm10k_vf_info	vf_info[0];
};

#define fm10k_vxlan_port_for_each(vp, intfc) \
	list_for_each_entry(vp, &(intfc)->vxlan_port, list)
struct fm10k_vxlan_port {
	struct list_head	list;
	sa_family_t		sa_family;
	__be16			port;
};

struct fm10k_intfc {
	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
	struct net_device *netdev;
	struct fm10k_l2_accel *l2_accel; /* pointer to L2 acceleration list */
	struct pci_dev *pdev;
	unsigned long state;

	u32 flags;
#define FM10K_FLAG_RESET_REQUESTED		(u32)(1 << 0)
#define FM10K_FLAG_RSS_FIELD_IPV4_UDP		(u32)(1 << 1)
#define FM10K_FLAG_RSS_FIELD_IPV6_UDP		(u32)(1 << 2)
#define FM10K_FLAG_RX_TS_ENABLED		(u32)(1 << 3)
#define FM10K_FLAG_SWPRI_CONFIG			(u32)(1 << 4)
	int xcast_mode;

	/* Tx fast path data */
	int num_tx_queues;
	u16 tx_itr;

	/* Rx fast path data */
	int num_rx_queues;
	u16 rx_itr;

	/* TX */
	struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;

	u64 restart_queue;
	u64 tx_busy;
	u64 tx_csum_errors;
	u64 alloc_failed;
	u64 rx_csum_errors;
	u64 rx_errors;

	u64 tx_bytes_nic;
	u64 tx_packets_nic;
	u64 rx_bytes_nic;
	u64 rx_packets_nic;
	u64 rx_drops_nic;
	u64 rx_overrun_pf;
	u64 rx_overrun_vf;
	u32 tx_timeout_count;

	/* RX */
	struct fm10k_ring *rx_ring[MAX_QUEUES];

	/* Queueing vectors */
	struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
	struct msix_entry *msix_entries;
	int num_q_vectors;	/* current number of q_vectors for device */
	struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];

	/* SR-IOV information management structure */
	struct fm10k_iov_data *iov_data;

	struct fm10k_hw_stats stats;
	struct fm10k_hw hw;
	u32 __iomem *uc_addr;
	u16 msg_enable;
	u16 tx_ring_count;
	u16 rx_ring_count;
	struct timer_list service_timer;
	struct work_struct service_task;
	unsigned long next_stats_update;
	unsigned long next_tx_hang_check;
	unsigned long last_reset;
	unsigned long link_down_event;
	bool host_ready;

	u32 reta[FM10K_RETA_SIZE];
	u32 rssrk[FM10K_RSSRK_SIZE];

	/* VXLAN port tracking information */
	struct list_head vxlan_port;

#if defined(HAVE_DCBNL_IEEE) && defined(CONFIG_DCB)
	u8 pfc_en;
#endif
	u8 rx_pause;

	/* GLORT resources in use by PF */
	u16 glort;
	u16 glort_count;

	/* VLAN ID for updating multicast/unicast lists */
	u16 vid;
};

enum fm10k_state_t {
	__FM10K_RESETTING,
	__FM10K_DOWN,
	__FM10K_SERVICE_SCHED,
	__FM10K_SERVICE_DISABLE,
	__FM10K_MBX_LOCK,
	__FM10K_LINK_DOWN,
};

static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
{
	/* busy loop if we cannot obtain the lock as some calls
	 * such as ndo_set_rx_mode may be made in atomic context
	 */
	while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
		udelay(20);
}

static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
{
	/* flush memory to make sure state is correct */
	smp_mb__before_atomic();
	clear_bit(__FM10K_MBX_LOCK, &interface->state);
}

static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
{
	return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
}

/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
					const u32 stat_err_bits)
{
	return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
}

/* fm10k_desc_unused - calculate if we have unused descriptors */
static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
{
	s16 unused = ring->next_to_clean - ring->next_to_use - 1;

	return likely(unused < 0) ? unused + ring->count : unused;
}

#define FM10K_TX_DESC(R, i)	\
	(&(((struct fm10k_tx_desc *)((R)->desc))[i]))
#define FM10K_RX_DESC(R, i)	\
	 (&(((union fm10k_rx_desc *)((R)->desc))[i]))

#define FM10K_MAX_TXD_PWR	14
#define FM10K_MAX_DATA_PER_TXD	(1 << FM10K_MAX_TXD_PWR)

/* Tx Descriptors needed, worst case */
#define TXD_USE_COUNT(S)	DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
#define DESC_NEEDED	(MAX_SKB_FRAGS + 4)

enum fm10k_tx_flags {
	/* Tx offload flags */
	FM10K_TX_FLAGS_CSUM	= 0x01,
};

/* This structure is stored as little endian values as that is the native
 * format of the Rx descriptor.  The ordering of these fields is reversed
 * from the actual ftag header to allow for a single bswap to take care
 * of placing all of the values in network order
 */
union fm10k_ftag_info {
	__le64 ftag;
	struct {
		/* dglort and sglort combined into a single 32bit desc read */
		__le32 glort;
		/* upper 16 bits of vlan are reserved 0 for swpri_type_user */
		__le32 vlan;
	} d;
	struct {
		__le16 dglort;
		__le16 sglort;
		__le16 vlan;
		__le16 swpri_type_user;
	} w;
};

struct fm10k_cb {
	union fm10k_ftag_info fi;
};

#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)

/* main */
extern char fm10k_driver_name[];
extern const char fm10k_driver_version[];
int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
				  struct fm10k_ring *tx_ring);
void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);

/* PCI */
void fm10k_mbx_free_irq(struct fm10k_intfc *);
int fm10k_mbx_request_irq(struct fm10k_intfc *);
void fm10k_qv_free_irq(struct fm10k_intfc *interface);
int fm10k_qv_request_irq(struct fm10k_intfc *interface);
int fm10k_register_pci_driver(void);
void fm10k_unregister_pci_driver(void);
void fm10k_up(struct fm10k_intfc *interface);
void fm10k_down(struct fm10k_intfc *interface);
void fm10k_update_stats(struct fm10k_intfc *interface);
void fm10k_service_event_schedule(struct fm10k_intfc *interface);
void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);

/* Netdev */
struct net_device *fm10k_alloc_netdev(void);
int fm10k_setup_rx_resources(struct fm10k_ring *);
int fm10k_setup_tx_resources(struct fm10k_ring *);
void fm10k_free_rx_resources(struct fm10k_ring *);
void fm10k_free_tx_resources(struct fm10k_ring *);
void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
				      struct fm10k_tx_buffer *);
void fm10k_restore_rx_state(struct fm10k_intfc *);
void fm10k_reset_rx_state(struct fm10k_intfc *);
int fm10k_setup_tc(struct net_device *dev, u8 tc);
int fm10k_open(struct net_device *netdev);
int fm10k_close(struct net_device *netdev);

/* Ethtool */
void fm10k_set_ethtool_ops(struct net_device *dev);

/* IOV */
s32 fm10k_iov_event(struct fm10k_intfc *interface);
s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
void fm10k_iov_suspend(struct pci_dev *pdev);
int fm10k_iov_resume(struct pci_dev *pdev);
void fm10k_iov_disable(struct pci_dev *pdev);
int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
int fm10k_ndo_set_vf_mac(struct net_device *netdev, int vf_idx, u8 *mac);
int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
			  int vf_idx, u16 vid, u8 qos);
int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
			int unused);
int fm10k_ndo_get_vf_config(struct net_device *netdev,
			    int vf_idx, struct ifla_vf_info *ivi);
#endif /* _FM10K_H_ */
Commit	Line	Data
b3890e30 AD	1	/* Intel Ethernet Switch Host Interface Driver
	2	* Copyright(c) 2013 - 2014 Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* The full GNU General Public License is included in this distribution in
	14	* the file called "COPYING".
	15	*
	16	* Contact Information:
	17	* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	18	* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	19	*/
	20
	21	#ifndef _FM10K_H_
	22	#define _FM10K_H_
	23
	24	#include <linux/types.h>
	25	#include <linux/etherdevice.h>
	26	#include <linux/rtnetlink.h>
	27	#include <linux/if_vlan.h>
	28	#include <linux/pci.h>
	29
0e7b3644	30	#include "fm10k_pf.h"
5cb8db4a	31	#include "fm10k_vf.h"
0e7b3644 AD	32
	33	#define FM10K_MAX_JUMBO_FRAME_SIZE 15358 /* Maximum supported size 15K */
	34
e27ef599 AD	35	#define MAX_QUEUES FM10K_MAX_QUEUES_PF
	36
	37	#define FM10K_MIN_RXD 128
	38	#define FM10K_MAX_RXD 4096
	39	#define FM10K_DEFAULT_RXD 256
	40
	41	#define FM10K_MIN_TXD 128
	42	#define FM10K_MAX_TXD 4096
	43	#define FM10K_DEFAULT_TXD 256
	44	#define FM10K_DEFAULT_TX_WORK 256
	45
	46	#define FM10K_RXBUFFER_256 256
	47	#define FM10K_RXBUFFER_16384 16384
	48	#define FM10K_RX_HDR_LEN FM10K_RXBUFFER_256
	49	#if PAGE_SIZE <= FM10K_RXBUFFER_16384
	50	#define FM10K_RX_BUFSZ (PAGE_SIZE / 2)
	51	#else
	52	#define FM10K_RX_BUFSZ FM10K_RXBUFFER_16384
	53	#endif
	54
	55	/* How many Rx Buffers do we bundle into one write to the hardware ? */
	56	#define FM10K_RX_BUFFER_WRITE 16 /* Must be power of 2 */
	57
5cd5e2e9 AD	58	#define FM10K_MAX_STATIONS 63
	59	struct fm10k_l2_accel {
	60	int size;
	61	u16 count;
	62	u16 dglort;
	63	struct rcu_head rcu;
	64	struct net_device *macvlan[0];
	65	};
	66
e27ef599 AD	67	enum fm10k_ring_state_t {
	68	__FM10K_TX_DETECT_HANG,
	69	__FM10K_HANG_CHECK_ARMED,
	70	};
	71
	72	#define check_for_tx_hang(ring) \
	73	test_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
	74	#define set_check_for_tx_hang(ring) \
	75	set_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
	76	#define clear_check_for_tx_hang(ring) \
	77	clear_bit(__FM10K_TX_DETECT_HANG, &(ring)->state)
	78
	79	struct fm10k_tx_buffer {
	80	struct fm10k_tx_desc *next_to_watch;
	81	struct sk_buff *skb;
	82	unsigned int bytecount;
	83	u16 gso_segs;
	84	u16 tx_flags;
	85	DEFINE_DMA_UNMAP_ADDR(dma);
	86	DEFINE_DMA_UNMAP_LEN(len);
	87	};
	88
	89	struct fm10k_rx_buffer {
	90	dma_addr_t dma;
	91	struct page *page;
	92	u32 page_offset;
	93	};
	94
	95	struct fm10k_queue_stats {
	96	u64 packets;
	97	u64 bytes;
	98	};
	99
	100	struct fm10k_tx_queue_stats {
	101	u64 restart_queue;
	102	u64 csum_err;
	103	u64 tx_busy;
	104	u64 tx_done_old;
	105	};
	106
	107	struct fm10k_rx_queue_stats {
	108	u64 alloc_failed;
	109	u64 csum_err;
	110	u64 errors;
	111	};
	112
	113	struct fm10k_ring {
	114	struct fm10k_q_vector q_vector;/ backpointer to host q_vector */
	115	struct net_device netdev; / netdev ring belongs to */
	116	struct device dev; / device for DMA mapping */
5cd5e2e9	117	struct fm10k_l2_accel __rcu l2_accel; / L2 acceleration list */
e27ef599 AD	118	void desc; / descriptor ring memory */
	119	union {
	120	struct fm10k_tx_buffer *tx_buffer;
	121	struct fm10k_rx_buffer *rx_buffer;
	122	};
	123	u32 __iomem *tail;
	124	unsigned long state;
	125	dma_addr_t dma; /* phys. address of descriptor ring */
	126	unsigned int size; /* length in bytes */
	127
	128	u8 queue_index; /* needed for queue management */
	129	u8 reg_idx; /* holds the special value that gets
	130	* the hardware register offset
	131	* associated with this ring, which is
	132	* different for DCB and RSS modes
	133	*/
	134	u8 qos_pc; /* priority class of queue */
	135	u16 vid; /* default vlan ID of queue */
	136	u16 count; /* amount of descriptors */
	137
	138	u16 next_to_alloc;
	139	u16 next_to_use;
	140	u16 next_to_clean;
	141
	142	struct fm10k_queue_stats stats;
	143	struct u64_stats_sync syncp;
	144	union {
	145	/* Tx */
	146	struct fm10k_tx_queue_stats tx_stats;
	147	/* Rx */
	148	struct {
	149	struct fm10k_rx_queue_stats rx_stats;
	150	struct sk_buff *skb;
	151	};
	152	};
	153	} ____cacheline_internodealigned_in_smp;
	154
18283cad	155	struct fm10k_ring_container {
e27ef599	156	struct fm10k_ring ring; / pointer to linked list of rings */
18283cad AD	157	unsigned int total_bytes; /* total bytes processed this int */
	158	unsigned int total_packets; /* total packets processed this int */
	159	u16 work_limit; /* total work allowed per interrupt */
	160	u16 itr; /* interrupt throttle rate value */
	161	u8 count; /* total number of rings in vector */
	162	};
	163
	164	#define FM10K_ITR_MAX 0x0FFF /* maximum value for ITR */
	165	#define FM10K_ITR_10K 100 /* 100us */
	166	#define FM10K_ITR_20K 50 /* 50us */
	167	#define FM10K_ITR_ADAPTIVE 0x8000 /* adaptive interrupt moderation flag */
	168
	169	#define FM10K_ITR_ENABLE (FM10K_ITR_AUTOMASK \| FM10K_ITR_MASK_CLEAR)
	170
e27ef599 AD	171	static inline struct netdev_queue txring_txq(const struct fm10k_ring ring)
	172	{
	173	return &ring->netdev->_tx[ring->queue_index];
	174	}
	175
	176	/* iterator for handling rings in ring container */
	177	#define fm10k_for_each_ring(pos, head) \
	178	for (pos = &(head).ring[(head).count]; (--pos) >= (head).ring;)
	179
18283cad AD	180	#define MAX_Q_VECTORS 256
	181	#define MIN_Q_VECTORS 1
	182	enum fm10k_non_q_vectors {
	183	FM10K_MBX_VECTOR,
5cb8db4a	184	#define NON_Q_VECTORS_VF NON_Q_VECTORS_PF
18283cad AD	185	NON_Q_VECTORS_PF
	186	};
	187
	188	#define NON_Q_VECTORS(hw) (((hw)->mac.type == fm10k_mac_pf) ? \
	189	NON_Q_VECTORS_PF : \
5cb8db4a	190	NON_Q_VECTORS_VF)
18283cad AD	191	#define MIN_MSIX_COUNT(hw) (MIN_Q_VECTORS + NON_Q_VECTORS(hw))
	192
	193	struct fm10k_q_vector {
	194	struct fm10k_intfc *interface;
	195	u32 __iomem itr; / pointer to ITR register for this vector */
	196	u16 v_idx; /* index of q_vector within interface array */
	197	struct fm10k_ring_container rx, tx;
	198
	199	struct napi_struct napi;
	200	char name[IFNAMSIZ + 9];
	201
	202	struct rcu_head rcu; /* to avoid race with update stats on free */
e27ef599 AD	203
	204	/* for dynamic allocation of rings associated with this q_vector */
	205	struct fm10k_ring ring[0] ____cacheline_internodealigned_in_smp;
18283cad AD	206	};
18283cad AD	207
0e7b3644 AD	208	enum fm10k_ring_f_enum {
	209	RING_F_RSS,
	210	RING_F_QOS,
	211	RING_F_ARRAY_SIZE /* must be last in enum set */
	212	};
	213
	214	struct fm10k_ring_feature {
	215	u16 limit; /* upper limit on feature indices */
	216	u16 indices; /* current value of indices */
	217	u16 mask; /* Mask used for feature to ring mapping */
	218	u16 offset; /* offset to start of feature */
	219	};
	220
883a9ccb AD	221	struct fm10k_iov_data {
	222	unsigned int num_vfs;
	223	unsigned int next_vf_mbx;
	224	struct rcu_head rcu;
	225	struct fm10k_vf_info vf_info[0];
	226	};
	227
0e7b3644 AD	228	#define fm10k_vxlan_port_for_each(vp, intfc) \
	229	list_for_each_entry(vp, &(intfc)->vxlan_port, list)
	230	struct fm10k_vxlan_port {
	231	struct list_head list;
	232	sa_family_t sa_family;
	233	__be16 port;
	234	};
04a5aefb AD	235
04a5aefb AD	236	struct fm10k_intfc {
0e7b3644 AD	237	unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
0e7b3644 AD	238	struct net_device *netdev;
5cd5e2e9	239	struct fm10k_l2_accel l2_accel; / pointer to L2 acceleration list */
04a5aefb	240	struct pci_dev *pdev;
0e7b3644 AD	241	unsigned long state;
	242
	243	u32 flags;
	244	#define FM10K_FLAG_RESET_REQUESTED (u32)(1 << 0)
	245	#define FM10K_FLAG_RSS_FIELD_IPV4_UDP (u32)(1 << 1)
	246	#define FM10K_FLAG_RSS_FIELD_IPV6_UDP (u32)(1 << 2)
	247	#define FM10K_FLAG_RX_TS_ENABLED (u32)(1 << 3)
	248	#define FM10K_FLAG_SWPRI_CONFIG (u32)(1 << 4)
	249	int xcast_mode;
	250
18283cad AD	251	/* Tx fast path data */
	252	int num_tx_queues;
	253	u16 tx_itr;
	254
	255	/* Rx fast path data */
	256	int num_rx_queues;
	257	u16 rx_itr;
	258
e27ef599 AD	259	/* TX */
	260	struct fm10k_ring *tx_ring[MAX_QUEUES] ____cacheline_aligned_in_smp;
	261
b7d8514c AD	262	u64 restart_queue;
	263	u64 tx_busy;
	264	u64 tx_csum_errors;
	265	u64 alloc_failed;
	266	u64 rx_csum_errors;
	267	u64 rx_errors;
	268
	269	u64 tx_bytes_nic;
	270	u64 tx_packets_nic;
	271	u64 rx_bytes_nic;
	272	u64 rx_packets_nic;
	273	u64 rx_drops_nic;
0e7b3644 AD	274	u64 rx_overrun_pf;
0e7b3644 AD	275	u64 rx_overrun_vf;
b7d8514c	276	u32 tx_timeout_count;
04a5aefb	277
e27ef599 AD	278	/* RX */
	279	struct fm10k_ring *rx_ring[MAX_QUEUES];
	280
18283cad AD	281	/* Queueing vectors */
	282	struct fm10k_q_vector *q_vector[MAX_Q_VECTORS];
	283	struct msix_entry *msix_entries;
	284	int num_q_vectors; /* current number of q_vectors for device */
0e7b3644 AD	285	struct fm10k_ring_feature ring_feature[RING_F_ARRAY_SIZE];
0e7b3644 AD	286
883a9ccb AD	287	/* SR-IOV information management structure */
	288	struct fm10k_iov_data *iov_data;
	289
0e7b3644	290	struct fm10k_hw_stats stats;
04a5aefb AD	291	struct fm10k_hw hw;
04a5aefb AD	292	u32 __iomem *uc_addr;
0e7b3644	293	u16 msg_enable;
18283cad AD	294	u16 tx_ring_count;
18283cad AD	295	u16 rx_ring_count;
b7d8514c AD	296	struct timer_list service_timer;
	297	struct work_struct service_task;
	298	unsigned long next_stats_update;
	299	unsigned long next_tx_hang_check;
	300	unsigned long last_reset;
	301	unsigned long link_down_event;
	302	bool host_ready;
0e7b3644 AD	303
	304	u32 reta[FM10K_RETA_SIZE];
	305	u32 rssrk[FM10K_RSSRK_SIZE];
	306
	307	/* VXLAN port tracking information */
	308	struct list_head vxlan_port;
	309
	310	#if defined(HAVE_DCBNL_IEEE) && defined(CONFIG_DCB)
	311	u8 pfc_en;
	312	#endif
	313	u8 rx_pause;
	314
	315	/* GLORT resources in use by PF */
	316	u16 glort;
	317	u16 glort_count;
	318
	319	/* VLAN ID for updating multicast/unicast lists */
	320	u16 vid;
	321	};
	322
	323	enum fm10k_state_t {
	324	__FM10K_RESETTING,
	325	__FM10K_DOWN,
b7d8514c AD	326	__FM10K_SERVICE_SCHED,
b7d8514c AD	327	__FM10K_SERVICE_DISABLE,
0e7b3644 AD	328	__FM10K_MBX_LOCK,
0e7b3644 AD	329	__FM10K_LINK_DOWN,
04a5aefb	330	};
b3890e30	331
0e7b3644 AD	332	static inline void fm10k_mbx_lock(struct fm10k_intfc *interface)
	333	{
	334	/* busy loop if we cannot obtain the lock as some calls
	335	* such as ndo_set_rx_mode may be made in atomic context
	336	*/
	337	while (test_and_set_bit(__FM10K_MBX_LOCK, &interface->state))
	338	udelay(20);
	339	}
	340
	341	static inline void fm10k_mbx_unlock(struct fm10k_intfc *interface)
	342	{
	343	/* flush memory to make sure state is correct */
	344	smp_mb__before_atomic();
	345	clear_bit(__FM10K_MBX_LOCK, &interface->state);
	346	}
	347
	348	static inline int fm10k_mbx_trylock(struct fm10k_intfc *interface)
	349	{
	350	return !test_and_set_bit(__FM10K_MBX_LOCK, &interface->state);
	351	}
	352
e27ef599 AD	353	/* fm10k_test_staterr - test bits in Rx descriptor status and error fields */
	354	static inline __le32 fm10k_test_staterr(union fm10k_rx_desc *rx_desc,
	355	const u32 stat_err_bits)
	356	{
	357	return rx_desc->d.staterr & cpu_to_le32(stat_err_bits);
	358	}
	359
	360	/* fm10k_desc_unused - calculate if we have unused descriptors */
	361	static inline u16 fm10k_desc_unused(struct fm10k_ring *ring)
	362	{
	363	s16 unused = ring->next_to_clean - ring->next_to_use - 1;
	364
	365	return likely(unused < 0) ? unused + ring->count : unused;
	366	}
	367
	368	#define FM10K_TX_DESC(R, i) \
	369	(&(((struct fm10k_tx_desc *)((R)->desc))[i]))
	370	#define FM10K_RX_DESC(R, i) \
	371	(&(((union fm10k_rx_desc *)((R)->desc))[i]))
	372
	373	#define FM10K_MAX_TXD_PWR 14
	374	#define FM10K_MAX_DATA_PER_TXD (1 << FM10K_MAX_TXD_PWR)
	375
	376	/* Tx Descriptors needed, worst case */
	377	#define TXD_USE_COUNT(S) DIV_ROUND_UP((S), FM10K_MAX_DATA_PER_TXD)
	378	#define DESC_NEEDED (MAX_SKB_FRAGS + 4)
	379
	380	enum fm10k_tx_flags {
	381	/* Tx offload flags */
	382	FM10K_TX_FLAGS_CSUM = 0x01,
	383	};
	384
	385	/* This structure is stored as little endian values as that is the native
	386	* format of the Rx descriptor. The ordering of these fields is reversed
	387	* from the actual ftag header to allow for a single bswap to take care
	388	* of placing all of the values in network order
	389	*/
	390	union fm10k_ftag_info {
	391	__le64 ftag;
	392	struct {
	393	/* dglort and sglort combined into a single 32bit desc read */
	394	__le32 glort;
	395	/* upper 16 bits of vlan are reserved 0 for swpri_type_user */
	396	__le32 vlan;
	397	} d;
	398	struct {
	399	__le16 dglort;
	400	__le16 sglort;
	401	__le16 vlan;
	402	__le16 swpri_type_user;
	403	} w;
	404	};
	405
	406	struct fm10k_cb {
	407	union fm10k_ftag_info fi;
	408	};
	409
	410	#define FM10K_CB(skb) ((struct fm10k_cb *)(skb)->cb)
	411
b3890e30 AD	412	/* main */
	413	extern char fm10k_driver_name[];
	414	extern const char fm10k_driver_version[];
18283cad AD	415	int fm10k_init_queueing_scheme(struct fm10k_intfc *interface);
18283cad AD	416	void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface);
b101c962 AD	417	netdev_tx_t fm10k_xmit_frame_ring(struct sk_buff *skb,
	418	struct fm10k_ring *tx_ring);
	419	void fm10k_tx_timeout_reset(struct fm10k_intfc *interface);
	420	bool fm10k_check_tx_hang(struct fm10k_ring *tx_ring);
	421	void fm10k_alloc_rx_buffers(struct fm10k_ring *rx_ring, u16 cleaned_count);
b3890e30 AD	422
b3890e30 AD	423	/* PCI */
18283cad AD	424	void fm10k_mbx_free_irq(struct fm10k_intfc *);
	425	int fm10k_mbx_request_irq(struct fm10k_intfc *);
	426	void fm10k_qv_free_irq(struct fm10k_intfc *interface);
	427	int fm10k_qv_request_irq(struct fm10k_intfc *interface);
b3890e30 AD	428	int fm10k_register_pci_driver(void);
b3890e30 AD	429	void fm10k_unregister_pci_driver(void);
504c5eac AD	430	void fm10k_up(struct fm10k_intfc *interface);
504c5eac AD	431	void fm10k_down(struct fm10k_intfc *interface);
b7d8514c AD	432	void fm10k_update_stats(struct fm10k_intfc *interface);
	433	void fm10k_service_event_schedule(struct fm10k_intfc *interface);
	434	void fm10k_update_rx_drop_en(struct fm10k_intfc *interface);
0e7b3644 AD	435
	436	/* Netdev */
	437	struct net_device *fm10k_alloc_netdev(void);
3abaae42 AD	438	int fm10k_setup_rx_resources(struct fm10k_ring *);
	439	int fm10k_setup_tx_resources(struct fm10k_ring *);
	440	void fm10k_free_rx_resources(struct fm10k_ring *);
	441	void fm10k_free_tx_resources(struct fm10k_ring *);
	442	void fm10k_clean_all_rx_rings(struct fm10k_intfc *);
	443	void fm10k_clean_all_tx_rings(struct fm10k_intfc *);
	444	void fm10k_unmap_and_free_tx_resource(struct fm10k_ring *,
	445	struct fm10k_tx_buffer *);
8f5e20d4 AD	446	void fm10k_restore_rx_state(struct fm10k_intfc *);
8f5e20d4 AD	447	void fm10k_reset_rx_state(struct fm10k_intfc *);
aa3ac822	448	int fm10k_setup_tc(struct net_device *dev, u8 tc);
504c5eac AD	449	int fm10k_open(struct net_device *netdev);
504c5eac AD	450	int fm10k_close(struct net_device *netdev);
82dd0f7e AD	451
	452	/* Ethtool */
	453	void fm10k_set_ethtool_ops(struct net_device *dev);
883a9ccb AD	454
	455	/* IOV */
	456	s32 fm10k_iov_event(struct fm10k_intfc *interface);
	457	s32 fm10k_iov_mbx(struct fm10k_intfc *interface);
	458	void fm10k_iov_suspend(struct pci_dev *pdev);
	459	int fm10k_iov_resume(struct pci_dev *pdev);
	460	void fm10k_iov_disable(struct pci_dev *pdev);
	461	int fm10k_iov_configure(struct pci_dev *pdev, int num_vfs);
	462	s32 fm10k_iov_update_pvid(struct fm10k_intfc *interface, u16 glort, u16 pvid);
	463	int fm10k_ndo_set_vf_mac(struct net_device netdev, int vf_idx, u8 mac);
	464	int fm10k_ndo_set_vf_vlan(struct net_device *netdev,
	465	int vf_idx, u16 vid, u8 qos);
	466	int fm10k_ndo_set_vf_bw(struct net_device *netdev, int vf_idx, int rate,
	467	int unused);
	468	int fm10k_ndo_get_vf_config(struct net_device *netdev,
	469	int vf_idx, struct ifla_vf_info *ivi);
b3890e30	470	#endif /* _FM10K_H_ */