Commit | Line | Data |
---|---|---|
82dd0f7e | 1 | /* Intel Ethernet Switch Host Interface Driver |
97c71e3c | 2 | * Copyright(c) 2013 - 2015 Intel Corporation. |
82dd0f7e AD |
3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * The full GNU General Public License is included in this distribution in | |
14 | * the file called "COPYING". | |
15 | * | |
16 | * Contact Information: | |
17 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
18 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
19 | */ | |
20 | ||
eb51bbaf SR |
21 | #include <linux/vmalloc.h> |
22 | ||
82dd0f7e AD |
23 | #include "fm10k.h" |
24 | ||
25 | struct fm10k_stats { | |
26 | char stat_string[ETH_GSTRING_LEN]; | |
27 | int sizeof_stat; | |
28 | int stat_offset; | |
29 | }; | |
30 | ||
31 | #define FM10K_NETDEV_STAT(_net_stat) { \ | |
32 | .stat_string = #_net_stat, \ | |
33 | .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \ | |
34 | .stat_offset = offsetof(struct net_device_stats, _net_stat) \ | |
35 | } | |
36 | ||
37 | static const struct fm10k_stats fm10k_gstrings_net_stats[] = { | |
38 | FM10K_NETDEV_STAT(tx_packets), | |
39 | FM10K_NETDEV_STAT(tx_bytes), | |
40 | FM10K_NETDEV_STAT(tx_errors), | |
41 | FM10K_NETDEV_STAT(rx_packets), | |
42 | FM10K_NETDEV_STAT(rx_bytes), | |
43 | FM10K_NETDEV_STAT(rx_errors), | |
44 | FM10K_NETDEV_STAT(rx_dropped), | |
45 | ||
46 | /* detailed Rx errors */ | |
47 | FM10K_NETDEV_STAT(rx_length_errors), | |
48 | FM10K_NETDEV_STAT(rx_crc_errors), | |
49 | FM10K_NETDEV_STAT(rx_fifo_errors), | |
50 | }; | |
51 | ||
52 | #define FM10K_NETDEV_STATS_LEN ARRAY_SIZE(fm10k_gstrings_net_stats) | |
53 | ||
54 | #define FM10K_STAT(_name, _stat) { \ | |
55 | .stat_string = _name, \ | |
56 | .sizeof_stat = FIELD_SIZEOF(struct fm10k_intfc, _stat), \ | |
57 | .stat_offset = offsetof(struct fm10k_intfc, _stat) \ | |
58 | } | |
59 | ||
fbdb159f | 60 | static const struct fm10k_stats fm10k_gstrings_global_stats[] = { |
82dd0f7e AD |
61 | FM10K_STAT("tx_restart_queue", restart_queue), |
62 | FM10K_STAT("tx_busy", tx_busy), | |
63 | FM10K_STAT("tx_csum_errors", tx_csum_errors), | |
64 | FM10K_STAT("rx_alloc_failed", alloc_failed), | |
65 | FM10K_STAT("rx_csum_errors", rx_csum_errors), | |
82dd0f7e AD |
66 | |
67 | FM10K_STAT("tx_packets_nic", tx_packets_nic), | |
68 | FM10K_STAT("tx_bytes_nic", tx_bytes_nic), | |
69 | FM10K_STAT("rx_packets_nic", rx_packets_nic), | |
70 | FM10K_STAT("rx_bytes_nic", rx_bytes_nic), | |
71 | FM10K_STAT("rx_drops_nic", rx_drops_nic), | |
72 | FM10K_STAT("rx_overrun_pf", rx_overrun_pf), | |
73 | FM10K_STAT("rx_overrun_vf", rx_overrun_vf), | |
74 | ||
82dd0f7e AD |
75 | FM10K_STAT("swapi_status", hw.swapi.status), |
76 | FM10K_STAT("mac_rules_used", hw.swapi.mac.used), | |
77 | FM10K_STAT("mac_rules_avail", hw.swapi.mac.avail), | |
78 | ||
79 | FM10K_STAT("mbx_tx_busy", hw.mbx.tx_busy), | |
80 | FM10K_STAT("mbx_tx_dropped", hw.mbx.tx_dropped), | |
81 | FM10K_STAT("mbx_tx_messages", hw.mbx.tx_messages), | |
82 | FM10K_STAT("mbx_tx_dwords", hw.mbx.tx_dwords), | |
83 | FM10K_STAT("mbx_rx_messages", hw.mbx.rx_messages), | |
84 | FM10K_STAT("mbx_rx_dwords", hw.mbx.rx_dwords), | |
85 | FM10K_STAT("mbx_rx_parse_err", hw.mbx.rx_parse_err), | |
a211e013 AD |
86 | |
87 | FM10K_STAT("tx_hwtstamp_timeouts", tx_hwtstamp_timeouts), | |
82dd0f7e AD |
88 | }; |
89 | ||
fbdb159f JK |
90 | static const struct fm10k_stats fm10k_gstrings_pf_stats[] = { |
91 | FM10K_STAT("timeout", stats.timeout.count), | |
92 | FM10K_STAT("ur", stats.ur.count), | |
93 | FM10K_STAT("ca", stats.ca.count), | |
94 | FM10K_STAT("um", stats.um.count), | |
95 | FM10K_STAT("xec", stats.xec.count), | |
96 | FM10K_STAT("vlan_drop", stats.vlan_drop.count), | |
97 | FM10K_STAT("loopback_drop", stats.loopback_drop.count), | |
98 | FM10K_STAT("nodesc_drop", stats.nodesc_drop.count), | |
99 | }; | |
100 | ||
101 | #define FM10K_GLOBAL_STATS_LEN ARRAY_SIZE(fm10k_gstrings_global_stats) | |
102 | #define FM10K_PF_STATS_LEN ARRAY_SIZE(fm10k_gstrings_pf_stats) | |
82dd0f7e | 103 | |
c0e61781 JK |
104 | #define FM10K_QUEUE_STATS_LEN(_n) \ |
105 | ( (_n) * 2 * (sizeof(struct fm10k_queue_stats) / sizeof(u64))) | |
82dd0f7e | 106 | |
c0e61781 JK |
107 | #define FM10K_STATIC_STATS_LEN (FM10K_GLOBAL_STATS_LEN + \ |
108 | FM10K_NETDEV_STATS_LEN) | |
82dd0f7e | 109 | |
5cb8db4a AD |
110 | static const char fm10k_gstrings_test[][ETH_GSTRING_LEN] = { |
111 | "Mailbox test (on/offline)" | |
112 | }; | |
113 | ||
114 | #define FM10K_TEST_LEN (sizeof(fm10k_gstrings_test) / ETH_GSTRING_LEN) | |
115 | ||
116 | enum fm10k_self_test_types { | |
117 | FM10K_TEST_MBX, | |
118 | FM10K_TEST_MAX = FM10K_TEST_LEN | |
119 | }; | |
120 | ||
de445199 | 121 | static void fm10k_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
82dd0f7e | 122 | { |
29a928ee | 123 | struct fm10k_intfc *interface = netdev_priv(dev); |
82dd0f7e AD |
124 | char *p = (char *)data; |
125 | int i; | |
126 | ||
127 | switch (stringset) { | |
5cb8db4a AD |
128 | case ETH_SS_TEST: |
129 | memcpy(data, *fm10k_gstrings_test, | |
130 | FM10K_TEST_LEN * ETH_GSTRING_LEN); | |
131 | break; | |
82dd0f7e AD |
132 | case ETH_SS_STATS: |
133 | for (i = 0; i < FM10K_NETDEV_STATS_LEN; i++) { | |
134 | memcpy(p, fm10k_gstrings_net_stats[i].stat_string, | |
135 | ETH_GSTRING_LEN); | |
136 | p += ETH_GSTRING_LEN; | |
137 | } | |
138 | for (i = 0; i < FM10K_GLOBAL_STATS_LEN; i++) { | |
fbdb159f | 139 | memcpy(p, fm10k_gstrings_global_stats[i].stat_string, |
82dd0f7e AD |
140 | ETH_GSTRING_LEN); |
141 | p += ETH_GSTRING_LEN; | |
142 | } | |
143 | ||
fbdb159f JK |
144 | if (interface->hw.mac.type != fm10k_mac_vf) |
145 | for (i = 0; i < FM10K_PF_STATS_LEN; i++) { | |
146 | memcpy(p, fm10k_gstrings_pf_stats[i].stat_string, | |
147 | ETH_GSTRING_LEN); | |
148 | p += ETH_GSTRING_LEN; | |
149 | } | |
150 | ||
29a928ee | 151 | for (i = 0; i < interface->hw.mac.max_queues; i++) { |
82dd0f7e AD |
152 | sprintf(p, "tx_queue_%u_packets", i); |
153 | p += ETH_GSTRING_LEN; | |
154 | sprintf(p, "tx_queue_%u_bytes", i); | |
155 | p += ETH_GSTRING_LEN; | |
156 | sprintf(p, "rx_queue_%u_packets", i); | |
157 | p += ETH_GSTRING_LEN; | |
158 | sprintf(p, "rx_queue_%u_bytes", i); | |
159 | p += ETH_GSTRING_LEN; | |
160 | } | |
161 | break; | |
162 | } | |
163 | } | |
164 | ||
165 | static int fm10k_get_sset_count(struct net_device *dev, int sset) | |
166 | { | |
c0e61781 JK |
167 | struct fm10k_intfc *interface = netdev_priv(dev); |
168 | struct fm10k_hw *hw = &interface->hw; | |
169 | int stats_len = FM10K_STATIC_STATS_LEN; | |
170 | ||
82dd0f7e | 171 | switch (sset) { |
5cb8db4a AD |
172 | case ETH_SS_TEST: |
173 | return FM10K_TEST_LEN; | |
82dd0f7e | 174 | case ETH_SS_STATS: |
c0e61781 | 175 | stats_len += FM10K_QUEUE_STATS_LEN(hw->mac.max_queues); |
fbdb159f JK |
176 | |
177 | if (hw->mac.type != fm10k_mac_vf) | |
178 | stats_len += FM10K_PF_STATS_LEN; | |
179 | ||
c0e61781 | 180 | return stats_len; |
82dd0f7e AD |
181 | default: |
182 | return -EOPNOTSUPP; | |
183 | } | |
184 | } | |
185 | ||
186 | static void fm10k_get_ethtool_stats(struct net_device *netdev, | |
de445199 JK |
187 | struct ethtool_stats __always_unused *stats, |
188 | u64 *data) | |
82dd0f7e AD |
189 | { |
190 | const int stat_count = sizeof(struct fm10k_queue_stats) / sizeof(u64); | |
191 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
192 | struct net_device_stats *net_stats = &netdev->stats; | |
193 | char *p; | |
194 | int i, j; | |
195 | ||
196 | fm10k_update_stats(interface); | |
197 | ||
198 | for (i = 0; i < FM10K_NETDEV_STATS_LEN; i++) { | |
199 | p = (char *)net_stats + fm10k_gstrings_net_stats[i].stat_offset; | |
200 | *(data++) = (fm10k_gstrings_net_stats[i].sizeof_stat == | |
201 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
202 | } | |
203 | ||
204 | for (i = 0; i < FM10K_GLOBAL_STATS_LEN; i++) { | |
fbdb159f JK |
205 | p = (char *)interface + |
206 | fm10k_gstrings_global_stats[i].stat_offset; | |
207 | *(data++) = (fm10k_gstrings_global_stats[i].sizeof_stat == | |
82dd0f7e AD |
208 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; |
209 | } | |
210 | ||
fbdb159f JK |
211 | if (interface->hw.mac.type != fm10k_mac_vf) |
212 | for (i = 0; i < FM10K_PF_STATS_LEN; i++) { | |
213 | p = (char *)interface + | |
214 | fm10k_gstrings_pf_stats[i].stat_offset; | |
215 | *(data++) = (fm10k_gstrings_pf_stats[i].sizeof_stat == | |
216 | sizeof(u64)) ? *(u64 *)p : *(u32 *)p; | |
217 | } | |
218 | ||
29a928ee | 219 | for (i = 0; i < interface->hw.mac.max_queues; i++) { |
82dd0f7e AD |
220 | struct fm10k_ring *ring; |
221 | u64 *queue_stat; | |
222 | ||
223 | ring = interface->tx_ring[i]; | |
224 | if (ring) | |
225 | queue_stat = (u64 *)&ring->stats; | |
226 | for (j = 0; j < stat_count; j++) | |
227 | *(data++) = ring ? queue_stat[j] : 0; | |
228 | ||
229 | ring = interface->rx_ring[i]; | |
230 | if (ring) | |
231 | queue_stat = (u64 *)&ring->stats; | |
232 | for (j = 0; j < stat_count; j++) | |
233 | *(data++) = ring ? queue_stat[j] : 0; | |
234 | } | |
235 | } | |
236 | ||
237 | /* If function below adds more registers this define needs to be updated */ | |
238 | #define FM10K_REGS_LEN_Q 29 | |
239 | ||
240 | static void fm10k_get_reg_q(struct fm10k_hw *hw, u32 *buff, int i) | |
241 | { | |
242 | int idx = 0; | |
243 | ||
244 | buff[idx++] = fm10k_read_reg(hw, FM10K_RDBAL(i)); | |
245 | buff[idx++] = fm10k_read_reg(hw, FM10K_RDBAH(i)); | |
246 | buff[idx++] = fm10k_read_reg(hw, FM10K_RDLEN(i)); | |
247 | buff[idx++] = fm10k_read_reg(hw, FM10K_TPH_RXCTRL(i)); | |
248 | buff[idx++] = fm10k_read_reg(hw, FM10K_RDH(i)); | |
249 | buff[idx++] = fm10k_read_reg(hw, FM10K_RDT(i)); | |
250 | buff[idx++] = fm10k_read_reg(hw, FM10K_RXQCTL(i)); | |
251 | buff[idx++] = fm10k_read_reg(hw, FM10K_RXDCTL(i)); | |
252 | buff[idx++] = fm10k_read_reg(hw, FM10K_RXINT(i)); | |
253 | buff[idx++] = fm10k_read_reg(hw, FM10K_SRRCTL(i)); | |
254 | buff[idx++] = fm10k_read_reg(hw, FM10K_QPRC(i)); | |
255 | buff[idx++] = fm10k_read_reg(hw, FM10K_QPRDC(i)); | |
256 | buff[idx++] = fm10k_read_reg(hw, FM10K_QBRC_L(i)); | |
257 | buff[idx++] = fm10k_read_reg(hw, FM10K_QBRC_H(i)); | |
258 | buff[idx++] = fm10k_read_reg(hw, FM10K_TDBAL(i)); | |
259 | buff[idx++] = fm10k_read_reg(hw, FM10K_TDBAH(i)); | |
260 | buff[idx++] = fm10k_read_reg(hw, FM10K_TDLEN(i)); | |
261 | buff[idx++] = fm10k_read_reg(hw, FM10K_TPH_TXCTRL(i)); | |
262 | buff[idx++] = fm10k_read_reg(hw, FM10K_TDH(i)); | |
263 | buff[idx++] = fm10k_read_reg(hw, FM10K_TDT(i)); | |
264 | buff[idx++] = fm10k_read_reg(hw, FM10K_TXDCTL(i)); | |
265 | buff[idx++] = fm10k_read_reg(hw, FM10K_TXQCTL(i)); | |
266 | buff[idx++] = fm10k_read_reg(hw, FM10K_TXINT(i)); | |
267 | buff[idx++] = fm10k_read_reg(hw, FM10K_QPTC(i)); | |
268 | buff[idx++] = fm10k_read_reg(hw, FM10K_QBTC_L(i)); | |
269 | buff[idx++] = fm10k_read_reg(hw, FM10K_QBTC_H(i)); | |
270 | buff[idx++] = fm10k_read_reg(hw, FM10K_TQDLOC(i)); | |
271 | buff[idx++] = fm10k_read_reg(hw, FM10K_TX_SGLORT(i)); | |
272 | buff[idx++] = fm10k_read_reg(hw, FM10K_PFVTCTL(i)); | |
273 | ||
274 | BUG_ON(idx != FM10K_REGS_LEN_Q); | |
275 | } | |
276 | ||
277 | /* If function above adds more registers this define needs to be updated */ | |
278 | #define FM10K_REGS_LEN_VSI 43 | |
279 | ||
280 | static void fm10k_get_reg_vsi(struct fm10k_hw *hw, u32 *buff, int i) | |
281 | { | |
282 | int idx = 0, j; | |
283 | ||
284 | buff[idx++] = fm10k_read_reg(hw, FM10K_MRQC(i)); | |
285 | for (j = 0; j < 10; j++) | |
286 | buff[idx++] = fm10k_read_reg(hw, FM10K_RSSRK(i, j)); | |
287 | for (j = 0; j < 32; j++) | |
288 | buff[idx++] = fm10k_read_reg(hw, FM10K_RETA(i, j)); | |
289 | ||
290 | BUG_ON(idx != FM10K_REGS_LEN_VSI); | |
291 | } | |
292 | ||
293 | static void fm10k_get_regs(struct net_device *netdev, | |
294 | struct ethtool_regs *regs, void *p) | |
295 | { | |
296 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
297 | struct fm10k_hw *hw = &interface->hw; | |
298 | u32 *buff = p; | |
299 | u16 i; | |
300 | ||
301 | regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id; | |
302 | ||
303 | switch (hw->mac.type) { | |
304 | case fm10k_mac_pf: | |
305 | /* General PF Registers */ | |
306 | *(buff++) = fm10k_read_reg(hw, FM10K_CTRL); | |
307 | *(buff++) = fm10k_read_reg(hw, FM10K_CTRL_EXT); | |
308 | *(buff++) = fm10k_read_reg(hw, FM10K_GCR); | |
309 | *(buff++) = fm10k_read_reg(hw, FM10K_GCR_EXT); | |
310 | ||
311 | for (i = 0; i < 8; i++) { | |
312 | *(buff++) = fm10k_read_reg(hw, FM10K_DGLORTMAP(i)); | |
313 | *(buff++) = fm10k_read_reg(hw, FM10K_DGLORTDEC(i)); | |
314 | } | |
315 | ||
316 | for (i = 0; i < 65; i++) { | |
317 | fm10k_get_reg_vsi(hw, buff, i); | |
318 | buff += FM10K_REGS_LEN_VSI; | |
319 | } | |
320 | ||
321 | *(buff++) = fm10k_read_reg(hw, FM10K_DMA_CTRL); | |
322 | *(buff++) = fm10k_read_reg(hw, FM10K_DMA_CTRL2); | |
323 | ||
324 | for (i = 0; i < FM10K_MAX_QUEUES_PF; i++) { | |
325 | fm10k_get_reg_q(hw, buff, i); | |
326 | buff += FM10K_REGS_LEN_Q; | |
327 | } | |
328 | ||
329 | *(buff++) = fm10k_read_reg(hw, FM10K_TPH_CTRL); | |
330 | ||
331 | for (i = 0; i < 8; i++) | |
332 | *(buff++) = fm10k_read_reg(hw, FM10K_INT_MAP(i)); | |
333 | ||
334 | /* Interrupt Throttling Registers */ | |
335 | for (i = 0; i < 130; i++) | |
336 | *(buff++) = fm10k_read_reg(hw, FM10K_ITR(i)); | |
337 | ||
5cb8db4a AD |
338 | break; |
339 | case fm10k_mac_vf: | |
340 | /* General VF registers */ | |
341 | *(buff++) = fm10k_read_reg(hw, FM10K_VFCTRL); | |
342 | *(buff++) = fm10k_read_reg(hw, FM10K_VFINT_MAP); | |
343 | *(buff++) = fm10k_read_reg(hw, FM10K_VFSYSTIME); | |
344 | ||
345 | /* Interrupt Throttling Registers */ | |
346 | for (i = 0; i < 8; i++) | |
347 | *(buff++) = fm10k_read_reg(hw, FM10K_VFITR(i)); | |
348 | ||
349 | fm10k_get_reg_vsi(hw, buff, 0); | |
350 | buff += FM10K_REGS_LEN_VSI; | |
351 | ||
352 | for (i = 0; i < FM10K_MAX_QUEUES_POOL; i++) { | |
353 | if (i < hw->mac.max_queues) | |
354 | fm10k_get_reg_q(hw, buff, i); | |
355 | else | |
356 | memset(buff, 0, sizeof(u32) * FM10K_REGS_LEN_Q); | |
357 | buff += FM10K_REGS_LEN_Q; | |
358 | } | |
359 | ||
82dd0f7e AD |
360 | break; |
361 | default: | |
362 | return; | |
363 | } | |
364 | } | |
365 | ||
366 | /* If function above adds more registers these define need to be updated */ | |
367 | #define FM10K_REGS_LEN_PF \ | |
368 | (162 + (65 * FM10K_REGS_LEN_VSI) + (FM10K_MAX_QUEUES_PF * FM10K_REGS_LEN_Q)) | |
5cb8db4a AD |
369 | #define FM10K_REGS_LEN_VF \ |
370 | (11 + FM10K_REGS_LEN_VSI + (FM10K_MAX_QUEUES_POOL * FM10K_REGS_LEN_Q)) | |
82dd0f7e AD |
371 | |
372 | static int fm10k_get_regs_len(struct net_device *netdev) | |
373 | { | |
374 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
375 | struct fm10k_hw *hw = &interface->hw; | |
376 | ||
377 | switch (hw->mac.type) { | |
378 | case fm10k_mac_pf: | |
379 | return FM10K_REGS_LEN_PF * sizeof(u32); | |
5cb8db4a AD |
380 | case fm10k_mac_vf: |
381 | return FM10K_REGS_LEN_VF * sizeof(u32); | |
82dd0f7e AD |
382 | default: |
383 | return 0; | |
384 | } | |
385 | } | |
386 | ||
387 | static void fm10k_get_drvinfo(struct net_device *dev, | |
388 | struct ethtool_drvinfo *info) | |
389 | { | |
390 | struct fm10k_intfc *interface = netdev_priv(dev); | |
391 | ||
392 | strncpy(info->driver, fm10k_driver_name, | |
393 | sizeof(info->driver) - 1); | |
394 | strncpy(info->version, fm10k_driver_version, | |
395 | sizeof(info->version) - 1); | |
396 | strncpy(info->bus_info, pci_name(interface->pdev), | |
397 | sizeof(info->bus_info) - 1); | |
398 | ||
c0e61781 | 399 | info->n_stats = fm10k_get_sset_count(dev, ETH_SS_STATS); |
82dd0f7e AD |
400 | |
401 | info->regdump_len = fm10k_get_regs_len(dev); | |
402 | } | |
403 | ||
404 | static void fm10k_get_pauseparam(struct net_device *dev, | |
405 | struct ethtool_pauseparam *pause) | |
406 | { | |
407 | struct fm10k_intfc *interface = netdev_priv(dev); | |
408 | ||
409 | /* record fixed values for autoneg and tx pause */ | |
410 | pause->autoneg = 0; | |
411 | pause->tx_pause = 1; | |
412 | ||
413 | pause->rx_pause = interface->rx_pause ? 1 : 0; | |
414 | } | |
415 | ||
416 | static int fm10k_set_pauseparam(struct net_device *dev, | |
417 | struct ethtool_pauseparam *pause) | |
418 | { | |
419 | struct fm10k_intfc *interface = netdev_priv(dev); | |
420 | struct fm10k_hw *hw = &interface->hw; | |
421 | ||
422 | if (pause->autoneg || !pause->tx_pause) | |
423 | return -EINVAL; | |
424 | ||
425 | /* we can only support pause on the PF to avoid head-of-line blocking */ | |
426 | if (hw->mac.type == fm10k_mac_pf) | |
427 | interface->rx_pause = pause->rx_pause ? ~0 : 0; | |
428 | else if (pause->rx_pause) | |
429 | return -EINVAL; | |
430 | ||
431 | if (netif_running(dev)) | |
432 | fm10k_update_rx_drop_en(interface); | |
433 | ||
434 | return 0; | |
435 | } | |
436 | ||
437 | static u32 fm10k_get_msglevel(struct net_device *netdev) | |
438 | { | |
439 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
440 | ||
441 | return interface->msg_enable; | |
442 | } | |
443 | ||
444 | static void fm10k_set_msglevel(struct net_device *netdev, u32 data) | |
445 | { | |
446 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
447 | ||
448 | interface->msg_enable = data; | |
449 | } | |
450 | ||
451 | static void fm10k_get_ringparam(struct net_device *netdev, | |
452 | struct ethtool_ringparam *ring) | |
453 | { | |
454 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
455 | ||
456 | ring->rx_max_pending = FM10K_MAX_RXD; | |
457 | ring->tx_max_pending = FM10K_MAX_TXD; | |
458 | ring->rx_mini_max_pending = 0; | |
459 | ring->rx_jumbo_max_pending = 0; | |
460 | ring->rx_pending = interface->rx_ring_count; | |
461 | ring->tx_pending = interface->tx_ring_count; | |
462 | ring->rx_mini_pending = 0; | |
463 | ring->rx_jumbo_pending = 0; | |
464 | } | |
465 | ||
466 | static int fm10k_set_ringparam(struct net_device *netdev, | |
467 | struct ethtool_ringparam *ring) | |
468 | { | |
469 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
470 | struct fm10k_ring *temp_ring; | |
471 | int i, err = 0; | |
472 | u32 new_rx_count, new_tx_count; | |
473 | ||
474 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | |
475 | return -EINVAL; | |
476 | ||
477 | new_tx_count = clamp_t(u32, ring->tx_pending, | |
478 | FM10K_MIN_TXD, FM10K_MAX_TXD); | |
479 | new_tx_count = ALIGN(new_tx_count, FM10K_REQ_TX_DESCRIPTOR_MULTIPLE); | |
480 | ||
481 | new_rx_count = clamp_t(u32, ring->rx_pending, | |
482 | FM10K_MIN_RXD, FM10K_MAX_RXD); | |
483 | new_rx_count = ALIGN(new_rx_count, FM10K_REQ_RX_DESCRIPTOR_MULTIPLE); | |
484 | ||
485 | if ((new_tx_count == interface->tx_ring_count) && | |
486 | (new_rx_count == interface->rx_ring_count)) { | |
487 | /* nothing to do */ | |
488 | return 0; | |
489 | } | |
490 | ||
491 | while (test_and_set_bit(__FM10K_RESETTING, &interface->state)) | |
492 | usleep_range(1000, 2000); | |
493 | ||
494 | if (!netif_running(interface->netdev)) { | |
495 | for (i = 0; i < interface->num_tx_queues; i++) | |
496 | interface->tx_ring[i]->count = new_tx_count; | |
497 | for (i = 0; i < interface->num_rx_queues; i++) | |
498 | interface->rx_ring[i]->count = new_rx_count; | |
499 | interface->tx_ring_count = new_tx_count; | |
500 | interface->rx_ring_count = new_rx_count; | |
501 | goto clear_reset; | |
502 | } | |
503 | ||
504 | /* allocate temporary buffer to store rings in */ | |
505 | i = max_t(int, interface->num_tx_queues, interface->num_rx_queues); | |
506 | temp_ring = vmalloc(i * sizeof(struct fm10k_ring)); | |
507 | ||
508 | if (!temp_ring) { | |
509 | err = -ENOMEM; | |
510 | goto clear_reset; | |
511 | } | |
512 | ||
513 | fm10k_down(interface); | |
514 | ||
515 | /* Setup new Tx resources and free the old Tx resources in that order. | |
516 | * We can then assign the new resources to the rings via a memcpy. | |
517 | * The advantage to this approach is that we are guaranteed to still | |
518 | * have resources even in the case of an allocation failure. | |
519 | */ | |
520 | if (new_tx_count != interface->tx_ring_count) { | |
521 | for (i = 0; i < interface->num_tx_queues; i++) { | |
522 | memcpy(&temp_ring[i], interface->tx_ring[i], | |
523 | sizeof(struct fm10k_ring)); | |
524 | ||
525 | temp_ring[i].count = new_tx_count; | |
526 | err = fm10k_setup_tx_resources(&temp_ring[i]); | |
527 | if (err) { | |
528 | while (i) { | |
529 | i--; | |
530 | fm10k_free_tx_resources(&temp_ring[i]); | |
531 | } | |
532 | goto err_setup; | |
533 | } | |
534 | } | |
535 | ||
536 | for (i = 0; i < interface->num_tx_queues; i++) { | |
537 | fm10k_free_tx_resources(interface->tx_ring[i]); | |
538 | ||
539 | memcpy(interface->tx_ring[i], &temp_ring[i], | |
540 | sizeof(struct fm10k_ring)); | |
541 | } | |
542 | ||
543 | interface->tx_ring_count = new_tx_count; | |
544 | } | |
545 | ||
546 | /* Repeat the process for the Rx rings if needed */ | |
547 | if (new_rx_count != interface->rx_ring_count) { | |
548 | for (i = 0; i < interface->num_rx_queues; i++) { | |
549 | memcpy(&temp_ring[i], interface->rx_ring[i], | |
550 | sizeof(struct fm10k_ring)); | |
551 | ||
552 | temp_ring[i].count = new_rx_count; | |
553 | err = fm10k_setup_rx_resources(&temp_ring[i]); | |
554 | if (err) { | |
555 | while (i) { | |
556 | i--; | |
557 | fm10k_free_rx_resources(&temp_ring[i]); | |
558 | } | |
559 | goto err_setup; | |
560 | } | |
561 | } | |
562 | ||
563 | for (i = 0; i < interface->num_rx_queues; i++) { | |
564 | fm10k_free_rx_resources(interface->rx_ring[i]); | |
565 | ||
566 | memcpy(interface->rx_ring[i], &temp_ring[i], | |
567 | sizeof(struct fm10k_ring)); | |
568 | } | |
569 | ||
570 | interface->rx_ring_count = new_rx_count; | |
571 | } | |
572 | ||
573 | err_setup: | |
574 | fm10k_up(interface); | |
575 | vfree(temp_ring); | |
576 | clear_reset: | |
577 | clear_bit(__FM10K_RESETTING, &interface->state); | |
578 | return err; | |
579 | } | |
580 | ||
581 | static int fm10k_get_coalesce(struct net_device *dev, | |
582 | struct ethtool_coalesce *ec) | |
583 | { | |
584 | struct fm10k_intfc *interface = netdev_priv(dev); | |
585 | ||
586 | ec->use_adaptive_tx_coalesce = | |
587 | !!(interface->tx_itr & FM10K_ITR_ADAPTIVE); | |
588 | ec->tx_coalesce_usecs = interface->tx_itr & ~FM10K_ITR_ADAPTIVE; | |
589 | ||
590 | ec->use_adaptive_rx_coalesce = | |
591 | !!(interface->rx_itr & FM10K_ITR_ADAPTIVE); | |
592 | ec->rx_coalesce_usecs = interface->rx_itr & ~FM10K_ITR_ADAPTIVE; | |
593 | ||
594 | return 0; | |
595 | } | |
596 | ||
597 | static int fm10k_set_coalesce(struct net_device *dev, | |
598 | struct ethtool_coalesce *ec) | |
599 | { | |
600 | struct fm10k_intfc *interface = netdev_priv(dev); | |
601 | struct fm10k_q_vector *qv; | |
602 | u16 tx_itr, rx_itr; | |
603 | int i; | |
604 | ||
605 | /* verify limits */ | |
606 | if ((ec->rx_coalesce_usecs > FM10K_ITR_MAX) || | |
607 | (ec->tx_coalesce_usecs > FM10K_ITR_MAX)) | |
608 | return -EINVAL; | |
609 | ||
610 | /* record settings */ | |
611 | tx_itr = ec->tx_coalesce_usecs; | |
612 | rx_itr = ec->rx_coalesce_usecs; | |
613 | ||
614 | /* set initial values for adaptive ITR */ | |
615 | if (ec->use_adaptive_tx_coalesce) | |
616 | tx_itr = FM10K_ITR_ADAPTIVE | FM10K_ITR_10K; | |
617 | ||
618 | if (ec->use_adaptive_rx_coalesce) | |
619 | rx_itr = FM10K_ITR_ADAPTIVE | FM10K_ITR_20K; | |
620 | ||
621 | /* update interface */ | |
622 | interface->tx_itr = tx_itr; | |
623 | interface->rx_itr = rx_itr; | |
624 | ||
625 | /* update q_vectors */ | |
626 | for (i = 0; i < interface->num_q_vectors; i++) { | |
627 | qv = interface->q_vector[i]; | |
628 | qv->tx.itr = tx_itr; | |
629 | qv->rx.itr = rx_itr; | |
630 | } | |
631 | ||
632 | return 0; | |
633 | } | |
634 | ||
635 | static int fm10k_get_rss_hash_opts(struct fm10k_intfc *interface, | |
636 | struct ethtool_rxnfc *cmd) | |
637 | { | |
638 | cmd->data = 0; | |
639 | ||
640 | /* Report default options for RSS on fm10k */ | |
641 | switch (cmd->flow_type) { | |
642 | case TCP_V4_FLOW: | |
643 | case TCP_V6_FLOW: | |
644 | cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
645 | /* fall through */ | |
646 | case UDP_V4_FLOW: | |
647 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP) | |
648 | cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
649 | /* fall through */ | |
650 | case SCTP_V4_FLOW: | |
651 | case SCTP_V6_FLOW: | |
652 | case AH_ESP_V4_FLOW: | |
653 | case AH_ESP_V6_FLOW: | |
654 | case AH_V4_FLOW: | |
655 | case AH_V6_FLOW: | |
656 | case ESP_V4_FLOW: | |
657 | case ESP_V6_FLOW: | |
658 | case IPV4_FLOW: | |
659 | case IPV6_FLOW: | |
660 | cmd->data |= RXH_IP_SRC | RXH_IP_DST; | |
661 | break; | |
662 | case UDP_V6_FLOW: | |
663 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP) | |
664 | cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; | |
665 | cmd->data |= RXH_IP_SRC | RXH_IP_DST; | |
666 | break; | |
667 | default: | |
668 | return -EINVAL; | |
669 | } | |
670 | ||
671 | return 0; | |
672 | } | |
673 | ||
674 | static int fm10k_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, | |
de445199 | 675 | u32 __always_unused *rule_locs) |
82dd0f7e AD |
676 | { |
677 | struct fm10k_intfc *interface = netdev_priv(dev); | |
678 | int ret = -EOPNOTSUPP; | |
679 | ||
680 | switch (cmd->cmd) { | |
681 | case ETHTOOL_GRXRINGS: | |
682 | cmd->data = interface->num_rx_queues; | |
683 | ret = 0; | |
684 | break; | |
685 | case ETHTOOL_GRXFH: | |
686 | ret = fm10k_get_rss_hash_opts(interface, cmd); | |
687 | break; | |
688 | default: | |
689 | break; | |
690 | } | |
691 | ||
692 | return ret; | |
693 | } | |
694 | ||
695 | #define UDP_RSS_FLAGS (FM10K_FLAG_RSS_FIELD_IPV4_UDP | \ | |
696 | FM10K_FLAG_RSS_FIELD_IPV6_UDP) | |
697 | static int fm10k_set_rss_hash_opt(struct fm10k_intfc *interface, | |
698 | struct ethtool_rxnfc *nfc) | |
699 | { | |
700 | u32 flags = interface->flags; | |
701 | ||
702 | /* RSS does not support anything other than hashing | |
703 | * to queues on src and dst IPs and ports | |
704 | */ | |
705 | if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | | |
706 | RXH_L4_B_0_1 | RXH_L4_B_2_3)) | |
707 | return -EINVAL; | |
708 | ||
709 | switch (nfc->flow_type) { | |
710 | case TCP_V4_FLOW: | |
711 | case TCP_V6_FLOW: | |
712 | if (!(nfc->data & RXH_IP_SRC) || | |
713 | !(nfc->data & RXH_IP_DST) || | |
714 | !(nfc->data & RXH_L4_B_0_1) || | |
715 | !(nfc->data & RXH_L4_B_2_3)) | |
716 | return -EINVAL; | |
717 | break; | |
718 | case UDP_V4_FLOW: | |
719 | if (!(nfc->data & RXH_IP_SRC) || | |
720 | !(nfc->data & RXH_IP_DST)) | |
721 | return -EINVAL; | |
722 | switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { | |
723 | case 0: | |
724 | flags &= ~FM10K_FLAG_RSS_FIELD_IPV4_UDP; | |
725 | break; | |
726 | case (RXH_L4_B_0_1 | RXH_L4_B_2_3): | |
727 | flags |= FM10K_FLAG_RSS_FIELD_IPV4_UDP; | |
728 | break; | |
729 | default: | |
730 | return -EINVAL; | |
731 | } | |
732 | break; | |
733 | case UDP_V6_FLOW: | |
734 | if (!(nfc->data & RXH_IP_SRC) || | |
735 | !(nfc->data & RXH_IP_DST)) | |
736 | return -EINVAL; | |
737 | switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { | |
738 | case 0: | |
739 | flags &= ~FM10K_FLAG_RSS_FIELD_IPV6_UDP; | |
740 | break; | |
741 | case (RXH_L4_B_0_1 | RXH_L4_B_2_3): | |
742 | flags |= FM10K_FLAG_RSS_FIELD_IPV6_UDP; | |
743 | break; | |
744 | default: | |
745 | return -EINVAL; | |
746 | } | |
747 | break; | |
748 | case AH_ESP_V4_FLOW: | |
749 | case AH_V4_FLOW: | |
750 | case ESP_V4_FLOW: | |
751 | case SCTP_V4_FLOW: | |
752 | case AH_ESP_V6_FLOW: | |
753 | case AH_V6_FLOW: | |
754 | case ESP_V6_FLOW: | |
755 | case SCTP_V6_FLOW: | |
756 | if (!(nfc->data & RXH_IP_SRC) || | |
757 | !(nfc->data & RXH_IP_DST) || | |
758 | (nfc->data & RXH_L4_B_0_1) || | |
759 | (nfc->data & RXH_L4_B_2_3)) | |
760 | return -EINVAL; | |
761 | break; | |
762 | default: | |
763 | return -EINVAL; | |
764 | } | |
765 | ||
766 | /* if we changed something we need to update flags */ | |
767 | if (flags != interface->flags) { | |
768 | struct fm10k_hw *hw = &interface->hw; | |
769 | u32 mrqc; | |
770 | ||
771 | if ((flags & UDP_RSS_FLAGS) && | |
772 | !(interface->flags & UDP_RSS_FLAGS)) | |
773 | netif_warn(interface, drv, interface->netdev, | |
774 | "enabling UDP RSS: fragmented packets may arrive out of order to the stack above\n"); | |
775 | ||
776 | interface->flags = flags; | |
777 | ||
778 | /* Perform hash on these packet types */ | |
779 | mrqc = FM10K_MRQC_IPV4 | | |
780 | FM10K_MRQC_TCP_IPV4 | | |
781 | FM10K_MRQC_IPV6 | | |
782 | FM10K_MRQC_TCP_IPV6; | |
783 | ||
784 | if (flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP) | |
785 | mrqc |= FM10K_MRQC_UDP_IPV4; | |
786 | if (flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP) | |
787 | mrqc |= FM10K_MRQC_UDP_IPV6; | |
788 | ||
789 | fm10k_write_reg(hw, FM10K_MRQC(0), mrqc); | |
790 | } | |
791 | ||
792 | return 0; | |
793 | } | |
794 | ||
795 | static int fm10k_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) | |
796 | { | |
797 | struct fm10k_intfc *interface = netdev_priv(dev); | |
798 | int ret = -EOPNOTSUPP; | |
799 | ||
800 | switch (cmd->cmd) { | |
801 | case ETHTOOL_SRXFH: | |
802 | ret = fm10k_set_rss_hash_opt(interface, cmd); | |
803 | break; | |
804 | default: | |
805 | break; | |
806 | } | |
807 | ||
808 | return ret; | |
809 | } | |
810 | ||
5cb8db4a AD |
811 | static int fm10k_mbx_test(struct fm10k_intfc *interface, u64 *data) |
812 | { | |
813 | struct fm10k_hw *hw = &interface->hw; | |
814 | struct fm10k_mbx_info *mbx = &hw->mbx; | |
815 | u32 attr_flag, test_msg[6]; | |
816 | unsigned long timeout; | |
817 | int err; | |
818 | ||
819 | /* For now this is a VF only feature */ | |
820 | if (hw->mac.type != fm10k_mac_vf) | |
821 | return 0; | |
822 | ||
823 | /* loop through both nested and unnested attribute types */ | |
824 | for (attr_flag = (1 << FM10K_TEST_MSG_UNSET); | |
825 | attr_flag < (1 << (2 * FM10K_TEST_MSG_NESTED)); | |
826 | attr_flag += attr_flag) { | |
827 | /* generate message to be tested */ | |
828 | fm10k_tlv_msg_test_create(test_msg, attr_flag); | |
829 | ||
830 | fm10k_mbx_lock(interface); | |
831 | mbx->test_result = FM10K_NOT_IMPLEMENTED; | |
832 | err = mbx->ops.enqueue_tx(hw, mbx, test_msg); | |
833 | fm10k_mbx_unlock(interface); | |
834 | ||
835 | /* wait up to 1 second for response */ | |
836 | timeout = jiffies + HZ; | |
837 | do { | |
838 | if (err < 0) | |
839 | goto err_out; | |
840 | ||
841 | usleep_range(500, 1000); | |
842 | ||
843 | fm10k_mbx_lock(interface); | |
844 | mbx->ops.process(hw, mbx); | |
845 | fm10k_mbx_unlock(interface); | |
846 | ||
847 | err = mbx->test_result; | |
848 | if (!err) | |
849 | break; | |
850 | } while (time_is_after_jiffies(timeout)); | |
851 | ||
852 | /* reporting errors */ | |
853 | if (err) | |
854 | goto err_out; | |
855 | } | |
856 | ||
857 | err_out: | |
858 | *data = err < 0 ? (attr_flag) : (err > 0); | |
859 | return err; | |
860 | } | |
861 | ||
862 | static void fm10k_self_test(struct net_device *dev, | |
863 | struct ethtool_test *eth_test, u64 *data) | |
864 | { | |
865 | struct fm10k_intfc *interface = netdev_priv(dev); | |
866 | struct fm10k_hw *hw = &interface->hw; | |
867 | ||
868 | memset(data, 0, sizeof(*data) * FM10K_TEST_LEN); | |
869 | ||
870 | if (FM10K_REMOVED(hw)) { | |
871 | netif_err(interface, drv, dev, | |
872 | "Interface removed - test blocked\n"); | |
873 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
874 | return; | |
875 | } | |
876 | ||
877 | if (fm10k_mbx_test(interface, &data[FM10K_TEST_MBX])) | |
878 | eth_test->flags |= ETH_TEST_FL_FAILED; | |
879 | } | |
880 | ||
de445199 | 881 | static u32 fm10k_get_reta_size(struct net_device __always_unused *netdev) |
82dd0f7e AD |
882 | { |
883 | return FM10K_RETA_SIZE * FM10K_RETA_ENTRIES_PER_REG; | |
884 | } | |
885 | ||
886 | static int fm10k_get_reta(struct net_device *netdev, u32 *indir) | |
887 | { | |
888 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
889 | int i; | |
890 | ||
891 | if (!indir) | |
892 | return 0; | |
893 | ||
894 | for (i = 0; i < FM10K_RETA_SIZE; i++, indir += 4) { | |
895 | u32 reta = interface->reta[i]; | |
896 | ||
897 | indir[0] = (reta << 24) >> 24; | |
898 | indir[1] = (reta << 16) >> 24; | |
899 | indir[2] = (reta << 8) >> 24; | |
900 | indir[3] = (reta) >> 24; | |
901 | } | |
902 | ||
903 | return 0; | |
904 | } | |
905 | ||
906 | static int fm10k_set_reta(struct net_device *netdev, const u32 *indir) | |
907 | { | |
908 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
909 | struct fm10k_hw *hw = &interface->hw; | |
910 | int i; | |
911 | u16 rss_i; | |
912 | ||
913 | if (!indir) | |
914 | return 0; | |
915 | ||
916 | /* Verify user input. */ | |
917 | rss_i = interface->ring_feature[RING_F_RSS].indices; | |
918 | for (i = fm10k_get_reta_size(netdev); i--;) { | |
919 | if (indir[i] < rss_i) | |
920 | continue; | |
921 | return -EINVAL; | |
922 | } | |
923 | ||
924 | /* record entries to reta table */ | |
925 | for (i = 0; i < FM10K_RETA_SIZE; i++, indir += 4) { | |
926 | u32 reta = indir[0] | | |
927 | (indir[1] << 8) | | |
928 | (indir[2] << 16) | | |
929 | (indir[3] << 24); | |
930 | ||
931 | if (interface->reta[i] == reta) | |
932 | continue; | |
933 | ||
934 | interface->reta[i] = reta; | |
935 | fm10k_write_reg(hw, FM10K_RETA(0, i), reta); | |
936 | } | |
937 | ||
938 | return 0; | |
939 | } | |
940 | ||
de445199 | 941 | static u32 fm10k_get_rssrk_size(struct net_device __always_unused *netdev) |
82dd0f7e AD |
942 | { |
943 | return FM10K_RSSRK_SIZE * FM10K_RSSRK_ENTRIES_PER_REG; | |
944 | } | |
945 | ||
892311f6 EP |
946 | static int fm10k_get_rssh(struct net_device *netdev, u32 *indir, u8 *key, |
947 | u8 *hfunc) | |
82dd0f7e AD |
948 | { |
949 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
950 | int i, err; | |
951 | ||
892311f6 EP |
952 | if (hfunc) |
953 | *hfunc = ETH_RSS_HASH_TOP; | |
954 | ||
82dd0f7e AD |
955 | err = fm10k_get_reta(netdev, indir); |
956 | if (err || !key) | |
957 | return err; | |
958 | ||
959 | for (i = 0; i < FM10K_RSSRK_SIZE; i++, key += 4) | |
960 | *(__le32 *)key = cpu_to_le32(interface->rssrk[i]); | |
961 | ||
962 | return 0; | |
963 | } | |
964 | ||
965 | static int fm10k_set_rssh(struct net_device *netdev, const u32 *indir, | |
892311f6 | 966 | const u8 *key, const u8 hfunc) |
82dd0f7e AD |
967 | { |
968 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
969 | struct fm10k_hw *hw = &interface->hw; | |
970 | int i, err; | |
971 | ||
892311f6 EP |
972 | /* We do not allow change in unsupported parameters */ |
973 | if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) | |
974 | return -EOPNOTSUPP; | |
975 | ||
82dd0f7e AD |
976 | err = fm10k_set_reta(netdev, indir); |
977 | if (err || !key) | |
978 | return err; | |
979 | ||
980 | for (i = 0; i < FM10K_RSSRK_SIZE; i++, key += 4) { | |
981 | u32 rssrk = le32_to_cpu(*(__le32 *)key); | |
982 | ||
983 | if (interface->rssrk[i] == rssrk) | |
984 | continue; | |
985 | ||
986 | interface->rssrk[i] = rssrk; | |
987 | fm10k_write_reg(hw, FM10K_RSSRK(0, i), rssrk); | |
988 | } | |
989 | ||
990 | return 0; | |
991 | } | |
992 | ||
aa3ac822 AD |
993 | static unsigned int fm10k_max_channels(struct net_device *dev) |
994 | { | |
995 | struct fm10k_intfc *interface = netdev_priv(dev); | |
996 | unsigned int max_combined = interface->hw.mac.max_queues; | |
997 | u8 tcs = netdev_get_num_tc(dev); | |
998 | ||
999 | /* For QoS report channels per traffic class */ | |
1000 | if (tcs > 1) | |
1001 | max_combined = 1 << (fls(max_combined / tcs) - 1); | |
1002 | ||
1003 | return max_combined; | |
1004 | } | |
1005 | ||
1006 | static void fm10k_get_channels(struct net_device *dev, | |
1007 | struct ethtool_channels *ch) | |
1008 | { | |
1009 | struct fm10k_intfc *interface = netdev_priv(dev); | |
1010 | struct fm10k_hw *hw = &interface->hw; | |
1011 | ||
1012 | /* report maximum channels */ | |
1013 | ch->max_combined = fm10k_max_channels(dev); | |
1014 | ||
1015 | /* report info for other vector */ | |
1016 | ch->max_other = NON_Q_VECTORS(hw); | |
1017 | ch->other_count = ch->max_other; | |
1018 | ||
1019 | /* record RSS queues */ | |
1020 | ch->combined_count = interface->ring_feature[RING_F_RSS].indices; | |
1021 | } | |
1022 | ||
1023 | static int fm10k_set_channels(struct net_device *dev, | |
1024 | struct ethtool_channels *ch) | |
1025 | { | |
1026 | struct fm10k_intfc *interface = netdev_priv(dev); | |
1027 | unsigned int count = ch->combined_count; | |
1028 | struct fm10k_hw *hw = &interface->hw; | |
1029 | ||
1030 | /* verify they are not requesting separate vectors */ | |
1031 | if (!count || ch->rx_count || ch->tx_count) | |
1032 | return -EINVAL; | |
1033 | ||
1034 | /* verify other_count has not changed */ | |
1035 | if (ch->other_count != NON_Q_VECTORS(hw)) | |
1036 | return -EINVAL; | |
1037 | ||
1038 | /* verify the number of channels does not exceed hardware limits */ | |
1039 | if (count > fm10k_max_channels(dev)) | |
1040 | return -EINVAL; | |
1041 | ||
1042 | interface->ring_feature[RING_F_RSS].limit = count; | |
1043 | ||
1044 | /* use setup TC to update any traffic class queue mapping */ | |
1045 | return fm10k_setup_tc(dev, netdev_get_num_tc(dev)); | |
1046 | } | |
1047 | ||
a211e013 | 1048 | static int fm10k_get_ts_info(struct net_device *dev, |
eca32047 | 1049 | struct ethtool_ts_info *info) |
a211e013 AD |
1050 | { |
1051 | struct fm10k_intfc *interface = netdev_priv(dev); | |
1052 | ||
1053 | info->so_timestamping = | |
1054 | SOF_TIMESTAMPING_TX_SOFTWARE | | |
1055 | SOF_TIMESTAMPING_RX_SOFTWARE | | |
1056 | SOF_TIMESTAMPING_SOFTWARE | | |
1057 | SOF_TIMESTAMPING_TX_HARDWARE | | |
1058 | SOF_TIMESTAMPING_RX_HARDWARE | | |
1059 | SOF_TIMESTAMPING_RAW_HARDWARE; | |
1060 | ||
1061 | if (interface->ptp_clock) | |
1062 | info->phc_index = ptp_clock_index(interface->ptp_clock); | |
1063 | else | |
1064 | info->phc_index = -1; | |
1065 | ||
1066 | info->tx_types = (1 << HWTSTAMP_TX_OFF) | | |
1067 | (1 << HWTSTAMP_TX_ON); | |
1068 | ||
1069 | info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) | | |
1070 | (1 << HWTSTAMP_FILTER_ALL); | |
1071 | ||
1072 | return 0; | |
1073 | } | |
1074 | ||
82dd0f7e AD |
1075 | static const struct ethtool_ops fm10k_ethtool_ops = { |
1076 | .get_strings = fm10k_get_strings, | |
1077 | .get_sset_count = fm10k_get_sset_count, | |
1078 | .get_ethtool_stats = fm10k_get_ethtool_stats, | |
1079 | .get_drvinfo = fm10k_get_drvinfo, | |
1080 | .get_link = ethtool_op_get_link, | |
1081 | .get_pauseparam = fm10k_get_pauseparam, | |
1082 | .set_pauseparam = fm10k_set_pauseparam, | |
1083 | .get_msglevel = fm10k_get_msglevel, | |
1084 | .set_msglevel = fm10k_set_msglevel, | |
1085 | .get_ringparam = fm10k_get_ringparam, | |
1086 | .set_ringparam = fm10k_set_ringparam, | |
1087 | .get_coalesce = fm10k_get_coalesce, | |
1088 | .set_coalesce = fm10k_set_coalesce, | |
1089 | .get_rxnfc = fm10k_get_rxnfc, | |
1090 | .set_rxnfc = fm10k_set_rxnfc, | |
1091 | .get_regs = fm10k_get_regs, | |
1092 | .get_regs_len = fm10k_get_regs_len, | |
5cb8db4a | 1093 | .self_test = fm10k_self_test, |
82dd0f7e AD |
1094 | .get_rxfh_indir_size = fm10k_get_reta_size, |
1095 | .get_rxfh_key_size = fm10k_get_rssrk_size, | |
1096 | .get_rxfh = fm10k_get_rssh, | |
1097 | .set_rxfh = fm10k_set_rssh, | |
aa3ac822 AD |
1098 | .get_channels = fm10k_get_channels, |
1099 | .set_channels = fm10k_set_channels, | |
a211e013 | 1100 | .get_ts_info = fm10k_get_ts_info, |
82dd0f7e AD |
1101 | }; |
1102 | ||
1103 | void fm10k_set_ethtool_ops(struct net_device *dev) | |
1104 | { | |
1105 | dev->ethtool_ops = &fm10k_ethtool_ops; | |
1106 | } |