[deliverable/linux.git] / drivers / net / ethernet / intel / fm10k / fm10k_main.c

/* Intel Ethernet Switch Host Interface Driver
 * Copyright(c) 2013 - 2014 Intel Corporation.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * The full GNU General Public License is included in this distribution in
 * the file called "COPYING".
 *
 * Contact Information:
 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 */

#include <linux/types.h>
#include <linux/module.h>
#include <net/ipv6.h>
#include <net/ip.h>
#include <net/tcp.h>
#include <linux/if_macvlan.h>

#include "fm10k.h"

#define DRV_VERSION	"0.12.2-k"
const char fm10k_driver_version[] = DRV_VERSION;
char fm10k_driver_name[] = "fm10k";
static const char fm10k_driver_string[] =
	"Intel(R) Ethernet Switch Host Interface Driver";
static const char fm10k_copyright[] =
	"Copyright (c) 2013 Intel Corporation.";

MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
MODULE_DESCRIPTION("Intel(R) Ethernet Switch Host Interface Driver");
MODULE_LICENSE("GPL");
MODULE_VERSION(DRV_VERSION);

/**
 * fm10k_init_module - Driver Registration Routine
 *
 * fm10k_init_module is the first routine called when the driver is
 * loaded.  All it does is register with the PCI subsystem.
 **/
static int __init fm10k_init_module(void)
{
	pr_info("%s - version %s\n", fm10k_driver_string, fm10k_driver_version);
	pr_info("%s\n", fm10k_copyright);

	return fm10k_register_pci_driver();
}
module_init(fm10k_init_module);

/**
 * fm10k_exit_module - Driver Exit Cleanup Routine
 *
 * fm10k_exit_module is called just before the driver is removed
 * from memory.
 **/
static void __exit fm10k_exit_module(void)
{
	fm10k_unregister_pci_driver();
}
module_exit(fm10k_exit_module);

/**
 * fm10k_update_itr - update the dynamic ITR value based on packet size
 *
 *      Stores a new ITR value based on strictly on packet size.  The
 *      divisors and thresholds used by this function were determined based
 *      on theoretical maximum wire speed and testing data, in order to
 *      minimize response time while increasing bulk throughput.
 *
 * @ring_container: Container for rings to have ITR updated
 **/
static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
{
	unsigned int avg_wire_size, packets;

	/* Only update ITR if we are using adaptive setting */
	if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
		goto clear_counts;

	packets = ring_container->total_packets;
	if (!packets)
		goto clear_counts;

	avg_wire_size = ring_container->total_bytes / packets;

	/* Add 24 bytes to size to account for CRC, preamble, and gap */
	avg_wire_size += 24;

	/* Don't starve jumbo frames */
	if (avg_wire_size > 3000)
		avg_wire_size = 3000;

	/* Give a little boost to mid-size frames */
	if ((avg_wire_size > 300) && (avg_wire_size < 1200))
		avg_wire_size /= 3;
	else
		avg_wire_size /= 2;

	/* write back value and retain adaptive flag */
	ring_container->itr = avg_wire_size | FM10K_ITR_ADAPTIVE;

clear_counts:
	ring_container->total_bytes = 0;
	ring_container->total_packets = 0;
}

static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
{
	/* Enable auto-mask and clear the current mask */
	u32 itr = FM10K_ITR_ENABLE;

	/* Update Tx ITR */
	fm10k_update_itr(&q_vector->tx);

	/* Update Rx ITR */
	fm10k_update_itr(&q_vector->rx);

	/* Store Tx itr in timer slot 0 */
	itr |= (q_vector->tx.itr & FM10K_ITR_MAX);

	/* Shift Rx itr to timer slot 1 */
	itr |= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;

	/* Write the final value to the ITR register */
	writel(itr, q_vector->itr);
}

static int fm10k_poll(struct napi_struct *napi, int budget)
{
	struct fm10k_q_vector *q_vector =
			       container_of(napi, struct fm10k_q_vector, napi);

	/* all work done, exit the polling mode */
	napi_complete(napi);

	/* re-enable the q_vector */
	fm10k_qv_enable(q_vector);

	return 0;
}

/**
 * fm10k_set_num_queues: Allocate queues for device, feature dependent
 * @interface: board private structure to initialize
 *
 * This is the top level queue allocation routine.  The order here is very
 * important, starting with the "most" number of features turned on at once,
 * and ending with the smallest set of features.  This way large combinations
 * can be allocated if they're turned on, and smaller combinations are the
 * fallthrough conditions.
 *
 **/
static void fm10k_set_num_queues(struct fm10k_intfc *interface)
{
	/* Start with base case */
	interface->num_rx_queues = 1;
	interface->num_tx_queues = 1;
}

/**
 * fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
 * @interface: board private structure to initialize
 * @v_count: q_vectors allocated on interface, used for ring interleaving
 * @v_idx: index of vector in interface struct
 * @txr_count: total number of Tx rings to allocate
 * @txr_idx: index of first Tx ring to allocate
 * @rxr_count: total number of Rx rings to allocate
 * @rxr_idx: index of first Rx ring to allocate
 *
 * We allocate one q_vector.  If allocation fails we return -ENOMEM.
 **/
static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
				unsigned int v_count, unsigned int v_idx,
				unsigned int txr_count, unsigned int txr_idx,
				unsigned int rxr_count, unsigned int rxr_idx)
{
	struct fm10k_q_vector *q_vector;
	int ring_count, size;

	ring_count = txr_count + rxr_count;
	size = sizeof(struct fm10k_q_vector);

	/* allocate q_vector and rings */
	q_vector = kzalloc(size, GFP_KERNEL);
	if (!q_vector)
		return -ENOMEM;

	/* initialize NAPI */
	netif_napi_add(interface->netdev, &q_vector->napi,
		       fm10k_poll, NAPI_POLL_WEIGHT);

	/* tie q_vector and interface together */
	interface->q_vector[v_idx] = q_vector;
	q_vector->interface = interface;
	q_vector->v_idx = v_idx;

	/* save Tx ring container info */
	q_vector->tx.itr = interface->tx_itr;
	q_vector->tx.count = txr_count;

	/* save Rx ring container info */
	q_vector->rx.itr = interface->rx_itr;
	q_vector->rx.count = rxr_count;

	return 0;
}

/**
 * fm10k_free_q_vector - Free memory allocated for specific interrupt vector
 * @interface: board private structure to initialize
 * @v_idx: Index of vector to be freed
 *
 * This function frees the memory allocated to the q_vector.  In addition if
 * NAPI is enabled it will delete any references to the NAPI struct prior
 * to freeing the q_vector.
 **/
static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
{
	struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];

	interface->q_vector[v_idx] = NULL;
	netif_napi_del(&q_vector->napi);
	kfree_rcu(q_vector, rcu);
}

/**
 * fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
 * @interface: board private structure to initialize
 *
 * We allocate one q_vector per queue interrupt.  If allocation fails we
 * return -ENOMEM.
 **/
static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
{
	unsigned int q_vectors = interface->num_q_vectors;
	unsigned int rxr_remaining = interface->num_rx_queues;
	unsigned int txr_remaining = interface->num_tx_queues;
	unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
	int err;

	if (q_vectors >= (rxr_remaining + txr_remaining)) {
		for (; rxr_remaining; v_idx++) {
			err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
						   0, 0, 1, rxr_idx);
			if (err)
				goto err_out;

			/* update counts and index */
			rxr_remaining--;
			rxr_idx++;
		}
	}

	for (; v_idx < q_vectors; v_idx++) {
		int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
		int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);

		err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
					   tqpv, txr_idx,
					   rqpv, rxr_idx);

		if (err)
			goto err_out;

		/* update counts and index */
		rxr_remaining -= rqpv;
		txr_remaining -= tqpv;
		rxr_idx++;
		txr_idx++;
	}

	return 0;

err_out:
	interface->num_tx_queues = 0;
	interface->num_rx_queues = 0;
	interface->num_q_vectors = 0;

	while (v_idx--)
		fm10k_free_q_vector(interface, v_idx);

	return -ENOMEM;
}

/**
 * fm10k_free_q_vectors - Free memory allocated for interrupt vectors
 * @interface: board private structure to initialize
 *
 * This function frees the memory allocated to the q_vectors.  In addition if
 * NAPI is enabled it will delete any references to the NAPI struct prior
 * to freeing the q_vector.
 **/
static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
{
	int v_idx = interface->num_q_vectors;

	interface->num_tx_queues = 0;
	interface->num_rx_queues = 0;
	interface->num_q_vectors = 0;

	while (v_idx--)
		fm10k_free_q_vector(interface, v_idx);
}

/**
 * f10k_reset_msix_capability - reset MSI-X capability
 * @interface: board private structure to initialize
 *
 * Reset the MSI-X capability back to its starting state
 **/
static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
{
	pci_disable_msix(interface->pdev);
	kfree(interface->msix_entries);
	interface->msix_entries = NULL;
}

/**
 * f10k_init_msix_capability - configure MSI-X capability
 * @interface: board private structure to initialize
 *
 * Attempt to configure the interrupts using the best available
 * capabilities of the hardware and the kernel.
 **/
static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
{
	struct fm10k_hw *hw = &interface->hw;
	int v_budget, vector;

	/* It's easy to be greedy for MSI-X vectors, but it really
	 * doesn't do us much good if we have a lot more vectors
	 * than CPU's.  So let's be conservative and only ask for
	 * (roughly) the same number of vectors as there are CPU's.
	 * the default is to use pairs of vectors
	 */
	v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
	v_budget = min_t(u16, v_budget, num_online_cpus());

	/* account for vectors not related to queues */
	v_budget += NON_Q_VECTORS(hw);

	/* At the same time, hardware can only support a maximum of
	 * hw.mac->max_msix_vectors vectors.  With features
	 * such as RSS and VMDq, we can easily surpass the number of Rx and Tx
	 * descriptor queues supported by our device.  Thus, we cap it off in
	 * those rare cases where the cpu count also exceeds our vector limit.
	 */
	v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);

	/* A failure in MSI-X entry allocation is fatal. */
	interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
					  GFP_KERNEL);
	if (!interface->msix_entries)
		return -ENOMEM;

	/* populate entry values */
	for (vector = 0; vector < v_budget; vector++)
		interface->msix_entries[vector].entry = vector;

	/* Attempt to enable MSI-X with requested value */
	v_budget = pci_enable_msix_range(interface->pdev,
					 interface->msix_entries,
					 MIN_MSIX_COUNT(hw),
					 v_budget);
	if (v_budget < 0) {
		kfree(interface->msix_entries);
		interface->msix_entries = NULL;
		return -ENOMEM;
	}

	/* record the number of queues available for q_vectors */
	interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);

	return 0;
}

static void fm10k_init_reta(struct fm10k_intfc *interface)
{
	u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
	u32 reta, base;

	/* If the netdev is initialized we have to maintain table if possible */
	if (interface->netdev->reg_state) {
		for (i = FM10K_RETA_SIZE; i--;) {
			reta = interface->reta[i];
			if ((((reta << 24) >> 24) < rss_i) &&
			    (((reta << 16) >> 24) < rss_i) &&
			    (((reta <<  8) >> 24) < rss_i) &&
			    (((reta)       >> 24) < rss_i))
				continue;
			goto repopulate_reta;
		}

		/* do nothing if all of the elements are in bounds */
		return;
	}

repopulate_reta:
	/* Populate the redirection table 4 entries at a time.  To do this
	 * we are generating the results for n and n+2 and then interleaving
	 * those with the results with n+1 and n+3.
	 */
	for (i = FM10K_RETA_SIZE; i--;) {
		/* first pass generates n and n+2 */
		base = ((i * 0x00040004) + 0x00020000) * rss_i;
		reta = (base & 0x3F803F80) >> 7;

		/* second pass generates n+1 and n+3 */
		base += 0x00010001 * rss_i;
		reta |= (base & 0x3F803F80) << 1;

		interface->reta[i] = reta;
	}
}

/**
 * fm10k_init_queueing_scheme - Determine proper queueing scheme
 * @interface: board private structure to initialize
 *
 * We determine which queueing scheme to use based on...
 * - Hardware queue count (num_*_queues)
 *   - defined by miscellaneous hardware support/features (RSS, etc.)
 **/
int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
{
	int err;

	/* Number of supported queues */
	fm10k_set_num_queues(interface);

	/* Configure MSI-X capability */
	err = fm10k_init_msix_capability(interface);
	if (err) {
		dev_err(&interface->pdev->dev,
			"Unable to initialize MSI-X capability\n");
		return err;
	}

	/* Allocate memory for queues */
	err = fm10k_alloc_q_vectors(interface);
	if (err)
		return err;

	/* Initialize RSS redirection table */
	fm10k_init_reta(interface);

	return 0;
}

/**
 * fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
 * @interface: board private structure to clear queueing scheme on
 *
 * We go through and clear queueing specific resources and reset the structure
 * to pre-load conditions
 **/
void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
{
	fm10k_free_q_vectors(interface);
	fm10k_reset_msix_capability(interface);
}
Commit	Line	Data
b3890e30 AD	1	/* Intel Ethernet Switch Host Interface Driver
	2	* Copyright(c) 2013 - 2014 Intel Corporation.
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms and conditions of the GNU General Public License,
	6	* version 2, as published by the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* The full GNU General Public License is included in this distribution in
	14	* the file called "COPYING".
	15	*
	16	* Contact Information:
	17	* e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
	18	* Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
	19	*/
	20
	21	#include <linux/types.h>
	22	#include <linux/module.h>
	23	#include <net/ipv6.h>
	24	#include <net/ip.h>
	25	#include <net/tcp.h>
	26	#include <linux/if_macvlan.h>
	27
	28	#include "fm10k.h"
	29
	30	#define DRV_VERSION "0.12.2-k"
	31	const char fm10k_driver_version[] = DRV_VERSION;
	32	char fm10k_driver_name[] = "fm10k";
	33	static const char fm10k_driver_string[] =
	34	"Intel(R) Ethernet Switch Host Interface Driver";
	35	static const char fm10k_copyright[] =
	36	"Copyright (c) 2013 Intel Corporation.";
	37
	38	MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
	39	MODULE_DESCRIPTION("Intel(R) Ethernet Switch Host Interface Driver");
	40	MODULE_LICENSE("GPL");
	41	MODULE_VERSION(DRV_VERSION);
	42
6d2ce900 AD	43	/**
6d2ce900 AD	44	* fm10k_init_module - Driver Registration Routine
b3890e30 AD	45	*
	46	* fm10k_init_module is the first routine called when the driver is
	47	* loaded. All it does is register with the PCI subsystem.
	48	**/
	49	static int __init fm10k_init_module(void)
	50	{
	51	pr_info("%s - version %s\n", fm10k_driver_string, fm10k_driver_version);
	52	pr_info("%s\n", fm10k_copyright);
	53
	54	return fm10k_register_pci_driver();
	55	}
	56	module_init(fm10k_init_module);
	57
	58	/**
	59	* fm10k_exit_module - Driver Exit Cleanup Routine
	60	*
	61	* fm10k_exit_module is called just before the driver is removed
	62	* from memory.
	63	**/
	64	static void __exit fm10k_exit_module(void)
	65	{
	66	fm10k_unregister_pci_driver();
	67	}
	68	module_exit(fm10k_exit_module);
18283cad AD	69
	70	/**
	71	* fm10k_update_itr - update the dynamic ITR value based on packet size
	72	*
	73	* Stores a new ITR value based on strictly on packet size. The
	74	* divisors and thresholds used by this function were determined based
	75	* on theoretical maximum wire speed and testing data, in order to
	76	* minimize response time while increasing bulk throughput.
	77	*
	78	* @ring_container: Container for rings to have ITR updated
	79	**/
	80	static void fm10k_update_itr(struct fm10k_ring_container *ring_container)
	81	{
	82	unsigned int avg_wire_size, packets;
	83
	84	/* Only update ITR if we are using adaptive setting */
	85	if (!(ring_container->itr & FM10K_ITR_ADAPTIVE))
	86	goto clear_counts;
	87
	88	packets = ring_container->total_packets;
	89	if (!packets)
	90	goto clear_counts;
	91
	92	avg_wire_size = ring_container->total_bytes / packets;
	93
	94	/* Add 24 bytes to size to account for CRC, preamble, and gap */
	95	avg_wire_size += 24;
	96
	97	/* Don't starve jumbo frames */
	98	if (avg_wire_size > 3000)
	99	avg_wire_size = 3000;
	100
	101	/* Give a little boost to mid-size frames */
	102	if ((avg_wire_size > 300) && (avg_wire_size < 1200))
	103	avg_wire_size /= 3;
	104	else
	105	avg_wire_size /= 2;
	106
	107	/* write back value and retain adaptive flag */
	108	ring_container->itr = avg_wire_size \| FM10K_ITR_ADAPTIVE;
	109
	110	clear_counts:
	111	ring_container->total_bytes = 0;
	112	ring_container->total_packets = 0;
	113	}
	114
	115	static void fm10k_qv_enable(struct fm10k_q_vector *q_vector)
	116	{
	117	/* Enable auto-mask and clear the current mask */
	118	u32 itr = FM10K_ITR_ENABLE;
	119
	120	/* Update Tx ITR */
	121	fm10k_update_itr(&q_vector->tx);
	122
	123	/* Update Rx ITR */
	124	fm10k_update_itr(&q_vector->rx);
	125
	126	/* Store Tx itr in timer slot 0 */
	127	itr \|= (q_vector->tx.itr & FM10K_ITR_MAX);
	128
	129	/* Shift Rx itr to timer slot 1 */
	130	itr \|= (q_vector->rx.itr & FM10K_ITR_MAX) << FM10K_ITR_INTERVAL1_SHIFT;
	131
	132	/* Write the final value to the ITR register */
133	writel(itr, q_vector->itr);
134	}
135
136	static int fm10k_poll(struct napi_struct *napi, int budget)
137	{
138	struct fm10k_q_vector *q_vector =
139	container_of(napi, struct fm10k_q_vector, napi);
140
141	/* all work done, exit the polling mode */
142	napi_complete(napi);
143
144	/* re-enable the q_vector */
145	fm10k_qv_enable(q_vector);
146
147	return 0;
148	}
149
150	/**
151	* fm10k_set_num_queues: Allocate queues for device, feature dependent
152	* @interface: board private structure to initialize
153	*
154	* This is the top level queue allocation routine. The order here is very
155	* important, starting with the "most" number of features turned on at once,
156	* and ending with the smallest set of features. This way large combinations
157	* can be allocated if they're turned on, and smaller combinations are the
158	* fallthrough conditions.
159	*
160	**/
161	static void fm10k_set_num_queues(struct fm10k_intfc *interface)
162	{
163	/* Start with base case */
164	interface->num_rx_queues = 1;
165	interface->num_tx_queues = 1;
166	}
167
168	/**
169	* fm10k_alloc_q_vector - Allocate memory for a single interrupt vector
170	* @interface: board private structure to initialize
171	* @v_count: q_vectors allocated on interface, used for ring interleaving
172	* @v_idx: index of vector in interface struct
173	* @txr_count: total number of Tx rings to allocate
174	* @txr_idx: index of first Tx ring to allocate
175	* @rxr_count: total number of Rx rings to allocate
176	* @rxr_idx: index of first Rx ring to allocate
177	*
178	* We allocate one q_vector. If allocation fails we return -ENOMEM.
179	**/
180	static int fm10k_alloc_q_vector(struct fm10k_intfc *interface,
181	unsigned int v_count, unsigned int v_idx,
182	unsigned int txr_count, unsigned int txr_idx,
183	unsigned int rxr_count, unsigned int rxr_idx)
184	{
185	struct fm10k_q_vector *q_vector;
186	int ring_count, size;
187
188	ring_count = txr_count + rxr_count;
189	size = sizeof(struct fm10k_q_vector);
190
191	/* allocate q_vector and rings */
192	q_vector = kzalloc(size, GFP_KERNEL);
193	if (!q_vector)
194	return -ENOMEM;
195
196	/* initialize NAPI */
197	netif_napi_add(interface->netdev, &q_vector->napi,
198	fm10k_poll, NAPI_POLL_WEIGHT);
199
200	/* tie q_vector and interface together */
201	interface->q_vector[v_idx] = q_vector;
202	q_vector->interface = interface;
203	q_vector->v_idx = v_idx;
204
205	/* save Tx ring container info */
206	q_vector->tx.itr = interface->tx_itr;
207	q_vector->tx.count = txr_count;
208
209	/* save Rx ring container info */
210	q_vector->rx.itr = interface->rx_itr;
211	q_vector->rx.count = rxr_count;
212
213	return 0;
214	}
215
216	/**
217	* fm10k_free_q_vector - Free memory allocated for specific interrupt vector
218	* @interface: board private structure to initialize
219	* @v_idx: Index of vector to be freed
220	*
221	* This function frees the memory allocated to the q_vector. In addition if
222	* NAPI is enabled it will delete any references to the NAPI struct prior
223	* to freeing the q_vector.
224	**/
225	static void fm10k_free_q_vector(struct fm10k_intfc *interface, int v_idx)
226	{
227	struct fm10k_q_vector *q_vector = interface->q_vector[v_idx];
228
229	interface->q_vector[v_idx] = NULL;
230	netif_napi_del(&q_vector->napi);
231	kfree_rcu(q_vector, rcu);
232	}
233
234	/**
235	* fm10k_alloc_q_vectors - Allocate memory for interrupt vectors
236	* @interface: board private structure to initialize
237	*
238	* We allocate one q_vector per queue interrupt. If allocation fails we
239	* return -ENOMEM.
240	**/
241	static int fm10k_alloc_q_vectors(struct fm10k_intfc *interface)
242	{
243	unsigned int q_vectors = interface->num_q_vectors;
244	unsigned int rxr_remaining = interface->num_rx_queues;
245	unsigned int txr_remaining = interface->num_tx_queues;
246	unsigned int rxr_idx = 0, txr_idx = 0, v_idx = 0;
247	int err;
248
249	if (q_vectors >= (rxr_remaining + txr_remaining)) {
250	for (; rxr_remaining; v_idx++) {
251	err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
252	0, 0, 1, rxr_idx);
253	if (err)
254	goto err_out;
255
256	/* update counts and index */
257	rxr_remaining--;
258	rxr_idx++;
259	}
260	}
261
262	for (; v_idx < q_vectors; v_idx++) {
263	int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
264	int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
265
266	err = fm10k_alloc_q_vector(interface, q_vectors, v_idx,
267	tqpv, txr_idx,
268	rqpv, rxr_idx);
269
270	if (err)
271	goto err_out;
272
273	/* update counts and index */
274	rxr_remaining -= rqpv;
275	txr_remaining -= tqpv;
276	rxr_idx++;
277	txr_idx++;
278	}
279
280	return 0;
281
282	err_out:
283	interface->num_tx_queues = 0;
284	interface->num_rx_queues = 0;
285	interface->num_q_vectors = 0;
286
287	while (v_idx--)
288	fm10k_free_q_vector(interface, v_idx);
289
290	return -ENOMEM;
291	}
292
293	/**
294	* fm10k_free_q_vectors - Free memory allocated for interrupt vectors
295	* @interface: board private structure to initialize
296	*
297	* This function frees the memory allocated to the q_vectors. In addition if
298	* NAPI is enabled it will delete any references to the NAPI struct prior
299	* to freeing the q_vector.
300	**/
301	static void fm10k_free_q_vectors(struct fm10k_intfc *interface)
302	{
303	int v_idx = interface->num_q_vectors;
304
305	interface->num_tx_queues = 0;
306	interface->num_rx_queues = 0;
307	interface->num_q_vectors = 0;
308
309	while (v_idx--)
310	fm10k_free_q_vector(interface, v_idx);
311	}
312
313	/**
314	* f10k_reset_msix_capability - reset MSI-X capability
315	* @interface: board private structure to initialize
316	*
317	* Reset the MSI-X capability back to its starting state
318	**/
319	static void fm10k_reset_msix_capability(struct fm10k_intfc *interface)
320	{
321	pci_disable_msix(interface->pdev);
322	kfree(interface->msix_entries);
323	interface->msix_entries = NULL;
324	}
325
326	/**
327	* f10k_init_msix_capability - configure MSI-X capability
328	* @interface: board private structure to initialize
329	*
330	* Attempt to configure the interrupts using the best available
331	* capabilities of the hardware and the kernel.
332	**/
333	static int fm10k_init_msix_capability(struct fm10k_intfc *interface)
334	{
335	struct fm10k_hw *hw = &interface->hw;
336	int v_budget, vector;
337
338	/* It's easy to be greedy for MSI-X vectors, but it really
339	* doesn't do us much good if we have a lot more vectors
340	* than CPU's. So let's be conservative and only ask for
341	* (roughly) the same number of vectors as there are CPU's.
342	* the default is to use pairs of vectors
343	*/
344	v_budget = max(interface->num_rx_queues, interface->num_tx_queues);
345	v_budget = min_t(u16, v_budget, num_online_cpus());
346
347	/* account for vectors not related to queues */
348	v_budget += NON_Q_VECTORS(hw);
349
350	/* At the same time, hardware can only support a maximum of
351	* hw.mac->max_msix_vectors vectors. With features
352	* such as RSS and VMDq, we can easily surpass the number of Rx and Tx
353	* descriptor queues supported by our device. Thus, we cap it off in
354	* those rare cases where the cpu count also exceeds our vector limit.
355	*/
356	v_budget = min_t(int, v_budget, hw->mac.max_msix_vectors);
357
358	/* A failure in MSI-X entry allocation is fatal. */
359	interface->msix_entries = kcalloc(v_budget, sizeof(struct msix_entry),
360	GFP_KERNEL);
361	if (!interface->msix_entries)
362	return -ENOMEM;
363
364	/* populate entry values */
365	for (vector = 0; vector < v_budget; vector++)
366	interface->msix_entries[vector].entry = vector;
367
368	/* Attempt to enable MSI-X with requested value */
369	v_budget = pci_enable_msix_range(interface->pdev,
370	interface->msix_entries,
371	MIN_MSIX_COUNT(hw),
372	v_budget);
373	if (v_budget < 0) {
374	kfree(interface->msix_entries);
375	interface->msix_entries = NULL;
376	return -ENOMEM;
377	}
378
379	/* record the number of queues available for q_vectors */
380	interface->num_q_vectors = v_budget - NON_Q_VECTORS(hw);
381
382	return 0;
383	}
384
385	static void fm10k_init_reta(struct fm10k_intfc *interface)
386	{
387	u16 i, rss_i = interface->ring_feature[RING_F_RSS].indices;
388	u32 reta, base;
389
390	/* If the netdev is initialized we have to maintain table if possible */
391	if (interface->netdev->reg_state) {
392	for (i = FM10K_RETA_SIZE; i--;) {
393	reta = interface->reta[i];
394	if ((((reta << 24) >> 24) < rss_i) &&
395	(((reta << 16) >> 24) < rss_i) &&
396	(((reta << 8) >> 24) < rss_i) &&
397	(((reta) >> 24) < rss_i))
398	continue;
399	goto repopulate_reta;
400	}
401
402	/* do nothing if all of the elements are in bounds */
403	return;
404	}
405
406	repopulate_reta:
407	/* Populate the redirection table 4 entries at a time. To do this
408	* we are generating the results for n and n+2 and then interleaving
409	* those with the results with n+1 and n+3.
410	*/
411	for (i = FM10K_RETA_SIZE; i--;) {
412	/* first pass generates n and n+2 */
413	base = ((i * 0x00040004) + 0x00020000) * rss_i;
414	reta = (base & 0x3F803F80) >> 7;
415
416	/* second pass generates n+1 and n+3 */
417	base += 0x00010001 * rss_i;
418	reta \|= (base & 0x3F803F80) << 1;
419
420	interface->reta[i] = reta;
421	}
422	}
423
424	/**
425	* fm10k_init_queueing_scheme - Determine proper queueing scheme
426	* @interface: board private structure to initialize
427	*
428	* We determine which queueing scheme to use based on...
429	* - Hardware queue count (num_*_queues)
430	* - defined by miscellaneous hardware support/features (RSS, etc.)
431	**/
432	int fm10k_init_queueing_scheme(struct fm10k_intfc *interface)
433	{
434	int err;
435
436	/* Number of supported queues */
437	fm10k_set_num_queues(interface);
438
439	/* Configure MSI-X capability */
440	err = fm10k_init_msix_capability(interface);
441	if (err) {
442	dev_err(&interface->pdev->dev,
443	"Unable to initialize MSI-X capability\n");
444	return err;
445	}
446
447	/* Allocate memory for queues */
448	err = fm10k_alloc_q_vectors(interface);
449	if (err)
450	return err;
451
452	/* Initialize RSS redirection table */
453	fm10k_init_reta(interface);
454
455	return 0;
456	}
457
458	/**
459	* fm10k_clear_queueing_scheme - Clear the current queueing scheme settings
460	* @interface: board private structure to clear queueing scheme on
461	*
462	* We go through and clear queueing specific resources and reset the structure
463	* to pre-load conditions
464	**/
465	void fm10k_clear_queueing_scheme(struct fm10k_intfc *interface)
466	{
467	fm10k_free_q_vectors(interface);
468	fm10k_reset_msix_capability(interface);
469	}