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86641094 | 1 | /* Intel(R) Ethernet Switch Host Interface Driver |
9de6a1a6 | 2 | * Copyright(c) 2013 - 2016 Intel Corporation. |
b3890e30 AD |
3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * The full GNU General Public License is included in this distribution in | |
14 | * the file called "COPYING". | |
15 | * | |
16 | * Contact Information: | |
17 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
18 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
19ae1b3f | 22 | #include <linux/aer.h> |
b3890e30 AD |
23 | |
24 | #include "fm10k.h" | |
25 | ||
0e7b3644 AD |
26 | static const struct fm10k_info *fm10k_info_tbl[] = { |
27 | [fm10k_device_pf] = &fm10k_pf_info, | |
5cb8db4a | 28 | [fm10k_device_vf] = &fm10k_vf_info, |
0e7b3644 AD |
29 | }; |
30 | ||
b3890e30 AD |
31 | /** |
32 | * fm10k_pci_tbl - PCI Device ID Table | |
33 | * | |
34 | * Wildcard entries (PCI_ANY_ID) should come last | |
35 | * Last entry must be all 0s | |
36 | * | |
37 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
38 | * Class, Class Mask, private data (not used) } | |
39 | */ | |
40 | static const struct pci_device_id fm10k_pci_tbl[] = { | |
0e7b3644 | 41 | { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf }, |
5cb8db4a | 42 | { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf }, |
b3890e30 AD |
43 | /* required last entry */ |
44 | { 0, } | |
45 | }; | |
46 | MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl); | |
47 | ||
04a5aefb AD |
48 | u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg) |
49 | { | |
50 | struct fm10k_intfc *interface = hw->back; | |
51 | u16 value = 0; | |
52 | ||
53 | if (FM10K_REMOVED(hw->hw_addr)) | |
54 | return ~value; | |
55 | ||
56 | pci_read_config_word(interface->pdev, reg, &value); | |
57 | if (value == 0xFFFF) | |
58 | fm10k_write_flush(hw); | |
59 | ||
60 | return value; | |
61 | } | |
62 | ||
63 | u32 fm10k_read_reg(struct fm10k_hw *hw, int reg) | |
64 | { | |
65 | u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr); | |
66 | u32 value = 0; | |
67 | ||
68 | if (FM10K_REMOVED(hw_addr)) | |
69 | return ~value; | |
70 | ||
71 | value = readl(&hw_addr[reg]); | |
0e7b3644 AD |
72 | if (!(~value) && (!reg || !(~readl(hw_addr)))) { |
73 | struct fm10k_intfc *interface = hw->back; | |
74 | struct net_device *netdev = interface->netdev; | |
75 | ||
04a5aefb | 76 | hw->hw_addr = NULL; |
0e7b3644 AD |
77 | netif_device_detach(netdev); |
78 | netdev_err(netdev, "PCIe link lost, device now detached\n"); | |
79 | } | |
04a5aefb AD |
80 | |
81 | return value; | |
82 | } | |
83 | ||
0e7b3644 AD |
84 | static int fm10k_hw_ready(struct fm10k_intfc *interface) |
85 | { | |
86 | struct fm10k_hw *hw = &interface->hw; | |
87 | ||
88 | fm10k_write_flush(hw); | |
89 | ||
90 | return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0; | |
91 | } | |
92 | ||
b7d8514c AD |
93 | void fm10k_service_event_schedule(struct fm10k_intfc *interface) |
94 | { | |
95 | if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) && | |
96 | !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state)) | |
b382bb1b | 97 | queue_work(fm10k_workqueue, &interface->service_task); |
b7d8514c AD |
98 | } |
99 | ||
100 | static void fm10k_service_event_complete(struct fm10k_intfc *interface) | |
101 | { | |
838e6102 | 102 | WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state)); |
b7d8514c AD |
103 | |
104 | /* flush memory to make sure state is correct before next watchog */ | |
105 | smp_mb__before_atomic(); | |
106 | clear_bit(__FM10K_SERVICE_SCHED, &interface->state); | |
107 | } | |
108 | ||
109 | /** | |
110 | * fm10k_service_timer - Timer Call-back | |
111 | * @data: pointer to interface cast into an unsigned long | |
112 | **/ | |
113 | static void fm10k_service_timer(unsigned long data) | |
114 | { | |
115 | struct fm10k_intfc *interface = (struct fm10k_intfc *)data; | |
116 | ||
117 | /* Reset the timer */ | |
118 | mod_timer(&interface->service_timer, (HZ * 2) + jiffies); | |
119 | ||
120 | fm10k_service_event_schedule(interface); | |
121 | } | |
122 | ||
123 | static void fm10k_detach_subtask(struct fm10k_intfc *interface) | |
124 | { | |
125 | struct net_device *netdev = interface->netdev; | |
126 | ||
127 | /* do nothing if device is still present or hw_addr is set */ | |
128 | if (netif_device_present(netdev) || interface->hw.hw_addr) | |
129 | return; | |
130 | ||
131 | rtnl_lock(); | |
132 | ||
133 | if (netif_running(netdev)) | |
134 | dev_close(netdev); | |
135 | ||
136 | rtnl_unlock(); | |
137 | } | |
138 | ||
139 | static void fm10k_reinit(struct fm10k_intfc *interface) | |
140 | { | |
141 | struct net_device *netdev = interface->netdev; | |
142 | struct fm10k_hw *hw = &interface->hw; | |
143 | int err; | |
144 | ||
145 | WARN_ON(in_interrupt()); | |
146 | ||
147 | /* put off any impending NetWatchDogTimeout */ | |
860e9538 | 148 | netif_trans_update(netdev); |
b7d8514c AD |
149 | |
150 | while (test_and_set_bit(__FM10K_RESETTING, &interface->state)) | |
151 | usleep_range(1000, 2000); | |
152 | ||
153 | rtnl_lock(); | |
154 | ||
883a9ccb AD |
155 | fm10k_iov_suspend(interface->pdev); |
156 | ||
b7d8514c AD |
157 | if (netif_running(netdev)) |
158 | fm10k_close(netdev); | |
159 | ||
160 | fm10k_mbx_free_irq(interface); | |
161 | ||
875328e4 JK |
162 | /* free interrupts */ |
163 | fm10k_clear_queueing_scheme(interface); | |
164 | ||
b7d8514c AD |
165 | /* delay any future reset requests */ |
166 | interface->last_reset = jiffies + (10 * HZ); | |
167 | ||
168 | /* reset and initialize the hardware so it is in a known state */ | |
1343c65f JK |
169 | err = hw->mac.ops.reset_hw(hw); |
170 | if (err) { | |
171 | dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err); | |
172 | goto reinit_err; | |
173 | } | |
174 | ||
175 | err = hw->mac.ops.init_hw(hw); | |
176 | if (err) { | |
b7d8514c | 177 | dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err); |
1343c65f JK |
178 | goto reinit_err; |
179 | } | |
b7d8514c | 180 | |
875328e4 JK |
181 | err = fm10k_init_queueing_scheme(interface); |
182 | if (err) { | |
3d02b3df BA |
183 | dev_err(&interface->pdev->dev, |
184 | "init_queueing_scheme failed: %d\n", err); | |
875328e4 JK |
185 | goto reinit_err; |
186 | } | |
187 | ||
b7d8514c | 188 | /* reassociate interrupts */ |
09f8a82b AD |
189 | err = fm10k_mbx_request_irq(interface); |
190 | if (err) | |
191 | goto err_mbx_irq; | |
192 | ||
193 | err = fm10k_hw_ready(interface); | |
194 | if (err) | |
195 | goto err_open; | |
b7d8514c | 196 | |
bdc7f590 JK |
197 | /* update hardware address for VFs if perm_addr has changed */ |
198 | if (hw->mac.type == fm10k_mac_vf) { | |
199 | if (is_valid_ether_addr(hw->mac.perm_addr)) { | |
200 | ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); | |
201 | ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr); | |
202 | ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr); | |
203 | netdev->addr_assign_type &= ~NET_ADDR_RANDOM; | |
204 | } | |
205 | ||
206 | if (hw->mac.vlan_override) | |
207 | netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; | |
208 | else | |
209 | netdev->features |= NETIF_F_HW_VLAN_CTAG_RX; | |
210 | } | |
211 | ||
09f8a82b AD |
212 | err = netif_running(netdev) ? fm10k_open(netdev) : 0; |
213 | if (err) | |
214 | goto err_open; | |
b7d8514c | 215 | |
883a9ccb AD |
216 | fm10k_iov_resume(interface->pdev); |
217 | ||
09f8a82b AD |
218 | rtnl_unlock(); |
219 | ||
220 | clear_bit(__FM10K_RESETTING, &interface->state); | |
221 | ||
222 | return; | |
223 | err_open: | |
224 | fm10k_mbx_free_irq(interface); | |
225 | err_mbx_irq: | |
226 | fm10k_clear_queueing_scheme(interface); | |
1343c65f | 227 | reinit_err: |
09f8a82b | 228 | netif_device_detach(netdev); |
1343c65f | 229 | |
b7d8514c AD |
230 | rtnl_unlock(); |
231 | ||
232 | clear_bit(__FM10K_RESETTING, &interface->state); | |
233 | } | |
234 | ||
235 | static void fm10k_reset_subtask(struct fm10k_intfc *interface) | |
236 | { | |
237 | if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED)) | |
238 | return; | |
239 | ||
240 | interface->flags &= ~FM10K_FLAG_RESET_REQUESTED; | |
241 | ||
242 | netdev_err(interface->netdev, "Reset interface\n"); | |
b7d8514c AD |
243 | |
244 | fm10k_reinit(interface); | |
245 | } | |
246 | ||
247 | /** | |
248 | * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping | |
249 | * @interface: board private structure | |
250 | * | |
251 | * Configure the SWPRI to PC mapping for the port. | |
252 | **/ | |
253 | static void fm10k_configure_swpri_map(struct fm10k_intfc *interface) | |
254 | { | |
255 | struct net_device *netdev = interface->netdev; | |
256 | struct fm10k_hw *hw = &interface->hw; | |
257 | int i; | |
258 | ||
259 | /* clear flag indicating update is needed */ | |
260 | interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG; | |
261 | ||
262 | /* these registers are only available on the PF */ | |
263 | if (hw->mac.type != fm10k_mac_pf) | |
264 | return; | |
265 | ||
266 | /* configure SWPRI to PC map */ | |
267 | for (i = 0; i < FM10K_SWPRI_MAX; i++) | |
268 | fm10k_write_reg(hw, FM10K_SWPRI_MAP(i), | |
269 | netdev_get_prio_tc_map(netdev, i)); | |
270 | } | |
271 | ||
272 | /** | |
273 | * fm10k_watchdog_update_host_state - Update the link status based on host. | |
274 | * @interface: board private structure | |
275 | **/ | |
276 | static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface) | |
277 | { | |
278 | struct fm10k_hw *hw = &interface->hw; | |
279 | s32 err; | |
280 | ||
281 | if (test_bit(__FM10K_LINK_DOWN, &interface->state)) { | |
282 | interface->host_ready = false; | |
283 | if (time_is_after_jiffies(interface->link_down_event)) | |
284 | return; | |
285 | clear_bit(__FM10K_LINK_DOWN, &interface->state); | |
286 | } | |
287 | ||
288 | if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) { | |
289 | if (rtnl_trylock()) { | |
290 | fm10k_configure_swpri_map(interface); | |
291 | rtnl_unlock(); | |
292 | } | |
293 | } | |
294 | ||
295 | /* lock the mailbox for transmit and receive */ | |
296 | fm10k_mbx_lock(interface); | |
297 | ||
298 | err = hw->mac.ops.get_host_state(hw, &interface->host_ready); | |
299 | if (err && time_is_before_jiffies(interface->last_reset)) | |
300 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
301 | ||
302 | /* free the lock */ | |
303 | fm10k_mbx_unlock(interface); | |
304 | } | |
305 | ||
306 | /** | |
307 | * fm10k_mbx_subtask - Process upstream and downstream mailboxes | |
308 | * @interface: board private structure | |
309 | * | |
310 | * This function will process both the upstream and downstream mailboxes. | |
b7d8514c AD |
311 | **/ |
312 | static void fm10k_mbx_subtask(struct fm10k_intfc *interface) | |
313 | { | |
314 | /* process upstream mailbox and update device state */ | |
315 | fm10k_watchdog_update_host_state(interface); | |
883a9ccb AD |
316 | |
317 | /* process downstream mailboxes */ | |
318 | fm10k_iov_mbx(interface); | |
b7d8514c AD |
319 | } |
320 | ||
321 | /** | |
322 | * fm10k_watchdog_host_is_ready - Update netdev status based on host ready | |
323 | * @interface: board private structure | |
324 | **/ | |
325 | static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface) | |
326 | { | |
327 | struct net_device *netdev = interface->netdev; | |
328 | ||
329 | /* only continue if link state is currently down */ | |
330 | if (netif_carrier_ok(netdev)) | |
331 | return; | |
332 | ||
333 | netif_info(interface, drv, netdev, "NIC Link is up\n"); | |
334 | ||
335 | netif_carrier_on(netdev); | |
336 | netif_tx_wake_all_queues(netdev); | |
337 | } | |
338 | ||
339 | /** | |
340 | * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready | |
341 | * @interface: board private structure | |
342 | **/ | |
343 | static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface) | |
344 | { | |
345 | struct net_device *netdev = interface->netdev; | |
346 | ||
347 | /* only continue if link state is currently up */ | |
348 | if (!netif_carrier_ok(netdev)) | |
349 | return; | |
350 | ||
351 | netif_info(interface, drv, netdev, "NIC Link is down\n"); | |
352 | ||
353 | netif_carrier_off(netdev); | |
354 | netif_tx_stop_all_queues(netdev); | |
355 | } | |
356 | ||
357 | /** | |
358 | * fm10k_update_stats - Update the board statistics counters. | |
359 | * @interface: board private structure | |
360 | **/ | |
361 | void fm10k_update_stats(struct fm10k_intfc *interface) | |
362 | { | |
363 | struct net_device_stats *net_stats = &interface->netdev->stats; | |
364 | struct fm10k_hw *hw = &interface->hw; | |
80043f3b JK |
365 | u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0; |
366 | u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0; | |
367 | u64 rx_link_errors = 0; | |
b7d8514c AD |
368 | u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0; |
369 | u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0; | |
370 | u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0; | |
371 | u64 tx_bytes_nic = 0, tx_pkts_nic = 0; | |
372 | u64 bytes, pkts; | |
373 | int i; | |
374 | ||
375 | /* do not allow stats update via service task for next second */ | |
376 | interface->next_stats_update = jiffies + HZ; | |
377 | ||
378 | /* gather some stats to the interface struct that are per queue */ | |
379 | for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) { | |
380 | struct fm10k_ring *tx_ring = interface->tx_ring[i]; | |
381 | ||
382 | restart_queue += tx_ring->tx_stats.restart_queue; | |
383 | tx_busy += tx_ring->tx_stats.tx_busy; | |
384 | tx_csum_errors += tx_ring->tx_stats.csum_err; | |
385 | bytes += tx_ring->stats.bytes; | |
386 | pkts += tx_ring->stats.packets; | |
80043f3b | 387 | hw_csum_tx_good += tx_ring->tx_stats.csum_good; |
b7d8514c AD |
388 | } |
389 | ||
390 | interface->restart_queue = restart_queue; | |
391 | interface->tx_busy = tx_busy; | |
392 | net_stats->tx_bytes = bytes; | |
393 | net_stats->tx_packets = pkts; | |
394 | interface->tx_csum_errors = tx_csum_errors; | |
80043f3b JK |
395 | interface->hw_csum_tx_good = hw_csum_tx_good; |
396 | ||
b7d8514c AD |
397 | /* gather some stats to the interface struct that are per queue */ |
398 | for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) { | |
399 | struct fm10k_ring *rx_ring = interface->rx_ring[i]; | |
400 | ||
401 | bytes += rx_ring->stats.bytes; | |
402 | pkts += rx_ring->stats.packets; | |
403 | alloc_failed += rx_ring->rx_stats.alloc_failed; | |
404 | rx_csum_errors += rx_ring->rx_stats.csum_err; | |
405 | rx_errors += rx_ring->rx_stats.errors; | |
80043f3b JK |
406 | hw_csum_rx_good += rx_ring->rx_stats.csum_good; |
407 | rx_switch_errors += rx_ring->rx_stats.switch_errors; | |
408 | rx_drops += rx_ring->rx_stats.drops; | |
409 | rx_pp_errors += rx_ring->rx_stats.pp_errors; | |
410 | rx_link_errors += rx_ring->rx_stats.link_errors; | |
411 | rx_length_errors += rx_ring->rx_stats.length_errors; | |
b7d8514c AD |
412 | } |
413 | ||
414 | net_stats->rx_bytes = bytes; | |
415 | net_stats->rx_packets = pkts; | |
416 | interface->alloc_failed = alloc_failed; | |
417 | interface->rx_csum_errors = rx_csum_errors; | |
80043f3b JK |
418 | interface->hw_csum_rx_good = hw_csum_rx_good; |
419 | interface->rx_switch_errors = rx_switch_errors; | |
420 | interface->rx_drops = rx_drops; | |
421 | interface->rx_pp_errors = rx_pp_errors; | |
422 | interface->rx_link_errors = rx_link_errors; | |
423 | interface->rx_length_errors = rx_length_errors; | |
b7d8514c AD |
424 | |
425 | hw->mac.ops.update_hw_stats(hw, &interface->stats); | |
426 | ||
c0e61781 | 427 | for (i = 0; i < hw->mac.max_queues; i++) { |
b7d8514c AD |
428 | struct fm10k_hw_stats_q *q = &interface->stats.q[i]; |
429 | ||
430 | tx_bytes_nic += q->tx_bytes.count; | |
431 | tx_pkts_nic += q->tx_packets.count; | |
432 | rx_bytes_nic += q->rx_bytes.count; | |
433 | rx_pkts_nic += q->rx_packets.count; | |
434 | rx_drops_nic += q->rx_drops.count; | |
435 | } | |
436 | ||
437 | interface->tx_bytes_nic = tx_bytes_nic; | |
438 | interface->tx_packets_nic = tx_pkts_nic; | |
439 | interface->rx_bytes_nic = rx_bytes_nic; | |
440 | interface->rx_packets_nic = rx_pkts_nic; | |
441 | interface->rx_drops_nic = rx_drops_nic; | |
442 | ||
443 | /* Fill out the OS statistics structure */ | |
97c71e3c | 444 | net_stats->rx_errors = rx_errors; |
b7d8514c AD |
445 | net_stats->rx_dropped = interface->stats.nodesc_drop.count; |
446 | } | |
447 | ||
448 | /** | |
449 | * fm10k_watchdog_flush_tx - flush queues on host not ready | |
450 | * @interface - pointer to the device interface structure | |
451 | **/ | |
452 | static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface) | |
453 | { | |
454 | int some_tx_pending = 0; | |
455 | int i; | |
456 | ||
457 | /* nothing to do if carrier is up */ | |
458 | if (netif_carrier_ok(interface->netdev)) | |
459 | return; | |
460 | ||
461 | for (i = 0; i < interface->num_tx_queues; i++) { | |
462 | struct fm10k_ring *tx_ring = interface->tx_ring[i]; | |
463 | ||
464 | if (tx_ring->next_to_use != tx_ring->next_to_clean) { | |
465 | some_tx_pending = 1; | |
466 | break; | |
467 | } | |
468 | } | |
469 | ||
470 | /* We've lost link, so the controller stops DMA, but we've got | |
471 | * queued Tx work that's never going to get done, so reset | |
472 | * controller to flush Tx. | |
473 | */ | |
474 | if (some_tx_pending) | |
475 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
476 | } | |
477 | ||
478 | /** | |
479 | * fm10k_watchdog_subtask - check and bring link up | |
480 | * @interface - pointer to the device interface structure | |
481 | **/ | |
482 | static void fm10k_watchdog_subtask(struct fm10k_intfc *interface) | |
483 | { | |
484 | /* if interface is down do nothing */ | |
485 | if (test_bit(__FM10K_DOWN, &interface->state) || | |
486 | test_bit(__FM10K_RESETTING, &interface->state)) | |
487 | return; | |
488 | ||
489 | if (interface->host_ready) | |
490 | fm10k_watchdog_host_is_ready(interface); | |
491 | else | |
492 | fm10k_watchdog_host_not_ready(interface); | |
493 | ||
494 | /* update stats only once every second */ | |
495 | if (time_is_before_jiffies(interface->next_stats_update)) | |
496 | fm10k_update_stats(interface); | |
497 | ||
498 | /* flush any uncompleted work */ | |
499 | fm10k_watchdog_flush_tx(interface); | |
500 | } | |
501 | ||
502 | /** | |
503 | * fm10k_check_hang_subtask - check for hung queues and dropped interrupts | |
504 | * @interface - pointer to the device interface structure | |
505 | * | |
506 | * This function serves two purposes. First it strobes the interrupt lines | |
507 | * in order to make certain interrupts are occurring. Secondly it sets the | |
508 | * bits needed to check for TX hangs. As a result we should immediately | |
509 | * determine if a hang has occurred. | |
510 | */ | |
511 | static void fm10k_check_hang_subtask(struct fm10k_intfc *interface) | |
512 | { | |
513 | int i; | |
514 | ||
515 | /* If we're down or resetting, just bail */ | |
516 | if (test_bit(__FM10K_DOWN, &interface->state) || | |
517 | test_bit(__FM10K_RESETTING, &interface->state)) | |
518 | return; | |
519 | ||
520 | /* rate limit tx hang checks to only once every 2 seconds */ | |
521 | if (time_is_after_eq_jiffies(interface->next_tx_hang_check)) | |
522 | return; | |
523 | interface->next_tx_hang_check = jiffies + (2 * HZ); | |
524 | ||
525 | if (netif_carrier_ok(interface->netdev)) { | |
526 | /* Force detection of hung controller */ | |
527 | for (i = 0; i < interface->num_tx_queues; i++) | |
528 | set_check_for_tx_hang(interface->tx_ring[i]); | |
529 | ||
530 | /* Rearm all in-use q_vectors for immediate firing */ | |
531 | for (i = 0; i < interface->num_q_vectors; i++) { | |
532 | struct fm10k_q_vector *qv = interface->q_vector[i]; | |
533 | ||
534 | if (!qv->tx.count && !qv->rx.count) | |
535 | continue; | |
536 | writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr); | |
537 | } | |
538 | } | |
539 | } | |
540 | ||
541 | /** | |
542 | * fm10k_service_task - manages and runs subtasks | |
543 | * @work: pointer to work_struct containing our data | |
544 | **/ | |
545 | static void fm10k_service_task(struct work_struct *work) | |
546 | { | |
547 | struct fm10k_intfc *interface; | |
548 | ||
549 | interface = container_of(work, struct fm10k_intfc, service_task); | |
550 | ||
8427672a | 551 | /* tasks run even when interface is down */ |
b7d8514c AD |
552 | fm10k_mbx_subtask(interface); |
553 | fm10k_detach_subtask(interface); | |
554 | fm10k_reset_subtask(interface); | |
555 | ||
556 | /* tasks only run when interface is up */ | |
557 | fm10k_watchdog_subtask(interface); | |
558 | fm10k_check_hang_subtask(interface); | |
559 | ||
560 | /* release lock on service events to allow scheduling next event */ | |
561 | fm10k_service_event_complete(interface); | |
562 | } | |
563 | ||
3abaae42 AD |
564 | /** |
565 | * fm10k_configure_tx_ring - Configure Tx ring after Reset | |
566 | * @interface: board private structure | |
567 | * @ring: structure containing ring specific data | |
568 | * | |
569 | * Configure the Tx descriptor ring after a reset. | |
570 | **/ | |
571 | static void fm10k_configure_tx_ring(struct fm10k_intfc *interface, | |
572 | struct fm10k_ring *ring) | |
573 | { | |
574 | struct fm10k_hw *hw = &interface->hw; | |
575 | u64 tdba = ring->dma; | |
576 | u32 size = ring->count * sizeof(struct fm10k_tx_desc); | |
577 | u32 txint = FM10K_INT_MAP_DISABLE; | |
fcdb0a99 | 578 | u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE; |
3abaae42 AD |
579 | u8 reg_idx = ring->reg_idx; |
580 | ||
581 | /* disable queue to avoid issues while updating state */ | |
582 | fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0); | |
583 | fm10k_write_flush(hw); | |
584 | ||
585 | /* possible poll here to verify ring resources have been cleaned */ | |
586 | ||
587 | /* set location and size for descriptor ring */ | |
588 | fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); | |
589 | fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32); | |
590 | fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size); | |
591 | ||
592 | /* reset head and tail pointers */ | |
593 | fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0); | |
594 | fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0); | |
595 | ||
596 | /* store tail pointer */ | |
597 | ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)]; | |
598 | ||
c7bc9523 | 599 | /* reset ntu and ntc to place SW in sync with hardware */ |
3abaae42 AD |
600 | ring->next_to_clean = 0; |
601 | ring->next_to_use = 0; | |
602 | ||
603 | /* Map interrupt */ | |
604 | if (ring->q_vector) { | |
605 | txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); | |
606 | txint |= FM10K_INT_MAP_TIMER0; | |
607 | } | |
608 | ||
609 | fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint); | |
610 | ||
611 | /* enable use of FTAG bit in Tx descriptor, register is RO for VF */ | |
612 | fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx), | |
613 | FM10K_PFVTCTL_FTAG_DESC_ENABLE); | |
614 | ||
504b0fdf JK |
615 | /* Initialize XPS */ |
616 | if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) && | |
617 | ring->q_vector) | |
618 | netif_set_xps_queue(ring->netdev, | |
619 | &ring->q_vector->affinity_mask, | |
620 | ring->queue_index); | |
621 | ||
3abaae42 AD |
622 | /* enable queue */ |
623 | fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); | |
624 | } | |
625 | ||
626 | /** | |
627 | * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration | |
628 | * @interface: board private structure | |
629 | * @ring: structure containing ring specific data | |
630 | * | |
631 | * Verify the Tx descriptor ring is ready for transmit. | |
632 | **/ | |
633 | static void fm10k_enable_tx_ring(struct fm10k_intfc *interface, | |
634 | struct fm10k_ring *ring) | |
635 | { | |
636 | struct fm10k_hw *hw = &interface->hw; | |
637 | int wait_loop = 10; | |
638 | u32 txdctl; | |
639 | u8 reg_idx = ring->reg_idx; | |
640 | ||
641 | /* if we are already enabled just exit */ | |
642 | if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE) | |
643 | return; | |
644 | ||
645 | /* poll to verify queue is enabled */ | |
646 | do { | |
647 | usleep_range(1000, 2000); | |
648 | txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); | |
649 | } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); | |
650 | if (!wait_loop) | |
651 | netif_err(interface, drv, interface->netdev, | |
652 | "Could not enable Tx Queue %d\n", reg_idx); | |
653 | } | |
654 | ||
655 | /** | |
656 | * fm10k_configure_tx - Configure Transmit Unit after Reset | |
657 | * @interface: board private structure | |
658 | * | |
659 | * Configure the Tx unit of the MAC after a reset. | |
660 | **/ | |
661 | static void fm10k_configure_tx(struct fm10k_intfc *interface) | |
662 | { | |
663 | int i; | |
664 | ||
665 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
666 | for (i = 0; i < interface->num_tx_queues; i++) | |
667 | fm10k_configure_tx_ring(interface, interface->tx_ring[i]); | |
668 | ||
669 | /* poll here to verify that Tx rings are now enabled */ | |
670 | for (i = 0; i < interface->num_tx_queues; i++) | |
671 | fm10k_enable_tx_ring(interface, interface->tx_ring[i]); | |
672 | } | |
673 | ||
674 | /** | |
675 | * fm10k_configure_rx_ring - Configure Rx ring after Reset | |
676 | * @interface: board private structure | |
677 | * @ring: structure containing ring specific data | |
678 | * | |
679 | * Configure the Rx descriptor ring after a reset. | |
680 | **/ | |
681 | static void fm10k_configure_rx_ring(struct fm10k_intfc *interface, | |
682 | struct fm10k_ring *ring) | |
683 | { | |
684 | u64 rdba = ring->dma; | |
685 | struct fm10k_hw *hw = &interface->hw; | |
686 | u32 size = ring->count * sizeof(union fm10k_rx_desc); | |
687 | u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF; | |
688 | u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
689 | u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN; | |
690 | u32 rxint = FM10K_INT_MAP_DISABLE; | |
691 | u8 rx_pause = interface->rx_pause; | |
692 | u8 reg_idx = ring->reg_idx; | |
693 | ||
694 | /* disable queue to avoid issues while updating state */ | |
695 | fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0); | |
696 | fm10k_write_flush(hw); | |
697 | ||
698 | /* possible poll here to verify ring resources have been cleaned */ | |
699 | ||
700 | /* set location and size for descriptor ring */ | |
701 | fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); | |
702 | fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32); | |
703 | fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size); | |
704 | ||
705 | /* reset head and tail pointers */ | |
706 | fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0); | |
707 | fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0); | |
708 | ||
709 | /* store tail pointer */ | |
710 | ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)]; | |
711 | ||
c7bc9523 | 712 | /* reset ntu and ntc to place SW in sync with hardware */ |
3abaae42 AD |
713 | ring->next_to_clean = 0; |
714 | ring->next_to_use = 0; | |
715 | ring->next_to_alloc = 0; | |
716 | ||
717 | /* Configure the Rx buffer size for one buff without split */ | |
718 | srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT; | |
719 | ||
eca32047 | 720 | /* Configure the Rx ring to suppress loopback packets */ |
3abaae42 AD |
721 | srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS; |
722 | fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl); | |
723 | ||
724 | /* Enable drop on empty */ | |
9f801abc | 725 | #ifdef CONFIG_DCB |
3abaae42 AD |
726 | if (interface->pfc_en) |
727 | rx_pause = interface->pfc_en; | |
728 | #endif | |
fcdb0a99 | 729 | if (!(rx_pause & BIT(ring->qos_pc))) |
3abaae42 AD |
730 | rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; |
731 | ||
732 | fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); | |
733 | ||
734 | /* assign default VLAN to queue */ | |
735 | ring->vid = hw->mac.default_vid; | |
736 | ||
aa502b4a | 737 | /* if we have an active VLAN, disable default VLAN ID */ |
e71c9318 JK |
738 | if (test_bit(hw->mac.default_vid, interface->active_vlans)) |
739 | ring->vid |= FM10K_VLAN_CLEAR; | |
740 | ||
3abaae42 AD |
741 | /* Map interrupt */ |
742 | if (ring->q_vector) { | |
743 | rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); | |
744 | rxint |= FM10K_INT_MAP_TIMER1; | |
745 | } | |
746 | ||
747 | fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint); | |
748 | ||
749 | /* enable queue */ | |
750 | fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl); | |
b101c962 AD |
751 | |
752 | /* place buffers on ring for receive data */ | |
753 | fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring)); | |
3abaae42 AD |
754 | } |
755 | ||
756 | /** | |
757 | * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings | |
758 | * @interface: board private structure | |
759 | * | |
760 | * Configure the drop enable bits for the Rx rings. | |
761 | **/ | |
762 | void fm10k_update_rx_drop_en(struct fm10k_intfc *interface) | |
763 | { | |
764 | struct fm10k_hw *hw = &interface->hw; | |
765 | u8 rx_pause = interface->rx_pause; | |
766 | int i; | |
767 | ||
9f801abc | 768 | #ifdef CONFIG_DCB |
3abaae42 AD |
769 | if (interface->pfc_en) |
770 | rx_pause = interface->pfc_en; | |
771 | ||
772 | #endif | |
773 | for (i = 0; i < interface->num_rx_queues; i++) { | |
774 | struct fm10k_ring *ring = interface->rx_ring[i]; | |
775 | u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
776 | u8 reg_idx = ring->reg_idx; | |
777 | ||
fcdb0a99 | 778 | if (!(rx_pause & BIT(ring->qos_pc))) |
3abaae42 AD |
779 | rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; |
780 | ||
781 | fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); | |
782 | } | |
783 | } | |
784 | ||
785 | /** | |
786 | * fm10k_configure_dglort - Configure Receive DGLORT after reset | |
787 | * @interface: board private structure | |
788 | * | |
789 | * Configure the DGLORT description and RSS tables. | |
790 | **/ | |
791 | static void fm10k_configure_dglort(struct fm10k_intfc *interface) | |
792 | { | |
793 | struct fm10k_dglort_cfg dglort = { 0 }; | |
794 | struct fm10k_hw *hw = &interface->hw; | |
795 | int i; | |
796 | u32 mrqc; | |
797 | ||
798 | /* Fill out hash function seeds */ | |
799 | for (i = 0; i < FM10K_RSSRK_SIZE; i++) | |
800 | fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]); | |
801 | ||
802 | /* Write RETA table to hardware */ | |
803 | for (i = 0; i < FM10K_RETA_SIZE; i++) | |
804 | fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]); | |
805 | ||
806 | /* Generate RSS hash based on packet types, TCP/UDP | |
807 | * port numbers and/or IPv4/v6 src and dst addresses | |
808 | */ | |
809 | mrqc = FM10K_MRQC_IPV4 | | |
810 | FM10K_MRQC_TCP_IPV4 | | |
811 | FM10K_MRQC_IPV6 | | |
812 | FM10K_MRQC_TCP_IPV6; | |
813 | ||
814 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP) | |
815 | mrqc |= FM10K_MRQC_UDP_IPV4; | |
816 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP) | |
817 | mrqc |= FM10K_MRQC_UDP_IPV6; | |
818 | ||
819 | fm10k_write_reg(hw, FM10K_MRQC(0), mrqc); | |
820 | ||
821 | /* configure default DGLORT mapping for RSS/DCB */ | |
822 | dglort.inner_rss = 1; | |
823 | dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); | |
824 | dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); | |
825 | hw->mac.ops.configure_dglort_map(hw, &dglort); | |
826 | ||
827 | /* assign GLORT per queue for queue mapped testing */ | |
828 | if (interface->glort_count > 64) { | |
829 | memset(&dglort, 0, sizeof(dglort)); | |
830 | dglort.inner_rss = 1; | |
831 | dglort.glort = interface->glort + 64; | |
832 | dglort.idx = fm10k_dglort_pf_queue; | |
833 | dglort.queue_l = fls(interface->num_rx_queues - 1); | |
834 | hw->mac.ops.configure_dglort_map(hw, &dglort); | |
835 | } | |
836 | ||
837 | /* assign glort value for RSS/DCB specific to this interface */ | |
838 | memset(&dglort, 0, sizeof(dglort)); | |
839 | dglort.inner_rss = 1; | |
840 | dglort.glort = interface->glort; | |
841 | dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); | |
842 | dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); | |
843 | /* configure DGLORT mapping for RSS/DCB */ | |
844 | dglort.idx = fm10k_dglort_pf_rss; | |
5cd5e2e9 AD |
845 | if (interface->l2_accel) |
846 | dglort.shared_l = fls(interface->l2_accel->size); | |
3abaae42 AD |
847 | hw->mac.ops.configure_dglort_map(hw, &dglort); |
848 | } | |
849 | ||
850 | /** | |
851 | * fm10k_configure_rx - Configure Receive Unit after Reset | |
852 | * @interface: board private structure | |
853 | * | |
854 | * Configure the Rx unit of the MAC after a reset. | |
855 | **/ | |
856 | static void fm10k_configure_rx(struct fm10k_intfc *interface) | |
857 | { | |
858 | int i; | |
859 | ||
860 | /* Configure SWPRI to PC map */ | |
861 | fm10k_configure_swpri_map(interface); | |
862 | ||
863 | /* Configure RSS and DGLORT map */ | |
864 | fm10k_configure_dglort(interface); | |
865 | ||
866 | /* Setup the HW Rx Head and Tail descriptor pointers */ | |
867 | for (i = 0; i < interface->num_rx_queues; i++) | |
868 | fm10k_configure_rx_ring(interface, interface->rx_ring[i]); | |
869 | ||
870 | /* possible poll here to verify that Rx rings are now enabled */ | |
871 | } | |
872 | ||
18283cad AD |
873 | static void fm10k_napi_enable_all(struct fm10k_intfc *interface) |
874 | { | |
875 | struct fm10k_q_vector *q_vector; | |
876 | int q_idx; | |
877 | ||
878 | for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { | |
879 | q_vector = interface->q_vector[q_idx]; | |
880 | napi_enable(&q_vector->napi); | |
881 | } | |
882 | } | |
883 | ||
de445199 | 884 | static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data) |
18283cad AD |
885 | { |
886 | struct fm10k_q_vector *q_vector = data; | |
887 | ||
888 | if (q_vector->rx.count || q_vector->tx.count) | |
de125aae | 889 | napi_schedule_irqoff(&q_vector->napi); |
18283cad AD |
890 | |
891 | return IRQ_HANDLED; | |
892 | } | |
893 | ||
de445199 | 894 | static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data) |
5cb8db4a AD |
895 | { |
896 | struct fm10k_intfc *interface = data; | |
897 | struct fm10k_hw *hw = &interface->hw; | |
898 | struct fm10k_mbx_info *mbx = &hw->mbx; | |
899 | ||
900 | /* re-enable mailbox interrupt and indicate 20us delay */ | |
901 | fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR), | |
1aab144c BA |
902 | (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) | |
903 | FM10K_ITR_ENABLE); | |
5cb8db4a AD |
904 | |
905 | /* service upstream mailbox */ | |
906 | if (fm10k_mbx_trylock(interface)) { | |
907 | mbx->ops.process(hw, mbx); | |
908 | fm10k_mbx_unlock(interface); | |
909 | } | |
910 | ||
f355bb51 | 911 | hw->mac.get_host_state = true; |
5cb8db4a AD |
912 | fm10k_service_event_schedule(interface); |
913 | ||
914 | return IRQ_HANDLED; | |
915 | } | |
916 | ||
8b4a98c7 JK |
917 | #ifdef CONFIG_NET_POLL_CONTROLLER |
918 | /** | |
919 | * fm10k_netpoll - A Polling 'interrupt' handler | |
920 | * @netdev: network interface device structure | |
921 | * | |
922 | * This is used by netconsole to send skbs without having to re-enable | |
923 | * interrupts. It's not called while the normal interrupt routine is executing. | |
924 | **/ | |
925 | void fm10k_netpoll(struct net_device *netdev) | |
926 | { | |
927 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
928 | int i; | |
929 | ||
930 | /* if interface is down do nothing */ | |
931 | if (test_bit(__FM10K_DOWN, &interface->state)) | |
932 | return; | |
933 | ||
934 | for (i = 0; i < interface->num_q_vectors; i++) | |
935 | fm10k_msix_clean_rings(0, interface->q_vector[i]); | |
936 | } | |
937 | ||
938 | #endif | |
18283cad | 939 | #define FM10K_ERR_MSG(type) case (type): error = #type; break |
95f4f8da | 940 | static void fm10k_handle_fault(struct fm10k_intfc *interface, int type, |
a4fcad65 | 941 | struct fm10k_fault *fault) |
18283cad AD |
942 | { |
943 | struct pci_dev *pdev = interface->pdev; | |
95f4f8da JK |
944 | struct fm10k_hw *hw = &interface->hw; |
945 | struct fm10k_iov_data *iov_data = interface->iov_data; | |
18283cad AD |
946 | char *error; |
947 | ||
948 | switch (type) { | |
949 | case FM10K_PCA_FAULT: | |
950 | switch (fault->type) { | |
951 | default: | |
952 | error = "Unknown PCA error"; | |
953 | break; | |
954 | FM10K_ERR_MSG(PCA_NO_FAULT); | |
955 | FM10K_ERR_MSG(PCA_UNMAPPED_ADDR); | |
956 | FM10K_ERR_MSG(PCA_BAD_QACCESS_PF); | |
957 | FM10K_ERR_MSG(PCA_BAD_QACCESS_VF); | |
958 | FM10K_ERR_MSG(PCA_MALICIOUS_REQ); | |
959 | FM10K_ERR_MSG(PCA_POISONED_TLP); | |
960 | FM10K_ERR_MSG(PCA_TLP_ABORT); | |
961 | } | |
962 | break; | |
963 | case FM10K_THI_FAULT: | |
964 | switch (fault->type) { | |
965 | default: | |
966 | error = "Unknown THI error"; | |
967 | break; | |
968 | FM10K_ERR_MSG(THI_NO_FAULT); | |
969 | FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT); | |
970 | } | |
971 | break; | |
972 | case FM10K_FUM_FAULT: | |
973 | switch (fault->type) { | |
974 | default: | |
975 | error = "Unknown FUM error"; | |
976 | break; | |
977 | FM10K_ERR_MSG(FUM_NO_FAULT); | |
978 | FM10K_ERR_MSG(FUM_UNMAPPED_ADDR); | |
979 | FM10K_ERR_MSG(FUM_BAD_VF_QACCESS); | |
980 | FM10K_ERR_MSG(FUM_ADD_DECODE_ERR); | |
981 | FM10K_ERR_MSG(FUM_RO_ERROR); | |
982 | FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR); | |
983 | FM10K_ERR_MSG(FUM_CSR_TIMEOUT); | |
984 | FM10K_ERR_MSG(FUM_INVALID_TYPE); | |
985 | FM10K_ERR_MSG(FUM_INVALID_LENGTH); | |
986 | FM10K_ERR_MSG(FUM_INVALID_BE); | |
987 | FM10K_ERR_MSG(FUM_INVALID_ALIGN); | |
988 | } | |
989 | break; | |
990 | default: | |
991 | error = "Undocumented fault"; | |
992 | break; | |
993 | } | |
994 | ||
995 | dev_warn(&pdev->dev, | |
996 | "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n", | |
997 | error, fault->address, fault->specinfo, | |
998 | PCI_SLOT(fault->func), PCI_FUNC(fault->func)); | |
95f4f8da JK |
999 | |
1000 | /* For VF faults, clear out the respective LPORT, reset the queue | |
1001 | * resources, and then reconnect to the mailbox. This allows the | |
1002 | * VF in question to resume behavior. For transient faults that are | |
1003 | * the result of non-malicious behavior this will log the fault and | |
1004 | * allow the VF to resume functionality. Obviously for malicious VFs | |
1005 | * they will be able to attempt malicious behavior again. In this | |
1006 | * case, the system administrator will need to step in and manually | |
1007 | * remove or disable the VF in question. | |
1008 | */ | |
1009 | if (fault->func && iov_data) { | |
1010 | int vf = fault->func - 1; | |
1011 | struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf]; | |
1012 | ||
1013 | hw->iov.ops.reset_lport(hw, vf_info); | |
1014 | hw->iov.ops.reset_resources(hw, vf_info); | |
1015 | ||
1016 | /* reset_lport disables the VF, so re-enable it */ | |
1017 | hw->iov.ops.set_lport(hw, vf_info, vf, | |
1018 | FM10K_VF_FLAG_MULTI_CAPABLE); | |
1019 | ||
1020 | /* reset_resources will disconnect from the mbx */ | |
1021 | vf_info->mbx.ops.connect(hw, &vf_info->mbx); | |
1022 | } | |
18283cad AD |
1023 | } |
1024 | ||
1025 | static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr) | |
1026 | { | |
1027 | struct fm10k_hw *hw = &interface->hw; | |
1028 | struct fm10k_fault fault = { 0 }; | |
1029 | int type, err; | |
1030 | ||
1031 | for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT; | |
1032 | eicr; | |
1033 | eicr >>= 1, type += FM10K_FAULT_SIZE) { | |
1034 | /* only check if there is an error reported */ | |
1035 | if (!(eicr & 0x1)) | |
1036 | continue; | |
1037 | ||
1038 | /* retrieve fault info */ | |
1039 | err = hw->mac.ops.get_fault(hw, type, &fault); | |
1040 | if (err) { | |
1041 | dev_err(&interface->pdev->dev, | |
1042 | "error reading fault\n"); | |
1043 | continue; | |
1044 | } | |
1045 | ||
95f4f8da | 1046 | fm10k_handle_fault(interface, type, &fault); |
18283cad AD |
1047 | } |
1048 | } | |
1049 | ||
1050 | static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr) | |
1051 | { | |
1052 | struct fm10k_hw *hw = &interface->hw; | |
1053 | const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
1054 | u32 maxholdq; | |
1055 | int q; | |
1056 | ||
1057 | if (!(eicr & FM10K_EICR_MAXHOLDTIME)) | |
1058 | return; | |
1059 | ||
1060 | maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7)); | |
1061 | if (maxholdq) | |
1062 | fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq); | |
1063 | for (q = 255;;) { | |
fcdb0a99 | 1064 | if (maxholdq & BIT(31)) { |
18283cad AD |
1065 | if (q < FM10K_MAX_QUEUES_PF) { |
1066 | interface->rx_overrun_pf++; | |
1067 | fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl); | |
1068 | } else { | |
1069 | interface->rx_overrun_vf++; | |
1070 | } | |
1071 | } | |
1072 | ||
1073 | maxholdq *= 2; | |
1074 | if (!maxholdq) | |
1075 | q &= ~(32 - 1); | |
1076 | ||
1077 | if (!q) | |
1078 | break; | |
1079 | ||
1080 | if (q-- % 32) | |
1081 | continue; | |
1082 | ||
1083 | maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32)); | |
1084 | if (maxholdq) | |
1085 | fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq); | |
1086 | } | |
1087 | } | |
1088 | ||
de445199 | 1089 | static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data) |
18283cad AD |
1090 | { |
1091 | struct fm10k_intfc *interface = data; | |
1092 | struct fm10k_hw *hw = &interface->hw; | |
1093 | struct fm10k_mbx_info *mbx = &hw->mbx; | |
1094 | u32 eicr; | |
1095 | ||
1096 | /* unmask any set bits related to this interrupt */ | |
1097 | eicr = fm10k_read_reg(hw, FM10K_EICR); | |
1098 | fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX | | |
1099 | FM10K_EICR_SWITCHREADY | | |
1100 | FM10K_EICR_SWITCHNOTREADY)); | |
1101 | ||
1102 | /* report any faults found to the message log */ | |
1103 | fm10k_report_fault(interface, eicr); | |
1104 | ||
1105 | /* reset any queues disabled due to receiver overrun */ | |
1106 | fm10k_reset_drop_on_empty(interface, eicr); | |
1107 | ||
1108 | /* service mailboxes */ | |
1109 | if (fm10k_mbx_trylock(interface)) { | |
1110 | mbx->ops.process(hw, mbx); | |
9de15bda | 1111 | /* handle VFLRE events */ |
883a9ccb | 1112 | fm10k_iov_event(interface); |
18283cad AD |
1113 | fm10k_mbx_unlock(interface); |
1114 | } | |
1115 | ||
b7d8514c AD |
1116 | /* if switch toggled state we should reset GLORTs */ |
1117 | if (eicr & FM10K_EICR_SWITCHNOTREADY) { | |
1118 | /* force link down for at least 4 seconds */ | |
1119 | interface->link_down_event = jiffies + (4 * HZ); | |
1120 | set_bit(__FM10K_LINK_DOWN, &interface->state); | |
1121 | ||
1122 | /* reset dglort_map back to no config */ | |
1123 | hw->mac.dglort_map = FM10K_DGLORTMAP_NONE; | |
1124 | } | |
1125 | ||
1126 | /* we should validate host state after interrupt event */ | |
f355bb51 | 1127 | hw->mac.get_host_state = true; |
9de15bda JK |
1128 | |
1129 | /* validate host state, and handle VF mailboxes in the service task */ | |
b7d8514c AD |
1130 | fm10k_service_event_schedule(interface); |
1131 | ||
18283cad AD |
1132 | /* re-enable mailbox interrupt and indicate 20us delay */ |
1133 | fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR), | |
1aab144c BA |
1134 | (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) | |
1135 | FM10K_ITR_ENABLE); | |
18283cad AD |
1136 | |
1137 | return IRQ_HANDLED; | |
1138 | } | |
1139 | ||
1140 | void fm10k_mbx_free_irq(struct fm10k_intfc *interface) | |
1141 | { | |
18283cad | 1142 | struct fm10k_hw *hw = &interface->hw; |
de66c610 | 1143 | struct msix_entry *entry; |
18283cad AD |
1144 | int itr_reg; |
1145 | ||
e00e23bc AD |
1146 | /* no mailbox IRQ to free if MSI-X is not enabled */ |
1147 | if (!interface->msix_entries) | |
1148 | return; | |
1149 | ||
de66c610 JK |
1150 | entry = &interface->msix_entries[FM10K_MBX_VECTOR]; |
1151 | ||
18283cad AD |
1152 | /* disconnect the mailbox */ |
1153 | hw->mbx.ops.disconnect(hw, &hw->mbx); | |
1154 | ||
1155 | /* disable Mailbox cause */ | |
1156 | if (hw->mac.type == fm10k_mac_pf) { | |
1157 | fm10k_write_reg(hw, FM10K_EIMR, | |
1158 | FM10K_EIMR_DISABLE(PCA_FAULT) | | |
1159 | FM10K_EIMR_DISABLE(FUM_FAULT) | | |
1160 | FM10K_EIMR_DISABLE(MAILBOX) | | |
1161 | FM10K_EIMR_DISABLE(SWITCHREADY) | | |
1162 | FM10K_EIMR_DISABLE(SWITCHNOTREADY) | | |
1163 | FM10K_EIMR_DISABLE(SRAMERROR) | | |
1164 | FM10K_EIMR_DISABLE(VFLR) | | |
1165 | FM10K_EIMR_DISABLE(MAXHOLDTIME)); | |
1166 | itr_reg = FM10K_ITR(FM10K_MBX_VECTOR); | |
5cb8db4a AD |
1167 | } else { |
1168 | itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR); | |
18283cad AD |
1169 | } |
1170 | ||
1171 | fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET); | |
1172 | ||
1173 | free_irq(entry->vector, interface); | |
1174 | } | |
1175 | ||
5cb8db4a AD |
1176 | static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results, |
1177 | struct fm10k_mbx_info *mbx) | |
1178 | { | |
1179 | bool vlan_override = hw->mac.vlan_override; | |
1180 | u16 default_vid = hw->mac.default_vid; | |
1181 | struct fm10k_intfc *interface; | |
1182 | s32 err; | |
1183 | ||
1184 | err = fm10k_msg_mac_vlan_vf(hw, results, mbx); | |
1185 | if (err) | |
1186 | return err; | |
1187 | ||
1188 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1189 | ||
1190 | /* MAC was changed so we need reset */ | |
1191 | if (is_valid_ether_addr(hw->mac.perm_addr) && | |
6186ddf0 | 1192 | !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr)) |
5cb8db4a AD |
1193 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; |
1194 | ||
1195 | /* VLAN override was changed, or default VLAN changed */ | |
1196 | if ((vlan_override != hw->mac.vlan_override) || | |
1197 | (default_vid != hw->mac.default_vid)) | |
1198 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1199 | ||
1200 | return 0; | |
1201 | } | |
1202 | ||
18283cad AD |
1203 | /* generic error handler for mailbox issues */ |
1204 | static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results, | |
de445199 | 1205 | struct fm10k_mbx_info __always_unused *mbx) |
18283cad AD |
1206 | { |
1207 | struct fm10k_intfc *interface; | |
1208 | struct pci_dev *pdev; | |
1209 | ||
1210 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1211 | pdev = interface->pdev; | |
1212 | ||
1213 | dev_err(&pdev->dev, "Unknown message ID %u\n", | |
1214 | **results & FM10K_TLV_ID_MASK); | |
1215 | ||
1216 | return 0; | |
1217 | } | |
1218 | ||
5cb8db4a AD |
1219 | static const struct fm10k_msg_data vf_mbx_data[] = { |
1220 | FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test), | |
1221 | FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr), | |
1222 | FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf), | |
1223 | FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), | |
1224 | }; | |
1225 | ||
1226 | static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface) | |
1227 | { | |
1228 | struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; | |
1229 | struct net_device *dev = interface->netdev; | |
1230 | struct fm10k_hw *hw = &interface->hw; | |
1231 | int err; | |
1232 | ||
1233 | /* Use timer0 for interrupt moderation on the mailbox */ | |
1aab144c | 1234 | u32 itr = entry->entry | FM10K_INT_MAP_TIMER0; |
5cb8db4a AD |
1235 | |
1236 | /* register mailbox handlers */ | |
1237 | err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data); | |
1238 | if (err) | |
1239 | return err; | |
1240 | ||
1241 | /* request the IRQ */ | |
1242 | err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0, | |
1243 | dev->name, interface); | |
1244 | if (err) { | |
1245 | netif_err(interface, probe, dev, | |
1246 | "request_irq for msix_mbx failed: %d\n", err); | |
1247 | return err; | |
1248 | } | |
1249 | ||
1250 | /* map all of the interrupt sources */ | |
1251 | fm10k_write_reg(hw, FM10K_VFINT_MAP, itr); | |
1252 | ||
1253 | /* enable interrupt */ | |
1254 | fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE); | |
1255 | ||
1256 | return 0; | |
1257 | } | |
1258 | ||
18283cad AD |
1259 | static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results, |
1260 | struct fm10k_mbx_info *mbx) | |
1261 | { | |
1262 | struct fm10k_intfc *interface; | |
1263 | u32 dglort_map = hw->mac.dglort_map; | |
1264 | s32 err; | |
1265 | ||
a7a7783a JK |
1266 | interface = container_of(hw, struct fm10k_intfc, hw); |
1267 | ||
1268 | err = fm10k_msg_err_pf(hw, results, mbx); | |
1269 | if (!err && hw->swapi.status) { | |
1270 | /* force link down for a reasonable delay */ | |
1271 | interface->link_down_event = jiffies + (2 * HZ); | |
1272 | set_bit(__FM10K_LINK_DOWN, &interface->state); | |
1273 | ||
1274 | /* reset dglort_map back to no config */ | |
1275 | hw->mac.dglort_map = FM10K_DGLORTMAP_NONE; | |
1276 | ||
1277 | fm10k_service_event_schedule(interface); | |
1278 | ||
1279 | /* prevent overloading kernel message buffer */ | |
1280 | if (interface->lport_map_failed) | |
1281 | return 0; | |
1282 | ||
1283 | interface->lport_map_failed = true; | |
1284 | ||
1285 | if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED) | |
1286 | dev_warn(&interface->pdev->dev, | |
1287 | "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n"); | |
1288 | dev_warn(&interface->pdev->dev, | |
1289 | "request logical port map failed: %d\n", | |
1290 | hw->swapi.status); | |
1291 | ||
1292 | return 0; | |
1293 | } | |
1294 | ||
18283cad AD |
1295 | err = fm10k_msg_lport_map_pf(hw, results, mbx); |
1296 | if (err) | |
1297 | return err; | |
1298 | ||
a7a7783a | 1299 | interface->lport_map_failed = false; |
18283cad AD |
1300 | |
1301 | /* we need to reset if port count was just updated */ | |
1302 | if (dglort_map != hw->mac.dglort_map) | |
1303 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1304 | ||
1305 | return 0; | |
1306 | } | |
1307 | ||
1308 | static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results, | |
de445199 | 1309 | struct fm10k_mbx_info __always_unused *mbx) |
18283cad AD |
1310 | { |
1311 | struct fm10k_intfc *interface; | |
1312 | u16 glort, pvid; | |
1313 | u32 pvid_update; | |
1314 | s32 err; | |
1315 | ||
1316 | err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID], | |
1317 | &pvid_update); | |
1318 | if (err) | |
1319 | return err; | |
1320 | ||
1321 | /* extract values from the pvid update */ | |
1322 | glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT); | |
1323 | pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID); | |
1324 | ||
1325 | /* if glort is not valid return error */ | |
1326 | if (!fm10k_glort_valid_pf(hw, glort)) | |
1327 | return FM10K_ERR_PARAM; | |
1328 | ||
aa502b4a | 1329 | /* verify VLAN ID is valid */ |
18283cad AD |
1330 | if (pvid >= FM10K_VLAN_TABLE_VID_MAX) |
1331 | return FM10K_ERR_PARAM; | |
1332 | ||
1333 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1334 | ||
883a9ccb AD |
1335 | /* check to see if this belongs to one of the VFs */ |
1336 | err = fm10k_iov_update_pvid(interface, glort, pvid); | |
1337 | if (!err) | |
1338 | return 0; | |
1339 | ||
18283cad AD |
1340 | /* we need to reset if default VLAN was just updated */ |
1341 | if (pvid != hw->mac.default_vid) | |
1342 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1343 | ||
1344 | hw->mac.default_vid = pvid; | |
1345 | ||
1346 | return 0; | |
1347 | } | |
1348 | ||
1349 | static const struct fm10k_msg_data pf_mbx_data[] = { | |
1350 | FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf), | |
1351 | FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf), | |
1352 | FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map), | |
1353 | FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf), | |
1354 | FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf), | |
1355 | FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid), | |
1356 | FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), | |
1357 | }; | |
1358 | ||
1359 | static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface) | |
1360 | { | |
1361 | struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; | |
1362 | struct net_device *dev = interface->netdev; | |
1363 | struct fm10k_hw *hw = &interface->hw; | |
1364 | int err; | |
1365 | ||
1366 | /* Use timer0 for interrupt moderation on the mailbox */ | |
1aab144c BA |
1367 | u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0; |
1368 | u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE; | |
18283cad AD |
1369 | |
1370 | /* register mailbox handlers */ | |
1371 | err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data); | |
1372 | if (err) | |
1373 | return err; | |
1374 | ||
1375 | /* request the IRQ */ | |
1376 | err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0, | |
1377 | dev->name, interface); | |
1378 | if (err) { | |
1379 | netif_err(interface, probe, dev, | |
1380 | "request_irq for msix_mbx failed: %d\n", err); | |
1381 | return err; | |
1382 | } | |
1383 | ||
1384 | /* Enable interrupts w/ no moderation for "other" interrupts */ | |
40423dd2 JK |
1385 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr); |
1386 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr); | |
1387 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr); | |
1388 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr); | |
1389 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr); | |
18283cad AD |
1390 | |
1391 | /* Enable interrupts w/ moderation for mailbox */ | |
40423dd2 | 1392 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr); |
18283cad AD |
1393 | |
1394 | /* Enable individual interrupt causes */ | |
1395 | fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) | | |
1396 | FM10K_EIMR_ENABLE(FUM_FAULT) | | |
1397 | FM10K_EIMR_ENABLE(MAILBOX) | | |
1398 | FM10K_EIMR_ENABLE(SWITCHREADY) | | |
1399 | FM10K_EIMR_ENABLE(SWITCHNOTREADY) | | |
1400 | FM10K_EIMR_ENABLE(SRAMERROR) | | |
1401 | FM10K_EIMR_ENABLE(VFLR) | | |
1402 | FM10K_EIMR_ENABLE(MAXHOLDTIME)); | |
1403 | ||
1404 | /* enable interrupt */ | |
1405 | fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE); | |
1406 | ||
1407 | return 0; | |
1408 | } | |
1409 | ||
1410 | int fm10k_mbx_request_irq(struct fm10k_intfc *interface) | |
1411 | { | |
1412 | struct fm10k_hw *hw = &interface->hw; | |
1413 | int err; | |
1414 | ||
1415 | /* enable Mailbox cause */ | |
5cb8db4a AD |
1416 | if (hw->mac.type == fm10k_mac_pf) |
1417 | err = fm10k_mbx_request_irq_pf(interface); | |
1418 | else | |
1419 | err = fm10k_mbx_request_irq_vf(interface); | |
e00e23bc AD |
1420 | if (err) |
1421 | return err; | |
18283cad AD |
1422 | |
1423 | /* connect mailbox */ | |
e00e23bc AD |
1424 | err = hw->mbx.ops.connect(hw, &hw->mbx); |
1425 | ||
1426 | /* if the mailbox failed to connect, then free IRQ */ | |
1427 | if (err) | |
1428 | fm10k_mbx_free_irq(interface); | |
18283cad AD |
1429 | |
1430 | return err; | |
1431 | } | |
1432 | ||
1433 | /** | |
1434 | * fm10k_qv_free_irq - release interrupts associated with queue vectors | |
1435 | * @interface: board private structure | |
1436 | * | |
1437 | * Release all interrupts associated with this interface | |
1438 | **/ | |
1439 | void fm10k_qv_free_irq(struct fm10k_intfc *interface) | |
1440 | { | |
1441 | int vector = interface->num_q_vectors; | |
1442 | struct fm10k_hw *hw = &interface->hw; | |
1443 | struct msix_entry *entry; | |
1444 | ||
1445 | entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector]; | |
1446 | ||
1447 | while (vector) { | |
1448 | struct fm10k_q_vector *q_vector; | |
1449 | ||
1450 | vector--; | |
1451 | entry--; | |
1452 | q_vector = interface->q_vector[vector]; | |
1453 | ||
1454 | if (!q_vector->tx.count && !q_vector->rx.count) | |
1455 | continue; | |
1456 | ||
504b0fdf JK |
1457 | /* clear the affinity_mask in the IRQ descriptor */ |
1458 | irq_set_affinity_hint(entry->vector, NULL); | |
18283cad | 1459 | |
504b0fdf | 1460 | /* disable interrupts */ |
18283cad AD |
1461 | writel(FM10K_ITR_MASK_SET, q_vector->itr); |
1462 | ||
1463 | free_irq(entry->vector, q_vector); | |
1464 | } | |
1465 | } | |
1466 | ||
1467 | /** | |
1468 | * fm10k_qv_request_irq - initialize interrupts for queue vectors | |
1469 | * @interface: board private structure | |
1470 | * | |
1471 | * Attempts to configure interrupts using the best available | |
1472 | * capabilities of the hardware and kernel. | |
1473 | **/ | |
1474 | int fm10k_qv_request_irq(struct fm10k_intfc *interface) | |
1475 | { | |
1476 | struct net_device *dev = interface->netdev; | |
1477 | struct fm10k_hw *hw = &interface->hw; | |
1478 | struct msix_entry *entry; | |
1479 | int ri = 0, ti = 0; | |
1480 | int vector, err; | |
1481 | ||
1482 | entry = &interface->msix_entries[NON_Q_VECTORS(hw)]; | |
1483 | ||
1484 | for (vector = 0; vector < interface->num_q_vectors; vector++) { | |
1485 | struct fm10k_q_vector *q_vector = interface->q_vector[vector]; | |
1486 | ||
1487 | /* name the vector */ | |
1488 | if (q_vector->tx.count && q_vector->rx.count) { | |
1489 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1490 | "%s-TxRx-%d", dev->name, ri++); | |
1491 | ti++; | |
1492 | } else if (q_vector->rx.count) { | |
1493 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1494 | "%s-rx-%d", dev->name, ri++); | |
1495 | } else if (q_vector->tx.count) { | |
1496 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1497 | "%s-tx-%d", dev->name, ti++); | |
1498 | } else { | |
1499 | /* skip this unused q_vector */ | |
1500 | continue; | |
1501 | } | |
1502 | ||
1503 | /* Assign ITR register to q_vector */ | |
5cb8db4a AD |
1504 | q_vector->itr = (hw->mac.type == fm10k_mac_pf) ? |
1505 | &interface->uc_addr[FM10K_ITR(entry->entry)] : | |
1506 | &interface->uc_addr[FM10K_VFITR(entry->entry)]; | |
18283cad AD |
1507 | |
1508 | /* request the IRQ */ | |
1509 | err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0, | |
1510 | q_vector->name, q_vector); | |
1511 | if (err) { | |
1512 | netif_err(interface, probe, dev, | |
1513 | "request_irq failed for MSIX interrupt Error: %d\n", | |
1514 | err); | |
1515 | goto err_out; | |
1516 | } | |
1517 | ||
504b0fdf JK |
1518 | /* assign the mask for this irq */ |
1519 | irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask); | |
1520 | ||
18283cad AD |
1521 | /* Enable q_vector */ |
1522 | writel(FM10K_ITR_ENABLE, q_vector->itr); | |
1523 | ||
1524 | entry++; | |
1525 | } | |
1526 | ||
1527 | return 0; | |
1528 | ||
1529 | err_out: | |
1530 | /* wind through the ring freeing all entries and vectors */ | |
1531 | while (vector) { | |
1532 | struct fm10k_q_vector *q_vector; | |
1533 | ||
1534 | entry--; | |
1535 | vector--; | |
1536 | q_vector = interface->q_vector[vector]; | |
1537 | ||
1538 | if (!q_vector->tx.count && !q_vector->rx.count) | |
1539 | continue; | |
1540 | ||
504b0fdf JK |
1541 | /* clear the affinity_mask in the IRQ descriptor */ |
1542 | irq_set_affinity_hint(entry->vector, NULL); | |
18283cad | 1543 | |
504b0fdf | 1544 | /* disable interrupts */ |
18283cad AD |
1545 | writel(FM10K_ITR_MASK_SET, q_vector->itr); |
1546 | ||
1547 | free_irq(entry->vector, q_vector); | |
1548 | } | |
1549 | ||
1550 | return err; | |
1551 | } | |
1552 | ||
504c5eac AD |
1553 | void fm10k_up(struct fm10k_intfc *interface) |
1554 | { | |
1555 | struct fm10k_hw *hw = &interface->hw; | |
1556 | ||
1557 | /* Enable Tx/Rx DMA */ | |
1558 | hw->mac.ops.start_hw(hw); | |
1559 | ||
3abaae42 AD |
1560 | /* configure Tx descriptor rings */ |
1561 | fm10k_configure_tx(interface); | |
1562 | ||
1563 | /* configure Rx descriptor rings */ | |
1564 | fm10k_configure_rx(interface); | |
1565 | ||
504c5eac AD |
1566 | /* configure interrupts */ |
1567 | hw->mac.ops.update_int_moderator(hw); | |
1568 | ||
1569 | /* clear down bit to indicate we are ready to go */ | |
1570 | clear_bit(__FM10K_DOWN, &interface->state); | |
1571 | ||
18283cad AD |
1572 | /* enable polling cleanups */ |
1573 | fm10k_napi_enable_all(interface); | |
1574 | ||
504c5eac AD |
1575 | /* re-establish Rx filters */ |
1576 | fm10k_restore_rx_state(interface); | |
1577 | ||
1578 | /* enable transmits */ | |
1579 | netif_tx_start_all_queues(interface->netdev); | |
b7d8514c | 1580 | |
54b3c9cf | 1581 | /* kick off the service timer now */ |
f355bb51 | 1582 | hw->mac.get_host_state = true; |
b7d8514c | 1583 | mod_timer(&interface->service_timer, jiffies); |
504c5eac AD |
1584 | } |
1585 | ||
18283cad AD |
1586 | static void fm10k_napi_disable_all(struct fm10k_intfc *interface) |
1587 | { | |
1588 | struct fm10k_q_vector *q_vector; | |
1589 | int q_idx; | |
1590 | ||
1591 | for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { | |
1592 | q_vector = interface->q_vector[q_idx]; | |
1593 | napi_disable(&q_vector->napi); | |
1594 | } | |
1595 | } | |
1596 | ||
504c5eac AD |
1597 | void fm10k_down(struct fm10k_intfc *interface) |
1598 | { | |
1599 | struct net_device *netdev = interface->netdev; | |
1600 | struct fm10k_hw *hw = &interface->hw; | |
61e0217e | 1601 | int err; |
504c5eac AD |
1602 | |
1603 | /* signal that we are down to the interrupt handler and service task */ | |
1b00c6c0 JK |
1604 | if (test_and_set_bit(__FM10K_DOWN, &interface->state)) |
1605 | return; | |
504c5eac AD |
1606 | |
1607 | /* call carrier off first to avoid false dev_watchdog timeouts */ | |
1608 | netif_carrier_off(netdev); | |
1609 | ||
1610 | /* disable transmits */ | |
1611 | netif_tx_stop_all_queues(netdev); | |
1612 | netif_tx_disable(netdev); | |
1613 | ||
1614 | /* reset Rx filters */ | |
1615 | fm10k_reset_rx_state(interface); | |
1616 | ||
1617 | /* allow 10ms for device to quiesce */ | |
1618 | usleep_range(10000, 20000); | |
1619 | ||
18283cad AD |
1620 | /* disable polling routines */ |
1621 | fm10k_napi_disable_all(interface); | |
1622 | ||
b7d8514c AD |
1623 | /* capture stats one last time before stopping interface */ |
1624 | fm10k_update_stats(interface); | |
1625 | ||
504c5eac | 1626 | /* Disable DMA engine for Tx/Rx */ |
61e0217e JK |
1627 | err = hw->mac.ops.stop_hw(hw); |
1628 | if (err) | |
1629 | dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err); | |
3abaae42 AD |
1630 | |
1631 | /* free any buffers still on the rings */ | |
1632 | fm10k_clean_all_tx_rings(interface); | |
ec6acb80 | 1633 | fm10k_clean_all_rx_rings(interface); |
504c5eac AD |
1634 | } |
1635 | ||
0e7b3644 AD |
1636 | /** |
1637 | * fm10k_sw_init - Initialize general software structures | |
1638 | * @interface: host interface private structure to initialize | |
1639 | * | |
1640 | * fm10k_sw_init initializes the interface private data structure. | |
1641 | * Fields are initialized based on PCI device information and | |
1642 | * OS network device settings (MTU size). | |
1643 | **/ | |
1644 | static int fm10k_sw_init(struct fm10k_intfc *interface, | |
1645 | const struct pci_device_id *ent) | |
1646 | { | |
0e7b3644 AD |
1647 | const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data]; |
1648 | struct fm10k_hw *hw = &interface->hw; | |
1649 | struct pci_dev *pdev = interface->pdev; | |
1650 | struct net_device *netdev = interface->netdev; | |
c41a4fba | 1651 | u32 rss_key[FM10K_RSSRK_SIZE]; |
0e7b3644 AD |
1652 | unsigned int rss; |
1653 | int err; | |
1654 | ||
1655 | /* initialize back pointer */ | |
1656 | hw->back = interface; | |
1657 | hw->hw_addr = interface->uc_addr; | |
1658 | ||
1659 | /* PCI config space info */ | |
1660 | hw->vendor_id = pdev->vendor; | |
1661 | hw->device_id = pdev->device; | |
1662 | hw->revision_id = pdev->revision; | |
1663 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1664 | hw->subsystem_device_id = pdev->subsystem_device; | |
1665 | ||
1666 | /* Setup hw api */ | |
1667 | memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops)); | |
1668 | hw->mac.type = fi->mac; | |
1669 | ||
883a9ccb AD |
1670 | /* Setup IOV handlers */ |
1671 | if (fi->iov_ops) | |
1672 | memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops)); | |
1673 | ||
0e7b3644 AD |
1674 | /* Set common capability flags and settings */ |
1675 | rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus()); | |
1676 | interface->ring_feature[RING_F_RSS].limit = rss; | |
1677 | fi->get_invariants(hw); | |
1678 | ||
1679 | /* pick up the PCIe bus settings for reporting later */ | |
1680 | if (hw->mac.ops.get_bus_info) | |
1681 | hw->mac.ops.get_bus_info(hw); | |
1682 | ||
1683 | /* limit the usable DMA range */ | |
1684 | if (hw->mac.ops.set_dma_mask) | |
1685 | hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev)); | |
1686 | ||
1687 | /* update netdev with DMA restrictions */ | |
1688 | if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) { | |
1689 | netdev->features |= NETIF_F_HIGHDMA; | |
1690 | netdev->vlan_features |= NETIF_F_HIGHDMA; | |
1691 | } | |
1692 | ||
b7d8514c AD |
1693 | /* delay any future reset requests */ |
1694 | interface->last_reset = jiffies + (10 * HZ); | |
1695 | ||
0e7b3644 | 1696 | /* reset and initialize the hardware so it is in a known state */ |
1343c65f JK |
1697 | err = hw->mac.ops.reset_hw(hw); |
1698 | if (err) { | |
1699 | dev_err(&pdev->dev, "reset_hw failed: %d\n", err); | |
1700 | return err; | |
1701 | } | |
1702 | ||
1703 | err = hw->mac.ops.init_hw(hw); | |
0e7b3644 AD |
1704 | if (err) { |
1705 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
1706 | return err; | |
1707 | } | |
1708 | ||
1709 | /* initialize hardware statistics */ | |
1710 | hw->mac.ops.update_hw_stats(hw, &interface->stats); | |
1711 | ||
883a9ccb AD |
1712 | /* Set upper limit on IOV VFs that can be allocated */ |
1713 | pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs); | |
1714 | ||
0e7b3644 AD |
1715 | /* Start with random Ethernet address */ |
1716 | eth_random_addr(hw->mac.addr); | |
1717 | ||
1718 | /* Initialize MAC address from hardware */ | |
1719 | err = hw->mac.ops.read_mac_addr(hw); | |
1720 | if (err) { | |
1721 | dev_warn(&pdev->dev, | |
1722 | "Failed to obtain MAC address defaulting to random\n"); | |
1723 | /* tag address assignment as random */ | |
1724 | netdev->addr_assign_type |= NET_ADDR_RANDOM; | |
1725 | } | |
1726 | ||
11c49f79 BA |
1727 | ether_addr_copy(netdev->dev_addr, hw->mac.addr); |
1728 | ether_addr_copy(netdev->perm_addr, hw->mac.addr); | |
0e7b3644 AD |
1729 | |
1730 | if (!is_valid_ether_addr(netdev->perm_addr)) { | |
1731 | dev_err(&pdev->dev, "Invalid MAC Address\n"); | |
1732 | return -EIO; | |
1733 | } | |
1734 | ||
9f801abc AD |
1735 | /* initialize DCBNL interface */ |
1736 | fm10k_dcbnl_set_ops(netdev); | |
1737 | ||
e27ef599 AD |
1738 | /* set default ring sizes */ |
1739 | interface->tx_ring_count = FM10K_DEFAULT_TXD; | |
1740 | interface->rx_ring_count = FM10K_DEFAULT_RXD; | |
1741 | ||
18283cad | 1742 | /* set default interrupt moderation */ |
436ea956 JK |
1743 | interface->tx_itr = FM10K_TX_ITR_DEFAULT; |
1744 | interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT; | |
18283cad | 1745 | |
0e7b3644 AD |
1746 | /* initialize vxlan_port list */ |
1747 | INIT_LIST_HEAD(&interface->vxlan_port); | |
1748 | ||
c41a4fba ED |
1749 | netdev_rss_key_fill(rss_key, sizeof(rss_key)); |
1750 | memcpy(interface->rssrk, rss_key, sizeof(rss_key)); | |
0e7b3644 AD |
1751 | |
1752 | /* Start off interface as being down */ | |
1753 | set_bit(__FM10K_DOWN, &interface->state); | |
1754 | ||
1755 | return 0; | |
1756 | } | |
1757 | ||
1758 | static void fm10k_slot_warn(struct fm10k_intfc *interface) | |
1759 | { | |
106c07a4 JK |
1760 | enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN; |
1761 | enum pci_bus_speed speed = PCI_SPEED_UNKNOWN; | |
0e7b3644 | 1762 | struct fm10k_hw *hw = &interface->hw; |
106c07a4 | 1763 | int max_gts = 0, expected_gts = 0; |
0e7b3644 | 1764 | |
106c07a4 JK |
1765 | if (pcie_get_minimum_link(interface->pdev, &speed, &width) || |
1766 | speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) { | |
1767 | dev_warn(&interface->pdev->dev, | |
1768 | "Unable to determine PCI Express bandwidth.\n"); | |
0e7b3644 | 1769 | return; |
106c07a4 JK |
1770 | } |
1771 | ||
1772 | switch (speed) { | |
1773 | case PCIE_SPEED_2_5GT: | |
1774 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1775 | max_gts = 2 * width; | |
1776 | break; | |
1777 | case PCIE_SPEED_5_0GT: | |
1778 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1779 | max_gts = 4 * width; | |
1780 | break; | |
1781 | case PCIE_SPEED_8_0GT: | |
1782 | /* 128b/130b encoding has less than 2% impact on throughput */ | |
1783 | max_gts = 8 * width; | |
1784 | break; | |
1785 | default: | |
1786 | dev_warn(&interface->pdev->dev, | |
1787 | "Unable to determine PCI Express bandwidth.\n"); | |
1788 | return; | |
1789 | } | |
1790 | ||
1791 | dev_info(&interface->pdev->dev, | |
1792 | "PCI Express bandwidth of %dGT/s available\n", | |
1793 | max_gts); | |
1794 | dev_info(&interface->pdev->dev, | |
1795 | "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n", | |
1796 | (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" : | |
1797 | speed == PCIE_SPEED_5_0GT ? "5.0GT/s" : | |
1798 | speed == PCIE_SPEED_2_5GT ? "2.5GT/s" : | |
1799 | "Unknown"), | |
1800 | hw->bus.width, | |
1801 | (speed == PCIE_SPEED_2_5GT ? "20%" : | |
1802 | speed == PCIE_SPEED_5_0GT ? "20%" : | |
1803 | speed == PCIE_SPEED_8_0GT ? "<2%" : | |
1804 | "Unknown"), | |
1805 | (hw->bus.payload == fm10k_bus_payload_128 ? "128B" : | |
1806 | hw->bus.payload == fm10k_bus_payload_256 ? "256B" : | |
1807 | hw->bus.payload == fm10k_bus_payload_512 ? "512B" : | |
1808 | "Unknown")); | |
0e7b3644 | 1809 | |
106c07a4 JK |
1810 | switch (hw->bus_caps.speed) { |
1811 | case fm10k_bus_speed_2500: | |
1812 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1813 | expected_gts = 2 * hw->bus_caps.width; | |
1814 | break; | |
1815 | case fm10k_bus_speed_5000: | |
1816 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1817 | expected_gts = 4 * hw->bus_caps.width; | |
1818 | break; | |
1819 | case fm10k_bus_speed_8000: | |
1820 | /* 128b/130b encoding has less than 2% impact on throughput */ | |
1821 | expected_gts = 8 * hw->bus_caps.width; | |
1822 | break; | |
1823 | default: | |
1824 | dev_warn(&interface->pdev->dev, | |
1825 | "Unable to determine expected PCI Express bandwidth.\n"); | |
1826 | return; | |
1827 | } | |
1828 | ||
3d02b3df BA |
1829 | if (max_gts >= expected_gts) |
1830 | return; | |
1831 | ||
1832 | dev_warn(&interface->pdev->dev, | |
1833 | "This device requires %dGT/s of bandwidth for optimal performance.\n", | |
1834 | expected_gts); | |
1835 | dev_warn(&interface->pdev->dev, | |
1836 | "A %sslot with x%d lanes is suggested.\n", | |
1837 | (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " : | |
1838 | hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " : | |
1839 | hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""), | |
1840 | hw->bus_caps.width); | |
0e7b3644 AD |
1841 | } |
1842 | ||
b3890e30 AD |
1843 | /** |
1844 | * fm10k_probe - Device Initialization Routine | |
1845 | * @pdev: PCI device information struct | |
1846 | * @ent: entry in fm10k_pci_tbl | |
1847 | * | |
1848 | * Returns 0 on success, negative on failure | |
1849 | * | |
1850 | * fm10k_probe initializes an interface identified by a pci_dev structure. | |
1851 | * The OS initialization, configuring of the interface private structure, | |
1852 | * and a hardware reset occur. | |
1853 | **/ | |
a4fcad65 | 1854 | static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b3890e30 | 1855 | { |
0e7b3644 AD |
1856 | struct net_device *netdev; |
1857 | struct fm10k_intfc *interface; | |
b3890e30 | 1858 | int err; |
b3890e30 AD |
1859 | |
1860 | err = pci_enable_device_mem(pdev); | |
1861 | if (err) | |
1862 | return err; | |
1863 | ||
c04ae58e JK |
1864 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); |
1865 | if (err) | |
b3890e30 | 1866 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
c04ae58e JK |
1867 | if (err) { |
1868 | dev_err(&pdev->dev, | |
1869 | "DMA configuration failed: %d\n", err); | |
1870 | goto err_dma; | |
b3890e30 AD |
1871 | } |
1872 | ||
1873 | err = pci_request_selected_regions(pdev, | |
1874 | pci_select_bars(pdev, | |
1875 | IORESOURCE_MEM), | |
1876 | fm10k_driver_name); | |
1877 | if (err) { | |
1878 | dev_err(&pdev->dev, | |
0197cde6 | 1879 | "pci_request_selected_regions failed: %d\n", err); |
b3890e30 AD |
1880 | goto err_pci_reg; |
1881 | } | |
1882 | ||
19ae1b3f AD |
1883 | pci_enable_pcie_error_reporting(pdev); |
1884 | ||
b3890e30 AD |
1885 | pci_set_master(pdev); |
1886 | pci_save_state(pdev); | |
1887 | ||
e0244903 | 1888 | netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]); |
0e7b3644 AD |
1889 | if (!netdev) { |
1890 | err = -ENOMEM; | |
1891 | goto err_alloc_netdev; | |
1892 | } | |
1893 | ||
1894 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
1895 | ||
1896 | interface = netdev_priv(netdev); | |
1897 | pci_set_drvdata(pdev, interface); | |
1898 | ||
1899 | interface->netdev = netdev; | |
1900 | interface->pdev = pdev; | |
0e7b3644 AD |
1901 | |
1902 | interface->uc_addr = ioremap(pci_resource_start(pdev, 0), | |
1903 | FM10K_UC_ADDR_SIZE); | |
1904 | if (!interface->uc_addr) { | |
1905 | err = -EIO; | |
1906 | goto err_ioremap; | |
1907 | } | |
1908 | ||
1909 | err = fm10k_sw_init(interface, ent); | |
1910 | if (err) | |
1911 | goto err_sw_init; | |
1912 | ||
7461fd91 AD |
1913 | /* enable debugfs support */ |
1914 | fm10k_dbg_intfc_init(interface); | |
1915 | ||
18283cad AD |
1916 | err = fm10k_init_queueing_scheme(interface); |
1917 | if (err) | |
1918 | goto err_sw_init; | |
1919 | ||
e72319bb JK |
1920 | /* the mbx interrupt might attempt to schedule the service task, so we |
1921 | * must ensure it is disabled since we haven't yet requested the timer | |
1922 | * or work item. | |
1923 | */ | |
1924 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
1925 | ||
18283cad AD |
1926 | err = fm10k_mbx_request_irq(interface); |
1927 | if (err) | |
1928 | goto err_mbx_interrupt; | |
1929 | ||
0e7b3644 AD |
1930 | /* final check of hardware state before registering the interface */ |
1931 | err = fm10k_hw_ready(interface); | |
1932 | if (err) | |
1933 | goto err_register; | |
1934 | ||
1935 | err = register_netdev(netdev); | |
1936 | if (err) | |
1937 | goto err_register; | |
1938 | ||
1939 | /* carrier off reporting is important to ethtool even BEFORE open */ | |
1940 | netif_carrier_off(netdev); | |
1941 | ||
1942 | /* stop all the transmit queues from transmitting until link is up */ | |
1943 | netif_tx_stop_all_queues(netdev); | |
1944 | ||
e72319bb JK |
1945 | /* Initialize service timer and service task late in order to avoid |
1946 | * cleanup issues. | |
1947 | */ | |
1948 | setup_timer(&interface->service_timer, &fm10k_service_timer, | |
1949 | (unsigned long)interface); | |
1950 | INIT_WORK(&interface->service_task, fm10k_service_task); | |
1951 | ||
1952 | /* kick off service timer now, even when interface is down */ | |
1953 | mod_timer(&interface->service_timer, (HZ * 2) + jiffies); | |
1954 | ||
0e7b3644 AD |
1955 | /* print warning for non-optimal configurations */ |
1956 | fm10k_slot_warn(interface); | |
1957 | ||
0ff36676 AD |
1958 | /* report MAC address for logging */ |
1959 | dev_info(&pdev->dev, "%pM\n", netdev->dev_addr); | |
1960 | ||
883a9ccb AD |
1961 | /* enable SR-IOV after registering netdev to enforce PF/VF ordering */ |
1962 | fm10k_iov_configure(pdev, 0); | |
1963 | ||
b7d8514c AD |
1964 | /* clear the service task disable bit to allow service task to start */ |
1965 | clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
1966 | ||
b3890e30 AD |
1967 | return 0; |
1968 | ||
0e7b3644 | 1969 | err_register: |
18283cad AD |
1970 | fm10k_mbx_free_irq(interface); |
1971 | err_mbx_interrupt: | |
1972 | fm10k_clear_queueing_scheme(interface); | |
0e7b3644 | 1973 | err_sw_init: |
a211e013 AD |
1974 | if (interface->sw_addr) |
1975 | iounmap(interface->sw_addr); | |
0e7b3644 AD |
1976 | iounmap(interface->uc_addr); |
1977 | err_ioremap: | |
1978 | free_netdev(netdev); | |
1979 | err_alloc_netdev: | |
1980 | pci_release_selected_regions(pdev, | |
1981 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
b3890e30 AD |
1982 | err_pci_reg: |
1983 | err_dma: | |
1984 | pci_disable_device(pdev); | |
1985 | return err; | |
1986 | } | |
1987 | ||
1988 | /** | |
1989 | * fm10k_remove - Device Removal Routine | |
1990 | * @pdev: PCI device information struct | |
1991 | * | |
1992 | * fm10k_remove is called by the PCI subsystem to alert the driver | |
1993 | * that it should release a PCI device. The could be caused by a | |
1994 | * Hot-Plug event, or because the driver is going to be removed from | |
1995 | * memory. | |
1996 | **/ | |
1997 | static void fm10k_remove(struct pci_dev *pdev) | |
1998 | { | |
0e7b3644 AD |
1999 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); |
2000 | struct net_device *netdev = interface->netdev; | |
2001 | ||
54b3c9cf JK |
2002 | del_timer_sync(&interface->service_timer); |
2003 | ||
b7d8514c AD |
2004 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); |
2005 | cancel_work_sync(&interface->service_task); | |
2006 | ||
0e7b3644 AD |
2007 | /* free netdev, this may bounce the interrupts due to setup_tc */ |
2008 | if (netdev->reg_state == NETREG_REGISTERED) | |
2009 | unregister_netdev(netdev); | |
2010 | ||
883a9ccb AD |
2011 | /* release VFs */ |
2012 | fm10k_iov_disable(pdev); | |
2013 | ||
18283cad AD |
2014 | /* disable mailbox interrupt */ |
2015 | fm10k_mbx_free_irq(interface); | |
2016 | ||
2017 | /* free interrupts */ | |
2018 | fm10k_clear_queueing_scheme(interface); | |
2019 | ||
7461fd91 AD |
2020 | /* remove any debugfs interfaces */ |
2021 | fm10k_dbg_intfc_exit(interface); | |
2022 | ||
a211e013 AD |
2023 | if (interface->sw_addr) |
2024 | iounmap(interface->sw_addr); | |
0e7b3644 AD |
2025 | iounmap(interface->uc_addr); |
2026 | ||
2027 | free_netdev(netdev); | |
2028 | ||
b3890e30 AD |
2029 | pci_release_selected_regions(pdev, |
2030 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
2031 | ||
19ae1b3f AD |
2032 | pci_disable_pcie_error_reporting(pdev); |
2033 | ||
b3890e30 AD |
2034 | pci_disable_device(pdev); |
2035 | } | |
2036 | ||
19ae1b3f AD |
2037 | #ifdef CONFIG_PM |
2038 | /** | |
2039 | * fm10k_resume - Restore device to pre-sleep state | |
2040 | * @pdev: PCI device information struct | |
2041 | * | |
2042 | * fm10k_resume is called after the system has powered back up from a sleep | |
2043 | * state and is ready to resume operation. This function is meant to restore | |
2044 | * the device back to its pre-sleep state. | |
2045 | **/ | |
2046 | static int fm10k_resume(struct pci_dev *pdev) | |
2047 | { | |
2048 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2049 | struct net_device *netdev = interface->netdev; | |
2050 | struct fm10k_hw *hw = &interface->hw; | |
2051 | u32 err; | |
2052 | ||
2053 | pci_set_power_state(pdev, PCI_D0); | |
2054 | pci_restore_state(pdev); | |
2055 | ||
2056 | /* pci_restore_state clears dev->state_saved so call | |
2057 | * pci_save_state to restore it. | |
2058 | */ | |
2059 | pci_save_state(pdev); | |
2060 | ||
2061 | err = pci_enable_device_mem(pdev); | |
2062 | if (err) { | |
2063 | dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); | |
2064 | return err; | |
2065 | } | |
2066 | pci_set_master(pdev); | |
2067 | ||
2068 | pci_wake_from_d3(pdev, false); | |
2069 | ||
2070 | /* refresh hw_addr in case it was dropped */ | |
2071 | hw->hw_addr = interface->uc_addr; | |
2072 | ||
2073 | /* reset hardware to known state */ | |
2074 | err = hw->mac.ops.init_hw(&interface->hw); | |
1343c65f JK |
2075 | if (err) { |
2076 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
19ae1b3f | 2077 | return err; |
1343c65f | 2078 | } |
19ae1b3f AD |
2079 | |
2080 | /* reset statistics starting values */ | |
2081 | hw->mac.ops.rebind_hw_stats(hw, &interface->stats); | |
2082 | ||
2083 | rtnl_lock(); | |
2084 | ||
2085 | err = fm10k_init_queueing_scheme(interface); | |
09f8a82b AD |
2086 | if (err) |
2087 | goto err_queueing_scheme; | |
19ae1b3f | 2088 | |
09f8a82b AD |
2089 | err = fm10k_mbx_request_irq(interface); |
2090 | if (err) | |
2091 | goto err_mbx_irq; | |
19ae1b3f | 2092 | |
09f8a82b | 2093 | err = fm10k_hw_ready(interface); |
19ae1b3f | 2094 | if (err) |
09f8a82b AD |
2095 | goto err_open; |
2096 | ||
2097 | err = netif_running(netdev) ? fm10k_open(netdev) : 0; | |
2098 | if (err) | |
2099 | goto err_open; | |
2100 | ||
2101 | rtnl_unlock(); | |
19ae1b3f | 2102 | |
e4029662 JK |
2103 | /* assume host is not ready, to prevent race with watchdog in case we |
2104 | * actually don't have connection to the switch | |
2105 | */ | |
2106 | interface->host_ready = false; | |
2107 | fm10k_watchdog_host_not_ready(interface); | |
2108 | ||
2109 | /* clear the service task disable bit to allow service task to start */ | |
2110 | clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
2111 | fm10k_service_event_schedule(interface); | |
2112 | ||
883a9ccb AD |
2113 | /* restore SR-IOV interface */ |
2114 | fm10k_iov_resume(pdev); | |
2115 | ||
19ae1b3f AD |
2116 | netif_device_attach(netdev); |
2117 | ||
2118 | return 0; | |
09f8a82b AD |
2119 | err_open: |
2120 | fm10k_mbx_free_irq(interface); | |
2121 | err_mbx_irq: | |
2122 | fm10k_clear_queueing_scheme(interface); | |
2123 | err_queueing_scheme: | |
2124 | rtnl_unlock(); | |
2125 | ||
2126 | return err; | |
19ae1b3f AD |
2127 | } |
2128 | ||
2129 | /** | |
2130 | * fm10k_suspend - Prepare the device for a system sleep state | |
2131 | * @pdev: PCI device information struct | |
2132 | * | |
2133 | * fm10k_suspend is meant to shutdown the device prior to the system entering | |
2134 | * a sleep state. The fm10k hardware does not support wake on lan so the | |
2135 | * driver simply needs to shut down the device so it is in a low power state. | |
2136 | **/ | |
de445199 JK |
2137 | static int fm10k_suspend(struct pci_dev *pdev, |
2138 | pm_message_t __always_unused state) | |
19ae1b3f AD |
2139 | { |
2140 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2141 | struct net_device *netdev = interface->netdev; | |
2142 | int err = 0; | |
2143 | ||
2144 | netif_device_detach(netdev); | |
2145 | ||
883a9ccb AD |
2146 | fm10k_iov_suspend(pdev); |
2147 | ||
e4029662 JK |
2148 | /* the watchdog tasks may read registers, which will appear like a |
2149 | * surprise-remove event once the PCI device is disabled. This will | |
2150 | * cause us to close the netdevice, so we don't retain the open/closed | |
2151 | * state post-resume. Prevent this by disabling the service task while | |
2152 | * suspended, until we actually resume. | |
2153 | */ | |
2154 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
2155 | cancel_work_sync(&interface->service_task); | |
2156 | ||
19ae1b3f AD |
2157 | rtnl_lock(); |
2158 | ||
2159 | if (netif_running(netdev)) | |
2160 | fm10k_close(netdev); | |
2161 | ||
2162 | fm10k_mbx_free_irq(interface); | |
2163 | ||
2164 | fm10k_clear_queueing_scheme(interface); | |
2165 | ||
2166 | rtnl_unlock(); | |
2167 | ||
2168 | err = pci_save_state(pdev); | |
2169 | if (err) | |
2170 | return err; | |
2171 | ||
2172 | pci_disable_device(pdev); | |
2173 | pci_wake_from_d3(pdev, false); | |
2174 | pci_set_power_state(pdev, PCI_D3hot); | |
2175 | ||
2176 | return 0; | |
2177 | } | |
2178 | ||
2179 | #endif /* CONFIG_PM */ | |
2180 | /** | |
2181 | * fm10k_io_error_detected - called when PCI error is detected | |
2182 | * @pdev: Pointer to PCI device | |
2183 | * @state: The current pci connection state | |
2184 | * | |
2185 | * This function is called after a PCI bus error affecting | |
2186 | * this device has been detected. | |
2187 | */ | |
2188 | static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev, | |
2189 | pci_channel_state_t state) | |
2190 | { | |
2191 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2192 | struct net_device *netdev = interface->netdev; | |
2193 | ||
2194 | netif_device_detach(netdev); | |
2195 | ||
2196 | if (state == pci_channel_io_perm_failure) | |
2197 | return PCI_ERS_RESULT_DISCONNECT; | |
2198 | ||
1e4c32f3 JK |
2199 | rtnl_lock(); |
2200 | ||
19ae1b3f AD |
2201 | if (netif_running(netdev)) |
2202 | fm10k_close(netdev); | |
2203 | ||
c8ed563b JK |
2204 | fm10k_mbx_free_irq(interface); |
2205 | ||
875328e4 JK |
2206 | /* free interrupts */ |
2207 | fm10k_clear_queueing_scheme(interface); | |
2208 | ||
1e4c32f3 JK |
2209 | rtnl_unlock(); |
2210 | ||
19ae1b3f AD |
2211 | /* Request a slot reset. */ |
2212 | return PCI_ERS_RESULT_NEED_RESET; | |
2213 | } | |
2214 | ||
2215 | /** | |
2216 | * fm10k_io_slot_reset - called after the pci bus has been reset. | |
2217 | * @pdev: Pointer to PCI device | |
2218 | * | |
2219 | * Restart the card from scratch, as if from a cold-boot. | |
2220 | */ | |
2221 | static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev) | |
2222 | { | |
2223 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2224 | pci_ers_result_t result; | |
2225 | ||
2226 | if (pci_enable_device_mem(pdev)) { | |
2227 | dev_err(&pdev->dev, | |
2228 | "Cannot re-enable PCI device after reset.\n"); | |
2229 | result = PCI_ERS_RESULT_DISCONNECT; | |
2230 | } else { | |
2231 | pci_set_master(pdev); | |
2232 | pci_restore_state(pdev); | |
2233 | ||
2234 | /* After second error pci->state_saved is false, this | |
2235 | * resets it so EEH doesn't break. | |
2236 | */ | |
2237 | pci_save_state(pdev); | |
2238 | ||
2239 | pci_wake_from_d3(pdev, false); | |
2240 | ||
2241 | /* refresh hw_addr in case it was dropped */ | |
2242 | interface->hw.hw_addr = interface->uc_addr; | |
2243 | ||
2244 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
2245 | fm10k_service_event_schedule(interface); | |
2246 | ||
2247 | result = PCI_ERS_RESULT_RECOVERED; | |
2248 | } | |
2249 | ||
2250 | pci_cleanup_aer_uncorrect_error_status(pdev); | |
2251 | ||
2252 | return result; | |
2253 | } | |
2254 | ||
2255 | /** | |
2256 | * fm10k_io_resume - called when traffic can start flowing again. | |
2257 | * @pdev: Pointer to PCI device | |
2258 | * | |
2259 | * This callback is called when the error recovery driver tells us that | |
2260 | * its OK to resume normal operation. | |
2261 | */ | |
2262 | static void fm10k_io_resume(struct pci_dev *pdev) | |
2263 | { | |
2264 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2265 | struct net_device *netdev = interface->netdev; | |
2266 | struct fm10k_hw *hw = &interface->hw; | |
2267 | int err = 0; | |
2268 | ||
2269 | /* reset hardware to known state */ | |
1343c65f JK |
2270 | err = hw->mac.ops.init_hw(&interface->hw); |
2271 | if (err) { | |
2272 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
2273 | return; | |
2274 | } | |
19ae1b3f AD |
2275 | |
2276 | /* reset statistics starting values */ | |
2277 | hw->mac.ops.rebind_hw_stats(hw, &interface->stats); | |
2278 | ||
1e4c32f3 JK |
2279 | rtnl_lock(); |
2280 | ||
875328e4 JK |
2281 | err = fm10k_init_queueing_scheme(interface); |
2282 | if (err) { | |
3d02b3df BA |
2283 | dev_err(&interface->pdev->dev, |
2284 | "init_queueing_scheme failed: %d\n", err); | |
1e4c32f3 | 2285 | goto unlock; |
875328e4 JK |
2286 | } |
2287 | ||
19ae1b3f AD |
2288 | /* reassociate interrupts */ |
2289 | fm10k_mbx_request_irq(interface); | |
2290 | ||
41419b93 | 2291 | rtnl_lock(); |
19ae1b3f AD |
2292 | if (netif_running(netdev)) |
2293 | err = fm10k_open(netdev); | |
41419b93 | 2294 | rtnl_unlock(); |
19ae1b3f AD |
2295 | |
2296 | /* final check of hardware state before registering the interface */ | |
2297 | err = err ? : fm10k_hw_ready(interface); | |
2298 | ||
2299 | if (!err) | |
2300 | netif_device_attach(netdev); | |
1e4c32f3 JK |
2301 | |
2302 | unlock: | |
2303 | rtnl_unlock(); | |
19ae1b3f AD |
2304 | } |
2305 | ||
2306 | static const struct pci_error_handlers fm10k_err_handler = { | |
2307 | .error_detected = fm10k_io_error_detected, | |
2308 | .slot_reset = fm10k_io_slot_reset, | |
2309 | .resume = fm10k_io_resume, | |
2310 | }; | |
2311 | ||
b3890e30 AD |
2312 | static struct pci_driver fm10k_driver = { |
2313 | .name = fm10k_driver_name, | |
2314 | .id_table = fm10k_pci_tbl, | |
2315 | .probe = fm10k_probe, | |
2316 | .remove = fm10k_remove, | |
19ae1b3f AD |
2317 | #ifdef CONFIG_PM |
2318 | .suspend = fm10k_suspend, | |
2319 | .resume = fm10k_resume, | |
2320 | #endif | |
883a9ccb | 2321 | .sriov_configure = fm10k_iov_configure, |
19ae1b3f | 2322 | .err_handler = &fm10k_err_handler |
b3890e30 AD |
2323 | }; |
2324 | ||
2325 | /** | |
2326 | * fm10k_register_pci_driver - register driver interface | |
2327 | * | |
d8ec92f2 | 2328 | * This function is called on module load in order to register the driver. |
b3890e30 AD |
2329 | **/ |
2330 | int fm10k_register_pci_driver(void) | |
2331 | { | |
2332 | return pci_register_driver(&fm10k_driver); | |
2333 | } | |
2334 | ||
2335 | /** | |
2336 | * fm10k_unregister_pci_driver - unregister driver interface | |
2337 | * | |
d8ec92f2 | 2338 | * This function is called on module unload in order to remove the driver. |
b3890e30 AD |
2339 | **/ |
2340 | void fm10k_unregister_pci_driver(void) | |
2341 | { | |
2342 | pci_unregister_driver(&fm10k_driver); | |
2343 | } |