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b3890e30 | 1 | /* Intel Ethernet Switch Host Interface Driver |
97c71e3c | 2 | * Copyright(c) 2013 - 2015 Intel Corporation. |
b3890e30 AD |
3 | * |
4 | * This program is free software; you can redistribute it and/or modify it | |
5 | * under the terms and conditions of the GNU General Public License, | |
6 | * version 2, as published by the Free Software Foundation. | |
7 | * | |
8 | * This program is distributed in the hope it will be useful, but WITHOUT | |
9 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
10 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
11 | * more details. | |
12 | * | |
13 | * The full GNU General Public License is included in this distribution in | |
14 | * the file called "COPYING". | |
15 | * | |
16 | * Contact Information: | |
17 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
18 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
19ae1b3f | 22 | #include <linux/aer.h> |
b3890e30 AD |
23 | |
24 | #include "fm10k.h" | |
25 | ||
0e7b3644 AD |
26 | static const struct fm10k_info *fm10k_info_tbl[] = { |
27 | [fm10k_device_pf] = &fm10k_pf_info, | |
5cb8db4a | 28 | [fm10k_device_vf] = &fm10k_vf_info, |
0e7b3644 AD |
29 | }; |
30 | ||
b3890e30 AD |
31 | /** |
32 | * fm10k_pci_tbl - PCI Device ID Table | |
33 | * | |
34 | * Wildcard entries (PCI_ANY_ID) should come last | |
35 | * Last entry must be all 0s | |
36 | * | |
37 | * { Vendor ID, Device ID, SubVendor ID, SubDevice ID, | |
38 | * Class, Class Mask, private data (not used) } | |
39 | */ | |
40 | static const struct pci_device_id fm10k_pci_tbl[] = { | |
0e7b3644 | 41 | { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf }, |
5cb8db4a | 42 | { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf }, |
b3890e30 AD |
43 | /* required last entry */ |
44 | { 0, } | |
45 | }; | |
46 | MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl); | |
47 | ||
04a5aefb AD |
48 | u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg) |
49 | { | |
50 | struct fm10k_intfc *interface = hw->back; | |
51 | u16 value = 0; | |
52 | ||
53 | if (FM10K_REMOVED(hw->hw_addr)) | |
54 | return ~value; | |
55 | ||
56 | pci_read_config_word(interface->pdev, reg, &value); | |
57 | if (value == 0xFFFF) | |
58 | fm10k_write_flush(hw); | |
59 | ||
60 | return value; | |
61 | } | |
62 | ||
63 | u32 fm10k_read_reg(struct fm10k_hw *hw, int reg) | |
64 | { | |
65 | u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr); | |
66 | u32 value = 0; | |
67 | ||
68 | if (FM10K_REMOVED(hw_addr)) | |
69 | return ~value; | |
70 | ||
71 | value = readl(&hw_addr[reg]); | |
0e7b3644 AD |
72 | if (!(~value) && (!reg || !(~readl(hw_addr)))) { |
73 | struct fm10k_intfc *interface = hw->back; | |
74 | struct net_device *netdev = interface->netdev; | |
75 | ||
04a5aefb | 76 | hw->hw_addr = NULL; |
0e7b3644 AD |
77 | netif_device_detach(netdev); |
78 | netdev_err(netdev, "PCIe link lost, device now detached\n"); | |
79 | } | |
04a5aefb AD |
80 | |
81 | return value; | |
82 | } | |
83 | ||
0e7b3644 AD |
84 | static int fm10k_hw_ready(struct fm10k_intfc *interface) |
85 | { | |
86 | struct fm10k_hw *hw = &interface->hw; | |
87 | ||
88 | fm10k_write_flush(hw); | |
89 | ||
90 | return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0; | |
91 | } | |
92 | ||
b7d8514c AD |
93 | void fm10k_service_event_schedule(struct fm10k_intfc *interface) |
94 | { | |
95 | if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) && | |
96 | !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state)) | |
b382bb1b | 97 | queue_work(fm10k_workqueue, &interface->service_task); |
b7d8514c AD |
98 | } |
99 | ||
100 | static void fm10k_service_event_complete(struct fm10k_intfc *interface) | |
101 | { | |
102 | BUG_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state)); | |
103 | ||
104 | /* flush memory to make sure state is correct before next watchog */ | |
105 | smp_mb__before_atomic(); | |
106 | clear_bit(__FM10K_SERVICE_SCHED, &interface->state); | |
107 | } | |
108 | ||
109 | /** | |
110 | * fm10k_service_timer - Timer Call-back | |
111 | * @data: pointer to interface cast into an unsigned long | |
112 | **/ | |
113 | static void fm10k_service_timer(unsigned long data) | |
114 | { | |
115 | struct fm10k_intfc *interface = (struct fm10k_intfc *)data; | |
116 | ||
117 | /* Reset the timer */ | |
118 | mod_timer(&interface->service_timer, (HZ * 2) + jiffies); | |
119 | ||
120 | fm10k_service_event_schedule(interface); | |
121 | } | |
122 | ||
123 | static void fm10k_detach_subtask(struct fm10k_intfc *interface) | |
124 | { | |
125 | struct net_device *netdev = interface->netdev; | |
126 | ||
127 | /* do nothing if device is still present or hw_addr is set */ | |
128 | if (netif_device_present(netdev) || interface->hw.hw_addr) | |
129 | return; | |
130 | ||
131 | rtnl_lock(); | |
132 | ||
133 | if (netif_running(netdev)) | |
134 | dev_close(netdev); | |
135 | ||
136 | rtnl_unlock(); | |
137 | } | |
138 | ||
139 | static void fm10k_reinit(struct fm10k_intfc *interface) | |
140 | { | |
141 | struct net_device *netdev = interface->netdev; | |
142 | struct fm10k_hw *hw = &interface->hw; | |
143 | int err; | |
144 | ||
145 | WARN_ON(in_interrupt()); | |
146 | ||
147 | /* put off any impending NetWatchDogTimeout */ | |
148 | netdev->trans_start = jiffies; | |
149 | ||
150 | while (test_and_set_bit(__FM10K_RESETTING, &interface->state)) | |
151 | usleep_range(1000, 2000); | |
152 | ||
153 | rtnl_lock(); | |
154 | ||
883a9ccb AD |
155 | fm10k_iov_suspend(interface->pdev); |
156 | ||
b7d8514c AD |
157 | if (netif_running(netdev)) |
158 | fm10k_close(netdev); | |
159 | ||
160 | fm10k_mbx_free_irq(interface); | |
161 | ||
875328e4 JK |
162 | /* free interrupts */ |
163 | fm10k_clear_queueing_scheme(interface); | |
164 | ||
b7d8514c AD |
165 | /* delay any future reset requests */ |
166 | interface->last_reset = jiffies + (10 * HZ); | |
167 | ||
168 | /* reset and initialize the hardware so it is in a known state */ | |
1343c65f JK |
169 | err = hw->mac.ops.reset_hw(hw); |
170 | if (err) { | |
171 | dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err); | |
172 | goto reinit_err; | |
173 | } | |
174 | ||
175 | err = hw->mac.ops.init_hw(hw); | |
176 | if (err) { | |
b7d8514c | 177 | dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err); |
1343c65f JK |
178 | goto reinit_err; |
179 | } | |
b7d8514c | 180 | |
875328e4 JK |
181 | err = fm10k_init_queueing_scheme(interface); |
182 | if (err) { | |
3d02b3df BA |
183 | dev_err(&interface->pdev->dev, |
184 | "init_queueing_scheme failed: %d\n", err); | |
875328e4 JK |
185 | goto reinit_err; |
186 | } | |
187 | ||
b7d8514c AD |
188 | /* reassociate interrupts */ |
189 | fm10k_mbx_request_irq(interface); | |
190 | ||
bdc7f590 JK |
191 | /* update hardware address for VFs if perm_addr has changed */ |
192 | if (hw->mac.type == fm10k_mac_vf) { | |
193 | if (is_valid_ether_addr(hw->mac.perm_addr)) { | |
194 | ether_addr_copy(hw->mac.addr, hw->mac.perm_addr); | |
195 | ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr); | |
196 | ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr); | |
197 | netdev->addr_assign_type &= ~NET_ADDR_RANDOM; | |
198 | } | |
199 | ||
200 | if (hw->mac.vlan_override) | |
201 | netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX; | |
202 | else | |
203 | netdev->features |= NETIF_F_HW_VLAN_CTAG_RX; | |
204 | } | |
205 | ||
a211e013 AD |
206 | /* reset clock */ |
207 | fm10k_ts_reset(interface); | |
208 | ||
b7d8514c AD |
209 | if (netif_running(netdev)) |
210 | fm10k_open(netdev); | |
211 | ||
883a9ccb AD |
212 | fm10k_iov_resume(interface->pdev); |
213 | ||
1343c65f JK |
214 | reinit_err: |
215 | if (err) | |
216 | netif_device_detach(netdev); | |
217 | ||
b7d8514c AD |
218 | rtnl_unlock(); |
219 | ||
220 | clear_bit(__FM10K_RESETTING, &interface->state); | |
221 | } | |
222 | ||
223 | static void fm10k_reset_subtask(struct fm10k_intfc *interface) | |
224 | { | |
225 | if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED)) | |
226 | return; | |
227 | ||
228 | interface->flags &= ~FM10K_FLAG_RESET_REQUESTED; | |
229 | ||
230 | netdev_err(interface->netdev, "Reset interface\n"); | |
b7d8514c AD |
231 | |
232 | fm10k_reinit(interface); | |
233 | } | |
234 | ||
235 | /** | |
236 | * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping | |
237 | * @interface: board private structure | |
238 | * | |
239 | * Configure the SWPRI to PC mapping for the port. | |
240 | **/ | |
241 | static void fm10k_configure_swpri_map(struct fm10k_intfc *interface) | |
242 | { | |
243 | struct net_device *netdev = interface->netdev; | |
244 | struct fm10k_hw *hw = &interface->hw; | |
245 | int i; | |
246 | ||
247 | /* clear flag indicating update is needed */ | |
248 | interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG; | |
249 | ||
250 | /* these registers are only available on the PF */ | |
251 | if (hw->mac.type != fm10k_mac_pf) | |
252 | return; | |
253 | ||
254 | /* configure SWPRI to PC map */ | |
255 | for (i = 0; i < FM10K_SWPRI_MAX; i++) | |
256 | fm10k_write_reg(hw, FM10K_SWPRI_MAP(i), | |
257 | netdev_get_prio_tc_map(netdev, i)); | |
258 | } | |
259 | ||
260 | /** | |
261 | * fm10k_watchdog_update_host_state - Update the link status based on host. | |
262 | * @interface: board private structure | |
263 | **/ | |
264 | static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface) | |
265 | { | |
266 | struct fm10k_hw *hw = &interface->hw; | |
267 | s32 err; | |
268 | ||
269 | if (test_bit(__FM10K_LINK_DOWN, &interface->state)) { | |
270 | interface->host_ready = false; | |
271 | if (time_is_after_jiffies(interface->link_down_event)) | |
272 | return; | |
273 | clear_bit(__FM10K_LINK_DOWN, &interface->state); | |
274 | } | |
275 | ||
276 | if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) { | |
277 | if (rtnl_trylock()) { | |
278 | fm10k_configure_swpri_map(interface); | |
279 | rtnl_unlock(); | |
280 | } | |
281 | } | |
282 | ||
283 | /* lock the mailbox for transmit and receive */ | |
284 | fm10k_mbx_lock(interface); | |
285 | ||
286 | err = hw->mac.ops.get_host_state(hw, &interface->host_ready); | |
287 | if (err && time_is_before_jiffies(interface->last_reset)) | |
288 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
289 | ||
290 | /* free the lock */ | |
291 | fm10k_mbx_unlock(interface); | |
292 | } | |
293 | ||
294 | /** | |
295 | * fm10k_mbx_subtask - Process upstream and downstream mailboxes | |
296 | * @interface: board private structure | |
297 | * | |
298 | * This function will process both the upstream and downstream mailboxes. | |
b7d8514c AD |
299 | **/ |
300 | static void fm10k_mbx_subtask(struct fm10k_intfc *interface) | |
301 | { | |
302 | /* process upstream mailbox and update device state */ | |
303 | fm10k_watchdog_update_host_state(interface); | |
883a9ccb AD |
304 | |
305 | /* process downstream mailboxes */ | |
306 | fm10k_iov_mbx(interface); | |
b7d8514c AD |
307 | } |
308 | ||
309 | /** | |
310 | * fm10k_watchdog_host_is_ready - Update netdev status based on host ready | |
311 | * @interface: board private structure | |
312 | **/ | |
313 | static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface) | |
314 | { | |
315 | struct net_device *netdev = interface->netdev; | |
316 | ||
317 | /* only continue if link state is currently down */ | |
318 | if (netif_carrier_ok(netdev)) | |
319 | return; | |
320 | ||
321 | netif_info(interface, drv, netdev, "NIC Link is up\n"); | |
322 | ||
323 | netif_carrier_on(netdev); | |
324 | netif_tx_wake_all_queues(netdev); | |
325 | } | |
326 | ||
327 | /** | |
328 | * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready | |
329 | * @interface: board private structure | |
330 | **/ | |
331 | static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface) | |
332 | { | |
333 | struct net_device *netdev = interface->netdev; | |
334 | ||
335 | /* only continue if link state is currently up */ | |
336 | if (!netif_carrier_ok(netdev)) | |
337 | return; | |
338 | ||
339 | netif_info(interface, drv, netdev, "NIC Link is down\n"); | |
340 | ||
341 | netif_carrier_off(netdev); | |
342 | netif_tx_stop_all_queues(netdev); | |
343 | } | |
344 | ||
345 | /** | |
346 | * fm10k_update_stats - Update the board statistics counters. | |
347 | * @interface: board private structure | |
348 | **/ | |
349 | void fm10k_update_stats(struct fm10k_intfc *interface) | |
350 | { | |
351 | struct net_device_stats *net_stats = &interface->netdev->stats; | |
352 | struct fm10k_hw *hw = &interface->hw; | |
80043f3b JK |
353 | u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0; |
354 | u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0; | |
355 | u64 rx_link_errors = 0; | |
b7d8514c AD |
356 | u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0; |
357 | u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0; | |
358 | u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0; | |
359 | u64 tx_bytes_nic = 0, tx_pkts_nic = 0; | |
360 | u64 bytes, pkts; | |
361 | int i; | |
362 | ||
363 | /* do not allow stats update via service task for next second */ | |
364 | interface->next_stats_update = jiffies + HZ; | |
365 | ||
366 | /* gather some stats to the interface struct that are per queue */ | |
367 | for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) { | |
368 | struct fm10k_ring *tx_ring = interface->tx_ring[i]; | |
369 | ||
370 | restart_queue += tx_ring->tx_stats.restart_queue; | |
371 | tx_busy += tx_ring->tx_stats.tx_busy; | |
372 | tx_csum_errors += tx_ring->tx_stats.csum_err; | |
373 | bytes += tx_ring->stats.bytes; | |
374 | pkts += tx_ring->stats.packets; | |
80043f3b | 375 | hw_csum_tx_good += tx_ring->tx_stats.csum_good; |
b7d8514c AD |
376 | } |
377 | ||
378 | interface->restart_queue = restart_queue; | |
379 | interface->tx_busy = tx_busy; | |
380 | net_stats->tx_bytes = bytes; | |
381 | net_stats->tx_packets = pkts; | |
382 | interface->tx_csum_errors = tx_csum_errors; | |
80043f3b JK |
383 | interface->hw_csum_tx_good = hw_csum_tx_good; |
384 | ||
b7d8514c AD |
385 | /* gather some stats to the interface struct that are per queue */ |
386 | for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) { | |
387 | struct fm10k_ring *rx_ring = interface->rx_ring[i]; | |
388 | ||
389 | bytes += rx_ring->stats.bytes; | |
390 | pkts += rx_ring->stats.packets; | |
391 | alloc_failed += rx_ring->rx_stats.alloc_failed; | |
392 | rx_csum_errors += rx_ring->rx_stats.csum_err; | |
393 | rx_errors += rx_ring->rx_stats.errors; | |
80043f3b JK |
394 | hw_csum_rx_good += rx_ring->rx_stats.csum_good; |
395 | rx_switch_errors += rx_ring->rx_stats.switch_errors; | |
396 | rx_drops += rx_ring->rx_stats.drops; | |
397 | rx_pp_errors += rx_ring->rx_stats.pp_errors; | |
398 | rx_link_errors += rx_ring->rx_stats.link_errors; | |
399 | rx_length_errors += rx_ring->rx_stats.length_errors; | |
b7d8514c AD |
400 | } |
401 | ||
402 | net_stats->rx_bytes = bytes; | |
403 | net_stats->rx_packets = pkts; | |
404 | interface->alloc_failed = alloc_failed; | |
405 | interface->rx_csum_errors = rx_csum_errors; | |
80043f3b JK |
406 | interface->hw_csum_rx_good = hw_csum_rx_good; |
407 | interface->rx_switch_errors = rx_switch_errors; | |
408 | interface->rx_drops = rx_drops; | |
409 | interface->rx_pp_errors = rx_pp_errors; | |
410 | interface->rx_link_errors = rx_link_errors; | |
411 | interface->rx_length_errors = rx_length_errors; | |
b7d8514c AD |
412 | |
413 | hw->mac.ops.update_hw_stats(hw, &interface->stats); | |
414 | ||
c0e61781 | 415 | for (i = 0; i < hw->mac.max_queues; i++) { |
b7d8514c AD |
416 | struct fm10k_hw_stats_q *q = &interface->stats.q[i]; |
417 | ||
418 | tx_bytes_nic += q->tx_bytes.count; | |
419 | tx_pkts_nic += q->tx_packets.count; | |
420 | rx_bytes_nic += q->rx_bytes.count; | |
421 | rx_pkts_nic += q->rx_packets.count; | |
422 | rx_drops_nic += q->rx_drops.count; | |
423 | } | |
424 | ||
425 | interface->tx_bytes_nic = tx_bytes_nic; | |
426 | interface->tx_packets_nic = tx_pkts_nic; | |
427 | interface->rx_bytes_nic = rx_bytes_nic; | |
428 | interface->rx_packets_nic = rx_pkts_nic; | |
429 | interface->rx_drops_nic = rx_drops_nic; | |
430 | ||
431 | /* Fill out the OS statistics structure */ | |
97c71e3c | 432 | net_stats->rx_errors = rx_errors; |
b7d8514c AD |
433 | net_stats->rx_dropped = interface->stats.nodesc_drop.count; |
434 | } | |
435 | ||
436 | /** | |
437 | * fm10k_watchdog_flush_tx - flush queues on host not ready | |
438 | * @interface - pointer to the device interface structure | |
439 | **/ | |
440 | static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface) | |
441 | { | |
442 | int some_tx_pending = 0; | |
443 | int i; | |
444 | ||
445 | /* nothing to do if carrier is up */ | |
446 | if (netif_carrier_ok(interface->netdev)) | |
447 | return; | |
448 | ||
449 | for (i = 0; i < interface->num_tx_queues; i++) { | |
450 | struct fm10k_ring *tx_ring = interface->tx_ring[i]; | |
451 | ||
452 | if (tx_ring->next_to_use != tx_ring->next_to_clean) { | |
453 | some_tx_pending = 1; | |
454 | break; | |
455 | } | |
456 | } | |
457 | ||
458 | /* We've lost link, so the controller stops DMA, but we've got | |
459 | * queued Tx work that's never going to get done, so reset | |
460 | * controller to flush Tx. | |
461 | */ | |
462 | if (some_tx_pending) | |
463 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
464 | } | |
465 | ||
466 | /** | |
467 | * fm10k_watchdog_subtask - check and bring link up | |
468 | * @interface - pointer to the device interface structure | |
469 | **/ | |
470 | static void fm10k_watchdog_subtask(struct fm10k_intfc *interface) | |
471 | { | |
472 | /* if interface is down do nothing */ | |
473 | if (test_bit(__FM10K_DOWN, &interface->state) || | |
474 | test_bit(__FM10K_RESETTING, &interface->state)) | |
475 | return; | |
476 | ||
477 | if (interface->host_ready) | |
478 | fm10k_watchdog_host_is_ready(interface); | |
479 | else | |
480 | fm10k_watchdog_host_not_ready(interface); | |
481 | ||
482 | /* update stats only once every second */ | |
483 | if (time_is_before_jiffies(interface->next_stats_update)) | |
484 | fm10k_update_stats(interface); | |
485 | ||
486 | /* flush any uncompleted work */ | |
487 | fm10k_watchdog_flush_tx(interface); | |
488 | } | |
489 | ||
490 | /** | |
491 | * fm10k_check_hang_subtask - check for hung queues and dropped interrupts | |
492 | * @interface - pointer to the device interface structure | |
493 | * | |
494 | * This function serves two purposes. First it strobes the interrupt lines | |
495 | * in order to make certain interrupts are occurring. Secondly it sets the | |
496 | * bits needed to check for TX hangs. As a result we should immediately | |
497 | * determine if a hang has occurred. | |
498 | */ | |
499 | static void fm10k_check_hang_subtask(struct fm10k_intfc *interface) | |
500 | { | |
501 | int i; | |
502 | ||
503 | /* If we're down or resetting, just bail */ | |
504 | if (test_bit(__FM10K_DOWN, &interface->state) || | |
505 | test_bit(__FM10K_RESETTING, &interface->state)) | |
506 | return; | |
507 | ||
508 | /* rate limit tx hang checks to only once every 2 seconds */ | |
509 | if (time_is_after_eq_jiffies(interface->next_tx_hang_check)) | |
510 | return; | |
511 | interface->next_tx_hang_check = jiffies + (2 * HZ); | |
512 | ||
513 | if (netif_carrier_ok(interface->netdev)) { | |
514 | /* Force detection of hung controller */ | |
515 | for (i = 0; i < interface->num_tx_queues; i++) | |
516 | set_check_for_tx_hang(interface->tx_ring[i]); | |
517 | ||
518 | /* Rearm all in-use q_vectors for immediate firing */ | |
519 | for (i = 0; i < interface->num_q_vectors; i++) { | |
520 | struct fm10k_q_vector *qv = interface->q_vector[i]; | |
521 | ||
522 | if (!qv->tx.count && !qv->rx.count) | |
523 | continue; | |
524 | writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr); | |
525 | } | |
526 | } | |
527 | } | |
528 | ||
529 | /** | |
530 | * fm10k_service_task - manages and runs subtasks | |
531 | * @work: pointer to work_struct containing our data | |
532 | **/ | |
533 | static void fm10k_service_task(struct work_struct *work) | |
534 | { | |
535 | struct fm10k_intfc *interface; | |
536 | ||
537 | interface = container_of(work, struct fm10k_intfc, service_task); | |
538 | ||
8427672a | 539 | /* tasks run even when interface is down */ |
b7d8514c AD |
540 | fm10k_mbx_subtask(interface); |
541 | fm10k_detach_subtask(interface); | |
542 | fm10k_reset_subtask(interface); | |
543 | ||
544 | /* tasks only run when interface is up */ | |
545 | fm10k_watchdog_subtask(interface); | |
546 | fm10k_check_hang_subtask(interface); | |
a211e013 | 547 | fm10k_ts_tx_subtask(interface); |
b7d8514c AD |
548 | |
549 | /* release lock on service events to allow scheduling next event */ | |
550 | fm10k_service_event_complete(interface); | |
551 | } | |
552 | ||
3abaae42 AD |
553 | /** |
554 | * fm10k_configure_tx_ring - Configure Tx ring after Reset | |
555 | * @interface: board private structure | |
556 | * @ring: structure containing ring specific data | |
557 | * | |
558 | * Configure the Tx descriptor ring after a reset. | |
559 | **/ | |
560 | static void fm10k_configure_tx_ring(struct fm10k_intfc *interface, | |
561 | struct fm10k_ring *ring) | |
562 | { | |
563 | struct fm10k_hw *hw = &interface->hw; | |
564 | u64 tdba = ring->dma; | |
565 | u32 size = ring->count * sizeof(struct fm10k_tx_desc); | |
566 | u32 txint = FM10K_INT_MAP_DISABLE; | |
567 | u32 txdctl = FM10K_TXDCTL_ENABLE | (1 << FM10K_TXDCTL_MAX_TIME_SHIFT); | |
568 | u8 reg_idx = ring->reg_idx; | |
569 | ||
570 | /* disable queue to avoid issues while updating state */ | |
571 | fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0); | |
572 | fm10k_write_flush(hw); | |
573 | ||
574 | /* possible poll here to verify ring resources have been cleaned */ | |
575 | ||
576 | /* set location and size for descriptor ring */ | |
577 | fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32)); | |
578 | fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32); | |
579 | fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size); | |
580 | ||
581 | /* reset head and tail pointers */ | |
582 | fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0); | |
583 | fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0); | |
584 | ||
585 | /* store tail pointer */ | |
586 | ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)]; | |
587 | ||
c7bc9523 | 588 | /* reset ntu and ntc to place SW in sync with hardware */ |
3abaae42 AD |
589 | ring->next_to_clean = 0; |
590 | ring->next_to_use = 0; | |
591 | ||
592 | /* Map interrupt */ | |
593 | if (ring->q_vector) { | |
594 | txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); | |
595 | txint |= FM10K_INT_MAP_TIMER0; | |
596 | } | |
597 | ||
598 | fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint); | |
599 | ||
600 | /* enable use of FTAG bit in Tx descriptor, register is RO for VF */ | |
601 | fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx), | |
602 | FM10K_PFVTCTL_FTAG_DESC_ENABLE); | |
603 | ||
604 | /* enable queue */ | |
605 | fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl); | |
606 | } | |
607 | ||
608 | /** | |
609 | * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration | |
610 | * @interface: board private structure | |
611 | * @ring: structure containing ring specific data | |
612 | * | |
613 | * Verify the Tx descriptor ring is ready for transmit. | |
614 | **/ | |
615 | static void fm10k_enable_tx_ring(struct fm10k_intfc *interface, | |
616 | struct fm10k_ring *ring) | |
617 | { | |
618 | struct fm10k_hw *hw = &interface->hw; | |
619 | int wait_loop = 10; | |
620 | u32 txdctl; | |
621 | u8 reg_idx = ring->reg_idx; | |
622 | ||
623 | /* if we are already enabled just exit */ | |
624 | if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE) | |
625 | return; | |
626 | ||
627 | /* poll to verify queue is enabled */ | |
628 | do { | |
629 | usleep_range(1000, 2000); | |
630 | txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)); | |
631 | } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop); | |
632 | if (!wait_loop) | |
633 | netif_err(interface, drv, interface->netdev, | |
634 | "Could not enable Tx Queue %d\n", reg_idx); | |
635 | } | |
636 | ||
637 | /** | |
638 | * fm10k_configure_tx - Configure Transmit Unit after Reset | |
639 | * @interface: board private structure | |
640 | * | |
641 | * Configure the Tx unit of the MAC after a reset. | |
642 | **/ | |
643 | static void fm10k_configure_tx(struct fm10k_intfc *interface) | |
644 | { | |
645 | int i; | |
646 | ||
647 | /* Setup the HW Tx Head and Tail descriptor pointers */ | |
648 | for (i = 0; i < interface->num_tx_queues; i++) | |
649 | fm10k_configure_tx_ring(interface, interface->tx_ring[i]); | |
650 | ||
651 | /* poll here to verify that Tx rings are now enabled */ | |
652 | for (i = 0; i < interface->num_tx_queues; i++) | |
653 | fm10k_enable_tx_ring(interface, interface->tx_ring[i]); | |
654 | } | |
655 | ||
656 | /** | |
657 | * fm10k_configure_rx_ring - Configure Rx ring after Reset | |
658 | * @interface: board private structure | |
659 | * @ring: structure containing ring specific data | |
660 | * | |
661 | * Configure the Rx descriptor ring after a reset. | |
662 | **/ | |
663 | static void fm10k_configure_rx_ring(struct fm10k_intfc *interface, | |
664 | struct fm10k_ring *ring) | |
665 | { | |
666 | u64 rdba = ring->dma; | |
667 | struct fm10k_hw *hw = &interface->hw; | |
668 | u32 size = ring->count * sizeof(union fm10k_rx_desc); | |
669 | u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF; | |
670 | u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
671 | u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN; | |
672 | u32 rxint = FM10K_INT_MAP_DISABLE; | |
673 | u8 rx_pause = interface->rx_pause; | |
674 | u8 reg_idx = ring->reg_idx; | |
675 | ||
676 | /* disable queue to avoid issues while updating state */ | |
677 | fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0); | |
678 | fm10k_write_flush(hw); | |
679 | ||
680 | /* possible poll here to verify ring resources have been cleaned */ | |
681 | ||
682 | /* set location and size for descriptor ring */ | |
683 | fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32)); | |
684 | fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32); | |
685 | fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size); | |
686 | ||
687 | /* reset head and tail pointers */ | |
688 | fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0); | |
689 | fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0); | |
690 | ||
691 | /* store tail pointer */ | |
692 | ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)]; | |
693 | ||
c7bc9523 | 694 | /* reset ntu and ntc to place SW in sync with hardware */ |
3abaae42 AD |
695 | ring->next_to_clean = 0; |
696 | ring->next_to_use = 0; | |
697 | ring->next_to_alloc = 0; | |
698 | ||
699 | /* Configure the Rx buffer size for one buff without split */ | |
700 | srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT; | |
701 | ||
eca32047 | 702 | /* Configure the Rx ring to suppress loopback packets */ |
3abaae42 AD |
703 | srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS; |
704 | fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl); | |
705 | ||
706 | /* Enable drop on empty */ | |
9f801abc | 707 | #ifdef CONFIG_DCB |
3abaae42 AD |
708 | if (interface->pfc_en) |
709 | rx_pause = interface->pfc_en; | |
710 | #endif | |
711 | if (!(rx_pause & (1 << ring->qos_pc))) | |
712 | rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; | |
713 | ||
714 | fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); | |
715 | ||
716 | /* assign default VLAN to queue */ | |
717 | ring->vid = hw->mac.default_vid; | |
718 | ||
aa502b4a | 719 | /* if we have an active VLAN, disable default VLAN ID */ |
e71c9318 JK |
720 | if (test_bit(hw->mac.default_vid, interface->active_vlans)) |
721 | ring->vid |= FM10K_VLAN_CLEAR; | |
722 | ||
3abaae42 AD |
723 | /* Map interrupt */ |
724 | if (ring->q_vector) { | |
725 | rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw); | |
726 | rxint |= FM10K_INT_MAP_TIMER1; | |
727 | } | |
728 | ||
729 | fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint); | |
730 | ||
731 | /* enable queue */ | |
732 | fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl); | |
b101c962 AD |
733 | |
734 | /* place buffers on ring for receive data */ | |
735 | fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring)); | |
3abaae42 AD |
736 | } |
737 | ||
738 | /** | |
739 | * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings | |
740 | * @interface: board private structure | |
741 | * | |
742 | * Configure the drop enable bits for the Rx rings. | |
743 | **/ | |
744 | void fm10k_update_rx_drop_en(struct fm10k_intfc *interface) | |
745 | { | |
746 | struct fm10k_hw *hw = &interface->hw; | |
747 | u8 rx_pause = interface->rx_pause; | |
748 | int i; | |
749 | ||
9f801abc | 750 | #ifdef CONFIG_DCB |
3abaae42 AD |
751 | if (interface->pfc_en) |
752 | rx_pause = interface->pfc_en; | |
753 | ||
754 | #endif | |
755 | for (i = 0; i < interface->num_rx_queues; i++) { | |
756 | struct fm10k_ring *ring = interface->rx_ring[i]; | |
757 | u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
758 | u8 reg_idx = ring->reg_idx; | |
759 | ||
760 | if (!(rx_pause & (1 << ring->qos_pc))) | |
761 | rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY; | |
762 | ||
763 | fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl); | |
764 | } | |
765 | } | |
766 | ||
767 | /** | |
768 | * fm10k_configure_dglort - Configure Receive DGLORT after reset | |
769 | * @interface: board private structure | |
770 | * | |
771 | * Configure the DGLORT description and RSS tables. | |
772 | **/ | |
773 | static void fm10k_configure_dglort(struct fm10k_intfc *interface) | |
774 | { | |
775 | struct fm10k_dglort_cfg dglort = { 0 }; | |
776 | struct fm10k_hw *hw = &interface->hw; | |
777 | int i; | |
778 | u32 mrqc; | |
779 | ||
780 | /* Fill out hash function seeds */ | |
781 | for (i = 0; i < FM10K_RSSRK_SIZE; i++) | |
782 | fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]); | |
783 | ||
784 | /* Write RETA table to hardware */ | |
785 | for (i = 0; i < FM10K_RETA_SIZE; i++) | |
786 | fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]); | |
787 | ||
788 | /* Generate RSS hash based on packet types, TCP/UDP | |
789 | * port numbers and/or IPv4/v6 src and dst addresses | |
790 | */ | |
791 | mrqc = FM10K_MRQC_IPV4 | | |
792 | FM10K_MRQC_TCP_IPV4 | | |
793 | FM10K_MRQC_IPV6 | | |
794 | FM10K_MRQC_TCP_IPV6; | |
795 | ||
796 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP) | |
797 | mrqc |= FM10K_MRQC_UDP_IPV4; | |
798 | if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP) | |
799 | mrqc |= FM10K_MRQC_UDP_IPV6; | |
800 | ||
801 | fm10k_write_reg(hw, FM10K_MRQC(0), mrqc); | |
802 | ||
803 | /* configure default DGLORT mapping for RSS/DCB */ | |
804 | dglort.inner_rss = 1; | |
805 | dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); | |
806 | dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); | |
807 | hw->mac.ops.configure_dglort_map(hw, &dglort); | |
808 | ||
809 | /* assign GLORT per queue for queue mapped testing */ | |
810 | if (interface->glort_count > 64) { | |
811 | memset(&dglort, 0, sizeof(dglort)); | |
812 | dglort.inner_rss = 1; | |
813 | dglort.glort = interface->glort + 64; | |
814 | dglort.idx = fm10k_dglort_pf_queue; | |
815 | dglort.queue_l = fls(interface->num_rx_queues - 1); | |
816 | hw->mac.ops.configure_dglort_map(hw, &dglort); | |
817 | } | |
818 | ||
819 | /* assign glort value for RSS/DCB specific to this interface */ | |
820 | memset(&dglort, 0, sizeof(dglort)); | |
821 | dglort.inner_rss = 1; | |
822 | dglort.glort = interface->glort; | |
823 | dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask); | |
824 | dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask); | |
825 | /* configure DGLORT mapping for RSS/DCB */ | |
826 | dglort.idx = fm10k_dglort_pf_rss; | |
5cd5e2e9 AD |
827 | if (interface->l2_accel) |
828 | dglort.shared_l = fls(interface->l2_accel->size); | |
3abaae42 AD |
829 | hw->mac.ops.configure_dglort_map(hw, &dglort); |
830 | } | |
831 | ||
832 | /** | |
833 | * fm10k_configure_rx - Configure Receive Unit after Reset | |
834 | * @interface: board private structure | |
835 | * | |
836 | * Configure the Rx unit of the MAC after a reset. | |
837 | **/ | |
838 | static void fm10k_configure_rx(struct fm10k_intfc *interface) | |
839 | { | |
840 | int i; | |
841 | ||
842 | /* Configure SWPRI to PC map */ | |
843 | fm10k_configure_swpri_map(interface); | |
844 | ||
845 | /* Configure RSS and DGLORT map */ | |
846 | fm10k_configure_dglort(interface); | |
847 | ||
848 | /* Setup the HW Rx Head and Tail descriptor pointers */ | |
849 | for (i = 0; i < interface->num_rx_queues; i++) | |
850 | fm10k_configure_rx_ring(interface, interface->rx_ring[i]); | |
851 | ||
852 | /* possible poll here to verify that Rx rings are now enabled */ | |
853 | } | |
854 | ||
18283cad AD |
855 | static void fm10k_napi_enable_all(struct fm10k_intfc *interface) |
856 | { | |
857 | struct fm10k_q_vector *q_vector; | |
858 | int q_idx; | |
859 | ||
860 | for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { | |
861 | q_vector = interface->q_vector[q_idx]; | |
862 | napi_enable(&q_vector->napi); | |
863 | } | |
864 | } | |
865 | ||
de445199 | 866 | static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data) |
18283cad AD |
867 | { |
868 | struct fm10k_q_vector *q_vector = data; | |
869 | ||
870 | if (q_vector->rx.count || q_vector->tx.count) | |
de125aae | 871 | napi_schedule_irqoff(&q_vector->napi); |
18283cad AD |
872 | |
873 | return IRQ_HANDLED; | |
874 | } | |
875 | ||
de445199 | 876 | static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data) |
5cb8db4a AD |
877 | { |
878 | struct fm10k_intfc *interface = data; | |
879 | struct fm10k_hw *hw = &interface->hw; | |
880 | struct fm10k_mbx_info *mbx = &hw->mbx; | |
881 | ||
882 | /* re-enable mailbox interrupt and indicate 20us delay */ | |
883 | fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR), | |
242722dd JK |
884 | FM10K_ITR_ENABLE | (FM10K_MBX_INT_DELAY >> |
885 | hw->mac.itr_scale)); | |
5cb8db4a AD |
886 | |
887 | /* service upstream mailbox */ | |
888 | if (fm10k_mbx_trylock(interface)) { | |
889 | mbx->ops.process(hw, mbx); | |
890 | fm10k_mbx_unlock(interface); | |
891 | } | |
892 | ||
893 | hw->mac.get_host_state = 1; | |
894 | fm10k_service_event_schedule(interface); | |
895 | ||
896 | return IRQ_HANDLED; | |
897 | } | |
898 | ||
8b4a98c7 JK |
899 | #ifdef CONFIG_NET_POLL_CONTROLLER |
900 | /** | |
901 | * fm10k_netpoll - A Polling 'interrupt' handler | |
902 | * @netdev: network interface device structure | |
903 | * | |
904 | * This is used by netconsole to send skbs without having to re-enable | |
905 | * interrupts. It's not called while the normal interrupt routine is executing. | |
906 | **/ | |
907 | void fm10k_netpoll(struct net_device *netdev) | |
908 | { | |
909 | struct fm10k_intfc *interface = netdev_priv(netdev); | |
910 | int i; | |
911 | ||
912 | /* if interface is down do nothing */ | |
913 | if (test_bit(__FM10K_DOWN, &interface->state)) | |
914 | return; | |
915 | ||
916 | for (i = 0; i < interface->num_q_vectors; i++) | |
917 | fm10k_msix_clean_rings(0, interface->q_vector[i]); | |
918 | } | |
919 | ||
920 | #endif | |
18283cad | 921 | #define FM10K_ERR_MSG(type) case (type): error = #type; break |
95f4f8da | 922 | static void fm10k_handle_fault(struct fm10k_intfc *interface, int type, |
a4fcad65 | 923 | struct fm10k_fault *fault) |
18283cad AD |
924 | { |
925 | struct pci_dev *pdev = interface->pdev; | |
95f4f8da JK |
926 | struct fm10k_hw *hw = &interface->hw; |
927 | struct fm10k_iov_data *iov_data = interface->iov_data; | |
18283cad AD |
928 | char *error; |
929 | ||
930 | switch (type) { | |
931 | case FM10K_PCA_FAULT: | |
932 | switch (fault->type) { | |
933 | default: | |
934 | error = "Unknown PCA error"; | |
935 | break; | |
936 | FM10K_ERR_MSG(PCA_NO_FAULT); | |
937 | FM10K_ERR_MSG(PCA_UNMAPPED_ADDR); | |
938 | FM10K_ERR_MSG(PCA_BAD_QACCESS_PF); | |
939 | FM10K_ERR_MSG(PCA_BAD_QACCESS_VF); | |
940 | FM10K_ERR_MSG(PCA_MALICIOUS_REQ); | |
941 | FM10K_ERR_MSG(PCA_POISONED_TLP); | |
942 | FM10K_ERR_MSG(PCA_TLP_ABORT); | |
943 | } | |
944 | break; | |
945 | case FM10K_THI_FAULT: | |
946 | switch (fault->type) { | |
947 | default: | |
948 | error = "Unknown THI error"; | |
949 | break; | |
950 | FM10K_ERR_MSG(THI_NO_FAULT); | |
951 | FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT); | |
952 | } | |
953 | break; | |
954 | case FM10K_FUM_FAULT: | |
955 | switch (fault->type) { | |
956 | default: | |
957 | error = "Unknown FUM error"; | |
958 | break; | |
959 | FM10K_ERR_MSG(FUM_NO_FAULT); | |
960 | FM10K_ERR_MSG(FUM_UNMAPPED_ADDR); | |
961 | FM10K_ERR_MSG(FUM_BAD_VF_QACCESS); | |
962 | FM10K_ERR_MSG(FUM_ADD_DECODE_ERR); | |
963 | FM10K_ERR_MSG(FUM_RO_ERROR); | |
964 | FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR); | |
965 | FM10K_ERR_MSG(FUM_CSR_TIMEOUT); | |
966 | FM10K_ERR_MSG(FUM_INVALID_TYPE); | |
967 | FM10K_ERR_MSG(FUM_INVALID_LENGTH); | |
968 | FM10K_ERR_MSG(FUM_INVALID_BE); | |
969 | FM10K_ERR_MSG(FUM_INVALID_ALIGN); | |
970 | } | |
971 | break; | |
972 | default: | |
973 | error = "Undocumented fault"; | |
974 | break; | |
975 | } | |
976 | ||
977 | dev_warn(&pdev->dev, | |
978 | "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n", | |
979 | error, fault->address, fault->specinfo, | |
980 | PCI_SLOT(fault->func), PCI_FUNC(fault->func)); | |
95f4f8da JK |
981 | |
982 | /* For VF faults, clear out the respective LPORT, reset the queue | |
983 | * resources, and then reconnect to the mailbox. This allows the | |
984 | * VF in question to resume behavior. For transient faults that are | |
985 | * the result of non-malicious behavior this will log the fault and | |
986 | * allow the VF to resume functionality. Obviously for malicious VFs | |
987 | * they will be able to attempt malicious behavior again. In this | |
988 | * case, the system administrator will need to step in and manually | |
989 | * remove or disable the VF in question. | |
990 | */ | |
991 | if (fault->func && iov_data) { | |
992 | int vf = fault->func - 1; | |
993 | struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf]; | |
994 | ||
995 | hw->iov.ops.reset_lport(hw, vf_info); | |
996 | hw->iov.ops.reset_resources(hw, vf_info); | |
997 | ||
998 | /* reset_lport disables the VF, so re-enable it */ | |
999 | hw->iov.ops.set_lport(hw, vf_info, vf, | |
1000 | FM10K_VF_FLAG_MULTI_CAPABLE); | |
1001 | ||
1002 | /* reset_resources will disconnect from the mbx */ | |
1003 | vf_info->mbx.ops.connect(hw, &vf_info->mbx); | |
1004 | } | |
18283cad AD |
1005 | } |
1006 | ||
1007 | static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr) | |
1008 | { | |
1009 | struct fm10k_hw *hw = &interface->hw; | |
1010 | struct fm10k_fault fault = { 0 }; | |
1011 | int type, err; | |
1012 | ||
1013 | for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT; | |
1014 | eicr; | |
1015 | eicr >>= 1, type += FM10K_FAULT_SIZE) { | |
1016 | /* only check if there is an error reported */ | |
1017 | if (!(eicr & 0x1)) | |
1018 | continue; | |
1019 | ||
1020 | /* retrieve fault info */ | |
1021 | err = hw->mac.ops.get_fault(hw, type, &fault); | |
1022 | if (err) { | |
1023 | dev_err(&interface->pdev->dev, | |
1024 | "error reading fault\n"); | |
1025 | continue; | |
1026 | } | |
1027 | ||
95f4f8da | 1028 | fm10k_handle_fault(interface, type, &fault); |
18283cad AD |
1029 | } |
1030 | } | |
1031 | ||
1032 | static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr) | |
1033 | { | |
1034 | struct fm10k_hw *hw = &interface->hw; | |
1035 | const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY; | |
1036 | u32 maxholdq; | |
1037 | int q; | |
1038 | ||
1039 | if (!(eicr & FM10K_EICR_MAXHOLDTIME)) | |
1040 | return; | |
1041 | ||
1042 | maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7)); | |
1043 | if (maxholdq) | |
1044 | fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq); | |
1045 | for (q = 255;;) { | |
1046 | if (maxholdq & (1 << 31)) { | |
1047 | if (q < FM10K_MAX_QUEUES_PF) { | |
1048 | interface->rx_overrun_pf++; | |
1049 | fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl); | |
1050 | } else { | |
1051 | interface->rx_overrun_vf++; | |
1052 | } | |
1053 | } | |
1054 | ||
1055 | maxholdq *= 2; | |
1056 | if (!maxholdq) | |
1057 | q &= ~(32 - 1); | |
1058 | ||
1059 | if (!q) | |
1060 | break; | |
1061 | ||
1062 | if (q-- % 32) | |
1063 | continue; | |
1064 | ||
1065 | maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32)); | |
1066 | if (maxholdq) | |
1067 | fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq); | |
1068 | } | |
1069 | } | |
1070 | ||
de445199 | 1071 | static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data) |
18283cad AD |
1072 | { |
1073 | struct fm10k_intfc *interface = data; | |
1074 | struct fm10k_hw *hw = &interface->hw; | |
1075 | struct fm10k_mbx_info *mbx = &hw->mbx; | |
1076 | u32 eicr; | |
1077 | ||
1078 | /* unmask any set bits related to this interrupt */ | |
1079 | eicr = fm10k_read_reg(hw, FM10K_EICR); | |
1080 | fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX | | |
1081 | FM10K_EICR_SWITCHREADY | | |
1082 | FM10K_EICR_SWITCHNOTREADY)); | |
1083 | ||
1084 | /* report any faults found to the message log */ | |
1085 | fm10k_report_fault(interface, eicr); | |
1086 | ||
1087 | /* reset any queues disabled due to receiver overrun */ | |
1088 | fm10k_reset_drop_on_empty(interface, eicr); | |
1089 | ||
1090 | /* service mailboxes */ | |
1091 | if (fm10k_mbx_trylock(interface)) { | |
1092 | mbx->ops.process(hw, mbx); | |
9de15bda | 1093 | /* handle VFLRE events */ |
883a9ccb | 1094 | fm10k_iov_event(interface); |
18283cad AD |
1095 | fm10k_mbx_unlock(interface); |
1096 | } | |
1097 | ||
b7d8514c AD |
1098 | /* if switch toggled state we should reset GLORTs */ |
1099 | if (eicr & FM10K_EICR_SWITCHNOTREADY) { | |
1100 | /* force link down for at least 4 seconds */ | |
1101 | interface->link_down_event = jiffies + (4 * HZ); | |
1102 | set_bit(__FM10K_LINK_DOWN, &interface->state); | |
1103 | ||
1104 | /* reset dglort_map back to no config */ | |
1105 | hw->mac.dglort_map = FM10K_DGLORTMAP_NONE; | |
1106 | } | |
1107 | ||
1108 | /* we should validate host state after interrupt event */ | |
1109 | hw->mac.get_host_state = 1; | |
9de15bda JK |
1110 | |
1111 | /* validate host state, and handle VF mailboxes in the service task */ | |
b7d8514c AD |
1112 | fm10k_service_event_schedule(interface); |
1113 | ||
18283cad AD |
1114 | /* re-enable mailbox interrupt and indicate 20us delay */ |
1115 | fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR), | |
242722dd JK |
1116 | FM10K_ITR_ENABLE | (FM10K_MBX_INT_DELAY >> |
1117 | hw->mac.itr_scale)); | |
18283cad AD |
1118 | |
1119 | return IRQ_HANDLED; | |
1120 | } | |
1121 | ||
1122 | void fm10k_mbx_free_irq(struct fm10k_intfc *interface) | |
1123 | { | |
1124 | struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; | |
1125 | struct fm10k_hw *hw = &interface->hw; | |
1126 | int itr_reg; | |
1127 | ||
e00e23bc AD |
1128 | /* no mailbox IRQ to free if MSI-X is not enabled */ |
1129 | if (!interface->msix_entries) | |
1130 | return; | |
1131 | ||
18283cad AD |
1132 | /* disconnect the mailbox */ |
1133 | hw->mbx.ops.disconnect(hw, &hw->mbx); | |
1134 | ||
1135 | /* disable Mailbox cause */ | |
1136 | if (hw->mac.type == fm10k_mac_pf) { | |
1137 | fm10k_write_reg(hw, FM10K_EIMR, | |
1138 | FM10K_EIMR_DISABLE(PCA_FAULT) | | |
1139 | FM10K_EIMR_DISABLE(FUM_FAULT) | | |
1140 | FM10K_EIMR_DISABLE(MAILBOX) | | |
1141 | FM10K_EIMR_DISABLE(SWITCHREADY) | | |
1142 | FM10K_EIMR_DISABLE(SWITCHNOTREADY) | | |
1143 | FM10K_EIMR_DISABLE(SRAMERROR) | | |
1144 | FM10K_EIMR_DISABLE(VFLR) | | |
1145 | FM10K_EIMR_DISABLE(MAXHOLDTIME)); | |
1146 | itr_reg = FM10K_ITR(FM10K_MBX_VECTOR); | |
5cb8db4a AD |
1147 | } else { |
1148 | itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR); | |
18283cad AD |
1149 | } |
1150 | ||
1151 | fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET); | |
1152 | ||
1153 | free_irq(entry->vector, interface); | |
1154 | } | |
1155 | ||
5cb8db4a AD |
1156 | static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results, |
1157 | struct fm10k_mbx_info *mbx) | |
1158 | { | |
1159 | bool vlan_override = hw->mac.vlan_override; | |
1160 | u16 default_vid = hw->mac.default_vid; | |
1161 | struct fm10k_intfc *interface; | |
1162 | s32 err; | |
1163 | ||
1164 | err = fm10k_msg_mac_vlan_vf(hw, results, mbx); | |
1165 | if (err) | |
1166 | return err; | |
1167 | ||
1168 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1169 | ||
1170 | /* MAC was changed so we need reset */ | |
1171 | if (is_valid_ether_addr(hw->mac.perm_addr) && | |
1172 | memcmp(hw->mac.perm_addr, hw->mac.addr, ETH_ALEN)) | |
1173 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1174 | ||
1175 | /* VLAN override was changed, or default VLAN changed */ | |
1176 | if ((vlan_override != hw->mac.vlan_override) || | |
1177 | (default_vid != hw->mac.default_vid)) | |
1178 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1179 | ||
1180 | return 0; | |
1181 | } | |
1182 | ||
a211e013 | 1183 | static s32 fm10k_1588_msg_vf(struct fm10k_hw *hw, u32 **results, |
de445199 | 1184 | struct fm10k_mbx_info __always_unused *mbx) |
a211e013 AD |
1185 | { |
1186 | struct fm10k_intfc *interface; | |
1187 | u64 timestamp; | |
1188 | s32 err; | |
1189 | ||
1190 | err = fm10k_tlv_attr_get_u64(results[FM10K_1588_MSG_TIMESTAMP], | |
1191 | ×tamp); | |
1192 | if (err) | |
1193 | return err; | |
1194 | ||
1195 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1196 | ||
1197 | fm10k_ts_tx_hwtstamp(interface, 0, timestamp); | |
1198 | ||
1199 | return 0; | |
1200 | } | |
1201 | ||
18283cad AD |
1202 | /* generic error handler for mailbox issues */ |
1203 | static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results, | |
de445199 | 1204 | struct fm10k_mbx_info __always_unused *mbx) |
18283cad AD |
1205 | { |
1206 | struct fm10k_intfc *interface; | |
1207 | struct pci_dev *pdev; | |
1208 | ||
1209 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1210 | pdev = interface->pdev; | |
1211 | ||
1212 | dev_err(&pdev->dev, "Unknown message ID %u\n", | |
1213 | **results & FM10K_TLV_ID_MASK); | |
1214 | ||
1215 | return 0; | |
1216 | } | |
1217 | ||
5cb8db4a AD |
1218 | static const struct fm10k_msg_data vf_mbx_data[] = { |
1219 | FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test), | |
1220 | FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr), | |
1221 | FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf), | |
a211e013 | 1222 | FM10K_VF_MSG_1588_HANDLER(fm10k_1588_msg_vf), |
5cb8db4a AD |
1223 | FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), |
1224 | }; | |
1225 | ||
1226 | static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface) | |
1227 | { | |
1228 | struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; | |
1229 | struct net_device *dev = interface->netdev; | |
1230 | struct fm10k_hw *hw = &interface->hw; | |
1231 | int err; | |
1232 | ||
1233 | /* Use timer0 for interrupt moderation on the mailbox */ | |
1234 | u32 itr = FM10K_INT_MAP_TIMER0 | entry->entry; | |
1235 | ||
1236 | /* register mailbox handlers */ | |
1237 | err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data); | |
1238 | if (err) | |
1239 | return err; | |
1240 | ||
1241 | /* request the IRQ */ | |
1242 | err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0, | |
1243 | dev->name, interface); | |
1244 | if (err) { | |
1245 | netif_err(interface, probe, dev, | |
1246 | "request_irq for msix_mbx failed: %d\n", err); | |
1247 | return err; | |
1248 | } | |
1249 | ||
1250 | /* map all of the interrupt sources */ | |
1251 | fm10k_write_reg(hw, FM10K_VFINT_MAP, itr); | |
1252 | ||
1253 | /* enable interrupt */ | |
1254 | fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE); | |
1255 | ||
1256 | return 0; | |
1257 | } | |
1258 | ||
18283cad AD |
1259 | static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results, |
1260 | struct fm10k_mbx_info *mbx) | |
1261 | { | |
1262 | struct fm10k_intfc *interface; | |
1263 | u32 dglort_map = hw->mac.dglort_map; | |
1264 | s32 err; | |
1265 | ||
1266 | err = fm10k_msg_lport_map_pf(hw, results, mbx); | |
1267 | if (err) | |
1268 | return err; | |
1269 | ||
1270 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1271 | ||
1272 | /* we need to reset if port count was just updated */ | |
1273 | if (dglort_map != hw->mac.dglort_map) | |
1274 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1275 | ||
1276 | return 0; | |
1277 | } | |
1278 | ||
1279 | static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results, | |
de445199 | 1280 | struct fm10k_mbx_info __always_unused *mbx) |
18283cad AD |
1281 | { |
1282 | struct fm10k_intfc *interface; | |
1283 | u16 glort, pvid; | |
1284 | u32 pvid_update; | |
1285 | s32 err; | |
1286 | ||
1287 | err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID], | |
1288 | &pvid_update); | |
1289 | if (err) | |
1290 | return err; | |
1291 | ||
1292 | /* extract values from the pvid update */ | |
1293 | glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT); | |
1294 | pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID); | |
1295 | ||
1296 | /* if glort is not valid return error */ | |
1297 | if (!fm10k_glort_valid_pf(hw, glort)) | |
1298 | return FM10K_ERR_PARAM; | |
1299 | ||
aa502b4a | 1300 | /* verify VLAN ID is valid */ |
18283cad AD |
1301 | if (pvid >= FM10K_VLAN_TABLE_VID_MAX) |
1302 | return FM10K_ERR_PARAM; | |
1303 | ||
1304 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1305 | ||
883a9ccb AD |
1306 | /* check to see if this belongs to one of the VFs */ |
1307 | err = fm10k_iov_update_pvid(interface, glort, pvid); | |
1308 | if (!err) | |
1309 | return 0; | |
1310 | ||
18283cad AD |
1311 | /* we need to reset if default VLAN was just updated */ |
1312 | if (pvid != hw->mac.default_vid) | |
1313 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
1314 | ||
1315 | hw->mac.default_vid = pvid; | |
1316 | ||
1317 | return 0; | |
1318 | } | |
1319 | ||
a211e013 | 1320 | static s32 fm10k_1588_msg_pf(struct fm10k_hw *hw, u32 **results, |
de445199 | 1321 | struct fm10k_mbx_info __always_unused *mbx) |
a211e013 AD |
1322 | { |
1323 | struct fm10k_swapi_1588_timestamp timestamp; | |
1324 | struct fm10k_iov_data *iov_data; | |
1325 | struct fm10k_intfc *interface; | |
1326 | u16 sglort, vf_idx; | |
1327 | s32 err; | |
1328 | ||
1329 | err = fm10k_tlv_attr_get_le_struct( | |
1330 | results[FM10K_PF_ATTR_ID_1588_TIMESTAMP], | |
1331 | ×tamp, sizeof(timestamp)); | |
1332 | if (err) | |
1333 | return err; | |
1334 | ||
1335 | interface = container_of(hw, struct fm10k_intfc, hw); | |
1336 | ||
1337 | if (timestamp.dglort) { | |
1338 | fm10k_ts_tx_hwtstamp(interface, timestamp.dglort, | |
1339 | le64_to_cpu(timestamp.egress)); | |
1340 | return 0; | |
1341 | } | |
1342 | ||
1343 | /* either dglort or sglort must be set */ | |
1344 | if (!timestamp.sglort) | |
1345 | return FM10K_ERR_PARAM; | |
1346 | ||
1347 | /* verify GLORT is at least one of the ones we own */ | |
1348 | sglort = le16_to_cpu(timestamp.sglort); | |
1349 | if (!fm10k_glort_valid_pf(hw, sglort)) | |
1350 | return FM10K_ERR_PARAM; | |
1351 | ||
1352 | if (sglort == interface->glort) { | |
1353 | fm10k_ts_tx_hwtstamp(interface, 0, | |
1354 | le64_to_cpu(timestamp.ingress)); | |
1355 | return 0; | |
1356 | } | |
1357 | ||
1358 | /* if there is no iov_data then there is no mailboxes to process */ | |
1359 | if (!ACCESS_ONCE(interface->iov_data)) | |
1360 | return FM10K_ERR_PARAM; | |
1361 | ||
1362 | rcu_read_lock(); | |
1363 | ||
1364 | /* notify VF if this timestamp belongs to it */ | |
1365 | iov_data = interface->iov_data; | |
1366 | vf_idx = (hw->mac.dglort_map & FM10K_DGLORTMAP_NONE) - sglort; | |
1367 | ||
1368 | if (!iov_data || vf_idx >= iov_data->num_vfs) { | |
1369 | err = FM10K_ERR_PARAM; | |
1370 | goto err_unlock; | |
1371 | } | |
1372 | ||
1373 | err = hw->iov.ops.report_timestamp(hw, &iov_data->vf_info[vf_idx], | |
1374 | le64_to_cpu(timestamp.ingress)); | |
1375 | ||
1376 | err_unlock: | |
1377 | rcu_read_unlock(); | |
1378 | ||
1379 | return err; | |
1380 | } | |
1381 | ||
18283cad AD |
1382 | static const struct fm10k_msg_data pf_mbx_data[] = { |
1383 | FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf), | |
1384 | FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf), | |
1385 | FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map), | |
1386 | FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf), | |
1387 | FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf), | |
1388 | FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid), | |
a211e013 | 1389 | FM10K_PF_MSG_1588_TIMESTAMP_HANDLER(fm10k_1588_msg_pf), |
18283cad AD |
1390 | FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error), |
1391 | }; | |
1392 | ||
1393 | static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface) | |
1394 | { | |
1395 | struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR]; | |
1396 | struct net_device *dev = interface->netdev; | |
1397 | struct fm10k_hw *hw = &interface->hw; | |
1398 | int err; | |
1399 | ||
1400 | /* Use timer0 for interrupt moderation on the mailbox */ | |
1401 | u32 mbx_itr = FM10K_INT_MAP_TIMER0 | entry->entry; | |
1402 | u32 other_itr = FM10K_INT_MAP_IMMEDIATE | entry->entry; | |
1403 | ||
1404 | /* register mailbox handlers */ | |
1405 | err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data); | |
1406 | if (err) | |
1407 | return err; | |
1408 | ||
1409 | /* request the IRQ */ | |
1410 | err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0, | |
1411 | dev->name, interface); | |
1412 | if (err) { | |
1413 | netif_err(interface, probe, dev, | |
1414 | "request_irq for msix_mbx failed: %d\n", err); | |
1415 | return err; | |
1416 | } | |
1417 | ||
1418 | /* Enable interrupts w/ no moderation for "other" interrupts */ | |
40423dd2 JK |
1419 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr); |
1420 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr); | |
1421 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr); | |
1422 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr); | |
1423 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr); | |
18283cad AD |
1424 | |
1425 | /* Enable interrupts w/ moderation for mailbox */ | |
40423dd2 | 1426 | fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr); |
18283cad AD |
1427 | |
1428 | /* Enable individual interrupt causes */ | |
1429 | fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) | | |
1430 | FM10K_EIMR_ENABLE(FUM_FAULT) | | |
1431 | FM10K_EIMR_ENABLE(MAILBOX) | | |
1432 | FM10K_EIMR_ENABLE(SWITCHREADY) | | |
1433 | FM10K_EIMR_ENABLE(SWITCHNOTREADY) | | |
1434 | FM10K_EIMR_ENABLE(SRAMERROR) | | |
1435 | FM10K_EIMR_ENABLE(VFLR) | | |
1436 | FM10K_EIMR_ENABLE(MAXHOLDTIME)); | |
1437 | ||
1438 | /* enable interrupt */ | |
1439 | fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE); | |
1440 | ||
1441 | return 0; | |
1442 | } | |
1443 | ||
1444 | int fm10k_mbx_request_irq(struct fm10k_intfc *interface) | |
1445 | { | |
1446 | struct fm10k_hw *hw = &interface->hw; | |
1447 | int err; | |
1448 | ||
1449 | /* enable Mailbox cause */ | |
5cb8db4a AD |
1450 | if (hw->mac.type == fm10k_mac_pf) |
1451 | err = fm10k_mbx_request_irq_pf(interface); | |
1452 | else | |
1453 | err = fm10k_mbx_request_irq_vf(interface); | |
e00e23bc AD |
1454 | if (err) |
1455 | return err; | |
18283cad AD |
1456 | |
1457 | /* connect mailbox */ | |
e00e23bc AD |
1458 | err = hw->mbx.ops.connect(hw, &hw->mbx); |
1459 | ||
1460 | /* if the mailbox failed to connect, then free IRQ */ | |
1461 | if (err) | |
1462 | fm10k_mbx_free_irq(interface); | |
18283cad AD |
1463 | |
1464 | return err; | |
1465 | } | |
1466 | ||
1467 | /** | |
1468 | * fm10k_qv_free_irq - release interrupts associated with queue vectors | |
1469 | * @interface: board private structure | |
1470 | * | |
1471 | * Release all interrupts associated with this interface | |
1472 | **/ | |
1473 | void fm10k_qv_free_irq(struct fm10k_intfc *interface) | |
1474 | { | |
1475 | int vector = interface->num_q_vectors; | |
1476 | struct fm10k_hw *hw = &interface->hw; | |
1477 | struct msix_entry *entry; | |
1478 | ||
1479 | entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector]; | |
1480 | ||
1481 | while (vector) { | |
1482 | struct fm10k_q_vector *q_vector; | |
1483 | ||
1484 | vector--; | |
1485 | entry--; | |
1486 | q_vector = interface->q_vector[vector]; | |
1487 | ||
1488 | if (!q_vector->tx.count && !q_vector->rx.count) | |
1489 | continue; | |
1490 | ||
1491 | /* disable interrupts */ | |
1492 | ||
1493 | writel(FM10K_ITR_MASK_SET, q_vector->itr); | |
1494 | ||
1495 | free_irq(entry->vector, q_vector); | |
1496 | } | |
1497 | } | |
1498 | ||
1499 | /** | |
1500 | * fm10k_qv_request_irq - initialize interrupts for queue vectors | |
1501 | * @interface: board private structure | |
1502 | * | |
1503 | * Attempts to configure interrupts using the best available | |
1504 | * capabilities of the hardware and kernel. | |
1505 | **/ | |
1506 | int fm10k_qv_request_irq(struct fm10k_intfc *interface) | |
1507 | { | |
1508 | struct net_device *dev = interface->netdev; | |
1509 | struct fm10k_hw *hw = &interface->hw; | |
1510 | struct msix_entry *entry; | |
1511 | int ri = 0, ti = 0; | |
1512 | int vector, err; | |
1513 | ||
1514 | entry = &interface->msix_entries[NON_Q_VECTORS(hw)]; | |
1515 | ||
1516 | for (vector = 0; vector < interface->num_q_vectors; vector++) { | |
1517 | struct fm10k_q_vector *q_vector = interface->q_vector[vector]; | |
1518 | ||
1519 | /* name the vector */ | |
1520 | if (q_vector->tx.count && q_vector->rx.count) { | |
1521 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1522 | "%s-TxRx-%d", dev->name, ri++); | |
1523 | ti++; | |
1524 | } else if (q_vector->rx.count) { | |
1525 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1526 | "%s-rx-%d", dev->name, ri++); | |
1527 | } else if (q_vector->tx.count) { | |
1528 | snprintf(q_vector->name, sizeof(q_vector->name) - 1, | |
1529 | "%s-tx-%d", dev->name, ti++); | |
1530 | } else { | |
1531 | /* skip this unused q_vector */ | |
1532 | continue; | |
1533 | } | |
1534 | ||
1535 | /* Assign ITR register to q_vector */ | |
5cb8db4a AD |
1536 | q_vector->itr = (hw->mac.type == fm10k_mac_pf) ? |
1537 | &interface->uc_addr[FM10K_ITR(entry->entry)] : | |
1538 | &interface->uc_addr[FM10K_VFITR(entry->entry)]; | |
18283cad AD |
1539 | |
1540 | /* request the IRQ */ | |
1541 | err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0, | |
1542 | q_vector->name, q_vector); | |
1543 | if (err) { | |
1544 | netif_err(interface, probe, dev, | |
1545 | "request_irq failed for MSIX interrupt Error: %d\n", | |
1546 | err); | |
1547 | goto err_out; | |
1548 | } | |
1549 | ||
1550 | /* Enable q_vector */ | |
1551 | writel(FM10K_ITR_ENABLE, q_vector->itr); | |
1552 | ||
1553 | entry++; | |
1554 | } | |
1555 | ||
1556 | return 0; | |
1557 | ||
1558 | err_out: | |
1559 | /* wind through the ring freeing all entries and vectors */ | |
1560 | while (vector) { | |
1561 | struct fm10k_q_vector *q_vector; | |
1562 | ||
1563 | entry--; | |
1564 | vector--; | |
1565 | q_vector = interface->q_vector[vector]; | |
1566 | ||
1567 | if (!q_vector->tx.count && !q_vector->rx.count) | |
1568 | continue; | |
1569 | ||
1570 | /* disable interrupts */ | |
1571 | ||
1572 | writel(FM10K_ITR_MASK_SET, q_vector->itr); | |
1573 | ||
1574 | free_irq(entry->vector, q_vector); | |
1575 | } | |
1576 | ||
1577 | return err; | |
1578 | } | |
1579 | ||
504c5eac AD |
1580 | void fm10k_up(struct fm10k_intfc *interface) |
1581 | { | |
1582 | struct fm10k_hw *hw = &interface->hw; | |
1583 | ||
1584 | /* Enable Tx/Rx DMA */ | |
1585 | hw->mac.ops.start_hw(hw); | |
1586 | ||
3abaae42 AD |
1587 | /* configure Tx descriptor rings */ |
1588 | fm10k_configure_tx(interface); | |
1589 | ||
1590 | /* configure Rx descriptor rings */ | |
1591 | fm10k_configure_rx(interface); | |
1592 | ||
504c5eac AD |
1593 | /* configure interrupts */ |
1594 | hw->mac.ops.update_int_moderator(hw); | |
1595 | ||
1596 | /* clear down bit to indicate we are ready to go */ | |
1597 | clear_bit(__FM10K_DOWN, &interface->state); | |
1598 | ||
18283cad AD |
1599 | /* enable polling cleanups */ |
1600 | fm10k_napi_enable_all(interface); | |
1601 | ||
504c5eac AD |
1602 | /* re-establish Rx filters */ |
1603 | fm10k_restore_rx_state(interface); | |
1604 | ||
1605 | /* enable transmits */ | |
1606 | netif_tx_start_all_queues(interface->netdev); | |
b7d8514c | 1607 | |
54b3c9cf | 1608 | /* kick off the service timer now */ |
4d419156 | 1609 | hw->mac.get_host_state = 1; |
b7d8514c | 1610 | mod_timer(&interface->service_timer, jiffies); |
504c5eac AD |
1611 | } |
1612 | ||
18283cad AD |
1613 | static void fm10k_napi_disable_all(struct fm10k_intfc *interface) |
1614 | { | |
1615 | struct fm10k_q_vector *q_vector; | |
1616 | int q_idx; | |
1617 | ||
1618 | for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) { | |
1619 | q_vector = interface->q_vector[q_idx]; | |
1620 | napi_disable(&q_vector->napi); | |
1621 | } | |
1622 | } | |
1623 | ||
504c5eac AD |
1624 | void fm10k_down(struct fm10k_intfc *interface) |
1625 | { | |
1626 | struct net_device *netdev = interface->netdev; | |
1627 | struct fm10k_hw *hw = &interface->hw; | |
1628 | ||
1629 | /* signal that we are down to the interrupt handler and service task */ | |
1630 | set_bit(__FM10K_DOWN, &interface->state); | |
1631 | ||
1632 | /* call carrier off first to avoid false dev_watchdog timeouts */ | |
1633 | netif_carrier_off(netdev); | |
1634 | ||
1635 | /* disable transmits */ | |
1636 | netif_tx_stop_all_queues(netdev); | |
1637 | netif_tx_disable(netdev); | |
1638 | ||
1639 | /* reset Rx filters */ | |
1640 | fm10k_reset_rx_state(interface); | |
1641 | ||
1642 | /* allow 10ms for device to quiesce */ | |
1643 | usleep_range(10000, 20000); | |
1644 | ||
18283cad AD |
1645 | /* disable polling routines */ |
1646 | fm10k_napi_disable_all(interface); | |
1647 | ||
b7d8514c AD |
1648 | /* capture stats one last time before stopping interface */ |
1649 | fm10k_update_stats(interface); | |
1650 | ||
504c5eac AD |
1651 | /* Disable DMA engine for Tx/Rx */ |
1652 | hw->mac.ops.stop_hw(hw); | |
3abaae42 AD |
1653 | |
1654 | /* free any buffers still on the rings */ | |
1655 | fm10k_clean_all_tx_rings(interface); | |
ec6acb80 | 1656 | fm10k_clean_all_rx_rings(interface); |
504c5eac AD |
1657 | } |
1658 | ||
0e7b3644 AD |
1659 | /** |
1660 | * fm10k_sw_init - Initialize general software structures | |
1661 | * @interface: host interface private structure to initialize | |
1662 | * | |
1663 | * fm10k_sw_init initializes the interface private data structure. | |
1664 | * Fields are initialized based on PCI device information and | |
1665 | * OS network device settings (MTU size). | |
1666 | **/ | |
1667 | static int fm10k_sw_init(struct fm10k_intfc *interface, | |
1668 | const struct pci_device_id *ent) | |
1669 | { | |
0e7b3644 AD |
1670 | const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data]; |
1671 | struct fm10k_hw *hw = &interface->hw; | |
1672 | struct pci_dev *pdev = interface->pdev; | |
1673 | struct net_device *netdev = interface->netdev; | |
c41a4fba | 1674 | u32 rss_key[FM10K_RSSRK_SIZE]; |
0e7b3644 AD |
1675 | unsigned int rss; |
1676 | int err; | |
1677 | ||
1678 | /* initialize back pointer */ | |
1679 | hw->back = interface; | |
1680 | hw->hw_addr = interface->uc_addr; | |
1681 | ||
1682 | /* PCI config space info */ | |
1683 | hw->vendor_id = pdev->vendor; | |
1684 | hw->device_id = pdev->device; | |
1685 | hw->revision_id = pdev->revision; | |
1686 | hw->subsystem_vendor_id = pdev->subsystem_vendor; | |
1687 | hw->subsystem_device_id = pdev->subsystem_device; | |
1688 | ||
1689 | /* Setup hw api */ | |
1690 | memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops)); | |
1691 | hw->mac.type = fi->mac; | |
1692 | ||
883a9ccb AD |
1693 | /* Setup IOV handlers */ |
1694 | if (fi->iov_ops) | |
1695 | memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops)); | |
1696 | ||
0e7b3644 AD |
1697 | /* Set common capability flags and settings */ |
1698 | rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus()); | |
1699 | interface->ring_feature[RING_F_RSS].limit = rss; | |
1700 | fi->get_invariants(hw); | |
1701 | ||
1702 | /* pick up the PCIe bus settings for reporting later */ | |
1703 | if (hw->mac.ops.get_bus_info) | |
1704 | hw->mac.ops.get_bus_info(hw); | |
1705 | ||
1706 | /* limit the usable DMA range */ | |
1707 | if (hw->mac.ops.set_dma_mask) | |
1708 | hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev)); | |
1709 | ||
1710 | /* update netdev with DMA restrictions */ | |
1711 | if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) { | |
1712 | netdev->features |= NETIF_F_HIGHDMA; | |
1713 | netdev->vlan_features |= NETIF_F_HIGHDMA; | |
1714 | } | |
1715 | ||
b7d8514c AD |
1716 | /* delay any future reset requests */ |
1717 | interface->last_reset = jiffies + (10 * HZ); | |
1718 | ||
0e7b3644 | 1719 | /* reset and initialize the hardware so it is in a known state */ |
1343c65f JK |
1720 | err = hw->mac.ops.reset_hw(hw); |
1721 | if (err) { | |
1722 | dev_err(&pdev->dev, "reset_hw failed: %d\n", err); | |
1723 | return err; | |
1724 | } | |
1725 | ||
1726 | err = hw->mac.ops.init_hw(hw); | |
0e7b3644 AD |
1727 | if (err) { |
1728 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
1729 | return err; | |
1730 | } | |
1731 | ||
1732 | /* initialize hardware statistics */ | |
1733 | hw->mac.ops.update_hw_stats(hw, &interface->stats); | |
1734 | ||
883a9ccb AD |
1735 | /* Set upper limit on IOV VFs that can be allocated */ |
1736 | pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs); | |
1737 | ||
0e7b3644 AD |
1738 | /* Start with random Ethernet address */ |
1739 | eth_random_addr(hw->mac.addr); | |
1740 | ||
1741 | /* Initialize MAC address from hardware */ | |
1742 | err = hw->mac.ops.read_mac_addr(hw); | |
1743 | if (err) { | |
1744 | dev_warn(&pdev->dev, | |
1745 | "Failed to obtain MAC address defaulting to random\n"); | |
1746 | /* tag address assignment as random */ | |
1747 | netdev->addr_assign_type |= NET_ADDR_RANDOM; | |
1748 | } | |
1749 | ||
1750 | memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); | |
1751 | memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len); | |
1752 | ||
1753 | if (!is_valid_ether_addr(netdev->perm_addr)) { | |
1754 | dev_err(&pdev->dev, "Invalid MAC Address\n"); | |
1755 | return -EIO; | |
1756 | } | |
1757 | ||
a211e013 AD |
1758 | /* assign BAR 4 resources for use with PTP */ |
1759 | if (fm10k_read_reg(hw, FM10K_CTRL) & FM10K_CTRL_BAR4_ALLOWED) | |
1760 | interface->sw_addr = ioremap(pci_resource_start(pdev, 4), | |
1761 | pci_resource_len(pdev, 4)); | |
1762 | hw->sw_addr = interface->sw_addr; | |
1763 | ||
9f801abc AD |
1764 | /* initialize DCBNL interface */ |
1765 | fm10k_dcbnl_set_ops(netdev); | |
1766 | ||
b7d8514c AD |
1767 | /* Initialize service timer and service task */ |
1768 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
1769 | setup_timer(&interface->service_timer, &fm10k_service_timer, | |
1770 | (unsigned long)interface); | |
1771 | INIT_WORK(&interface->service_task, fm10k_service_task); | |
1772 | ||
54b3c9cf JK |
1773 | /* kick off service timer now, even when interface is down */ |
1774 | mod_timer(&interface->service_timer, (HZ * 2) + jiffies); | |
1775 | ||
a211e013 AD |
1776 | /* Intitialize timestamp data */ |
1777 | fm10k_ts_init(interface); | |
1778 | ||
e27ef599 AD |
1779 | /* set default ring sizes */ |
1780 | interface->tx_ring_count = FM10K_DEFAULT_TXD; | |
1781 | interface->rx_ring_count = FM10K_DEFAULT_RXD; | |
1782 | ||
18283cad | 1783 | /* set default interrupt moderation */ |
436ea956 JK |
1784 | interface->tx_itr = FM10K_TX_ITR_DEFAULT; |
1785 | interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT; | |
18283cad | 1786 | |
0e7b3644 AD |
1787 | /* initialize vxlan_port list */ |
1788 | INIT_LIST_HEAD(&interface->vxlan_port); | |
1789 | ||
c41a4fba ED |
1790 | netdev_rss_key_fill(rss_key, sizeof(rss_key)); |
1791 | memcpy(interface->rssrk, rss_key, sizeof(rss_key)); | |
0e7b3644 AD |
1792 | |
1793 | /* Start off interface as being down */ | |
1794 | set_bit(__FM10K_DOWN, &interface->state); | |
1795 | ||
1796 | return 0; | |
1797 | } | |
1798 | ||
1799 | static void fm10k_slot_warn(struct fm10k_intfc *interface) | |
1800 | { | |
106c07a4 JK |
1801 | enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN; |
1802 | enum pci_bus_speed speed = PCI_SPEED_UNKNOWN; | |
0e7b3644 | 1803 | struct fm10k_hw *hw = &interface->hw; |
106c07a4 | 1804 | int max_gts = 0, expected_gts = 0; |
0e7b3644 | 1805 | |
106c07a4 JK |
1806 | if (pcie_get_minimum_link(interface->pdev, &speed, &width) || |
1807 | speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) { | |
1808 | dev_warn(&interface->pdev->dev, | |
1809 | "Unable to determine PCI Express bandwidth.\n"); | |
0e7b3644 | 1810 | return; |
106c07a4 JK |
1811 | } |
1812 | ||
1813 | switch (speed) { | |
1814 | case PCIE_SPEED_2_5GT: | |
1815 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1816 | max_gts = 2 * width; | |
1817 | break; | |
1818 | case PCIE_SPEED_5_0GT: | |
1819 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1820 | max_gts = 4 * width; | |
1821 | break; | |
1822 | case PCIE_SPEED_8_0GT: | |
1823 | /* 128b/130b encoding has less than 2% impact on throughput */ | |
1824 | max_gts = 8 * width; | |
1825 | break; | |
1826 | default: | |
1827 | dev_warn(&interface->pdev->dev, | |
1828 | "Unable to determine PCI Express bandwidth.\n"); | |
1829 | return; | |
1830 | } | |
1831 | ||
1832 | dev_info(&interface->pdev->dev, | |
1833 | "PCI Express bandwidth of %dGT/s available\n", | |
1834 | max_gts); | |
1835 | dev_info(&interface->pdev->dev, | |
1836 | "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n", | |
1837 | (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" : | |
1838 | speed == PCIE_SPEED_5_0GT ? "5.0GT/s" : | |
1839 | speed == PCIE_SPEED_2_5GT ? "2.5GT/s" : | |
1840 | "Unknown"), | |
1841 | hw->bus.width, | |
1842 | (speed == PCIE_SPEED_2_5GT ? "20%" : | |
1843 | speed == PCIE_SPEED_5_0GT ? "20%" : | |
1844 | speed == PCIE_SPEED_8_0GT ? "<2%" : | |
1845 | "Unknown"), | |
1846 | (hw->bus.payload == fm10k_bus_payload_128 ? "128B" : | |
1847 | hw->bus.payload == fm10k_bus_payload_256 ? "256B" : | |
1848 | hw->bus.payload == fm10k_bus_payload_512 ? "512B" : | |
1849 | "Unknown")); | |
0e7b3644 | 1850 | |
106c07a4 JK |
1851 | switch (hw->bus_caps.speed) { |
1852 | case fm10k_bus_speed_2500: | |
1853 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1854 | expected_gts = 2 * hw->bus_caps.width; | |
1855 | break; | |
1856 | case fm10k_bus_speed_5000: | |
1857 | /* 8b/10b encoding reduces max throughput by 20% */ | |
1858 | expected_gts = 4 * hw->bus_caps.width; | |
1859 | break; | |
1860 | case fm10k_bus_speed_8000: | |
1861 | /* 128b/130b encoding has less than 2% impact on throughput */ | |
1862 | expected_gts = 8 * hw->bus_caps.width; | |
1863 | break; | |
1864 | default: | |
1865 | dev_warn(&interface->pdev->dev, | |
1866 | "Unable to determine expected PCI Express bandwidth.\n"); | |
1867 | return; | |
1868 | } | |
1869 | ||
3d02b3df BA |
1870 | if (max_gts >= expected_gts) |
1871 | return; | |
1872 | ||
1873 | dev_warn(&interface->pdev->dev, | |
1874 | "This device requires %dGT/s of bandwidth for optimal performance.\n", | |
1875 | expected_gts); | |
1876 | dev_warn(&interface->pdev->dev, | |
1877 | "A %sslot with x%d lanes is suggested.\n", | |
1878 | (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " : | |
1879 | hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " : | |
1880 | hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""), | |
1881 | hw->bus_caps.width); | |
0e7b3644 AD |
1882 | } |
1883 | ||
b3890e30 AD |
1884 | /** |
1885 | * fm10k_probe - Device Initialization Routine | |
1886 | * @pdev: PCI device information struct | |
1887 | * @ent: entry in fm10k_pci_tbl | |
1888 | * | |
1889 | * Returns 0 on success, negative on failure | |
1890 | * | |
1891 | * fm10k_probe initializes an interface identified by a pci_dev structure. | |
1892 | * The OS initialization, configuring of the interface private structure, | |
1893 | * and a hardware reset occur. | |
1894 | **/ | |
a4fcad65 | 1895 | static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
b3890e30 | 1896 | { |
0e7b3644 AD |
1897 | struct net_device *netdev; |
1898 | struct fm10k_intfc *interface; | |
b3890e30 | 1899 | int err; |
b3890e30 AD |
1900 | |
1901 | err = pci_enable_device_mem(pdev); | |
1902 | if (err) | |
1903 | return err; | |
1904 | ||
c04ae58e JK |
1905 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)); |
1906 | if (err) | |
b3890e30 | 1907 | err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); |
c04ae58e JK |
1908 | if (err) { |
1909 | dev_err(&pdev->dev, | |
1910 | "DMA configuration failed: %d\n", err); | |
1911 | goto err_dma; | |
b3890e30 AD |
1912 | } |
1913 | ||
1914 | err = pci_request_selected_regions(pdev, | |
1915 | pci_select_bars(pdev, | |
1916 | IORESOURCE_MEM), | |
1917 | fm10k_driver_name); | |
1918 | if (err) { | |
1919 | dev_err(&pdev->dev, | |
0197cde6 | 1920 | "pci_request_selected_regions failed: %d\n", err); |
b3890e30 AD |
1921 | goto err_pci_reg; |
1922 | } | |
1923 | ||
19ae1b3f AD |
1924 | pci_enable_pcie_error_reporting(pdev); |
1925 | ||
b3890e30 AD |
1926 | pci_set_master(pdev); |
1927 | pci_save_state(pdev); | |
1928 | ||
e0244903 | 1929 | netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]); |
0e7b3644 AD |
1930 | if (!netdev) { |
1931 | err = -ENOMEM; | |
1932 | goto err_alloc_netdev; | |
1933 | } | |
1934 | ||
1935 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
1936 | ||
1937 | interface = netdev_priv(netdev); | |
1938 | pci_set_drvdata(pdev, interface); | |
1939 | ||
1940 | interface->netdev = netdev; | |
1941 | interface->pdev = pdev; | |
0e7b3644 AD |
1942 | |
1943 | interface->uc_addr = ioremap(pci_resource_start(pdev, 0), | |
1944 | FM10K_UC_ADDR_SIZE); | |
1945 | if (!interface->uc_addr) { | |
1946 | err = -EIO; | |
1947 | goto err_ioremap; | |
1948 | } | |
1949 | ||
1950 | err = fm10k_sw_init(interface, ent); | |
1951 | if (err) | |
1952 | goto err_sw_init; | |
1953 | ||
7461fd91 AD |
1954 | /* enable debugfs support */ |
1955 | fm10k_dbg_intfc_init(interface); | |
1956 | ||
18283cad AD |
1957 | err = fm10k_init_queueing_scheme(interface); |
1958 | if (err) | |
1959 | goto err_sw_init; | |
1960 | ||
1961 | err = fm10k_mbx_request_irq(interface); | |
1962 | if (err) | |
1963 | goto err_mbx_interrupt; | |
1964 | ||
0e7b3644 AD |
1965 | /* final check of hardware state before registering the interface */ |
1966 | err = fm10k_hw_ready(interface); | |
1967 | if (err) | |
1968 | goto err_register; | |
1969 | ||
1970 | err = register_netdev(netdev); | |
1971 | if (err) | |
1972 | goto err_register; | |
1973 | ||
1974 | /* carrier off reporting is important to ethtool even BEFORE open */ | |
1975 | netif_carrier_off(netdev); | |
1976 | ||
1977 | /* stop all the transmit queues from transmitting until link is up */ | |
1978 | netif_tx_stop_all_queues(netdev); | |
1979 | ||
a211e013 AD |
1980 | /* Register PTP interface */ |
1981 | fm10k_ptp_register(interface); | |
1982 | ||
0e7b3644 AD |
1983 | /* print warning for non-optimal configurations */ |
1984 | fm10k_slot_warn(interface); | |
1985 | ||
0ff36676 AD |
1986 | /* report MAC address for logging */ |
1987 | dev_info(&pdev->dev, "%pM\n", netdev->dev_addr); | |
1988 | ||
883a9ccb AD |
1989 | /* enable SR-IOV after registering netdev to enforce PF/VF ordering */ |
1990 | fm10k_iov_configure(pdev, 0); | |
1991 | ||
b7d8514c AD |
1992 | /* clear the service task disable bit to allow service task to start */ |
1993 | clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
1994 | ||
b3890e30 AD |
1995 | return 0; |
1996 | ||
0e7b3644 | 1997 | err_register: |
18283cad AD |
1998 | fm10k_mbx_free_irq(interface); |
1999 | err_mbx_interrupt: | |
2000 | fm10k_clear_queueing_scheme(interface); | |
0e7b3644 | 2001 | err_sw_init: |
a211e013 AD |
2002 | if (interface->sw_addr) |
2003 | iounmap(interface->sw_addr); | |
0e7b3644 AD |
2004 | iounmap(interface->uc_addr); |
2005 | err_ioremap: | |
2006 | free_netdev(netdev); | |
2007 | err_alloc_netdev: | |
2008 | pci_release_selected_regions(pdev, | |
2009 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
b3890e30 AD |
2010 | err_pci_reg: |
2011 | err_dma: | |
2012 | pci_disable_device(pdev); | |
2013 | return err; | |
2014 | } | |
2015 | ||
2016 | /** | |
2017 | * fm10k_remove - Device Removal Routine | |
2018 | * @pdev: PCI device information struct | |
2019 | * | |
2020 | * fm10k_remove is called by the PCI subsystem to alert the driver | |
2021 | * that it should release a PCI device. The could be caused by a | |
2022 | * Hot-Plug event, or because the driver is going to be removed from | |
2023 | * memory. | |
2024 | **/ | |
2025 | static void fm10k_remove(struct pci_dev *pdev) | |
2026 | { | |
0e7b3644 AD |
2027 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); |
2028 | struct net_device *netdev = interface->netdev; | |
2029 | ||
54b3c9cf JK |
2030 | del_timer_sync(&interface->service_timer); |
2031 | ||
b7d8514c AD |
2032 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); |
2033 | cancel_work_sync(&interface->service_task); | |
2034 | ||
0e7b3644 AD |
2035 | /* free netdev, this may bounce the interrupts due to setup_tc */ |
2036 | if (netdev->reg_state == NETREG_REGISTERED) | |
2037 | unregister_netdev(netdev); | |
2038 | ||
a211e013 AD |
2039 | /* cleanup timestamp handling */ |
2040 | fm10k_ptp_unregister(interface); | |
2041 | ||
883a9ccb AD |
2042 | /* release VFs */ |
2043 | fm10k_iov_disable(pdev); | |
2044 | ||
18283cad AD |
2045 | /* disable mailbox interrupt */ |
2046 | fm10k_mbx_free_irq(interface); | |
2047 | ||
2048 | /* free interrupts */ | |
2049 | fm10k_clear_queueing_scheme(interface); | |
2050 | ||
7461fd91 AD |
2051 | /* remove any debugfs interfaces */ |
2052 | fm10k_dbg_intfc_exit(interface); | |
2053 | ||
a211e013 AD |
2054 | if (interface->sw_addr) |
2055 | iounmap(interface->sw_addr); | |
0e7b3644 AD |
2056 | iounmap(interface->uc_addr); |
2057 | ||
2058 | free_netdev(netdev); | |
2059 | ||
b3890e30 AD |
2060 | pci_release_selected_regions(pdev, |
2061 | pci_select_bars(pdev, IORESOURCE_MEM)); | |
2062 | ||
19ae1b3f AD |
2063 | pci_disable_pcie_error_reporting(pdev); |
2064 | ||
b3890e30 AD |
2065 | pci_disable_device(pdev); |
2066 | } | |
2067 | ||
19ae1b3f AD |
2068 | #ifdef CONFIG_PM |
2069 | /** | |
2070 | * fm10k_resume - Restore device to pre-sleep state | |
2071 | * @pdev: PCI device information struct | |
2072 | * | |
2073 | * fm10k_resume is called after the system has powered back up from a sleep | |
2074 | * state and is ready to resume operation. This function is meant to restore | |
2075 | * the device back to its pre-sleep state. | |
2076 | **/ | |
2077 | static int fm10k_resume(struct pci_dev *pdev) | |
2078 | { | |
2079 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2080 | struct net_device *netdev = interface->netdev; | |
2081 | struct fm10k_hw *hw = &interface->hw; | |
2082 | u32 err; | |
2083 | ||
2084 | pci_set_power_state(pdev, PCI_D0); | |
2085 | pci_restore_state(pdev); | |
2086 | ||
2087 | /* pci_restore_state clears dev->state_saved so call | |
2088 | * pci_save_state to restore it. | |
2089 | */ | |
2090 | pci_save_state(pdev); | |
2091 | ||
2092 | err = pci_enable_device_mem(pdev); | |
2093 | if (err) { | |
2094 | dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); | |
2095 | return err; | |
2096 | } | |
2097 | pci_set_master(pdev); | |
2098 | ||
2099 | pci_wake_from_d3(pdev, false); | |
2100 | ||
2101 | /* refresh hw_addr in case it was dropped */ | |
2102 | hw->hw_addr = interface->uc_addr; | |
2103 | ||
2104 | /* reset hardware to known state */ | |
2105 | err = hw->mac.ops.init_hw(&interface->hw); | |
1343c65f JK |
2106 | if (err) { |
2107 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
19ae1b3f | 2108 | return err; |
1343c65f | 2109 | } |
19ae1b3f AD |
2110 | |
2111 | /* reset statistics starting values */ | |
2112 | hw->mac.ops.rebind_hw_stats(hw, &interface->stats); | |
2113 | ||
a211e013 AD |
2114 | /* reset clock */ |
2115 | fm10k_ts_reset(interface); | |
2116 | ||
19ae1b3f AD |
2117 | rtnl_lock(); |
2118 | ||
2119 | err = fm10k_init_queueing_scheme(interface); | |
2120 | if (!err) { | |
2121 | fm10k_mbx_request_irq(interface); | |
2122 | if (netif_running(netdev)) | |
2123 | err = fm10k_open(netdev); | |
2124 | } | |
2125 | ||
2126 | rtnl_unlock(); | |
2127 | ||
2128 | if (err) | |
2129 | return err; | |
2130 | ||
e4029662 JK |
2131 | /* assume host is not ready, to prevent race with watchdog in case we |
2132 | * actually don't have connection to the switch | |
2133 | */ | |
2134 | interface->host_ready = false; | |
2135 | fm10k_watchdog_host_not_ready(interface); | |
2136 | ||
2137 | /* clear the service task disable bit to allow service task to start */ | |
2138 | clear_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
2139 | fm10k_service_event_schedule(interface); | |
2140 | ||
883a9ccb AD |
2141 | /* restore SR-IOV interface */ |
2142 | fm10k_iov_resume(pdev); | |
2143 | ||
19ae1b3f AD |
2144 | netif_device_attach(netdev); |
2145 | ||
2146 | return 0; | |
2147 | } | |
2148 | ||
2149 | /** | |
2150 | * fm10k_suspend - Prepare the device for a system sleep state | |
2151 | * @pdev: PCI device information struct | |
2152 | * | |
2153 | * fm10k_suspend is meant to shutdown the device prior to the system entering | |
2154 | * a sleep state. The fm10k hardware does not support wake on lan so the | |
2155 | * driver simply needs to shut down the device so it is in a low power state. | |
2156 | **/ | |
de445199 JK |
2157 | static int fm10k_suspend(struct pci_dev *pdev, |
2158 | pm_message_t __always_unused state) | |
19ae1b3f AD |
2159 | { |
2160 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2161 | struct net_device *netdev = interface->netdev; | |
2162 | int err = 0; | |
2163 | ||
2164 | netif_device_detach(netdev); | |
2165 | ||
883a9ccb AD |
2166 | fm10k_iov_suspend(pdev); |
2167 | ||
e4029662 JK |
2168 | /* the watchdog tasks may read registers, which will appear like a |
2169 | * surprise-remove event once the PCI device is disabled. This will | |
2170 | * cause us to close the netdevice, so we don't retain the open/closed | |
2171 | * state post-resume. Prevent this by disabling the service task while | |
2172 | * suspended, until we actually resume. | |
2173 | */ | |
2174 | set_bit(__FM10K_SERVICE_DISABLE, &interface->state); | |
2175 | cancel_work_sync(&interface->service_task); | |
2176 | ||
19ae1b3f AD |
2177 | rtnl_lock(); |
2178 | ||
2179 | if (netif_running(netdev)) | |
2180 | fm10k_close(netdev); | |
2181 | ||
2182 | fm10k_mbx_free_irq(interface); | |
2183 | ||
2184 | fm10k_clear_queueing_scheme(interface); | |
2185 | ||
2186 | rtnl_unlock(); | |
2187 | ||
2188 | err = pci_save_state(pdev); | |
2189 | if (err) | |
2190 | return err; | |
2191 | ||
2192 | pci_disable_device(pdev); | |
2193 | pci_wake_from_d3(pdev, false); | |
2194 | pci_set_power_state(pdev, PCI_D3hot); | |
2195 | ||
2196 | return 0; | |
2197 | } | |
2198 | ||
2199 | #endif /* CONFIG_PM */ | |
2200 | /** | |
2201 | * fm10k_io_error_detected - called when PCI error is detected | |
2202 | * @pdev: Pointer to PCI device | |
2203 | * @state: The current pci connection state | |
2204 | * | |
2205 | * This function is called after a PCI bus error affecting | |
2206 | * this device has been detected. | |
2207 | */ | |
2208 | static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev, | |
2209 | pci_channel_state_t state) | |
2210 | { | |
2211 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2212 | struct net_device *netdev = interface->netdev; | |
2213 | ||
2214 | netif_device_detach(netdev); | |
2215 | ||
2216 | if (state == pci_channel_io_perm_failure) | |
2217 | return PCI_ERS_RESULT_DISCONNECT; | |
2218 | ||
2219 | if (netif_running(netdev)) | |
2220 | fm10k_close(netdev); | |
2221 | ||
875328e4 JK |
2222 | /* free interrupts */ |
2223 | fm10k_clear_queueing_scheme(interface); | |
2224 | ||
19ae1b3f AD |
2225 | fm10k_mbx_free_irq(interface); |
2226 | ||
2227 | pci_disable_device(pdev); | |
2228 | ||
2229 | /* Request a slot reset. */ | |
2230 | return PCI_ERS_RESULT_NEED_RESET; | |
2231 | } | |
2232 | ||
2233 | /** | |
2234 | * fm10k_io_slot_reset - called after the pci bus has been reset. | |
2235 | * @pdev: Pointer to PCI device | |
2236 | * | |
2237 | * Restart the card from scratch, as if from a cold-boot. | |
2238 | */ | |
2239 | static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev) | |
2240 | { | |
2241 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2242 | pci_ers_result_t result; | |
2243 | ||
2244 | if (pci_enable_device_mem(pdev)) { | |
2245 | dev_err(&pdev->dev, | |
2246 | "Cannot re-enable PCI device after reset.\n"); | |
2247 | result = PCI_ERS_RESULT_DISCONNECT; | |
2248 | } else { | |
2249 | pci_set_master(pdev); | |
2250 | pci_restore_state(pdev); | |
2251 | ||
2252 | /* After second error pci->state_saved is false, this | |
2253 | * resets it so EEH doesn't break. | |
2254 | */ | |
2255 | pci_save_state(pdev); | |
2256 | ||
2257 | pci_wake_from_d3(pdev, false); | |
2258 | ||
2259 | /* refresh hw_addr in case it was dropped */ | |
2260 | interface->hw.hw_addr = interface->uc_addr; | |
2261 | ||
2262 | interface->flags |= FM10K_FLAG_RESET_REQUESTED; | |
2263 | fm10k_service_event_schedule(interface); | |
2264 | ||
2265 | result = PCI_ERS_RESULT_RECOVERED; | |
2266 | } | |
2267 | ||
2268 | pci_cleanup_aer_uncorrect_error_status(pdev); | |
2269 | ||
2270 | return result; | |
2271 | } | |
2272 | ||
2273 | /** | |
2274 | * fm10k_io_resume - called when traffic can start flowing again. | |
2275 | * @pdev: Pointer to PCI device | |
2276 | * | |
2277 | * This callback is called when the error recovery driver tells us that | |
2278 | * its OK to resume normal operation. | |
2279 | */ | |
2280 | static void fm10k_io_resume(struct pci_dev *pdev) | |
2281 | { | |
2282 | struct fm10k_intfc *interface = pci_get_drvdata(pdev); | |
2283 | struct net_device *netdev = interface->netdev; | |
2284 | struct fm10k_hw *hw = &interface->hw; | |
2285 | int err = 0; | |
2286 | ||
2287 | /* reset hardware to known state */ | |
1343c65f JK |
2288 | err = hw->mac.ops.init_hw(&interface->hw); |
2289 | if (err) { | |
2290 | dev_err(&pdev->dev, "init_hw failed: %d\n", err); | |
2291 | return; | |
2292 | } | |
19ae1b3f AD |
2293 | |
2294 | /* reset statistics starting values */ | |
2295 | hw->mac.ops.rebind_hw_stats(hw, &interface->stats); | |
2296 | ||
875328e4 JK |
2297 | err = fm10k_init_queueing_scheme(interface); |
2298 | if (err) { | |
3d02b3df BA |
2299 | dev_err(&interface->pdev->dev, |
2300 | "init_queueing_scheme failed: %d\n", err); | |
875328e4 JK |
2301 | return; |
2302 | } | |
2303 | ||
19ae1b3f AD |
2304 | /* reassociate interrupts */ |
2305 | fm10k_mbx_request_irq(interface); | |
2306 | ||
a211e013 AD |
2307 | /* reset clock */ |
2308 | fm10k_ts_reset(interface); | |
2309 | ||
19ae1b3f AD |
2310 | if (netif_running(netdev)) |
2311 | err = fm10k_open(netdev); | |
2312 | ||
2313 | /* final check of hardware state before registering the interface */ | |
2314 | err = err ? : fm10k_hw_ready(interface); | |
2315 | ||
2316 | if (!err) | |
2317 | netif_device_attach(netdev); | |
2318 | } | |
2319 | ||
2320 | static const struct pci_error_handlers fm10k_err_handler = { | |
2321 | .error_detected = fm10k_io_error_detected, | |
2322 | .slot_reset = fm10k_io_slot_reset, | |
2323 | .resume = fm10k_io_resume, | |
2324 | }; | |
2325 | ||
b3890e30 AD |
2326 | static struct pci_driver fm10k_driver = { |
2327 | .name = fm10k_driver_name, | |
2328 | .id_table = fm10k_pci_tbl, | |
2329 | .probe = fm10k_probe, | |
2330 | .remove = fm10k_remove, | |
19ae1b3f AD |
2331 | #ifdef CONFIG_PM |
2332 | .suspend = fm10k_suspend, | |
2333 | .resume = fm10k_resume, | |
2334 | #endif | |
883a9ccb | 2335 | .sriov_configure = fm10k_iov_configure, |
19ae1b3f | 2336 | .err_handler = &fm10k_err_handler |
b3890e30 AD |
2337 | }; |
2338 | ||
2339 | /** | |
2340 | * fm10k_register_pci_driver - register driver interface | |
2341 | * | |
2342 | * This funciton is called on module load in order to register the driver. | |
2343 | **/ | |
2344 | int fm10k_register_pci_driver(void) | |
2345 | { | |
2346 | return pci_register_driver(&fm10k_driver); | |
2347 | } | |
2348 | ||
2349 | /** | |
2350 | * fm10k_unregister_pci_driver - unregister driver interface | |
2351 | * | |
2352 | * This funciton is called on module unload in order to remove the driver. | |
2353 | **/ | |
2354 | void fm10k_unregister_pci_driver(void) | |
2355 | { | |
2356 | pci_unregister_driver(&fm10k_driver); | |
2357 | } |