i40e: For VF reset (VFR and VFLR) add some more delay
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
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5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
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15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
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17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
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32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
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40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
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49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
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54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
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57#include "i40e_type.h"
58#include "i40e_prototype.h"
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59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
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62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
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66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 74#define I40E_MAX_REGISTER 0x800000
232f4706 75#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
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76#define I40E_DEFAULT_NUM_DESCRIPTORS 512
77#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
78#define I40E_MIN_NUM_DESCRIPTORS 64
79#define I40E_MIN_MSIX 2
80#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 81#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
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82#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
83#define I40E_DEFAULT_QUEUES_PER_VF 4
84#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 85#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
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86#define I40E_FDIR_RING 0
87#define I40E_FDIR_RING_COUNT 32
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88#ifdef I40E_FCOE
89#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
90#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
91#endif /* I40E_FCOE */
7daa6bf3 92#define I40E_MAX_AQ_BUF_SIZE 4096
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93#define I40E_AQ_LEN 256
94#define I40E_AQ_WORK_LIMIT 32
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95#define I40E_MAX_USER_PRIORITY 8
96#define I40E_DEFAULT_MSG_ENABLE 4
23527308 97#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 98#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3 99
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100/* Ethtool Private Flags */
101#define I40E_PRIV_FLAGS_NPAR_FLAG (1 << 0)
102
7daa6bf3 103#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 104#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
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105#define I40E_NVM_VERSION_HI_SHIFT 12
106#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
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107
108/* The values in here are decimal coded as hex as is the case in the NVM map*/
109#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 110#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 111
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112/* magic for getting defines into strings */
113#define STRINGIFY(foo) #foo
114#define XSTRINGIFY(bar) STRINGIFY(bar)
115
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116#define I40E_RX_DESC(R, i) \
117 ((ring_is_16byte_desc_enabled(R)) \
118 ? (union i40e_32byte_rx_desc *) \
119 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
120 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
121#define I40E_TX_DESC(R, i) \
122 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
123#define I40E_TX_CTXTDESC(R, i) \
124 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
125#define I40E_TX_FDIRDESC(R, i) \
126 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
127
128/* default to trying for four seconds */
129#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
130
131/* driver state flags */
132enum i40e_state_t {
133 __I40E_TESTING,
134 __I40E_CONFIG_BUSY,
135 __I40E_CONFIG_DONE,
136 __I40E_DOWN,
137 __I40E_NEEDS_RESTART,
138 __I40E_SERVICE_SCHED,
139 __I40E_ADMINQ_EVENT_PENDING,
140 __I40E_MDD_EVENT_PENDING,
141 __I40E_VFLR_EVENT_PENDING,
142 __I40E_RESET_RECOVERY_PENDING,
143 __I40E_RESET_INTR_RECEIVED,
144 __I40E_REINIT_REQUESTED,
145 __I40E_PF_RESET_REQUESTED,
146 __I40E_CORE_RESET_REQUESTED,
147 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 148 __I40E_EMP_RESET_REQUESTED,
9df42d1a 149 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 150 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 151 __I40E_SUSPENDED,
9ce34f02 152 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 153 __I40E_BAD_EEPROM,
b5d06f05 154 __I40E_DOWN_REQUESTED,
1e1be8f6 155 __I40E_FD_FLUSH_REQUESTED,
a316f651 156 __I40E_RESET_FAILED,
69129dc3 157 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 158 __I40E_VF_DISABLE,
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159};
160
161enum i40e_interrupt_policy {
162 I40E_INTERRUPT_BEST_CASE,
163 I40E_INTERRUPT_MEDIUM,
164 I40E_INTERRUPT_LOWEST
165};
166
167struct i40e_lump_tracking {
168 u16 num_entries;
169 u16 search_hint;
170 u16 list[0];
171#define I40E_PILE_VALID_BIT 0x8000
172};
173
174#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
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ASJ
175#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
176#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 177#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 178#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 179
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180#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
181
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182enum i40e_fd_stat_idx {
183 I40E_FD_STAT_ATR,
184 I40E_FD_STAT_SB,
185 I40E_FD_STAT_PF_COUNT
186};
187#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
188#define I40E_FD_ATR_STAT_IDX(pf_id) \
189 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
190#define I40E_FD_SB_STAT_IDX(pf_id) \
191 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
192
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JG
193struct i40e_fdir_filter {
194 struct hlist_node fdir_node;
195 /* filter ipnut set */
196 u8 flow_type;
197 u8 ip4_proto;
04b73bd7 198 /* TX packet view of src and dst */
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199 __be32 dst_ip[4];
200 __be32 src_ip[4];
201 __be16 src_port;
202 __be16 dst_port;
203 __be32 sctp_v_tag;
204 /* filter control */
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205 u16 q_index;
206 u8 flex_off;
207 u8 pctype;
208 u16 dest_vsi;
209 u8 dest_ctl;
210 u8 fd_status;
211 u16 cnt_index;
212 u32 fd_id;
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213};
214
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215#define I40E_ETH_P_LLDP 0x88cc
216
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217#define I40E_DCB_PRIO_TYPE_STRICT 0
218#define I40E_DCB_PRIO_TYPE_ETS 1
219#define I40E_DCB_STRICT_PRIO_CREDITS 127
220#define I40E_MAX_USER_PRIORITY 8
221/* DCB per TC information data structure */
222struct i40e_tc_info {
223 u16 qoffset; /* Queue offset from base queue */
224 u16 qcount; /* Total Queues */
225 u8 netdev_tc; /* Netdev TC index if netdev associated */
226};
227
228/* TC configuration data structure */
229struct i40e_tc_configuration {
230 u8 numtc; /* Total number of enabled TCs */
231 u8 enabled_tc; /* TC map */
232 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
233};
234
235/* struct that defines the Ethernet device */
236struct i40e_pf {
237 struct pci_dev *pdev;
238 struct i40e_hw hw;
239 unsigned long state;
240 unsigned long link_check_timeout;
241 struct msix_entry *msix_entries;
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242 bool fc_autoneg_status;
243
244 u16 eeprom_version;
b40c82e6 245 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
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246 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
247 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
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248 u16 num_req_vfs; /* num VFs requested for this VF */
249 u16 num_vf_qps; /* num queue pairs per VF */
38e00438 250#ifdef I40E_FCOE
b40c82e6 251 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
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252 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
253#endif /* I40E_FCOE */
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254 u16 num_lan_qps; /* num lan queues this PF has set up */
255 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
f8ff1464 256 int queues_left; /* queues left unclaimed */
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257 u16 rss_size; /* num queues in the RSS array */
258 u16 rss_size_max; /* HW defined max RSS queues */
259 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 260 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 261 u8 atr_sample_rate;
8e2773ae 262 bool wol_en;
7daa6bf3 263
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264 struct hlist_head fdir_filter_list;
265 u16 fdir_pf_active_filters;
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266 u16 fd_sb_cnt_idx;
267 u16 fd_atr_cnt_idx;
1e1be8f6 268 unsigned long fd_flush_timestamp;
60793f4a 269 u32 fd_flush_cnt;
1e1be8f6
ASJ
270 u32 fd_add_err;
271 u32 fd_atr_cnt;
272 u32 fd_tcp_rule;
17a73f6b 273
a1c9a9d9
JK
274#ifdef CONFIG_I40E_VXLAN
275 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
276 u16 pending_vxlan_bitmap;
277
278#endif
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279 enum i40e_interrupt_policy int_policy;
280 u16 rx_itr_default;
281 u16 tx_itr_default;
71e6163a 282 u32 msg_enable;
b294ac70 283 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 284 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN
285 unsigned long service_timer_period;
286 unsigned long service_timer_previous;
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287 struct timer_list service_timer;
288 struct work_struct service_task;
289
290 u64 flags;
291#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
292#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
293#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
294#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
295#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
296#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
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NP
297#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
298#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
299#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
38e00438
VD
300#ifdef I40E_FCOE
301#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
302#endif /* I40E_FCOE */
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NP
303#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
304#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
305#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
306#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
307#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
308#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
309#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
310#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB
311#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
312#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 313#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
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314#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
315#ifdef CONFIG_I40E_VXLAN
316#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
317#endif
1f224ad2 318#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 319#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 320
61dade7e
ASJ
321 /* tracks features that get auto disabled by errors */
322 u64 auto_disable_flags;
323
38e00438
VD
324#ifdef I40E_FCOE
325 struct i40e_fcoe fcoe;
326
327#endif /* I40E_FCOE */
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328 bool stat_offsets_loaded;
329 struct i40e_hw_port_stats stats;
330 struct i40e_hw_port_stats stats_offsets;
331 u32 tx_timeout_count;
332 u32 tx_timeout_recovery_level;
333 unsigned long tx_timeout_last_recovery;
810b3ae4 334 u32 tx_sluggish_count;
7daa6bf3
JB
335 u32 hw_csum_rx_error;
336 u32 led_status;
337 u16 corer_count; /* Core reset count */
338 u16 globr_count; /* Global reset count */
339 u16 empr_count; /* EMP reset count */
340 u16 pfr_count; /* PF reset count */
cd92e72f 341 u16 sw_int_count; /* SW interrupt count */
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342
343 struct mutex switch_mutex;
344 u16 lan_vsi; /* our default LAN VSI */
345 u16 lan_veb; /* initial relay, if exists */
346#define I40E_NO_VEB 0xffff
347#define I40E_NO_VSI 0xffff
348 u16 next_vsi; /* Next unallocated VSI - 0-based! */
349 struct i40e_vsi **vsi;
350 struct i40e_veb *veb[I40E_MAX_VEB];
351
352 struct i40e_lump_tracking *qp_pile;
353 struct i40e_lump_tracking *irq_pile;
354
355 /* switch config info */
356 u16 pf_seid;
357 u16 main_vsi_seid;
358 u16 mac_seid;
7daa6bf3
JB
359 struct kobject *switch_kobj;
360#ifdef CONFIG_DEBUG_FS
361 struct dentry *i40e_dbg_pf;
362#endif /* CONFIG_DEBUG_FS */
363
93cd765b
ASJ
364 u16 instance; /* A unique number per i40e_pf instance in the system */
365
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JB
366 /* sr-iov config info */
367 struct i40e_vf *vf;
368 int num_alloc_vfs; /* actual number of VFs allocated */
369 u32 vf_aq_requests;
370
371 /* DCBx/DCBNL capability for PF that indicates
372 * whether DCBx is managed by firmware or host
373 * based agent (LLDPAD). Also, indicates what
374 * flavor of DCBx protocol (IEEE/CEE) is supported
375 * by the device. For now we're supporting IEEE
376 * mode only.
377 */
378 u16 dcbx_cap;
379
380 u32 fcoe_hmc_filt_num;
381 u32 fcoe_hmc_cntx_num;
382 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK
383
384 struct ptp_clock *ptp_clock;
385 struct ptp_clock_info ptp_caps;
386 struct sk_buff *ptp_tx_skb;
beb0dff1 387 struct hwtstamp_config tstamp_config;
beb0dff1
JK
388 unsigned long last_rx_ptp_check;
389 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
390 u64 ptp_base_adj;
391 u32 tx_hwtstamp_timeouts;
392 u32 rx_hwtstamp_cleared;
393 bool ptp_tx;
394 bool ptp_rx;
e157ea30 395 u16 rss_table_size;
f4492db1
GR
396 /* These are only valid in NPAR modes */
397 u32 npar_max_bw;
398 u32 npar_min_bw;
7daa6bf3
JB
399};
400
401struct i40e_mac_filter {
402 struct list_head list;
403 u8 macaddr[ETH_ALEN];
404#define I40E_VLAN_ANY -1
405 s16 vlan;
406 u8 counter; /* number of instances of this filter */
407 bool is_vf; /* filter belongs to a VF */
408 bool is_netdev; /* filter belongs to a netdev */
409 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 410 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB
411};
412
413struct i40e_veb {
414 struct i40e_pf *pf;
415 u16 idx;
416 u16 veb_idx; /* index of VEB parent */
417 u16 seid;
418 u16 uplink_seid;
419 u16 stats_idx; /* index of VEB parent */
420 u8 enabled_tc;
51616018 421 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB
422 u16 flags;
423 u16 bw_limit;
424 u8 bw_max_quanta;
425 bool is_abs_credits;
426 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
427 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
428 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
429 struct kobject *kobj;
430 bool stat_offsets_loaded;
431 struct i40e_eth_stats stats;
432 struct i40e_eth_stats stats_offsets;
433};
434
435/* struct that defines a VSI, associated with a dev */
436struct i40e_vsi {
437 struct net_device *netdev;
438 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
439 bool netdev_registered;
440 bool stat_offsets_loaded;
441
442 u32 current_netdev_flags;
443 unsigned long state;
444#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
445#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
446 unsigned long flags;
447
448 struct list_head mac_filter_list;
449
450 /* VSI stats */
451 struct rtnl_link_stats64 net_stats;
452 struct rtnl_link_stats64 net_stats_offsets;
453 struct i40e_eth_stats eth_stats;
454 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD
455#ifdef I40E_FCOE
456 struct i40e_fcoe_stats fcoe_stats;
457 struct i40e_fcoe_stats fcoe_stats_offsets;
458 bool fcoe_stat_offsets_loaded;
459#endif
7daa6bf3
JB
460 u32 tx_restart;
461 u32 tx_busy;
462 u32 rx_buf_failed;
463 u32 rx_page_failed;
464
9f65e15b
AD
465 /* These are containers of ring pointers, allocated at run-time */
466 struct i40e_ring **rx_rings;
467 struct i40e_ring **tx_rings;
7daa6bf3
JB
468
469 u16 work_limit;
470 /* high bit set means dynamic, use accessor routines to read/write.
471 * hardware only supports 2us resolution for the ITR registers.
472 * these values always store the USER setting, and must be converted
473 * before programming to a register.
474 */
475 u16 rx_itr_setting;
476 u16 tx_itr_setting;
477
5db4cb59 478 u16 rss_table_size;
66ddcffb 479 u16 rss_size;
5db4cb59 480
7daa6bf3
JB
481 u16 max_frame;
482 u16 rx_hdr_len;
483 u16 rx_buf_len;
484 u8 dtype;
485
486 /* List of q_vectors allocated to this VSI */
493fb300 487 struct i40e_q_vector **q_vectors;
7daa6bf3
JB
488 int num_q_vectors;
489 int base_vector;
63741846 490 bool irqs_ready;
7daa6bf3
JB
491
492 u16 seid; /* HW index of this VSI (absolute index) */
493 u16 id; /* VSI number */
494 u16 uplink_seid;
495
496 u16 base_queue; /* vsi's first queue in hw array */
497 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 498 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB
499 u16 num_queue_pairs; /* Used tx and rx pairs */
500 u16 num_desc;
501 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
502 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
503
504 struct i40e_tc_configuration tc_config;
505 struct i40e_aqc_vsi_properties_data info;
506
507 /* VSI BW limit (absolute across all TCs) */
508 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
509 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
510
511 /* Relative TC credits across VSIs */
512 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
513 /* TC BW limit credits within VSI */
514 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
515 /* TC BW limit max quanta within VSI */
516 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
517
518 struct i40e_pf *back; /* Backreference to associated PF */
519 u16 idx; /* index in pf->vsi[] */
520 u16 veb_idx; /* index of VEB parent */
521 struct kobject *kobj; /* sysfs object */
522
523 /* VSI specific handlers */
524 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW
525
526 /* current rxnfc data */
527 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB
528} ____cacheline_internodealigned_in_smp;
529
530struct i40e_netdev_priv {
531 struct i40e_vsi *vsi;
532};
533
534/* struct that defines an interrupt vector */
535struct i40e_q_vector {
536 struct i40e_vsi *vsi;
537
538 u16 v_idx; /* index in the vsi->q_vector array. */
539 u16 reg_idx; /* register index of the interrupt */
540
541 struct napi_struct napi;
542
543 struct i40e_ring_container rx;
544 struct i40e_ring_container tx;
545
546 u8 num_ringpairs; /* total number of ring pairs in vector */
547
7daa6bf3 548 cpumask_t affinity_mask;
493fb300 549 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 550 char name[I40E_INT_NAME_STR_LEN];
7daa6bf3
JB
551} ____cacheline_internodealigned_in_smp;
552
553/* lan device */
554struct i40e_device {
555 struct list_head list;
556 struct i40e_pf *pf;
557};
558
559/**
560 * i40e_fw_version_str - format the FW and NVM version strings
561 * @hw: ptr to the hardware info
562 **/
563static inline char *i40e_fw_version_str(struct i40e_hw *hw)
564{
565 static char buf[32];
566
567 snprintf(buf, sizeof(buf),
7edf810c
SN
568 "f%d.%d.%05d a%d.%d n%x.%02x e%x",
569 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
7daa6bf3 570 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB
571 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
572 I40E_NVM_VERSION_HI_SHIFT,
573 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
574 I40E_NVM_VERSION_LO_SHIFT,
7edf810c 575 (hw->nvm.eetrack & 0xffffff));
7daa6bf3
JB
576
577 return buf;
578}
579
580/**
581 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
582 * @netdev: the corresponding netdev
583 *
584 * Return the PF struct for the given netdev
585 **/
586static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
587{
588 struct i40e_netdev_priv *np = netdev_priv(netdev);
589 struct i40e_vsi *vsi = np->vsi;
590
591 return vsi->back;
592}
593
594static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
595 irqreturn_t (*irq_handler)(int, void *))
596{
597 vsi->irq_handler = irq_handler;
598}
599
600/**
601 * i40e_rx_is_programming_status - check for programming status descriptor
602 * @qw: the first quad word of the program status descriptor
603 *
604 * The value of in the descriptor length field indicate if this
605 * is a programming status descriptor for flow director or FCoE
606 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
607 * it is a packet descriptor.
608 **/
609static inline bool i40e_rx_is_programming_status(u64 qw)
610{
611 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
612 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
613}
614
082def10
ASJ
615/**
616 * i40e_get_fd_cnt_all - get the total FD filter space available
b40c82e6 617 * @pf: pointer to the PF struct
082def10
ASJ
618 **/
619static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
620{
621 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
622}
623
7daa6bf3
JB
624/* needed by i40e_ethtool.c */
625int i40e_up(struct i40e_vsi *vsi);
626void i40e_down(struct i40e_vsi *vsi);
627extern const char i40e_driver_name[];
628extern const char i40e_driver_version_str[];
23326186 629void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3 630void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
fdf0e0bf 631struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
7daa6bf3
JB
632void i40e_update_stats(struct i40e_vsi *vsi);
633void i40e_update_eth_stats(struct i40e_vsi *vsi);
634struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
635int i40e_fetch_switch_configuration(struct i40e_pf *pf,
636 bool printconfig);
637
17a73f6b 638int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 639 struct i40e_pf *pf, bool add);
17a73f6b
JG
640int i40e_add_del_fdir(struct i40e_vsi *vsi,
641 struct i40e_fdir_filter *input, bool add);
55a5e60b 642void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ
643u32 i40e_get_current_fd_count(struct i40e_pf *pf);
644u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
645u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
646u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 647bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB
648void i40e_set_ethtool_ops(struct net_device *netdev);
649struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
650 u8 *macaddr, s16 vlan,
651 bool is_vf, bool is_netdev);
652void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
653 bool is_vf, bool is_netdev);
654int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
655struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
656 u16 uplink, u32 param1);
657int i40e_vsi_release(struct i40e_vsi *vsi);
658struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
659 struct i40e_vsi *start_vsi);
38e00438
VD
660#ifdef I40E_FCOE
661void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
662 struct i40e_vsi_context *ctxt,
663 u8 enabled_tc, bool is_add);
664#endif
fc18eaa0 665int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 666int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB
667struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
668 u16 downlink_seid, u8 enabled_tc);
669void i40e_veb_release(struct i40e_veb *veb);
670
4e3b35b0 671int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB
672i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
673void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
674void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
675void i40e_pf_reset_stats(struct i40e_pf *pf);
676#ifdef CONFIG_DEBUG_FS
677void i40e_dbg_pf_init(struct i40e_pf *pf);
678void i40e_dbg_pf_exit(struct i40e_pf *pf);
679void i40e_dbg_init(void);
680void i40e_dbg_exit(void);
681#else
682static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
683static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
684static inline void i40e_dbg_init(void) {}
685static inline void i40e_dbg_exit(void) {}
686#endif /* CONFIG_DEBUG_FS*/
687void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 688void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 689void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 690void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD
691#ifdef I40E_FCOE
692struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
693 struct net_device *netdev,
694 struct rtnl_link_stats64 *storage);
695int i40e_set_mac(struct net_device *netdev, void *p);
696void i40e_set_rx_mode(struct net_device *netdev);
697#endif
7daa6bf3 698int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD
699#ifdef I40E_FCOE
700void i40e_tx_timeout(struct net_device *netdev);
701int i40e_vlan_rx_add_vid(struct net_device *netdev,
702 __always_unused __be16 proto, u16 vid);
703int i40e_vlan_rx_kill_vid(struct net_device *netdev,
704 __always_unused __be16 proto, u16 vid);
705#endif
96664483 706int i40e_open(struct net_device *netdev);
6c167f58 707int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB
708void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
709int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
710int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
711struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
712 bool is_vf, bool is_netdev);
713bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
714struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
715 bool is_vf, bool is_netdev);
38e00438 716#ifdef I40E_FCOE
38e00438
VD
717int i40e_close(struct net_device *netdev);
718int i40e_setup_tc(struct net_device *netdev, u8 tc);
719void i40e_netpoll(struct net_device *netdev);
720int i40e_fcoe_enable(struct net_device *netdev);
721int i40e_fcoe_disable(struct net_device *netdev);
722int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
723u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
724void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
725void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
726int i40e_init_pf_fcoe(struct i40e_pf *pf);
727int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
728void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
729int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
730 union i40e_rx_desc *rx_desc,
731 struct sk_buff *skb);
732void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
733 union i40e_rx_desc *rx_desc, u8 prog_id);
734#endif /* I40E_FCOE */
7daa6bf3 735void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP
736#ifdef CONFIG_I40E_DCB
737void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 738 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP
739 struct i40e_dcbx_config *new_cfg);
740void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
741void i40e_dcbnl_setup(struct i40e_vsi *vsi);
742bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
743 struct i40e_dcbx_config *old_cfg,
744 struct i40e_dcbx_config *new_cfg);
745#endif /* CONFIG_I40E_DCB */
beb0dff1
JK
746void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
747void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
748void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
749void i40e_ptp_set_increment(struct i40e_pf *pf);
750int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
751int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
752void i40e_ptp_init(struct i40e_pf *pf);
753void i40e_ptp_stop(struct i40e_pf *pf);
51616018 754int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR
755i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
756i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
757i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
7daa6bf3 758#endif /* _I40E_H_ */
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