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i40e: tame the nvmupdate read and write complaints
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB		 40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
7daa6bf3
JB		 49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
beb0dff1
JK		 54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 57#include "i40e_type.h"
58#include "i40e_prototype.h"
38e00438
VD		 59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
7daa6bf3
JB		 62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
7daa6bf3
JB		 66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 74#define I40E_MAX_REGISTER 0x800000
232f4706 75#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
7daa6bf3
JB		 76#define I40E_DEFAULT_NUM_DESCRIPTORS 512
77#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
78#define I40E_MIN_NUM_DESCRIPTORS 64
79#define I40E_MIN_MSIX 2
80#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 81#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 82#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
83#define I40E_DEFAULT_QUEUES_PER_VF 4
84#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 85#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 86#define I40E_FDIR_RING 0
87#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 88#ifdef I40E_FCOE
89#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
90#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
91#endif /* I40E_FCOE */
7daa6bf3 92#define I40E_MAX_AQ_BUF_SIZE 4096
07574897
MW		 93#define I40E_AQ_LEN 256
94#define I40E_AQ_WORK_LIMIT 32
7daa6bf3
JB		 95#define I40E_MAX_USER_PRIORITY 8
96#define I40E_DEFAULT_MSG_ENABLE 4
23527308 97#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 98#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3 99
7e45ab44
GR		 100/* Ethtool Private Flags */
101#define I40E_PRIV_FLAGS_NPAR_FLAG (1 << 0)
102
7daa6bf3 103#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 104#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 105#define I40E_NVM_VERSION_HI_SHIFT 12
106#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 107
108/* The values in here are decimal coded as hex as is the case in the NVM map*/
109#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 110#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 111
7daa6bf3
JB		 112/* magic for getting defines into strings */
113#define STRINGIFY(foo) #foo
114#define XSTRINGIFY(bar) STRINGIFY(bar)
115
7daa6bf3
JB		 116#define I40E_RX_DESC(R, i) \
117 ((ring_is_16byte_desc_enabled(R)) \
118 ? (union i40e_32byte_rx_desc *) \
119 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
120 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
121#define I40E_TX_DESC(R, i) \
122 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
123#define I40E_TX_CTXTDESC(R, i) \
124 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
125#define I40E_TX_FDIRDESC(R, i) \
126 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
127
128/* default to trying for four seconds */
129#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
130
131/* driver state flags */
132enum i40e_state_t {
133 __I40E_TESTING,
134 __I40E_CONFIG_BUSY,
135 __I40E_CONFIG_DONE,
136 __I40E_DOWN,
137 __I40E_NEEDS_RESTART,
138 __I40E_SERVICE_SCHED,
139 __I40E_ADMINQ_EVENT_PENDING,
140 __I40E_MDD_EVENT_PENDING,
141 __I40E_VFLR_EVENT_PENDING,
142 __I40E_RESET_RECOVERY_PENDING,
143 __I40E_RESET_INTR_RECEIVED,
144 __I40E_REINIT_REQUESTED,
145 __I40E_PF_RESET_REQUESTED,
146 __I40E_CORE_RESET_REQUESTED,
147 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 148 __I40E_EMP_RESET_REQUESTED,
9df42d1a 149 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 150 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 151 __I40E_SUSPENDED,
9ce34f02 152 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 153 __I40E_BAD_EEPROM,
b5d06f05 154 __I40E_DOWN_REQUESTED,
1e1be8f6 155 __I40E_FD_FLUSH_REQUESTED,
a316f651 156 __I40E_RESET_FAILED,
69129dc3 157 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 158 __I40E_VF_DISABLE,
7daa6bf3
JB		 159};
160
161enum i40e_interrupt_policy {
162 I40E_INTERRUPT_BEST_CASE,
163 I40E_INTERRUPT_MEDIUM,
164 I40E_INTERRUPT_LOWEST
165};
166
167struct i40e_lump_tracking {
168 u16 num_entries;
169 u16 search_hint;
170 u16 list[0];
171#define I40E_PILE_VALID_BIT 0x8000
172};
173
174#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 175#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
176#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 177#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 178#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 179
433c47de
ASJ		 180enum i40e_fd_stat_idx {
181 I40E_FD_STAT_ATR,
182 I40E_FD_STAT_SB,
183 I40E_FD_STAT_PF_COUNT
184};
185#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
186#define I40E_FD_ATR_STAT_IDX(pf_id) \
187 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
188#define I40E_FD_SB_STAT_IDX(pf_id) \
189 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
190
17a73f6b
JG		 191struct i40e_fdir_filter {
192 struct hlist_node fdir_node;
193 /* filter ipnut set */
194 u8 flow_type;
195 u8 ip4_proto;
04b73bd7 196 /* TX packet view of src and dst */
17a73f6b
JG		 197 __be32 dst_ip[4];
198 __be32 src_ip[4];
199 __be16 src_port;
200 __be16 dst_port;
201 __be32 sctp_v_tag;
202 /* filter control */
7daa6bf3
JB		 203 u16 q_index;
204 u8 flex_off;
205 u8 pctype;
206 u16 dest_vsi;
207 u8 dest_ctl;
208 u8 fd_status;
209 u16 cnt_index;
210 u32 fd_id;
7daa6bf3
JB		 211};
212
4e3b35b0
NP		 213#define I40E_ETH_P_LLDP 0x88cc
214
7daa6bf3
JB		 215#define I40E_DCB_PRIO_TYPE_STRICT 0
216#define I40E_DCB_PRIO_TYPE_ETS 1
217#define I40E_DCB_STRICT_PRIO_CREDITS 127
218#define I40E_MAX_USER_PRIORITY 8
219/* DCB per TC information data structure */
220struct i40e_tc_info {
221 u16 qoffset; /* Queue offset from base queue */
222 u16 qcount; /* Total Queues */
223 u8 netdev_tc; /* Netdev TC index if netdev associated */
224};
225
226/* TC configuration data structure */
227struct i40e_tc_configuration {
228 u8 numtc; /* Total number of enabled TCs */
229 u8 enabled_tc; /* TC map */
230 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
231};
232
233/* struct that defines the Ethernet device */
234struct i40e_pf {
235 struct pci_dev *pdev;
236 struct i40e_hw hw;
237 unsigned long state;
238 unsigned long link_check_timeout;
239 struct msix_entry *msix_entries;
7daa6bf3
JB		 240 bool fc_autoneg_status;
241
242 u16 eeprom_version;
6c167f58 243 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 244 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
245 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
246 u16 num_req_vfs; /* num vfs requested for this vf */
247 u16 num_vf_qps; /* num queue pairs per vf */
38e00438
VD		 248#ifdef I40E_FCOE
249 u16 num_fcoe_qps; /* num fcoe queues this pf has set up */
250 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
251#endif /* I40E_FCOE */
7daa6bf3
JB		 252 u16 num_lan_qps; /* num lan queues this pf has set up */
253 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 254 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 255 u16 rss_size; /* num queues in the RSS array */
256 u16 rss_size_max; /* HW defined max RSS queues */
257 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 258 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 259 u8 atr_sample_rate;
8e2773ae 260 bool wol_en;
7daa6bf3 261
17a73f6b
JG		 262 struct hlist_head fdir_filter_list;
263 u16 fdir_pf_active_filters;
433c47de
ASJ		 264 u16 fd_sb_cnt_idx;
265 u16 fd_atr_cnt_idx;
1e1be8f6 266 unsigned long fd_flush_timestamp;
60793f4a 267 u32 fd_flush_cnt;
1e1be8f6
ASJ		 268 u32 fd_add_err;
269 u32 fd_atr_cnt;
270 u32 fd_tcp_rule;
17a73f6b 271
a1c9a9d9
JK		 272#ifdef CONFIG_I40E_VXLAN
273 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
274 u16 pending_vxlan_bitmap;
275
276#endif
7daa6bf3
JB		 277 enum i40e_interrupt_policy int_policy;
278 u16 rx_itr_default;
279 u16 tx_itr_default;
71e6163a 280 u32 msg_enable;
b294ac70 281 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 282 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 283 unsigned long service_timer_period;
284 unsigned long service_timer_previous;
7daa6bf3
JB		 285 struct timer_list service_timer;
286 struct work_struct service_task;
287
288 u64 flags;
289#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
290#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
291#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
292#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
293#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
294#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 295#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
296#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
297#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
38e00438
VD		 298#ifdef I40E_FCOE
299#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
300#endif /* I40E_FCOE */
9f52987b
NP		 301#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
302#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
303#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
304#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
305#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
306#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
307#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
308#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 309#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
310#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 311#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 312#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
313#ifdef CONFIG_I40E_VXLAN
314#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
315#endif
1f224ad2 316#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 317#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 318
61dade7e
ASJ		 319 /* tracks features that get auto disabled by errors */
320 u64 auto_disable_flags;
321
38e00438
VD		 322#ifdef I40E_FCOE
323 struct i40e_fcoe fcoe;
324
325#endif /* I40E_FCOE */
7daa6bf3
JB		 326 bool stat_offsets_loaded;
327 struct i40e_hw_port_stats stats;
328 struct i40e_hw_port_stats stats_offsets;
329 u32 tx_timeout_count;
330 u32 tx_timeout_recovery_level;
331 unsigned long tx_timeout_last_recovery;
810b3ae4 332 u32 tx_sluggish_count;
7daa6bf3
JB		 333 u32 hw_csum_rx_error;
334 u32 led_status;
335 u16 corer_count; /* Core reset count */
336 u16 globr_count; /* Global reset count */
337 u16 empr_count; /* EMP reset count */
338 u16 pfr_count; /* PF reset count */
cd92e72f 339 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 340
341 struct mutex switch_mutex;
342 u16 lan_vsi; /* our default LAN VSI */
343 u16 lan_veb; /* initial relay, if exists */
344#define I40E_NO_VEB 0xffff
345#define I40E_NO_VSI 0xffff
346 u16 next_vsi; /* Next unallocated VSI - 0-based! */
347 struct i40e_vsi **vsi;
348 struct i40e_veb *veb[I40E_MAX_VEB];
349
350 struct i40e_lump_tracking *qp_pile;
351 struct i40e_lump_tracking *irq_pile;
352
353 /* switch config info */
354 u16 pf_seid;
355 u16 main_vsi_seid;
356 u16 mac_seid;
7daa6bf3
JB		 357 struct kobject *switch_kobj;
358#ifdef CONFIG_DEBUG_FS
359 struct dentry *i40e_dbg_pf;
360#endif /* CONFIG_DEBUG_FS */
361
93cd765b
ASJ		 362 u16 instance; /* A unique number per i40e_pf instance in the system */
363
7daa6bf3
JB		 364 /* sr-iov config info */
365 struct i40e_vf *vf;
366 int num_alloc_vfs; /* actual number of VFs allocated */
367 u32 vf_aq_requests;
368
369 /* DCBx/DCBNL capability for PF that indicates
370 * whether DCBx is managed by firmware or host
371 * based agent (LLDPAD). Also, indicates what
372 * flavor of DCBx protocol (IEEE/CEE) is supported
373 * by the device. For now we're supporting IEEE
374 * mode only.
375 */
376 u16 dcbx_cap;
377
378 u32 fcoe_hmc_filt_num;
379 u32 fcoe_hmc_cntx_num;
380 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 381
382 struct ptp_clock *ptp_clock;
383 struct ptp_clock_info ptp_caps;
384 struct sk_buff *ptp_tx_skb;
beb0dff1 385 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 386 unsigned long last_rx_ptp_check;
387 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
388 u64 ptp_base_adj;
389 u32 tx_hwtstamp_timeouts;
390 u32 rx_hwtstamp_cleared;
391 bool ptp_tx;
392 bool ptp_rx;
e157ea30 393 u16 rss_table_size;
f4492db1
GR		 394 /* These are only valid in NPAR modes */
395 u32 npar_max_bw;
396 u32 npar_min_bw;
7daa6bf3
JB		 397};
398
399struct i40e_mac_filter {
400 struct list_head list;
401 u8 macaddr[ETH_ALEN];
402#define I40E_VLAN_ANY -1
403 s16 vlan;
404 u8 counter; /* number of instances of this filter */
405 bool is_vf; /* filter belongs to a VF */
406 bool is_netdev; /* filter belongs to a netdev */
407 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 408 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 409};
410
411struct i40e_veb {
412 struct i40e_pf *pf;
413 u16 idx;
414 u16 veb_idx; /* index of VEB parent */
415 u16 seid;
416 u16 uplink_seid;
417 u16 stats_idx; /* index of VEB parent */
418 u8 enabled_tc;
51616018 419 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB		 420 u16 flags;
421 u16 bw_limit;
422 u8 bw_max_quanta;
423 bool is_abs_credits;
424 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
425 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
426 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
427 struct kobject *kobj;
428 bool stat_offsets_loaded;
429 struct i40e_eth_stats stats;
430 struct i40e_eth_stats stats_offsets;
431};
432
433/* struct that defines a VSI, associated with a dev */
434struct i40e_vsi {
435 struct net_device *netdev;
436 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
437 bool netdev_registered;
438 bool stat_offsets_loaded;
439
440 u32 current_netdev_flags;
441 unsigned long state;
442#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
443#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
444 unsigned long flags;
445
446 struct list_head mac_filter_list;
447
448 /* VSI stats */
449 struct rtnl_link_stats64 net_stats;
450 struct rtnl_link_stats64 net_stats_offsets;
451 struct i40e_eth_stats eth_stats;
452 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 453#ifdef I40E_FCOE
454 struct i40e_fcoe_stats fcoe_stats;
455 struct i40e_fcoe_stats fcoe_stats_offsets;
456 bool fcoe_stat_offsets_loaded;
457#endif
7daa6bf3
JB		 458 u32 tx_restart;
459 u32 tx_busy;
460 u32 rx_buf_failed;
461 u32 rx_page_failed;
462
9f65e15b
AD		 463 /* These are containers of ring pointers, allocated at run-time */
464 struct i40e_ring **rx_rings;
465 struct i40e_ring **tx_rings;
7daa6bf3
JB		 466
467 u16 work_limit;
468 /* high bit set means dynamic, use accessor routines to read/write.
469 * hardware only supports 2us resolution for the ITR registers.
470 * these values always store the USER setting, and must be converted
471 * before programming to a register.
472 */
473 u16 rx_itr_setting;
474 u16 tx_itr_setting;
475
5db4cb59 476 u16 rss_table_size;
66ddcffb 477 u16 rss_size;
5db4cb59 478
7daa6bf3
JB		 479 u16 max_frame;
480 u16 rx_hdr_len;
481 u16 rx_buf_len;
482 u8 dtype;
483
484 /* List of q_vectors allocated to this VSI */
493fb300 485 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 486 int num_q_vectors;
487 int base_vector;
63741846 488 bool irqs_ready;
7daa6bf3
JB		 489
490 u16 seid; /* HW index of this VSI (absolute index) */
491 u16 id; /* VSI number */
492 u16 uplink_seid;
493
494 u16 base_queue; /* vsi's first queue in hw array */
495 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 496 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB		 497 u16 num_queue_pairs; /* Used tx and rx pairs */
498 u16 num_desc;
499 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
500 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
501
502 struct i40e_tc_configuration tc_config;
503 struct i40e_aqc_vsi_properties_data info;
504
505 /* VSI BW limit (absolute across all TCs) */
506 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
507 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
508
509 /* Relative TC credits across VSIs */
510 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
511 /* TC BW limit credits within VSI */
512 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
513 /* TC BW limit max quanta within VSI */
514 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
515
516 struct i40e_pf *back; /* Backreference to associated PF */
517 u16 idx; /* index in pf->vsi[] */
518 u16 veb_idx; /* index of VEB parent */
519 struct kobject *kobj; /* sysfs object */
520
521 /* VSI specific handlers */
522 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW		 523
524 /* current rxnfc data */
525 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB		 526} ____cacheline_internodealigned_in_smp;
527
528struct i40e_netdev_priv {
529 struct i40e_vsi *vsi;
530};
531
532/* struct that defines an interrupt vector */
533struct i40e_q_vector {
534 struct i40e_vsi *vsi;
535
536 u16 v_idx; /* index in the vsi->q_vector array. */
537 u16 reg_idx; /* register index of the interrupt */
538
539 struct napi_struct napi;
540
541 struct i40e_ring_container rx;
542 struct i40e_ring_container tx;
543
544 u8 num_ringpairs; /* total number of ring pairs in vector */
545
7daa6bf3 546 cpumask_t affinity_mask;
493fb300 547 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 548 char name[I40E_INT_NAME_STR_LEN];
7daa6bf3
JB		 549} ____cacheline_internodealigned_in_smp;
550
551/* lan device */
552struct i40e_device {
553 struct list_head list;
554 struct i40e_pf *pf;
555};
556
557/**
558 * i40e_fw_version_str - format the FW and NVM version strings
559 * @hw: ptr to the hardware info
560 **/
561static inline char *i40e_fw_version_str(struct i40e_hw *hw)
562{
563 static char buf[32];
564
565 snprintf(buf, sizeof(buf),
7edf810c
SN		 566 "f%d.%d.%05d a%d.%d n%x.%02x e%x",
567 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
7daa6bf3 568 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 569 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
570 I40E_NVM_VERSION_HI_SHIFT,
571 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
572 I40E_NVM_VERSION_LO_SHIFT,
7edf810c 573 (hw->nvm.eetrack & 0xffffff));
7daa6bf3
JB		 574
575 return buf;
576}
577
578/**
579 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
580 * @netdev: the corresponding netdev
581 *
582 * Return the PF struct for the given netdev
583 **/
584static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
585{
586 struct i40e_netdev_priv *np = netdev_priv(netdev);
587 struct i40e_vsi *vsi = np->vsi;
588
589 return vsi->back;
590}
591
592static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
593 irqreturn_t (*irq_handler)(int, void *))
594{
595 vsi->irq_handler = irq_handler;
596}
597
598/**
599 * i40e_rx_is_programming_status - check for programming status descriptor
600 * @qw: the first quad word of the program status descriptor
601 *
602 * The value of in the descriptor length field indicate if this
603 * is a programming status descriptor for flow director or FCoE
604 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
605 * it is a packet descriptor.
606 **/
607static inline bool i40e_rx_is_programming_status(u64 qw)
608{
609 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
610 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
611}
612
082def10
ASJ		 613/**
614 * i40e_get_fd_cnt_all - get the total FD filter space available
615 * @pf: pointer to the pf struct
616 **/
617static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
618{
619 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
620}
621
7daa6bf3
JB		 622/* needed by i40e_ethtool.c */
623int i40e_up(struct i40e_vsi *vsi);
624void i40e_down(struct i40e_vsi *vsi);
625extern const char i40e_driver_name[];
626extern const char i40e_driver_version_str[];
23326186 627void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 628void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
629void i40e_update_stats(struct i40e_vsi *vsi);
630void i40e_update_eth_stats(struct i40e_vsi *vsi);
631struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
632int i40e_fetch_switch_configuration(struct i40e_pf *pf,
633 bool printconfig);
634
17a73f6b 635int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 636 struct i40e_pf *pf, bool add);
17a73f6b
JG		 637int i40e_add_del_fdir(struct i40e_vsi *vsi,
638 struct i40e_fdir_filter *input, bool add);
55a5e60b 639void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ		 640u32 i40e_get_current_fd_count(struct i40e_pf *pf);
641u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
642u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
643u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 644bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 645void i40e_set_ethtool_ops(struct net_device *netdev);
646struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
647 u8 *macaddr, s16 vlan,
648 bool is_vf, bool is_netdev);
649void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
650 bool is_vf, bool is_netdev);
651int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
652struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
653 u16 uplink, u32 param1);
654int i40e_vsi_release(struct i40e_vsi *vsi);
655struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
656 struct i40e_vsi *start_vsi);
38e00438
VD		 657#ifdef I40E_FCOE
658void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
659 struct i40e_vsi_context *ctxt,
660 u8 enabled_tc, bool is_add);
661#endif
fc18eaa0 662int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 663int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 664struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
665 u16 downlink_seid, u8 enabled_tc);
666void i40e_veb_release(struct i40e_veb *veb);
667
4e3b35b0 668int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 669i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
670void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
671void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
672void i40e_pf_reset_stats(struct i40e_pf *pf);
673#ifdef CONFIG_DEBUG_FS
674void i40e_dbg_pf_init(struct i40e_pf *pf);
675void i40e_dbg_pf_exit(struct i40e_pf *pf);
676void i40e_dbg_init(void);
677void i40e_dbg_exit(void);
678#else
679static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
680static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
681static inline void i40e_dbg_init(void) {}
682static inline void i40e_dbg_exit(void) {}
683#endif /* CONFIG_DEBUG_FS*/
684void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 685void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 686void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 687void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 688#ifdef I40E_FCOE
689struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
690 struct net_device *netdev,
691 struct rtnl_link_stats64 *storage);
692int i40e_set_mac(struct net_device *netdev, void *p);
693void i40e_set_rx_mode(struct net_device *netdev);
694#endif
7daa6bf3 695int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 696#ifdef I40E_FCOE
697void i40e_tx_timeout(struct net_device *netdev);
698int i40e_vlan_rx_add_vid(struct net_device *netdev,
699 __always_unused __be16 proto, u16 vid);
700int i40e_vlan_rx_kill_vid(struct net_device *netdev,
701 __always_unused __be16 proto, u16 vid);
702#endif
96664483 703int i40e_open(struct net_device *netdev);
6c167f58 704int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 705void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
706int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
707int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
708struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
709 bool is_vf, bool is_netdev);
710bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
711struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
712 bool is_vf, bool is_netdev);
38e00438 713#ifdef I40E_FCOE
38e00438
VD		 714int i40e_close(struct net_device *netdev);
715int i40e_setup_tc(struct net_device *netdev, u8 tc);
716void i40e_netpoll(struct net_device *netdev);
717int i40e_fcoe_enable(struct net_device *netdev);
718int i40e_fcoe_disable(struct net_device *netdev);
719int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
720u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
721void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
722void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
723int i40e_init_pf_fcoe(struct i40e_pf *pf);
724int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
725void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
726int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
727 union i40e_rx_desc *rx_desc,
728 struct sk_buff *skb);
729void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
730 union i40e_rx_desc *rx_desc, u8 prog_id);
731#endif /* I40E_FCOE */
7daa6bf3 732void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 733#ifdef CONFIG_I40E_DCB
734void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 735 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP		 736 struct i40e_dcbx_config *new_cfg);
737void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
738void i40e_dcbnl_setup(struct i40e_vsi *vsi);
739bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
740 struct i40e_dcbx_config *old_cfg,
741 struct i40e_dcbx_config *new_cfg);
742#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 743void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
744void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
745void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
746void i40e_ptp_set_increment(struct i40e_pf *pf);
747int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
748int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
749void i40e_ptp_init(struct i40e_pf *pf);
750void i40e_ptp_stop(struct i40e_pf *pf);
51616018 751int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR		 752i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
753i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
754i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
7daa6bf3 755#endif /* _I40E_H_ */
Linux kernel - Deliverables
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