i40e: Avoid logs while adding/deleting FD-SB filters
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
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1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
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5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
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15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
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17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
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32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
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40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
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49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
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54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
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57#include "i40e_type.h"
58#include "i40e_prototype.h"
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59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
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62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
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66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 74#define I40E_MAX_REGISTER 0x800000
232f4706 75#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
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76#define I40E_DEFAULT_NUM_DESCRIPTORS 512
77#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
78#define I40E_MIN_NUM_DESCRIPTORS 64
79#define I40E_MIN_MSIX 2
80#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 81#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
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82#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
83#define I40E_DEFAULT_QUEUES_PER_VF 4
84#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 85#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
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86#define I40E_FDIR_RING 0
87#define I40E_FDIR_RING_COUNT 32
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88#ifdef I40E_FCOE
89#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
90#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
91#endif /* I40E_FCOE */
7daa6bf3 92#define I40E_MAX_AQ_BUF_SIZE 4096
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93#define I40E_AQ_LEN 256
94#define I40E_AQ_WORK_LIMIT 32
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95#define I40E_MAX_USER_PRIORITY 8
96#define I40E_DEFAULT_MSG_ENABLE 4
23527308 97#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 98#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3 99
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100/* Ethtool Private Flags */
101#define I40E_PRIV_FLAGS_NPAR_FLAG (1 << 0)
102
7daa6bf3 103#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 104#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
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105#define I40E_NVM_VERSION_HI_SHIFT 12
106#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
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107
108/* The values in here are decimal coded as hex as is the case in the NVM map*/
109#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 110#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 111
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112/* magic for getting defines into strings */
113#define STRINGIFY(foo) #foo
114#define XSTRINGIFY(bar) STRINGIFY(bar)
115
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116#define I40E_RX_DESC(R, i) \
117 ((ring_is_16byte_desc_enabled(R)) \
118 ? (union i40e_32byte_rx_desc *) \
119 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
120 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
121#define I40E_TX_DESC(R, i) \
122 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
123#define I40E_TX_CTXTDESC(R, i) \
124 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
125#define I40E_TX_FDIRDESC(R, i) \
126 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
127
128/* default to trying for four seconds */
129#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
130
131/* driver state flags */
132enum i40e_state_t {
133 __I40E_TESTING,
134 __I40E_CONFIG_BUSY,
135 __I40E_CONFIG_DONE,
136 __I40E_DOWN,
137 __I40E_NEEDS_RESTART,
138 __I40E_SERVICE_SCHED,
139 __I40E_ADMINQ_EVENT_PENDING,
140 __I40E_MDD_EVENT_PENDING,
141 __I40E_VFLR_EVENT_PENDING,
142 __I40E_RESET_RECOVERY_PENDING,
143 __I40E_RESET_INTR_RECEIVED,
144 __I40E_REINIT_REQUESTED,
145 __I40E_PF_RESET_REQUESTED,
146 __I40E_CORE_RESET_REQUESTED,
147 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 148 __I40E_EMP_RESET_REQUESTED,
9df42d1a 149 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 150 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 151 __I40E_SUSPENDED,
9ce34f02 152 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 153 __I40E_BAD_EEPROM,
b5d06f05 154 __I40E_DOWN_REQUESTED,
1e1be8f6 155 __I40E_FD_FLUSH_REQUESTED,
a316f651 156 __I40E_RESET_FAILED,
69129dc3 157 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 158 __I40E_VF_DISABLE,
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159};
160
161enum i40e_interrupt_policy {
162 I40E_INTERRUPT_BEST_CASE,
163 I40E_INTERRUPT_MEDIUM,
164 I40E_INTERRUPT_LOWEST
165};
166
167struct i40e_lump_tracking {
168 u16 num_entries;
169 u16 search_hint;
170 u16 list[0];
171#define I40E_PILE_VALID_BIT 0x8000
172};
173
174#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
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175#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
176#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 177#define I40E_FDIR_BUFFER_HEAD_ROOM 32
55a5e60b 178
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179enum i40e_fd_stat_idx {
180 I40E_FD_STAT_ATR,
181 I40E_FD_STAT_SB,
182 I40E_FD_STAT_PF_COUNT
183};
184#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
185#define I40E_FD_ATR_STAT_IDX(pf_id) \
186 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
187#define I40E_FD_SB_STAT_IDX(pf_id) \
188 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
189
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190struct i40e_fdir_filter {
191 struct hlist_node fdir_node;
192 /* filter ipnut set */
193 u8 flow_type;
194 u8 ip4_proto;
04b73bd7 195 /* TX packet view of src and dst */
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196 __be32 dst_ip[4];
197 __be32 src_ip[4];
198 __be16 src_port;
199 __be16 dst_port;
200 __be32 sctp_v_tag;
201 /* filter control */
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202 u16 q_index;
203 u8 flex_off;
204 u8 pctype;
205 u16 dest_vsi;
206 u8 dest_ctl;
207 u8 fd_status;
208 u16 cnt_index;
209 u32 fd_id;
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210};
211
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212#define I40E_ETH_P_LLDP 0x88cc
213
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214#define I40E_DCB_PRIO_TYPE_STRICT 0
215#define I40E_DCB_PRIO_TYPE_ETS 1
216#define I40E_DCB_STRICT_PRIO_CREDITS 127
217#define I40E_MAX_USER_PRIORITY 8
218/* DCB per TC information data structure */
219struct i40e_tc_info {
220 u16 qoffset; /* Queue offset from base queue */
221 u16 qcount; /* Total Queues */
222 u8 netdev_tc; /* Netdev TC index if netdev associated */
223};
224
225/* TC configuration data structure */
226struct i40e_tc_configuration {
227 u8 numtc; /* Total number of enabled TCs */
228 u8 enabled_tc; /* TC map */
229 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
230};
231
232/* struct that defines the Ethernet device */
233struct i40e_pf {
234 struct pci_dev *pdev;
235 struct i40e_hw hw;
236 unsigned long state;
237 unsigned long link_check_timeout;
238 struct msix_entry *msix_entries;
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239 bool fc_autoneg_status;
240
241 u16 eeprom_version;
6c167f58 242 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
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243 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
244 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
245 u16 num_req_vfs; /* num vfs requested for this vf */
246 u16 num_vf_qps; /* num queue pairs per vf */
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247#ifdef I40E_FCOE
248 u16 num_fcoe_qps; /* num fcoe queues this pf has set up */
249 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
250#endif /* I40E_FCOE */
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251 u16 num_lan_qps; /* num lan queues this pf has set up */
252 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 253 int queues_left; /* queues left unclaimed */
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254 u16 rss_size; /* num queues in the RSS array */
255 u16 rss_size_max; /* HW defined max RSS queues */
256 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 257 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 258 u8 atr_sample_rate;
8e2773ae 259 bool wol_en;
7daa6bf3 260
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261 struct hlist_head fdir_filter_list;
262 u16 fdir_pf_active_filters;
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263 u16 fd_sb_cnt_idx;
264 u16 fd_atr_cnt_idx;
1e1be8f6 265 unsigned long fd_flush_timestamp;
60793f4a 266 u32 fd_flush_cnt;
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267 u32 fd_add_err;
268 u32 fd_atr_cnt;
269 u32 fd_tcp_rule;
17a73f6b 270
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271#ifdef CONFIG_I40E_VXLAN
272 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
273 u16 pending_vxlan_bitmap;
274
275#endif
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276 enum i40e_interrupt_policy int_policy;
277 u16 rx_itr_default;
278 u16 tx_itr_default;
71e6163a 279 u32 msg_enable;
b294ac70 280 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 281 u16 adminq_work_limit; /* num of admin receive queue desc to process */
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282 unsigned long service_timer_period;
283 unsigned long service_timer_previous;
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284 struct timer_list service_timer;
285 struct work_struct service_task;
286
287 u64 flags;
288#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
289#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
290#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
291#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
292#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
293#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
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294#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
295#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
296#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
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297#ifdef I40E_FCOE
298#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
299#endif /* I40E_FCOE */
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300#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
301#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
302#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
303#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
304#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
305#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
306#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
307#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
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308#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
309#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 310#define I40E_FLAG_PTP (u64)(1 << 25)
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311#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
312#ifdef CONFIG_I40E_VXLAN
313#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
314#endif
1f224ad2 315#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 316#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 317
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ASJ
318 /* tracks features that get auto disabled by errors */
319 u64 auto_disable_flags;
320
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321#ifdef I40E_FCOE
322 struct i40e_fcoe fcoe;
323
324#endif /* I40E_FCOE */
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325 bool stat_offsets_loaded;
326 struct i40e_hw_port_stats stats;
327 struct i40e_hw_port_stats stats_offsets;
328 u32 tx_timeout_count;
329 u32 tx_timeout_recovery_level;
330 unsigned long tx_timeout_last_recovery;
810b3ae4 331 u32 tx_sluggish_count;
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332 u32 hw_csum_rx_error;
333 u32 led_status;
334 u16 corer_count; /* Core reset count */
335 u16 globr_count; /* Global reset count */
336 u16 empr_count; /* EMP reset count */
337 u16 pfr_count; /* PF reset count */
cd92e72f 338 u16 sw_int_count; /* SW interrupt count */
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339
340 struct mutex switch_mutex;
341 u16 lan_vsi; /* our default LAN VSI */
342 u16 lan_veb; /* initial relay, if exists */
343#define I40E_NO_VEB 0xffff
344#define I40E_NO_VSI 0xffff
345 u16 next_vsi; /* Next unallocated VSI - 0-based! */
346 struct i40e_vsi **vsi;
347 struct i40e_veb *veb[I40E_MAX_VEB];
348
349 struct i40e_lump_tracking *qp_pile;
350 struct i40e_lump_tracking *irq_pile;
351
352 /* switch config info */
353 u16 pf_seid;
354 u16 main_vsi_seid;
355 u16 mac_seid;
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356 struct kobject *switch_kobj;
357#ifdef CONFIG_DEBUG_FS
358 struct dentry *i40e_dbg_pf;
359#endif /* CONFIG_DEBUG_FS */
360
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ASJ
361 u16 instance; /* A unique number per i40e_pf instance in the system */
362
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363 /* sr-iov config info */
364 struct i40e_vf *vf;
365 int num_alloc_vfs; /* actual number of VFs allocated */
366 u32 vf_aq_requests;
367
368 /* DCBx/DCBNL capability for PF that indicates
369 * whether DCBx is managed by firmware or host
370 * based agent (LLDPAD). Also, indicates what
371 * flavor of DCBx protocol (IEEE/CEE) is supported
372 * by the device. For now we're supporting IEEE
373 * mode only.
374 */
375 u16 dcbx_cap;
376
377 u32 fcoe_hmc_filt_num;
378 u32 fcoe_hmc_cntx_num;
379 struct i40e_filter_control_settings filter_settings;
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380
381 struct ptp_clock *ptp_clock;
382 struct ptp_clock_info ptp_caps;
383 struct sk_buff *ptp_tx_skb;
beb0dff1 384 struct hwtstamp_config tstamp_config;
beb0dff1
JK
385 unsigned long last_rx_ptp_check;
386 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
387 u64 ptp_base_adj;
388 u32 tx_hwtstamp_timeouts;
389 u32 rx_hwtstamp_cleared;
390 bool ptp_tx;
391 bool ptp_rx;
e157ea30 392 u16 rss_table_size;
f4492db1
GR
393 /* These are only valid in NPAR modes */
394 u32 npar_max_bw;
395 u32 npar_min_bw;
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396};
397
398struct i40e_mac_filter {
399 struct list_head list;
400 u8 macaddr[ETH_ALEN];
401#define I40E_VLAN_ANY -1
402 s16 vlan;
403 u8 counter; /* number of instances of this filter */
404 bool is_vf; /* filter belongs to a VF */
405 bool is_netdev; /* filter belongs to a netdev */
406 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 407 bool is_laa; /* filter is a Locally Administered Address */
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408};
409
410struct i40e_veb {
411 struct i40e_pf *pf;
412 u16 idx;
413 u16 veb_idx; /* index of VEB parent */
414 u16 seid;
415 u16 uplink_seid;
416 u16 stats_idx; /* index of VEB parent */
417 u8 enabled_tc;
51616018 418 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
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JB
419 u16 flags;
420 u16 bw_limit;
421 u8 bw_max_quanta;
422 bool is_abs_credits;
423 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
424 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
425 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
426 struct kobject *kobj;
427 bool stat_offsets_loaded;
428 struct i40e_eth_stats stats;
429 struct i40e_eth_stats stats_offsets;
430};
431
432/* struct that defines a VSI, associated with a dev */
433struct i40e_vsi {
434 struct net_device *netdev;
435 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
436 bool netdev_registered;
437 bool stat_offsets_loaded;
438
439 u32 current_netdev_flags;
440 unsigned long state;
441#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
442#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
443 unsigned long flags;
444
445 struct list_head mac_filter_list;
446
447 /* VSI stats */
448 struct rtnl_link_stats64 net_stats;
449 struct rtnl_link_stats64 net_stats_offsets;
450 struct i40e_eth_stats eth_stats;
451 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD
452#ifdef I40E_FCOE
453 struct i40e_fcoe_stats fcoe_stats;
454 struct i40e_fcoe_stats fcoe_stats_offsets;
455 bool fcoe_stat_offsets_loaded;
456#endif
7daa6bf3
JB
457 u32 tx_restart;
458 u32 tx_busy;
459 u32 rx_buf_failed;
460 u32 rx_page_failed;
461
9f65e15b
AD
462 /* These are containers of ring pointers, allocated at run-time */
463 struct i40e_ring **rx_rings;
464 struct i40e_ring **tx_rings;
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JB
465
466 u16 work_limit;
467 /* high bit set means dynamic, use accessor routines to read/write.
468 * hardware only supports 2us resolution for the ITR registers.
469 * these values always store the USER setting, and must be converted
470 * before programming to a register.
471 */
472 u16 rx_itr_setting;
473 u16 tx_itr_setting;
474
5db4cb59 475 u16 rss_table_size;
66ddcffb 476 u16 rss_size;
5db4cb59 477
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JB
478 u16 max_frame;
479 u16 rx_hdr_len;
480 u16 rx_buf_len;
481 u8 dtype;
482
483 /* List of q_vectors allocated to this VSI */
493fb300 484 struct i40e_q_vector **q_vectors;
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485 int num_q_vectors;
486 int base_vector;
63741846 487 bool irqs_ready;
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JB
488
489 u16 seid; /* HW index of this VSI (absolute index) */
490 u16 id; /* VSI number */
491 u16 uplink_seid;
492
493 u16 base_queue; /* vsi's first queue in hw array */
494 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 495 u16 req_queue_pairs; /* User requested queue pairs */
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496 u16 num_queue_pairs; /* Used tx and rx pairs */
497 u16 num_desc;
498 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
499 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
500
501 struct i40e_tc_configuration tc_config;
502 struct i40e_aqc_vsi_properties_data info;
503
504 /* VSI BW limit (absolute across all TCs) */
505 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
506 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
507
508 /* Relative TC credits across VSIs */
509 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
510 /* TC BW limit credits within VSI */
511 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
512 /* TC BW limit max quanta within VSI */
513 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
514
515 struct i40e_pf *back; /* Backreference to associated PF */
516 u16 idx; /* index in pf->vsi[] */
517 u16 veb_idx; /* index of VEB parent */
518 struct kobject *kobj; /* sysfs object */
519
520 /* VSI specific handlers */
521 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW
522
523 /* current rxnfc data */
524 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB
525} ____cacheline_internodealigned_in_smp;
526
527struct i40e_netdev_priv {
528 struct i40e_vsi *vsi;
529};
530
531/* struct that defines an interrupt vector */
532struct i40e_q_vector {
533 struct i40e_vsi *vsi;
534
535 u16 v_idx; /* index in the vsi->q_vector array. */
536 u16 reg_idx; /* register index of the interrupt */
537
538 struct napi_struct napi;
539
540 struct i40e_ring_container rx;
541 struct i40e_ring_container tx;
542
543 u8 num_ringpairs; /* total number of ring pairs in vector */
544
7daa6bf3 545 cpumask_t affinity_mask;
493fb300 546 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 547 char name[I40E_INT_NAME_STR_LEN];
7daa6bf3
JB
548} ____cacheline_internodealigned_in_smp;
549
550/* lan device */
551struct i40e_device {
552 struct list_head list;
553 struct i40e_pf *pf;
554};
555
556/**
557 * i40e_fw_version_str - format the FW and NVM version strings
558 * @hw: ptr to the hardware info
559 **/
560static inline char *i40e_fw_version_str(struct i40e_hw *hw)
561{
562 static char buf[32];
563
564 snprintf(buf, sizeof(buf),
7edf810c
SN
565 "f%d.%d.%05d a%d.%d n%x.%02x e%x",
566 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
7daa6bf3 567 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB
568 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
569 I40E_NVM_VERSION_HI_SHIFT,
570 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
571 I40E_NVM_VERSION_LO_SHIFT,
7edf810c 572 (hw->nvm.eetrack & 0xffffff));
7daa6bf3
JB
573
574 return buf;
575}
576
577/**
578 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
579 * @netdev: the corresponding netdev
580 *
581 * Return the PF struct for the given netdev
582 **/
583static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
584{
585 struct i40e_netdev_priv *np = netdev_priv(netdev);
586 struct i40e_vsi *vsi = np->vsi;
587
588 return vsi->back;
589}
590
591static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
592 irqreturn_t (*irq_handler)(int, void *))
593{
594 vsi->irq_handler = irq_handler;
595}
596
597/**
598 * i40e_rx_is_programming_status - check for programming status descriptor
599 * @qw: the first quad word of the program status descriptor
600 *
601 * The value of in the descriptor length field indicate if this
602 * is a programming status descriptor for flow director or FCoE
603 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
604 * it is a packet descriptor.
605 **/
606static inline bool i40e_rx_is_programming_status(u64 qw)
607{
608 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
609 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
610}
611
082def10
ASJ
612/**
613 * i40e_get_fd_cnt_all - get the total FD filter space available
614 * @pf: pointer to the pf struct
615 **/
616static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
617{
618 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
619}
620
7daa6bf3
JB
621/* needed by i40e_ethtool.c */
622int i40e_up(struct i40e_vsi *vsi);
623void i40e_down(struct i40e_vsi *vsi);
624extern const char i40e_driver_name[];
625extern const char i40e_driver_version_str[];
23326186 626void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB
627void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
628void i40e_update_stats(struct i40e_vsi *vsi);
629void i40e_update_eth_stats(struct i40e_vsi *vsi);
630struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
631int i40e_fetch_switch_configuration(struct i40e_pf *pf,
632 bool printconfig);
633
17a73f6b 634int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 635 struct i40e_pf *pf, bool add);
17a73f6b
JG
636int i40e_add_del_fdir(struct i40e_vsi *vsi,
637 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ
638void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
639int i40e_get_current_fd_count(struct i40e_pf *pf);
12957388 640int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1e1be8f6 641int i40e_get_current_atr_cnt(struct i40e_pf *pf);
7c3c288b 642bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB
643void i40e_set_ethtool_ops(struct net_device *netdev);
644struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
645 u8 *macaddr, s16 vlan,
646 bool is_vf, bool is_netdev);
647void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
648 bool is_vf, bool is_netdev);
649int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
650struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
651 u16 uplink, u32 param1);
652int i40e_vsi_release(struct i40e_vsi *vsi);
653struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
654 struct i40e_vsi *start_vsi);
38e00438
VD
655#ifdef I40E_FCOE
656void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
657 struct i40e_vsi_context *ctxt,
658 u8 enabled_tc, bool is_add);
659#endif
fc18eaa0 660int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 661int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB
662struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
663 u16 downlink_seid, u8 enabled_tc);
664void i40e_veb_release(struct i40e_veb *veb);
665
4e3b35b0 666int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB
667i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
668void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
669void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
670void i40e_pf_reset_stats(struct i40e_pf *pf);
671#ifdef CONFIG_DEBUG_FS
672void i40e_dbg_pf_init(struct i40e_pf *pf);
673void i40e_dbg_pf_exit(struct i40e_pf *pf);
674void i40e_dbg_init(void);
675void i40e_dbg_exit(void);
676#else
677static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
678static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
679static inline void i40e_dbg_init(void) {}
680static inline void i40e_dbg_exit(void) {}
681#endif /* CONFIG_DEBUG_FS*/
682void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 683void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 684void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 685void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD
686#ifdef I40E_FCOE
687struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
688 struct net_device *netdev,
689 struct rtnl_link_stats64 *storage);
690int i40e_set_mac(struct net_device *netdev, void *p);
691void i40e_set_rx_mode(struct net_device *netdev);
692#endif
7daa6bf3 693int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD
694#ifdef I40E_FCOE
695void i40e_tx_timeout(struct net_device *netdev);
696int i40e_vlan_rx_add_vid(struct net_device *netdev,
697 __always_unused __be16 proto, u16 vid);
698int i40e_vlan_rx_kill_vid(struct net_device *netdev,
699 __always_unused __be16 proto, u16 vid);
700#endif
96664483 701int i40e_open(struct net_device *netdev);
6c167f58 702int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB
703void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
704int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
705int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
706struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
707 bool is_vf, bool is_netdev);
708bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
709struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
710 bool is_vf, bool is_netdev);
38e00438 711#ifdef I40E_FCOE
38e00438
VD
712int i40e_close(struct net_device *netdev);
713int i40e_setup_tc(struct net_device *netdev, u8 tc);
714void i40e_netpoll(struct net_device *netdev);
715int i40e_fcoe_enable(struct net_device *netdev);
716int i40e_fcoe_disable(struct net_device *netdev);
717int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
718u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
719void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
720void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
721int i40e_init_pf_fcoe(struct i40e_pf *pf);
722int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
723void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
724int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
725 union i40e_rx_desc *rx_desc,
726 struct sk_buff *skb);
727void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
728 union i40e_rx_desc *rx_desc, u8 prog_id);
729#endif /* I40E_FCOE */
7daa6bf3 730void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP
731#ifdef CONFIG_I40E_DCB
732void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 733 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP
734 struct i40e_dcbx_config *new_cfg);
735void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
736void i40e_dcbnl_setup(struct i40e_vsi *vsi);
737bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
738 struct i40e_dcbx_config *old_cfg,
739 struct i40e_dcbx_config *new_cfg);
740#endif /* CONFIG_I40E_DCB */
beb0dff1
JK
741void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
742void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
743void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
744void i40e_ptp_set_increment(struct i40e_pf *pf);
745int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
746int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
747void i40e_ptp_init(struct i40e_pf *pf);
748void i40e_ptp_stop(struct i40e_pf *pf);
51616018 749int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
e8ab38cf 750#if IS_ENABLED(CONFIG_I40E_CONFIGFS_FS)
96664483
GR
751int i40e_configfs_init(void);
752void i40e_configfs_exit(void);
e8ab38cf 753#endif /* CONFIG_I40E_CONFIGFS_FS */
f4492db1
GR
754i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
755i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
756i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
7daa6bf3 757#endif /* _I40E_H_ */
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