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i40e/i40evf: i40e_register.h updates
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
38e00438
VD		 57#ifdef I40E_FCOE
58#include "i40e_fcoe.h"
59#endif
7daa6bf3
JB		 60#include "i40e_virtchnl.h"
61#include "i40e_virtchnl_pf.h"
62#include "i40e_txrx.h"
4e3b35b0 63#include "i40e_dcb.h"
7daa6bf3
JB		 64
65/* Useful i40e defaults */
66#define I40E_BASE_PF_SEID 16
67#define I40E_BASE_VSI_SEID 512
68#define I40E_BASE_VEB_SEID 288
69#define I40E_MAX_VEB 16
70
71#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 72#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 73#define I40E_DEFAULT_NUM_DESCRIPTORS 512
74#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
75#define I40E_MIN_NUM_DESCRIPTORS 64
76#define I40E_MIN_MSIX 2
77#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 78#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 79#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
80#define I40E_DEFAULT_QUEUES_PER_VF 4
81#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 82#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 83#define I40E_FDIR_RING 0
84#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 85#ifdef I40E_FCOE
86#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
87#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
88#endif /* I40E_FCOE */
7daa6bf3 89#define I40E_MAX_AQ_BUF_SIZE 4096
07574897
MW		 90#define I40E_AQ_LEN 256
91#define I40E_AQ_WORK_LIMIT 32
7daa6bf3
JB		 92#define I40E_MAX_USER_PRIORITY 8
93#define I40E_DEFAULT_MSG_ENABLE 4
23527308 94#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 95#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3
JB		 96
97#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 98#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 99#define I40E_NVM_VERSION_HI_SHIFT 12
100#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 101
102/* The values in here are decimal coded as hex as is the case in the NVM map*/
103#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 104#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 105
7daa6bf3
JB		 106/* magic for getting defines into strings */
107#define STRINGIFY(foo) #foo
108#define XSTRINGIFY(bar) STRINGIFY(bar)
109
7daa6bf3
JB		 110#define I40E_RX_DESC(R, i) \
111 ((ring_is_16byte_desc_enabled(R)) \
112 ? (union i40e_32byte_rx_desc *) \
113 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
114 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
115#define I40E_TX_DESC(R, i) \
116 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
117#define I40E_TX_CTXTDESC(R, i) \
118 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
119#define I40E_TX_FDIRDESC(R, i) \
120 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
121
122/* default to trying for four seconds */
123#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
124
125/* driver state flags */
126enum i40e_state_t {
127 __I40E_TESTING,
128 __I40E_CONFIG_BUSY,
129 __I40E_CONFIG_DONE,
130 __I40E_DOWN,
131 __I40E_NEEDS_RESTART,
132 __I40E_SERVICE_SCHED,
133 __I40E_ADMINQ_EVENT_PENDING,
134 __I40E_MDD_EVENT_PENDING,
135 __I40E_VFLR_EVENT_PENDING,
136 __I40E_RESET_RECOVERY_PENDING,
137 __I40E_RESET_INTR_RECEIVED,
138 __I40E_REINIT_REQUESTED,
139 __I40E_PF_RESET_REQUESTED,
140 __I40E_CORE_RESET_REQUESTED,
141 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 142 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 143 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 144 __I40E_SUSPENDED,
9ce34f02 145 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 146 __I40E_BAD_EEPROM,
b5d06f05 147 __I40E_DOWN_REQUESTED,
1e1be8f6 148 __I40E_FD_FLUSH_REQUESTED,
a316f651 149 __I40E_RESET_FAILED,
69129dc3 150 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 151 __I40E_VF_DISABLE,
7daa6bf3
JB		 152};
153
154enum i40e_interrupt_policy {
155 I40E_INTERRUPT_BEST_CASE,
156 I40E_INTERRUPT_MEDIUM,
157 I40E_INTERRUPT_LOWEST
158};
159
160struct i40e_lump_tracking {
161 u16 num_entries;
162 u16 search_hint;
163 u16 list[0];
164#define I40E_PILE_VALID_BIT 0x8000
165};
166
167#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 168#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
169#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 170#define I40E_FDIR_BUFFER_HEAD_ROOM 32
55a5e60b 171
433c47de
ASJ		 172enum i40e_fd_stat_idx {
173 I40E_FD_STAT_ATR,
174 I40E_FD_STAT_SB,
175 I40E_FD_STAT_PF_COUNT
176};
177#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
178#define I40E_FD_ATR_STAT_IDX(pf_id) \
179 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
180#define I40E_FD_SB_STAT_IDX(pf_id) \
181 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
182
17a73f6b
JG		 183struct i40e_fdir_filter {
184 struct hlist_node fdir_node;
185 /* filter ipnut set */
186 u8 flow_type;
187 u8 ip4_proto;
04b73bd7 188 /* TX packet view of src and dst */
17a73f6b
JG		 189 __be32 dst_ip[4];
190 __be32 src_ip[4];
191 __be16 src_port;
192 __be16 dst_port;
193 __be32 sctp_v_tag;
194 /* filter control */
7daa6bf3
JB		 195 u16 q_index;
196 u8 flex_off;
197 u8 pctype;
198 u16 dest_vsi;
199 u8 dest_ctl;
200 u8 fd_status;
201 u16 cnt_index;
202 u32 fd_id;
7daa6bf3
JB		 203};
204
4e3b35b0
NP		 205#define I40E_ETH_P_LLDP 0x88cc
206
7daa6bf3
JB		 207#define I40E_DCB_PRIO_TYPE_STRICT 0
208#define I40E_DCB_PRIO_TYPE_ETS 1
209#define I40E_DCB_STRICT_PRIO_CREDITS 127
210#define I40E_MAX_USER_PRIORITY 8
211/* DCB per TC information data structure */
212struct i40e_tc_info {
213 u16 qoffset; /* Queue offset from base queue */
214 u16 qcount; /* Total Queues */
215 u8 netdev_tc; /* Netdev TC index if netdev associated */
216};
217
218/* TC configuration data structure */
219struct i40e_tc_configuration {
220 u8 numtc; /* Total number of enabled TCs */
221 u8 enabled_tc; /* TC map */
222 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
223};
224
225/* struct that defines the Ethernet device */
226struct i40e_pf {
227 struct pci_dev *pdev;
228 struct i40e_hw hw;
229 unsigned long state;
230 unsigned long link_check_timeout;
231 struct msix_entry *msix_entries;
7daa6bf3
JB		 232 bool fc_autoneg_status;
233
234 u16 eeprom_version;
6c167f58 235 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 236 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
237 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
238 u16 num_req_vfs; /* num vfs requested for this vf */
239 u16 num_vf_qps; /* num queue pairs per vf */
38e00438
VD		 240#ifdef I40E_FCOE
241 u16 num_fcoe_qps; /* num fcoe queues this pf has set up */
242 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
243#endif /* I40E_FCOE */
7daa6bf3
JB		 244 u16 num_lan_qps; /* num lan queues this pf has set up */
245 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 246 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 247 u16 rss_size; /* num queues in the RSS array */
248 u16 rss_size_max; /* HW defined max RSS queues */
249 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 250 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 251 u8 atr_sample_rate;
8e2773ae 252 bool wol_en;
7daa6bf3 253
17a73f6b
JG		 254 struct hlist_head fdir_filter_list;
255 u16 fdir_pf_active_filters;
433c47de
ASJ		 256 u16 fd_sb_cnt_idx;
257 u16 fd_atr_cnt_idx;
1e1be8f6 258 unsigned long fd_flush_timestamp;
60793f4a 259 u32 fd_flush_cnt;
1e1be8f6
ASJ		 260 u32 fd_add_err;
261 u32 fd_atr_cnt;
262 u32 fd_tcp_rule;
17a73f6b 263
a1c9a9d9
JK		 264#ifdef CONFIG_I40E_VXLAN
265 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
266 u16 pending_vxlan_bitmap;
267
268#endif
7daa6bf3
JB		 269 enum i40e_interrupt_policy int_policy;
270 u16 rx_itr_default;
271 u16 tx_itr_default;
272 u16 msg_enable;
b294ac70 273 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 274 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 275 unsigned long service_timer_period;
276 unsigned long service_timer_previous;
7daa6bf3
JB		 277 struct timer_list service_timer;
278 struct work_struct service_task;
279
280 u64 flags;
281#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
282#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
283#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
284#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
285#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
286#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 287#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
288#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
289#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
38e00438
VD		 290#ifdef I40E_FCOE
291#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
292#endif /* I40E_FCOE */
9f52987b
NP		 293#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
294#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
295#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
296#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
297#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
298#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
299#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
300#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 301#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
302#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 303#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 304#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
305#ifdef CONFIG_I40E_VXLAN
306#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
307#endif
1f224ad2 308#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 309#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 310
61dade7e
ASJ		 311 /* tracks features that get auto disabled by errors */
312 u64 auto_disable_flags;
313
38e00438
VD		 314#ifdef I40E_FCOE
315 struct i40e_fcoe fcoe;
316
317#endif /* I40E_FCOE */
7daa6bf3
JB		 318 bool stat_offsets_loaded;
319 struct i40e_hw_port_stats stats;
320 struct i40e_hw_port_stats stats_offsets;
321 u32 tx_timeout_count;
322 u32 tx_timeout_recovery_level;
323 unsigned long tx_timeout_last_recovery;
810b3ae4 324 u32 tx_sluggish_count;
7daa6bf3
JB		 325 u32 hw_csum_rx_error;
326 u32 led_status;
327 u16 corer_count; /* Core reset count */
328 u16 globr_count; /* Global reset count */
329 u16 empr_count; /* EMP reset count */
330 u16 pfr_count; /* PF reset count */
cd92e72f 331 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 332
333 struct mutex switch_mutex;
334 u16 lan_vsi; /* our default LAN VSI */
335 u16 lan_veb; /* initial relay, if exists */
336#define I40E_NO_VEB 0xffff
337#define I40E_NO_VSI 0xffff
338 u16 next_vsi; /* Next unallocated VSI - 0-based! */
339 struct i40e_vsi **vsi;
340 struct i40e_veb *veb[I40E_MAX_VEB];
341
342 struct i40e_lump_tracking *qp_pile;
343 struct i40e_lump_tracking *irq_pile;
344
345 /* switch config info */
346 u16 pf_seid;
347 u16 main_vsi_seid;
348 u16 mac_seid;
7daa6bf3
JB		 349 struct kobject *switch_kobj;
350#ifdef CONFIG_DEBUG_FS
351 struct dentry *i40e_dbg_pf;
352#endif /* CONFIG_DEBUG_FS */
353
93cd765b
ASJ		 354 u16 instance; /* A unique number per i40e_pf instance in the system */
355
7daa6bf3
JB		 356 /* sr-iov config info */
357 struct i40e_vf *vf;
358 int num_alloc_vfs; /* actual number of VFs allocated */
359 u32 vf_aq_requests;
360
361 /* DCBx/DCBNL capability for PF that indicates
362 * whether DCBx is managed by firmware or host
363 * based agent (LLDPAD). Also, indicates what
364 * flavor of DCBx protocol (IEEE/CEE) is supported
365 * by the device. For now we're supporting IEEE
366 * mode only.
367 */
368 u16 dcbx_cap;
369
370 u32 fcoe_hmc_filt_num;
371 u32 fcoe_hmc_cntx_num;
372 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 373
374 struct ptp_clock *ptp_clock;
375 struct ptp_clock_info ptp_caps;
376 struct sk_buff *ptp_tx_skb;
beb0dff1 377 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 378 unsigned long last_rx_ptp_check;
379 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
380 u64 ptp_base_adj;
381 u32 tx_hwtstamp_timeouts;
382 u32 rx_hwtstamp_cleared;
383 bool ptp_tx;
384 bool ptp_rx;
e157ea30 385 u16 rss_table_size;
7daa6bf3
JB		 386};
387
388struct i40e_mac_filter {
389 struct list_head list;
390 u8 macaddr[ETH_ALEN];
391#define I40E_VLAN_ANY -1
392 s16 vlan;
393 u8 counter; /* number of instances of this filter */
394 bool is_vf; /* filter belongs to a VF */
395 bool is_netdev; /* filter belongs to a netdev */
396 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 397 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 398};
399
400struct i40e_veb {
401 struct i40e_pf *pf;
402 u16 idx;
403 u16 veb_idx; /* index of VEB parent */
404 u16 seid;
405 u16 uplink_seid;
406 u16 stats_idx; /* index of VEB parent */
407 u8 enabled_tc;
408 u16 flags;
409 u16 bw_limit;
410 u8 bw_max_quanta;
411 bool is_abs_credits;
412 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
413 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
414 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
415 struct kobject *kobj;
416 bool stat_offsets_loaded;
417 struct i40e_eth_stats stats;
418 struct i40e_eth_stats stats_offsets;
419};
420
421/* struct that defines a VSI, associated with a dev */
422struct i40e_vsi {
423 struct net_device *netdev;
424 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
425 bool netdev_registered;
426 bool stat_offsets_loaded;
427
428 u32 current_netdev_flags;
429 unsigned long state;
430#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
431#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
432 unsigned long flags;
433
434 struct list_head mac_filter_list;
435
436 /* VSI stats */
437 struct rtnl_link_stats64 net_stats;
438 struct rtnl_link_stats64 net_stats_offsets;
439 struct i40e_eth_stats eth_stats;
440 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 441#ifdef I40E_FCOE
442 struct i40e_fcoe_stats fcoe_stats;
443 struct i40e_fcoe_stats fcoe_stats_offsets;
444 bool fcoe_stat_offsets_loaded;
445#endif
7daa6bf3
JB		 446 u32 tx_restart;
447 u32 tx_busy;
448 u32 rx_buf_failed;
449 u32 rx_page_failed;
450
9f65e15b
AD		 451 /* These are containers of ring pointers, allocated at run-time */
452 struct i40e_ring **rx_rings;
453 struct i40e_ring **tx_rings;
7daa6bf3
JB		 454
455 u16 work_limit;
456 /* high bit set means dynamic, use accessor routines to read/write.
457 * hardware only supports 2us resolution for the ITR registers.
458 * these values always store the USER setting, and must be converted
459 * before programming to a register.
460 */
461 u16 rx_itr_setting;
462 u16 tx_itr_setting;
463
464 u16 max_frame;
465 u16 rx_hdr_len;
466 u16 rx_buf_len;
467 u8 dtype;
468
469 /* List of q_vectors allocated to this VSI */
493fb300 470 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 471 int num_q_vectors;
472 int base_vector;
63741846 473 bool irqs_ready;
7daa6bf3
JB		 474
475 u16 seid; /* HW index of this VSI (absolute index) */
476 u16 id; /* VSI number */
477 u16 uplink_seid;
478
479 u16 base_queue; /* vsi's first queue in hw array */
480 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
481 u16 num_queue_pairs; /* Used tx and rx pairs */
482 u16 num_desc;
483 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
484 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
485
486 struct i40e_tc_configuration tc_config;
487 struct i40e_aqc_vsi_properties_data info;
488
489 /* VSI BW limit (absolute across all TCs) */
490 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
491 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
492
493 /* Relative TC credits across VSIs */
494 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
495 /* TC BW limit credits within VSI */
496 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
497 /* TC BW limit max quanta within VSI */
498 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
499
500 struct i40e_pf *back; /* Backreference to associated PF */
501 u16 idx; /* index in pf->vsi[] */
502 u16 veb_idx; /* index of VEB parent */
503 struct kobject *kobj; /* sysfs object */
504
505 /* VSI specific handlers */
506 irqreturn_t (*irq_handler)(int irq, void *data);
507} ____cacheline_internodealigned_in_smp;
508
509struct i40e_netdev_priv {
510 struct i40e_vsi *vsi;
511};
512
513/* struct that defines an interrupt vector */
514struct i40e_q_vector {
515 struct i40e_vsi *vsi;
516
517 u16 v_idx; /* index in the vsi->q_vector array. */
518 u16 reg_idx; /* register index of the interrupt */
519
520 struct napi_struct napi;
521
522 struct i40e_ring_container rx;
523 struct i40e_ring_container tx;
524
525 u8 num_ringpairs; /* total number of ring pairs in vector */
526
7daa6bf3 527 cpumask_t affinity_mask;
493fb300 528 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 529 char name[I40E_INT_NAME_STR_LEN];
7daa6bf3
JB		 530} ____cacheline_internodealigned_in_smp;
531
532/* lan device */
533struct i40e_device {
534 struct list_head list;
535 struct i40e_pf *pf;
536};
537
538/**
539 * i40e_fw_version_str - format the FW and NVM version strings
540 * @hw: ptr to the hardware info
541 **/
542static inline char *i40e_fw_version_str(struct i40e_hw *hw)
543{
544 static char buf[32];
545
546 snprintf(buf, sizeof(buf),
fe310704 547 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 548 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
549 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 550 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
551 I40E_NVM_VERSION_HI_SHIFT,
552 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
553 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 554 hw->nvm.eetrack);
555
556 return buf;
557}
558
559/**
560 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
561 * @netdev: the corresponding netdev
562 *
563 * Return the PF struct for the given netdev
564 **/
565static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
566{
567 struct i40e_netdev_priv *np = netdev_priv(netdev);
568 struct i40e_vsi *vsi = np->vsi;
569
570 return vsi->back;
571}
572
573static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
574 irqreturn_t (*irq_handler)(int, void *))
575{
576 vsi->irq_handler = irq_handler;
577}
578
579/**
580 * i40e_rx_is_programming_status - check for programming status descriptor
581 * @qw: the first quad word of the program status descriptor
582 *
583 * The value of in the descriptor length field indicate if this
584 * is a programming status descriptor for flow director or FCoE
585 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
586 * it is a packet descriptor.
587 **/
588static inline bool i40e_rx_is_programming_status(u64 qw)
589{
590 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
591 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
592}
593
082def10
ASJ		 594/**
595 * i40e_get_fd_cnt_all - get the total FD filter space available
596 * @pf: pointer to the pf struct
597 **/
598static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
599{
600 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
601}
602
7daa6bf3
JB		 603/* needed by i40e_ethtool.c */
604int i40e_up(struct i40e_vsi *vsi);
605void i40e_down(struct i40e_vsi *vsi);
606extern const char i40e_driver_name[];
607extern const char i40e_driver_version_str[];
23326186 608void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 609void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
610void i40e_update_stats(struct i40e_vsi *vsi);
611void i40e_update_eth_stats(struct i40e_vsi *vsi);
612struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
613int i40e_fetch_switch_configuration(struct i40e_pf *pf,
614 bool printconfig);
615
17a73f6b 616int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 617 struct i40e_pf *pf, bool add);
17a73f6b
JG		 618int i40e_add_del_fdir(struct i40e_vsi *vsi,
619 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 620void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
621int i40e_get_current_fd_count(struct i40e_pf *pf);
12957388 622int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1e1be8f6 623int i40e_get_current_atr_cnt(struct i40e_pf *pf);
7c3c288b 624bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 625void i40e_set_ethtool_ops(struct net_device *netdev);
626struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
627 u8 *macaddr, s16 vlan,
628 bool is_vf, bool is_netdev);
629void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
630 bool is_vf, bool is_netdev);
631int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
632struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
633 u16 uplink, u32 param1);
634int i40e_vsi_release(struct i40e_vsi *vsi);
635struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
636 struct i40e_vsi *start_vsi);
38e00438
VD		 637#ifdef I40E_FCOE
638void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
639 struct i40e_vsi_context *ctxt,
640 u8 enabled_tc, bool is_add);
641#endif
fc18eaa0 642int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 643int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 644struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
645 u16 downlink_seid, u8 enabled_tc);
646void i40e_veb_release(struct i40e_veb *veb);
647
4e3b35b0 648int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 649i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
650void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
651void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
652void i40e_pf_reset_stats(struct i40e_pf *pf);
653#ifdef CONFIG_DEBUG_FS
654void i40e_dbg_pf_init(struct i40e_pf *pf);
655void i40e_dbg_pf_exit(struct i40e_pf *pf);
656void i40e_dbg_init(void);
657void i40e_dbg_exit(void);
658#else
659static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
660static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
661static inline void i40e_dbg_init(void) {}
662static inline void i40e_dbg_exit(void) {}
663#endif /* CONFIG_DEBUG_FS*/
664void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 665void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 666void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 667void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 668#ifdef I40E_FCOE
669struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
670 struct net_device *netdev,
671 struct rtnl_link_stats64 *storage);
672int i40e_set_mac(struct net_device *netdev, void *p);
673void i40e_set_rx_mode(struct net_device *netdev);
674#endif
7daa6bf3 675int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 676#ifdef I40E_FCOE
677void i40e_tx_timeout(struct net_device *netdev);
678int i40e_vlan_rx_add_vid(struct net_device *netdev,
679 __always_unused __be16 proto, u16 vid);
680int i40e_vlan_rx_kill_vid(struct net_device *netdev,
681 __always_unused __be16 proto, u16 vid);
682#endif
6c167f58 683int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 684void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
685int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
686int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
687struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
688 bool is_vf, bool is_netdev);
689bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
690struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
691 bool is_vf, bool is_netdev);
38e00438
VD		 692#ifdef I40E_FCOE
693int i40e_open(struct net_device *netdev);
694int i40e_close(struct net_device *netdev);
695int i40e_setup_tc(struct net_device *netdev, u8 tc);
696void i40e_netpoll(struct net_device *netdev);
697int i40e_fcoe_enable(struct net_device *netdev);
698int i40e_fcoe_disable(struct net_device *netdev);
699int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
700u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
701void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
702void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
703int i40e_init_pf_fcoe(struct i40e_pf *pf);
704int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
705void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
706int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
707 union i40e_rx_desc *rx_desc,
708 struct sk_buff *skb);
709void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
710 union i40e_rx_desc *rx_desc, u8 prog_id);
711#endif /* I40E_FCOE */
7daa6bf3 712void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 713#ifdef CONFIG_I40E_DCB
714void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
715 struct i40e_dcbx_config *new_cfg);
716void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
717void i40e_dcbnl_setup(struct i40e_vsi *vsi);
718bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
719 struct i40e_dcbx_config *old_cfg,
720 struct i40e_dcbx_config *new_cfg);
721#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 722void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
723void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
724void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
725void i40e_ptp_set_increment(struct i40e_pf *pf);
726int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
727int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
728void i40e_ptp_init(struct i40e_pf *pf);
729void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 730#endif /* _I40E_H_ */
Linux kernel - Deliverables
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