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i40e: fix inconsistent statuses after a PF reset
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB		 40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
7daa6bf3
JB		 49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
beb0dff1
JK		 54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 57#include "i40e_type.h"
58#include "i40e_prototype.h"
38e00438
VD		 59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
7daa6bf3
JB		 62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
7daa6bf3
JB		 66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
232f4706 74#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
7daa6bf3
JB		 75#define I40E_DEFAULT_NUM_DESCRIPTORS 512
76#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
77#define I40E_MIN_NUM_DESCRIPTORS 64
78#define I40E_MIN_MSIX 2
79#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 80#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
e25d00b8
ASJ		 81/* max 16 qps */
82#define i40e_default_queues_per_vmdq(pf) \
83 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)
7daa6bf3
JB		 84#define I40E_DEFAULT_QUEUES_PER_VF 4
85#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
e25d00b8
ASJ		 86#define i40e_pf_get_max_q_per_tc(pf) \
87 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)
7daa6bf3
JB		 88#define I40E_FDIR_RING 0
89#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 90#ifdef I40E_FCOE
91#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
92#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
93#endif /* I40E_FCOE */
7daa6bf3 94#define I40E_MAX_AQ_BUF_SIZE 4096
07574897 95#define I40E_AQ_LEN 256
628f096d 96#define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
7daa6bf3
JB		 97#define I40E_MAX_USER_PRIORITY 8
98#define I40E_DEFAULT_MSG_ENABLE 4
23527308 99#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
fba52e21 100#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
7daa6bf3 101
7e45ab44 102/* Ethtool Private Flags */
41a1d04b 103#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
9ac77266 104#define I40E_PRIV_FLAGS_LINKPOLL_FLAG BIT(1)
ef17178c 105#define I40E_PRIV_FLAGS_FD_ATR BIT(2)
1cdfd88f 106#define I40E_PRIV_FLAGS_VEB_STATS BIT(3)
7e45ab44 107
7daa6bf3 108#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 109#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 110#define I40E_NVM_VERSION_HI_SHIFT 12
111#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
f0b44440
CW		 112#define I40E_OEM_VER_BUILD_MASK 0xff00
113#define I40E_OEM_VER_PATCH_MASK 0xff
fe310704
AS		 114
115/* The values in here are decimal coded as hex as is the case in the NVM map*/
116#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 117#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 118
7daa6bf3
JB		 119/* magic for getting defines into strings */
120#define STRINGIFY(foo) #foo
121#define XSTRINGIFY(bar) STRINGIFY(bar)
122
7daa6bf3
JB		 123#define I40E_RX_DESC(R, i) \
124 ((ring_is_16byte_desc_enabled(R)) \
125 ? (union i40e_32byte_rx_desc *) \
126 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
127 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
128#define I40E_TX_DESC(R, i) \
129 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
130#define I40E_TX_CTXTDESC(R, i) \
131 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
132#define I40E_TX_FDIRDESC(R, i) \
133 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
134
135/* default to trying for four seconds */
136#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
137
138/* driver state flags */
139enum i40e_state_t {
140 __I40E_TESTING,
141 __I40E_CONFIG_BUSY,
142 __I40E_CONFIG_DONE,
143 __I40E_DOWN,
144 __I40E_NEEDS_RESTART,
145 __I40E_SERVICE_SCHED,
146 __I40E_ADMINQ_EVENT_PENDING,
147 __I40E_MDD_EVENT_PENDING,
148 __I40E_VFLR_EVENT_PENDING,
149 __I40E_RESET_RECOVERY_PENDING,
150 __I40E_RESET_INTR_RECEIVED,
151 __I40E_REINIT_REQUESTED,
152 __I40E_PF_RESET_REQUESTED,
153 __I40E_CORE_RESET_REQUESTED,
154 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 155 __I40E_EMP_RESET_REQUESTED,
9df42d1a 156 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 157 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 158 __I40E_SUSPENDED,
9ce34f02 159 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 160 __I40E_BAD_EEPROM,
b5d06f05 161 __I40E_DOWN_REQUESTED,
1e1be8f6 162 __I40E_FD_FLUSH_REQUESTED,
a316f651 163 __I40E_RESET_FAILED,
69129dc3 164 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 165 __I40E_VF_DISABLE,
7daa6bf3
JB		 166};
167
168enum i40e_interrupt_policy {
169 I40E_INTERRUPT_BEST_CASE,
170 I40E_INTERRUPT_MEDIUM,
171 I40E_INTERRUPT_LOWEST
172};
173
174struct i40e_lump_tracking {
175 u16 num_entries;
176 u16 search_hint;
177 u16 list[0];
178#define I40E_PILE_VALID_BIT 0x8000
179};
180
181#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 182#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
183#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 184#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 185#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 186
b29e13bb
MW		 187#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
188
433c47de
ASJ		 189enum i40e_fd_stat_idx {
190 I40E_FD_STAT_ATR,
191 I40E_FD_STAT_SB,
60ccd45c 192 I40E_FD_STAT_ATR_TUNNEL,
433c47de
ASJ		 193 I40E_FD_STAT_PF_COUNT
194};
195#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
196#define I40E_FD_ATR_STAT_IDX(pf_id) \
197 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
198#define I40E_FD_SB_STAT_IDX(pf_id) \
199 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
60ccd45c
ASJ		 200#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
201 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
433c47de 202
17a73f6b
JG		 203struct i40e_fdir_filter {
204 struct hlist_node fdir_node;
205 /* filter ipnut set */
206 u8 flow_type;
207 u8 ip4_proto;
04b73bd7 208 /* TX packet view of src and dst */
17a73f6b
JG		 209 __be32 dst_ip[4];
210 __be32 src_ip[4];
211 __be16 src_port;
212 __be16 dst_port;
213 __be32 sctp_v_tag;
214 /* filter control */
7daa6bf3
JB		 215 u16 q_index;
216 u8 flex_off;
217 u8 pctype;
218 u16 dest_vsi;
219 u8 dest_ctl;
220 u8 fd_status;
221 u16 cnt_index;
222 u32 fd_id;
7daa6bf3
JB		 223};
224
4e3b35b0
NP		 225#define I40E_ETH_P_LLDP 0x88cc
226
7daa6bf3
JB		 227#define I40E_DCB_PRIO_TYPE_STRICT 0
228#define I40E_DCB_PRIO_TYPE_ETS 1
229#define I40E_DCB_STRICT_PRIO_CREDITS 127
230#define I40E_MAX_USER_PRIORITY 8
231/* DCB per TC information data structure */
232struct i40e_tc_info {
233 u16 qoffset; /* Queue offset from base queue */
234 u16 qcount; /* Total Queues */
235 u8 netdev_tc; /* Netdev TC index if netdev associated */
236};
237
238/* TC configuration data structure */
239struct i40e_tc_configuration {
240 u8 numtc; /* Total number of enabled TCs */
241 u8 enabled_tc; /* TC map */
242 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
243};
244
245/* struct that defines the Ethernet device */
246struct i40e_pf {
247 struct pci_dev *pdev;
248 struct i40e_hw hw;
249 unsigned long state;
7daa6bf3 250 struct msix_entry *msix_entries;
7daa6bf3
JB		 251 bool fc_autoneg_status;
252
253 u16 eeprom_version;
b40c82e6 254 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
7daa6bf3
JB		 255 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
256 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
b40c82e6
JK		 257 u16 num_req_vfs; /* num VFs requested for this VF */
258 u16 num_vf_qps; /* num queue pairs per VF */
38e00438 259#ifdef I40E_FCOE
b40c82e6 260 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
38e00438
VD		 261 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
262#endif /* I40E_FCOE */
b40c82e6
JK		 263 u16 num_lan_qps; /* num lan queues this PF has set up */
264 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
f8ff1464 265 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 266 u16 rss_size; /* num queues in the RSS array */
267 u16 rss_size_max; /* HW defined max RSS queues */
268 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 269 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 270 u8 atr_sample_rate;
8e2773ae 271 bool wol_en;
7daa6bf3 272
17a73f6b
JG		 273 struct hlist_head fdir_filter_list;
274 u16 fdir_pf_active_filters;
1e1be8f6 275 unsigned long fd_flush_timestamp;
60793f4a 276 u32 fd_flush_cnt;
1e1be8f6
ASJ		 277 u32 fd_add_err;
278 u32 fd_atr_cnt;
279 u32 fd_tcp_rule;
17a73f6b 280
a1c9a9d9
JK		 281#ifdef CONFIG_I40E_VXLAN
282 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
283 u16 pending_vxlan_bitmap;
284
285#endif
7daa6bf3
JB		 286 enum i40e_interrupt_policy int_policy;
287 u16 rx_itr_default;
288 u16 tx_itr_default;
71e6163a 289 u32 msg_enable;
b294ac70 290 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 291 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 292 unsigned long service_timer_period;
293 unsigned long service_timer_previous;
7daa6bf3
JB		 294 struct timer_list service_timer;
295 struct work_struct service_task;
296
297 u64 flags;
41a1d04b
JB		 298#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
299#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
300#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
301#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
302#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
303#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
304#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
305#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
306#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
d502ce01 307#define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
38e00438 308#ifdef I40E_FCOE
41a1d04b 309#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
38e00438 310#endif /* I40E_FCOE */
41a1d04b
JB		 311#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
312#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
313#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
314#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
315#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
316#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
317#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
318#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
319#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
320#define I40E_FLAG_PTP BIT_ULL(25)
321#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
a1c9a9d9 322#ifdef CONFIG_I40E_VXLAN
41a1d04b 323#define I40E_FLAG_VXLAN_FILTER_SYNC BIT_ULL(27)
a1c9a9d9 324#endif
41a1d04b
JB		 325#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
326#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
d502ce01
ASJ		 327#define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31)
328#define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32)
329#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33)
330#define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34)
331#define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35)
d1a8d275 332#define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37)
d502ce01 333#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38)
9ac77266 334#define I40E_FLAG_LINK_POLLING_ENABLED BIT_ULL(39)
fc60861e 335#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
3fced535 336#define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42)
7daa6bf3 337
61dade7e
ASJ		 338 /* tracks features that get auto disabled by errors */
339 u64 auto_disable_flags;
340
38e00438
VD		 341#ifdef I40E_FCOE
342 struct i40e_fcoe fcoe;
343
344#endif /* I40E_FCOE */
7daa6bf3
JB		 345 bool stat_offsets_loaded;
346 struct i40e_hw_port_stats stats;
347 struct i40e_hw_port_stats stats_offsets;
348 u32 tx_timeout_count;
349 u32 tx_timeout_recovery_level;
350 unsigned long tx_timeout_last_recovery;
810b3ae4 351 u32 tx_sluggish_count;
7daa6bf3
JB		 352 u32 hw_csum_rx_error;
353 u32 led_status;
354 u16 corer_count; /* Core reset count */
355 u16 globr_count; /* Global reset count */
356 u16 empr_count; /* EMP reset count */
357 u16 pfr_count; /* PF reset count */
cd92e72f 358 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 359
360 struct mutex switch_mutex;
361 u16 lan_vsi; /* our default LAN VSI */
362 u16 lan_veb; /* initial relay, if exists */
363#define I40E_NO_VEB 0xffff
364#define I40E_NO_VSI 0xffff
365 u16 next_vsi; /* Next unallocated VSI - 0-based! */
366 struct i40e_vsi **vsi;
367 struct i40e_veb *veb[I40E_MAX_VEB];
368
369 struct i40e_lump_tracking *qp_pile;
370 struct i40e_lump_tracking *irq_pile;
371
372 /* switch config info */
373 u16 pf_seid;
374 u16 main_vsi_seid;
375 u16 mac_seid;
7daa6bf3
JB		 376 struct kobject *switch_kobj;
377#ifdef CONFIG_DEBUG_FS
378 struct dentry *i40e_dbg_pf;
379#endif /* CONFIG_DEBUG_FS */
92faef85 380 bool cur_promisc;
7daa6bf3 381
93cd765b
ASJ		 382 u16 instance; /* A unique number per i40e_pf instance in the system */
383
7daa6bf3
JB		 384 /* sr-iov config info */
385 struct i40e_vf *vf;
386 int num_alloc_vfs; /* actual number of VFs allocated */
387 u32 vf_aq_requests;
388
389 /* DCBx/DCBNL capability for PF that indicates
390 * whether DCBx is managed by firmware or host
391 * based agent (LLDPAD). Also, indicates what
392 * flavor of DCBx protocol (IEEE/CEE) is supported
393 * by the device. For now we're supporting IEEE
394 * mode only.
395 */
396 u16 dcbx_cap;
397
398 u32 fcoe_hmc_filt_num;
399 u32 fcoe_hmc_cntx_num;
400 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 401
402 struct ptp_clock *ptp_clock;
403 struct ptp_clock_info ptp_caps;
404 struct sk_buff *ptp_tx_skb;
beb0dff1 405 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 406 unsigned long last_rx_ptp_check;
407 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
408 u64 ptp_base_adj;
409 u32 tx_hwtstamp_timeouts;
410 u32 rx_hwtstamp_cleared;
411 bool ptp_tx;
412 bool ptp_rx;
e157ea30 413 u16 rss_table_size;
f4492db1
GR		 414 /* These are only valid in NPAR modes */
415 u32 npar_max_bw;
416 u32 npar_min_bw;
2ac8b675
SN		 417
418 u32 ioremap_len;
3487b6c3 419 u32 fd_inv;
7daa6bf3
JB		 420};
421
422struct i40e_mac_filter {
423 struct list_head list;
424 u8 macaddr[ETH_ALEN];
425#define I40E_VLAN_ANY -1
426 s16 vlan;
427 u8 counter; /* number of instances of this filter */
428 bool is_vf; /* filter belongs to a VF */
429 bool is_netdev; /* filter belongs to a netdev */
430 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 431 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 432};
433
434struct i40e_veb {
435 struct i40e_pf *pf;
436 u16 idx;
437 u16 veb_idx; /* index of VEB parent */
438 u16 seid;
439 u16 uplink_seid;
440 u16 stats_idx; /* index of VEB parent */
441 u8 enabled_tc;
51616018 442 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB		 443 u16 flags;
444 u16 bw_limit;
445 u8 bw_max_quanta;
446 bool is_abs_credits;
447 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
448 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
449 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
450 struct kobject *kobj;
451 bool stat_offsets_loaded;
452 struct i40e_eth_stats stats;
453 struct i40e_eth_stats stats_offsets;
fe860afb
NP		 454 struct i40e_veb_tc_stats tc_stats;
455 struct i40e_veb_tc_stats tc_stats_offsets;
7daa6bf3
JB		 456};
457
458/* struct that defines a VSI, associated with a dev */
459struct i40e_vsi {
460 struct net_device *netdev;
461 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
462 bool netdev_registered;
463 bool stat_offsets_loaded;
464
465 u32 current_netdev_flags;
466 unsigned long state;
41a1d04b
JB		 467#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
468#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
7daa6bf3
JB		 469 unsigned long flags;
470
21659035
KP		 471 /* Per VSI lock to protect elements/list (MAC filter) */
472 spinlock_t mac_filter_list_lock;
7daa6bf3
JB		 473 struct list_head mac_filter_list;
474
475 /* VSI stats */
476 struct rtnl_link_stats64 net_stats;
477 struct rtnl_link_stats64 net_stats_offsets;
478 struct i40e_eth_stats eth_stats;
479 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 480#ifdef I40E_FCOE
481 struct i40e_fcoe_stats fcoe_stats;
482 struct i40e_fcoe_stats fcoe_stats_offsets;
483 bool fcoe_stat_offsets_loaded;
484#endif
7daa6bf3
JB		 485 u32 tx_restart;
486 u32 tx_busy;
2fc3d715 487 u64 tx_linearize;
7daa6bf3
JB		 488 u32 rx_buf_failed;
489 u32 rx_page_failed;
490
9f65e15b
AD		 491 /* These are containers of ring pointers, allocated at run-time */
492 struct i40e_ring **rx_rings;
493 struct i40e_ring **tx_rings;
7daa6bf3
JB		 494
495 u16 work_limit;
496 /* high bit set means dynamic, use accessor routines to read/write.
497 * hardware only supports 2us resolution for the ITR registers.
498 * these values always store the USER setting, and must be converted
499 * before programming to a register.
500 */
501 u16 rx_itr_setting;
502 u16 tx_itr_setting;
ac26fc13 503 u16 int_rate_limit; /* value in usecs */
7daa6bf3 504
5db4cb59 505 u16 rss_table_size;
66ddcffb 506 u16 rss_size;
5db4cb59 507
7daa6bf3
JB		 508 u16 max_frame;
509 u16 rx_hdr_len;
510 u16 rx_buf_len;
511 u8 dtype;
512
513 /* List of q_vectors allocated to this VSI */
493fb300 514 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 515 int num_q_vectors;
516 int base_vector;
63741846 517 bool irqs_ready;
7daa6bf3
JB		 518
519 u16 seid; /* HW index of this VSI (absolute index) */
520 u16 id; /* VSI number */
521 u16 uplink_seid;
522
523 u16 base_queue; /* vsi's first queue in hw array */
524 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 525 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB		 526 u16 num_queue_pairs; /* Used tx and rx pairs */
527 u16 num_desc;
528 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
529 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
530
531 struct i40e_tc_configuration tc_config;
532 struct i40e_aqc_vsi_properties_data info;
533
534 /* VSI BW limit (absolute across all TCs) */
535 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
536 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
537
538 /* Relative TC credits across VSIs */
539 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
540 /* TC BW limit credits within VSI */
541 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
542 /* TC BW limit max quanta within VSI */
543 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
544
545 struct i40e_pf *back; /* Backreference to associated PF */
546 u16 idx; /* index in pf->vsi[] */
547 u16 veb_idx; /* index of VEB parent */
548 struct kobject *kobj; /* sysfs object */
c156f856 549 bool current_isup; /* Sync 'link up' logging */
7daa6bf3
JB		 550
551 /* VSI specific handlers */
552 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW		 553
554 /* current rxnfc data */
555 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB		 556} ____cacheline_internodealigned_in_smp;
557
558struct i40e_netdev_priv {
559 struct i40e_vsi *vsi;
560};
561
562/* struct that defines an interrupt vector */
563struct i40e_q_vector {
564 struct i40e_vsi *vsi;
565
566 u16 v_idx; /* index in the vsi->q_vector array. */
567 u16 reg_idx; /* register index of the interrupt */
568
569 struct napi_struct napi;
570
571 struct i40e_ring_container rx;
572 struct i40e_ring_container tx;
573
574 u8 num_ringpairs; /* total number of ring pairs in vector */
575
7daa6bf3 576 cpumask_t affinity_mask;
493fb300 577 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 578 char name[I40E_INT_NAME_STR_LEN];
8e0764b4 579 bool arm_wb_state;
ee2319cf
JB		 580#define ITR_COUNTDOWN_START 100
581 u8 itr_countdown; /* when 0 should adjust ITR */
7daa6bf3
JB		 582} ____cacheline_internodealigned_in_smp;
583
584/* lan device */
585struct i40e_device {
586 struct list_head list;
587 struct i40e_pf *pf;
588};
589
590/**
6dec1017 591 * i40e_nvm_version_str - format the NVM version strings
7daa6bf3
JB		 592 * @hw: ptr to the hardware info
593 **/
6dec1017 594static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
7daa6bf3
JB		 595{
596 static char buf[32];
597
598 snprintf(buf, sizeof(buf),
f0b44440 599 "%x.%02x 0x%x %d.%d.%d",
ff80301e
JB		 600 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
601 I40E_NVM_VERSION_HI_SHIFT,
602 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
603 I40E_NVM_VERSION_LO_SHIFT,
f0b44440
CW		 604 hw->nvm.eetrack, (hw->nvm.oem_ver >> 24),
605 (hw->nvm.oem_ver & I40E_OEM_VER_BUILD_MASK) >> 8,
606 hw->nvm.oem_ver & I40E_OEM_VER_PATCH_MASK);
7daa6bf3
JB		 607
608 return buf;
609}
610
611/**
612 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
613 * @netdev: the corresponding netdev
614 *
615 * Return the PF struct for the given netdev
616 **/
617static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
618{
619 struct i40e_netdev_priv *np = netdev_priv(netdev);
620 struct i40e_vsi *vsi = np->vsi;
621
622 return vsi->back;
623}
624
625static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
626 irqreturn_t (*irq_handler)(int, void *))
627{
628 vsi->irq_handler = irq_handler;
629}
630
631/**
632 * i40e_rx_is_programming_status - check for programming status descriptor
633 * @qw: the first quad word of the program status descriptor
634 *
635 * The value of in the descriptor length field indicate if this
636 * is a programming status descriptor for flow director or FCoE
637 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
638 * it is a packet descriptor.
639 **/
640static inline bool i40e_rx_is_programming_status(u64 qw)
641{
642 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
643 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
644}
645
082def10
ASJ		 646/**
647 * i40e_get_fd_cnt_all - get the total FD filter space available
b40c82e6 648 * @pf: pointer to the PF struct
082def10
ASJ		 649 **/
650static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
651{
652 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
653}
654
7daa6bf3
JB		 655/* needed by i40e_ethtool.c */
656int i40e_up(struct i40e_vsi *vsi);
657void i40e_down(struct i40e_vsi *vsi);
658extern const char i40e_driver_name[];
659extern const char i40e_driver_version_str[];
23326186 660void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3 661void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
fdf0e0bf 662struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
7daa6bf3
JB		 663void i40e_update_stats(struct i40e_vsi *vsi);
664void i40e_update_eth_stats(struct i40e_vsi *vsi);
665struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
666int i40e_fetch_switch_configuration(struct i40e_pf *pf,
667 bool printconfig);
668
17a73f6b 669int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 670 struct i40e_pf *pf, bool add);
17a73f6b
JG		 671int i40e_add_del_fdir(struct i40e_vsi *vsi,
672 struct i40e_fdir_filter *input, bool add);
55a5e60b 673void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ		 674u32 i40e_get_current_fd_count(struct i40e_pf *pf);
675u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
676u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
677u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 678bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 679void i40e_set_ethtool_ops(struct net_device *netdev);
680struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
681 u8 *macaddr, s16 vlan,
682 bool is_vf, bool is_netdev);
683void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
684 bool is_vf, bool is_netdev);
30e2561b 685int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl);
7daa6bf3
JB		 686struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
687 u16 uplink, u32 param1);
688int i40e_vsi_release(struct i40e_vsi *vsi);
689struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
690 struct i40e_vsi *start_vsi);
38e00438
VD		 691#ifdef I40E_FCOE
692void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
693 struct i40e_vsi_context *ctxt,
694 u8 enabled_tc, bool is_add);
695#endif
fc18eaa0 696int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 697int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 698struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
699 u16 downlink_seid, u8 enabled_tc);
700void i40e_veb_release(struct i40e_veb *veb);
701
4e3b35b0 702int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 703i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
704void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
705void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
706void i40e_pf_reset_stats(struct i40e_pf *pf);
707#ifdef CONFIG_DEBUG_FS
708void i40e_dbg_pf_init(struct i40e_pf *pf);
709void i40e_dbg_pf_exit(struct i40e_pf *pf);
710void i40e_dbg_init(void);
711void i40e_dbg_exit(void);
712#else
713static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
714static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
715static inline void i40e_dbg_init(void) {}
716static inline void i40e_dbg_exit(void) {}
717#endif /* CONFIG_DEBUG_FS*/
02d109be
JB		 718/**
719 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
720 * @vsi: pointer to a vsi
721 * @vector: enable a particular Hw Interrupt vector, without base_vector
722 **/
723static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
724{
725 struct i40e_pf *pf = vsi->back;
726 struct i40e_hw *hw = &pf->hw;
727 u32 val;
728
729 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
730 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
731 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
732 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
733 /* skip the flush */
734}
735
5c2cebda 736void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 737void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 738void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 739#ifdef I40E_FCOE
740struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
741 struct net_device *netdev,
742 struct rtnl_link_stats64 *storage);
743int i40e_set_mac(struct net_device *netdev, void *p);
744void i40e_set_rx_mode(struct net_device *netdev);
745#endif
7daa6bf3 746int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 747#ifdef I40E_FCOE
748void i40e_tx_timeout(struct net_device *netdev);
749int i40e_vlan_rx_add_vid(struct net_device *netdev,
750 __always_unused __be16 proto, u16 vid);
751int i40e_vlan_rx_kill_vid(struct net_device *netdev,
752 __always_unused __be16 proto, u16 vid);
753#endif
96664483 754int i40e_open(struct net_device *netdev);
6c167f58 755int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 756void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
757int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
758int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
759struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
760 bool is_vf, bool is_netdev);
761bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
762struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
763 bool is_vf, bool is_netdev);
38e00438 764#ifdef I40E_FCOE
38e00438
VD		 765int i40e_close(struct net_device *netdev);
766int i40e_setup_tc(struct net_device *netdev, u8 tc);
767void i40e_netpoll(struct net_device *netdev);
768int i40e_fcoe_enable(struct net_device *netdev);
769int i40e_fcoe_disable(struct net_device *netdev);
770int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
771u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
772void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
773void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
21364bcf 774void i40e_init_pf_fcoe(struct i40e_pf *pf);
38e00438
VD		 775int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
776void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
777int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
778 union i40e_rx_desc *rx_desc,
779 struct sk_buff *skb);
780void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
781 union i40e_rx_desc *rx_desc, u8 prog_id);
782#endif /* I40E_FCOE */
7daa6bf3 783void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 784#ifdef CONFIG_I40E_DCB
785void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 786 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP		 787 struct i40e_dcbx_config *new_cfg);
788void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
789void i40e_dcbnl_setup(struct i40e_vsi *vsi);
790bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
791 struct i40e_dcbx_config *old_cfg,
792 struct i40e_dcbx_config *new_cfg);
793#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 794void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
795void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
796void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
797void i40e_ptp_set_increment(struct i40e_pf *pf);
798int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
799int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
800void i40e_ptp_init(struct i40e_pf *pf);
801void i40e_ptp_stop(struct i40e_pf *pf);
51616018 802int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR		 803i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
804i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
805i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
c156f856 806void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
7daa6bf3 807#endif /* _I40E_H_ */
Linux kernel - Deliverables
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