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tun_dst: Remove opts_size
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB		 40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
7daa6bf3
JB		 49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
beb0dff1
JK		 54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 57#include "i40e_type.h"
58#include "i40e_prototype.h"
38e00438
VD		 59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
7daa6bf3
JB		 62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
7daa6bf3
JB		 66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 74#define I40E_MAX_REGISTER 0x800000
232f4706 75#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
7daa6bf3
JB		 76#define I40E_DEFAULT_NUM_DESCRIPTORS 512
77#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
78#define I40E_MIN_NUM_DESCRIPTORS 64
79#define I40E_MIN_MSIX 2
80#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 81#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
e25d00b8
ASJ		 82/* max 16 qps */
83#define i40e_default_queues_per_vmdq(pf) \
84 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)
7daa6bf3
JB		 85#define I40E_DEFAULT_QUEUES_PER_VF 4
86#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
e25d00b8
ASJ		 87#define i40e_pf_get_max_q_per_tc(pf) \
88 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)
7daa6bf3
JB		 89#define I40E_FDIR_RING 0
90#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 91#ifdef I40E_FCOE
92#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
93#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
94#endif /* I40E_FCOE */
7daa6bf3 95#define I40E_MAX_AQ_BUF_SIZE 4096
07574897
MW		 96#define I40E_AQ_LEN 256
97#define I40E_AQ_WORK_LIMIT 32
7daa6bf3
JB		 98#define I40E_MAX_USER_PRIORITY 8
99#define I40E_DEFAULT_MSG_ENABLE 4
23527308 100#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 101#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3 102
7e45ab44 103/* Ethtool Private Flags */
41a1d04b 104#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
7e45ab44 105
7daa6bf3 106#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 107#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 108#define I40E_NVM_VERSION_HI_SHIFT 12
109#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 110
111/* The values in here are decimal coded as hex as is the case in the NVM map*/
112#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 113#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 114
7daa6bf3
JB		 115/* magic for getting defines into strings */
116#define STRINGIFY(foo) #foo
117#define XSTRINGIFY(bar) STRINGIFY(bar)
118
7daa6bf3
JB		 119#define I40E_RX_DESC(R, i) \
120 ((ring_is_16byte_desc_enabled(R)) \
121 ? (union i40e_32byte_rx_desc *) \
122 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
123 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
124#define I40E_TX_DESC(R, i) \
125 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
126#define I40E_TX_CTXTDESC(R, i) \
127 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
128#define I40E_TX_FDIRDESC(R, i) \
129 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
130
131/* default to trying for four seconds */
132#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
133
134/* driver state flags */
135enum i40e_state_t {
136 __I40E_TESTING,
137 __I40E_CONFIG_BUSY,
138 __I40E_CONFIG_DONE,
139 __I40E_DOWN,
140 __I40E_NEEDS_RESTART,
141 __I40E_SERVICE_SCHED,
142 __I40E_ADMINQ_EVENT_PENDING,
143 __I40E_MDD_EVENT_PENDING,
144 __I40E_VFLR_EVENT_PENDING,
145 __I40E_RESET_RECOVERY_PENDING,
146 __I40E_RESET_INTR_RECEIVED,
147 __I40E_REINIT_REQUESTED,
148 __I40E_PF_RESET_REQUESTED,
149 __I40E_CORE_RESET_REQUESTED,
150 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 151 __I40E_EMP_RESET_REQUESTED,
9df42d1a 152 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 153 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 154 __I40E_SUSPENDED,
9ce34f02 155 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 156 __I40E_BAD_EEPROM,
b5d06f05 157 __I40E_DOWN_REQUESTED,
1e1be8f6 158 __I40E_FD_FLUSH_REQUESTED,
a316f651 159 __I40E_RESET_FAILED,
69129dc3 160 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 161 __I40E_VF_DISABLE,
7daa6bf3
JB		 162};
163
164enum i40e_interrupt_policy {
165 I40E_INTERRUPT_BEST_CASE,
166 I40E_INTERRUPT_MEDIUM,
167 I40E_INTERRUPT_LOWEST
168};
169
170struct i40e_lump_tracking {
171 u16 num_entries;
172 u16 search_hint;
173 u16 list[0];
174#define I40E_PILE_VALID_BIT 0x8000
175};
176
177#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 178#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
179#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 180#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 181#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 182
b29e13bb
MW		 183#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
184
433c47de
ASJ		 185enum i40e_fd_stat_idx {
186 I40E_FD_STAT_ATR,
187 I40E_FD_STAT_SB,
60ccd45c 188 I40E_FD_STAT_ATR_TUNNEL,
433c47de
ASJ		 189 I40E_FD_STAT_PF_COUNT
190};
191#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
192#define I40E_FD_ATR_STAT_IDX(pf_id) \
193 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
194#define I40E_FD_SB_STAT_IDX(pf_id) \
195 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
60ccd45c
ASJ		 196#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
197 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
433c47de 198
17a73f6b
JG		 199struct i40e_fdir_filter {
200 struct hlist_node fdir_node;
201 /* filter ipnut set */
202 u8 flow_type;
203 u8 ip4_proto;
04b73bd7 204 /* TX packet view of src and dst */
17a73f6b
JG		 205 __be32 dst_ip[4];
206 __be32 src_ip[4];
207 __be16 src_port;
208 __be16 dst_port;
209 __be32 sctp_v_tag;
210 /* filter control */
7daa6bf3
JB		 211 u16 q_index;
212 u8 flex_off;
213 u8 pctype;
214 u16 dest_vsi;
215 u8 dest_ctl;
216 u8 fd_status;
217 u16 cnt_index;
218 u32 fd_id;
7daa6bf3
JB		 219};
220
4e3b35b0
NP		 221#define I40E_ETH_P_LLDP 0x88cc
222
7daa6bf3
JB		 223#define I40E_DCB_PRIO_TYPE_STRICT 0
224#define I40E_DCB_PRIO_TYPE_ETS 1
225#define I40E_DCB_STRICT_PRIO_CREDITS 127
226#define I40E_MAX_USER_PRIORITY 8
227/* DCB per TC information data structure */
228struct i40e_tc_info {
229 u16 qoffset; /* Queue offset from base queue */
230 u16 qcount; /* Total Queues */
231 u8 netdev_tc; /* Netdev TC index if netdev associated */
232};
233
234/* TC configuration data structure */
235struct i40e_tc_configuration {
236 u8 numtc; /* Total number of enabled TCs */
237 u8 enabled_tc; /* TC map */
238 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
239};
240
241/* struct that defines the Ethernet device */
242struct i40e_pf {
243 struct pci_dev *pdev;
244 struct i40e_hw hw;
245 unsigned long state;
246 unsigned long link_check_timeout;
247 struct msix_entry *msix_entries;
7daa6bf3
JB		 248 bool fc_autoneg_status;
249
250 u16 eeprom_version;
b40c82e6 251 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
7daa6bf3
JB		 252 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
253 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
b40c82e6
JK		 254 u16 num_req_vfs; /* num VFs requested for this VF */
255 u16 num_vf_qps; /* num queue pairs per VF */
38e00438 256#ifdef I40E_FCOE
b40c82e6 257 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
38e00438
VD		 258 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
259#endif /* I40E_FCOE */
b40c82e6
JK		 260 u16 num_lan_qps; /* num lan queues this PF has set up */
261 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
f8ff1464 262 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 263 u16 rss_size; /* num queues in the RSS array */
264 u16 rss_size_max; /* HW defined max RSS queues */
265 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 266 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 267 u8 atr_sample_rate;
8e2773ae 268 bool wol_en;
7daa6bf3 269
17a73f6b
JG		 270 struct hlist_head fdir_filter_list;
271 u16 fdir_pf_active_filters;
1e1be8f6 272 unsigned long fd_flush_timestamp;
60793f4a 273 u32 fd_flush_cnt;
1e1be8f6
ASJ		 274 u32 fd_add_err;
275 u32 fd_atr_cnt;
276 u32 fd_tcp_rule;
17a73f6b 277
a1c9a9d9
JK		 278#ifdef CONFIG_I40E_VXLAN
279 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
280 u16 pending_vxlan_bitmap;
281
282#endif
7daa6bf3
JB		 283 enum i40e_interrupt_policy int_policy;
284 u16 rx_itr_default;
285 u16 tx_itr_default;
71e6163a 286 u32 msg_enable;
b294ac70 287 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 288 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 289 unsigned long service_timer_period;
290 unsigned long service_timer_previous;
7daa6bf3
JB		 291 struct timer_list service_timer;
292 struct work_struct service_task;
293
294 u64 flags;
41a1d04b
JB		 295#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
296#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
297#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
298#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
299#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
300#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
301#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
302#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
303#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
d502ce01 304#define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
38e00438 305#ifdef I40E_FCOE
41a1d04b 306#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
38e00438 307#endif /* I40E_FCOE */
41a1d04b
JB		 308#define I40E_FLAG_IN_NETPOLL BIT_ULL(12)
309#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
310#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
311#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
312#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
313#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
314#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
315#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
316#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
317#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
318#define I40E_FLAG_PTP BIT_ULL(25)
319#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
a1c9a9d9 320#ifdef CONFIG_I40E_VXLAN
41a1d04b 321#define I40E_FLAG_VXLAN_FILTER_SYNC BIT_ULL(27)
a1c9a9d9 322#endif
41a1d04b
JB		 323#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
324#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
d502ce01
ASJ		 325#define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31)
326#define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32)
327#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33)
328#define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34)
329#define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35)
330#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38)
fc60861e 331#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
7daa6bf3 332
61dade7e
ASJ		 333 /* tracks features that get auto disabled by errors */
334 u64 auto_disable_flags;
335
38e00438
VD		 336#ifdef I40E_FCOE
337 struct i40e_fcoe fcoe;
338
339#endif /* I40E_FCOE */
7daa6bf3
JB		 340 bool stat_offsets_loaded;
341 struct i40e_hw_port_stats stats;
342 struct i40e_hw_port_stats stats_offsets;
343 u32 tx_timeout_count;
344 u32 tx_timeout_recovery_level;
345 unsigned long tx_timeout_last_recovery;
810b3ae4 346 u32 tx_sluggish_count;
7daa6bf3
JB		 347 u32 hw_csum_rx_error;
348 u32 led_status;
349 u16 corer_count; /* Core reset count */
350 u16 globr_count; /* Global reset count */
351 u16 empr_count; /* EMP reset count */
352 u16 pfr_count; /* PF reset count */
cd92e72f 353 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 354
355 struct mutex switch_mutex;
356 u16 lan_vsi; /* our default LAN VSI */
357 u16 lan_veb; /* initial relay, if exists */
358#define I40E_NO_VEB 0xffff
359#define I40E_NO_VSI 0xffff
360 u16 next_vsi; /* Next unallocated VSI - 0-based! */
361 struct i40e_vsi **vsi;
362 struct i40e_veb *veb[I40E_MAX_VEB];
363
364 struct i40e_lump_tracking *qp_pile;
365 struct i40e_lump_tracking *irq_pile;
366
367 /* switch config info */
368 u16 pf_seid;
369 u16 main_vsi_seid;
370 u16 mac_seid;
7daa6bf3
JB		 371 struct kobject *switch_kobj;
372#ifdef CONFIG_DEBUG_FS
373 struct dentry *i40e_dbg_pf;
374#endif /* CONFIG_DEBUG_FS */
375
93cd765b
ASJ		 376 u16 instance; /* A unique number per i40e_pf instance in the system */
377
7daa6bf3
JB		 378 /* sr-iov config info */
379 struct i40e_vf *vf;
380 int num_alloc_vfs; /* actual number of VFs allocated */
381 u32 vf_aq_requests;
382
383 /* DCBx/DCBNL capability for PF that indicates
384 * whether DCBx is managed by firmware or host
385 * based agent (LLDPAD). Also, indicates what
386 * flavor of DCBx protocol (IEEE/CEE) is supported
387 * by the device. For now we're supporting IEEE
388 * mode only.
389 */
390 u16 dcbx_cap;
391
392 u32 fcoe_hmc_filt_num;
393 u32 fcoe_hmc_cntx_num;
394 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 395
396 struct ptp_clock *ptp_clock;
397 struct ptp_clock_info ptp_caps;
398 struct sk_buff *ptp_tx_skb;
beb0dff1 399 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 400 unsigned long last_rx_ptp_check;
401 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
402 u64 ptp_base_adj;
403 u32 tx_hwtstamp_timeouts;
404 u32 rx_hwtstamp_cleared;
405 bool ptp_tx;
406 bool ptp_rx;
e157ea30 407 u16 rss_table_size;
f4492db1
GR		 408 /* These are only valid in NPAR modes */
409 u32 npar_max_bw;
410 u32 npar_min_bw;
7daa6bf3
JB		 411};
412
413struct i40e_mac_filter {
414 struct list_head list;
415 u8 macaddr[ETH_ALEN];
416#define I40E_VLAN_ANY -1
417 s16 vlan;
418 u8 counter; /* number of instances of this filter */
419 bool is_vf; /* filter belongs to a VF */
420 bool is_netdev; /* filter belongs to a netdev */
421 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 422 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 423};
424
425struct i40e_veb {
426 struct i40e_pf *pf;
427 u16 idx;
428 u16 veb_idx; /* index of VEB parent */
429 u16 seid;
430 u16 uplink_seid;
431 u16 stats_idx; /* index of VEB parent */
432 u8 enabled_tc;
51616018 433 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB		 434 u16 flags;
435 u16 bw_limit;
436 u8 bw_max_quanta;
437 bool is_abs_credits;
438 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
439 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
440 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
441 struct kobject *kobj;
442 bool stat_offsets_loaded;
443 struct i40e_eth_stats stats;
444 struct i40e_eth_stats stats_offsets;
fe860afb
NP		 445 struct i40e_veb_tc_stats tc_stats;
446 struct i40e_veb_tc_stats tc_stats_offsets;
7daa6bf3
JB		 447};
448
449/* struct that defines a VSI, associated with a dev */
450struct i40e_vsi {
451 struct net_device *netdev;
452 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
453 bool netdev_registered;
454 bool stat_offsets_loaded;
455
456 u32 current_netdev_flags;
457 unsigned long state;
41a1d04b
JB		 458#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
459#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
7daa6bf3
JB		 460 unsigned long flags;
461
462 struct list_head mac_filter_list;
463
464 /* VSI stats */
465 struct rtnl_link_stats64 net_stats;
466 struct rtnl_link_stats64 net_stats_offsets;
467 struct i40e_eth_stats eth_stats;
468 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 469#ifdef I40E_FCOE
470 struct i40e_fcoe_stats fcoe_stats;
471 struct i40e_fcoe_stats fcoe_stats_offsets;
472 bool fcoe_stat_offsets_loaded;
473#endif
7daa6bf3
JB		 474 u32 tx_restart;
475 u32 tx_busy;
476 u32 rx_buf_failed;
477 u32 rx_page_failed;
478
9f65e15b
AD		 479 /* These are containers of ring pointers, allocated at run-time */
480 struct i40e_ring **rx_rings;
481 struct i40e_ring **tx_rings;
7daa6bf3
JB		 482
483 u16 work_limit;
484 /* high bit set means dynamic, use accessor routines to read/write.
485 * hardware only supports 2us resolution for the ITR registers.
486 * these values always store the USER setting, and must be converted
487 * before programming to a register.
488 */
489 u16 rx_itr_setting;
490 u16 tx_itr_setting;
491
5db4cb59 492 u16 rss_table_size;
66ddcffb 493 u16 rss_size;
5db4cb59 494
7daa6bf3
JB		 495 u16 max_frame;
496 u16 rx_hdr_len;
497 u16 rx_buf_len;
498 u8 dtype;
499
500 /* List of q_vectors allocated to this VSI */
493fb300 501 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 502 int num_q_vectors;
503 int base_vector;
63741846 504 bool irqs_ready;
7daa6bf3
JB		 505
506 u16 seid; /* HW index of this VSI (absolute index) */
507 u16 id; /* VSI number */
508 u16 uplink_seid;
509
510 u16 base_queue; /* vsi's first queue in hw array */
511 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 512 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB		 513 u16 num_queue_pairs; /* Used tx and rx pairs */
514 u16 num_desc;
515 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
516 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
517
518 struct i40e_tc_configuration tc_config;
519 struct i40e_aqc_vsi_properties_data info;
520
521 /* VSI BW limit (absolute across all TCs) */
522 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
523 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
524
525 /* Relative TC credits across VSIs */
526 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
527 /* TC BW limit credits within VSI */
528 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
529 /* TC BW limit max quanta within VSI */
530 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
531
532 struct i40e_pf *back; /* Backreference to associated PF */
533 u16 idx; /* index in pf->vsi[] */
534 u16 veb_idx; /* index of VEB parent */
535 struct kobject *kobj; /* sysfs object */
536
537 /* VSI specific handlers */
538 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW		 539
540 /* current rxnfc data */
541 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB		 542} ____cacheline_internodealigned_in_smp;
543
544struct i40e_netdev_priv {
545 struct i40e_vsi *vsi;
546};
547
548/* struct that defines an interrupt vector */
549struct i40e_q_vector {
550 struct i40e_vsi *vsi;
551
552 u16 v_idx; /* index in the vsi->q_vector array. */
553 u16 reg_idx; /* register index of the interrupt */
554
555 struct napi_struct napi;
556
557 struct i40e_ring_container rx;
558 struct i40e_ring_container tx;
559
560 u8 num_ringpairs; /* total number of ring pairs in vector */
561
7daa6bf3 562 cpumask_t affinity_mask;
493fb300 563 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 564 char name[I40E_INT_NAME_STR_LEN];
8e0764b4 565 bool arm_wb_state;
7daa6bf3
JB		 566} ____cacheline_internodealigned_in_smp;
567
568/* lan device */
569struct i40e_device {
570 struct list_head list;
571 struct i40e_pf *pf;
572};
573
574/**
575 * i40e_fw_version_str - format the FW and NVM version strings
576 * @hw: ptr to the hardware info
577 **/
578static inline char *i40e_fw_version_str(struct i40e_hw *hw)
579{
580 static char buf[32];
581
582 snprintf(buf, sizeof(buf),
7edf810c
SN		 583 "f%d.%d.%05d a%d.%d n%x.%02x e%x",
584 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
7daa6bf3 585 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 586 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
587 I40E_NVM_VERSION_HI_SHIFT,
588 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
589 I40E_NVM_VERSION_LO_SHIFT,
7edf810c 590 (hw->nvm.eetrack & 0xffffff));
7daa6bf3
JB		 591
592 return buf;
593}
594
595/**
596 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
597 * @netdev: the corresponding netdev
598 *
599 * Return the PF struct for the given netdev
600 **/
601static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
602{
603 struct i40e_netdev_priv *np = netdev_priv(netdev);
604 struct i40e_vsi *vsi = np->vsi;
605
606 return vsi->back;
607}
608
609static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
610 irqreturn_t (*irq_handler)(int, void *))
611{
612 vsi->irq_handler = irq_handler;
613}
614
615/**
616 * i40e_rx_is_programming_status - check for programming status descriptor
617 * @qw: the first quad word of the program status descriptor
618 *
619 * The value of in the descriptor length field indicate if this
620 * is a programming status descriptor for flow director or FCoE
621 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
622 * it is a packet descriptor.
623 **/
624static inline bool i40e_rx_is_programming_status(u64 qw)
625{
626 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
627 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
628}
629
082def10
ASJ		 630/**
631 * i40e_get_fd_cnt_all - get the total FD filter space available
b40c82e6 632 * @pf: pointer to the PF struct
082def10
ASJ		 633 **/
634static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
635{
636 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
637}
638
7daa6bf3
JB		 639/* needed by i40e_ethtool.c */
640int i40e_up(struct i40e_vsi *vsi);
641void i40e_down(struct i40e_vsi *vsi);
642extern const char i40e_driver_name[];
643extern const char i40e_driver_version_str[];
23326186 644void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3 645void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
fdf0e0bf 646struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
7daa6bf3
JB		 647void i40e_update_stats(struct i40e_vsi *vsi);
648void i40e_update_eth_stats(struct i40e_vsi *vsi);
649struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
650int i40e_fetch_switch_configuration(struct i40e_pf *pf,
651 bool printconfig);
652
17a73f6b 653int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 654 struct i40e_pf *pf, bool add);
17a73f6b
JG		 655int i40e_add_del_fdir(struct i40e_vsi *vsi,
656 struct i40e_fdir_filter *input, bool add);
55a5e60b 657void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ		 658u32 i40e_get_current_fd_count(struct i40e_pf *pf);
659u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
660u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
661u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 662bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 663void i40e_set_ethtool_ops(struct net_device *netdev);
664struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
665 u8 *macaddr, s16 vlan,
666 bool is_vf, bool is_netdev);
667void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
668 bool is_vf, bool is_netdev);
669int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
670struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
671 u16 uplink, u32 param1);
672int i40e_vsi_release(struct i40e_vsi *vsi);
673struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
674 struct i40e_vsi *start_vsi);
38e00438
VD		 675#ifdef I40E_FCOE
676void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
677 struct i40e_vsi_context *ctxt,
678 u8 enabled_tc, bool is_add);
679#endif
fc18eaa0 680int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 681int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 682struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
683 u16 downlink_seid, u8 enabled_tc);
684void i40e_veb_release(struct i40e_veb *veb);
685
4e3b35b0 686int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 687i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
688void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
689void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
690void i40e_pf_reset_stats(struct i40e_pf *pf);
691#ifdef CONFIG_DEBUG_FS
692void i40e_dbg_pf_init(struct i40e_pf *pf);
693void i40e_dbg_pf_exit(struct i40e_pf *pf);
694void i40e_dbg_init(void);
695void i40e_dbg_exit(void);
696#else
697static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
698static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
699static inline void i40e_dbg_init(void) {}
700static inline void i40e_dbg_exit(void) {}
701#endif /* CONFIG_DEBUG_FS*/
702void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 703void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 704void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 705void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 706#ifdef I40E_FCOE
707struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
708 struct net_device *netdev,
709 struct rtnl_link_stats64 *storage);
710int i40e_set_mac(struct net_device *netdev, void *p);
711void i40e_set_rx_mode(struct net_device *netdev);
712#endif
7daa6bf3 713int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 714#ifdef I40E_FCOE
715void i40e_tx_timeout(struct net_device *netdev);
716int i40e_vlan_rx_add_vid(struct net_device *netdev,
717 __always_unused __be16 proto, u16 vid);
718int i40e_vlan_rx_kill_vid(struct net_device *netdev,
719 __always_unused __be16 proto, u16 vid);
720#endif
96664483 721int i40e_open(struct net_device *netdev);
6c167f58 722int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 723void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
724int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
725int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
726struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
727 bool is_vf, bool is_netdev);
728bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
729struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
730 bool is_vf, bool is_netdev);
38e00438 731#ifdef I40E_FCOE
38e00438
VD		 732int i40e_close(struct net_device *netdev);
733int i40e_setup_tc(struct net_device *netdev, u8 tc);
734void i40e_netpoll(struct net_device *netdev);
735int i40e_fcoe_enable(struct net_device *netdev);
736int i40e_fcoe_disable(struct net_device *netdev);
737int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
738u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
739void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
740void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
741int i40e_init_pf_fcoe(struct i40e_pf *pf);
742int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
743void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
744int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
745 union i40e_rx_desc *rx_desc,
746 struct sk_buff *skb);
747void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
748 union i40e_rx_desc *rx_desc, u8 prog_id);
749#endif /* I40E_FCOE */
7daa6bf3 750void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 751#ifdef CONFIG_I40E_DCB
752void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 753 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP		 754 struct i40e_dcbx_config *new_cfg);
755void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
756void i40e_dcbnl_setup(struct i40e_vsi *vsi);
757bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
758 struct i40e_dcbx_config *old_cfg,
759 struct i40e_dcbx_config *new_cfg);
760#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 761void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
762void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
763void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
764void i40e_ptp_set_increment(struct i40e_pf *pf);
765int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
766int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
767void i40e_ptp_init(struct i40e_pf *pf);
768void i40e_ptp_stop(struct i40e_pf *pf);
51616018 769int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR		 770i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
771i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
772i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
7daa6bf3 773#endif /* _I40E_H_ */
Linux kernel - Deliverables
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