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i40e: adds FCoE code to the i40e driver
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
57#include "i40e_virtchnl.h"
58#include "i40e_virtchnl_pf.h"
59#include "i40e_txrx.h"
4e3b35b0 60#include "i40e_dcb.h"
7daa6bf3
JB		 61
62/* Useful i40e defaults */
63#define I40E_BASE_PF_SEID 16
64#define I40E_BASE_VSI_SEID 512
65#define I40E_BASE_VEB_SEID 288
66#define I40E_MAX_VEB 16
67
68#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 69#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 70#define I40E_DEFAULT_NUM_DESCRIPTORS 512
71#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
72#define I40E_MIN_NUM_DESCRIPTORS 64
73#define I40E_MIN_MSIX 2
74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 75#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 76#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
77#define I40E_DEFAULT_QUEUES_PER_VF 4
78#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 79#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 80#define I40E_FDIR_RING 0
81#define I40E_FDIR_RING_COUNT 32
82#define I40E_MAX_AQ_BUF_SIZE 4096
83#define I40E_AQ_LEN 32
84#define I40E_AQ_WORK_LIMIT 16
85#define I40E_MAX_USER_PRIORITY 8
86#define I40E_DEFAULT_MSG_ENABLE 4
23527308 87#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
7daa6bf3
JB		 88
89#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 90#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 91#define I40E_NVM_VERSION_HI_SHIFT 12
92#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 93
94/* The values in here are decimal coded as hex as is the case in the NVM map*/
95#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 96#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 97
7daa6bf3
JB		 98/* magic for getting defines into strings */
99#define STRINGIFY(foo) #foo
100#define XSTRINGIFY(bar) STRINGIFY(bar)
101
7daa6bf3
JB		 102#define I40E_RX_DESC(R, i) \
103 ((ring_is_16byte_desc_enabled(R)) \
104 ? (union i40e_32byte_rx_desc *) \
105 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
106 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
107#define I40E_TX_DESC(R, i) \
108 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
109#define I40E_TX_CTXTDESC(R, i) \
110 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
111#define I40E_TX_FDIRDESC(R, i) \
112 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
113
114/* default to trying for four seconds */
115#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
116
117/* driver state flags */
118enum i40e_state_t {
119 __I40E_TESTING,
120 __I40E_CONFIG_BUSY,
121 __I40E_CONFIG_DONE,
122 __I40E_DOWN,
123 __I40E_NEEDS_RESTART,
124 __I40E_SERVICE_SCHED,
125 __I40E_ADMINQ_EVENT_PENDING,
126 __I40E_MDD_EVENT_PENDING,
127 __I40E_VFLR_EVENT_PENDING,
128 __I40E_RESET_RECOVERY_PENDING,
129 __I40E_RESET_INTR_RECEIVED,
130 __I40E_REINIT_REQUESTED,
131 __I40E_PF_RESET_REQUESTED,
132 __I40E_CORE_RESET_REQUESTED,
133 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 134 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 135 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 136 __I40E_SUSPENDED,
9ce34f02 137 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 138 __I40E_BAD_EEPROM,
b5d06f05 139 __I40E_DOWN_REQUESTED,
7daa6bf3
JB		 140};
141
142enum i40e_interrupt_policy {
143 I40E_INTERRUPT_BEST_CASE,
144 I40E_INTERRUPT_MEDIUM,
145 I40E_INTERRUPT_LOWEST
146};
147
148struct i40e_lump_tracking {
149 u16 num_entries;
150 u16 search_hint;
151 u16 list[0];
152#define I40E_PILE_VALID_BIT 0x8000
153};
154
155#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 156#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
157#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 158#define I40E_FDIR_BUFFER_HEAD_ROOM 32
55a5e60b 159
433c47de
ASJ		 160enum i40e_fd_stat_idx {
161 I40E_FD_STAT_ATR,
162 I40E_FD_STAT_SB,
163 I40E_FD_STAT_PF_COUNT
164};
165#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
166#define I40E_FD_ATR_STAT_IDX(pf_id) \
167 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
168#define I40E_FD_SB_STAT_IDX(pf_id) \
169 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
170
17a73f6b
JG		 171struct i40e_fdir_filter {
172 struct hlist_node fdir_node;
173 /* filter ipnut set */
174 u8 flow_type;
175 u8 ip4_proto;
04b73bd7 176 /* TX packet view of src and dst */
17a73f6b
JG		 177 __be32 dst_ip[4];
178 __be32 src_ip[4];
179 __be16 src_port;
180 __be16 dst_port;
181 __be32 sctp_v_tag;
182 /* filter control */
7daa6bf3
JB		 183 u16 q_index;
184 u8 flex_off;
185 u8 pctype;
186 u16 dest_vsi;
187 u8 dest_ctl;
188 u8 fd_status;
189 u16 cnt_index;
190 u32 fd_id;
7daa6bf3
JB		 191};
192
4e3b35b0
NP		 193#define I40E_ETH_P_LLDP 0x88cc
194
7daa6bf3
JB		 195#define I40E_DCB_PRIO_TYPE_STRICT 0
196#define I40E_DCB_PRIO_TYPE_ETS 1
197#define I40E_DCB_STRICT_PRIO_CREDITS 127
198#define I40E_MAX_USER_PRIORITY 8
199/* DCB per TC information data structure */
200struct i40e_tc_info {
201 u16 qoffset; /* Queue offset from base queue */
202 u16 qcount; /* Total Queues */
203 u8 netdev_tc; /* Netdev TC index if netdev associated */
204};
205
206/* TC configuration data structure */
207struct i40e_tc_configuration {
208 u8 numtc; /* Total number of enabled TCs */
209 u8 enabled_tc; /* TC map */
210 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
211};
212
213/* struct that defines the Ethernet device */
214struct i40e_pf {
215 struct pci_dev *pdev;
216 struct i40e_hw hw;
217 unsigned long state;
218 unsigned long link_check_timeout;
219 struct msix_entry *msix_entries;
7daa6bf3
JB		 220 bool fc_autoneg_status;
221
222 u16 eeprom_version;
6c167f58 223 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 224 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
225 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
226 u16 num_req_vfs; /* num vfs requested for this vf */
227 u16 num_vf_qps; /* num queue pairs per vf */
7daa6bf3
JB		 228 u16 num_lan_qps; /* num lan queues this pf has set up */
229 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 230 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 231 u16 rss_size; /* num queues in the RSS array */
232 u16 rss_size_max; /* HW defined max RSS queues */
233 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 234 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 235 u8 atr_sample_rate;
8e2773ae 236 bool wol_en;
7daa6bf3 237
17a73f6b
JG		 238 struct hlist_head fdir_filter_list;
239 u16 fdir_pf_active_filters;
433c47de
ASJ		 240 u16 fd_sb_cnt_idx;
241 u16 fd_atr_cnt_idx;
17a73f6b 242
a1c9a9d9
JK		 243#ifdef CONFIG_I40E_VXLAN
244 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
245 u16 pending_vxlan_bitmap;
246
247#endif
7daa6bf3
JB		 248 enum i40e_interrupt_policy int_policy;
249 u16 rx_itr_default;
250 u16 tx_itr_default;
251 u16 msg_enable;
252 char misc_int_name[IFNAMSIZ + 9];
253 u16 adminq_work_limit; /* num of admin receive queue desc to process */
254 int service_timer_period;
255 struct timer_list service_timer;
256 struct work_struct service_task;
257
258 u64 flags;
259#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
260#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
261#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
262#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
263#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
264#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 265#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
266#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
267#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
268#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
269#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
270#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
271#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
272#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
273#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
274#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
275#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 276#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
277#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 278#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 279#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
280#ifdef CONFIG_I40E_VXLAN
281#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
282#endif
1f224ad2 283#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 284#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 285
61dade7e
ASJ		 286 /* tracks features that get auto disabled by errors */
287 u64 auto_disable_flags;
288
7daa6bf3
JB		 289 bool stat_offsets_loaded;
290 struct i40e_hw_port_stats stats;
291 struct i40e_hw_port_stats stats_offsets;
292 u32 tx_timeout_count;
293 u32 tx_timeout_recovery_level;
294 unsigned long tx_timeout_last_recovery;
295 u32 hw_csum_rx_error;
296 u32 led_status;
297 u16 corer_count; /* Core reset count */
298 u16 globr_count; /* Global reset count */
299 u16 empr_count; /* EMP reset count */
300 u16 pfr_count; /* PF reset count */
cd92e72f 301 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 302
303 struct mutex switch_mutex;
304 u16 lan_vsi; /* our default LAN VSI */
305 u16 lan_veb; /* initial relay, if exists */
306#define I40E_NO_VEB 0xffff
307#define I40E_NO_VSI 0xffff
308 u16 next_vsi; /* Next unallocated VSI - 0-based! */
309 struct i40e_vsi **vsi;
310 struct i40e_veb *veb[I40E_MAX_VEB];
311
312 struct i40e_lump_tracking *qp_pile;
313 struct i40e_lump_tracking *irq_pile;
314
315 /* switch config info */
316 u16 pf_seid;
317 u16 main_vsi_seid;
318 u16 mac_seid;
7daa6bf3
JB		 319 struct kobject *switch_kobj;
320#ifdef CONFIG_DEBUG_FS
321 struct dentry *i40e_dbg_pf;
322#endif /* CONFIG_DEBUG_FS */
323
93cd765b
ASJ		 324 u16 instance; /* A unique number per i40e_pf instance in the system */
325
7daa6bf3
JB		 326 /* sr-iov config info */
327 struct i40e_vf *vf;
328 int num_alloc_vfs; /* actual number of VFs allocated */
329 u32 vf_aq_requests;
330
331 /* DCBx/DCBNL capability for PF that indicates
332 * whether DCBx is managed by firmware or host
333 * based agent (LLDPAD). Also, indicates what
334 * flavor of DCBx protocol (IEEE/CEE) is supported
335 * by the device. For now we're supporting IEEE
336 * mode only.
337 */
338 u16 dcbx_cap;
339
340 u32 fcoe_hmc_filt_num;
341 u32 fcoe_hmc_cntx_num;
342 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 343
344 struct ptp_clock *ptp_clock;
345 struct ptp_clock_info ptp_caps;
346 struct sk_buff *ptp_tx_skb;
beb0dff1 347 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 348 unsigned long last_rx_ptp_check;
349 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
350 u64 ptp_base_adj;
351 u32 tx_hwtstamp_timeouts;
352 u32 rx_hwtstamp_cleared;
353 bool ptp_tx;
354 bool ptp_rx;
e157ea30 355 u16 rss_table_size;
7daa6bf3
JB		 356};
357
358struct i40e_mac_filter {
359 struct list_head list;
360 u8 macaddr[ETH_ALEN];
361#define I40E_VLAN_ANY -1
362 s16 vlan;
363 u8 counter; /* number of instances of this filter */
364 bool is_vf; /* filter belongs to a VF */
365 bool is_netdev; /* filter belongs to a netdev */
366 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 367 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 368};
369
370struct i40e_veb {
371 struct i40e_pf *pf;
372 u16 idx;
373 u16 veb_idx; /* index of VEB parent */
374 u16 seid;
375 u16 uplink_seid;
376 u16 stats_idx; /* index of VEB parent */
377 u8 enabled_tc;
378 u16 flags;
379 u16 bw_limit;
380 u8 bw_max_quanta;
381 bool is_abs_credits;
382 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
383 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
384 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
385 struct kobject *kobj;
386 bool stat_offsets_loaded;
387 struct i40e_eth_stats stats;
388 struct i40e_eth_stats stats_offsets;
389};
390
391/* struct that defines a VSI, associated with a dev */
392struct i40e_vsi {
393 struct net_device *netdev;
394 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
395 bool netdev_registered;
396 bool stat_offsets_loaded;
397
398 u32 current_netdev_flags;
399 unsigned long state;
400#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
401#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
402 unsigned long flags;
403
404 struct list_head mac_filter_list;
405
406 /* VSI stats */
407 struct rtnl_link_stats64 net_stats;
408 struct rtnl_link_stats64 net_stats_offsets;
409 struct i40e_eth_stats eth_stats;
410 struct i40e_eth_stats eth_stats_offsets;
411 u32 tx_restart;
412 u32 tx_busy;
413 u32 rx_buf_failed;
414 u32 rx_page_failed;
415
9f65e15b
AD		 416 /* These are containers of ring pointers, allocated at run-time */
417 struct i40e_ring **rx_rings;
418 struct i40e_ring **tx_rings;
7daa6bf3
JB		 419
420 u16 work_limit;
421 /* high bit set means dynamic, use accessor routines to read/write.
422 * hardware only supports 2us resolution for the ITR registers.
423 * these values always store the USER setting, and must be converted
424 * before programming to a register.
425 */
426 u16 rx_itr_setting;
427 u16 tx_itr_setting;
428
429 u16 max_frame;
430 u16 rx_hdr_len;
431 u16 rx_buf_len;
432 u8 dtype;
433
434 /* List of q_vectors allocated to this VSI */
493fb300 435 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 436 int num_q_vectors;
437 int base_vector;
63741846 438 bool irqs_ready;
7daa6bf3
JB		 439
440 u16 seid; /* HW index of this VSI (absolute index) */
441 u16 id; /* VSI number */
442 u16 uplink_seid;
443
444 u16 base_queue; /* vsi's first queue in hw array */
445 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
446 u16 num_queue_pairs; /* Used tx and rx pairs */
447 u16 num_desc;
448 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
449 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
450
451 struct i40e_tc_configuration tc_config;
452 struct i40e_aqc_vsi_properties_data info;
453
454 /* VSI BW limit (absolute across all TCs) */
455 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
456 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
457
458 /* Relative TC credits across VSIs */
459 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
460 /* TC BW limit credits within VSI */
461 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
462 /* TC BW limit max quanta within VSI */
463 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
464
465 struct i40e_pf *back; /* Backreference to associated PF */
466 u16 idx; /* index in pf->vsi[] */
467 u16 veb_idx; /* index of VEB parent */
468 struct kobject *kobj; /* sysfs object */
469
470 /* VSI specific handlers */
471 irqreturn_t (*irq_handler)(int irq, void *data);
472} ____cacheline_internodealigned_in_smp;
473
474struct i40e_netdev_priv {
475 struct i40e_vsi *vsi;
476};
477
478/* struct that defines an interrupt vector */
479struct i40e_q_vector {
480 struct i40e_vsi *vsi;
481
482 u16 v_idx; /* index in the vsi->q_vector array. */
483 u16 reg_idx; /* register index of the interrupt */
484
485 struct napi_struct napi;
486
487 struct i40e_ring_container rx;
488 struct i40e_ring_container tx;
489
490 u8 num_ringpairs; /* total number of ring pairs in vector */
491
7daa6bf3 492 cpumask_t affinity_mask;
493fb300
AD		 493 struct rcu_head rcu; /* to avoid race with update stats on free */
494 char name[IFNAMSIZ + 9];
7daa6bf3
JB		 495} ____cacheline_internodealigned_in_smp;
496
497/* lan device */
498struct i40e_device {
499 struct list_head list;
500 struct i40e_pf *pf;
501};
502
503/**
504 * i40e_fw_version_str - format the FW and NVM version strings
505 * @hw: ptr to the hardware info
506 **/
507static inline char *i40e_fw_version_str(struct i40e_hw *hw)
508{
509 static char buf[32];
510
511 snprintf(buf, sizeof(buf),
fe310704 512 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 513 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
514 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 515 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
516 I40E_NVM_VERSION_HI_SHIFT,
517 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
518 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 519 hw->nvm.eetrack);
520
521 return buf;
522}
523
524/**
525 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
526 * @netdev: the corresponding netdev
527 *
528 * Return the PF struct for the given netdev
529 **/
530static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
531{
532 struct i40e_netdev_priv *np = netdev_priv(netdev);
533 struct i40e_vsi *vsi = np->vsi;
534
535 return vsi->back;
536}
537
538static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
539 irqreturn_t (*irq_handler)(int, void *))
540{
541 vsi->irq_handler = irq_handler;
542}
543
544/**
545 * i40e_rx_is_programming_status - check for programming status descriptor
546 * @qw: the first quad word of the program status descriptor
547 *
548 * The value of in the descriptor length field indicate if this
549 * is a programming status descriptor for flow director or FCoE
550 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
551 * it is a packet descriptor.
552 **/
553static inline bool i40e_rx_is_programming_status(u64 qw)
554{
555 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
556 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
557}
558
082def10
ASJ		 559/**
560 * i40e_get_fd_cnt_all - get the total FD filter space available
561 * @pf: pointer to the pf struct
562 **/
563static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
564{
565 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
566}
567
7daa6bf3
JB		 568/* needed by i40e_ethtool.c */
569int i40e_up(struct i40e_vsi *vsi);
570void i40e_down(struct i40e_vsi *vsi);
571extern const char i40e_driver_name[];
572extern const char i40e_driver_version_str[];
23326186 573void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 574void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
575void i40e_update_stats(struct i40e_vsi *vsi);
576void i40e_update_eth_stats(struct i40e_vsi *vsi);
577struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
578int i40e_fetch_switch_configuration(struct i40e_pf *pf,
579 bool printconfig);
580
17a73f6b 581int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 582 struct i40e_pf *pf, bool add);
17a73f6b
JG		 583int i40e_add_del_fdir(struct i40e_vsi *vsi,
584 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 585void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
586int i40e_get_current_fd_count(struct i40e_pf *pf);
12957388 587int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
7c3c288b 588bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 589void i40e_set_ethtool_ops(struct net_device *netdev);
590struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
591 u8 *macaddr, s16 vlan,
592 bool is_vf, bool is_netdev);
593void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
594 bool is_vf, bool is_netdev);
595int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
596struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
597 u16 uplink, u32 param1);
598int i40e_vsi_release(struct i40e_vsi *vsi);
599struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
600 struct i40e_vsi *start_vsi);
fc18eaa0 601int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 602int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 603struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
604 u16 downlink_seid, u8 enabled_tc);
605void i40e_veb_release(struct i40e_veb *veb);
606
4e3b35b0 607int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 608i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
609void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
610void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
611void i40e_pf_reset_stats(struct i40e_pf *pf);
612#ifdef CONFIG_DEBUG_FS
613void i40e_dbg_pf_init(struct i40e_pf *pf);
614void i40e_dbg_pf_exit(struct i40e_pf *pf);
615void i40e_dbg_init(void);
616void i40e_dbg_exit(void);
617#else
618static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
619static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
620static inline void i40e_dbg_init(void) {}
621static inline void i40e_dbg_exit(void) {}
622#endif /* CONFIG_DEBUG_FS*/
623void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 624void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 625void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 626void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
7daa6bf3 627int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
6c167f58 628int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 629void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
630int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
631int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
632struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
633 bool is_vf, bool is_netdev);
634bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
635struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
636 bool is_vf, bool is_netdev);
637void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 638#ifdef CONFIG_I40E_DCB
639void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
640 struct i40e_dcbx_config *new_cfg);
641void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
642void i40e_dcbnl_setup(struct i40e_vsi *vsi);
643bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
644 struct i40e_dcbx_config *old_cfg,
645 struct i40e_dcbx_config *new_cfg);
646#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 647void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
648void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
649void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
650void i40e_ptp_set_increment(struct i40e_pf *pf);
651int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
652int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
653void i40e_ptp_init(struct i40e_pf *pf);
654void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 655#endif /* _I40E_H_ */
Linux kernel - Deliverables
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