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i40e: Fix multiple link up messages
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB		 40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
7daa6bf3
JB		 49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
51616018 53#include <linux/if_bridge.h>
beb0dff1
JK		 54#include <linux/clocksource.h>
55#include <linux/net_tstamp.h>
56#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 57#include "i40e_type.h"
58#include "i40e_prototype.h"
38e00438
VD		 59#ifdef I40E_FCOE
60#include "i40e_fcoe.h"
61#endif
7daa6bf3
JB		 62#include "i40e_virtchnl.h"
63#include "i40e_virtchnl_pf.h"
64#include "i40e_txrx.h"
4e3b35b0 65#include "i40e_dcb.h"
7daa6bf3
JB		 66
67/* Useful i40e defaults */
68#define I40E_BASE_PF_SEID 16
69#define I40E_BASE_VSI_SEID 512
70#define I40E_BASE_VEB_SEID 288
71#define I40E_MAX_VEB 16
72
73#define I40E_MAX_NUM_DESCRIPTORS 4096
232f4706 74#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
7daa6bf3
JB		 75#define I40E_DEFAULT_NUM_DESCRIPTORS 512
76#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
77#define I40E_MIN_NUM_DESCRIPTORS 64
78#define I40E_MIN_MSIX 2
79#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 80#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
e25d00b8
ASJ		 81/* max 16 qps */
82#define i40e_default_queues_per_vmdq(pf) \
83 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)
7daa6bf3
JB		 84#define I40E_DEFAULT_QUEUES_PER_VF 4
85#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
e25d00b8
ASJ		 86#define i40e_pf_get_max_q_per_tc(pf) \
87 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)
7daa6bf3
JB		 88#define I40E_FDIR_RING 0
89#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 90#ifdef I40E_FCOE
91#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
92#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
93#endif /* I40E_FCOE */
7daa6bf3 94#define I40E_MAX_AQ_BUF_SIZE 4096
07574897
MW		 95#define I40E_AQ_LEN 256
96#define I40E_AQ_WORK_LIMIT 32
7daa6bf3
JB		 97#define I40E_MAX_USER_PRIORITY 8
98#define I40E_DEFAULT_MSG_ENABLE 4
23527308 99#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
fba52e21 100#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
7daa6bf3 101
7e45ab44 102/* Ethtool Private Flags */
41a1d04b 103#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
7e45ab44 104
7daa6bf3 105#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 106#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 107#define I40E_NVM_VERSION_HI_SHIFT 12
108#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 109
110/* The values in here are decimal coded as hex as is the case in the NVM map*/
111#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 112#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 113
7daa6bf3
JB		 114/* magic for getting defines into strings */
115#define STRINGIFY(foo) #foo
116#define XSTRINGIFY(bar) STRINGIFY(bar)
117
7daa6bf3
JB		 118#define I40E_RX_DESC(R, i) \
119 ((ring_is_16byte_desc_enabled(R)) \
120 ? (union i40e_32byte_rx_desc *) \
121 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
122 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
123#define I40E_TX_DESC(R, i) \
124 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
125#define I40E_TX_CTXTDESC(R, i) \
126 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
127#define I40E_TX_FDIRDESC(R, i) \
128 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
129
130/* default to trying for four seconds */
131#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
132
133/* driver state flags */
134enum i40e_state_t {
135 __I40E_TESTING,
136 __I40E_CONFIG_BUSY,
137 __I40E_CONFIG_DONE,
138 __I40E_DOWN,
139 __I40E_NEEDS_RESTART,
140 __I40E_SERVICE_SCHED,
141 __I40E_ADMINQ_EVENT_PENDING,
142 __I40E_MDD_EVENT_PENDING,
143 __I40E_VFLR_EVENT_PENDING,
144 __I40E_RESET_RECOVERY_PENDING,
145 __I40E_RESET_INTR_RECEIVED,
146 __I40E_REINIT_REQUESTED,
147 __I40E_PF_RESET_REQUESTED,
148 __I40E_CORE_RESET_REQUESTED,
149 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 150 __I40E_EMP_RESET_REQUESTED,
9df42d1a 151 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 152 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 153 __I40E_SUSPENDED,
9ce34f02 154 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 155 __I40E_BAD_EEPROM,
b5d06f05 156 __I40E_DOWN_REQUESTED,
1e1be8f6 157 __I40E_FD_FLUSH_REQUESTED,
a316f651 158 __I40E_RESET_FAILED,
69129dc3 159 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 160 __I40E_VF_DISABLE,
7daa6bf3
JB		 161};
162
163enum i40e_interrupt_policy {
164 I40E_INTERRUPT_BEST_CASE,
165 I40E_INTERRUPT_MEDIUM,
166 I40E_INTERRUPT_LOWEST
167};
168
169struct i40e_lump_tracking {
170 u16 num_entries;
171 u16 search_hint;
172 u16 list[0];
173#define I40E_PILE_VALID_BIT 0x8000
174};
175
176#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 177#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
178#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 179#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 180#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 181
b29e13bb
MW		 182#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
183
433c47de
ASJ		 184enum i40e_fd_stat_idx {
185 I40E_FD_STAT_ATR,
186 I40E_FD_STAT_SB,
60ccd45c 187 I40E_FD_STAT_ATR_TUNNEL,
433c47de
ASJ		 188 I40E_FD_STAT_PF_COUNT
189};
190#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
191#define I40E_FD_ATR_STAT_IDX(pf_id) \
192 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
193#define I40E_FD_SB_STAT_IDX(pf_id) \
194 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
60ccd45c
ASJ		 195#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
196 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
433c47de 197
17a73f6b
JG		 198struct i40e_fdir_filter {
199 struct hlist_node fdir_node;
200 /* filter ipnut set */
201 u8 flow_type;
202 u8 ip4_proto;
04b73bd7 203 /* TX packet view of src and dst */
17a73f6b
JG		 204 __be32 dst_ip[4];
205 __be32 src_ip[4];
206 __be16 src_port;
207 __be16 dst_port;
208 __be32 sctp_v_tag;
209 /* filter control */
7daa6bf3
JB		 210 u16 q_index;
211 u8 flex_off;
212 u8 pctype;
213 u16 dest_vsi;
214 u8 dest_ctl;
215 u8 fd_status;
216 u16 cnt_index;
217 u32 fd_id;
7daa6bf3
JB		 218};
219
4e3b35b0
NP		 220#define I40E_ETH_P_LLDP 0x88cc
221
7daa6bf3
JB		 222#define I40E_DCB_PRIO_TYPE_STRICT 0
223#define I40E_DCB_PRIO_TYPE_ETS 1
224#define I40E_DCB_STRICT_PRIO_CREDITS 127
225#define I40E_MAX_USER_PRIORITY 8
226/* DCB per TC information data structure */
227struct i40e_tc_info {
228 u16 qoffset; /* Queue offset from base queue */
229 u16 qcount; /* Total Queues */
230 u8 netdev_tc; /* Netdev TC index if netdev associated */
231};
232
233/* TC configuration data structure */
234struct i40e_tc_configuration {
235 u8 numtc; /* Total number of enabled TCs */
236 u8 enabled_tc; /* TC map */
237 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
238};
239
240/* struct that defines the Ethernet device */
241struct i40e_pf {
242 struct pci_dev *pdev;
243 struct i40e_hw hw;
244 unsigned long state;
7daa6bf3 245 struct msix_entry *msix_entries;
7daa6bf3
JB		 246 bool fc_autoneg_status;
247
248 u16 eeprom_version;
b40c82e6 249 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
7daa6bf3
JB		 250 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
251 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
b40c82e6
JK		 252 u16 num_req_vfs; /* num VFs requested for this VF */
253 u16 num_vf_qps; /* num queue pairs per VF */
38e00438 254#ifdef I40E_FCOE
b40c82e6 255 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
38e00438
VD		 256 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
257#endif /* I40E_FCOE */
b40c82e6
JK		 258 u16 num_lan_qps; /* num lan queues this PF has set up */
259 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
f8ff1464 260 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 261 u16 rss_size; /* num queues in the RSS array */
262 u16 rss_size_max; /* HW defined max RSS queues */
263 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 264 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 265 u8 atr_sample_rate;
8e2773ae 266 bool wol_en;
7daa6bf3 267
17a73f6b
JG		 268 struct hlist_head fdir_filter_list;
269 u16 fdir_pf_active_filters;
1e1be8f6 270 unsigned long fd_flush_timestamp;
60793f4a 271 u32 fd_flush_cnt;
1e1be8f6
ASJ		 272 u32 fd_add_err;
273 u32 fd_atr_cnt;
274 u32 fd_tcp_rule;
17a73f6b 275
a1c9a9d9
JK		 276#ifdef CONFIG_I40E_VXLAN
277 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
278 u16 pending_vxlan_bitmap;
279
280#endif
7daa6bf3
JB		 281 enum i40e_interrupt_policy int_policy;
282 u16 rx_itr_default;
283 u16 tx_itr_default;
71e6163a 284 u32 msg_enable;
b294ac70 285 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 286 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 287 unsigned long service_timer_period;
288 unsigned long service_timer_previous;
7daa6bf3
JB		 289 struct timer_list service_timer;
290 struct work_struct service_task;
291
292 u64 flags;
41a1d04b
JB		 293#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
294#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
295#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
296#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
297#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
298#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
299#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
300#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
301#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
d502ce01 302#define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
38e00438 303#ifdef I40E_FCOE
41a1d04b 304#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
38e00438 305#endif /* I40E_FCOE */
41a1d04b
JB		 306#define I40E_FLAG_IN_NETPOLL BIT_ULL(12)
307#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
308#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
309#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
310#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
311#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
312#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
313#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
314#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
315#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
316#define I40E_FLAG_PTP BIT_ULL(25)
317#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
a1c9a9d9 318#ifdef CONFIG_I40E_VXLAN
41a1d04b 319#define I40E_FLAG_VXLAN_FILTER_SYNC BIT_ULL(27)
a1c9a9d9 320#endif
41a1d04b
JB		 321#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
322#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
d502ce01
ASJ		 323#define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31)
324#define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32)
325#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33)
326#define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34)
327#define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35)
d1a8d275 328#define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37)
d502ce01 329#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38)
fc60861e 330#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
7daa6bf3 331
61dade7e
ASJ		 332 /* tracks features that get auto disabled by errors */
333 u64 auto_disable_flags;
334
38e00438
VD		 335#ifdef I40E_FCOE
336 struct i40e_fcoe fcoe;
337
338#endif /* I40E_FCOE */
7daa6bf3
JB		 339 bool stat_offsets_loaded;
340 struct i40e_hw_port_stats stats;
341 struct i40e_hw_port_stats stats_offsets;
342 u32 tx_timeout_count;
343 u32 tx_timeout_recovery_level;
344 unsigned long tx_timeout_last_recovery;
810b3ae4 345 u32 tx_sluggish_count;
7daa6bf3
JB		 346 u32 hw_csum_rx_error;
347 u32 led_status;
348 u16 corer_count; /* Core reset count */
349 u16 globr_count; /* Global reset count */
350 u16 empr_count; /* EMP reset count */
351 u16 pfr_count; /* PF reset count */
cd92e72f 352 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 353
354 struct mutex switch_mutex;
355 u16 lan_vsi; /* our default LAN VSI */
356 u16 lan_veb; /* initial relay, if exists */
357#define I40E_NO_VEB 0xffff
358#define I40E_NO_VSI 0xffff
359 u16 next_vsi; /* Next unallocated VSI - 0-based! */
360 struct i40e_vsi **vsi;
361 struct i40e_veb *veb[I40E_MAX_VEB];
362
363 struct i40e_lump_tracking *qp_pile;
364 struct i40e_lump_tracking *irq_pile;
365
366 /* switch config info */
367 u16 pf_seid;
368 u16 main_vsi_seid;
369 u16 mac_seid;
7daa6bf3
JB		 370 struct kobject *switch_kobj;
371#ifdef CONFIG_DEBUG_FS
372 struct dentry *i40e_dbg_pf;
373#endif /* CONFIG_DEBUG_FS */
92faef85 374 bool cur_promisc;
7daa6bf3 375
93cd765b
ASJ		 376 u16 instance; /* A unique number per i40e_pf instance in the system */
377
7daa6bf3
JB		 378 /* sr-iov config info */
379 struct i40e_vf *vf;
380 int num_alloc_vfs; /* actual number of VFs allocated */
381 u32 vf_aq_requests;
382
383 /* DCBx/DCBNL capability for PF that indicates
384 * whether DCBx is managed by firmware or host
385 * based agent (LLDPAD). Also, indicates what
386 * flavor of DCBx protocol (IEEE/CEE) is supported
387 * by the device. For now we're supporting IEEE
388 * mode only.
389 */
390 u16 dcbx_cap;
391
392 u32 fcoe_hmc_filt_num;
393 u32 fcoe_hmc_cntx_num;
394 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 395
396 struct ptp_clock *ptp_clock;
397 struct ptp_clock_info ptp_caps;
398 struct sk_buff *ptp_tx_skb;
beb0dff1 399 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 400 unsigned long last_rx_ptp_check;
401 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
402 u64 ptp_base_adj;
403 u32 tx_hwtstamp_timeouts;
404 u32 rx_hwtstamp_cleared;
405 bool ptp_tx;
406 bool ptp_rx;
e157ea30 407 u16 rss_table_size;
f4492db1
GR		 408 /* These are only valid in NPAR modes */
409 u32 npar_max_bw;
410 u32 npar_min_bw;
2ac8b675
SN		 411
412 u32 ioremap_len;
3487b6c3 413 u32 fd_inv;
7daa6bf3
JB		 414};
415
416struct i40e_mac_filter {
417 struct list_head list;
418 u8 macaddr[ETH_ALEN];
419#define I40E_VLAN_ANY -1
420 s16 vlan;
421 u8 counter; /* number of instances of this filter */
422 bool is_vf; /* filter belongs to a VF */
423 bool is_netdev; /* filter belongs to a netdev */
424 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 425 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 426};
427
428struct i40e_veb {
429 struct i40e_pf *pf;
430 u16 idx;
431 u16 veb_idx; /* index of VEB parent */
432 u16 seid;
433 u16 uplink_seid;
434 u16 stats_idx; /* index of VEB parent */
435 u8 enabled_tc;
51616018 436 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB		 437 u16 flags;
438 u16 bw_limit;
439 u8 bw_max_quanta;
440 bool is_abs_credits;
441 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
442 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
443 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
444 struct kobject *kobj;
445 bool stat_offsets_loaded;
446 struct i40e_eth_stats stats;
447 struct i40e_eth_stats stats_offsets;
fe860afb
NP		 448 struct i40e_veb_tc_stats tc_stats;
449 struct i40e_veb_tc_stats tc_stats_offsets;
7daa6bf3
JB		 450};
451
452/* struct that defines a VSI, associated with a dev */
453struct i40e_vsi {
454 struct net_device *netdev;
455 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
456 bool netdev_registered;
457 bool stat_offsets_loaded;
458
459 u32 current_netdev_flags;
460 unsigned long state;
41a1d04b
JB		 461#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
462#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
7daa6bf3
JB		 463 unsigned long flags;
464
465 struct list_head mac_filter_list;
466
467 /* VSI stats */
468 struct rtnl_link_stats64 net_stats;
469 struct rtnl_link_stats64 net_stats_offsets;
470 struct i40e_eth_stats eth_stats;
471 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 472#ifdef I40E_FCOE
473 struct i40e_fcoe_stats fcoe_stats;
474 struct i40e_fcoe_stats fcoe_stats_offsets;
475 bool fcoe_stat_offsets_loaded;
476#endif
7daa6bf3
JB		 477 u32 tx_restart;
478 u32 tx_busy;
2fc3d715 479 u64 tx_linearize;
7daa6bf3
JB		 480 u32 rx_buf_failed;
481 u32 rx_page_failed;
482
9f65e15b
AD		 483 /* These are containers of ring pointers, allocated at run-time */
484 struct i40e_ring **rx_rings;
485 struct i40e_ring **tx_rings;
7daa6bf3
JB		 486
487 u16 work_limit;
488 /* high bit set means dynamic, use accessor routines to read/write.
489 * hardware only supports 2us resolution for the ITR registers.
490 * these values always store the USER setting, and must be converted
491 * before programming to a register.
492 */
493 u16 rx_itr_setting;
494 u16 tx_itr_setting;
495
5db4cb59 496 u16 rss_table_size;
66ddcffb 497 u16 rss_size;
5db4cb59 498
7daa6bf3
JB		 499 u16 max_frame;
500 u16 rx_hdr_len;
501 u16 rx_buf_len;
502 u8 dtype;
503
504 /* List of q_vectors allocated to this VSI */
493fb300 505 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 506 int num_q_vectors;
507 int base_vector;
63741846 508 bool irqs_ready;
7daa6bf3
JB		 509
510 u16 seid; /* HW index of this VSI (absolute index) */
511 u16 id; /* VSI number */
512 u16 uplink_seid;
513
514 u16 base_queue; /* vsi's first queue in hw array */
515 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 516 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB		 517 u16 num_queue_pairs; /* Used tx and rx pairs */
518 u16 num_desc;
519 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
520 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
521
522 struct i40e_tc_configuration tc_config;
523 struct i40e_aqc_vsi_properties_data info;
524
525 /* VSI BW limit (absolute across all TCs) */
526 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
527 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
528
529 /* Relative TC credits across VSIs */
530 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
531 /* TC BW limit credits within VSI */
532 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
533 /* TC BW limit max quanta within VSI */
534 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
535
536 struct i40e_pf *back; /* Backreference to associated PF */
537 u16 idx; /* index in pf->vsi[] */
538 u16 veb_idx; /* index of VEB parent */
539 struct kobject *kobj; /* sysfs object */
c156f856 540 bool current_isup; /* Sync 'link up' logging */
7daa6bf3
JB		 541
542 /* VSI specific handlers */
543 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW		 544
545 /* current rxnfc data */
546 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB		 547} ____cacheline_internodealigned_in_smp;
548
549struct i40e_netdev_priv {
550 struct i40e_vsi *vsi;
551};
552
553/* struct that defines an interrupt vector */
554struct i40e_q_vector {
555 struct i40e_vsi *vsi;
556
557 u16 v_idx; /* index in the vsi->q_vector array. */
558 u16 reg_idx; /* register index of the interrupt */
559
560 struct napi_struct napi;
561
562 struct i40e_ring_container rx;
563 struct i40e_ring_container tx;
564
565 u8 num_ringpairs; /* total number of ring pairs in vector */
566
7daa6bf3 567 cpumask_t affinity_mask;
493fb300 568 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 569 char name[I40E_INT_NAME_STR_LEN];
8e0764b4 570 bool arm_wb_state;
7daa6bf3
JB		 571} ____cacheline_internodealigned_in_smp;
572
573/* lan device */
574struct i40e_device {
575 struct list_head list;
576 struct i40e_pf *pf;
577};
578
579/**
580 * i40e_fw_version_str - format the FW and NVM version strings
581 * @hw: ptr to the hardware info
582 **/
583static inline char *i40e_fw_version_str(struct i40e_hw *hw)
584{
585 static char buf[32];
586
587 snprintf(buf, sizeof(buf),
7edf810c
SN		 588 "f%d.%d.%05d a%d.%d n%x.%02x e%x",
589 hw->aq.fw_maj_ver, hw->aq.fw_min_ver, hw->aq.fw_build,
7daa6bf3 590 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 591 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
592 I40E_NVM_VERSION_HI_SHIFT,
593 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
594 I40E_NVM_VERSION_LO_SHIFT,
7edf810c 595 (hw->nvm.eetrack & 0xffffff));
7daa6bf3
JB		 596
597 return buf;
598}
599
600/**
601 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
602 * @netdev: the corresponding netdev
603 *
604 * Return the PF struct for the given netdev
605 **/
606static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
607{
608 struct i40e_netdev_priv *np = netdev_priv(netdev);
609 struct i40e_vsi *vsi = np->vsi;
610
611 return vsi->back;
612}
613
614static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
615 irqreturn_t (*irq_handler)(int, void *))
616{
617 vsi->irq_handler = irq_handler;
618}
619
620/**
621 * i40e_rx_is_programming_status - check for programming status descriptor
622 * @qw: the first quad word of the program status descriptor
623 *
624 * The value of in the descriptor length field indicate if this
625 * is a programming status descriptor for flow director or FCoE
626 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
627 * it is a packet descriptor.
628 **/
629static inline bool i40e_rx_is_programming_status(u64 qw)
630{
631 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
632 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
633}
634
082def10
ASJ		 635/**
636 * i40e_get_fd_cnt_all - get the total FD filter space available
b40c82e6 637 * @pf: pointer to the PF struct
082def10
ASJ		 638 **/
639static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
640{
641 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
642}
643
7daa6bf3
JB		 644/* needed by i40e_ethtool.c */
645int i40e_up(struct i40e_vsi *vsi);
646void i40e_down(struct i40e_vsi *vsi);
647extern const char i40e_driver_name[];
648extern const char i40e_driver_version_str[];
23326186 649void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3 650void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
fdf0e0bf 651struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
7daa6bf3
JB		 652void i40e_update_stats(struct i40e_vsi *vsi);
653void i40e_update_eth_stats(struct i40e_vsi *vsi);
654struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
655int i40e_fetch_switch_configuration(struct i40e_pf *pf,
656 bool printconfig);
657
17a73f6b 658int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 659 struct i40e_pf *pf, bool add);
17a73f6b
JG		 660int i40e_add_del_fdir(struct i40e_vsi *vsi,
661 struct i40e_fdir_filter *input, bool add);
55a5e60b 662void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ		 663u32 i40e_get_current_fd_count(struct i40e_pf *pf);
664u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
665u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
666u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 667bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 668void i40e_set_ethtool_ops(struct net_device *netdev);
669struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
670 u8 *macaddr, s16 vlan,
671 bool is_vf, bool is_netdev);
672void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
673 bool is_vf, bool is_netdev);
30e2561b 674int i40e_sync_vsi_filters(struct i40e_vsi *vsi, bool grab_rtnl);
7daa6bf3
JB		 675struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
676 u16 uplink, u32 param1);
677int i40e_vsi_release(struct i40e_vsi *vsi);
678struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
679 struct i40e_vsi *start_vsi);
38e00438
VD		 680#ifdef I40E_FCOE
681void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
682 struct i40e_vsi_context *ctxt,
683 u8 enabled_tc, bool is_add);
684#endif
fc18eaa0 685int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 686int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 687struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
688 u16 downlink_seid, u8 enabled_tc);
689void i40e_veb_release(struct i40e_veb *veb);
690
4e3b35b0 691int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 692i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
693void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
694void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
695void i40e_pf_reset_stats(struct i40e_pf *pf);
696#ifdef CONFIG_DEBUG_FS
697void i40e_dbg_pf_init(struct i40e_pf *pf);
698void i40e_dbg_pf_exit(struct i40e_pf *pf);
699void i40e_dbg_init(void);
700void i40e_dbg_exit(void);
701#else
702static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
703static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
704static inline void i40e_dbg_init(void) {}
705static inline void i40e_dbg_exit(void) {}
706#endif /* CONFIG_DEBUG_FS*/
02d109be
JB		 707/**
708 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
709 * @vsi: pointer to a vsi
710 * @vector: enable a particular Hw Interrupt vector, without base_vector
711 **/
712static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
713{
714 struct i40e_pf *pf = vsi->back;
715 struct i40e_hw *hw = &pf->hw;
716 u32 val;
717
718 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
719 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
720 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
721 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
722 /* skip the flush */
723}
724
5c2cebda 725void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 726void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 727void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 728#ifdef I40E_FCOE
729struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
730 struct net_device *netdev,
731 struct rtnl_link_stats64 *storage);
732int i40e_set_mac(struct net_device *netdev, void *p);
733void i40e_set_rx_mode(struct net_device *netdev);
734#endif
7daa6bf3 735int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 736#ifdef I40E_FCOE
737void i40e_tx_timeout(struct net_device *netdev);
738int i40e_vlan_rx_add_vid(struct net_device *netdev,
739 __always_unused __be16 proto, u16 vid);
740int i40e_vlan_rx_kill_vid(struct net_device *netdev,
741 __always_unused __be16 proto, u16 vid);
742#endif
96664483 743int i40e_open(struct net_device *netdev);
6c167f58 744int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 745void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
746int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
747int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
748struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
749 bool is_vf, bool is_netdev);
750bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
751struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
752 bool is_vf, bool is_netdev);
38e00438 753#ifdef I40E_FCOE
38e00438
VD		 754int i40e_close(struct net_device *netdev);
755int i40e_setup_tc(struct net_device *netdev, u8 tc);
756void i40e_netpoll(struct net_device *netdev);
757int i40e_fcoe_enable(struct net_device *netdev);
758int i40e_fcoe_disable(struct net_device *netdev);
759int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
760u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
761void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
762void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
21364bcf 763void i40e_init_pf_fcoe(struct i40e_pf *pf);
38e00438
VD		 764int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
765void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
766int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
767 union i40e_rx_desc *rx_desc,
768 struct sk_buff *skb);
769void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
770 union i40e_rx_desc *rx_desc, u8 prog_id);
771#endif /* I40E_FCOE */
7daa6bf3 772void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 773#ifdef CONFIG_I40E_DCB
774void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 775 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP		 776 struct i40e_dcbx_config *new_cfg);
777void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
778void i40e_dcbnl_setup(struct i40e_vsi *vsi);
779bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
780 struct i40e_dcbx_config *old_cfg,
781 struct i40e_dcbx_config *new_cfg);
782#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 783void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
784void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
785void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
786void i40e_ptp_set_increment(struct i40e_pf *pf);
787int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
788int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
789void i40e_ptp_init(struct i40e_pf *pf);
790void i40e_ptp_stop(struct i40e_pf *pf);
51616018 791int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR		 792i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
793i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
794i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
c156f856 795void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
7daa6bf3 796#endif /* _I40E_H_ */
Linux kernel - Deliverables
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