projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
i40e: debugfs fix to dump remote LLDPDU
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
57#include "i40e_virtchnl.h"
58#include "i40e_virtchnl_pf.h"
59#include "i40e_txrx.h"
4e3b35b0 60#include "i40e_dcb.h"
7daa6bf3
JB		 61
62/* Useful i40e defaults */
63#define I40E_BASE_PF_SEID 16
64#define I40E_BASE_VSI_SEID 512
65#define I40E_BASE_VEB_SEID 288
66#define I40E_MAX_VEB 16
67
68#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 69#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 70#define I40E_DEFAULT_NUM_DESCRIPTORS 512
71#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
72#define I40E_MIN_NUM_DESCRIPTORS 64
73#define I40E_MIN_MSIX 2
74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 75#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 76#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
77#define I40E_DEFAULT_QUEUES_PER_VF 4
78#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 79#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 80#define I40E_FDIR_RING 0
81#define I40E_FDIR_RING_COUNT 32
82#define I40E_MAX_AQ_BUF_SIZE 4096
83#define I40E_AQ_LEN 32
84#define I40E_AQ_WORK_LIMIT 16
85#define I40E_MAX_USER_PRIORITY 8
86#define I40E_DEFAULT_MSG_ENABLE 4
23527308 87#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
7daa6bf3
JB		 88
89#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 90#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 91#define I40E_NVM_VERSION_HI_SHIFT 12
92#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 93
94/* The values in here are decimal coded as hex as is the case in the NVM map*/
95#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 96#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 97
7daa6bf3
JB		 98/* magic for getting defines into strings */
99#define STRINGIFY(foo) #foo
100#define XSTRINGIFY(bar) STRINGIFY(bar)
101
7daa6bf3
JB		 102#define I40E_RX_DESC(R, i) \
103 ((ring_is_16byte_desc_enabled(R)) \
104 ? (union i40e_32byte_rx_desc *) \
105 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
106 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
107#define I40E_TX_DESC(R, i) \
108 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
109#define I40E_TX_CTXTDESC(R, i) \
110 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
111#define I40E_TX_FDIRDESC(R, i) \
112 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
113
114/* default to trying for four seconds */
115#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
116
117/* driver state flags */
118enum i40e_state_t {
119 __I40E_TESTING,
120 __I40E_CONFIG_BUSY,
121 __I40E_CONFIG_DONE,
122 __I40E_DOWN,
123 __I40E_NEEDS_RESTART,
124 __I40E_SERVICE_SCHED,
125 __I40E_ADMINQ_EVENT_PENDING,
126 __I40E_MDD_EVENT_PENDING,
127 __I40E_VFLR_EVENT_PENDING,
128 __I40E_RESET_RECOVERY_PENDING,
129 __I40E_RESET_INTR_RECEIVED,
130 __I40E_REINIT_REQUESTED,
131 __I40E_PF_RESET_REQUESTED,
132 __I40E_CORE_RESET_REQUESTED,
133 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 134 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 135 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 136 __I40E_SUSPENDED,
4eb3f768 137 __I40E_BAD_EEPROM,
7daa6bf3
JB		 138};
139
140enum i40e_interrupt_policy {
141 I40E_INTERRUPT_BEST_CASE,
142 I40E_INTERRUPT_MEDIUM,
143 I40E_INTERRUPT_LOWEST
144};
145
146struct i40e_lump_tracking {
147 u16 num_entries;
148 u16 search_hint;
149 u16 list[0];
150#define I40E_PILE_VALID_BIT 0x8000
151};
152
153#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 154#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
155#define I40E_FDIR_BUFFER_FULL_MARGIN 10
156#define I40E_FDIR_BUFFER_HEAD_ROOM 200
157
433c47de
ASJ		 158enum i40e_fd_stat_idx {
159 I40E_FD_STAT_ATR,
160 I40E_FD_STAT_SB,
161 I40E_FD_STAT_PF_COUNT
162};
163#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
164#define I40E_FD_ATR_STAT_IDX(pf_id) \
165 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
166#define I40E_FD_SB_STAT_IDX(pf_id) \
167 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
168
17a73f6b
JG		 169struct i40e_fdir_filter {
170 struct hlist_node fdir_node;
171 /* filter ipnut set */
172 u8 flow_type;
173 u8 ip4_proto;
04b73bd7 174 /* TX packet view of src and dst */
17a73f6b
JG		 175 __be32 dst_ip[4];
176 __be32 src_ip[4];
177 __be16 src_port;
178 __be16 dst_port;
179 __be32 sctp_v_tag;
180 /* filter control */
7daa6bf3
JB		 181 u16 q_index;
182 u8 flex_off;
183 u8 pctype;
184 u16 dest_vsi;
185 u8 dest_ctl;
186 u8 fd_status;
187 u16 cnt_index;
188 u32 fd_id;
7daa6bf3
JB		 189};
190
4e3b35b0
NP		 191#define I40E_ETH_P_LLDP 0x88cc
192
7daa6bf3
JB		 193#define I40E_DCB_PRIO_TYPE_STRICT 0
194#define I40E_DCB_PRIO_TYPE_ETS 1
195#define I40E_DCB_STRICT_PRIO_CREDITS 127
196#define I40E_MAX_USER_PRIORITY 8
197/* DCB per TC information data structure */
198struct i40e_tc_info {
199 u16 qoffset; /* Queue offset from base queue */
200 u16 qcount; /* Total Queues */
201 u8 netdev_tc; /* Netdev TC index if netdev associated */
202};
203
204/* TC configuration data structure */
205struct i40e_tc_configuration {
206 u8 numtc; /* Total number of enabled TCs */
207 u8 enabled_tc; /* TC map */
208 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
209};
210
211/* struct that defines the Ethernet device */
212struct i40e_pf {
213 struct pci_dev *pdev;
214 struct i40e_hw hw;
215 unsigned long state;
216 unsigned long link_check_timeout;
217 struct msix_entry *msix_entries;
7daa6bf3
JB		 218 bool fc_autoneg_status;
219
220 u16 eeprom_version;
6c167f58 221 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 222 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
223 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
224 u16 num_req_vfs; /* num vfs requested for this vf */
225 u16 num_vf_qps; /* num queue pairs per vf */
7daa6bf3
JB		 226 u16 num_lan_qps; /* num lan queues this pf has set up */
227 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 228 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 229 u16 rss_size; /* num queues in the RSS array */
230 u16 rss_size_max; /* HW defined max RSS queues */
231 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 232 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 233 u8 atr_sample_rate;
8e2773ae 234 bool wol_en;
7daa6bf3 235
17a73f6b
JG		 236 struct hlist_head fdir_filter_list;
237 u16 fdir_pf_active_filters;
433c47de
ASJ		 238 u16 fd_sb_cnt_idx;
239 u16 fd_atr_cnt_idx;
17a73f6b 240
a1c9a9d9
JK		 241#ifdef CONFIG_I40E_VXLAN
242 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
243 u16 pending_vxlan_bitmap;
244
245#endif
7daa6bf3
JB		 246 enum i40e_interrupt_policy int_policy;
247 u16 rx_itr_default;
248 u16 tx_itr_default;
249 u16 msg_enable;
250 char misc_int_name[IFNAMSIZ + 9];
251 u16 adminq_work_limit; /* num of admin receive queue desc to process */
252 int service_timer_period;
253 struct timer_list service_timer;
254 struct work_struct service_task;
255
256 u64 flags;
257#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
258#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
259#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
260#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
261#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
262#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 263#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
264#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
265#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
266#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
267#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
268#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
269#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
270#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
271#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
272#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
273#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 274#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
275#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 276#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 277#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
278#ifdef CONFIG_I40E_VXLAN
279#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
280#endif
4d9b6043 281#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 282
61dade7e
ASJ		 283 /* tracks features that get auto disabled by errors */
284 u64 auto_disable_flags;
285
7daa6bf3
JB		 286 bool stat_offsets_loaded;
287 struct i40e_hw_port_stats stats;
288 struct i40e_hw_port_stats stats_offsets;
289 u32 tx_timeout_count;
290 u32 tx_timeout_recovery_level;
291 unsigned long tx_timeout_last_recovery;
292 u32 hw_csum_rx_error;
293 u32 led_status;
294 u16 corer_count; /* Core reset count */
295 u16 globr_count; /* Global reset count */
296 u16 empr_count; /* EMP reset count */
297 u16 pfr_count; /* PF reset count */
cd92e72f 298 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 299
300 struct mutex switch_mutex;
301 u16 lan_vsi; /* our default LAN VSI */
302 u16 lan_veb; /* initial relay, if exists */
303#define I40E_NO_VEB 0xffff
304#define I40E_NO_VSI 0xffff
305 u16 next_vsi; /* Next unallocated VSI - 0-based! */
306 struct i40e_vsi **vsi;
307 struct i40e_veb *veb[I40E_MAX_VEB];
308
309 struct i40e_lump_tracking *qp_pile;
310 struct i40e_lump_tracking *irq_pile;
311
312 /* switch config info */
313 u16 pf_seid;
314 u16 main_vsi_seid;
315 u16 mac_seid;
7daa6bf3
JB		 316 struct kobject *switch_kobj;
317#ifdef CONFIG_DEBUG_FS
318 struct dentry *i40e_dbg_pf;
319#endif /* CONFIG_DEBUG_FS */
320
93cd765b
ASJ		 321 u16 instance; /* A unique number per i40e_pf instance in the system */
322
7daa6bf3
JB		 323 /* sr-iov config info */
324 struct i40e_vf *vf;
325 int num_alloc_vfs; /* actual number of VFs allocated */
326 u32 vf_aq_requests;
327
328 /* DCBx/DCBNL capability for PF that indicates
329 * whether DCBx is managed by firmware or host
330 * based agent (LLDPAD). Also, indicates what
331 * flavor of DCBx protocol (IEEE/CEE) is supported
332 * by the device. For now we're supporting IEEE
333 * mode only.
334 */
335 u16 dcbx_cap;
336
337 u32 fcoe_hmc_filt_num;
338 u32 fcoe_hmc_cntx_num;
339 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 340
341 struct ptp_clock *ptp_clock;
342 struct ptp_clock_info ptp_caps;
343 struct sk_buff *ptp_tx_skb;
beb0dff1 344 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 345 unsigned long last_rx_ptp_check;
346 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
347 u64 ptp_base_adj;
348 u32 tx_hwtstamp_timeouts;
349 u32 rx_hwtstamp_cleared;
350 bool ptp_tx;
351 bool ptp_rx;
7daa6bf3
JB		 352};
353
354struct i40e_mac_filter {
355 struct list_head list;
356 u8 macaddr[ETH_ALEN];
357#define I40E_VLAN_ANY -1
358 s16 vlan;
359 u8 counter; /* number of instances of this filter */
360 bool is_vf; /* filter belongs to a VF */
361 bool is_netdev; /* filter belongs to a netdev */
362 bool changed; /* filter needs to be sync'd to the HW */
363};
364
365struct i40e_veb {
366 struct i40e_pf *pf;
367 u16 idx;
368 u16 veb_idx; /* index of VEB parent */
369 u16 seid;
370 u16 uplink_seid;
371 u16 stats_idx; /* index of VEB parent */
372 u8 enabled_tc;
373 u16 flags;
374 u16 bw_limit;
375 u8 bw_max_quanta;
376 bool is_abs_credits;
377 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
378 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
379 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
380 struct kobject *kobj;
381 bool stat_offsets_loaded;
382 struct i40e_eth_stats stats;
383 struct i40e_eth_stats stats_offsets;
384};
385
386/* struct that defines a VSI, associated with a dev */
387struct i40e_vsi {
388 struct net_device *netdev;
389 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
390 bool netdev_registered;
391 bool stat_offsets_loaded;
392
393 u32 current_netdev_flags;
394 unsigned long state;
395#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
396#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
397 unsigned long flags;
398
399 struct list_head mac_filter_list;
400
401 /* VSI stats */
402 struct rtnl_link_stats64 net_stats;
403 struct rtnl_link_stats64 net_stats_offsets;
404 struct i40e_eth_stats eth_stats;
405 struct i40e_eth_stats eth_stats_offsets;
406 u32 tx_restart;
407 u32 tx_busy;
408 u32 rx_buf_failed;
409 u32 rx_page_failed;
410
9f65e15b
AD		 411 /* These are containers of ring pointers, allocated at run-time */
412 struct i40e_ring **rx_rings;
413 struct i40e_ring **tx_rings;
7daa6bf3
JB		 414
415 u16 work_limit;
416 /* high bit set means dynamic, use accessor routines to read/write.
417 * hardware only supports 2us resolution for the ITR registers.
418 * these values always store the USER setting, and must be converted
419 * before programming to a register.
420 */
421 u16 rx_itr_setting;
422 u16 tx_itr_setting;
423
424 u16 max_frame;
425 u16 rx_hdr_len;
426 u16 rx_buf_len;
427 u8 dtype;
428
429 /* List of q_vectors allocated to this VSI */
493fb300 430 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 431 int num_q_vectors;
432 int base_vector;
63741846 433 bool irqs_ready;
7daa6bf3
JB		 434
435 u16 seid; /* HW index of this VSI (absolute index) */
436 u16 id; /* VSI number */
437 u16 uplink_seid;
438
439 u16 base_queue; /* vsi's first queue in hw array */
440 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
441 u16 num_queue_pairs; /* Used tx and rx pairs */
442 u16 num_desc;
443 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
444 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
445
446 struct i40e_tc_configuration tc_config;
447 struct i40e_aqc_vsi_properties_data info;
448
449 /* VSI BW limit (absolute across all TCs) */
450 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
451 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
452
453 /* Relative TC credits across VSIs */
454 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
455 /* TC BW limit credits within VSI */
456 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
457 /* TC BW limit max quanta within VSI */
458 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
459
460 struct i40e_pf *back; /* Backreference to associated PF */
461 u16 idx; /* index in pf->vsi[] */
462 u16 veb_idx; /* index of VEB parent */
463 struct kobject *kobj; /* sysfs object */
464
465 /* VSI specific handlers */
466 irqreturn_t (*irq_handler)(int irq, void *data);
467} ____cacheline_internodealigned_in_smp;
468
469struct i40e_netdev_priv {
470 struct i40e_vsi *vsi;
471};
472
473/* struct that defines an interrupt vector */
474struct i40e_q_vector {
475 struct i40e_vsi *vsi;
476
477 u16 v_idx; /* index in the vsi->q_vector array. */
478 u16 reg_idx; /* register index of the interrupt */
479
480 struct napi_struct napi;
481
482 struct i40e_ring_container rx;
483 struct i40e_ring_container tx;
484
485 u8 num_ringpairs; /* total number of ring pairs in vector */
486
7daa6bf3 487 cpumask_t affinity_mask;
493fb300
AD		 488 struct rcu_head rcu; /* to avoid race with update stats on free */
489 char name[IFNAMSIZ + 9];
7daa6bf3
JB		 490} ____cacheline_internodealigned_in_smp;
491
492/* lan device */
493struct i40e_device {
494 struct list_head list;
495 struct i40e_pf *pf;
496};
497
498/**
499 * i40e_fw_version_str - format the FW and NVM version strings
500 * @hw: ptr to the hardware info
501 **/
502static inline char *i40e_fw_version_str(struct i40e_hw *hw)
503{
504 static char buf[32];
505
506 snprintf(buf, sizeof(buf),
fe310704 507 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 508 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
509 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 510 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
511 I40E_NVM_VERSION_HI_SHIFT,
512 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
513 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 514 hw->nvm.eetrack);
515
516 return buf;
517}
518
519/**
520 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
521 * @netdev: the corresponding netdev
522 *
523 * Return the PF struct for the given netdev
524 **/
525static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
526{
527 struct i40e_netdev_priv *np = netdev_priv(netdev);
528 struct i40e_vsi *vsi = np->vsi;
529
530 return vsi->back;
531}
532
533static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
534 irqreturn_t (*irq_handler)(int, void *))
535{
536 vsi->irq_handler = irq_handler;
537}
538
539/**
540 * i40e_rx_is_programming_status - check for programming status descriptor
541 * @qw: the first quad word of the program status descriptor
542 *
543 * The value of in the descriptor length field indicate if this
544 * is a programming status descriptor for flow director or FCoE
545 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
546 * it is a packet descriptor.
547 **/
548static inline bool i40e_rx_is_programming_status(u64 qw)
549{
550 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
551 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
552}
553
082def10
ASJ		 554/**
555 * i40e_get_fd_cnt_all - get the total FD filter space available
556 * @pf: pointer to the pf struct
557 **/
558static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
559{
560 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
561}
562
7daa6bf3
JB		 563/* needed by i40e_ethtool.c */
564int i40e_up(struct i40e_vsi *vsi);
565void i40e_down(struct i40e_vsi *vsi);
566extern const char i40e_driver_name[];
567extern const char i40e_driver_version_str[];
23326186 568void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 569void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
570void i40e_update_stats(struct i40e_vsi *vsi);
571void i40e_update_eth_stats(struct i40e_vsi *vsi);
572struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
573int i40e_fetch_switch_configuration(struct i40e_pf *pf,
574 bool printconfig);
575
17a73f6b 576int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 577 struct i40e_pf *pf, bool add);
17a73f6b
JG		 578int i40e_add_del_fdir(struct i40e_vsi *vsi,
579 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 580void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
581int i40e_get_current_fd_count(struct i40e_pf *pf);
7c3c288b 582bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 583void i40e_set_ethtool_ops(struct net_device *netdev);
584struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
585 u8 *macaddr, s16 vlan,
586 bool is_vf, bool is_netdev);
587void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
588 bool is_vf, bool is_netdev);
589int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
590struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
591 u16 uplink, u32 param1);
592int i40e_vsi_release(struct i40e_vsi *vsi);
593struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
594 struct i40e_vsi *start_vsi);
fc18eaa0 595int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 596int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 597struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
598 u16 downlink_seid, u8 enabled_tc);
599void i40e_veb_release(struct i40e_veb *veb);
600
4e3b35b0 601int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 602i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
603void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
604void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
605void i40e_pf_reset_stats(struct i40e_pf *pf);
606#ifdef CONFIG_DEBUG_FS
607void i40e_dbg_pf_init(struct i40e_pf *pf);
608void i40e_dbg_pf_exit(struct i40e_pf *pf);
609void i40e_dbg_init(void);
610void i40e_dbg_exit(void);
611#else
612static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
613static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
614static inline void i40e_dbg_init(void) {}
615static inline void i40e_dbg_exit(void) {}
616#endif /* CONFIG_DEBUG_FS*/
617void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
2ef28cfb 618void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 619void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
7daa6bf3 620int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
6c167f58 621int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 622void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
623int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
624int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
625struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
626 bool is_vf, bool is_netdev);
627bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
628struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
629 bool is_vf, bool is_netdev);
630void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 631#ifdef CONFIG_I40E_DCB
632void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
633 struct i40e_dcbx_config *new_cfg);
634void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
635void i40e_dcbnl_setup(struct i40e_vsi *vsi);
636bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
637 struct i40e_dcbx_config *old_cfg,
638 struct i40e_dcbx_config *new_cfg);
639#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 640void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
641void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
642void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
643void i40e_ptp_set_increment(struct i40e_pf *pf);
644int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
645int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
646void i40e_ptp_init(struct i40e_pf *pf);
647void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 648#endif /* _I40E_H_ */
Linux kernel - Deliverables
This page took 0.12014 seconds and 5 git commands to generate.