i40evf: Change vf driver string to reflect all products i40evf supports
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB
1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB
32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB
40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
7daa6bf3
JB
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB
48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
51616018 52#include <linux/if_bridge.h>
beb0dff1
JK
53#include <linux/clocksource.h>
54#include <linux/net_tstamp.h>
55#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB
56#include "i40e_type.h"
57#include "i40e_prototype.h"
38e00438
VD
58#ifdef I40E_FCOE
59#include "i40e_fcoe.h"
60#endif
7daa6bf3
JB
61#include "i40e_virtchnl.h"
62#include "i40e_virtchnl_pf.h"
63#include "i40e_txrx.h"
4e3b35b0 64#include "i40e_dcb.h"
7daa6bf3
JB
65
66/* Useful i40e defaults */
67#define I40E_BASE_PF_SEID 16
68#define I40E_BASE_VSI_SEID 512
69#define I40E_BASE_VEB_SEID 288
70#define I40E_MAX_VEB 16
71
72#define I40E_MAX_NUM_DESCRIPTORS 4096
232f4706 73#define I40E_MAX_CSR_SPACE (4 * 1024 * 1024 - 64 * 1024)
7daa6bf3
JB
74#define I40E_DEFAULT_NUM_DESCRIPTORS 512
75#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
76#define I40E_MIN_NUM_DESCRIPTORS 64
77#define I40E_MIN_MSIX 2
78#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 79#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
e25d00b8
ASJ
80/* max 16 qps */
81#define i40e_default_queues_per_vmdq(pf) \
82 (((pf)->flags & I40E_FLAG_RSS_AQ_CAPABLE) ? 4 : 1)
7daa6bf3
JB
83#define I40E_DEFAULT_QUEUES_PER_VF 4
84#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
e25d00b8
ASJ
85#define i40e_pf_get_max_q_per_tc(pf) \
86 (((pf)->flags & I40E_FLAG_128_QP_RSS_CAPABLE) ? 128 : 64)
7daa6bf3
JB
87#define I40E_FDIR_RING 0
88#define I40E_FDIR_RING_COUNT 32
38e00438
VD
89#ifdef I40E_FCOE
90#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
91#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
92#endif /* I40E_FCOE */
7daa6bf3 93#define I40E_MAX_AQ_BUF_SIZE 4096
07574897 94#define I40E_AQ_LEN 256
628f096d 95#define I40E_AQ_WORK_LIMIT 66 /* max number of VFs + a little */
7daa6bf3
JB
96#define I40E_MAX_USER_PRIORITY 8
97#define I40E_DEFAULT_MSG_ENABLE 4
23527308 98#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
fba52e21 99#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 16)
7daa6bf3 100
7e45ab44 101/* Ethtool Private Flags */
41a1d04b 102#define I40E_PRIV_FLAGS_NPAR_FLAG BIT(0)
9ac77266 103#define I40E_PRIV_FLAGS_LINKPOLL_FLAG BIT(1)
ef17178c 104#define I40E_PRIV_FLAGS_FD_ATR BIT(2)
1cdfd88f 105#define I40E_PRIV_FLAGS_VEB_STATS BIT(3)
827de392 106#define I40E_PRIV_FLAGS_PS BIT(4)
72b74869 107#define I40E_PRIV_FLAGS_HW_ATR_EVICT BIT(5)
7e45ab44 108
7daa6bf3 109#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 110#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB
111#define I40E_NVM_VERSION_HI_SHIFT 12
112#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
2efaad86 113#define I40E_OEM_VER_BUILD_MASK 0xffff
f0b44440 114#define I40E_OEM_VER_PATCH_MASK 0xff
2efaad86
CW
115#define I40E_OEM_VER_BUILD_SHIFT 8
116#define I40E_OEM_VER_SHIFT 24
fe310704
AS
117
118/* The values in here are decimal coded as hex as is the case in the NVM map*/
119#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 120#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 121
7daa6bf3
JB
122/* magic for getting defines into strings */
123#define STRINGIFY(foo) #foo
124#define XSTRINGIFY(bar) STRINGIFY(bar)
125
7daa6bf3
JB
126#define I40E_RX_DESC(R, i) \
127 ((ring_is_16byte_desc_enabled(R)) \
128 ? (union i40e_32byte_rx_desc *) \
129 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
130 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
131#define I40E_TX_DESC(R, i) \
132 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
133#define I40E_TX_CTXTDESC(R, i) \
134 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
135#define I40E_TX_FDIRDESC(R, i) \
136 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
137
138/* default to trying for four seconds */
139#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
140
f1bbad33
NP
141/**
142 * i40e_is_mac_710 - Return true if MAC is X710/XL710
143 * @hw: ptr to the hardware info
144 **/
145static inline bool i40e_is_mac_710(struct i40e_hw *hw)
146{
147 if ((hw->mac.type == I40E_MAC_X710) ||
148 (hw->mac.type == I40E_MAC_XL710))
149 return true;
150
151 return false;
152}
153
7daa6bf3
JB
154/* driver state flags */
155enum i40e_state_t {
156 __I40E_TESTING,
157 __I40E_CONFIG_BUSY,
158 __I40E_CONFIG_DONE,
159 __I40E_DOWN,
160 __I40E_NEEDS_RESTART,
161 __I40E_SERVICE_SCHED,
162 __I40E_ADMINQ_EVENT_PENDING,
163 __I40E_MDD_EVENT_PENDING,
164 __I40E_VFLR_EVENT_PENDING,
165 __I40E_RESET_RECOVERY_PENDING,
166 __I40E_RESET_INTR_RECEIVED,
167 __I40E_REINIT_REQUESTED,
168 __I40E_PF_RESET_REQUESTED,
169 __I40E_CORE_RESET_REQUESTED,
170 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 171 __I40E_EMP_RESET_REQUESTED,
9df42d1a 172 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 173 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 174 __I40E_SUSPENDED,
9ce34f02 175 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 176 __I40E_BAD_EEPROM,
b5d06f05 177 __I40E_DOWN_REQUESTED,
1e1be8f6 178 __I40E_FD_FLUSH_REQUESTED,
a316f651 179 __I40E_RESET_FAILED,
69129dc3 180 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 181 __I40E_VF_DISABLE,
7daa6bf3
JB
182};
183
184enum i40e_interrupt_policy {
185 I40E_INTERRUPT_BEST_CASE,
186 I40E_INTERRUPT_MEDIUM,
187 I40E_INTERRUPT_LOWEST
188};
189
190struct i40e_lump_tracking {
191 u16 num_entries;
192 u16 search_hint;
193 u16 list[0];
194#define I40E_PILE_VALID_BIT 0x8000
195};
196
197#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ
198#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
199#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 200#define I40E_FDIR_BUFFER_HEAD_ROOM 32
04294e38 201#define I40E_FDIR_BUFFER_HEAD_ROOM_FOR_ATR (I40E_FDIR_BUFFER_HEAD_ROOM * 4)
55a5e60b 202
b29e13bb 203#define I40E_HKEY_ARRAY_SIZE ((I40E_PFQF_HKEY_MAX_INDEX + 1) * 4)
e69ff813 204#define I40E_HLUT_ARRAY_SIZE ((I40E_PFQF_HLUT_MAX_INDEX + 1) * 4)
b29e13bb 205
433c47de
ASJ
206enum i40e_fd_stat_idx {
207 I40E_FD_STAT_ATR,
208 I40E_FD_STAT_SB,
60ccd45c 209 I40E_FD_STAT_ATR_TUNNEL,
433c47de
ASJ
210 I40E_FD_STAT_PF_COUNT
211};
212#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
213#define I40E_FD_ATR_STAT_IDX(pf_id) \
214 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
215#define I40E_FD_SB_STAT_IDX(pf_id) \
216 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
60ccd45c
ASJ
217#define I40E_FD_ATR_TUNNEL_STAT_IDX(pf_id) \
218 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR_TUNNEL)
433c47de 219
17a73f6b
JG
220struct i40e_fdir_filter {
221 struct hlist_node fdir_node;
222 /* filter ipnut set */
223 u8 flow_type;
224 u8 ip4_proto;
04b73bd7 225 /* TX packet view of src and dst */
17a73f6b
JG
226 __be32 dst_ip[4];
227 __be32 src_ip[4];
228 __be16 src_port;
229 __be16 dst_port;
230 __be32 sctp_v_tag;
231 /* filter control */
7daa6bf3
JB
232 u16 q_index;
233 u8 flex_off;
234 u8 pctype;
235 u16 dest_vsi;
236 u8 dest_ctl;
237 u8 fd_status;
238 u16 cnt_index;
239 u32 fd_id;
7daa6bf3
JB
240};
241
4e3b35b0
NP
242#define I40E_ETH_P_LLDP 0x88cc
243
7daa6bf3
JB
244#define I40E_DCB_PRIO_TYPE_STRICT 0
245#define I40E_DCB_PRIO_TYPE_ETS 1
246#define I40E_DCB_STRICT_PRIO_CREDITS 127
247#define I40E_MAX_USER_PRIORITY 8
248/* DCB per TC information data structure */
249struct i40e_tc_info {
250 u16 qoffset; /* Queue offset from base queue */
251 u16 qcount; /* Total Queues */
252 u8 netdev_tc; /* Netdev TC index if netdev associated */
253};
254
255/* TC configuration data structure */
256struct i40e_tc_configuration {
257 u8 numtc; /* Total number of enabled TCs */
258 u8 enabled_tc; /* TC map */
259 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
260};
261
6a899024
SA
262struct i40e_udp_port_config {
263 __be16 index;
264 u8 type;
265};
266
7daa6bf3
JB
267/* struct that defines the Ethernet device */
268struct i40e_pf {
269 struct pci_dev *pdev;
270 struct i40e_hw hw;
271 unsigned long state;
7daa6bf3 272 struct msix_entry *msix_entries;
7daa6bf3
JB
273 bool fc_autoneg_status;
274
275 u16 eeprom_version;
b40c82e6 276 u16 num_vmdq_vsis; /* num vmdq vsis this PF has set up */
7daa6bf3
JB
277 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
278 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
b40c82e6
JK
279 u16 num_req_vfs; /* num VFs requested for this VF */
280 u16 num_vf_qps; /* num queue pairs per VF */
38e00438 281#ifdef I40E_FCOE
b40c82e6 282 u16 num_fcoe_qps; /* num fcoe queues this PF has set up */
38e00438
VD
283 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
284#endif /* I40E_FCOE */
b40c82e6
JK
285 u16 num_lan_qps; /* num lan queues this PF has set up */
286 u16 num_lan_msix; /* num queue vectors for the base PF vsi */
f8ff1464 287 int queues_left; /* queues left unclaimed */
acd65448 288 u16 alloc_rss_size; /* allocated RSS queues */
7daa6bf3
JB
289 u16 rss_size_max; /* HW defined max RSS queues */
290 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 291 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 292 u8 atr_sample_rate;
8e2773ae 293 bool wol_en;
7daa6bf3 294
17a73f6b
JG
295 struct hlist_head fdir_filter_list;
296 u16 fdir_pf_active_filters;
1e1be8f6 297 unsigned long fd_flush_timestamp;
60793f4a 298 u32 fd_flush_cnt;
1e1be8f6
ASJ
299 u32 fd_add_err;
300 u32 fd_atr_cnt;
301 u32 fd_tcp_rule;
17a73f6b 302
6a899024
SA
303 struct i40e_udp_port_config udp_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
304 u16 pending_udp_bitmap;
a1c9a9d9 305
7daa6bf3
JB
306 enum i40e_interrupt_policy int_policy;
307 u16 rx_itr_default;
308 u16 tx_itr_default;
71e6163a 309 u32 msg_enable;
b294ac70 310 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 311 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN
312 unsigned long service_timer_period;
313 unsigned long service_timer_previous;
7daa6bf3
JB
314 struct timer_list service_timer;
315 struct work_struct service_task;
316
317 u64 flags;
41a1d04b
JB
318#define I40E_FLAG_RX_CSUM_ENABLED BIT_ULL(1)
319#define I40E_FLAG_MSI_ENABLED BIT_ULL(2)
320#define I40E_FLAG_MSIX_ENABLED BIT_ULL(3)
321#define I40E_FLAG_RX_1BUF_ENABLED BIT_ULL(4)
322#define I40E_FLAG_RX_PS_ENABLED BIT_ULL(5)
323#define I40E_FLAG_RSS_ENABLED BIT_ULL(6)
324#define I40E_FLAG_VMDQ_ENABLED BIT_ULL(7)
325#define I40E_FLAG_FDIR_REQUIRES_REINIT BIT_ULL(8)
326#define I40E_FLAG_NEED_LINK_UPDATE BIT_ULL(9)
d502ce01 327#define I40E_FLAG_IWARP_ENABLED BIT_ULL(10)
38e00438 328#ifdef I40E_FCOE
41a1d04b 329#define I40E_FLAG_FCOE_ENABLED BIT_ULL(11)
38e00438 330#endif /* I40E_FCOE */
41a1d04b
JB
331#define I40E_FLAG_16BYTE_RX_DESC_ENABLED BIT_ULL(13)
332#define I40E_FLAG_CLEAN_ADMINQ BIT_ULL(14)
333#define I40E_FLAG_FILTER_SYNC BIT_ULL(15)
334#define I40E_FLAG_PROCESS_MDD_EVENT BIT_ULL(17)
335#define I40E_FLAG_PROCESS_VFLR_EVENT BIT_ULL(18)
336#define I40E_FLAG_SRIOV_ENABLED BIT_ULL(19)
337#define I40E_FLAG_DCB_ENABLED BIT_ULL(20)
338#define I40E_FLAG_FD_SB_ENABLED BIT_ULL(21)
339#define I40E_FLAG_FD_ATR_ENABLED BIT_ULL(22)
340#define I40E_FLAG_PTP BIT_ULL(25)
341#define I40E_FLAG_MFP_ENABLED BIT_ULL(26)
6a899024 342#define I40E_FLAG_UDP_FILTER_SYNC BIT_ULL(27)
41a1d04b
JB
343#define I40E_FLAG_PORT_ID_VALID BIT_ULL(28)
344#define I40E_FLAG_DCB_CAPABLE BIT_ULL(29)
d502ce01
ASJ
345#define I40E_FLAG_RSS_AQ_CAPABLE BIT_ULL(31)
346#define I40E_FLAG_HW_ATR_EVICT_CAPABLE BIT_ULL(32)
347#define I40E_FLAG_OUTER_UDP_CSUM_CAPABLE BIT_ULL(33)
348#define I40E_FLAG_128_QP_RSS_CAPABLE BIT_ULL(34)
349#define I40E_FLAG_WB_ON_ITR_CAPABLE BIT_ULL(35)
d1a8d275 350#define I40E_FLAG_VEB_STATS_ENABLED BIT_ULL(37)
d502ce01 351#define I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE BIT_ULL(38)
9ac77266 352#define I40E_FLAG_LINK_POLLING_ENABLED BIT_ULL(39)
fc60861e 353#define I40E_FLAG_VEB_MODE_ENABLED BIT_ULL(40)
6a899024 354#define I40E_FLAG_GENEVE_OFFLOAD_CAPABLE BIT_ULL(41)
3fced535 355#define I40E_FLAG_NO_PCI_LINK_CHECK BIT_ULL(42)
48b1804e 356#define I40E_FLAG_100M_SGMII_CAPABLE BIT_ULL(43)
8eed76fa 357#define I40E_FLAG_RESTART_AUTONEG BIT_ULL(44)
f1bbad33
NP
358#define I40E_FLAG_NO_DCB_SUPPORT BIT_ULL(45)
359#define I40E_FLAG_USE_SET_LLDP_MIB BIT_ULL(46)
360#define I40E_FLAG_STOP_FW_LLDP BIT_ULL(47)
b499ffb0 361#define I40E_FLAG_PF_MAC BIT_ULL(50)
7daa6bf3 362
61dade7e
ASJ
363 /* tracks features that get auto disabled by errors */
364 u64 auto_disable_flags;
365
38e00438
VD
366#ifdef I40E_FCOE
367 struct i40e_fcoe fcoe;
368
369#endif /* I40E_FCOE */
7daa6bf3
JB
370 bool stat_offsets_loaded;
371 struct i40e_hw_port_stats stats;
372 struct i40e_hw_port_stats stats_offsets;
373 u32 tx_timeout_count;
374 u32 tx_timeout_recovery_level;
375 unsigned long tx_timeout_last_recovery;
810b3ae4 376 u32 tx_sluggish_count;
7daa6bf3
JB
377 u32 hw_csum_rx_error;
378 u32 led_status;
379 u16 corer_count; /* Core reset count */
380 u16 globr_count; /* Global reset count */
381 u16 empr_count; /* EMP reset count */
382 u16 pfr_count; /* PF reset count */
cd92e72f 383 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB
384
385 struct mutex switch_mutex;
386 u16 lan_vsi; /* our default LAN VSI */
387 u16 lan_veb; /* initial relay, if exists */
388#define I40E_NO_VEB 0xffff
389#define I40E_NO_VSI 0xffff
390 u16 next_vsi; /* Next unallocated VSI - 0-based! */
391 struct i40e_vsi **vsi;
392 struct i40e_veb *veb[I40E_MAX_VEB];
393
394 struct i40e_lump_tracking *qp_pile;
395 struct i40e_lump_tracking *irq_pile;
396
397 /* switch config info */
398 u16 pf_seid;
399 u16 main_vsi_seid;
400 u16 mac_seid;
7daa6bf3
JB
401 struct kobject *switch_kobj;
402#ifdef CONFIG_DEBUG_FS
403 struct dentry *i40e_dbg_pf;
404#endif /* CONFIG_DEBUG_FS */
92faef85 405 bool cur_promisc;
7daa6bf3 406
93cd765b
ASJ
407 u16 instance; /* A unique number per i40e_pf instance in the system */
408
7daa6bf3
JB
409 /* sr-iov config info */
410 struct i40e_vf *vf;
411 int num_alloc_vfs; /* actual number of VFs allocated */
412 u32 vf_aq_requests;
1d0a4ada 413 u32 arq_overflows; /* Not fatal, possibly indicative of problems */
7daa6bf3
JB
414
415 /* DCBx/DCBNL capability for PF that indicates
416 * whether DCBx is managed by firmware or host
417 * based agent (LLDPAD). Also, indicates what
418 * flavor of DCBx protocol (IEEE/CEE) is supported
419 * by the device. For now we're supporting IEEE
420 * mode only.
421 */
422 u16 dcbx_cap;
423
424 u32 fcoe_hmc_filt_num;
425 u32 fcoe_hmc_cntx_num;
426 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK
427
428 struct ptp_clock *ptp_clock;
429 struct ptp_clock_info ptp_caps;
430 struct sk_buff *ptp_tx_skb;
beb0dff1 431 struct hwtstamp_config tstamp_config;
beb0dff1
JK
432 unsigned long last_rx_ptp_check;
433 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
434 u64 ptp_base_adj;
435 u32 tx_hwtstamp_timeouts;
436 u32 rx_hwtstamp_cleared;
437 bool ptp_tx;
438 bool ptp_rx;
acd65448 439 u16 rss_table_size; /* HW RSS table size */
f4492db1
GR
440 /* These are only valid in NPAR modes */
441 u32 npar_max_bw;
442 u32 npar_min_bw;
2ac8b675
SN
443
444 u32 ioremap_len;
3487b6c3 445 u32 fd_inv;
7daa6bf3
JB
446};
447
448struct i40e_mac_filter {
449 struct list_head list;
450 u8 macaddr[ETH_ALEN];
451#define I40E_VLAN_ANY -1
452 s16 vlan;
453 u8 counter; /* number of instances of this filter */
454 bool is_vf; /* filter belongs to a VF */
455 bool is_netdev; /* filter belongs to a netdev */
456 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 457 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB
458};
459
460struct i40e_veb {
461 struct i40e_pf *pf;
462 u16 idx;
463 u16 veb_idx; /* index of VEB parent */
464 u16 seid;
465 u16 uplink_seid;
466 u16 stats_idx; /* index of VEB parent */
467 u8 enabled_tc;
51616018 468 u16 bridge_mode; /* Bridge Mode (VEB/VEPA) */
7daa6bf3
JB
469 u16 flags;
470 u16 bw_limit;
471 u8 bw_max_quanta;
472 bool is_abs_credits;
473 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
474 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
475 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
476 struct kobject *kobj;
477 bool stat_offsets_loaded;
478 struct i40e_eth_stats stats;
479 struct i40e_eth_stats stats_offsets;
fe860afb
NP
480 struct i40e_veb_tc_stats tc_stats;
481 struct i40e_veb_tc_stats tc_stats_offsets;
7daa6bf3
JB
482};
483
484/* struct that defines a VSI, associated with a dev */
485struct i40e_vsi {
486 struct net_device *netdev;
487 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
488 bool netdev_registered;
489 bool stat_offsets_loaded;
490
491 u32 current_netdev_flags;
492 unsigned long state;
41a1d04b
JB
493#define I40E_VSI_FLAG_FILTER_CHANGED BIT(0)
494#define I40E_VSI_FLAG_VEB_OWNER BIT(1)
7daa6bf3
JB
495 unsigned long flags;
496
21659035
KP
497 /* Per VSI lock to protect elements/list (MAC filter) */
498 spinlock_t mac_filter_list_lock;
7daa6bf3
JB
499 struct list_head mac_filter_list;
500
501 /* VSI stats */
502 struct rtnl_link_stats64 net_stats;
503 struct rtnl_link_stats64 net_stats_offsets;
504 struct i40e_eth_stats eth_stats;
505 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD
506#ifdef I40E_FCOE
507 struct i40e_fcoe_stats fcoe_stats;
508 struct i40e_fcoe_stats fcoe_stats_offsets;
509 bool fcoe_stat_offsets_loaded;
510#endif
7daa6bf3
JB
511 u32 tx_restart;
512 u32 tx_busy;
2fc3d715 513 u64 tx_linearize;
164c9f54 514 u64 tx_force_wb;
7daa6bf3
JB
515 u32 rx_buf_failed;
516 u32 rx_page_failed;
517
9f65e15b
AD
518 /* These are containers of ring pointers, allocated at run-time */
519 struct i40e_ring **rx_rings;
520 struct i40e_ring **tx_rings;
7daa6bf3
JB
521
522 u16 work_limit;
523 /* high bit set means dynamic, use accessor routines to read/write.
524 * hardware only supports 2us resolution for the ITR registers.
525 * these values always store the USER setting, and must be converted
526 * before programming to a register.
527 */
528 u16 rx_itr_setting;
529 u16 tx_itr_setting;
ac26fc13 530 u16 int_rate_limit; /* value in usecs */
7daa6bf3 531
acd65448
HZ
532 u16 rss_table_size; /* HW RSS table size */
533 u16 rss_size; /* Allocated RSS queues */
28c5869f
HZ
534 u8 *rss_hkey_user; /* User configured hash keys */
535 u8 *rss_lut_user; /* User configured lookup table entries */
5db4cb59 536
7daa6bf3
JB
537 u16 max_frame;
538 u16 rx_hdr_len;
539 u16 rx_buf_len;
540 u8 dtype;
541
542 /* List of q_vectors allocated to this VSI */
493fb300 543 struct i40e_q_vector **q_vectors;
7daa6bf3
JB
544 int num_q_vectors;
545 int base_vector;
63741846 546 bool irqs_ready;
7daa6bf3
JB
547
548 u16 seid; /* HW index of this VSI (absolute index) */
549 u16 id; /* VSI number */
550 u16 uplink_seid;
551
552 u16 base_queue; /* vsi's first queue in hw array */
553 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
9a3bd2f1 554 u16 req_queue_pairs; /* User requested queue pairs */
7daa6bf3
JB
555 u16 num_queue_pairs; /* Used tx and rx pairs */
556 u16 num_desc;
557 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
558 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
559
560 struct i40e_tc_configuration tc_config;
561 struct i40e_aqc_vsi_properties_data info;
562
563 /* VSI BW limit (absolute across all TCs) */
564 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
565 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
566
567 /* Relative TC credits across VSIs */
568 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
569 /* TC BW limit credits within VSI */
570 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
571 /* TC BW limit max quanta within VSI */
572 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
573
574 struct i40e_pf *back; /* Backreference to associated PF */
575 u16 idx; /* index in pf->vsi[] */
576 u16 veb_idx; /* index of VEB parent */
577 struct kobject *kobj; /* sysfs object */
c156f856 578 bool current_isup; /* Sync 'link up' logging */
7daa6bf3
JB
579
580 /* VSI specific handlers */
581 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW
582
583 /* current rxnfc data */
584 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB
585} ____cacheline_internodealigned_in_smp;
586
587struct i40e_netdev_priv {
588 struct i40e_vsi *vsi;
589};
590
591/* struct that defines an interrupt vector */
592struct i40e_q_vector {
593 struct i40e_vsi *vsi;
594
595 u16 v_idx; /* index in the vsi->q_vector array. */
596 u16 reg_idx; /* register index of the interrupt */
597
598 struct napi_struct napi;
599
600 struct i40e_ring_container rx;
601 struct i40e_ring_container tx;
602
603 u8 num_ringpairs; /* total number of ring pairs in vector */
604
9c6c1259
KP
605#define I40E_Q_VECTOR_HUNG_DETECT 0 /* Bit Index for hung detection logic */
606 unsigned long hung_detected; /* Set/Reset for hung_detection logic */
607
7daa6bf3 608 cpumask_t affinity_mask;
493fb300 609 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 610 char name[I40E_INT_NAME_STR_LEN];
8e0764b4 611 bool arm_wb_state;
ee2319cf
JB
612#define ITR_COUNTDOWN_START 100
613 u8 itr_countdown; /* when 0 should adjust ITR */
7daa6bf3
JB
614} ____cacheline_internodealigned_in_smp;
615
616/* lan device */
617struct i40e_device {
618 struct list_head list;
619 struct i40e_pf *pf;
620};
621
622/**
6dec1017 623 * i40e_nvm_version_str - format the NVM version strings
7daa6bf3
JB
624 * @hw: ptr to the hardware info
625 **/
6dec1017 626static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
7daa6bf3
JB
627{
628 static char buf[32];
2efaad86
CW
629 u32 full_ver;
630 u8 ver, patch;
631 u16 build;
632
633 full_ver = hw->nvm.oem_ver;
634 ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
4eeb1fff
JB
635 build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
636 I40E_OEM_VER_BUILD_MASK);
2efaad86 637 patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
7daa6bf3
JB
638
639 snprintf(buf, sizeof(buf),
f0b44440 640 "%x.%02x 0x%x %d.%d.%d",
ff80301e
JB
641 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
642 I40E_NVM_VERSION_HI_SHIFT,
643 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
644 I40E_NVM_VERSION_LO_SHIFT,
2efaad86 645 hw->nvm.eetrack, ver, build, patch);
7daa6bf3
JB
646
647 return buf;
648}
649
650/**
651 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
652 * @netdev: the corresponding netdev
653 *
654 * Return the PF struct for the given netdev
655 **/
656static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
657{
658 struct i40e_netdev_priv *np = netdev_priv(netdev);
659 struct i40e_vsi *vsi = np->vsi;
660
661 return vsi->back;
662}
663
664static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
665 irqreturn_t (*irq_handler)(int, void *))
666{
667 vsi->irq_handler = irq_handler;
668}
669
670/**
671 * i40e_rx_is_programming_status - check for programming status descriptor
672 * @qw: the first quad word of the program status descriptor
673 *
674 * The value of in the descriptor length field indicate if this
675 * is a programming status descriptor for flow director or FCoE
676 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
677 * it is a packet descriptor.
678 **/
679static inline bool i40e_rx_is_programming_status(u64 qw)
680{
681 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
682 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
683}
684
082def10
ASJ
685/**
686 * i40e_get_fd_cnt_all - get the total FD filter space available
b40c82e6 687 * @pf: pointer to the PF struct
082def10
ASJ
688 **/
689static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
690{
691 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
692}
693
7daa6bf3
JB
694/* needed by i40e_ethtool.c */
695int i40e_up(struct i40e_vsi *vsi);
696void i40e_down(struct i40e_vsi *vsi);
697extern const char i40e_driver_name[];
698extern const char i40e_driver_version_str[];
23326186 699void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3 700void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
043dd650
HZ
701int i40e_config_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
702int i40e_get_rss(struct i40e_vsi *vsi, u8 *seed, u8 *lut, u16 lut_size);
fdf0e0bf 703struct i40e_vsi *i40e_find_vsi_from_id(struct i40e_pf *pf, u16 id);
7daa6bf3
JB
704void i40e_update_stats(struct i40e_vsi *vsi);
705void i40e_update_eth_stats(struct i40e_vsi *vsi);
706struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
707int i40e_fetch_switch_configuration(struct i40e_pf *pf,
708 bool printconfig);
709
17a73f6b 710int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 711 struct i40e_pf *pf, bool add);
17a73f6b
JG
712int i40e_add_del_fdir(struct i40e_vsi *vsi,
713 struct i40e_fdir_filter *input, bool add);
55a5e60b 714void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
04294e38
ASJ
715u32 i40e_get_current_fd_count(struct i40e_pf *pf);
716u32 i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
717u32 i40e_get_current_atr_cnt(struct i40e_pf *pf);
718u32 i40e_get_global_fd_count(struct i40e_pf *pf);
7c3c288b 719bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB
720void i40e_set_ethtool_ops(struct net_device *netdev);
721struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
722 u8 *macaddr, s16 vlan,
723 bool is_vf, bool is_netdev);
724void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
725 bool is_vf, bool is_netdev);
17652c63 726int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
7daa6bf3
JB
727struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
728 u16 uplink, u32 param1);
729int i40e_vsi_release(struct i40e_vsi *vsi);
730struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
731 struct i40e_vsi *start_vsi);
38e00438
VD
732#ifdef I40E_FCOE
733void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
734 struct i40e_vsi_context *ctxt,
735 u8 enabled_tc, bool is_add);
736#endif
fc18eaa0 737int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 738int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB
739struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
740 u16 downlink_seid, u8 enabled_tc);
741void i40e_veb_release(struct i40e_veb *veb);
742
4e3b35b0 743int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
4eeb1fff 744int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
7daa6bf3
JB
745void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
746void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
747void i40e_pf_reset_stats(struct i40e_pf *pf);
748#ifdef CONFIG_DEBUG_FS
749void i40e_dbg_pf_init(struct i40e_pf *pf);
750void i40e_dbg_pf_exit(struct i40e_pf *pf);
751void i40e_dbg_init(void);
752void i40e_dbg_exit(void);
753#else
754static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
755static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
756static inline void i40e_dbg_init(void) {}
757static inline void i40e_dbg_exit(void) {}
758#endif /* CONFIG_DEBUG_FS*/
02d109be
JB
759/**
760 * i40e_irq_dynamic_enable - Enable default interrupt generation settings
761 * @vsi: pointer to a vsi
762 * @vector: enable a particular Hw Interrupt vector, without base_vector
763 **/
764static inline void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector)
765{
766 struct i40e_pf *pf = vsi->back;
767 struct i40e_hw *hw = &pf->hw;
768 u32 val;
769
770 val = I40E_PFINT_DYN_CTLN_INTENA_MASK |
771 I40E_PFINT_DYN_CTLN_CLEARPBA_MASK |
772 (I40E_ITR_NONE << I40E_PFINT_DYN_CTLN_ITR_INDX_SHIFT);
773 wr32(hw, I40E_PFINT_DYN_CTLN(vector + vsi->base_vector - 1), val);
774 /* skip the flush */
775}
776
2ef28cfb 777void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 778void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD
779#ifdef I40E_FCOE
780struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
781 struct net_device *netdev,
782 struct rtnl_link_stats64 *storage);
783int i40e_set_mac(struct net_device *netdev, void *p);
784void i40e_set_rx_mode(struct net_device *netdev);
785#endif
7daa6bf3 786int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD
787#ifdef I40E_FCOE
788void i40e_tx_timeout(struct net_device *netdev);
789int i40e_vlan_rx_add_vid(struct net_device *netdev,
790 __always_unused __be16 proto, u16 vid);
791int i40e_vlan_rx_kill_vid(struct net_device *netdev,
792 __always_unused __be16 proto, u16 vid);
793#endif
96664483 794int i40e_open(struct net_device *netdev);
6c167f58 795int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB
796void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
797int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
798int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
799struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
800 bool is_vf, bool is_netdev);
b36e9ab5
MW
801int i40e_del_mac_all_vlan(struct i40e_vsi *vsi, u8 *macaddr,
802 bool is_vf, bool is_netdev);
7daa6bf3
JB
803bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
804struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
805 bool is_vf, bool is_netdev);
38e00438 806#ifdef I40E_FCOE
38e00438 807int i40e_close(struct net_device *netdev);
16e5cc64
JF
808int __i40e_setup_tc(struct net_device *netdev, u32 handle, __be16 proto,
809 struct tc_to_netdev *tc);
38e00438
VD
810void i40e_netpoll(struct net_device *netdev);
811int i40e_fcoe_enable(struct net_device *netdev);
812int i40e_fcoe_disable(struct net_device *netdev);
813int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
814u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
815void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
816void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
21364bcf 817void i40e_init_pf_fcoe(struct i40e_pf *pf);
38e00438
VD
818int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
819void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
820int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
821 union i40e_rx_desc *rx_desc,
822 struct sk_buff *skb);
823void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
824 union i40e_rx_desc *rx_desc, u8 prog_id);
825#endif /* I40E_FCOE */
7daa6bf3 826void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP
827#ifdef CONFIG_I40E_DCB
828void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
750fcbcf 829 struct i40e_dcbx_config *old_cfg,
4e3b35b0
NP
830 struct i40e_dcbx_config *new_cfg);
831void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
832void i40e_dcbnl_setup(struct i40e_vsi *vsi);
833bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
834 struct i40e_dcbx_config *old_cfg,
835 struct i40e_dcbx_config *new_cfg);
836#endif /* CONFIG_I40E_DCB */
beb0dff1
JK
837void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
838void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
839void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
840void i40e_ptp_set_increment(struct i40e_pf *pf);
841int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
842int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
843void i40e_ptp_init(struct i40e_pf *pf);
844void i40e_ptp_stop(struct i40e_pf *pf);
51616018 845int i40e_is_vsi_uplink_mode_veb(struct i40e_vsi *vsi);
f4492db1
GR
846i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
847i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
848i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
c156f856 849void i40e_print_link_message(struct i40e_vsi *vsi, bool isup);
7daa6bf3 850#endif /* _I40E_H_ */
This page took 0.255447 seconds and 5 git commands to generate.