projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
i40e: Add NPAR BW get and set functions
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
88eee9bc 4 * Copyright(c) 2013 - 2015 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
2bc7ee8a 39#include <linux/iommu.h>
7daa6bf3
JB		 40#include <linux/slab.h>
41#include <linux/list.h>
42#include <linux/string.h>
43#include <linux/in.h>
44#include <linux/ip.h>
45#include <linux/tcp.h>
46#include <linux/sctp.h>
47#include <linux/pkt_sched.h>
48#include <linux/ipv6.h>
7daa6bf3
JB		 49#include <net/checksum.h>
50#include <net/ip6_checksum.h>
51#include <linux/ethtool.h>
52#include <linux/if_vlan.h>
beb0dff1
JK		 53#include <linux/clocksource.h>
54#include <linux/net_tstamp.h>
55#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 56#include "i40e_type.h"
57#include "i40e_prototype.h"
38e00438
VD		 58#ifdef I40E_FCOE
59#include "i40e_fcoe.h"
60#endif
7daa6bf3
JB		 61#include "i40e_virtchnl.h"
62#include "i40e_virtchnl_pf.h"
63#include "i40e_txrx.h"
4e3b35b0 64#include "i40e_dcb.h"
7daa6bf3
JB		 65
66/* Useful i40e defaults */
67#define I40E_BASE_PF_SEID 16
68#define I40E_BASE_VSI_SEID 512
69#define I40E_BASE_VEB_SEID 288
70#define I40E_MAX_VEB 16
71
72#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 73#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 74#define I40E_DEFAULT_NUM_DESCRIPTORS 512
75#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
76#define I40E_MIN_NUM_DESCRIPTORS 64
77#define I40E_MIN_MSIX 2
78#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
505682cd 79#define I40E_MIN_VSI_ALLOC 51 /* LAN, ATR, FCOE, 32 VF, 16 VMDQ */
7daa6bf3
JB		 80#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
81#define I40E_DEFAULT_QUEUES_PER_VF 4
82#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 83#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 84#define I40E_FDIR_RING 0
85#define I40E_FDIR_RING_COUNT 32
38e00438
VD		 86#ifdef I40E_FCOE
87#define I40E_DEFAULT_FCOE 8 /* default number of QPs for FCoE */
88#define I40E_MINIMUM_FCOE 1 /* minimum number of QPs for FCoE */
89#endif /* I40E_FCOE */
7daa6bf3 90#define I40E_MAX_AQ_BUF_SIZE 4096
07574897
MW		 91#define I40E_AQ_LEN 256
92#define I40E_AQ_WORK_LIMIT 32
7daa6bf3
JB		 93#define I40E_MAX_USER_PRIORITY 8
94#define I40E_DEFAULT_MSG_ENABLE 4
23527308 95#define I40E_QUEUE_WAIT_RETRY_LIMIT 10
b294ac70 96#define I40E_INT_NAME_STR_LEN (IFNAMSIZ + 9)
7daa6bf3
JB		 97
98#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 99#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 100#define I40E_NVM_VERSION_HI_SHIFT 12
101#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 102
103/* The values in here are decimal coded as hex as is the case in the NVM map*/
104#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 105#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 106
7daa6bf3
JB		 107/* magic for getting defines into strings */
108#define STRINGIFY(foo) #foo
109#define XSTRINGIFY(bar) STRINGIFY(bar)
110
7daa6bf3
JB		 111#define I40E_RX_DESC(R, i) \
112 ((ring_is_16byte_desc_enabled(R)) \
113 ? (union i40e_32byte_rx_desc *) \
114 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
115 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
116#define I40E_TX_DESC(R, i) \
117 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
118#define I40E_TX_CTXTDESC(R, i) \
119 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
120#define I40E_TX_FDIRDESC(R, i) \
121 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
122
123/* default to trying for four seconds */
124#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
125
126/* driver state flags */
127enum i40e_state_t {
128 __I40E_TESTING,
129 __I40E_CONFIG_BUSY,
130 __I40E_CONFIG_DONE,
131 __I40E_DOWN,
132 __I40E_NEEDS_RESTART,
133 __I40E_SERVICE_SCHED,
134 __I40E_ADMINQ_EVENT_PENDING,
135 __I40E_MDD_EVENT_PENDING,
136 __I40E_VFLR_EVENT_PENDING,
137 __I40E_RESET_RECOVERY_PENDING,
138 __I40E_RESET_INTR_RECEIVED,
139 __I40E_REINIT_REQUESTED,
140 __I40E_PF_RESET_REQUESTED,
141 __I40E_CORE_RESET_REQUESTED,
142 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 143 __I40E_EMP_RESET_REQUESTED,
9df42d1a 144 __I40E_EMP_RESET_INTR_RECEIVED,
7daa6bf3 145 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 146 __I40E_SUSPENDED,
9ce34f02 147 __I40E_PTP_TX_IN_PROGRESS,
4eb3f768 148 __I40E_BAD_EEPROM,
b5d06f05 149 __I40E_DOWN_REQUESTED,
1e1be8f6 150 __I40E_FD_FLUSH_REQUESTED,
a316f651 151 __I40E_RESET_FAILED,
69129dc3 152 __I40E_PORT_TX_SUSPENDED,
3ba9bcb4 153 __I40E_VF_DISABLE,
7daa6bf3
JB		 154};
155
156enum i40e_interrupt_policy {
157 I40E_INTERRUPT_BEST_CASE,
158 I40E_INTERRUPT_MEDIUM,
159 I40E_INTERRUPT_LOWEST
160};
161
162struct i40e_lump_tracking {
163 u16 num_entries;
164 u16 search_hint;
165 u16 list[0];
166#define I40E_PILE_VALID_BIT 0x8000
167};
168
169#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
55a5e60b
ASJ		 170#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
171#define I40E_FDIR_BUFFER_FULL_MARGIN 10
12957388 172#define I40E_FDIR_BUFFER_HEAD_ROOM 32
55a5e60b 173
433c47de
ASJ		 174enum i40e_fd_stat_idx {
175 I40E_FD_STAT_ATR,
176 I40E_FD_STAT_SB,
177 I40E_FD_STAT_PF_COUNT
178};
179#define I40E_FD_STAT_PF_IDX(pf_id) ((pf_id) * I40E_FD_STAT_PF_COUNT)
180#define I40E_FD_ATR_STAT_IDX(pf_id) \
181 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_ATR)
182#define I40E_FD_SB_STAT_IDX(pf_id) \
183 (I40E_FD_STAT_PF_IDX(pf_id) + I40E_FD_STAT_SB)
184
17a73f6b
JG		 185struct i40e_fdir_filter {
186 struct hlist_node fdir_node;
187 /* filter ipnut set */
188 u8 flow_type;
189 u8 ip4_proto;
04b73bd7 190 /* TX packet view of src and dst */
17a73f6b
JG		 191 __be32 dst_ip[4];
192 __be32 src_ip[4];
193 __be16 src_port;
194 __be16 dst_port;
195 __be32 sctp_v_tag;
196 /* filter control */
7daa6bf3
JB		 197 u16 q_index;
198 u8 flex_off;
199 u8 pctype;
200 u16 dest_vsi;
201 u8 dest_ctl;
202 u8 fd_status;
203 u16 cnt_index;
204 u32 fd_id;
7daa6bf3
JB		 205};
206
4e3b35b0
NP		 207#define I40E_ETH_P_LLDP 0x88cc
208
7daa6bf3
JB		 209#define I40E_DCB_PRIO_TYPE_STRICT 0
210#define I40E_DCB_PRIO_TYPE_ETS 1
211#define I40E_DCB_STRICT_PRIO_CREDITS 127
212#define I40E_MAX_USER_PRIORITY 8
213/* DCB per TC information data structure */
214struct i40e_tc_info {
215 u16 qoffset; /* Queue offset from base queue */
216 u16 qcount; /* Total Queues */
217 u8 netdev_tc; /* Netdev TC index if netdev associated */
218};
219
220/* TC configuration data structure */
221struct i40e_tc_configuration {
222 u8 numtc; /* Total number of enabled TCs */
223 u8 enabled_tc; /* TC map */
224 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
225};
226
227/* struct that defines the Ethernet device */
228struct i40e_pf {
229 struct pci_dev *pdev;
230 struct i40e_hw hw;
231 unsigned long state;
232 unsigned long link_check_timeout;
233 struct msix_entry *msix_entries;
7daa6bf3
JB		 234 bool fc_autoneg_status;
235
236 u16 eeprom_version;
6c167f58 237 u16 num_vmdq_vsis; /* num vmdq vsis this pf has set up */
7daa6bf3
JB		 238 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
239 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
240 u16 num_req_vfs; /* num vfs requested for this vf */
241 u16 num_vf_qps; /* num queue pairs per vf */
38e00438
VD		 242#ifdef I40E_FCOE
243 u16 num_fcoe_qps; /* num fcoe queues this pf has set up */
244 u16 num_fcoe_msix; /* num queue vectors per fcoe pool */
245#endif /* I40E_FCOE */
7daa6bf3
JB		 246 u16 num_lan_qps; /* num lan queues this pf has set up */
247 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 248 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 249 u16 rss_size; /* num queues in the RSS array */
250 u16 rss_size_max; /* HW defined max RSS queues */
251 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
505682cd 252 u16 num_alloc_vsi; /* num VSIs this driver supports */
7daa6bf3 253 u8 atr_sample_rate;
8e2773ae 254 bool wol_en;
7daa6bf3 255
17a73f6b
JG		 256 struct hlist_head fdir_filter_list;
257 u16 fdir_pf_active_filters;
433c47de
ASJ		 258 u16 fd_sb_cnt_idx;
259 u16 fd_atr_cnt_idx;
1e1be8f6 260 unsigned long fd_flush_timestamp;
60793f4a 261 u32 fd_flush_cnt;
1e1be8f6
ASJ		 262 u32 fd_add_err;
263 u32 fd_atr_cnt;
264 u32 fd_tcp_rule;
17a73f6b 265
a1c9a9d9
JK		 266#ifdef CONFIG_I40E_VXLAN
267 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
268 u16 pending_vxlan_bitmap;
269
270#endif
7daa6bf3
JB		 271 enum i40e_interrupt_policy int_policy;
272 u16 rx_itr_default;
273 u16 tx_itr_default;
274 u16 msg_enable;
b294ac70 275 char int_name[I40E_INT_NAME_STR_LEN];
7daa6bf3 276 u16 adminq_work_limit; /* num of admin receive queue desc to process */
21536717
SN		 277 unsigned long service_timer_period;
278 unsigned long service_timer_previous;
7daa6bf3
JB		 279 struct timer_list service_timer;
280 struct work_struct service_task;
281
282 u64 flags;
283#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
284#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
285#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
286#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
287#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
288#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 289#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
290#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
291#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
38e00438
VD		 292#ifdef I40E_FCOE
293#define I40E_FLAG_FCOE_ENABLED (u64)(1 << 11)
294#endif /* I40E_FCOE */
9f52987b
NP		 295#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
296#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
297#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
298#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
299#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
300#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
301#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
302#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 303#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
304#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 305#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 306#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
307#ifdef CONFIG_I40E_VXLAN
308#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
309#endif
1f224ad2 310#define I40E_FLAG_PORT_ID_VALID (u64)(1 << 28)
4d9b6043 311#define I40E_FLAG_DCB_CAPABLE (u64)(1 << 29)
7daa6bf3 312
61dade7e
ASJ		 313 /* tracks features that get auto disabled by errors */
314 u64 auto_disable_flags;
315
38e00438
VD		 316#ifdef I40E_FCOE
317 struct i40e_fcoe fcoe;
318
319#endif /* I40E_FCOE */
7daa6bf3
JB		 320 bool stat_offsets_loaded;
321 struct i40e_hw_port_stats stats;
322 struct i40e_hw_port_stats stats_offsets;
323 u32 tx_timeout_count;
324 u32 tx_timeout_recovery_level;
325 unsigned long tx_timeout_last_recovery;
810b3ae4 326 u32 tx_sluggish_count;
7daa6bf3
JB		 327 u32 hw_csum_rx_error;
328 u32 led_status;
329 u16 corer_count; /* Core reset count */
330 u16 globr_count; /* Global reset count */
331 u16 empr_count; /* EMP reset count */
332 u16 pfr_count; /* PF reset count */
cd92e72f 333 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 334
335 struct mutex switch_mutex;
336 u16 lan_vsi; /* our default LAN VSI */
337 u16 lan_veb; /* initial relay, if exists */
338#define I40E_NO_VEB 0xffff
339#define I40E_NO_VSI 0xffff
340 u16 next_vsi; /* Next unallocated VSI - 0-based! */
341 struct i40e_vsi **vsi;
342 struct i40e_veb *veb[I40E_MAX_VEB];
343
344 struct i40e_lump_tracking *qp_pile;
345 struct i40e_lump_tracking *irq_pile;
346
347 /* switch config info */
348 u16 pf_seid;
349 u16 main_vsi_seid;
350 u16 mac_seid;
7daa6bf3
JB		 351 struct kobject *switch_kobj;
352#ifdef CONFIG_DEBUG_FS
353 struct dentry *i40e_dbg_pf;
354#endif /* CONFIG_DEBUG_FS */
355
93cd765b
ASJ		 356 u16 instance; /* A unique number per i40e_pf instance in the system */
357
7daa6bf3
JB		 358 /* sr-iov config info */
359 struct i40e_vf *vf;
360 int num_alloc_vfs; /* actual number of VFs allocated */
361 u32 vf_aq_requests;
362
363 /* DCBx/DCBNL capability for PF that indicates
364 * whether DCBx is managed by firmware or host
365 * based agent (LLDPAD). Also, indicates what
366 * flavor of DCBx protocol (IEEE/CEE) is supported
367 * by the device. For now we're supporting IEEE
368 * mode only.
369 */
370 u16 dcbx_cap;
371
372 u32 fcoe_hmc_filt_num;
373 u32 fcoe_hmc_cntx_num;
374 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 375
376 struct ptp_clock *ptp_clock;
377 struct ptp_clock_info ptp_caps;
378 struct sk_buff *ptp_tx_skb;
beb0dff1 379 struct hwtstamp_config tstamp_config;
beb0dff1
JK		 380 unsigned long last_rx_ptp_check;
381 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
382 u64 ptp_base_adj;
383 u32 tx_hwtstamp_timeouts;
384 u32 rx_hwtstamp_cleared;
385 bool ptp_tx;
386 bool ptp_rx;
e157ea30 387 u16 rss_table_size;
f4492db1
GR		 388 /* These are only valid in NPAR modes */
389 u32 npar_max_bw;
390 u32 npar_min_bw;
7daa6bf3
JB		 391};
392
393struct i40e_mac_filter {
394 struct list_head list;
395 u8 macaddr[ETH_ALEN];
396#define I40E_VLAN_ANY -1
397 s16 vlan;
398 u8 counter; /* number of instances of this filter */
399 bool is_vf; /* filter belongs to a VF */
400 bool is_netdev; /* filter belongs to a netdev */
401 bool changed; /* filter needs to be sync'd to the HW */
6252c7e4 402 bool is_laa; /* filter is a Locally Administered Address */
7daa6bf3
JB		 403};
404
405struct i40e_veb {
406 struct i40e_pf *pf;
407 u16 idx;
408 u16 veb_idx; /* index of VEB parent */
409 u16 seid;
410 u16 uplink_seid;
411 u16 stats_idx; /* index of VEB parent */
412 u8 enabled_tc;
413 u16 flags;
414 u16 bw_limit;
415 u8 bw_max_quanta;
416 bool is_abs_credits;
417 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
418 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
419 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
420 struct kobject *kobj;
421 bool stat_offsets_loaded;
422 struct i40e_eth_stats stats;
423 struct i40e_eth_stats stats_offsets;
424};
425
426/* struct that defines a VSI, associated with a dev */
427struct i40e_vsi {
428 struct net_device *netdev;
429 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
430 bool netdev_registered;
431 bool stat_offsets_loaded;
432
433 u32 current_netdev_flags;
434 unsigned long state;
435#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
436#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
437 unsigned long flags;
438
439 struct list_head mac_filter_list;
440
441 /* VSI stats */
442 struct rtnl_link_stats64 net_stats;
443 struct rtnl_link_stats64 net_stats_offsets;
444 struct i40e_eth_stats eth_stats;
445 struct i40e_eth_stats eth_stats_offsets;
38e00438
VD		 446#ifdef I40E_FCOE
447 struct i40e_fcoe_stats fcoe_stats;
448 struct i40e_fcoe_stats fcoe_stats_offsets;
449 bool fcoe_stat_offsets_loaded;
450#endif
7daa6bf3
JB		 451 u32 tx_restart;
452 u32 tx_busy;
453 u32 rx_buf_failed;
454 u32 rx_page_failed;
455
9f65e15b
AD		 456 /* These are containers of ring pointers, allocated at run-time */
457 struct i40e_ring **rx_rings;
458 struct i40e_ring **tx_rings;
7daa6bf3
JB		 459
460 u16 work_limit;
461 /* high bit set means dynamic, use accessor routines to read/write.
462 * hardware only supports 2us resolution for the ITR registers.
463 * these values always store the USER setting, and must be converted
464 * before programming to a register.
465 */
466 u16 rx_itr_setting;
467 u16 tx_itr_setting;
468
469 u16 max_frame;
470 u16 rx_hdr_len;
471 u16 rx_buf_len;
472 u8 dtype;
473
474 /* List of q_vectors allocated to this VSI */
493fb300 475 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 476 int num_q_vectors;
477 int base_vector;
63741846 478 bool irqs_ready;
7daa6bf3
JB		 479
480 u16 seid; /* HW index of this VSI (absolute index) */
481 u16 id; /* VSI number */
482 u16 uplink_seid;
483
484 u16 base_queue; /* vsi's first queue in hw array */
485 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
486 u16 num_queue_pairs; /* Used tx and rx pairs */
487 u16 num_desc;
488 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
489 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
490
491 struct i40e_tc_configuration tc_config;
492 struct i40e_aqc_vsi_properties_data info;
493
494 /* VSI BW limit (absolute across all TCs) */
495 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
496 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
497
498 /* Relative TC credits across VSIs */
499 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
500 /* TC BW limit credits within VSI */
501 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
502 /* TC BW limit max quanta within VSI */
503 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
504
505 struct i40e_pf *back; /* Backreference to associated PF */
506 u16 idx; /* index in pf->vsi[] */
507 u16 veb_idx; /* index of VEB parent */
508 struct kobject *kobj; /* sysfs object */
509
510 /* VSI specific handlers */
511 irqreturn_t (*irq_handler)(int irq, void *data);
88eee9bc
CW		 512
513 /* current rxnfc data */
514 struct ethtool_rxnfc rxnfc; /* current rss hash opts */
7daa6bf3
JB		 515} ____cacheline_internodealigned_in_smp;
516
517struct i40e_netdev_priv {
518 struct i40e_vsi *vsi;
519};
520
521/* struct that defines an interrupt vector */
522struct i40e_q_vector {
523 struct i40e_vsi *vsi;
524
525 u16 v_idx; /* index in the vsi->q_vector array. */
526 u16 reg_idx; /* register index of the interrupt */
527
528 struct napi_struct napi;
529
530 struct i40e_ring_container rx;
531 struct i40e_ring_container tx;
532
533 u8 num_ringpairs; /* total number of ring pairs in vector */
534
7daa6bf3 535 cpumask_t affinity_mask;
493fb300 536 struct rcu_head rcu; /* to avoid race with update stats on free */
b294ac70 537 char name[I40E_INT_NAME_STR_LEN];
7daa6bf3
JB		 538} ____cacheline_internodealigned_in_smp;
539
540/* lan device */
541struct i40e_device {
542 struct list_head list;
543 struct i40e_pf *pf;
544};
545
546/**
547 * i40e_fw_version_str - format the FW and NVM version strings
548 * @hw: ptr to the hardware info
549 **/
550static inline char *i40e_fw_version_str(struct i40e_hw *hw)
551{
552 static char buf[32];
553
554 snprintf(buf, sizeof(buf),
fe310704 555 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 556 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
557 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 558 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
559 I40E_NVM_VERSION_HI_SHIFT,
560 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
561 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 562 hw->nvm.eetrack);
563
564 return buf;
565}
566
567/**
568 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
569 * @netdev: the corresponding netdev
570 *
571 * Return the PF struct for the given netdev
572 **/
573static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
574{
575 struct i40e_netdev_priv *np = netdev_priv(netdev);
576 struct i40e_vsi *vsi = np->vsi;
577
578 return vsi->back;
579}
580
581static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
582 irqreturn_t (*irq_handler)(int, void *))
583{
584 vsi->irq_handler = irq_handler;
585}
586
587/**
588 * i40e_rx_is_programming_status - check for programming status descriptor
589 * @qw: the first quad word of the program status descriptor
590 *
591 * The value of in the descriptor length field indicate if this
592 * is a programming status descriptor for flow director or FCoE
593 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
594 * it is a packet descriptor.
595 **/
596static inline bool i40e_rx_is_programming_status(u64 qw)
597{
598 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
599 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
600}
601
082def10
ASJ		 602/**
603 * i40e_get_fd_cnt_all - get the total FD filter space available
604 * @pf: pointer to the pf struct
605 **/
606static inline int i40e_get_fd_cnt_all(struct i40e_pf *pf)
607{
608 return pf->hw.fdir_shared_filter_count + pf->fdir_pf_filter_count;
609}
610
7daa6bf3
JB		 611/* needed by i40e_ethtool.c */
612int i40e_up(struct i40e_vsi *vsi);
613void i40e_down(struct i40e_vsi *vsi);
614extern const char i40e_driver_name[];
615extern const char i40e_driver_version_str[];
23326186 616void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 617void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
618void i40e_update_stats(struct i40e_vsi *vsi);
619void i40e_update_eth_stats(struct i40e_vsi *vsi);
620struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
621int i40e_fetch_switch_configuration(struct i40e_pf *pf,
622 bool printconfig);
623
17a73f6b 624int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 625 struct i40e_pf *pf, bool add);
17a73f6b
JG		 626int i40e_add_del_fdir(struct i40e_vsi *vsi,
627 struct i40e_fdir_filter *input, bool add);
55a5e60b
ASJ		 628void i40e_fdir_check_and_reenable(struct i40e_pf *pf);
629int i40e_get_current_fd_count(struct i40e_pf *pf);
12957388 630int i40e_get_cur_guaranteed_fd_count(struct i40e_pf *pf);
1e1be8f6 631int i40e_get_current_atr_cnt(struct i40e_pf *pf);
7c3c288b 632bool i40e_set_ntuple(struct i40e_pf *pf, netdev_features_t features);
7daa6bf3
JB		 633void i40e_set_ethtool_ops(struct net_device *netdev);
634struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
635 u8 *macaddr, s16 vlan,
636 bool is_vf, bool is_netdev);
637void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
638 bool is_vf, bool is_netdev);
639int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
640struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
641 u16 uplink, u32 param1);
642int i40e_vsi_release(struct i40e_vsi *vsi);
643struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
644 struct i40e_vsi *start_vsi);
38e00438
VD		 645#ifdef I40E_FCOE
646void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
647 struct i40e_vsi_context *ctxt,
648 u8 enabled_tc, bool is_add);
649#endif
fc18eaa0 650int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 651int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
7daa6bf3
JB		 652struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
653 u16 downlink_seid, u8 enabled_tc);
654void i40e_veb_release(struct i40e_veb *veb);
655
4e3b35b0 656int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 657i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
658void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
659void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
660void i40e_pf_reset_stats(struct i40e_pf *pf);
661#ifdef CONFIG_DEBUG_FS
662void i40e_dbg_pf_init(struct i40e_pf *pf);
663void i40e_dbg_pf_exit(struct i40e_pf *pf);
664void i40e_dbg_init(void);
665void i40e_dbg_exit(void);
666#else
667static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
668static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
669static inline void i40e_dbg_init(void) {}
670static inline void i40e_dbg_exit(void) {}
671#endif /* CONFIG_DEBUG_FS*/
672void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
5c2cebda 673void i40e_irq_dynamic_disable(struct i40e_vsi *vsi, int vector);
2ef28cfb 674void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 675void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
38e00438
VD		 676#ifdef I40E_FCOE
677struct rtnl_link_stats64 *i40e_get_netdev_stats_struct(
678 struct net_device *netdev,
679 struct rtnl_link_stats64 *storage);
680int i40e_set_mac(struct net_device *netdev, void *p);
681void i40e_set_rx_mode(struct net_device *netdev);
682#endif
7daa6bf3 683int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
38e00438
VD		 684#ifdef I40E_FCOE
685void i40e_tx_timeout(struct net_device *netdev);
686int i40e_vlan_rx_add_vid(struct net_device *netdev,
687 __always_unused __be16 proto, u16 vid);
688int i40e_vlan_rx_kill_vid(struct net_device *netdev,
689 __always_unused __be16 proto, u16 vid);
690#endif
6c167f58 691int i40e_vsi_open(struct i40e_vsi *vsi);
7daa6bf3
JB		 692void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
693int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
694int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
695struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
696 bool is_vf, bool is_netdev);
697bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
698struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
699 bool is_vf, bool is_netdev);
38e00438
VD		 700#ifdef I40E_FCOE
701int i40e_open(struct net_device *netdev);
702int i40e_close(struct net_device *netdev);
703int i40e_setup_tc(struct net_device *netdev, u8 tc);
704void i40e_netpoll(struct net_device *netdev);
705int i40e_fcoe_enable(struct net_device *netdev);
706int i40e_fcoe_disable(struct net_device *netdev);
707int i40e_fcoe_vsi_init(struct i40e_vsi *vsi, struct i40e_vsi_context *ctxt);
708u8 i40e_get_fcoe_tc_map(struct i40e_pf *pf);
709void i40e_fcoe_config_netdev(struct net_device *netdev, struct i40e_vsi *vsi);
710void i40e_fcoe_vsi_setup(struct i40e_pf *pf);
711int i40e_init_pf_fcoe(struct i40e_pf *pf);
712int i40e_fcoe_setup_ddp_resources(struct i40e_vsi *vsi);
713void i40e_fcoe_free_ddp_resources(struct i40e_vsi *vsi);
714int i40e_fcoe_handle_offload(struct i40e_ring *rx_ring,
715 union i40e_rx_desc *rx_desc,
716 struct sk_buff *skb);
717void i40e_fcoe_handle_status(struct i40e_ring *rx_ring,
718 union i40e_rx_desc *rx_desc, u8 prog_id);
719#endif /* I40E_FCOE */
7daa6bf3 720void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 721#ifdef CONFIG_I40E_DCB
722void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
723 struct i40e_dcbx_config *new_cfg);
724void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
725void i40e_dcbnl_setup(struct i40e_vsi *vsi);
726bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
727 struct i40e_dcbx_config *old_cfg,
728 struct i40e_dcbx_config *new_cfg);
729#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 730void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
731void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
732void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
733void i40e_ptp_set_increment(struct i40e_pf *pf);
734int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
735int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
736void i40e_ptp_init(struct i40e_pf *pf);
737void i40e_ptp_stop(struct i40e_pf *pf);
f4492db1
GR		 738
739i40e_status i40e_get_npar_bw_setting(struct i40e_pf *pf);
740i40e_status i40e_set_npar_bw_setting(struct i40e_pf *pf);
741i40e_status i40e_commit_npar_bw_setting(struct i40e_pf *pf);
7daa6bf3 742#endif /* _I40E_H_ */
Linux kernel - Deliverables
This page took 0.169106 seconds and 5 git commands to generate.