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i40e: Fix function comments
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e.h
CommitLineData
7daa6bf3
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
dc641b73 4 * Copyright(c) 2013 - 2014 Intel Corporation.
7daa6bf3
JB		 5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
dc641b73
GR		 15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
7daa6bf3
JB		 17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27#ifndef _I40E_H_
28#define _I40E_H_
29
30#include <net/tcp.h>
8144f0f7 31#include <net/udp.h>
7daa6bf3
JB		 32#include <linux/types.h>
33#include <linux/errno.h>
34#include <linux/module.h>
35#include <linux/pci.h>
36#include <linux/aer.h>
37#include <linux/netdevice.h>
38#include <linux/ioport.h>
39#include <linux/slab.h>
40#include <linux/list.h>
41#include <linux/string.h>
42#include <linux/in.h>
43#include <linux/ip.h>
44#include <linux/tcp.h>
45#include <linux/sctp.h>
46#include <linux/pkt_sched.h>
47#include <linux/ipv6.h>
7daa6bf3
JB		 48#include <net/checksum.h>
49#include <net/ip6_checksum.h>
50#include <linux/ethtool.h>
51#include <linux/if_vlan.h>
beb0dff1
JK		 52#include <linux/clocksource.h>
53#include <linux/net_tstamp.h>
54#include <linux/ptp_clock_kernel.h>
7daa6bf3
JB		 55#include "i40e_type.h"
56#include "i40e_prototype.h"
57#include "i40e_virtchnl.h"
58#include "i40e_virtchnl_pf.h"
59#include "i40e_txrx.h"
4e3b35b0 60#include "i40e_dcb.h"
7daa6bf3
JB		 61
62/* Useful i40e defaults */
63#define I40E_BASE_PF_SEID 16
64#define I40E_BASE_VSI_SEID 512
65#define I40E_BASE_VEB_SEID 288
66#define I40E_MAX_VEB 16
67
68#define I40E_MAX_NUM_DESCRIPTORS 4096
a45e88c9 69#define I40E_MAX_REGISTER 0x800000
7daa6bf3
JB		 70#define I40E_DEFAULT_NUM_DESCRIPTORS 512
71#define I40E_REQ_DESCRIPTOR_MULTIPLE 32
72#define I40E_MIN_NUM_DESCRIPTORS 64
73#define I40E_MIN_MSIX 2
74#define I40E_DEFAULT_NUM_VMDQ_VSI 8 /* max 256 VSIs */
75#define I40E_DEFAULT_QUEUES_PER_VMDQ 2 /* max 16 qps */
76#define I40E_DEFAULT_QUEUES_PER_VF 4
77#define I40E_DEFAULT_QUEUES_PER_TC 1 /* should be a power of 2 */
4e3b35b0 78#define I40E_MAX_QUEUES_PER_TC 64 /* should be a power of 2 */
7daa6bf3
JB		 79#define I40E_FDIR_RING 0
80#define I40E_FDIR_RING_COUNT 32
81#define I40E_MAX_AQ_BUF_SIZE 4096
82#define I40E_AQ_LEN 32
83#define I40E_AQ_WORK_LIMIT 16
84#define I40E_MAX_USER_PRIORITY 8
85#define I40E_DEFAULT_MSG_ENABLE 4
86
87#define I40E_NVM_VERSION_LO_SHIFT 0
fe310704 88#define I40E_NVM_VERSION_LO_MASK (0xff << I40E_NVM_VERSION_LO_SHIFT)
ff80301e
JB		 89#define I40E_NVM_VERSION_HI_SHIFT 12
90#define I40E_NVM_VERSION_HI_MASK (0xf << I40E_NVM_VERSION_HI_SHIFT)
fe310704
AS		 91
92/* The values in here are decimal coded as hex as is the case in the NVM map*/
93#define I40E_CURRENT_NVM_VERSION_HI 0x2
ff80301e 94#define I40E_CURRENT_NVM_VERSION_LO 0x40
fe310704 95
7daa6bf3
JB		 96/* magic for getting defines into strings */
97#define STRINGIFY(foo) #foo
98#define XSTRINGIFY(bar) STRINGIFY(bar)
99
100#ifndef ARCH_HAS_PREFETCH
101#define prefetch(X)
102#endif
103
104#define I40E_RX_DESC(R, i) \
105 ((ring_is_16byte_desc_enabled(R)) \
106 ? (union i40e_32byte_rx_desc *) \
107 (&(((union i40e_16byte_rx_desc *)((R)->desc))[i])) \
108 : (&(((union i40e_32byte_rx_desc *)((R)->desc))[i])))
109#define I40E_TX_DESC(R, i) \
110 (&(((struct i40e_tx_desc *)((R)->desc))[i]))
111#define I40E_TX_CTXTDESC(R, i) \
112 (&(((struct i40e_tx_context_desc *)((R)->desc))[i]))
113#define I40E_TX_FDIRDESC(R, i) \
114 (&(((struct i40e_filter_program_desc *)((R)->desc))[i]))
115
116/* default to trying for four seconds */
117#define I40E_TRY_LINK_TIMEOUT (4 * HZ)
118
119/* driver state flags */
120enum i40e_state_t {
121 __I40E_TESTING,
122 __I40E_CONFIG_BUSY,
123 __I40E_CONFIG_DONE,
124 __I40E_DOWN,
125 __I40E_NEEDS_RESTART,
126 __I40E_SERVICE_SCHED,
127 __I40E_ADMINQ_EVENT_PENDING,
128 __I40E_MDD_EVENT_PENDING,
129 __I40E_VFLR_EVENT_PENDING,
130 __I40E_RESET_RECOVERY_PENDING,
131 __I40E_RESET_INTR_RECEIVED,
132 __I40E_REINIT_REQUESTED,
133 __I40E_PF_RESET_REQUESTED,
134 __I40E_CORE_RESET_REQUESTED,
135 __I40E_GLOBAL_RESET_REQUESTED,
7823fe34 136 __I40E_EMP_RESET_REQUESTED,
7daa6bf3 137 __I40E_FILTER_OVERFLOW_PROMISC,
9007bccd 138 __I40E_SUSPENDED,
7daa6bf3
JB		 139};
140
141enum i40e_interrupt_policy {
142 I40E_INTERRUPT_BEST_CASE,
143 I40E_INTERRUPT_MEDIUM,
144 I40E_INTERRUPT_LOWEST
145};
146
147struct i40e_lump_tracking {
148 u16 num_entries;
149 u16 search_hint;
150 u16 list[0];
151#define I40E_PILE_VALID_BIT 0x8000
152};
153
154#define I40E_DEFAULT_ATR_SAMPLE_RATE 20
17a73f6b
JG		 155#define I40E_FDIR_MAX_RAW_PACKET_SIZE 512
156struct i40e_fdir_filter {
157 struct hlist_node fdir_node;
158 /* filter ipnut set */
159 u8 flow_type;
160 u8 ip4_proto;
161 __be32 dst_ip[4];
162 __be32 src_ip[4];
163 __be16 src_port;
164 __be16 dst_port;
165 __be32 sctp_v_tag;
166 /* filter control */
7daa6bf3
JB		 167 u16 q_index;
168 u8 flex_off;
169 u8 pctype;
170 u16 dest_vsi;
171 u8 dest_ctl;
172 u8 fd_status;
173 u16 cnt_index;
174 u32 fd_id;
7daa6bf3
JB		 175};
176
4e3b35b0
NP		 177#define I40E_ETH_P_LLDP 0x88cc
178
7daa6bf3
JB		 179#define I40E_DCB_PRIO_TYPE_STRICT 0
180#define I40E_DCB_PRIO_TYPE_ETS 1
181#define I40E_DCB_STRICT_PRIO_CREDITS 127
182#define I40E_MAX_USER_PRIORITY 8
183/* DCB per TC information data structure */
184struct i40e_tc_info {
185 u16 qoffset; /* Queue offset from base queue */
186 u16 qcount; /* Total Queues */
187 u8 netdev_tc; /* Netdev TC index if netdev associated */
188};
189
190/* TC configuration data structure */
191struct i40e_tc_configuration {
192 u8 numtc; /* Total number of enabled TCs */
193 u8 enabled_tc; /* TC map */
194 struct i40e_tc_info tc_info[I40E_MAX_TRAFFIC_CLASS];
195};
196
197/* struct that defines the Ethernet device */
198struct i40e_pf {
199 struct pci_dev *pdev;
200 struct i40e_hw hw;
201 unsigned long state;
202 unsigned long link_check_timeout;
203 struct msix_entry *msix_entries;
204 u16 num_msix_entries;
205 bool fc_autoneg_status;
206
207 u16 eeprom_version;
208 u16 num_vmdq_vsis; /* num vmdq pools this pf has set up */
209 u16 num_vmdq_qps; /* num queue pairs per vmdq pool */
210 u16 num_vmdq_msix; /* num queue vectors per vmdq pool */
211 u16 num_req_vfs; /* num vfs requested for this vf */
212 u16 num_vf_qps; /* num queue pairs per vf */
7daa6bf3
JB		 213 u16 num_lan_qps; /* num lan queues this pf has set up */
214 u16 num_lan_msix; /* num queue vectors for the base pf vsi */
f8ff1464 215 int queues_left; /* queues left unclaimed */
7daa6bf3
JB		 216 u16 rss_size; /* num queues in the RSS array */
217 u16 rss_size_max; /* HW defined max RSS queues */
218 u16 fdir_pf_filter_count; /* num of guaranteed filters for this PF */
219 u8 atr_sample_rate;
8e2773ae 220 bool wol_en;
7daa6bf3 221
17a73f6b
JG		 222 struct hlist_head fdir_filter_list;
223 u16 fdir_pf_active_filters;
224
a1c9a9d9
JK		 225#ifdef CONFIG_I40E_VXLAN
226 __be16 vxlan_ports[I40E_MAX_PF_UDP_OFFLOAD_PORTS];
227 u16 pending_vxlan_bitmap;
228
229#endif
7daa6bf3
JB		 230 enum i40e_interrupt_policy int_policy;
231 u16 rx_itr_default;
232 u16 tx_itr_default;
233 u16 msg_enable;
234 char misc_int_name[IFNAMSIZ + 9];
235 u16 adminq_work_limit; /* num of admin receive queue desc to process */
236 int service_timer_period;
237 struct timer_list service_timer;
238 struct work_struct service_task;
239
240 u64 flags;
241#define I40E_FLAG_RX_CSUM_ENABLED (u64)(1 << 1)
242#define I40E_FLAG_MSI_ENABLED (u64)(1 << 2)
243#define I40E_FLAG_MSIX_ENABLED (u64)(1 << 3)
244#define I40E_FLAG_RX_1BUF_ENABLED (u64)(1 << 4)
245#define I40E_FLAG_RX_PS_ENABLED (u64)(1 << 5)
246#define I40E_FLAG_RSS_ENABLED (u64)(1 << 6)
9f52987b
NP		 247#define I40E_FLAG_VMDQ_ENABLED (u64)(1 << 7)
248#define I40E_FLAG_FDIR_REQUIRES_REINIT (u64)(1 << 8)
249#define I40E_FLAG_NEED_LINK_UPDATE (u64)(1 << 9)
250#define I40E_FLAG_IN_NETPOLL (u64)(1 << 12)
251#define I40E_FLAG_16BYTE_RX_DESC_ENABLED (u64)(1 << 13)
252#define I40E_FLAG_CLEAN_ADMINQ (u64)(1 << 14)
253#define I40E_FLAG_FILTER_SYNC (u64)(1 << 15)
254#define I40E_FLAG_PROCESS_MDD_EVENT (u64)(1 << 17)
255#define I40E_FLAG_PROCESS_VFLR_EVENT (u64)(1 << 18)
256#define I40E_FLAG_SRIOV_ENABLED (u64)(1 << 19)
257#define I40E_FLAG_DCB_ENABLED (u64)(1 << 20)
60ea5f83
JB		 258#define I40E_FLAG_FD_SB_ENABLED (u64)(1 << 21)
259#define I40E_FLAG_FD_ATR_ENABLED (u64)(1 << 22)
beb0dff1 260#define I40E_FLAG_PTP (u64)(1 << 25)
a1c9a9d9
JK		 261#define I40E_FLAG_MFP_ENABLED (u64)(1 << 26)
262#ifdef CONFIG_I40E_VXLAN
263#define I40E_FLAG_VXLAN_FILTER_SYNC (u64)(1 << 27)
264#endif
7daa6bf3 265
7daa6bf3
JB		 266 bool stat_offsets_loaded;
267 struct i40e_hw_port_stats stats;
268 struct i40e_hw_port_stats stats_offsets;
269 u32 tx_timeout_count;
270 u32 tx_timeout_recovery_level;
271 unsigned long tx_timeout_last_recovery;
272 u32 hw_csum_rx_error;
273 u32 led_status;
274 u16 corer_count; /* Core reset count */
275 u16 globr_count; /* Global reset count */
276 u16 empr_count; /* EMP reset count */
277 u16 pfr_count; /* PF reset count */
cd92e72f 278 u16 sw_int_count; /* SW interrupt count */
7daa6bf3
JB		 279
280 struct mutex switch_mutex;
281 u16 lan_vsi; /* our default LAN VSI */
282 u16 lan_veb; /* initial relay, if exists */
283#define I40E_NO_VEB 0xffff
284#define I40E_NO_VSI 0xffff
285 u16 next_vsi; /* Next unallocated VSI - 0-based! */
286 struct i40e_vsi **vsi;
287 struct i40e_veb *veb[I40E_MAX_VEB];
288
289 struct i40e_lump_tracking *qp_pile;
290 struct i40e_lump_tracking *irq_pile;
291
292 /* switch config info */
293 u16 pf_seid;
294 u16 main_vsi_seid;
295 u16 mac_seid;
296 struct i40e_aqc_get_switch_config_data *sw_config;
297 struct kobject *switch_kobj;
298#ifdef CONFIG_DEBUG_FS
299 struct dentry *i40e_dbg_pf;
300#endif /* CONFIG_DEBUG_FS */
301
93cd765b
ASJ		 302 u16 instance; /* A unique number per i40e_pf instance in the system */
303
7daa6bf3
JB		 304 /* sr-iov config info */
305 struct i40e_vf *vf;
306 int num_alloc_vfs; /* actual number of VFs allocated */
307 u32 vf_aq_requests;
308
309 /* DCBx/DCBNL capability for PF that indicates
310 * whether DCBx is managed by firmware or host
311 * based agent (LLDPAD). Also, indicates what
312 * flavor of DCBx protocol (IEEE/CEE) is supported
313 * by the device. For now we're supporting IEEE
314 * mode only.
315 */
316 u16 dcbx_cap;
317
318 u32 fcoe_hmc_filt_num;
319 u32 fcoe_hmc_cntx_num;
320 struct i40e_filter_control_settings filter_settings;
beb0dff1
JK		 321
322 struct ptp_clock *ptp_clock;
323 struct ptp_clock_info ptp_caps;
324 struct sk_buff *ptp_tx_skb;
325 struct work_struct ptp_tx_work;
326 struct hwtstamp_config tstamp_config;
327 unsigned long ptp_tx_start;
328 unsigned long last_rx_ptp_check;
329 spinlock_t tmreg_lock; /* Used to protect the device time registers. */
330 u64 ptp_base_adj;
331 u32 tx_hwtstamp_timeouts;
332 u32 rx_hwtstamp_cleared;
333 bool ptp_tx;
334 bool ptp_rx;
7daa6bf3
JB		 335};
336
337struct i40e_mac_filter {
338 struct list_head list;
339 u8 macaddr[ETH_ALEN];
340#define I40E_VLAN_ANY -1
341 s16 vlan;
342 u8 counter; /* number of instances of this filter */
343 bool is_vf; /* filter belongs to a VF */
344 bool is_netdev; /* filter belongs to a netdev */
345 bool changed; /* filter needs to be sync'd to the HW */
346};
347
348struct i40e_veb {
349 struct i40e_pf *pf;
350 u16 idx;
351 u16 veb_idx; /* index of VEB parent */
352 u16 seid;
353 u16 uplink_seid;
354 u16 stats_idx; /* index of VEB parent */
355 u8 enabled_tc;
356 u16 flags;
357 u16 bw_limit;
358 u8 bw_max_quanta;
359 bool is_abs_credits;
360 u8 bw_tc_share_credits[I40E_MAX_TRAFFIC_CLASS];
361 u16 bw_tc_limit_credits[I40E_MAX_TRAFFIC_CLASS];
362 u8 bw_tc_max_quanta[I40E_MAX_TRAFFIC_CLASS];
363 struct kobject *kobj;
364 bool stat_offsets_loaded;
365 struct i40e_eth_stats stats;
366 struct i40e_eth_stats stats_offsets;
367};
368
369/* struct that defines a VSI, associated with a dev */
370struct i40e_vsi {
371 struct net_device *netdev;
372 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
373 bool netdev_registered;
374 bool stat_offsets_loaded;
375
376 u32 current_netdev_flags;
377 unsigned long state;
378#define I40E_VSI_FLAG_FILTER_CHANGED (1<<0)
379#define I40E_VSI_FLAG_VEB_OWNER (1<<1)
380 unsigned long flags;
381
382 struct list_head mac_filter_list;
383
384 /* VSI stats */
385 struct rtnl_link_stats64 net_stats;
386 struct rtnl_link_stats64 net_stats_offsets;
387 struct i40e_eth_stats eth_stats;
388 struct i40e_eth_stats eth_stats_offsets;
389 u32 tx_restart;
390 u32 tx_busy;
391 u32 rx_buf_failed;
392 u32 rx_page_failed;
393
9f65e15b
AD		 394 /* These are containers of ring pointers, allocated at run-time */
395 struct i40e_ring **rx_rings;
396 struct i40e_ring **tx_rings;
7daa6bf3
JB		 397
398 u16 work_limit;
399 /* high bit set means dynamic, use accessor routines to read/write.
400 * hardware only supports 2us resolution for the ITR registers.
401 * these values always store the USER setting, and must be converted
402 * before programming to a register.
403 */
404 u16 rx_itr_setting;
405 u16 tx_itr_setting;
406
407 u16 max_frame;
408 u16 rx_hdr_len;
409 u16 rx_buf_len;
410 u8 dtype;
411
412 /* List of q_vectors allocated to this VSI */
493fb300 413 struct i40e_q_vector **q_vectors;
7daa6bf3
JB		 414 int num_q_vectors;
415 int base_vector;
416
417 u16 seid; /* HW index of this VSI (absolute index) */
418 u16 id; /* VSI number */
419 u16 uplink_seid;
420
421 u16 base_queue; /* vsi's first queue in hw array */
422 u16 alloc_queue_pairs; /* Allocated Tx/Rx queues */
423 u16 num_queue_pairs; /* Used tx and rx pairs */
424 u16 num_desc;
425 enum i40e_vsi_type type; /* VSI type, e.g., LAN, FCoE, etc */
426 u16 vf_id; /* Virtual function ID for SRIOV VSIs */
427
428 struct i40e_tc_configuration tc_config;
429 struct i40e_aqc_vsi_properties_data info;
430
431 /* VSI BW limit (absolute across all TCs) */
432 u16 bw_limit; /* VSI BW Limit (0 = disabled) */
433 u8 bw_max_quanta; /* Max Quanta when BW limit is enabled */
434
435 /* Relative TC credits across VSIs */
436 u8 bw_ets_share_credits[I40E_MAX_TRAFFIC_CLASS];
437 /* TC BW limit credits within VSI */
438 u16 bw_ets_limit_credits[I40E_MAX_TRAFFIC_CLASS];
439 /* TC BW limit max quanta within VSI */
440 u8 bw_ets_max_quanta[I40E_MAX_TRAFFIC_CLASS];
441
442 struct i40e_pf *back; /* Backreference to associated PF */
443 u16 idx; /* index in pf->vsi[] */
444 u16 veb_idx; /* index of VEB parent */
445 struct kobject *kobj; /* sysfs object */
446
447 /* VSI specific handlers */
448 irqreturn_t (*irq_handler)(int irq, void *data);
449} ____cacheline_internodealigned_in_smp;
450
451struct i40e_netdev_priv {
452 struct i40e_vsi *vsi;
453};
454
455/* struct that defines an interrupt vector */
456struct i40e_q_vector {
457 struct i40e_vsi *vsi;
458
459 u16 v_idx; /* index in the vsi->q_vector array. */
460 u16 reg_idx; /* register index of the interrupt */
461
462 struct napi_struct napi;
463
464 struct i40e_ring_container rx;
465 struct i40e_ring_container tx;
466
467 u8 num_ringpairs; /* total number of ring pairs in vector */
468
7daa6bf3 469 cpumask_t affinity_mask;
493fb300
AD		 470 struct rcu_head rcu; /* to avoid race with update stats on free */
471 char name[IFNAMSIZ + 9];
7daa6bf3
JB		 472} ____cacheline_internodealigned_in_smp;
473
474/* lan device */
475struct i40e_device {
476 struct list_head list;
477 struct i40e_pf *pf;
478};
479
480/**
481 * i40e_fw_version_str - format the FW and NVM version strings
482 * @hw: ptr to the hardware info
483 **/
484static inline char *i40e_fw_version_str(struct i40e_hw *hw)
485{
486 static char buf[32];
487
488 snprintf(buf, sizeof(buf),
fe310704 489 "f%d.%d a%d.%d n%02x.%02x e%08x",
7daa6bf3
JB		 490 hw->aq.fw_maj_ver, hw->aq.fw_min_ver,
491 hw->aq.api_maj_ver, hw->aq.api_min_ver,
ff80301e
JB		 492 (hw->nvm.version & I40E_NVM_VERSION_HI_MASK) >>
493 I40E_NVM_VERSION_HI_SHIFT,
494 (hw->nvm.version & I40E_NVM_VERSION_LO_MASK) >>
495 I40E_NVM_VERSION_LO_SHIFT,
7daa6bf3
JB		 496 hw->nvm.eetrack);
497
498 return buf;
499}
500
501/**
502 * i40e_netdev_to_pf: Retrieve the PF struct for given netdev
503 * @netdev: the corresponding netdev
504 *
505 * Return the PF struct for the given netdev
506 **/
507static inline struct i40e_pf *i40e_netdev_to_pf(struct net_device *netdev)
508{
509 struct i40e_netdev_priv *np = netdev_priv(netdev);
510 struct i40e_vsi *vsi = np->vsi;
511
512 return vsi->back;
513}
514
515static inline void i40e_vsi_setup_irqhandler(struct i40e_vsi *vsi,
516 irqreturn_t (*irq_handler)(int, void *))
517{
518 vsi->irq_handler = irq_handler;
519}
520
521/**
522 * i40e_rx_is_programming_status - check for programming status descriptor
523 * @qw: the first quad word of the program status descriptor
524 *
525 * The value of in the descriptor length field indicate if this
526 * is a programming status descriptor for flow director or FCoE
527 * by the value of I40E_RX_PROG_STATUS_DESC_LENGTH, otherwise
528 * it is a packet descriptor.
529 **/
530static inline bool i40e_rx_is_programming_status(u64 qw)
531{
532 return I40E_RX_PROG_STATUS_DESC_LENGTH ==
533 (qw >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT);
534}
535
536/* needed by i40e_ethtool.c */
537int i40e_up(struct i40e_vsi *vsi);
538void i40e_down(struct i40e_vsi *vsi);
539extern const char i40e_driver_name[];
540extern const char i40e_driver_version_str[];
23326186 541void i40e_do_reset_safe(struct i40e_pf *pf, u32 reset_flags);
7daa6bf3
JB		 542void i40e_do_reset(struct i40e_pf *pf, u32 reset_flags);
543void i40e_update_stats(struct i40e_vsi *vsi);
544void i40e_update_eth_stats(struct i40e_vsi *vsi);
545struct rtnl_link_stats64 *i40e_get_vsi_stats_struct(struct i40e_vsi *vsi);
546int i40e_fetch_switch_configuration(struct i40e_pf *pf,
547 bool printconfig);
548
17a73f6b 549int i40e_program_fdir_filter(struct i40e_fdir_filter *fdir_data, u8 *raw_packet,
7daa6bf3 550 struct i40e_pf *pf, bool add);
17a73f6b
JG		 551int i40e_add_del_fdir(struct i40e_vsi *vsi,
552 struct i40e_fdir_filter *input, bool add);
7daa6bf3
JB		 553void i40e_set_ethtool_ops(struct net_device *netdev);
554struct i40e_mac_filter *i40e_add_filter(struct i40e_vsi *vsi,
555 u8 *macaddr, s16 vlan,
556 bool is_vf, bool is_netdev);
557void i40e_del_filter(struct i40e_vsi *vsi, u8 *macaddr, s16 vlan,
558 bool is_vf, bool is_netdev);
559int i40e_sync_vsi_filters(struct i40e_vsi *vsi);
560struct i40e_vsi *i40e_vsi_setup(struct i40e_pf *pf, u8 type,
561 u16 uplink, u32 param1);
562int i40e_vsi_release(struct i40e_vsi *vsi);
563struct i40e_vsi *i40e_vsi_lookup(struct i40e_pf *pf, enum i40e_vsi_type type,
564 struct i40e_vsi *start_vsi);
fc18eaa0 565int i40e_vsi_control_rings(struct i40e_vsi *vsi, bool enable);
f8ff1464 566int i40e_reconfig_rss_queues(struct i40e_pf *pf, int queue_count);
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JB		 567struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
568 u16 downlink_seid, u8 enabled_tc);
569void i40e_veb_release(struct i40e_veb *veb);
570
4e3b35b0 571int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
7daa6bf3
JB		 572i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
573void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
574void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
575void i40e_pf_reset_stats(struct i40e_pf *pf);
576#ifdef CONFIG_DEBUG_FS
577void i40e_dbg_pf_init(struct i40e_pf *pf);
578void i40e_dbg_pf_exit(struct i40e_pf *pf);
579void i40e_dbg_init(void);
580void i40e_dbg_exit(void);
581#else
582static inline void i40e_dbg_pf_init(struct i40e_pf *pf) {}
583static inline void i40e_dbg_pf_exit(struct i40e_pf *pf) {}
584static inline void i40e_dbg_init(void) {}
585static inline void i40e_dbg_exit(void) {}
586#endif /* CONFIG_DEBUG_FS*/
587void i40e_irq_dynamic_enable(struct i40e_vsi *vsi, int vector);
2ef28cfb 588void i40e_irq_dynamic_disable_icr0(struct i40e_pf *pf);
116a57d4 589void i40e_irq_dynamic_enable_icr0(struct i40e_pf *pf);
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JB		 590int i40e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
591void i40e_vlan_stripping_disable(struct i40e_vsi *vsi);
592int i40e_vsi_add_vlan(struct i40e_vsi *vsi, s16 vid);
593int i40e_vsi_kill_vlan(struct i40e_vsi *vsi, s16 vid);
594struct i40e_mac_filter *i40e_put_mac_in_vlan(struct i40e_vsi *vsi, u8 *macaddr,
595 bool is_vf, bool is_netdev);
596bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
597struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, u8 *macaddr,
598 bool is_vf, bool is_netdev);
599void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
4e3b35b0
NP		 600#ifdef CONFIG_I40E_DCB
601void i40e_dcbnl_flush_apps(struct i40e_pf *pf,
602 struct i40e_dcbx_config *new_cfg);
603void i40e_dcbnl_set_all(struct i40e_vsi *vsi);
604void i40e_dcbnl_setup(struct i40e_vsi *vsi);
605bool i40e_dcb_need_reconfig(struct i40e_pf *pf,
606 struct i40e_dcbx_config *old_cfg,
607 struct i40e_dcbx_config *new_cfg);
608#endif /* CONFIG_I40E_DCB */
beb0dff1
JK		 609void i40e_ptp_rx_hang(struct i40e_vsi *vsi);
610void i40e_ptp_tx_hwtstamp(struct i40e_pf *pf);
611void i40e_ptp_rx_hwtstamp(struct i40e_pf *pf, struct sk_buff *skb, u8 index);
612void i40e_ptp_set_increment(struct i40e_pf *pf);
613int i40e_ptp_set_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
614int i40e_ptp_get_ts_config(struct i40e_pf *pf, struct ifreq *ifr);
615void i40e_ptp_init(struct i40e_pf *pf);
616void i40e_ptp_stop(struct i40e_pf *pf);
7daa6bf3 617#endif /* _I40E_H_ */
Linux kernel - Deliverables
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