projects / deliverable / linux.git / blame
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1 | /******************************************************************************* |
| 2 | * | |
| 3 | * Intel Ethernet Controller XL710 Family Linux Driver | |
| 4 | * Copyright(c) 2013 Intel Corporation. | |
| 5 | * | |
| 6 | * This program is free software; you can redistribute it and/or modify it | |
| 7 | * under the terms and conditions of the GNU General Public License, | |
| 8 | * version 2, as published by the Free Software Foundation. | |
| 9 | * | |
| 10 | * This program is distributed in the hope it will be useful, but WITHOUT | |
| 11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
| 12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
| 13 | * more details. | |
| 14 | * | |
| 15 | * You should have received a copy of the GNU General Public License along with | |
| 16 | * this program; if not, write to the Free Software Foundation, Inc., | |
| 17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | |
| 18 | * | |
| 19 | * The full GNU General Public License is included in this distribution in | |
| 20 | * the file called "COPYING". | |
| 21 | * | |
| 22 | * Contact Information: | |
| 23 | * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net> | |
| 24 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | |
| 25 | * | |
| 26 | ******************************************************************************/ | |
| 27 | ||
| 28 | #ifndef _I40E_ADMINQ_H_ | |
| 29 | #define _I40E_ADMINQ_H_ | |
| 30 | ||
| 31 | #include "i40e_osdep.h" | |
| 32 | #include "i40e_adminq_cmd.h" | |
| 33 | ||
| 34 | #define I40E_ADMINQ_DESC(R, i) \ | |
| 35 | (&(((struct i40e_aq_desc *)((R).desc))[i])) | |
| 36 | ||
| 37 | #define I40E_ADMINQ_DESC_ALIGNMENT 4096 | |
| 38 | ||
| 39 | struct i40e_adminq_ring { | |
| 40 | void *desc; /* Descriptor ring memory */ | |
| 41 | void *details; /* ASQ details */ | |
| 42 | ||
| 43 | union { | |
| 44 | struct i40e_dma_mem *asq_bi; | |
| 45 | struct i40e_dma_mem *arq_bi; | |
| 46 | } r; | |
| 47 | ||
| 48 | u64 dma_addr; /* Physical address of the ring */ | |
| 49 | u16 count; /* Number of descriptors */ | |
| 50 | u16 rx_buf_len; /* Admin Receive Queue buffer length */ | |
| 51 | ||
| 52 | /* used for interrupt processing */ | |
| 53 | u16 next_to_use; | |
| 54 | u16 next_to_clean; | |
| 55 | ||
| 56 | /* used for queue tracking */ | |
| 57 | u32 head; | |
| 58 | u32 tail; | |
| 17e6a845 | 59 | u32 len; |
| 56a62fc8 JB |
60 | }; |
| 61 | ||
| 62 | /* ASQ transaction details */ | |
| 63 | struct i40e_asq_cmd_details { | |
| 64 | void *callback; /* cast from type I40E_ADMINQ_CALLBACK */ | |
| 65 | u64 cookie; | |
| 66 | u16 flags_ena; | |
| 67 | u16 flags_dis; | |
| 68 | bool async; | |
| 69 | bool postpone; | |
| 70 | }; | |
| 71 | ||
| 72 | #define I40E_ADMINQ_DETAILS(R, i) \ | |
| 73 | (&(((struct i40e_asq_cmd_details *)((R).details))[i])) | |
| 74 | ||
| 75 | /* ARQ event information */ | |
| 76 | struct i40e_arq_event_info { | |
| 77 | struct i40e_aq_desc desc; | |
| 78 | u16 msg_size; | |
| 79 | u8 *msg_buf; | |
| 80 | }; | |
| 81 | ||
| 82 | /* Admin Queue information */ | |
| 83 | struct i40e_adminq_info { | |
| 84 | struct i40e_adminq_ring arq; /* receive queue */ | |
| 85 | struct i40e_adminq_ring asq; /* send queue */ | |
| 86 | u16 num_arq_entries; /* receive queue depth */ | |
| 87 | u16 num_asq_entries; /* send queue depth */ | |
| 88 | u16 arq_buf_size; /* receive queue buffer size */ | |
| 89 | u16 asq_buf_size; /* send queue buffer size */ | |
| 90 | u16 fw_maj_ver; /* firmware major version */ | |
| 91 | u16 fw_min_ver; /* firmware minor version */ | |
| 92 | u16 api_maj_ver; /* api major version */ | |
| 93 | u16 api_min_ver; /* api minor version */ | |
| 94 | ||
| 95 | struct mutex asq_mutex; /* Send queue lock */ | |
| 96 | struct mutex arq_mutex; /* Receive queue lock */ | |
| 97 | ||
| 98 | struct i40e_dma_mem asq_mem; /* send queue dynamic memory */ | |
| 99 | struct i40e_dma_mem arq_mem; /* receive queue dynamic memory */ | |
| 100 | ||
| 101 | /* last status values on send and receive queues */ | |
| 102 | enum i40e_admin_queue_err asq_last_status; | |
| 103 | enum i40e_admin_queue_err arq_last_status; | |
| 104 | }; | |
| 105 | ||
| 106 | /* general information */ | |
| 107 | #define I40E_AQ_LARGE_BUF 512 | |
| 108 | #define I40E_ASQ_CMD_TIMEOUT 100000 /* usecs */ | |
| 109 | ||
| 110 | void i40e_fill_default_direct_cmd_desc(struct i40e_aq_desc *desc, | |
| 111 | u16 opcode); | |
| 112 | ||
| 113 | #endif /* _I40E_ADMINQ_H_ */ |