projects / deliverable / linux.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
i40e: check multi-bit state correctly
[deliverable/linux.git] / drivers / net / ethernet / intel / i40e / i40e_common.c
CommitLineData
56a62fc8
JB		 1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * The full GNU General Public License is included in this distribution in
20 * the file called "COPYING".
21 *
22 * Contact Information:
23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25 *
26 ******************************************************************************/
27
28#include "i40e_type.h"
29#include "i40e_adminq.h"
30#include "i40e_prototype.h"
31#include "i40e_virtchnl.h"
32
33/**
34 * i40e_set_mac_type - Sets MAC type
35 * @hw: pointer to the HW structure
36 *
37 * This function sets the mac type of the adapter based on the
38 * vendor ID and device ID stored in the hw structure.
39 **/
40static i40e_status i40e_set_mac_type(struct i40e_hw *hw)
41{
42 i40e_status status = 0;
43
44 if (hw->vendor_id == PCI_VENDOR_ID_INTEL) {
45 switch (hw->device_id) {
46 case I40E_SFP_XL710_DEVICE_ID:
47 case I40E_SFP_X710_DEVICE_ID:
48 case I40E_QEMU_DEVICE_ID:
49 case I40E_KX_A_DEVICE_ID:
50 case I40E_KX_B_DEVICE_ID:
51 case I40E_KX_C_DEVICE_ID:
52 case I40E_KX_D_DEVICE_ID:
53 case I40E_QSFP_A_DEVICE_ID:
54 case I40E_QSFP_B_DEVICE_ID:
55 case I40E_QSFP_C_DEVICE_ID:
56 hw->mac.type = I40E_MAC_XL710;
57 break;
58 case I40E_VF_DEVICE_ID:
59 case I40E_VF_HV_DEVICE_ID:
60 hw->mac.type = I40E_MAC_VF;
61 break;
62 default:
63 hw->mac.type = I40E_MAC_GENERIC;
64 break;
65 }
66 } else {
67 status = I40E_ERR_DEVICE_NOT_SUPPORTED;
68 }
69
70 hw_dbg(hw, "i40e_set_mac_type found mac: %d, returns: %d\n",
71 hw->mac.type, status);
72 return status;
73}
74
75/**
76 * i40e_debug_aq
77 * @hw: debug mask related to admin queue
78 * @cap: pointer to adminq command descriptor
79 * @buffer: pointer to command buffer
80 *
81 * Dumps debug log about adminq command with descriptor contents.
82 **/
83void i40e_debug_aq(struct i40e_hw *hw, enum i40e_debug_mask mask, void *desc,
84 void *buffer)
85{
86 struct i40e_aq_desc *aq_desc = (struct i40e_aq_desc *)desc;
87 u8 *aq_buffer = (u8 *)buffer;
88 u32 data[4];
89 u32 i = 0;
90
91 if ((!(mask & hw->debug_mask)) || (desc == NULL))
92 return;
93
94 i40e_debug(hw, mask,
95 "AQ CMD: opcode 0x%04X, flags 0x%04X, datalen 0x%04X, retval 0x%04X\n",
96 aq_desc->opcode, aq_desc->flags, aq_desc->datalen,
97 aq_desc->retval);
98 i40e_debug(hw, mask, "\tcookie (h,l) 0x%08X 0x%08X\n",
99 aq_desc->cookie_high, aq_desc->cookie_low);
100 i40e_debug(hw, mask, "\tparam (0,1) 0x%08X 0x%08X\n",
101 aq_desc->params.internal.param0,
102 aq_desc->params.internal.param1);
103 i40e_debug(hw, mask, "\taddr (h,l) 0x%08X 0x%08X\n",
104 aq_desc->params.external.addr_high,
105 aq_desc->params.external.addr_low);
106
107 if ((buffer != NULL) && (aq_desc->datalen != 0)) {
108 memset(data, 0, sizeof(data));
109 i40e_debug(hw, mask, "AQ CMD Buffer:\n");
110 for (i = 0; i < le16_to_cpu(aq_desc->datalen); i++) {
111 data[((i % 16) / 4)] |=
112 ((u32)aq_buffer[i]) << (8 * (i % 4));
113 if ((i % 16) == 15) {
114 i40e_debug(hw, mask,
115 "\t0x%04X %08X %08X %08X %08X\n",
116 i - 15, data[0], data[1], data[2],
117 data[3]);
118 memset(data, 0, sizeof(data));
119 }
120 }
121 if ((i % 16) != 0)
122 i40e_debug(hw, mask, "\t0x%04X %08X %08X %08X %08X\n",
123 i - (i % 16), data[0], data[1], data[2],
124 data[3]);
125 }
126}
127
128/**
129 * i40e_init_shared_code - Initialize the shared code
130 * @hw: pointer to hardware structure
131 *
132 * This assigns the MAC type and PHY code and inits the NVM.
133 * Does not touch the hardware. This function must be called prior to any
134 * other function in the shared code. The i40e_hw structure should be
135 * memset to 0 prior to calling this function. The following fields in
136 * hw structure should be filled in prior to calling this function:
137 * hw_addr, back, device_id, vendor_id, subsystem_device_id,
138 * subsystem_vendor_id, and revision_id
139 **/
140i40e_status i40e_init_shared_code(struct i40e_hw *hw)
141{
142 i40e_status status = 0;
143 u32 reg;
144
145 hw->phy.get_link_info = true;
146
147 /* Determine port number */
148 reg = rd32(hw, I40E_PFGEN_PORTNUM);
149 reg = ((reg & I40E_PFGEN_PORTNUM_PORT_NUM_MASK) >>
150 I40E_PFGEN_PORTNUM_PORT_NUM_SHIFT);
151 hw->port = (u8)reg;
152
153 i40e_set_mac_type(hw);
154
155 switch (hw->mac.type) {
156 case I40E_MAC_XL710:
157 break;
158 default:
159 return I40E_ERR_DEVICE_NOT_SUPPORTED;
160 break;
161 }
162
163 status = i40e_init_nvm(hw);
164 return status;
165}
166
167/**
168 * i40e_aq_mac_address_read - Retrieve the MAC addresses
169 * @hw: pointer to the hw struct
170 * @flags: a return indicator of what addresses were added to the addr store
171 * @addrs: the requestor's mac addr store
172 * @cmd_details: pointer to command details structure or NULL
173 **/
174static i40e_status i40e_aq_mac_address_read(struct i40e_hw *hw,
175 u16 *flags,
176 struct i40e_aqc_mac_address_read_data *addrs,
177 struct i40e_asq_cmd_details *cmd_details)
178{
179 struct i40e_aq_desc desc;
180 struct i40e_aqc_mac_address_read *cmd_data =
181 (struct i40e_aqc_mac_address_read *)&desc.params.raw;
182 i40e_status status;
183
184 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_mac_address_read);
185 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_BUF);
186
187 status = i40e_asq_send_command(hw, &desc, addrs,
188 sizeof(*addrs), cmd_details);
189 *flags = le16_to_cpu(cmd_data->command_flags);
190
191 return status;
192}
193
194/**
195 * i40e_aq_mac_address_write - Change the MAC addresses
196 * @hw: pointer to the hw struct
197 * @flags: indicates which MAC to be written
198 * @mac_addr: address to write
199 * @cmd_details: pointer to command details structure or NULL
200 **/
201i40e_status i40e_aq_mac_address_write(struct i40e_hw *hw,
202 u16 flags, u8 *mac_addr,
203 struct i40e_asq_cmd_details *cmd_details)
204{
205 struct i40e_aq_desc desc;
206 struct i40e_aqc_mac_address_write *cmd_data =
207 (struct i40e_aqc_mac_address_write *)&desc.params.raw;
208 i40e_status status;
209
210 i40e_fill_default_direct_cmd_desc(&desc,
211 i40e_aqc_opc_mac_address_write);
212 cmd_data->command_flags = cpu_to_le16(flags);
213 memcpy(&cmd_data->mac_sal, &mac_addr[0], 4);
214 memcpy(&cmd_data->mac_sah, &mac_addr[4], 2);
215
216 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
217
218 return status;
219}
220
221/**
222 * i40e_get_mac_addr - get MAC address
223 * @hw: pointer to the HW structure
224 * @mac_addr: pointer to MAC address
225 *
226 * Reads the adapter's MAC address from register
227 **/
228i40e_status i40e_get_mac_addr(struct i40e_hw *hw, u8 *mac_addr)
229{
230 struct i40e_aqc_mac_address_read_data addrs;
231 i40e_status status;
232 u16 flags = 0;
233
234 status = i40e_aq_mac_address_read(hw, &flags, &addrs, NULL);
235
236 if (flags & I40E_AQC_LAN_ADDR_VALID)
237 memcpy(mac_addr, &addrs.pf_lan_mac, sizeof(addrs.pf_lan_mac));
238
239 return status;
240}
241
242/**
243 * i40e_validate_mac_addr - Validate MAC address
244 * @mac_addr: pointer to MAC address
245 *
246 * Tests a MAC address to ensure it is a valid Individual Address
247 **/
248i40e_status i40e_validate_mac_addr(u8 *mac_addr)
249{
250 i40e_status status = 0;
251
252 /* Make sure it is not a multicast address */
253 if (I40E_IS_MULTICAST(mac_addr)) {
254 hw_dbg(hw, "MAC address is multicast\n");
255 status = I40E_ERR_INVALID_MAC_ADDR;
256 /* Not a broadcast address */
257 } else if (I40E_IS_BROADCAST(mac_addr)) {
258 hw_dbg(hw, "MAC address is broadcast\n");
259 status = I40E_ERR_INVALID_MAC_ADDR;
260 /* Reject the zero address */
261 } else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&
262 mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0) {
263 hw_dbg(hw, "MAC address is all zeros\n");
264 status = I40E_ERR_INVALID_MAC_ADDR;
265 }
266 return status;
267}
268
269/**
270 * i40e_pf_reset - Reset the PF
271 * @hw: pointer to the hardware structure
272 *
273 * Assuming someone else has triggered a global reset,
274 * assure the global reset is complete and then reset the PF
275 **/
276i40e_status i40e_pf_reset(struct i40e_hw *hw)
277{
278 u32 wait_cnt = 0;
279 u32 reg = 0;
280 u32 grst_del;
281
282 /* Poll for Global Reset steady state in case of recent GRST.
283 * The grst delay value is in 100ms units, and we'll wait a
284 * couple counts longer to be sure we don't just miss the end.
285 */
286 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK
287 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
288 for (wait_cnt = 0; wait_cnt < grst_del + 2; wait_cnt++) {
289 reg = rd32(hw, I40E_GLGEN_RSTAT);
290 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
291 break;
292 msleep(100);
293 }
294 if (reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK) {
295 hw_dbg(hw, "Global reset polling failed to complete.\n");
296 return I40E_ERR_RESET_FAILED;
297 }
298
299 /* Determine the PF number based on the PCI fn */
71bd4b8e
CP		 300 reg = rd32(hw, I40E_GLPCI_CAPSUP);
301 if (reg & I40E_GLPCI_CAPSUP_ARI_EN_MASK)
302 hw->pf_id = (u8)((hw->bus.device << 3) | hw->bus.func);
303 else
304 hw->pf_id = (u8)hw->bus.func;
56a62fc8
JB		 305
306 /* If there was a Global Reset in progress when we got here,
307 * we don't need to do the PF Reset
308 */
309 if (!wait_cnt) {
310 reg = rd32(hw, I40E_PFGEN_CTRL);
311 wr32(hw, I40E_PFGEN_CTRL,
312 (reg | I40E_PFGEN_CTRL_PFSWR_MASK));
313 for (wait_cnt = 0; wait_cnt < 10; wait_cnt++) {
314 reg = rd32(hw, I40E_PFGEN_CTRL);
315 if (!(reg & I40E_PFGEN_CTRL_PFSWR_MASK))
316 break;
317 usleep_range(1000, 2000);
318 }
319 if (reg & I40E_PFGEN_CTRL_PFSWR_MASK) {
320 hw_dbg(hw, "PF reset polling failed to complete.\n");
321 return I40E_ERR_RESET_FAILED;
322 }
323 }
324
325 i40e_clear_pxe_mode(hw);
326 return 0;
327}
328
329/**
330 * i40e_clear_pxe_mode - clear pxe operations mode
331 * @hw: pointer to the hw struct
332 *
333 * Make sure all PXE mode settings are cleared, including things
334 * like descriptor fetch/write-back mode.
335 **/
336void i40e_clear_pxe_mode(struct i40e_hw *hw)
337{
338 u32 reg;
339
340 /* Clear single descriptor fetch/write-back mode */
341 reg = rd32(hw, I40E_GLLAN_RCTL_0);
342 wr32(hw, I40E_GLLAN_RCTL_0, (reg | I40E_GLLAN_RCTL_0_PXE_MODE_MASK));
343}
344
345/**
346 * i40e_led_get - return current on/off mode
347 * @hw: pointer to the hw struct
348 *
349 * The value returned is the 'mode' field as defined in the
350 * GPIO register definitions: 0x0 = off, 0xf = on, and other
351 * values are variations of possible behaviors relating to
352 * blink, link, and wire.
353 **/
354u32 i40e_led_get(struct i40e_hw *hw)
355{
356 u32 gpio_val = 0;
357 u32 mode = 0;
358 u32 port;
359 int i;
360
361 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
362 if (!hw->func_caps.led[i])
363 continue;
364
365 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
366 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
367 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
368
369 if (port != hw->port)
370 continue;
371
372 mode = (gpio_val & I40E_GLGEN_GPIO_CTL_LED_MODE_MASK)
373 >> I40E_GLGEN_GPIO_CTL_INT_MODE_SHIFT;
374 break;
375 }
376
377 return mode;
378}
379
380/**
381 * i40e_led_set - set new on/off mode
382 * @hw: pointer to the hw struct
383 * @mode: 0=off, else on (see EAS for mode details)
384 **/
385void i40e_led_set(struct i40e_hw *hw, u32 mode)
386{
387 u32 gpio_val = 0;
388 u32 led_mode = 0;
389 u32 port;
390 int i;
391
392 for (i = 0; i < I40E_HW_CAP_MAX_GPIO; i++) {
393 if (!hw->func_caps.led[i])
394 continue;
395
396 gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(i));
397 port = (gpio_val & I40E_GLGEN_GPIO_CTL_PRT_NUM_MASK)
398 >> I40E_GLGEN_GPIO_CTL_PRT_NUM_SHIFT;
399
400 if (port != hw->port)
401 continue;
402
403 led_mode = (mode << I40E_GLGEN_GPIO_CTL_LED_MODE_SHIFT) &
404 I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
405 gpio_val &= ~I40E_GLGEN_GPIO_CTL_LED_MODE_MASK;
406 gpio_val |= led_mode;
407 wr32(hw, I40E_GLGEN_GPIO_CTL(i), gpio_val);
408 }
409}
410
411/* Admin command wrappers */
412/**
413 * i40e_aq_queue_shutdown
414 * @hw: pointer to the hw struct
415 * @unloading: is the driver unloading itself
416 *
417 * Tell the Firmware that we're shutting down the AdminQ and whether
418 * or not the driver is unloading as well.
419 **/
420i40e_status i40e_aq_queue_shutdown(struct i40e_hw *hw,
421 bool unloading)
422{
423 struct i40e_aq_desc desc;
424 struct i40e_aqc_queue_shutdown *cmd =
425 (struct i40e_aqc_queue_shutdown *)&desc.params.raw;
426 i40e_status status;
427
428 i40e_fill_default_direct_cmd_desc(&desc,
429 i40e_aqc_opc_queue_shutdown);
430
431 if (unloading)
432 cmd->driver_unloading = cpu_to_le32(I40E_AQ_DRIVER_UNLOADING);
433 status = i40e_asq_send_command(hw, &desc, NULL, 0, NULL);
434
435 return status;
436}
437
438/**
439 * i40e_aq_set_link_restart_an
440 * @hw: pointer to the hw struct
441 * @cmd_details: pointer to command details structure or NULL
442 *
443 * Sets up the link and restarts the Auto-Negotiation over the link.
444 **/
445i40e_status i40e_aq_set_link_restart_an(struct i40e_hw *hw,
446 struct i40e_asq_cmd_details *cmd_details)
447{
448 struct i40e_aq_desc desc;
449 struct i40e_aqc_set_link_restart_an *cmd =
450 (struct i40e_aqc_set_link_restart_an *)&desc.params.raw;
451 i40e_status status;
452
453 i40e_fill_default_direct_cmd_desc(&desc,
454 i40e_aqc_opc_set_link_restart_an);
455
456 cmd->command = I40E_AQ_PHY_RESTART_AN;
457
458 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
459
460 return status;
461}
462
463/**
464 * i40e_aq_get_link_info
465 * @hw: pointer to the hw struct
466 * @enable_lse: enable/disable LinkStatusEvent reporting
467 * @link: pointer to link status structure - optional
468 * @cmd_details: pointer to command details structure or NULL
469 *
470 * Returns the link status of the adapter.
471 **/
472i40e_status i40e_aq_get_link_info(struct i40e_hw *hw,
473 bool enable_lse, struct i40e_link_status *link,
474 struct i40e_asq_cmd_details *cmd_details)
475{
476 struct i40e_aq_desc desc;
477 struct i40e_aqc_get_link_status *resp =
478 (struct i40e_aqc_get_link_status *)&desc.params.raw;
479 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
480 i40e_status status;
481 u16 command_flags;
482
483 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_link_status);
484
485 if (enable_lse)
486 command_flags = I40E_AQ_LSE_ENABLE;
487 else
488 command_flags = I40E_AQ_LSE_DISABLE;
489 resp->command_flags = cpu_to_le16(command_flags);
490
491 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
492
493 if (status)
494 goto aq_get_link_info_exit;
495
496 /* save off old link status information */
497 memcpy(&hw->phy.link_info_old, hw_link_info,
498 sizeof(struct i40e_link_status));
499
500 /* update link status */
501 hw_link_info->phy_type = (enum i40e_aq_phy_type)resp->phy_type;
502 hw_link_info->link_speed = (enum i40e_aq_link_speed)resp->link_speed;
503 hw_link_info->link_info = resp->link_info;
504 hw_link_info->an_info = resp->an_info;
505 hw_link_info->ext_info = resp->ext_info;
506
507 if (resp->command_flags & cpu_to_le16(I40E_AQ_LSE_ENABLE))
508 hw_link_info->lse_enable = true;
509 else
510 hw_link_info->lse_enable = false;
511
512 /* save link status information */
513 if (link)
d7595a22 514 *link = *hw_link_info;
56a62fc8
JB		 515
516 /* flag cleared so helper functions don't call AQ again */
517 hw->phy.get_link_info = false;
518
519aq_get_link_info_exit:
520 return status;
521}
522
523/**
524 * i40e_aq_add_vsi
525 * @hw: pointer to the hw struct
526 * @vsi: pointer to a vsi context struct
527 * @cmd_details: pointer to command details structure or NULL
528 *
529 * Add a VSI context to the hardware.
530**/
531i40e_status i40e_aq_add_vsi(struct i40e_hw *hw,
532 struct i40e_vsi_context *vsi_ctx,
533 struct i40e_asq_cmd_details *cmd_details)
534{
535 struct i40e_aq_desc desc;
536 struct i40e_aqc_add_get_update_vsi *cmd =
537 (struct i40e_aqc_add_get_update_vsi *)&desc.params.raw;
538 struct i40e_aqc_add_get_update_vsi_completion *resp =
539 (struct i40e_aqc_add_get_update_vsi_completion *)
540 &desc.params.raw;
541 i40e_status status;
542
543 i40e_fill_default_direct_cmd_desc(&desc,
544 i40e_aqc_opc_add_vsi);
545
546 cmd->uplink_seid = cpu_to_le16(vsi_ctx->uplink_seid);
547 cmd->connection_type = vsi_ctx->connection_type;
548 cmd->vf_id = vsi_ctx->vf_num;
549 cmd->vsi_flags = cpu_to_le16(vsi_ctx->flags);
550
551 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
552 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
553 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
554
555 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
556 sizeof(vsi_ctx->info), cmd_details);
557
558 if (status)
559 goto aq_add_vsi_exit;
560
561 vsi_ctx->seid = le16_to_cpu(resp->seid);
562 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
563 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
564 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
565
566aq_add_vsi_exit:
567 return status;
568}
569
570/**
571 * i40e_aq_set_vsi_unicast_promiscuous
572 * @hw: pointer to the hw struct
573 * @seid: vsi number
574 * @set: set unicast promiscuous enable/disable
575 * @cmd_details: pointer to command details structure or NULL
576 **/
577i40e_status i40e_aq_set_vsi_unicast_promiscuous(struct i40e_hw *hw,
578 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
579{
580 struct i40e_aq_desc desc;
581 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
582 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
583 i40e_status status;
584 u16 flags = 0;
585
586 i40e_fill_default_direct_cmd_desc(&desc,
587 i40e_aqc_opc_set_vsi_promiscuous_modes);
588
589 if (set)
590 flags |= I40E_AQC_SET_VSI_PROMISC_UNICAST;
591
592 cmd->promiscuous_flags = cpu_to_le16(flags);
593
594 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_UNICAST);
595
596 cmd->seid = cpu_to_le16(seid);
597 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
598
599 return status;
600}
601
602/**
603 * i40e_aq_set_vsi_multicast_promiscuous
604 * @hw: pointer to the hw struct
605 * @seid: vsi number
606 * @set: set multicast promiscuous enable/disable
607 * @cmd_details: pointer to command details structure or NULL
608 **/
609i40e_status i40e_aq_set_vsi_multicast_promiscuous(struct i40e_hw *hw,
610 u16 seid, bool set, struct i40e_asq_cmd_details *cmd_details)
611{
612 struct i40e_aq_desc desc;
613 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
614 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
615 i40e_status status;
616 u16 flags = 0;
617
618 i40e_fill_default_direct_cmd_desc(&desc,
619 i40e_aqc_opc_set_vsi_promiscuous_modes);
620
621 if (set)
622 flags |= I40E_AQC_SET_VSI_PROMISC_MULTICAST;
623
624 cmd->promiscuous_flags = cpu_to_le16(flags);
625
626 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_MULTICAST);
627
628 cmd->seid = cpu_to_le16(seid);
629 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
630
631 return status;
632}
633
634/**
635 * i40e_aq_set_vsi_broadcast
636 * @hw: pointer to the hw struct
637 * @seid: vsi number
638 * @set_filter: true to set filter, false to clear filter
639 * @cmd_details: pointer to command details structure or NULL
640 *
641 * Set or clear the broadcast promiscuous flag (filter) for a given VSI.
642 **/
643i40e_status i40e_aq_set_vsi_broadcast(struct i40e_hw *hw,
644 u16 seid, bool set_filter,
645 struct i40e_asq_cmd_details *cmd_details)
646{
647 struct i40e_aq_desc desc;
648 struct i40e_aqc_set_vsi_promiscuous_modes *cmd =
649 (struct i40e_aqc_set_vsi_promiscuous_modes *)&desc.params.raw;
650 i40e_status status;
651
652 i40e_fill_default_direct_cmd_desc(&desc,
653 i40e_aqc_opc_set_vsi_promiscuous_modes);
654
655 if (set_filter)
656 cmd->promiscuous_flags
657 |= cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
658 else
659 cmd->promiscuous_flags
660 &= cpu_to_le16(~I40E_AQC_SET_VSI_PROMISC_BROADCAST);
661
662 cmd->valid_flags = cpu_to_le16(I40E_AQC_SET_VSI_PROMISC_BROADCAST);
663 cmd->seid = cpu_to_le16(seid);
664 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
665
666 return status;
667}
668
669/**
670 * i40e_get_vsi_params - get VSI configuration info
671 * @hw: pointer to the hw struct
672 * @vsi: pointer to a vsi context struct
673 * @cmd_details: pointer to command details structure or NULL
674 **/
675i40e_status i40e_aq_get_vsi_params(struct i40e_hw *hw,
676 struct i40e_vsi_context *vsi_ctx,
677 struct i40e_asq_cmd_details *cmd_details)
678{
679 struct i40e_aq_desc desc;
680 struct i40e_aqc_switch_seid *cmd =
681 (struct i40e_aqc_switch_seid *)&desc.params.raw;
682 struct i40e_aqc_add_get_update_vsi_completion *resp =
683 (struct i40e_aqc_add_get_update_vsi_completion *)
684 &desc.params.raw;
685 i40e_status status;
686
687 i40e_fill_default_direct_cmd_desc(&desc,
688 i40e_aqc_opc_get_vsi_parameters);
689
690 cmd->seid = cpu_to_le16(vsi_ctx->seid);
691
692 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
693 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
694 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
695
696 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
697 sizeof(vsi_ctx->info), NULL);
698
699 if (status)
700 goto aq_get_vsi_params_exit;
701
702 vsi_ctx->seid = le16_to_cpu(resp->seid);
703 vsi_ctx->vsi_number = le16_to_cpu(resp->vsi_number);
704 vsi_ctx->vsis_allocated = le16_to_cpu(resp->vsi_used);
705 vsi_ctx->vsis_unallocated = le16_to_cpu(resp->vsi_free);
706
707aq_get_vsi_params_exit:
708 return status;
709}
710
711/**
712 * i40e_aq_update_vsi_params
713 * @hw: pointer to the hw struct
714 * @vsi: pointer to a vsi context struct
715 * @cmd_details: pointer to command details structure or NULL
716 *
717 * Update a VSI context.
718 **/
719i40e_status i40e_aq_update_vsi_params(struct i40e_hw *hw,
720 struct i40e_vsi_context *vsi_ctx,
721 struct i40e_asq_cmd_details *cmd_details)
722{
723 struct i40e_aq_desc desc;
724 struct i40e_aqc_switch_seid *cmd =
725 (struct i40e_aqc_switch_seid *)&desc.params.raw;
726 i40e_status status;
727
728 i40e_fill_default_direct_cmd_desc(&desc,
729 i40e_aqc_opc_update_vsi_parameters);
730 cmd->seid = cpu_to_le16(vsi_ctx->seid);
731
732 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
733 if (sizeof(vsi_ctx->info) > I40E_AQ_LARGE_BUF)
734 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
735
736 status = i40e_asq_send_command(hw, &desc, &vsi_ctx->info,
737 sizeof(vsi_ctx->info), cmd_details);
738
739 return status;
740}
741
742/**
743 * i40e_aq_get_switch_config
744 * @hw: pointer to the hardware structure
745 * @buf: pointer to the result buffer
746 * @buf_size: length of input buffer
747 * @start_seid: seid to start for the report, 0 == beginning
748 * @cmd_details: pointer to command details structure or NULL
749 *
750 * Fill the buf with switch configuration returned from AdminQ command
751 **/
752i40e_status i40e_aq_get_switch_config(struct i40e_hw *hw,
753 struct i40e_aqc_get_switch_config_resp *buf,
754 u16 buf_size, u16 *start_seid,
755 struct i40e_asq_cmd_details *cmd_details)
756{
757 struct i40e_aq_desc desc;
758 struct i40e_aqc_switch_seid *scfg =
759 (struct i40e_aqc_switch_seid *)&desc.params.raw;
760 i40e_status status;
761
762 i40e_fill_default_direct_cmd_desc(&desc,
763 i40e_aqc_opc_get_switch_config);
764 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
765 if (buf_size > I40E_AQ_LARGE_BUF)
766 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
767 scfg->seid = cpu_to_le16(*start_seid);
768
769 status = i40e_asq_send_command(hw, &desc, buf, buf_size, cmd_details);
770 *start_seid = le16_to_cpu(scfg->seid);
771
772 return status;
773}
774
775/**
776 * i40e_aq_get_firmware_version
777 * @hw: pointer to the hw struct
778 * @fw_major_version: firmware major version
779 * @fw_minor_version: firmware minor version
780 * @api_major_version: major queue version
781 * @api_minor_version: minor queue version
782 * @cmd_details: pointer to command details structure or NULL
783 *
784 * Get the firmware version from the admin queue commands
785 **/
786i40e_status i40e_aq_get_firmware_version(struct i40e_hw *hw,
787 u16 *fw_major_version, u16 *fw_minor_version,
788 u16 *api_major_version, u16 *api_minor_version,
789 struct i40e_asq_cmd_details *cmd_details)
790{
791 struct i40e_aq_desc desc;
792 struct i40e_aqc_get_version *resp =
793 (struct i40e_aqc_get_version *)&desc.params.raw;
794 i40e_status status;
795
796 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_get_version);
797
798 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
799
800 if (!status) {
801 if (fw_major_version != NULL)
802 *fw_major_version = le16_to_cpu(resp->fw_major);
803 if (fw_minor_version != NULL)
804 *fw_minor_version = le16_to_cpu(resp->fw_minor);
805 if (api_major_version != NULL)
806 *api_major_version = le16_to_cpu(resp->api_major);
807 if (api_minor_version != NULL)
808 *api_minor_version = le16_to_cpu(resp->api_minor);
809 }
810
811 return status;
812}
813
814/**
815 * i40e_aq_send_driver_version
816 * @hw: pointer to the hw struct
817 * @event: driver event: driver ok, start or stop
818 * @dv: driver's major, minor version
819 * @cmd_details: pointer to command details structure or NULL
820 *
821 * Send the driver version to the firmware
822 **/
823i40e_status i40e_aq_send_driver_version(struct i40e_hw *hw,
824 struct i40e_driver_version *dv,
825 struct i40e_asq_cmd_details *cmd_details)
826{
827 struct i40e_aq_desc desc;
828 struct i40e_aqc_driver_version *cmd =
829 (struct i40e_aqc_driver_version *)&desc.params.raw;
830 i40e_status status;
831
832 if (dv == NULL)
833 return I40E_ERR_PARAM;
834
835 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_driver_version);
836
837 desc.flags |= cpu_to_le16(I40E_AQ_FLAG_SI);
838 cmd->driver_major_ver = dv->major_version;
839 cmd->driver_minor_ver = dv->minor_version;
840 cmd->driver_build_ver = dv->build_version;
841 cmd->driver_subbuild_ver = dv->subbuild_version;
842 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
843
844 return status;
845}
846
847/**
848 * i40e_get_link_status - get status of the HW network link
849 * @hw: pointer to the hw struct
850 *
851 * Returns true if link is up, false if link is down.
852 *
853 * Side effect: LinkStatusEvent reporting becomes enabled
854 **/
855bool i40e_get_link_status(struct i40e_hw *hw)
856{
857 i40e_status status = 0;
858 bool link_status = false;
859
860 if (hw->phy.get_link_info) {
861 status = i40e_aq_get_link_info(hw, true, NULL, NULL);
862
863 if (status)
864 goto i40e_get_link_status_exit;
865 }
866
867 link_status = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
868
869i40e_get_link_status_exit:
870 return link_status;
871}
872
873/**
874 * i40e_aq_add_veb - Insert a VEB between the VSI and the MAC
875 * @hw: pointer to the hw struct
876 * @uplink_seid: the MAC or other gizmo SEID
877 * @downlink_seid: the VSI SEID
878 * @enabled_tc: bitmap of TCs to be enabled
879 * @default_port: true for default port VSI, false for control port
880 * @veb_seid: pointer to where to put the resulting VEB SEID
881 * @cmd_details: pointer to command details structure or NULL
882 *
883 * This asks the FW to add a VEB between the uplink and downlink
884 * elements. If the uplink SEID is 0, this will be a floating VEB.
885 **/
886i40e_status i40e_aq_add_veb(struct i40e_hw *hw, u16 uplink_seid,
887 u16 downlink_seid, u8 enabled_tc,
888 bool default_port, u16 *veb_seid,
889 struct i40e_asq_cmd_details *cmd_details)
890{
891 struct i40e_aq_desc desc;
892 struct i40e_aqc_add_veb *cmd =
893 (struct i40e_aqc_add_veb *)&desc.params.raw;
894 struct i40e_aqc_add_veb_completion *resp =
895 (struct i40e_aqc_add_veb_completion *)&desc.params.raw;
896 i40e_status status;
897 u16 veb_flags = 0;
898
899 /* SEIDs need to either both be set or both be 0 for floating VEB */
900 if (!!uplink_seid != !!downlink_seid)
901 return I40E_ERR_PARAM;
902
903 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_veb);
904
905 cmd->uplink_seid = cpu_to_le16(uplink_seid);
906 cmd->downlink_seid = cpu_to_le16(downlink_seid);
907 cmd->enable_tcs = enabled_tc;
908 if (!uplink_seid)
909 veb_flags |= I40E_AQC_ADD_VEB_FLOATING;
910 if (default_port)
911 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DEFAULT;
912 else
913 veb_flags |= I40E_AQC_ADD_VEB_PORT_TYPE_DATA;
914 cmd->veb_flags = cpu_to_le16(veb_flags);
915
916 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
917
918 if (!status && veb_seid)
919 *veb_seid = le16_to_cpu(resp->veb_seid);
920
921 return status;
922}
923
924/**
925 * i40e_aq_get_veb_parameters - Retrieve VEB parameters
926 * @hw: pointer to the hw struct
927 * @veb_seid: the SEID of the VEB to query
928 * @switch_id: the uplink switch id
929 * @floating_veb: set to true if the VEB is floating
930 * @statistic_index: index of the stats counter block for this VEB
931 * @vebs_used: number of VEB's used by function
932 * @vebs_unallocated: total VEB's not reserved by any function
933 * @cmd_details: pointer to command details structure or NULL
934 *
935 * This retrieves the parameters for a particular VEB, specified by
936 * uplink_seid, and returns them to the caller.
937 **/
938i40e_status i40e_aq_get_veb_parameters(struct i40e_hw *hw,
939 u16 veb_seid, u16 *switch_id,
940 bool *floating, u16 *statistic_index,
941 u16 *vebs_used, u16 *vebs_free,
942 struct i40e_asq_cmd_details *cmd_details)
943{
944 struct i40e_aq_desc desc;
945 struct i40e_aqc_get_veb_parameters_completion *cmd_resp =
946 (struct i40e_aqc_get_veb_parameters_completion *)
947 &desc.params.raw;
948 i40e_status status;
949
950 if (veb_seid == 0)
951 return I40E_ERR_PARAM;
952
953 i40e_fill_default_direct_cmd_desc(&desc,
954 i40e_aqc_opc_get_veb_parameters);
955 cmd_resp->seid = cpu_to_le16(veb_seid);
956
957 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
958 if (status)
959 goto get_veb_exit;
960
961 if (switch_id)
962 *switch_id = le16_to_cpu(cmd_resp->switch_id);
963 if (statistic_index)
964 *statistic_index = le16_to_cpu(cmd_resp->statistic_index);
965 if (vebs_used)
966 *vebs_used = le16_to_cpu(cmd_resp->vebs_used);
967 if (vebs_free)
968 *vebs_free = le16_to_cpu(cmd_resp->vebs_free);
969 if (floating) {
970 u16 flags = le16_to_cpu(cmd_resp->veb_flags);
971 if (flags & I40E_AQC_ADD_VEB_FLOATING)
972 *floating = true;
973 else
974 *floating = false;
975 }
976
977get_veb_exit:
978 return status;
979}
980
981/**
982 * i40e_aq_add_macvlan
983 * @hw: pointer to the hw struct
984 * @seid: VSI for the mac address
985 * @mv_list: list of macvlans to be added
986 * @count: length of the list
987 * @cmd_details: pointer to command details structure or NULL
988 *
989 * Add MAC/VLAN addresses to the HW filtering
990 **/
991i40e_status i40e_aq_add_macvlan(struct i40e_hw *hw, u16 seid,
992 struct i40e_aqc_add_macvlan_element_data *mv_list,
993 u16 count, struct i40e_asq_cmd_details *cmd_details)
994{
995 struct i40e_aq_desc desc;
996 struct i40e_aqc_macvlan *cmd =
997 (struct i40e_aqc_macvlan *)&desc.params.raw;
998 i40e_status status;
999 u16 buf_size;
1000
1001 if (count == 0 || !mv_list || !hw)
1002 return I40E_ERR_PARAM;
1003
1004 buf_size = count * sizeof(struct i40e_aqc_add_macvlan_element_data);
1005
1006 /* prep the rest of the request */
1007 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_macvlan);
1008 cmd->num_addresses = cpu_to_le16(count);
1009 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1010 cmd->seid[1] = 0;
1011 cmd->seid[2] = 0;
1012
1013 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1014 if (buf_size > I40E_AQ_LARGE_BUF)
1015 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1016
1017 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1018 cmd_details);
1019
1020 return status;
1021}
1022
1023/**
1024 * i40e_aq_remove_macvlan
1025 * @hw: pointer to the hw struct
1026 * @seid: VSI for the mac address
1027 * @mv_list: list of macvlans to be removed
1028 * @count: length of the list
1029 * @cmd_details: pointer to command details structure or NULL
1030 *
1031 * Remove MAC/VLAN addresses from the HW filtering
1032 **/
1033i40e_status i40e_aq_remove_macvlan(struct i40e_hw *hw, u16 seid,
1034 struct i40e_aqc_remove_macvlan_element_data *mv_list,
1035 u16 count, struct i40e_asq_cmd_details *cmd_details)
1036{
1037 struct i40e_aq_desc desc;
1038 struct i40e_aqc_macvlan *cmd =
1039 (struct i40e_aqc_macvlan *)&desc.params.raw;
1040 i40e_status status;
1041 u16 buf_size;
1042
1043 if (count == 0 || !mv_list || !hw)
1044 return I40E_ERR_PARAM;
1045
1046 buf_size = count * sizeof(struct i40e_aqc_remove_macvlan_element_data);
1047
1048 /* prep the rest of the request */
1049 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_macvlan);
1050 cmd->num_addresses = cpu_to_le16(count);
1051 cmd->seid[0] = cpu_to_le16(I40E_AQC_MACVLAN_CMD_SEID_VALID | seid);
1052 cmd->seid[1] = 0;
1053 cmd->seid[2] = 0;
1054
1055 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1056 if (buf_size > I40E_AQ_LARGE_BUF)
1057 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1058
1059 status = i40e_asq_send_command(hw, &desc, mv_list, buf_size,
1060 cmd_details);
1061
1062 return status;
1063}
1064
1065/**
1066 * i40e_aq_add_vlan - Add VLAN ids to the HW filtering
1067 * @hw: pointer to the hw struct
1068 * @seid: VSI for the vlan filters
1069 * @v_list: list of vlan filters to be added
1070 * @count: length of the list
1071 * @cmd_details: pointer to command details structure or NULL
1072 **/
1073i40e_status i40e_aq_add_vlan(struct i40e_hw *hw, u16 seid,
1074 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1075 u8 count, struct i40e_asq_cmd_details *cmd_details)
1076{
1077 struct i40e_aq_desc desc;
1078 struct i40e_aqc_macvlan *cmd =
1079 (struct i40e_aqc_macvlan *)&desc.params.raw;
1080 i40e_status status;
1081 u16 buf_size;
1082
1083 if (count == 0 || !v_list || !hw)
1084 return I40E_ERR_PARAM;
1085
1086 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1087
1088 /* prep the rest of the request */
1089 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_add_vlan);
1090 cmd->num_addresses = cpu_to_le16(count);
1091 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1092 cmd->seid[1] = 0;
1093 cmd->seid[2] = 0;
1094
1095 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1096 if (buf_size > I40E_AQ_LARGE_BUF)
1097 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1098
1099 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1100 cmd_details);
1101
1102 return status;
1103}
1104
1105/**
1106 * i40e_aq_remove_vlan - Remove VLANs from the HW filtering
1107 * @hw: pointer to the hw struct
1108 * @seid: VSI for the vlan filters
1109 * @v_list: list of macvlans to be removed
1110 * @count: length of the list
1111 * @cmd_details: pointer to command details structure or NULL
1112 **/
1113i40e_status i40e_aq_remove_vlan(struct i40e_hw *hw, u16 seid,
1114 struct i40e_aqc_add_remove_vlan_element_data *v_list,
1115 u8 count, struct i40e_asq_cmd_details *cmd_details)
1116{
1117 struct i40e_aq_desc desc;
1118 struct i40e_aqc_macvlan *cmd =
1119 (struct i40e_aqc_macvlan *)&desc.params.raw;
1120 i40e_status status;
1121 u16 buf_size;
1122
1123 if (count == 0 || !v_list || !hw)
1124 return I40E_ERR_PARAM;
1125
1126 buf_size = count * sizeof(struct i40e_aqc_add_remove_vlan_element_data);
1127
1128 /* prep the rest of the request */
1129 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_remove_vlan);
1130 cmd->num_addresses = cpu_to_le16(count);
1131 cmd->seid[0] = cpu_to_le16(seid | I40E_AQC_MACVLAN_CMD_SEID_VALID);
1132 cmd->seid[1] = 0;
1133 cmd->seid[2] = 0;
1134
1135 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF | I40E_AQ_FLAG_RD));
1136 if (buf_size > I40E_AQ_LARGE_BUF)
1137 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1138
1139 status = i40e_asq_send_command(hw, &desc, v_list, buf_size,
1140 cmd_details);
1141
1142 return status;
1143}
1144
1145/**
1146 * i40e_aq_send_msg_to_vf
1147 * @hw: pointer to the hardware structure
1148 * @vfid: vf id to send msg
1149 * @msg: pointer to the msg buffer
1150 * @msglen: msg length
1151 * @cmd_details: pointer to command details
1152 *
1153 * send msg to vf
1154 **/
1155i40e_status i40e_aq_send_msg_to_vf(struct i40e_hw *hw, u16 vfid,
1156 u32 v_opcode, u32 v_retval, u8 *msg, u16 msglen,
1157 struct i40e_asq_cmd_details *cmd_details)
1158{
1159 struct i40e_aq_desc desc;
1160 struct i40e_aqc_pf_vf_message *cmd =
1161 (struct i40e_aqc_pf_vf_message *)&desc.params.raw;
1162 i40e_status status;
1163
1164 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_send_msg_to_vf);
1165 cmd->id = cpu_to_le32(vfid);
1166 desc.cookie_high = cpu_to_le32(v_opcode);
1167 desc.cookie_low = cpu_to_le32(v_retval);
1168 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_SI);
1169 if (msglen) {
1170 desc.flags |= cpu_to_le16((u16)(I40E_AQ_FLAG_BUF |
1171 I40E_AQ_FLAG_RD));
1172 if (msglen > I40E_AQ_LARGE_BUF)
1173 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1174 desc.datalen = cpu_to_le16(msglen);
1175 }
1176 status = i40e_asq_send_command(hw, &desc, msg, msglen, cmd_details);
1177
1178 return status;
1179}
1180
1181/**
1182 * i40e_aq_set_hmc_resource_profile
1183 * @hw: pointer to the hw struct
1184 * @profile: type of profile the HMC is to be set as
1185 * @pe_vf_enabled_count: the number of PE enabled VFs the system has
1186 * @cmd_details: pointer to command details structure or NULL
1187 *
1188 * set the HMC profile of the device.
1189 **/
1190i40e_status i40e_aq_set_hmc_resource_profile(struct i40e_hw *hw,
1191 enum i40e_aq_hmc_profile profile,
1192 u8 pe_vf_enabled_count,
1193 struct i40e_asq_cmd_details *cmd_details)
1194{
1195 struct i40e_aq_desc desc;
1196 struct i40e_aq_get_set_hmc_resource_profile *cmd =
1197 (struct i40e_aq_get_set_hmc_resource_profile *)&desc.params.raw;
1198 i40e_status status;
1199
1200 i40e_fill_default_direct_cmd_desc(&desc,
1201 i40e_aqc_opc_set_hmc_resource_profile);
1202
1203 cmd->pm_profile = (u8)profile;
1204 cmd->pe_vf_enabled = pe_vf_enabled_count;
1205
1206 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1207
1208 return status;
1209}
1210
1211/**
1212 * i40e_aq_request_resource
1213 * @hw: pointer to the hw struct
1214 * @resource: resource id
1215 * @access: access type
1216 * @sdp_number: resource number
1217 * @timeout: the maximum time in ms that the driver may hold the resource
1218 * @cmd_details: pointer to command details structure or NULL
1219 *
1220 * requests common resource using the admin queue commands
1221 **/
1222i40e_status i40e_aq_request_resource(struct i40e_hw *hw,
1223 enum i40e_aq_resources_ids resource,
1224 enum i40e_aq_resource_access_type access,
1225 u8 sdp_number, u64 *timeout,
1226 struct i40e_asq_cmd_details *cmd_details)
1227{
1228 struct i40e_aq_desc desc;
1229 struct i40e_aqc_request_resource *cmd_resp =
1230 (struct i40e_aqc_request_resource *)&desc.params.raw;
1231 i40e_status status;
1232
1233 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_request_resource);
1234
1235 cmd_resp->resource_id = cpu_to_le16(resource);
1236 cmd_resp->access_type = cpu_to_le16(access);
1237 cmd_resp->resource_number = cpu_to_le32(sdp_number);
1238
1239 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1240 /* The completion specifies the maximum time in ms that the driver
1241 * may hold the resource in the Timeout field.
1242 * If the resource is held by someone else, the command completes with
1243 * busy return value and the timeout field indicates the maximum time
1244 * the current owner of the resource has to free it.
1245 */
1246 if (!status || hw->aq.asq_last_status == I40E_AQ_RC_EBUSY)
1247 *timeout = le32_to_cpu(cmd_resp->timeout);
1248
1249 return status;
1250}
1251
1252/**
1253 * i40e_aq_release_resource
1254 * @hw: pointer to the hw struct
1255 * @resource: resource id
1256 * @sdp_number: resource number
1257 * @cmd_details: pointer to command details structure or NULL
1258 *
1259 * release common resource using the admin queue commands
1260 **/
1261i40e_status i40e_aq_release_resource(struct i40e_hw *hw,
1262 enum i40e_aq_resources_ids resource,
1263 u8 sdp_number,
1264 struct i40e_asq_cmd_details *cmd_details)
1265{
1266 struct i40e_aq_desc desc;
1267 struct i40e_aqc_request_resource *cmd =
1268 (struct i40e_aqc_request_resource *)&desc.params.raw;
1269 i40e_status status;
1270
1271 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_release_resource);
1272
1273 cmd->resource_id = cpu_to_le16(resource);
1274 cmd->resource_number = cpu_to_le32(sdp_number);
1275
1276 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1277
1278 return status;
1279}
1280
1281/**
1282 * i40e_aq_read_nvm
1283 * @hw: pointer to the hw struct
1284 * @module_pointer: module pointer location in words from the NVM beginning
1285 * @offset: byte offset from the module beginning
1286 * @length: length of the section to be read (in bytes from the offset)
1287 * @data: command buffer (size [bytes] = length)
1288 * @last_command: tells if this is the last command in a series
1289 * @cmd_details: pointer to command details structure or NULL
1290 *
1291 * Read the NVM using the admin queue commands
1292 **/
1293i40e_status i40e_aq_read_nvm(struct i40e_hw *hw, u8 module_pointer,
1294 u32 offset, u16 length, void *data,
1295 bool last_command,
1296 struct i40e_asq_cmd_details *cmd_details)
1297{
1298 struct i40e_aq_desc desc;
1299 struct i40e_aqc_nvm_update *cmd =
1300 (struct i40e_aqc_nvm_update *)&desc.params.raw;
1301 i40e_status status;
1302
1303 /* In offset the highest byte must be zeroed. */
1304 if (offset & 0xFF000000) {
1305 status = I40E_ERR_PARAM;
1306 goto i40e_aq_read_nvm_exit;
1307 }
1308
1309 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_nvm_read);
1310
1311 /* If this is the last command in a series, set the proper flag. */
1312 if (last_command)
1313 cmd->command_flags |= I40E_AQ_NVM_LAST_CMD;
1314 cmd->module_pointer = module_pointer;
1315 cmd->offset = cpu_to_le32(offset);
1316 cmd->length = cpu_to_le16(length);
1317
1318 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1319 if (length > I40E_AQ_LARGE_BUF)
1320 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1321
1322 status = i40e_asq_send_command(hw, &desc, data, length, cmd_details);
1323
1324i40e_aq_read_nvm_exit:
1325 return status;
1326}
1327
1328#define I40E_DEV_FUNC_CAP_SWITCH_MODE 0x01
1329#define I40E_DEV_FUNC_CAP_MGMT_MODE 0x02
1330#define I40E_DEV_FUNC_CAP_NPAR 0x03
1331#define I40E_DEV_FUNC_CAP_OS2BMC 0x04
1332#define I40E_DEV_FUNC_CAP_VALID_FUNC 0x05
1333#define I40E_DEV_FUNC_CAP_SRIOV_1_1 0x12
1334#define I40E_DEV_FUNC_CAP_VF 0x13
1335#define I40E_DEV_FUNC_CAP_VMDQ 0x14
1336#define I40E_DEV_FUNC_CAP_802_1_QBG 0x15
1337#define I40E_DEV_FUNC_CAP_802_1_QBH 0x16
1338#define I40E_DEV_FUNC_CAP_VSI 0x17
1339#define I40E_DEV_FUNC_CAP_DCB 0x18
1340#define I40E_DEV_FUNC_CAP_FCOE 0x21
1341#define I40E_DEV_FUNC_CAP_RSS 0x40
1342#define I40E_DEV_FUNC_CAP_RX_QUEUES 0x41
1343#define I40E_DEV_FUNC_CAP_TX_QUEUES 0x42
1344#define I40E_DEV_FUNC_CAP_MSIX 0x43
1345#define I40E_DEV_FUNC_CAP_MSIX_VF 0x44
1346#define I40E_DEV_FUNC_CAP_FLOW_DIRECTOR 0x45
1347#define I40E_DEV_FUNC_CAP_IEEE_1588 0x46
1348#define I40E_DEV_FUNC_CAP_MFP_MODE_1 0xF1
1349#define I40E_DEV_FUNC_CAP_CEM 0xF2
1350#define I40E_DEV_FUNC_CAP_IWARP 0x51
1351#define I40E_DEV_FUNC_CAP_LED 0x61
1352#define I40E_DEV_FUNC_CAP_SDP 0x62
1353#define I40E_DEV_FUNC_CAP_MDIO 0x63
1354
1355/**
1356 * i40e_parse_discover_capabilities
1357 * @hw: pointer to the hw struct
1358 * @buff: pointer to a buffer containing device/function capability records
1359 * @cap_count: number of capability records in the list
1360 * @list_type_opc: type of capabilities list to parse
1361 *
1362 * Parse the device/function capabilities list.
1363 **/
1364static void i40e_parse_discover_capabilities(struct i40e_hw *hw, void *buff,
1365 u32 cap_count,
1366 enum i40e_admin_queue_opc list_type_opc)
1367{
1368 struct i40e_aqc_list_capabilities_element_resp *cap;
1369 u32 number, logical_id, phys_id;
1370 struct i40e_hw_capabilities *p;
1371 u32 reg_val;
1372 u32 i = 0;
1373 u16 id;
1374
1375 cap = (struct i40e_aqc_list_capabilities_element_resp *) buff;
1376
1377 if (list_type_opc == i40e_aqc_opc_list_dev_capabilities)
1378 p = (struct i40e_hw_capabilities *)&hw->dev_caps;
1379 else if (list_type_opc == i40e_aqc_opc_list_func_capabilities)
1380 p = (struct i40e_hw_capabilities *)&hw->func_caps;
1381 else
1382 return;
1383
1384 for (i = 0; i < cap_count; i++, cap++) {
1385 id = le16_to_cpu(cap->id);
1386 number = le32_to_cpu(cap->number);
1387 logical_id = le32_to_cpu(cap->logical_id);
1388 phys_id = le32_to_cpu(cap->phys_id);
1389
1390 switch (id) {
1391 case I40E_DEV_FUNC_CAP_SWITCH_MODE:
1392 p->switch_mode = number;
1393 break;
1394 case I40E_DEV_FUNC_CAP_MGMT_MODE:
1395 p->management_mode = number;
1396 break;
1397 case I40E_DEV_FUNC_CAP_NPAR:
1398 p->npar_enable = number;
1399 break;
1400 case I40E_DEV_FUNC_CAP_OS2BMC:
1401 p->os2bmc = number;
1402 break;
1403 case I40E_DEV_FUNC_CAP_VALID_FUNC:
1404 p->valid_functions = number;
1405 break;
1406 case I40E_DEV_FUNC_CAP_SRIOV_1_1:
1407 if (number == 1)
1408 p->sr_iov_1_1 = true;
1409 break;
1410 case I40E_DEV_FUNC_CAP_VF:
1411 p->num_vfs = number;
1412 p->vf_base_id = logical_id;
1413 break;
1414 case I40E_DEV_FUNC_CAP_VMDQ:
1415 if (number == 1)
1416 p->vmdq = true;
1417 break;
1418 case I40E_DEV_FUNC_CAP_802_1_QBG:
1419 if (number == 1)
1420 p->evb_802_1_qbg = true;
1421 break;
1422 case I40E_DEV_FUNC_CAP_802_1_QBH:
1423 if (number == 1)
1424 p->evb_802_1_qbh = true;
1425 break;
1426 case I40E_DEV_FUNC_CAP_VSI:
1427 p->num_vsis = number;
1428 break;
1429 case I40E_DEV_FUNC_CAP_DCB:
1430 if (number == 1) {
1431 p->dcb = true;
1432 p->enabled_tcmap = logical_id;
1433 p->maxtc = phys_id;
1434 }
1435 break;
1436 case I40E_DEV_FUNC_CAP_FCOE:
1437 if (number == 1)
1438 p->fcoe = true;
1439 break;
1440 case I40E_DEV_FUNC_CAP_RSS:
1441 p->rss = true;
1442 reg_val = rd32(hw, I40E_PFQF_CTL_0);
1443 if (reg_val & I40E_PFQF_CTL_0_HASHLUTSIZE_MASK)
1444 p->rss_table_size = number;
1445 else
1446 p->rss_table_size = 128;
1447 p->rss_table_entry_width = logical_id;
1448 break;
1449 case I40E_DEV_FUNC_CAP_RX_QUEUES:
1450 p->num_rx_qp = number;
1451 p->base_queue = phys_id;
1452 break;
1453 case I40E_DEV_FUNC_CAP_TX_QUEUES:
1454 p->num_tx_qp = number;
1455 p->base_queue = phys_id;
1456 break;
1457 case I40E_DEV_FUNC_CAP_MSIX:
1458 p->num_msix_vectors = number;
1459 break;
1460 case I40E_DEV_FUNC_CAP_MSIX_VF:
1461 p->num_msix_vectors_vf = number;
1462 break;
1463 case I40E_DEV_FUNC_CAP_MFP_MODE_1:
1464 if (number == 1)
1465 p->mfp_mode_1 = true;
1466 break;
1467 case I40E_DEV_FUNC_CAP_CEM:
1468 if (number == 1)
1469 p->mgmt_cem = true;
1470 break;
1471 case I40E_DEV_FUNC_CAP_IWARP:
1472 if (number == 1)
1473 p->iwarp = true;
1474 break;
1475 case I40E_DEV_FUNC_CAP_LED:
1476 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1477 p->led[phys_id] = true;
1478 break;
1479 case I40E_DEV_FUNC_CAP_SDP:
1480 if (phys_id < I40E_HW_CAP_MAX_GPIO)
1481 p->sdp[phys_id] = true;
1482 break;
1483 case I40E_DEV_FUNC_CAP_MDIO:
1484 if (number == 1) {
1485 p->mdio_port_num = phys_id;
1486 p->mdio_port_mode = logical_id;
1487 }
1488 break;
1489 case I40E_DEV_FUNC_CAP_IEEE_1588:
1490 if (number == 1)
1491 p->ieee_1588 = true;
1492 break;
1493 case I40E_DEV_FUNC_CAP_FLOW_DIRECTOR:
1494 p->fd = true;
1495 p->fd_filters_guaranteed = number;
1496 p->fd_filters_best_effort = logical_id;
1497 break;
1498 default:
1499 break;
1500 }
1501 }
1502
1503 /* additional HW specific goodies that might
1504 * someday be HW version specific
1505 */
1506 p->rx_buf_chain_len = I40E_MAX_CHAINED_RX_BUFFERS;
1507}
1508
1509/**
1510 * i40e_aq_discover_capabilities
1511 * @hw: pointer to the hw struct
1512 * @buff: a virtual buffer to hold the capabilities
1513 * @buff_size: Size of the virtual buffer
1514 * @data_size: Size of the returned data, or buff size needed if AQ err==ENOMEM
1515 * @list_type_opc: capabilities type to discover - pass in the command opcode
1516 * @cmd_details: pointer to command details structure or NULL
1517 *
1518 * Get the device capabilities descriptions from the firmware
1519 **/
1520i40e_status i40e_aq_discover_capabilities(struct i40e_hw *hw,
1521 void *buff, u16 buff_size, u16 *data_size,
1522 enum i40e_admin_queue_opc list_type_opc,
1523 struct i40e_asq_cmd_details *cmd_details)
1524{
1525 struct i40e_aqc_list_capabilites *cmd;
1526 i40e_status status = 0;
1527 struct i40e_aq_desc desc;
1528
1529 cmd = (struct i40e_aqc_list_capabilites *)&desc.params.raw;
1530
1531 if (list_type_opc != i40e_aqc_opc_list_func_capabilities &&
1532 list_type_opc != i40e_aqc_opc_list_dev_capabilities) {
1533 status = I40E_ERR_PARAM;
1534 goto exit;
1535 }
1536
1537 i40e_fill_default_direct_cmd_desc(&desc, list_type_opc);
1538
1539 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1540 if (buff_size > I40E_AQ_LARGE_BUF)
1541 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1542
1543 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1544 *data_size = le16_to_cpu(desc.datalen);
1545
1546 if (status)
1547 goto exit;
1548
1549 i40e_parse_discover_capabilities(hw, buff, le32_to_cpu(cmd->count),
1550 list_type_opc);
1551
1552exit:
1553 return status;
1554}
1555
1556/**
1557 * i40e_aq_get_lldp_mib
1558 * @hw: pointer to the hw struct
1559 * @bridge_type: type of bridge requested
1560 * @mib_type: Local, Remote or both Local and Remote MIBs
1561 * @buff: pointer to a user supplied buffer to store the MIB block
1562 * @buff_size: size of the buffer (in bytes)
1563 * @local_len : length of the returned Local LLDP MIB
1564 * @remote_len: length of the returned Remote LLDP MIB
1565 * @cmd_details: pointer to command details structure or NULL
1566 *
1567 * Requests the complete LLDP MIB (entire packet).
1568 **/
1569i40e_status i40e_aq_get_lldp_mib(struct i40e_hw *hw, u8 bridge_type,
1570 u8 mib_type, void *buff, u16 buff_size,
1571 u16 *local_len, u16 *remote_len,
1572 struct i40e_asq_cmd_details *cmd_details)
1573{
1574 struct i40e_aq_desc desc;
1575 struct i40e_aqc_lldp_get_mib *cmd =
1576 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1577 struct i40e_aqc_lldp_get_mib *resp =
1578 (struct i40e_aqc_lldp_get_mib *)&desc.params.raw;
1579 i40e_status status;
1580
1581 if (buff_size == 0 || !buff)
1582 return I40E_ERR_PARAM;
1583
1584 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_get_mib);
1585 /* Indirect Command */
1586 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1587
1588 cmd->type = mib_type & I40E_AQ_LLDP_MIB_TYPE_MASK;
1589 cmd->type |= ((bridge_type << I40E_AQ_LLDP_BRIDGE_TYPE_SHIFT) &
1590 I40E_AQ_LLDP_BRIDGE_TYPE_MASK);
1591
1592 desc.datalen = cpu_to_le16(buff_size);
1593
1594 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1595 if (buff_size > I40E_AQ_LARGE_BUF)
1596 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1597
1598 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1599 if (!status) {
1600 if (local_len != NULL)
1601 *local_len = le16_to_cpu(resp->local_len);
1602 if (remote_len != NULL)
1603 *remote_len = le16_to_cpu(resp->remote_len);
1604 }
1605
1606 return status;
1607}
1608
1609/**
1610 * i40e_aq_cfg_lldp_mib_change_event
1611 * @hw: pointer to the hw struct
1612 * @enable_update: Enable or Disable event posting
1613 * @cmd_details: pointer to command details structure or NULL
1614 *
1615 * Enable or Disable posting of an event on ARQ when LLDP MIB
1616 * associated with the interface changes
1617 **/
1618i40e_status i40e_aq_cfg_lldp_mib_change_event(struct i40e_hw *hw,
1619 bool enable_update,
1620 struct i40e_asq_cmd_details *cmd_details)
1621{
1622 struct i40e_aq_desc desc;
1623 struct i40e_aqc_lldp_update_mib *cmd =
1624 (struct i40e_aqc_lldp_update_mib *)&desc.params.raw;
1625 i40e_status status;
1626
1627 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_update_mib);
1628
1629 if (!enable_update)
1630 cmd->command |= I40E_AQ_LLDP_MIB_UPDATE_DISABLE;
1631
1632 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1633
1634 return status;
1635}
1636
1637/**
1638 * i40e_aq_stop_lldp
1639 * @hw: pointer to the hw struct
1640 * @shutdown_agent: True if LLDP Agent needs to be Shutdown
1641 * @cmd_details: pointer to command details structure or NULL
1642 *
1643 * Stop or Shutdown the embedded LLDP Agent
1644 **/
1645i40e_status i40e_aq_stop_lldp(struct i40e_hw *hw, bool shutdown_agent,
1646 struct i40e_asq_cmd_details *cmd_details)
1647{
1648 struct i40e_aq_desc desc;
1649 struct i40e_aqc_lldp_stop *cmd =
1650 (struct i40e_aqc_lldp_stop *)&desc.params.raw;
1651 i40e_status status;
1652
1653 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_stop);
1654
1655 if (shutdown_agent)
1656 cmd->command |= I40E_AQ_LLDP_AGENT_SHUTDOWN;
1657
1658 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1659
1660 return status;
1661}
1662
1663/**
1664 * i40e_aq_start_lldp
1665 * @hw: pointer to the hw struct
1666 * @cmd_details: pointer to command details structure or NULL
1667 *
1668 * Start the embedded LLDP Agent on all ports.
1669 **/
1670i40e_status i40e_aq_start_lldp(struct i40e_hw *hw,
1671 struct i40e_asq_cmd_details *cmd_details)
1672{
1673 struct i40e_aq_desc desc;
1674 struct i40e_aqc_lldp_start *cmd =
1675 (struct i40e_aqc_lldp_start *)&desc.params.raw;
1676 i40e_status status;
1677
1678 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_lldp_start);
1679
1680 cmd->command = I40E_AQ_LLDP_AGENT_START;
1681
1682 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1683
1684 return status;
1685}
1686
1687/**
1688 * i40e_aq_delete_element - Delete switch element
1689 * @hw: pointer to the hw struct
1690 * @seid: the SEID to delete from the switch
1691 * @cmd_details: pointer to command details structure or NULL
1692 *
1693 * This deletes a switch element from the switch.
1694 **/
1695i40e_status i40e_aq_delete_element(struct i40e_hw *hw, u16 seid,
1696 struct i40e_asq_cmd_details *cmd_details)
1697{
1698 struct i40e_aq_desc desc;
1699 struct i40e_aqc_switch_seid *cmd =
1700 (struct i40e_aqc_switch_seid *)&desc.params.raw;
1701 i40e_status status;
1702
1703 if (seid == 0)
1704 return I40E_ERR_PARAM;
1705
1706 i40e_fill_default_direct_cmd_desc(&desc, i40e_aqc_opc_delete_element);
1707
1708 cmd->seid = cpu_to_le16(seid);
1709
1710 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
1711
1712 return status;
1713}
1714
1715/**
1716 * i40e_aq_tx_sched_cmd - generic Tx scheduler AQ command handler
1717 * @hw: pointer to the hw struct
1718 * @seid: seid for the physical port/switching component/vsi
1719 * @buff: Indirect buffer to hold data parameters and response
1720 * @buff_size: Indirect buffer size
1721 * @opcode: Tx scheduler AQ command opcode
1722 * @cmd_details: pointer to command details structure or NULL
1723 *
1724 * Generic command handler for Tx scheduler AQ commands
1725 **/
1726static i40e_status i40e_aq_tx_sched_cmd(struct i40e_hw *hw, u16 seid,
1727 void *buff, u16 buff_size,
1728 enum i40e_admin_queue_opc opcode,
1729 struct i40e_asq_cmd_details *cmd_details)
1730{
1731 struct i40e_aq_desc desc;
1732 struct i40e_aqc_tx_sched_ind *cmd =
1733 (struct i40e_aqc_tx_sched_ind *)&desc.params.raw;
1734 i40e_status status;
1735 bool cmd_param_flag = false;
1736
1737 switch (opcode) {
1738 case i40e_aqc_opc_configure_vsi_ets_sla_bw_limit:
1739 case i40e_aqc_opc_configure_vsi_tc_bw:
1740 case i40e_aqc_opc_enable_switching_comp_ets:
1741 case i40e_aqc_opc_modify_switching_comp_ets:
1742 case i40e_aqc_opc_disable_switching_comp_ets:
1743 case i40e_aqc_opc_configure_switching_comp_ets_bw_limit:
1744 case i40e_aqc_opc_configure_switching_comp_bw_config:
1745 cmd_param_flag = true;
1746 break;
1747 case i40e_aqc_opc_query_vsi_bw_config:
1748 case i40e_aqc_opc_query_vsi_ets_sla_config:
1749 case i40e_aqc_opc_query_switching_comp_ets_config:
1750 case i40e_aqc_opc_query_port_ets_config:
1751 case i40e_aqc_opc_query_switching_comp_bw_config:
1752 cmd_param_flag = false;
1753 break;
1754 default:
1755 return I40E_ERR_PARAM;
1756 }
1757
1758 i40e_fill_default_direct_cmd_desc(&desc, opcode);
1759
1760 /* Indirect command */
1761 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_BUF);
1762 if (cmd_param_flag)
1763 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_RD);
1764 if (buff_size > I40E_AQ_LARGE_BUF)
1765 desc.flags |= cpu_to_le16((u16)I40E_AQ_FLAG_LB);
1766
1767 desc.datalen = cpu_to_le16(buff_size);
1768
1769 cmd->vsi_seid = cpu_to_le16(seid);
1770
1771 status = i40e_asq_send_command(hw, &desc, buff, buff_size, cmd_details);
1772
1773 return status;
1774}
1775
1776/**
1777 * i40e_aq_config_vsi_tc_bw - Config VSI BW Allocation per TC
1778 * @hw: pointer to the hw struct
1779 * @seid: VSI seid
1780 * @bw_data: Buffer holding enabled TCs, relative TC BW limit/credits
1781 * @cmd_details: pointer to command details structure or NULL
1782 **/
1783i40e_status i40e_aq_config_vsi_tc_bw(struct i40e_hw *hw,
1784 u16 seid,
1785 struct i40e_aqc_configure_vsi_tc_bw_data *bw_data,
1786 struct i40e_asq_cmd_details *cmd_details)
1787{
1788 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1789 i40e_aqc_opc_configure_vsi_tc_bw,
1790 cmd_details);
1791}
1792
1793/**
1794 * i40e_aq_query_vsi_bw_config - Query VSI BW configuration
1795 * @hw: pointer to the hw struct
1796 * @seid: seid of the VSI
1797 * @bw_data: Buffer to hold VSI BW configuration
1798 * @cmd_details: pointer to command details structure or NULL
1799 **/
1800i40e_status i40e_aq_query_vsi_bw_config(struct i40e_hw *hw,
1801 u16 seid,
1802 struct i40e_aqc_query_vsi_bw_config_resp *bw_data,
1803 struct i40e_asq_cmd_details *cmd_details)
1804{
1805 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1806 i40e_aqc_opc_query_vsi_bw_config,
1807 cmd_details);
1808}
1809
1810/**
1811 * i40e_aq_query_vsi_ets_sla_config - Query VSI BW configuration per TC
1812 * @hw: pointer to the hw struct
1813 * @seid: seid of the VSI
1814 * @bw_data: Buffer to hold VSI BW configuration per TC
1815 * @cmd_details: pointer to command details structure or NULL
1816 **/
1817i40e_status i40e_aq_query_vsi_ets_sla_config(struct i40e_hw *hw,
1818 u16 seid,
1819 struct i40e_aqc_query_vsi_ets_sla_config_resp *bw_data,
1820 struct i40e_asq_cmd_details *cmd_details)
1821{
1822 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1823 i40e_aqc_opc_query_vsi_ets_sla_config,
1824 cmd_details);
1825}
1826
1827/**
1828 * i40e_aq_query_switch_comp_ets_config - Query Switch comp BW config per TC
1829 * @hw: pointer to the hw struct
1830 * @seid: seid of the switching component
1831 * @bw_data: Buffer to hold switching component's per TC BW config
1832 * @cmd_details: pointer to command details structure or NULL
1833 **/
1834i40e_status i40e_aq_query_switch_comp_ets_config(struct i40e_hw *hw,
1835 u16 seid,
1836 struct i40e_aqc_query_switching_comp_ets_config_resp *bw_data,
1837 struct i40e_asq_cmd_details *cmd_details)
1838{
1839 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1840 i40e_aqc_opc_query_switching_comp_ets_config,
1841 cmd_details);
1842}
1843
1844/**
1845 * i40e_aq_query_port_ets_config - Query Physical Port ETS configuration
1846 * @hw: pointer to the hw struct
1847 * @seid: seid of the VSI or switching component connected to Physical Port
1848 * @bw_data: Buffer to hold current ETS configuration for the Physical Port
1849 * @cmd_details: pointer to command details structure or NULL
1850 **/
1851i40e_status i40e_aq_query_port_ets_config(struct i40e_hw *hw,
1852 u16 seid,
1853 struct i40e_aqc_query_port_ets_config_resp *bw_data,
1854 struct i40e_asq_cmd_details *cmd_details)
1855{
1856 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1857 i40e_aqc_opc_query_port_ets_config,
1858 cmd_details);
1859}
1860
1861/**
1862 * i40e_aq_query_switch_comp_bw_config - Query Switch comp BW configuration
1863 * @hw: pointer to the hw struct
1864 * @seid: seid of the switching component
1865 * @bw_data: Buffer to hold switching component's BW configuration
1866 * @cmd_details: pointer to command details structure or NULL
1867 **/
1868i40e_status i40e_aq_query_switch_comp_bw_config(struct i40e_hw *hw,
1869 u16 seid,
1870 struct i40e_aqc_query_switching_comp_bw_config_resp *bw_data,
1871 struct i40e_asq_cmd_details *cmd_details)
1872{
1873 return i40e_aq_tx_sched_cmd(hw, seid, (void *)bw_data, sizeof(*bw_data),
1874 i40e_aqc_opc_query_switching_comp_bw_config,
1875 cmd_details);
1876}
1877
1878/**
1879 * i40e_validate_filter_settings
1880 * @hw: pointer to the hardware structure
1881 * @settings: Filter control settings
1882 *
1883 * Check and validate the filter control settings passed.
1884 * The function checks for the valid filter/context sizes being
1885 * passed for FCoE and PE.
1886 *
1887 * Returns 0 if the values passed are valid and within
1888 * range else returns an error.
1889 **/
1890static i40e_status i40e_validate_filter_settings(struct i40e_hw *hw,
1891 struct i40e_filter_control_settings *settings)
1892{
1893 u32 fcoe_cntx_size, fcoe_filt_size;
1894 u32 pe_cntx_size, pe_filt_size;
1895 u32 fcoe_fmax, pe_fmax;
1896 u32 val;
1897
1898 /* Validate FCoE settings passed */
1899 switch (settings->fcoe_filt_num) {
1900 case I40E_HASH_FILTER_SIZE_1K:
1901 case I40E_HASH_FILTER_SIZE_2K:
1902 case I40E_HASH_FILTER_SIZE_4K:
1903 case I40E_HASH_FILTER_SIZE_8K:
1904 case I40E_HASH_FILTER_SIZE_16K:
1905 case I40E_HASH_FILTER_SIZE_32K:
1906 fcoe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1907 fcoe_filt_size <<= (u32)settings->fcoe_filt_num;
1908 break;
1909 default:
1910 return I40E_ERR_PARAM;
1911 }
1912
1913 switch (settings->fcoe_cntx_num) {
1914 case I40E_DMA_CNTX_SIZE_512:
1915 case I40E_DMA_CNTX_SIZE_1K:
1916 case I40E_DMA_CNTX_SIZE_2K:
1917 case I40E_DMA_CNTX_SIZE_4K:
1918 fcoe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1919 fcoe_cntx_size <<= (u32)settings->fcoe_cntx_num;
1920 break;
1921 default:
1922 return I40E_ERR_PARAM;
1923 }
1924
1925 /* Validate PE settings passed */
1926 switch (settings->pe_filt_num) {
1927 case I40E_HASH_FILTER_SIZE_1K:
1928 case I40E_HASH_FILTER_SIZE_2K:
1929 case I40E_HASH_FILTER_SIZE_4K:
1930 case I40E_HASH_FILTER_SIZE_8K:
1931 case I40E_HASH_FILTER_SIZE_16K:
1932 case I40E_HASH_FILTER_SIZE_32K:
1933 case I40E_HASH_FILTER_SIZE_64K:
1934 case I40E_HASH_FILTER_SIZE_128K:
1935 case I40E_HASH_FILTER_SIZE_256K:
1936 case I40E_HASH_FILTER_SIZE_512K:
1937 case I40E_HASH_FILTER_SIZE_1M:
1938 pe_filt_size = I40E_HASH_FILTER_BASE_SIZE;
1939 pe_filt_size <<= (u32)settings->pe_filt_num;
1940 break;
1941 default:
1942 return I40E_ERR_PARAM;
1943 }
1944
1945 switch (settings->pe_cntx_num) {
1946 case I40E_DMA_CNTX_SIZE_512:
1947 case I40E_DMA_CNTX_SIZE_1K:
1948 case I40E_DMA_CNTX_SIZE_2K:
1949 case I40E_DMA_CNTX_SIZE_4K:
1950 case I40E_DMA_CNTX_SIZE_8K:
1951 case I40E_DMA_CNTX_SIZE_16K:
1952 case I40E_DMA_CNTX_SIZE_32K:
1953 case I40E_DMA_CNTX_SIZE_64K:
1954 case I40E_DMA_CNTX_SIZE_128K:
1955 case I40E_DMA_CNTX_SIZE_256K:
1956 pe_cntx_size = I40E_DMA_CNTX_BASE_SIZE;
1957 pe_cntx_size <<= (u32)settings->pe_cntx_num;
1958 break;
1959 default:
1960 return I40E_ERR_PARAM;
1961 }
1962
1963 /* FCHSIZE + FCDSIZE should not be greater than PMFCOEFMAX */
1964 val = rd32(hw, I40E_GLHMC_FCOEFMAX);
1965 fcoe_fmax = (val & I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_MASK)
1966 >> I40E_GLHMC_FCOEFMAX_PMFCOEFMAX_SHIFT;
1967 if (fcoe_filt_size + fcoe_cntx_size > fcoe_fmax)
1968 return I40E_ERR_INVALID_SIZE;
1969
1970 /* PEHSIZE + PEDSIZE should not be greater than PMPEXFMAX */
1971 val = rd32(hw, I40E_GLHMC_PEXFMAX);
1972 pe_fmax = (val & I40E_GLHMC_PEXFMAX_PMPEXFMAX_MASK)
1973 >> I40E_GLHMC_PEXFMAX_PMPEXFMAX_SHIFT;
1974 if (pe_filt_size + pe_cntx_size > pe_fmax)
1975 return I40E_ERR_INVALID_SIZE;
1976
1977 return 0;
1978}
1979
1980/**
1981 * i40e_set_filter_control
1982 * @hw: pointer to the hardware structure
1983 * @settings: Filter control settings
1984 *
1985 * Set the Queue Filters for PE/FCoE and enable filters required
1986 * for a single PF. It is expected that these settings are programmed
1987 * at the driver initialization time.
1988 **/
1989i40e_status i40e_set_filter_control(struct i40e_hw *hw,
1990 struct i40e_filter_control_settings *settings)
1991{
1992 i40e_status ret = 0;
1993 u32 hash_lut_size = 0;
1994 u32 val;
1995
1996 if (!settings)
1997 return I40E_ERR_PARAM;
1998
1999 /* Validate the input settings */
2000 ret = i40e_validate_filter_settings(hw, settings);
2001 if (ret)
2002 return ret;
2003
2004 /* Read the PF Queue Filter control register */
2005 val = rd32(hw, I40E_PFQF_CTL_0);
2006
2007 /* Program required PE hash buckets for the PF */
2008 val &= ~I40E_PFQF_CTL_0_PEHSIZE_MASK;
2009 val |= ((u32)settings->pe_filt_num << I40E_PFQF_CTL_0_PEHSIZE_SHIFT) &
2010 I40E_PFQF_CTL_0_PEHSIZE_MASK;
2011 /* Program required PE contexts for the PF */
2012 val &= ~I40E_PFQF_CTL_0_PEDSIZE_MASK;
2013 val |= ((u32)settings->pe_cntx_num << I40E_PFQF_CTL_0_PEDSIZE_SHIFT) &
2014 I40E_PFQF_CTL_0_PEDSIZE_MASK;
2015
2016 /* Program required FCoE hash buckets for the PF */
2017 val &= ~I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2018 val |= ((u32)settings->fcoe_filt_num <<
2019 I40E_PFQF_CTL_0_PFFCHSIZE_SHIFT) &
2020 I40E_PFQF_CTL_0_PFFCHSIZE_MASK;
2021 /* Program required FCoE DDP contexts for the PF */
2022 val &= ~I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2023 val |= ((u32)settings->fcoe_cntx_num <<
2024 I40E_PFQF_CTL_0_PFFCDSIZE_SHIFT) &
2025 I40E_PFQF_CTL_0_PFFCDSIZE_MASK;
2026
2027 /* Program Hash LUT size for the PF */
2028 val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2029 if (settings->hash_lut_size == I40E_HASH_LUT_SIZE_512)
2030 hash_lut_size = 1;
2031 val |= (hash_lut_size << I40E_PFQF_CTL_0_HASHLUTSIZE_SHIFT) &
2032 I40E_PFQF_CTL_0_HASHLUTSIZE_MASK;
2033
2034 /* Enable FDIR, Ethertype and MACVLAN filters for PF and VFs */
2035 if (settings->enable_fdir)
2036 val |= I40E_PFQF_CTL_0_FD_ENA_MASK;
2037 if (settings->enable_ethtype)
2038 val |= I40E_PFQF_CTL_0_ETYPE_ENA_MASK;
2039 if (settings->enable_macvlan)
2040 val |= I40E_PFQF_CTL_0_MACVLAN_ENA_MASK;
2041
2042 wr32(hw, I40E_PFQF_CTL_0, val);
2043
2044 return 0;
2045}
Linux kernel - Deliverables
This page took 0.229496 seconds and 5 git commands to generate.